With upcoming support for DMA transfers with the USCI peripheral,
support for setting the IFG bits will be required.
* UCxxCTL0 for more information.
*/
async command bool getIfgRx();
* UCxxCTL0 for more information.
*/
async command bool getIfgRx();
+ async command void setIfgRx();
async command void clrIfgRx();
async command bool getIfgTx();
async command void clrIfgRx();
async command bool getIfgTx();
+ async command void setIfgTx();
async command void clrIfgTx();
}
async command void clrIfgTx();
}
return READ_FLAG(UCxxIfg, UCxxRXIFG);
}
return READ_FLAG(UCxxIfg, UCxxRXIFG);
}
+ async command void Registers.setIfgRx()
+ {
+ SET_FLAG(UCxxIfg, UCxxRXIFG);
+ }
+
async command void Registers.clrIfgRx()
{
CLR_FLAG(UCxxIfg, UCxxRXIFG);
async command void Registers.clrIfgRx()
{
CLR_FLAG(UCxxIfg, UCxxRXIFG);
return READ_FLAG(UCxxIfg, UCxxTXIFG);
}
return READ_FLAG(UCxxIfg, UCxxTXIFG);
}
+ async command void Registers.setIfgTx()
+ {
+ SET_FLAG(UCxxIfg, UCxxTXIFG);
+ }
+
async command void Registers.clrIfgTx()
{
CLR_FLAG(UCxxIfg, UCxxTXIFG);
async command void Registers.clrIfgTx()
{
CLR_FLAG(UCxxIfg, UCxxTXIFG);