+#if defined(__MSP430_HAS_SD16_CH3__)
+#define SD16INCTL3_ 0x00B3 /* SD16 Input Control Register Channel 3 */
+sfrb(SD16INCTL3, SD16INCTL3_);
+#define SD16PRE3_ 0x00BB /* SD16 Preload Register Channel 3 */
+sfrb(SD16PRE3, SD16PRE3_);
+#define SD16CCTL3_ 0x0108 /* SD16 Channel 3 Control Register */
+sfrw(SD16CCTL3, SD16CCTL3_);
+#define SD16MEM3_ __MSP430_SD16MEM_BASE__ + 0x06 /* SD16 Channel 3 Conversion Memory */
+sfrw(SD16MEM3, SD16MEM3_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_CH4__)
+#define SD16INCTL4_ 0x00B4 /* SD16 Input Control Register Channel 4 */
+sfrb(SD16INCTL4, SD16INCTL4_);
+#define SD16PRE4_ 0x00BC /* SD16 Preload Register Channel 4 */
+sfrb(SD16PRE4, SD16PRE4_);
+#define SD16CCTL4_ 0x010A /* SD16 Channel 4 Control Register */
+sfrw(SD16CCTL4, SD16CCTL4_);
+#define SD16MEM4_ __MSP430_SD16MEM_BASE__ + 0x08 /* SD16 Channel 4 Conversion Memory */
+sfrw(SD16MEM4, SD16MEM4_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_CH5__)
+#define SD16INCTL5_ 0x00B5 /* SD16 Input Control Register Channel 5 */
+sfrb(SD16INCTL5, SD16INCTL5_);
+#define SD16PRE5_ 0x00BD /* SD16 Preload Register Channel 5 */
+sfrb(SD16PRE5, SD16PRE5_);
+#define SD16CCTL5_ 0x010C /* SD16 Channel 5 Control Register */
+sfrw(SD16CCTL5, SD16CCTL5_);
+#define SD16MEM5_ __MSP430_SD16MEM_BASE__ + 0x0A /* SD16 Channel 5 Conversion Memory */
+sfrw(SD16MEM5, SD16MEM5_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_CH6__)
+#define SD16INCTL6_ 0x00B6 /* SD16 Input Control Register Channel 6 */
+sfrb(SD16INCTL6, SD16INCTL6_);
+#define SD16PRE6_ 0x00BE /* SD16 Preload Register Channel 6 */
+sfrb(SD16PRE6, SD16PRE6_);
+#define SD16CCTL6_ 0x010E /* SD16 Channel 6 Control Register */
+sfrw(SD16CCTL6, SD16CCTL6_);
+#define SD16MEM6_ __MSP430_SD16MEM_BASE__ + 0x0C /* SD16 Channel 6 Conversion Memory */
+sfrw(SD16MEM6, SD16MEM6_);
+#endif
+
+#if defined(__MSP430_HAS_SD16_A__)