X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=gcc%2Fconfig%2Frs6000%2Faix51.h;h=dbec0fb2a3c6b41fcf62fccfe93b0a53b8db103f;hb=6fed43773c9b0ce596dca5686f37ac3fc0fa11c0;hp=4051dd007ddfe47e1df6c20b9c08e925162fa615;hpb=27b11d56b743098deb193d510b337ba22dc52e5c;p=msp430-gcc.git diff --git a/gcc/config/rs6000/aix51.h b/gcc/config/rs6000/aix51.h index 4051dd00..dbec0fb2 100644 --- a/gcc/config/rs6000/aix51.h +++ b/gcc/config/rs6000/aix51.h @@ -1,35 +1,24 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 POWER running AIX V5. - Copyright (C) 2001 Free Software Foundation, Inc. + Copyright (C) 2001, 2003, 2004, 2005, 2007, 2008 + Free Software Foundation, Inc. Contributed by David Edelsohn (edelsohn@gnu.org). -This file is part of GNU CC. + This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - - -/* AIX V5 and above support 64-bit executables. */ -#undef SUBSUBTARGET_SWITCHES -#define SUBSUBTARGET_SWITCHES \ - {"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \ - N_("Compile for 64-bit pointers") }, \ - {"aix32", - (MASK_64BIT | MASK_POWERPC64), \ - N_("Compile for 32-bit pointers") }, \ - {"pe", 0, \ - N_("Support message passing with the Parallel Environment") }, + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ /* Sometimes certain combinations of command options do not make sense on a particular target machine. You can define a macro @@ -46,12 +35,12 @@ do { \ if (TARGET_64BIT && (target_flags & NON_POWERPC_MASKS)) \ { \ target_flags &= ~NON_POWERPC_MASKS; \ - warning ("-maix64 and POWER architecture are incompatible"); \ + warning (0, "-maix64 and POWER architecture are incompatible"); \ } \ if (TARGET_64BIT && ! TARGET_POWERPC64) \ { \ target_flags |= MASK_POWERPC64; \ - warning ("-maix64 requires PowerPC64 architecture remain enabled"); \ + warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ } \ if (TARGET_POWERPC64 && ! TARGET_64BIT) \ { \ @@ -60,9 +49,9 @@ do { \ } while (0); #undef ASM_SPEC -#define ASM_SPEC "-u %{maix64:-a64 -mppc64} %(asm_cpu)" +#define ASM_SPEC "-u %{maix64:-a64 %{!mcpu*:-mppc64}} %(asm_cpu)" -/* Common ASM definitions used by ASM_SPEC amonst the various targets +/* Common ASM definitions used by ASM_SPEC amongst the various targets for handling -mcpu=xxx switches. */ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ @@ -75,6 +64,8 @@ do { \ %{mcpu=common: -mcom} \ %{mcpu=power: -mpwr} \ %{mcpu=power2: -mpwr2} \ +%{mcpu=power3: -m620} \ +%{mcpu=power4: -m620} \ %{mcpu=powerpc: -mppc} \ %{mcpu=rios: -mpwr} \ %{mcpu=rios1: -mpwr} \ @@ -82,90 +73,57 @@ do { \ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=rs64a: -mppc} \ -%{mcpu=403: -mppc} \ -%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -m603} \ %{mcpu=603e: -m603} \ %{mcpu=604: -m604} \ %{mcpu=604e: -m604} \ -%{mcpu=620: -mppc} \ -%{mcpu=630: -mppc} \ -%{mcpu=821: -mppc} \ -%{mcpu=860: -mppc}" +%{mcpu=620: -m620} \ +%{mcpu=630: -m620} \ +%{mcpu=970: -m620} \ +%{mcpu=G5: -m620}" #undef ASM_DEFAULT_SPEC #define ASM_DEFAULT_SPEC "-mcom" -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_LONG_LONG \ --D_AIX -D_AIX32 -D_AIX41 -D_AIX43 -D_AIX51 -Asystem=unix -Asystem=aix" +#undef TARGET_OS_CPP_BUILTINS +#define TARGET_OS_CPP_BUILTINS() \ + do \ + { \ + builtin_define ("_AIX43"); \ + builtin_define ("_AIX51"); \ + TARGET_OS_AIX_CPP_BUILTINS (); \ + } \ + while (0) #undef CPP_SPEC -#define CPP_SPEC "%{posix: -D_POSIX_SOURCE}\ - %{ansi: -D_ANSI_C_SOURCE}\ - %{!maix64: -D__WCHAR_TYPE__=short\\ unsigned\\ int}\ - %{maix64: -D__64BIT__ -D_ARCH_PPC -D__LONG_MAX__=9223372036854775807L \ - -D__WCHAR_TYPE__=unsigned\\ int}\ - %{mpe: -I/usr/lpp/ppe.poe/include}\ - %{pthread: -D_THREAD_SAFE}\ - %(cpp_cpu)" +#define CPP_SPEC "%{posix: -D_POSIX_SOURCE} \ + %{ansi: -D_ANSI_C_SOURCE} \ + %{maix64: -D__64BIT__} \ + %{mpe: -I/usr/lpp/ppe.poe/include} \ + %{pthread: -D_THREAD_SAFE}" /* The GNU C++ standard library requires that these macros be defined. */ #undef CPLUSPLUS_CPP_SPEC -#define CPLUSPLUS_CPP_SPEC \ - "-D_XOPEN_SOURCE=500 \ - -D_XOPEN_SOURCE_EXTENDED=1 \ - -D_LARGE_FILE_API \ - -D_ALL_SOURCE \ - %{!maix64: -D__WCHAR_TYPE__=short\\ unsigned\\ int}\ - %{maix64: -D__64BIT__ -D_ARCH_PPC -D__LONG_MAX__=9223372036854775807L \ - -D__WCHAR_TYPE__=unsigned\\ int}\ - %{mpe: -I/usr/lpp/ppe.poe/include}\ - %{pthread: -D_THREAD_SAFE}\ - %(cpp_cpu)" - -/* Common CPP definitions used by CPP_SPEC among the various targets - for handling -mcpu=xxx switches. */ -#undef CPP_CPU_SPEC -#define CPP_CPU_SPEC \ -"%{!mcpu*: %{!maix64: \ - %{mpower: %{!mpower2: -D_ARCH_PWR}} \ - %{mpower2: -D_ARCH_PWR2} \ - %{mpowerpc*: -D_ARCH_PPC} \ - %{!mpower*: %{!mpowerpc*: %(cpp_default)}}}} \ -%{mcpu=common: -D_ARCH_COM} \ -%{mcpu=power: -D_ARCH_PWR} \ -%{mcpu=power2: -D_ARCH_PWR2} \ -%{mcpu=powerpc: -D_ARCH_PPC} \ -%{mcpu=rios: -D_ARCH_PWR} \ -%{mcpu=rios1: -D_ARCH_PWR} \ -%{mcpu=rios2: -D_ARCH_PWR2} \ -%{mcpu=rsc: -D_ARCH_PWR} \ -%{mcpu=rsc1: -D_ARCH_PWR} \ -%{mcpu=rs64a: -D_ARCH_PPC} \ -%{mcpu=403: -D_ARCH_PPC} \ -%{mcpu=505: -D_ARCH_PPC} \ -%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ -%{mcpu=602: -D_ARCH_PPC} \ -%{mcpu=603: -D_ARCH_PPC} \ -%{mcpu=603e: -D_ARCH_PPC} \ -%{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC} \ -%{mcpu=630: -D_ARCH_PPC} \ -%{mcpu=821: -D_ARCH_PPC} \ -%{mcpu=860: -D_ARCH_PPC}" - -#undef CPP_DEFAULT_SPEC -#define CPP_DEFAULT_SPEC "-D_ARCH_COM" +#define CPLUSPLUS_CPP_SPEC \ + "-D_ALL_SOURCE \ + %{maix64: -D__64BIT__} \ + %{mpe: -I/usr/lpp/ppe.poe/include} \ + %{pthread: -D_THREAD_SAFE}" #undef TARGET_DEFAULT #define TARGET_DEFAULT MASK_NEW_MNEMONICS #undef PROCESSOR_DEFAULT -#define PROCESSOR_DEFAULT PROCESSOR_PPC604 +#define PROCESSOR_DEFAULT PROCESSOR_PPC604e + +/* AIX does not support Altivec. */ +#undef TARGET_ALTIVEC +#define TARGET_ALTIVEC 0 +#undef TARGET_ALTIVEC_ABI +#define TARGET_ALTIVEC_ABI 0 /* Define this macro as a C expression for the initializer of an array of string to tell the driver program which options are @@ -204,9 +162,6 @@ do { \ #undef PTRDIFF_TYPE #define PTRDIFF_TYPE "long int" -/* __WCHAR_TYPE__ is dynamic, so do not define it statically. */ -#define NO_BUILTIN_WCHAR_TYPE - /* Type used for wchar_t, as a string used in a declaration. */ #undef WCHAR_TYPE #define WCHAR_TYPE (!TARGET_64BIT ? "short unsigned int" : "unsigned int") @@ -214,7 +169,6 @@ do { \ /* Width of wchar_t in bits. */ #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE (!TARGET_64BIT ? 16 : 32) -#define MAX_WCHAR_TYPE_SIZE 32 /* AIX V5 uses PowerPC nop (ori 0,0,0) instruction as call glue for PowerPC and "cror 31,31,31" for POWER architecture. */ @@ -229,3 +183,11 @@ do { \ #undef LD_INIT_SWITCH #define LD_INIT_SWITCH "-binitfini" + +/* This target uses the aix64.opt file. */ +#define TARGET_USES_AIX64_OPT 1 + +/* This target defines SUPPORTS_WEAK and TARGET_ASM_NAMED_SECTION, + but does not have crtbegin/end. */ + +#define TARGET_USE_JCR_SECTION 0