X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=gcc%2Fconfig%2Fscore%2Fscore.opt;fp=gcc%2Fconfig%2Fscore%2Fscore.opt;h=e521f7a1f44b94322b82f1b101a696972af877cb;hb=6fed43773c9b0ce596dca5686f37ac3fc0fa11c0;hp=0000000000000000000000000000000000000000;hpb=27b11d56b743098deb193d510b337ba22dc52e5c;p=msp430-gcc.git diff --git a/gcc/config/score/score.opt b/gcc/config/score/score.opt new file mode 100644 index 00000000..e521f7a1 --- /dev/null +++ b/gcc/config/score/score.opt @@ -0,0 +1,63 @@ +; Options for the Sunnorth port of the compiler. + +; Copyright (C) 2005, 2007 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; . + +meb +Target RejectNegative Report InverseMask(LITTLE_ENDIAN) +Generate big-endian code + +mel +Target RejectNegative Report Mask(LITTLE_ENDIAN) +Generate little-endian code + +mnhwloop +Target RejectNegative Report Mask(NHWLOOP) +Disable bcnz instruction + +muls +Target RejectNegative Report Mask(ULS) +Enable unaligned load/store instruction + +mscore5 +Target RejectNegative Report Mask(SCORE5) +Support SCORE 5 ISA + +mscore5u +Target RejectNegative Report Mask(SCORE5U) +Support SCORE 5U ISA + +mscore7 +Target RejectNegative Report Mask(SCORE7) +Support SCORE 7 ISA + +mscore7d +Target RejectNegative Report Mask(SCORE7D) +Support SCORE 7D ISA + +mscore3 +Target RejectNegative Report Mask(SCORE3) +Support SCORE 3 ISA + +mscore3d +Target RejectNegative Report Mask(SCORE3D) +Support SCORE 3d ISA + +march= +Target RejectNegative Joined +Specify the name of the target architecture