X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=include%2Fmsp430%2Fdma.h;fp=include%2Fmsp430%2Fdma.h;h=d3148d612fe03a34d4e8172aff67baf8f418eefe;hb=6f720ff00773571c2fa2d35e67bff68547617639;hp=718465d4c62bedc2ce69505b71a38752cc699b34;hpb=807b2dd5b7365eb87b482197af3b4a3f520c14f7;p=msp430-libc.git

diff --git a/include/msp430/dma.h b/include/msp430/dma.h
index 718465d..d3148d6 100644
--- a/include/msp430/dma.h
+++ b/include/msp430/dma.h
@@ -9,15 +9,25 @@
  * (c) 2002 by Steve Udnerwood <steveu@coppice.org>
  * Originally based in part on work by Texas Instruments Inc.
  *
- * $Id: dma.h,v 1.7 2007/07/11 17:38:19 coppice Exp $
+ * $Id: dma.h,v 1.8 2008/11/07 08:28:40 sb-sf Exp $
  */
 
-/* Switches: none */
+/* Switches:
+
+__MSP430_HAS_DMAIV__  - if the device has a DMAIV register
+__MSP430_HAS_DMA_3__  - if module has 16-bit address registers
+__MSP430_HAS_DMAX_3__ - if module has 20-bit address registers (430X core)
+
+ */
 
 #define DMACTL0_             0x0122  /* DMA module control 0 */
 sfrw(DMACTL0,DMACTL0_);
 #define DMACTL1_             0x0124  /* DMA module control 1 */
 sfrw(DMACTL1, DMACTL1_);
+#if defined(__MSP430_HAS_DMAIV__)
+#define DMAIV_               0x0126  /* DMA module interrupt vector word */
+sfrw(DMAIV, DMAIV_);
+#endif
 
 #if defined(__MSP430_HAS_DMA_3__)
 #define DMA0CTL_             0x01E0  /* DMA channel 0 control */
@@ -89,16 +99,6 @@ sfrw(DMA2DAL, DMA2DAL_);
 sfrw(DMA2SZ, DMA2SZ_);
 #endif
 
-#define SREF_0              (0<<4)
-#define SREF_1              (1<<4)
-#define SREF_2              (2<<4)
-#define SREF_3              (3<<4)
-#define SREF_4              (4<<4)
-#define SREF_5              (5<<4)
-#define SREF_6              (6<<4)
-#define SREF_7              (7<<4)
-#define EOS                 0x80
-
 #define DMA0TSEL0           0x0001  /* DMA channel 0 transfer select bit 0 */
 #define DMA0TSEL1           0x0002  /* DMA channel 0 transfer select bit 1 */
 #define DMA0TSEL2           0x0004  /* DMA channel 0 transfer select bit 2 */