X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=include%2Fmsp430%2Fgpio.h;h=517e27b351fcadc3622ae8d92eb870fa12ea2229;hb=6f720ff00773571c2fa2d35e67bff68547617639;hp=de7000cdf6532b76a6b2d6423a70f55db5ae22a1;hpb=807b2dd5b7365eb87b482197af3b4a3f520c14f7;p=msp430-libc.git

diff --git a/include/msp430/gpio.h b/include/msp430/gpio.h
index de7000c..517e27b 100644
--- a/include/msp430/gpio.h
+++ b/include/msp430/gpio.h
@@ -7,7 +7,11 @@
  *
  * mspgcc project: MSP430 device headers
  * GPIO module header
- * 
+ *
+ * 2009-06-04 - THLN
+ * - for msp430x47xx
+ *     - __MSP430_HAS_PORT9_R__ and __MSP430_HAS_PORT10_R__ added
+ *
  * 2008-06-04 - TonyB (tony.borries@gmail.com)
  * - for msp430x2618 (and possibly others)
  *     - define __MSP430_HAS_PORT7_R__ and __MSP430_HAS_PORT7_R__
@@ -15,7 +19,7 @@
  * (c) 2002 by M. P. Ashton <data@ieee.org>
  * Originally based in part on work by Texas Instruments Inc.
  *
- * $Id: gpio.h,v 1.7 2008/06/16 23:22:19 cliechti Exp $
+ * $Id: gpio.h,v 1.8 2009/06/04 21:34:29 cliechti Exp $
  */
 
 /* Switches:
@@ -37,13 +41,18 @@ __MSP430_HAS_PORT7__        - if device has port 7
 __MSP430_HAS_PORT7_R__      - if device has port 7 with pull-downs
 __MSP430_HAS_PORT8__        - if device has port 8
 __MSP430_HAS_PORT8_R__      - if device has port 8 with pull-downs
-__MSP430_HAS_PORTA__        - if device has port A (16 bit view of ports 7 & 8)
+__MSP430_HAS_PORTA__        - if device has port A (16 bit view of ports 
+7 & 8)
 __MSP430_HAS_PORT9__        - if device has port 9
+__MSP430_HAS_PORT9_R__      - if device has port 9 with pull-downs
 __MSP430_HAS_PORT10__       - if device has port 10
-__MSP430_HAS_PORTB__        - if device has port B (16 bit view of ports 9 & 10)
+__MSP430_HAS_PORT10_R__      - if device has port 10 with pull-downs
+__MSP430_HAS_PORTB__        - if device has port B (16 bit view of ports 
+9 & 10)
 
 Note: these only make sense if the port itself is present. Also note that
-the port resistor enable registers for ports 3-6 overlap with port 0 registers,
+the port resistor enable registers for ports 3-6 overlap with port 0 
+registers,
 so any device that has these resistors will not have port 0.
 */
 
@@ -254,7 +263,7 @@ sfrb(P8REN, P8REN_);
 sfrb(PAIN, PAIN_);
 #endif
 
-#if defined(__MSP430_HAS_PORT9__)
+#if defined(__MSP430_HAS_PORT9__) ||  defined(__MSP430_HAS_PORT9_R__)
 #define P9IN_               0x0008  /* Port 9 Input */
 sfrb(P9IN, P9IN_);
 #define P9OUT_              0x000A  /* Port 9 Output */
@@ -263,9 +272,15 @@ sfrb(P9OUT, P9OUT_);
 sfrb(P9DIR, P9DIR_);
 #define P9SEL_              0x000E  /* Port 9 Selection */
 sfrb(P9SEL, P9SEL_);
+
+#if defined(__MSP430_HAS_PORT9_R__)
+#define P9REN_              0x0016  /* Port 9 Resistor enable */
+sfrb(P9REN, P9REN_);
+#endif
+
 #endif
 
-#if defined(__MSP430_HAS_PORT10__)
+#if defined(__MSP430_HAS_PORT10__) ||  defined(__MSP430_HAS_PORT10_R__)
 #define P10IN_              0x0009  /* Port 10 Input */
 sfrb(P10IN, P10IN_);
 #define P10OUT_             0x000B  /* Port 10 Output */
@@ -274,6 +289,12 @@ sfrb(P10OUT, P10OUT_);
 sfrb(P10DIR, P10DIR_);
 #define P10SEL_             0x000F  /* Port 10 Selection */
 sfrb(P10SEL, P10SEL_);
+
+#if defined(__MSP430_HAS_PORT10_R__)
+#define P10REN_             0x0017  /* Port 10 Resistor enable */
+sfrb(P10REN, P10REN_);
+#endif
+
 #endif
 
 #if defined(__MSP430_HAS_PORTB__)