X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fatm128%2Fspi%2FAtm128SpiP.nc;h=d457e42a7ce9847e932b08450bc98c315d66dd0d;hb=5a67cf193fbc146446bc503fe07b02412ebb211e;hp=6bec916b6c249e94f4677f514eab6d0d76af8f02;hpb=857a829a9dd7830efbf85b39aae30698c1059adb;p=tinyos-2.x.git

diff --git a/tos/chips/atm128/spi/Atm128SpiP.nc b/tos/chips/atm128/spi/Atm128SpiP.nc
index 6bec916b..d457e42a 100644
--- a/tos/chips/atm128/spi/Atm128SpiP.nc
+++ b/tos/chips/atm128/spi/Atm128SpiP.nc
@@ -76,6 +76,7 @@ module Atm128SpiP @safe() {
   provides {
     interface Init;
     interface SpiByte;
+    interface FastSpiByte;
     interface SpiPacket;
     interface Resource[uint8_t id];
   }
@@ -125,13 +126,42 @@ implementation {
   }
 
   async command uint8_t SpiByte.write( uint8_t tx ) {
-    call Spi.enableSpi(TRUE);
-    call McuPowerState.update();
+    /* no need to enable the SPI bus since that must have been done 
+       when the resource was granted */
+    // call Spi.enableSpi(TRUE);
+    // call McuPowerState.update();
     call Spi.write( tx );
     while ( !( SPSR & 0x80 ) );
     return call Spi.read();
   }
 
+  inline async command void FastSpiByte.splitWrite(uint8_t data) {
+    call Spi.write(data);
+  }
+
+  inline async command uint8_t FastSpiByte.splitRead() {
+    while( !( SPSR & 0x80 ) )
+      ;
+    return call Spi.read();
+  }
+
+  inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) {
+    uint8_t b;
+
+    while( !( SPSR & 0x80 ) )
+	;
+    b = call Spi.read();
+    call Spi.write(data);
+
+    return b;
+  }
+
+  inline async command uint8_t FastSpiByte.write(uint8_t data) {
+    call Spi.write(data);
+    while( !( SPSR & 0x80 ) )
+      ;
+    return call Spi.read();
+  }
 
   /**
    * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE