X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FHplMsp430UsciC.nc;h=05917df9b41d2a5b3fd4ab90151bd6137ef10b27;hb=e9bfab607e051bae6afb47b44892ce37541d1b44;hp=0b358eb8154973794367eeae78e1d29e74c7c186;hpb=76eb4bee32f633c7046716c39fe046f5174aa859;p=tinyos-2.x.git

diff --git a/tos/chips/msp430/usci/HplMsp430UsciC.nc b/tos/chips/msp430/usci/HplMsp430UsciC.nc
index 0b358eb8..05917df9 100644
--- a/tos/chips/msp430/usci/HplMsp430UsciC.nc
+++ b/tos/chips/msp430/usci/HplMsp430UsciC.nc
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * Provides HPL access to both registers and interrupts of all USCI devices on
  * a supported msp430 processor.  The interfaces available are created
@@ -41,19 +41,19 @@
  *
  * 'A' devices offer UART, LIN, IrDA and SPI modes of operation.  'B' devices
  * are limited to SPI and I2C modes.
- * 
+ *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 configuration HplMsp430UsciC {
   provides {
-#if defined(__MSP430_HAS_USCIAB0__) || defined(__MSP430_HAS_USCI__)
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
     interface HplMsp430UsciReg as RegA0;
     interface HplMsp430UsciInt as IntA0;
     interface HplMsp430UsciReg as RegB0;
     interface HplMsp430UsciInt as IntB0;
 #endif
-#if defined(__MSP430_HAS_USCIAB1__)
+#if defined(__MSP430_HAS_USCI_AB1__)
     interface HplMsp430UsciReg as RegA1;
     interface HplMsp430UsciInt as IntA1;
     interface HplMsp430UsciReg as RegB1;
@@ -62,61 +62,38 @@ configuration HplMsp430UsciC {
   }
 }
 implementation {
-#if defined(__MSP430_HAS_USCI__)
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
   components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
     UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
     UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
     UCA0RXIFG, UCA0TXIFG) as RegA0P;
-  RegA0 = RegA0P.Reg;
-
-  components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
-    0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
-    0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
-    UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
-  RegB0 = RegB0P.Reg;
-
-  components new HplMsp430UsciIntP(USCIRX_VECTOR, USCITX_VECTOR, UCA0RXIFG,
-    UCA0TXIFG, UCB0RXIFG, UCB0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_,
-    UCB0CTL0_, UCB0CTL1_, UCB0RXBUF_, IFG2_) as Int0P;
-  IntA0 = Int0P.IntA;
-  IntB0 = Int0P.IntB;
-#elif defined(__MSP430_HAS_USCIAB0__)
-  components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
-    UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
-    UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
-    UCA0RXIFG, UCA0TXIFG)
-    as RegA0P;
-  RegA0 = RegA0P.Reg;
+  RegA0 = RegA0P.Registers;
 
   components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
     0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
     0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
     UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
-  RegB0 = RegB0P.Reg;
+  RegB0 = RegB0P.Registers;
 
-  components new HplMsp430UsciIntP(USCIAB0RX_VECTOR, USCIAB0TX_VECTOR,
-    UCA0RXIFG, UCA0TXIFG, UCB0RXIFG, UCB0TXIFG, UCA0CTL0_, UCA0CTL1_,
-    UCA0RXBUF_, UCB0CTL0_, UCB0CTL1_, UCB0RXBUF_, IFG2_) as Int0P;
+  components HplMsp430UsciInt0P as Int0P;
   IntA0 = Int0P.IntA;
   IntB0 = Int0P.IntB;
 #endif
 
-#if defined(__MSP430_HAS_USCIAB1__)
+#if defined(__MSP430_HAS_USCI_AB1__)
   components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
     UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
-    UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, IE2_, IFG2_,
-    UCA1RXIFG, UCA1TXIFG) as RegA1P;
-  RegA1 = RegA1P.Reg;
+    UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, UC1IE_,
+    UC1IFG_, UCA1RXIFG, UCA1TXIFG) as RegA1P;
+  RegA1 = RegA1P.Registers;
 
   components new HplMsp430UsciRegP(UCB1CTL0_, UCB1CTL1_, UCB1BR0_, UCB1BR1_,
     0/*UCB1MCTL_*/, UCB1I2CIE_, UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_,
     0/*UCB1ABCTL_*/, 0/*UCB1IRTCTL_*/, 0/*UCB1IRRCTL_*/, UCB1I2COA_,
-    UCB1I2CSA_, IE2_, IFG2_, UCB1RXIFG, UCB1TXIFG) as RegB1P;
-  RegB1 = RegB1P.Reg;
+    UCB1I2CSA_, UC1IE_, UC1IFG_, UCB1RXIFG, UCB1TXIFG) as RegB1P;
+  RegB1 = RegB1P.Registers;
 
-  components new HplMsp430UsciIntP(USCIAB1RX_VECTOR, USCIAB1TX_VECTOR,
-    UCA1RXIFG, UCA1TXIFG, UCB1RXIFG, UCB1TXIFG, UCA1CTL0_, UCA1CTL1_,
-    UCA1RXBUF_, UCB1CTL0_, UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as Int1P;
+  components HplMsp430UsciInt1P as Int1P;
   IntA1 = Int1P.IntA;
   IntB1 = Int1P.IntB;
 #endif