X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FHplMsp430UsciRegP.nc;h=32f3de12af105417770420d077ecb9dd1c0ffc95;hb=a4c683fb39c46c4a0382866e7ca1ab65a524fcf4;hp=d67123ceb6accf512e4a74b558e9b55630b87e70;hpb=76eb4bee32f633c7046716c39fe046f5174aa859;p=tinyos-2.x.git

diff --git a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
index d67123ce..32f3de12 100644
--- a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
+++ b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
@@ -26,38 +26,39 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * HPL register interface to USCI peripherals.  The interface abstracts the
  * differences between pysical devices (aka addresses) such that a user of
  * the interface can equally use any USCI device, providing the device
  * provides the necessary capabilities.  For example, I2C is only available
  * on USCI_Bx ports.
- * 
+ *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
-#include "msp430usci.h"
+
+#include "Msp430Usci.h"
+#include "msp430hardware.h"
 
 generic module HplMsp430UsciRegP(
-    uint8_t Ctl0_addr,
-    uint8_t Ctl1_addr,
-    uint8_t Br0_addr,
-    uint8_t Br1_addr,
-    uint8_t Mctl_addr,		/* A devices only */
-    uint8_t I2Cie_addr,		/* B devices only */
-    uint8_t Stat_addr,
-    uint8_t Rxbuf_addr,
-    uint8_t Txbuf_addr,
-    uint8_t Abctl_addr,		/* A devices only */
-    uint8_t Irtctl_addr,	/* A devices only */
-    uint8_t Irrctl_addr,	/* A devices only */
-    uint8_t I2Coa_addr,		/* B devices only */
-    uint8_t I2Csa_addr,		/* B devices only */
-    uint8_t Ie_addr,
-    uint8_t Ifg_addr,
-    uint8_t UCAxRXIFG,	/* We rely on xIE and xIFG at same bit positions */
-    uint8_t UCAxTXIFG,
+    uint16_t Ctl0_addr,
+    uint16_t Ctl1_addr,
+    uint16_t Br0_addr,
+    uint16_t Br1_addr,
+    uint16_t Mctl_addr,		/* A devices only */
+    uint16_t I2Cie_addr,	/* B devices only */
+    uint16_t Stat_addr,
+    uint16_t Rxbuf_addr,
+    uint16_t Txbuf_addr,
+    uint16_t Abctl_addr,	/* A devices only */
+    uint16_t Irtctl_addr,	/* A devices only */
+    uint16_t Irrctl_addr,	/* A devices only */
+    uint16_t I2Coa_addr,	/* B devices only */
+    uint16_t I2Csa_addr,	/* B devices only */
+    uint16_t Ie_addr,
+    uint16_t Ifg_addr,
+    uint16_t UCxxRXIFG,	/* We rely on xIE and xIFG at same bit positions */
+    uint16_t UCxxTXIFG
     ) @safe() {
   provides interface HplMsp430UsciReg as Registers;
 }
@@ -84,57 +85,72 @@ implementation
   #define UCxxIe (*TCAST(volatile uint8_t* ONE, Ie_addr))
   #define UCxxIfg (*TCAST(volatile uint8_t* ONE, Ifg_addr))
 
+#if 0
   #define ASSIGNBITS(reg, mask, value) \
 		(reg = ((reg) & ~(mask)) | ((value) & (mask)))
+#endif
 
   #define RENDER(name) \
-	command uint8_t Registers.get##name(uint8_t mask) { \
+	async command volatile uint8_t* Registers.ptr##name() { \
+		return &UCxx##name; \
+	} \
+	async command uint8_t Registers.get##name(uint8_t mask) { \
 		return READ_FLAG(UCxx##name, mask); \
 	} \
-	command void Registers.set##name(uint8_t mask) { \
-		return SET_FLAG(UCxx##name, mask); \
+	async command void Registers.set##name(uint8_t mask) { \
+		SET_FLAG(UCxx##name, mask); \
 	} \
-	command void Registers.clr##name(uint8_t mask) { \
-		return CLR_FLAG(UCxx##name, mask); \
+	async command void Registers.clr##name(uint8_t mask) { \
+		CLR_FLAG(UCxx##name, mask); \
 	} \
-	command void Registers.assign##name(uint8_t mask, uint8_t value) { \
-		return ASSIGNBITS(UCxx##name, mask, value); \
+	async command void Registers.assign##name(uint8_t value) { \
+		UCxx##name = value; \
 	}
 
   #define RENDER_A(name) \
-	command uint8_t Registers.get##name(uint8_t mask) { \
+	async command volatile uint8_t* Registers.ptr##name() { \
+		return &UCAx##name; \
+	} \
+	async command uint8_t Registers.get##name(uint8_t mask) { \
 		if (IS_USCI_Ax) \
 			return READ_FLAG(UCAx##name, mask); \
+		else \
+			return 0; \
 	} \
-	command void Registers.set##name(uint8_t mask) { \
+	async command void Registers.set##name(uint8_t mask) { \
 		if (IS_USCI_Ax) \
-			return SET_FLAG(UCAx##name, mask); \
+			SET_FLAG(UCAx##name, mask); \
 	} \
-	command void Registers.clr##name(uint8_t mask) { \
+	async command void Registers.clr##name(uint8_t mask) { \
 		if (IS_USCI_Ax) \
-			return CLR_FLAG(UCAx##name, mask); \
+			CLR_FLAG(UCAx##name, mask); \
 	} \
-	command void Registers.assign##name(uint8_t mask, uint8_t value) { \
+	async command void Registers.assign##name(uint8_t value) { \
 		if (IS_USCI_Ax) \
-			return ASSIGNBITS(UCAx##name, mask, value); \
+			UCAx##name = value; \
 	}
 
   #define RENDER_B(name) \
-	command uint8_t Registers.get##name(uint8_t mask) { \
+	async command volatile uint8_t* Registers.ptr##name() { \
+		return &UCBx##name; \
+	} \
+	async command uint8_t Registers.get##name(uint8_t mask) { \
 		if (IS_USCI_Bx) \
 			return READ_FLAG(UCBx##name, mask); \
+		else \
+			return 0; \
 	} \
-	command void Registers.set##name(uint8_t mask) { \
+	async command void Registers.set##name(uint8_t mask) { \
 		if (IS_USCI_Bx) \
-			return SET_FLAG(UCBx##name, mask); \
+			SET_FLAG(UCBx##name, mask); \
 	} \
-	command void Registers.clr##name(uint8_t mask) { \
+	async command void Registers.clr##name(uint8_t mask) { \
 		if (IS_USCI_Bx) \
-			return CLR_FLAG(UCBx##name, mask); \
+			CLR_FLAG(UCBx##name, mask); \
 	} \
-	command void Registers.assign##name(uint8_t mask, uint8_t value) { \
+	async command void Registers.assign##name(uint8_t value) { \
 		if (IS_USCI_Bx) \
-			return ASSIGNBITS(UCBx##name, mask, value); \
+			UCBx##name = value; \
 	}
 
 #if 0
@@ -157,25 +173,29 @@ implementation
   MSP430REG_NORACE(UCxIfg);
 #endif
 
-  command msp430usci_mode_t Registers.getMode()
+  async command msp430_usci_mode_t Registers.getMode()
   {
     if (READ_FLAG(UCxxCtl0, UCSYNC)) {
-      if (READ_FLAG(UCxxCtl0 == UCMODE_3))
-	return UCSYNC_I2C;
+      if (READ_FLAG(UCxxCtl0, UCMODE_3) == UCMODE_3)
+	return USCI_I2C;
       else
-	return UCSYNC_SPI;
+	return USCI_SPI;
     } else {
-      return UCSYNC_UART;
+      return USCI_UART;
     }
   }
 
-  command bool Registers.setMode(msp430_usci_mode_t mode)
+  /* Doesn't really set the mode, but checks the mode for the device and inits
+   * the device.
+   */
+  async command bool Registers.setMode(msp430_usci_mode_t mode)
   {
-    if (mode == UCSYNC_UART && IS_USCI_Bx)
+    if (mode == USCI_UART && IS_USCI_Bx)
       return FALSE;
-    if (mode == UCI2C && IS_USCI_Ax)
+    if (mode == USCI_I2C && IS_USCI_Ax)
       return FALSE;
-    SET_FLAG(UCxxCtl0, UCSYNC)
+    SET_FLAG(UCxxCtl1, UCSWRST);
+    return TRUE;
   }
 
   RENDER(Ctl0);
@@ -187,98 +207,117 @@ implementation
   RENDER(Stat);
 
   /* RENDER(Rxbuf); */
-  command uint8_t* Registers.ptrRxbuf()
+  async command volatile uint8_t* Registers.ptrRxbuf()
   {
-    return UCxxRXBuf;
+    return &UCxxRxbuf;
   }
 
-  command uint8_t Registers.getRxbuf()
+  async command uint8_t Registers.getRxbuf()
   {
-    return UCxxRXBuf;
+    return UCxxRxbuf;
   }
 
   /* RENDER(Txbuf); */
-  command uint8_t* Registers.ptrTxbuf()
+  async command volatile uint8_t* Registers.ptrTxbuf()
   {
-    return UCxxTXBuf;
+    return &UCxxTxbuf;
   }
 
-  command uint8_t Registers.getTxbuf()
+  async command uint8_t Registers.getTxbuf()
   {
-    return UCxxTXBuf;
+    return UCxxTxbuf;
   }
 
-  command void Registers.setTxbuf(uint8_t byte)
+  async command void Registers.setTxbuf(uint8_t byte)
   {
-    UCxxTXBuf = byte;
+    UCxxTxbuf = byte;
   }
 
   RENDER_A(Abctl);
   RENDER_A(Irtctl);
   RENDER_A(Irrctl);
-  RENDER_B(I2Coa);
-  RENDER_B(I2Csa);
 
-  /* RENDER(Ie); */
-  command bool getIeRx()
+  /* RENDER_B(I2Coa); */
+  async command volatile uint8_t* Registers.ptrI2Coa()
   {
-    return READ_FLAG(UCxxIe, UCAxRXIFG);
+    return &UCBxI2Coa;
   }
 
-  command void setIeRx()
+  async command uint16_t Registers.readI2Coa()
   {
-    return SET_FLAG(UCxxIe, UCAxRXIFG);
+    return UCBxI2Coa;
   }
 
-  command void clrIeRx()
+  async command void Registers.assignI2Coa(uint16_t addr)
   {
-    return CLR_FLAG(UCxxIe, UCAxRXIFG);
+    UCBxI2Coa = addr;
   }
 
-  command bool getIeTx()
+  /* RENDER_B(I2Csa); */
+  async command volatile uint8_t* Registers.ptrI2Csa()
   {
-    return READ_FLAG(UCxxIe, UCAxTXIFG);
+    return &UCBxI2Csa;
   }
 
-  command void setIeTx()
+  async command uint16_t Registers.readI2Csa()
   {
-    return SET_FLAG(UCxxIe, UCAxTXIFG);
+    return UCBxI2Csa;
   }
 
-  command void clrIeTx()
+  async command void Registers.assignI2Csa(uint16_t addr)
   {
-    return CLR_FLAG(UCxxIe, UCAxTXIFG);
+    UCBxI2Csa = addr;
   }
 
-  /* RENDER(Ifg); */
-  command bool getIeRx()
+  /* RENDER(Ie); */
+  async command bool Registers.getIeRx()
   {
-    return READ_FLAG(UCxxIfg, UCAxRXIFG);
+    return READ_FLAG(UCxxIe, UCxxRXIFG);
   }
 
-  command void setIfgRx()
+  async command void Registers.setIeRx()
   {
-    return SET_FLAG(UCxxIfg, UCAxRXIFG);
+    SET_FLAG(UCxxIe, UCxxRXIFG);
   }
 
-  command void clrIfgRx()
+  async command void Registers.clrIeRx()
   {
-    return CLR_FLAG(UCxxIfg, UCAxRXIFG);
+    CLR_FLAG(UCxxIe, UCxxRXIFG);
   }
 
-  command bool getIfgTx()
+  async command bool Registers.getIeTx()
   {
-    return READ_FLAG(UCxxIfg, UCAxTXIFG);
+    return READ_FLAG(UCxxIe, UCxxTXIFG);
   }
 
-  command void setIfgTx()
+  async command void Registers.setIeTx()
   {
-    return SET_FLAG(UCxxIfg, UCAxTXIFG);
+    SET_FLAG(UCxxIe, UCxxTXIFG);
   }
 
-  command void clrIfgTx()
+  async command void Registers.clrIeTx()
   {
-    return CLR_FLAG(UCxxIfg, UCAxTXIFG);
+    CLR_FLAG(UCxxIe, UCxxTXIFG);
   }
 
+  /* RENDER(Ifg); */
+  async command bool Registers.getIfgRx()
+  {
+    return READ_FLAG(UCxxIfg, UCxxRXIFG);
+  }
+
+  async command void Registers.clrIfgRx()
+  {
+    CLR_FLAG(UCxxIfg, UCxxRXIFG);
+  }
+
+  async command bool Registers.getIfgTx()
+  {
+    return READ_FLAG(UCxxIfg, UCxxTXIFG);
+  }
+
+  async command void Registers.clrIfgTx()
+  {
+    CLR_FLAG(UCxxIfg, UCxxTXIFG);
+  }
 }