X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430SpiB1C.nc;h=981b4e40848374d6f81f746b7ada59c0af4b0b12;hb=be862ab07d080085823951d18dcb27a28a310ace;hp=0e20f519a01ffd76310c6620b380e9108a451ff4;hpb=9b58ecb229fe2466638908e2e3c28f66f0439116;p=tinyos-2.x.git

diff --git a/tos/chips/msp430/usci/Msp430SpiB1C.nc b/tos/chips/msp430/usci/Msp430SpiB1C.nc
index 0e20f519..981b4e40 100644
--- a/tos/chips/msp430/usci/Msp430SpiB1C.nc
+++ b/tos/chips/msp430/usci/Msp430SpiB1C.nc
@@ -10,7 +10,7 @@
  * - Redistributions in binary form must reproduce the above copyright
  *   notice, this list of conditions and the following disclaimer in the
  *   documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
+ * - Neither the name of the Titanium Mirror, Inc. nor the names
  *   of its contributors may be used to endorse or promote products derived
  *   from this software without specific prior written permission.
  *
@@ -26,21 +26,38 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * This configuration provides the interface for using USCI_B1 in its SPI
  * mode.
  *
- * @author R. Steve McKown <smckown@gmail.com>
+ * The instantiator should set the blockSize, which represents the maximum
+ * number of bytes the underlying SPI stack will transmit or receive in a
+ * single interrupt service.  Increasing the block size decreases SPI
+ * communications time at the expense of reducing system responsiveness to
+ * other events.
+ *
+ * The blockSize is best set by considering the maximum time the SPI stack
+ * should be able to delay other events.  A rule of thumb formula would be:
+ *
+ * block_time = block_size / (spi_bitclock/8)
+ *
+ * For example, using a 500KHZ SPI bitclock, a block size of 64 bytes
+ * equates to a block time of 1 ms.  Note that this calculation is rough
+ * because it does not take into account ISR overhead and other factors.
+ *
+ * The implementation will use a default blockSize if set to 0 here.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 #if !defined(__MSP430_HAS_USCI_AB1__)
 #error "Target does not have a USCI_B1 peripheral (SPI)"
 #endif
 
 #include "Msp430Usci.h"
 
-configuration Msp430SpiB1C {
+generic configuration Msp430SpiB1C(uint16_t blockSize) {
   provides {
     interface Resource;
     interface ResourceRequested;
@@ -48,19 +65,23 @@ configuration Msp430SpiB1C {
     interface SpiPacket;
     interface ArbiterInfo; /* ??? */
   }
-  uses interface Msp430UsciSpiConfigure; /* would be nice to use Msp430SpiConfigure, same as USART analog */
+  uses {
+    interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+    interface GeneralIO as CSn;	/* wire only if a SPI slave only */
+  }
 }
 implementation {
   enum {
     CLIENT_ID = unique(MSP430_USCIB1_RESOURCE)
   };
 
-  components Msp430SpiP as SpiP;
+  components new Msp430SpiP(blockSize) as SpiP;
   SpiByte = SpiP;
   SpiPacket = SpiP;
-  Msp430UsciSpiConfigure = SpiP;
+  Configure = SpiP;
+  CSn = SpiP;
 
-  components new Msp430UsciA0C() as UsciC;
+  components Msp430UsciB1C as UsciC;
   Resource = UsciC.Resource[CLIENT_ID];
   ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
   ArbiterInfo = UsciC.ArbiterInfo;
@@ -73,5 +94,5 @@ implementation {
   SpiP.STE -> IOC.UCB1STE;
   SpiP.SIMO -> IOC.UCB1SIMO;
   SpiP.SOMI -> IOC.UCB1SOMI;
-  SpiP.SCL -> IOC.UCB1SCL;
+  SpiP.CLK -> IOC.UCB1CLK;
 }