X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430SpiP.nc;h=e35d54fa9ccd7d8847aac6b7accb9c705ad52984;hb=b62e80d588af0c73dca0c88224d5117e9df8bcb8;hp=5a23279c4689d8a1e76a625d40f9216c4e03b3dd;hpb=155929808405214eb334b8e41ad69875a1e6576e;p=tinyos-2.x.git diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc index 5a23279c..e35d54fa 100644 --- a/tos/chips/msp430/usci/Msp430SpiP.nc +++ b/tos/chips/msp430/usci/Msp430SpiP.nc @@ -54,38 +54,16 @@ generic module Msp430SpiP(uint16_t blockSize) { } implementation { enum { - BLOCKSIZE_DEFAULT = 64 - }; - - #define saveBits(pin, pos, dir, out, ren) { \ - if (call pin.isOutput()) \ - dir |= (1 << pos); \ - if (call pin.getOut()) \ - out |= (1 << pos); \ - if (call pin.isRen()) \ - ren |= (1 << pos); \ - } + BLOCKSIZE_DEFAULT = 64, - #define restoreBits(pin, pos, dir, out, ren) { \ - if (ren & (1 << pos)) \ - call pin.enableRen(); \ - else \ - call pin.disableRen(); \ - if (out & (1 << pos)) \ - call pin.set(); \ - else \ - call pin.clr(); \ - if (dir & (1 << pos)) \ - call pin.makeOutput(); \ - else \ - call pin.makeInput(); \ - } - - /* Pin IO configuration storage for later restoration */ - uint8_t m_dir; - uint8_t m_out; - uint8_t m_ren; + /* Bit positions in m_pins */ + PINS_STE = 1, + PINS_SOMI, + PINS_SIMO, + PINS_CLK, + }; + uint8_t m_pins; uint8_t* m_txBuf; uint8_t* m_rxBuf; uint16_t m_len; @@ -127,59 +105,24 @@ implementation { else call Registers.clrStat(UCLISTEN); - /* Save pin IO configuration */ - m_dir = m_out = m_ren = 0; - if (is4pin()) - saveBits(STE, 0, m_dir, m_out, m_ren); - saveBits(SIMO, 1, m_dir, m_out, m_ren); - saveBits(SOMI, 2, m_dir, m_out, m_ren); - saveBits(CLK, 3, m_dir, m_out, m_ren); - - /* Configure pins for SPI use */ - if (is4pin()) { -#if 0 /* Unsure if REN on STE is a valid configuration */ - /* Configure STE pin for SPI use */ - if (config->ren & USCI_REN_STE) { - if (config->ren & USCI_REN_STE_PULLUP) - call STE.set(); - else - call STE.clr(); - call STE.enableRen(); - } -#endif + /* Configure pins for SPI, saving prior pin states */ + m_pins = 0; + if (is4pin() && call STE.isIOFunc()) { + m_pins |= (1 << PINS_STE); call STE.selectModuleFunc(); } - call SOMI.makeInput(); - if (config->ren & USCI_REN_SOMI) { - if (config->ren & USCI_REN_SOMI_PULLUP) - call SOMI.set(); - else - call SOMI.clr(); - call SOMI.enableRen(); + if (call SOMI.isIOFunc()) { + m_pins |= (1 << PINS_SOMI); + call SOMI.selectModuleFunc(); } - call SOMI.selectModuleFunc(); -#if 0 /* Unsure if REN on SIMO is a valid configuration */ - /* Configure SIMO pin for SPI use */ - if (config->ren & USCI_REN_SIMO) { - if (config->ren & USCI_REN_SIMO_PULLUP) - call SIMO.set(); - else - call SIMO.clr(); - call SIMO.enableRen(); + if (call SIMO.isIOFunc()) { + m_pins |= (1 << PINS_SIMO); + call SIMO.selectModuleFunc(); } -#endif - call SIMO.selectModuleFunc(); -#if 0 /* Unsure if REN on CLK is a valid configuration */ - /* Configure CLK pin for SPI use */ - if (config->ren & USCI_REN_CLK) { - if (config->ren & USCI_REN_CLK_PULLUP) - call CLK.set(); - else - call CLK.clr(); - call CLK.enableRen(); + if (call CLK.isIOFunc()) { + m_pins |= (1 << PINS_CLK); + call CLK.selectModuleFunc(); } -#endif - call CLK.selectModuleFunc(); /* Clear interrupts; we'll add them as needed */ call Registers.clrIeRx(); @@ -200,19 +143,15 @@ implementation { call Registers.clrIeRx(); call Registers.clrIfgRx(); - /* Restore pins to their preconfigured state */ -#if 0 - if (is4pin()) - restoreBits(STE, 0, m_dir, m_out, m_ren); - restoreBits(SIMO, 1, m_dir, m_out, m_ren); - restoreBits(SOMI, 1, m_dir, m_out, m_ren); - restoreBits(CLK, 1, m_dir, m_out, m_ren); -#endif - if (is4pin()) + /* Restore pins to their pre-configure state */ + if (is4pin() && (m_pins & PINS_STE)) call STE.selectIOFunc(); - call SIMO.selectIOFunc(); - call SOMI.selectIOFunc(); - call CLK.selectIOFunc(); + if (m_pins & PINS_SIMO) + call SIMO.selectIOFunc(); + if (m_pins & PINS_SOMI) + call SOMI.selectIOFunc(); + if (m_pins & PINS_CLK) + call CLK.selectIOFunc(); } }