X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430SpiP.nc;h=ee57284498a5af9aa07129981ca83904113cd7d0;hb=e9bfab607e051bae6afb47b44892ce37541d1b44;hp=142edb7b9f9996a8a15b1ad96a759a2b8b2a8c73;hpb=adf1de6c009d13b7b52e68535c63b28f59c97400;p=tinyos-2.x.git

diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc
index 142edb7b..ee572844 100644
--- a/tos/chips/msp430/usci/Msp430SpiP.nc
+++ b/tos/chips/msp430/usci/Msp430SpiP.nc
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * Spi implementation using a USCI device.  When being used as a SPI slave, the
  * CSn interface should be wired to the chip select driven by the SPI master so
@@ -38,7 +38,7 @@
  *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 generic module Msp430SpiP(uint16_t blockSize) {
   provides {
     interface SpiByte;
@@ -302,7 +302,7 @@ implementation {
 
   default async command const msp430_usci_spi_t* Configure.get()
   {
-    const static msp430_usci_spi_t def = { 
+    const static msp430_usci_spi_t def = {
       ctl0: UCSYNC | UCMODE_0 | UCMST,	/* 3-pin SPI mode 0, LSB first */
       ctl1: UCSWRST | UCSSEL_3,		/* SPI clock source is SMCLK */
       brx: 10,			/* SPI clock=SMCLK/10; ~105KHz if SMCLK=1MHz */