X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430UartP.nc;h=72df1df0c1827f63ef14f7836a5927aaa43b3828;hb=e9bfab607e051bae6afb47b44892ce37541d1b44;hp=550b1623f0fe19e12da7431ef47c66e2d66dc2d6;hpb=9b58ecb229fe2466638908e2e3c28f66f0439116;p=tinyos-2.x.git diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc index 550b1623..72df1df0 100644 --- a/tos/chips/msp430/usci/Msp430UartP.nc +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -26,13 +26,16 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + /** * Uart implementation using a USCI device. * - * @author R. Steve McKown + * TODO: Implement blocking like in Msp430UartSpiP.nc. + * Implement error checking via UCAxSTAT. + * + * @author R. Steve McKown */ - + generic module Msp430UartP() { provides { interface UartStream; @@ -44,224 +47,225 @@ generic module Msp430UartP() { interface HplMsp430UsciInt as Interrupts; interface HplMsp430GeneralIO as RXD; interface HplMsp430GeneralIO as TXD; - interface Msp430UsciConfigure; + interface AsyncConfigure as Configure; interface Counter; interface ArbiterInfo; } } implementation { - #define saveBits(pin, pos, dir, out, ren) { \ - if (call pin.isOutput()) \ - dir |= (1 << pos); \ - if (call pin.getOut()) \ - out |= (1 << pos); \ - if (call pin.isRen()) \ - ren |= (1 << pos); \ - } + enum { + /* Bit positions in m_pins */ + PINS_RXD = 1, + PINS_TXD + }; - #define restoreBits(pin, pos, dir, out, ren) { \ - if (ren & (1 << pos)) \ - call pin.enableRen(); \ - else \ - call pin.disableRen(); \ - if (out & (1 << pos)) \ - call pin.set(); \ - else \ - call pin.clr(); \ - if (dir & (1 << pos)) \ - call pin.makeOutput(); \ - else \ - call pin.makeInput(); \ - } + uint8_t m_pins; + uint8_t* m_sobuf; /* Original buffer ptr from UartStream.send() */ + uint16_t m_solen; /* Original buffer len from UartStream.send() */ + uint8_t* m_sbuf; /* Position of next char to send */ + uint16_t m_slen; /* Len of chars in m_sbuf to send */ + bool m_rxie; /* Set if rxie has been enabled to UartStream.receive() */ + uint8_t* m_robuf; /* Original receive buffer */ + uint16_t m_rolen; /* Original (maximum) receive len */ + uint8_t* m_rbuf; /* Position of next byte in which to receive a char */ + uint16_t m_rlen; /* Remaining length in receive buffer */ - uint8_t dir; /* Pin state storage to allow for proper unconfiguration */ - uint8_t out; - uint8_t ren; - uint8_t* sobuf; /* Original buffer ptr from UartStream.send() */ - uint8_t solen; /* Original buffer len from UartStream.send() */ - uint8_t* sbuf; /* Position of next char to send */ - uint8_t slen; /* Len of chars in sbuf to send */ - bool rxie; /* Set if rxie has been enabled to UartStream.receive() */ - uint8_t* robuf; /* Original receive buffer */ - uint8_t rolen; /* Original (maximum) receive len */ - uint8_t* rbuf; /* Position of next byte in which to receive a char */ - uint8_t rlen; /* Remaining length in receive buffer */ + sfrb(MYBRX, 219U); async command void ResourceConfigure.configure() { - msp430_usci_config_t* config = call Msp430UsciConfigure.get(); + atomic { + const msp430_usci_uart_t* config = call Configure.get(); - call Registers.setCtl0(UCSYNC); - /* Save pin states */ - dir = out = ren = 0; - saveBits(RXD, 0, dir, out, ren); - saveBits(TXD, 1, dir, out, ren); + call Registers.setCtl1(UCSWRST); - /* Configure USCI registers */ - call Registers.assignCtl0(0xff, config->uart.ctl0); - call Registers.assignCtl1(0xff, config->uart.ctl1|UCSWRST); - call Registers.assignBr0(0xff, config->uart.brx & 0xff); - call Registers.assignBr1(0xff, config->uart.brx >> 8); - call Registers.assignMctl(0xff, config->uart.mctl); - call Registers.assignIrtctl(0xff, config->uart.irtctl); - call Registers.assignIrrctl(0xff, config->uart.irrctl); - call Registers.assignAbctl(0xff, config->uart.abctl); - /* FIXME: we may need to have REN/DIR stuff in the configuration... */ + /* Configure USCI registers */ + call Registers.assignCtl0(config->ctl0 & ~UCSYNC); + call Registers.assignCtl1(config->ctl1 | UCSWRST); + call Registers.assignBr0(config->brx & 0xff); + call Registers.assignBr1(config->brx >> 8); + call Registers.assignMctl(config->mctl); + call Registers.assignIrtctl(config->irtctl); + call Registers.assignIrrctl(config->irrctl); + call Registers.assignAbctl(config->abctl); + if (config->uclisten) + call Registers.setStat(UCLISTEN); + else + call Registers.clrStat(UCLISTEN); - /* Configure pins for module function */ - call RXD.selectModuleFunc(); - call TXD.selectModuleFunc(); + /* Configure pins for UART, saving prior pin states */ + m_pins = 0; + if (call RXD.isIOFunc()) { + m_pins |= (1 << PINS_RXD); + call RXD.selectModuleFunc(); + } + if (call TXD.isIOFunc()) { + m_pins |= (1 << PINS_TXD); + call TXD.selectModuleFunc(); + } - /* Clear interrupts; we'll add them as needed */ - call Registers.clrCtl1(UCRXEIE|UCBRKIE); - call Registers.clrIeRx(); - call Registers.clrIeTx(); + /* Clear interrupts; we'll add them as needed */ + call Registers.clrIeRx(); + call Registers.clrIeTx(); - /* Enable the device */ - call Registers.clrCtl0(UCSYNC); + /* Enable the device */ + call Registers.clrCtl1(UCSWRST); + } } async command void ResourceConfigure.unconfigure() { - /* Disable the device */ - call Registers.setCtl0(UCSYNC); + atomic { + /* Disable the device */ + call Registers.setCtl1(UCSWRST); - /* Clear interrupts and interrupt flags */ - call Registers.clrIeRx(); - call Registers.clrIeTx(); - call Registers.clrIfgRx(); - call Registers.clrIfgTx(); + /* Clear interrupts and interrupt flags */ + call Registers.clrIeRx(); + call Registers.clrIeTx(); + call Registers.clrIfgRx(); - /* Restore pins to their preconfigured state */ - restoreBits(RXD, 0, dir, out, ren); - restoreBits(TXD, 0, dir, out, ren); - call RXD.selectIOFunc(); - call TXD.selectIOFunc(); + /* Restore pins to their pre-configure state */ + if (m_pins & PINS_RXD) + call RXD.selectIOFunc(); + if (m_pins & PINS_TXD) + call TXD.selectIOFunc(); + } } async command error_t UartByte.send(uint8_t byte) { - /* FIXME: race with UartStream.send() */ - if (sobuf) - return FAIL; - call Registers.setTxbuf(byte); - return SUCCESS; + atomic { + while (!call Registers.getIfgTx()); + call Registers.setTxbuf(byte); + return SUCCESS; + } } async command error_t UartStream.send(uint8_t* buf, uint16_t len) { - if (sobuf || !buf || !len) - return FAIL; - sobuf = buf; - solen = len; - call Registers.setIeTx(); - call Registers.setTxbuf(*sobuf); - slen = solen - 1; - if (slen) - sbuf = sobuf + 1; - return SUCCESS; + atomic { + if (m_sobuf || !buf || !len) + return FAIL; + m_sbuf = m_sobuf = buf; + m_slen = m_solen = len; + call Registers.setIeTx(); + return SUCCESS; + } } async event void Interrupts.tx() { - while (slen && call Registers.getIfgTx()) { - call Registers.setTxbuf(*sbuf); - if (--slen) - sbuf++; + /* FIXME: this can cause an arbitrarily long ISR, if m_slen is large. + * But depending on timing, we may always only write 1 byte. + */ + while (!call Registers.getIfgTx()); /* in case interleaved UB.send */ + while (m_slen && call Registers.getIfgTx()) { + call Registers.setTxbuf(*m_sbuf); + if (--m_slen) + m_sbuf++; } - if (slen == 0 && sobuf) { + if (m_slen == 0) { call Registers.clrIeTx(); - call Registers.clrIfgTx(); - sobuf = 0; - signal UartStream.sendDone(sobuf, solen, SUCCESS); + m_sobuf = 0; + signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS); } } async command error_t UartStream.enableReceiveInterrupt() { - if (!robuf) - call Registers.clrIfgRx(); - call Registers.setIeRx(); - rxie = FALSE; - return SUCCESS; + atomic { + if (!m_robuf) + call Registers.clrIfgRx(); + call Registers.setIeRx(); + m_rxie = FALSE; + return SUCCESS; + } } async command error_t UartStream.disableReceiveInterrupt() { - if (!robuf) { - call Registers.clrIeRx(); - call Registers.clrIfgRx(); - } else - rxie = TRUE; - return SUCCESS; + atomic { + if (!m_robuf) { + call Registers.clrIeRx(); + call Registers.clrIfgRx(); + } else + m_rxie = TRUE; + return SUCCESS; + } } async command error_t UartByte.receive(uint8_t* byte, uint8_t timeout) { - uint16_t t; + atomic { + uint16_t t; - /* FIXME: race with UartStream.receive() */ - if (robuf || !byte) - return FAIL; - /* TODO: implement timeout, byte-time units. For now, 1-2 sec */ - t = TBR; - while (t < TBR) { - if (call Registers.getIfgRx()) { - *byte = call Registers.getRxbuf(); - return SUCCESS; + /* FIXME: race with UartStream.receive() */ + if (m_robuf || !byte) + return FAIL; + /* TODO: implement timeout, byte-time units. For now, 1-2 sec */ + t = TBR; + while (t < TBR) { + if (call Registers.getIfgRx()) { + *byte = call Registers.getRxbuf(); + return SUCCESS; + } } + return FAIL; } - return FAIL; } async command error_t UartStream.receive(uint8_t* buf, uint16_t len) { - if (robuf || !buf || !len) - return FAIL; - robuf = rbuf = buf; - rolen = rlen = len; - if (!call Registers.getIeRx()) { - call Registers.clrIfgRx(); - call Registers.setIeRx(); - rxie = TRUE; - } else - rxie = FALSE; + atomic { + if (m_robuf || !buf || !len) + return FAIL; + m_robuf = m_rbuf = buf; + m_rolen = m_rlen = len; + if (!call Registers.getIeRx()) { + call Registers.clrIfgRx(); + call Registers.setIeRx(); + m_rxie = TRUE; + } else + m_rxie = FALSE; + } } async event void Interrupts.rx(uint8_t byte) { - if (robuf) { + if (m_robuf) { /* receive() takes precedence if active */ - while (rlen && call Registers.getIfgRx()) { - *rbuf = byte; - if (--rlen) - rbuf++; + /* FIXME: an arbitrarily long ISR may occur if m_rlen is large. + * But depending on timing, we may always only read 1 byte. + */ + while (m_rlen && call Registers.getIfgRx()) { + *m_rbuf = byte; + if (--m_rlen) + m_rbuf++; } - if (rlen == 0 && robuf) { - if (rxie) { + if (m_rlen == 0 && m_robuf) { + if (m_rxie) { call Registers.clrIeRx(); call Registers.clrIfgRx(); } - robuf = 0; - signal UartStream.receiveDone(robuf, rolen, SUCCESS); + m_robuf = 0; + signal UartStream.receiveDone(m_robuf, m_rolen, SUCCESS); } } else signal UartStream.receivedByte(byte); } - default async command msp430_usci_config_t* Msp430UsciConfigure.get() + default async command const msp430_usci_uart_t* Configure.get() { - static msp430_usci_config_t def = { - uart: { - ctl0: UCMODE_0, /* async, lsb first, 8N1 */ - ctl1: UCSWRST|UCSSEL_3, /* clock uart from SMCLK */ - brx: UBRX_1MHZ_9600, - mctl: UMCTL_1MHZ_9600, - irtctl: 0, - irrctl: 0, - abctl: 0 - /* FIXME: pullup/pulldown configuration... */ - } + const static msp430_usci_uart_t def = { + ctl0: UCMODE_0, /* async, lsb first, 8N1 */ + ctl1: UCSWRST | UCSSEL_3, /* clock uart from SMCLK */ + brx: UBRX_1MHZ_115200, + mctl: UMCTL_1MHZ_115200, + irtctl: 0, + irrctl: 0, + abctl: 0, + uclisten: FALSE, + ren: USCI_REN_NONE }; return &def; @@ -273,4 +277,10 @@ implementation { async event void Interrupts.brk() {} async event void Interrupts.i2cNak() {} async event void Counter.overflow() {} + + default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, + error_t error ) {} + default async event void UartStream.receivedByte( uint8_t byte ) {} + default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, + error_t error ) {} }