X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430UartP.nc;h=72df1df0c1827f63ef14f7836a5927aaa43b3828;hb=e9bfab607e051bae6afb47b44892ce37541d1b44;hp=a4bec07698e521599d379e4c4634fb885e8d296a;hpb=adf1de6c009d13b7b52e68535c63b28f59c97400;p=tinyos-2.x.git diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc index a4bec076..72df1df0 100644 --- a/tos/chips/msp430/usci/Msp430UartP.nc +++ b/tos/chips/msp430/usci/Msp430UartP.nc @@ -26,7 +26,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + /** * Uart implementation using a USCI device. * @@ -35,7 +35,7 @@ * * @author R. Steve McKown */ - + generic module Msp430UartP() { provides { interface UartStream; @@ -256,7 +256,7 @@ implementation { default async command const msp430_usci_uart_t* Configure.get() { - const static msp430_usci_uart_t def = { + const static msp430_usci_uart_t def = { ctl0: UCMODE_0, /* async, lsb first, 8N1 */ ctl1: UCSWRST | UCSSEL_3, /* clock uart from SMCLK */ brx: UBRX_1MHZ_115200,