X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430Usci.h;h=31ba96ae37ece6023b3c55bd7208a5d9077d5904;hb=7c7bb5adbe3800637b9cea2aa6b3ff23c67c9337;hp=98c916d04749bc8e260efe6c19d4b7842c80d295;hpb=97db9cf16631f784eea3fc7a3ec925f09bc65c08;p=tinyos-2.x.git

diff --git a/tos/chips/msp430/usci/Msp430Usci.h b/tos/chips/msp430/usci/Msp430Usci.h
index 98c916d0..31ba96ae 100644
--- a/tos/chips/msp430/usci/Msp430Usci.h
+++ b/tos/chips/msp430/usci/Msp430Usci.h
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * Header definitions for the USCI peripheral in newer msp430 processors.
  * A USCI peripheral provides two communications devices, denoted A and B.
@@ -38,10 +38,10 @@
  *
  * A devices offer UART, LIN, IrDA and SPI modes of operation.  B parts are
  * limited to SPI and I2C modes.
- * 
- * @author R. Steve McKown <smckown@gmail.com>
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 #ifndef MSP430_USCI_h
 #define MSP430_USCI_h
 
@@ -101,8 +101,9 @@ typedef enum {
   UBRX_1MHZ_19200=54, UMCTL_1MHZ_19200=(0 << 4) + (5 << 1) + 0,
   UBRX_1MHZ_38400=27, UMCTL_1MHZ_38400=(0 << 4) + (2 << 1) + 0,
   UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0,
-  UBRX_1E6MHZ_9600=104, UMCTL_1E6MHZ_9600=(0 << 4) + (1 << 1) + 0,
-  UBRX_1E6MHZ_115200=8, UMCTL_1E6MHZ_115200=(0 << 4) + (6 << 1) + 0,
+  UBRX_1E6HZ_9600=104, UMCTL_1E6HZ_9600=(0 << 4) + (1 << 1) + 0,
+  UBRX_1E6HZ_19200=52, UMCTL_1E6HZ_19200=(0 << 4) + (0 << 1) + 0,
+  UBRX_1E6HZ_115200=8, UMCTL_1E6HZ_115200=(0 << 4) + (6 << 1) + 0,
 } msp430_usci_uart_rate_t;
 
 typedef struct {