X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430Usci.h;h=575889d1bd5b85ebd9ad7a48d370ed40b3d90444;hb=a4c683fb39c46c4a0382866e7ca1ab65a524fcf4;hp=4d0a2cd713cf5f8db76ed56986d2e0c2b6a0fb9a;hpb=9b58ecb229fe2466638908e2e3c28f66f0439116;p=tinyos-2.x.git diff --git a/tos/chips/msp430/usci/Msp430Usci.h b/tos/chips/msp430/usci/Msp430Usci.h index 4d0a2cd7..575889d1 100644 --- a/tos/chips/msp430/usci/Msp430Usci.h +++ b/tos/chips/msp430/usci/Msp430Usci.h @@ -26,7 +26,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + /** * Header definitions for the USCI peripheral in newer msp430 processors. * A USCI peripheral provides two communications devices, denoted A and B. @@ -38,10 +38,10 @@ * * A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are * limited to SPI and I2C modes. - * - * @author R. Steve McKown + * + * @author R. Steve McKown */ - + #ifndef MSP430_USCI_h #define MSP430_USCI_h @@ -50,7 +50,6 @@ #define MSP430_USCIA1_RESOURCE "Msp430UsciA1.Resource" #define MSP430_USCIB1_RESOURCE "Msp430UsciB1.Resource" -/* Values of UCAxCTL0 only looking at the UCMODEx bits */ typedef enum { USCI_UART = 0, @@ -58,80 +57,55 @@ typedef enum USCI_I2C } msp430_usci_mode_t; -#if 0 -/* FIXME - * There are different meanings to these fields based upon the mode - * (uart/spi/etc) and the device (USCI_x0 or USCI_x1). - */ - -/* Packed bitfields are lsb first */ - -typedef struct { - unsigned int ucsync: 1; /* Synchronous mode enable. 0=async, 1=sync */ - unsigned int ucmodex: 2; /* USCI mode. 00=uart, 01=idle-line, 10=addr-bit, 11=autobaud */ - unsigned int ucspb: 1; /* Stop bit select. 0=one bit, 1=two bits */ - unsigned int uc7bit: 1; /* Character length. 0=8 bits, 1=7 bits */ - unsigned int ucmsb: 1; /* MSB first select. 0=LSB(it) first, 1=MSB(it) first */ - unsigned int ucpar: 1; /* Parity select. 0=odd parity, 1=even parity */ - unsigned int ucpen: 1; /* Parity enable. 0=parity disabled, 1=parity enabled */ -} __attribute__ ((packed)) msp430_usci_uart_ctl0_t ; - -typedef struct { - unsigned int ucswrst: 1; // Software resent enable. 0=disabled (operational), 1=enabled (reset) */ - unsigned int uctxbrk:1; // Next frame is a break or break/sync: 0=no, 1=yes */ - unsigned int uctxaddr:1; // Next transmit frame is an address. 0=no, 1=yes */ - unsigned int ucdorm: 1; // Dormant; USCI in sleep. 0=!dormant, 1=dormant */ - unsigned int ucbrkie: 1; // Receive break sets UCAxRXIFG interrupt. 0=no, 1=yes */ - unsigned int ucrxeie: 1; // Receive erroneous char sets UCAxRXIFG interrupt. 0=no, 1=yes */ - unsigned int uccsselx: 2; // USCI clock source (BRCLK). 00=UCLK, 01=ACLK, 10=SMCLK, 11=SMCLK */ -} __attribute__ ((packed)) msp430_usci_uart_ctl1_t; +typedef enum { + USCI_REN_NONE = 0, -typedef struct { - unsigned int ucbusy:1; /* USCI busy; tx or rx in process. 0=no, 1=yes */ - unsigned int ucidleaddr:1; /* In idle-line mode: Idle line detected. 0=no, 1=yes */ - /* In addr-bit mode: Last char rx is addr. 0=no, 1=yes */ - unsigned int ucrxerr:1; /* Receive error flag. 0=none, 1=(ucfe|ucpe|ucoe) */ - unsigned int ucbrk:1; /* Break detection flag. 0=no, 1=yes */ - unsigned int ucpe:1; /* Parity error flag. 0=no or ucaxctl0.ucpen=0, 1=yes */ - unsigned int ucoe:1; /* Overrun error flag. 0=no, 1=yes */ - unsigned int ucfe:1; /* Framing error flag. 0=no, 1=yes */ - unsigned int uclisten:1; /* Listen enable (loopback). 0=disabled, 1=enabled */ -} __attribute__ ((packed)) msp430_usci_uart_stat_t; + /* For use in UART mode */ + USCI_REN_TX = 0x03, + USCI_REN_TX_PULLUP = 0x01, + USCI_REN_TX_PULLDOWN = 0x02, + USCI_REN_RX = 0x0c, + USCI_REN_RX_PULLUP = 0x04, + USCI_REN_RX_PULLDOWN = 0x08, -typdef struct { - unsigned int uciren:1; /* IrDA decoder. 0=disabled, 1=enabled */ - unsigned int ucirtxclk:1; /* IrDA transmit pulse clock select. 0=BRCLK, 1=BRCLK16 if ucos16=1 else BRCLK */ - unsigned ucirtxplx:6; /* Pulse length. t(pulse) = (ucirtxplx + 1)/(2 * f(irtxclk)) */ -} __attribute__ ((packed)) msp430_usci_uart_irtctl_t; + /* For use in SPI mode */ + USCI_REN_STE = 0x30, + USCI_REN_STE_PULLUP = 0x10, + USCI_REN_STE_PULLDOWN = 0x20, + USCI_REN_SIMO = USCI_REN_TX, + USCI_REN_SIMO_PULLUP = USCI_REN_TX_PULLUP, + USCI_REN_SIMO_PULLDOWN = USCI_REN_TX_PULLDOWN, + USCI_REN_SOMI = USCI_REN_RX, + USCI_REN_SOMI_PULLUP = USCI_REN_RX_PULLUP, + USCI_REN_SOMI_PULLDOWN = USCI_REN_RX_PULLDOWN, + USCI_REN_CLK = 0xc0, + USCI_REN_CLK_PULLUP = 0x40, + USCI_REN_CLK_PULLDOWN = 0x80, -typedef struct { - unsigned int ucirrxfe:1; /* IrDA recv filter. 0=disabled, 1=enabled */ - unsigned int ucirrxpl:1; /* IrDA recv input ucaxrxd polarity. 0=high w/light pulse, 1=low */ - unsigned int ucirrxflx:6; /* IrDA recv filter len. t(min) = (ucirrxflx + 4)/(2 * f(irtxclk)) */ -} __attribute__ ((packed)) msp430_usci_uart_irrctl_t; + /* For use in I2C mode */ + USCI_REN_SDA = USCI_REN_TX, + USCI_REN_SDA_PULLUP = USCI_REN_TX_PULLUP, + USCI_REN_SDA_PULLDOWN = USCI_REN_TX_PULLDOWN, + USCI_REN_SCL = USCI_REN_RX, + USCI_REN_SCL_PULLUP = USCI_REN_RX_PULLUP, + USCI_REN_SCL_PULLDOWN = USCI_REN_RX_PULLDOWN +} msp430_ren_t; -typdef struct { - unsigned int ucabden:1; /* Auto baud rate detect enable. 0=no, 1=yes (baud calc from break/sync) */ - unsigned int reserved:1; /* Reserved */ - unsigned int ucbtoe:1; /* Break time out error. 0=no, 1=yes: break len > 22 bit times */ - unsigned int ucstoe:1; /* Synch field timeout error. 0=no, 1=yes: sync len > measurable time */ - unsigned int ucdelimx:1; /* Break/synch delimiter length in bit times. 00=1, 01=2, 10=3, 11=4 */ - unsigned int reserved2:2; /* Reserved */ -} __attribute__ ((packed)) msp430_usci_uart_abctl_t; -#endif +/* Baud rates for UART mode. Only 32KHz modes work right now. */ +typedef enum { + /* UCOS16=0. UMCTL = UCBRFx << 4 + UCBRSx << 1 + UCOS16. + * 1MHZ = 1,048576HZ, 1E6MHZ = 1,000,000HZ. + */ + UBRX_32768HZ_9600=3, UMCTL_32768HZ_9600=(0 << 4) + (3 << 1) + 0, + UBRX_1MHZ_9600=109, UMCTL_1MHZ_9600=(0 << 4) + (2 << 1) + 0, + UBRX_1MHZ_19200=54, UMCTL_1MHZ_19200=(0 << 4) + (5 << 1) + 0, + UBRX_1MHZ_38400=27, UMCTL_1MHZ_38400=(0 << 4) + (2 << 1) + 0, + UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0, + UBRX_1E6HZ_9600=104, UMCTL_1E6HZ_9600=(0 << 4) + (1 << 1) + 0, + UBRX_1E6HZ_19200=52, UMCTL_1E6HZ_19200=(0 << 4) + (0 << 1) + 0, + UBRX_1E6HZ_115200=8, UMCTL_1E6HZ_115200=(0 << 4) + (6 << 1) + 0, +} msp430_usci_uart_rate_t; -#if 0 /* We aren't using individual fields, but rather leveraging the defs - * provided by the compiler. Hence, bit fields aren't all that useful. - */ -typdef struct { - msp430_usci_uart_ctl0_t ctl0; - msp430_usci_uart_ctl0_t ctl1; - msp430_usci_uart_stat_t stat; - msp430_usci_uart_irtctl_t irtctl; - msp430_usci_uart_irrctl_t irrctl; - msp430_usci_uart_abctl_t abctl; -} __attribute__ ((packed)) msp430_usci_uart_t; -#else typedef struct { uint8_t ctl0; uint8_t ctl1; @@ -140,19 +114,24 @@ typedef struct { uint8_t irtctl; uint8_t irrctl; uint8_t abctl; - /* FIXME: add support for configuring internal pull-up or pull-down on RXD pin */ -} __attribute__ ((packed)) msp430_usci_uart_t; -#endif + bool uclisten; + msp430_ren_t ren; +} msp430_usci_uart_t; -/* Baud rates for UART mode */ -typedef enum { - /* UCOS16=0. UMCTL = UCBRFx << 4 + UCBRSx << 1 + UCOS16. */ - UBRX_1MHZ_9600=109, UMCTL_1MHZ_9600=(0 << 4) + (2 << 1) + 0, - UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0, -} msp430_usci_uart_rate_t; +typedef struct { + uint8_t ctl0; + uint8_t ctl1; + uint16_t brx; + bool uclisten; + msp430_ren_t ren; +} msp430_usci_spi_t; -typedef union { - msp430_usci_uart_t uart; -} __attribute__ ((packed)) msp430_usci_config_t; +typedef struct { + uint8_t ctl0; + uint8_t ctl1; + uint16_t brx; + uint8_t i2coa; + msp430_ren_t ren; +} msp430_usci_i2c_t; #endif