X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=blobdiff_plain;f=tos%2Fplatforms%2Ftmicore%2FMoteClockP.nc;h=3502a0a4f9c58b7fa996463933697626489ecec8;hb=ea919e632db754746366a851e66c6d04c3959a93;hp=543aab467e4bc3800ffc1d5a500167a5dc61aa59;hpb=b83aa91d0424245008bc68cecceac8b12efda682;p=tinyos-2.x.git

diff --git a/tos/platforms/tmicore/MoteClockP.nc b/tos/platforms/tmicore/MoteClockP.nc
index 543aab46..3502a0a4 100644
--- a/tos/platforms/tmicore/MoteClockP.nc
+++ b/tos/platforms/tmicore/MoteClockP.nc
@@ -50,6 +50,9 @@ module MoteClockP {
 implementation {
   command error_t Init.init()
   {
+    uint16_t i;
+
+#if defined (CALDCO_8MHZ_) && !defined(__DisableCalData)
     if (CALBC1_8MHZ != 0xff || CALDCO_8MHZ != 0xff) {
       /* Use built-in constant */
       atomic {
@@ -64,17 +67,16 @@ implementation {
 	BCSCTL2 = SELM_0 | DIVM_0 | DIVS_3;
 	DCOCTL = CALDCO_8MHZ;
 
-	/* Turn on TimerB, aka the 32KHz clock */
-	TBCTL |= MC1;
+	/* Turn on TimerB, driven by ACLK */
+	TBCTL |= MC_2;
       }
       return SUCCESS;
-    } else {
-      /* Constant not present; calibrate on the fly */
-      int i;
-
-      for (i = 0; i < 0xfffe; i++); /* ensure LFXT1 is stable */
-      return call SubInit.init();
     }
+#endif
+
+    /* Calibrate DCOCLK to ACLK when calibration data are disabled or erased */
+    for (i = 0; i < 0xfffe; i++); /* ensure LFXT1 is stable */
+    return call SubInit.init();
   }
 
   event void Msp430ClockInit.setupDcoCalibrate()
@@ -84,9 +86,7 @@ implementation {
 
   event void Msp430ClockInit.initClocks()
   {
-    /* We run at 8MHz, so SMCLK divider needs to be /8 */
     call Msp430ClockInit.defaultInitClocks();
-    BCSCTL2 |= DIVS_3;
   }
 
   event void Msp430ClockInit.initTimerA()