Low-Level I/O

@@ -295,22 +296,13 @@ ul.auto-toc { - + - - - - - - - -

Type:	Documentary
Status:	Draft
Final
TinyOS-Version:	2.x
Author:	Phil Buonadonna, Jonathan Hui
Draft-Created:	23-Jan-2006
Draft-Version:	1.5
Draft-Modified:	2006-12-12
Draft-Discuss:	TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>

Note

This memo documents a part of TinyOS for the TinyOS Community, and @@ -318,13 +310,13 @@ requests discussion and suggestions for improvements. Distribution of this memo is unlimited. This memo is in full compliance with TEP 1.

Abstract

The memo documents the TinyOS 2.x interfaces used for controlling digital IO functionality and digital interfaces.

1. Introduction

The canonical TinyOS device is likely to have a variety of digital interfaces. These interfaces may be divided into two broad categories. The first are general purpose digital I/O lines (pins) for @@ -338,8 +330,8 @@ bus formats, we presume SPI, I2C, and UART to have the largest coverage.

This memo documents the interfaces used for pins and the three buses.

2. Pins

General Purpose I/O (GPIO) pins are single, versatile digital I/O signals individually controllable on a particular chip or platform. Each GPIO can be placed into either an input mode or an @@ -380,8 +372,8 @@ interfaces:

GpioCapture

2.1 GeneralIO

The GeneralIO HIL interface is the fundamental mechanism for controlling a GPIO pin. The interface provides a mechanism for setting the pin mode and reading/setting the pin value. The toggle function switches the @@ -403,8 +395,8 @@ interface GeneralIO }

2.2 GpioInterrupt

The GPIO Interrupt HIL interface provides baseline event control for a GPIO pin. It provides a mechanism to detect a rising edge OR a falling edge. Note that calls to enableRisingEdge and enableFallingEdge are @@ -424,8 +416,8 @@ interface GpioInterrupt { }

2.3 GpioCapture

The GpioCapture interface provides a means of associating a timestamp with a GPIO event. Platforms MAY provide this interface.

Some platforms may have hardware support for such a feature. Other @@ -447,14 +439,14 @@ interface GpioCapture {

3. Buses

Bus operations may be divided into two categories: data and control. The control operations of a particular bus controller are platform specific and not covered here. Instead, we focus on the data interfaces at the HIL level that are expected to be provided.

3.1 Serial Peripheral Interface

The Serial Peripheral Interface (SPI) is part of a larger class of Synchronous Serial Protocols. The term SPI typically refers to the Motorola SPI protocols. Other protocols include the National @@ -484,8 +476,8 @@ interface SpiPacket { }

3.2 I2C

The Inter-Integrated Circuit (I2C) interface is another type of digital bus that is often used for chip-to-chip communication. It is also known as a two-wire interface.

@@ -506,7 +498,7 @@ interface I2CPacket<addr_size> {

The interface is typed according to the addressing space the underlying implementation supports. Valid type values are below.

-TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode. 
+TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode.
 TI2CBasicAddr - Interfaces uses the basic (7-bit) addressing mode.

The i2c_flags_t values are defined below. The flags define the @@ -516,12 +508,12 @@ ORed together.

I2C_START - Transmit an I2C STOP at the beginning of the operation. I2C_STOP - Transmit an I2C STOP at the end of the operation. Cannot be used with the I2C_ACK_END flag. -I2C_ACK_END - ACK the last byte sent from the buffer. This flags is only valid +I2C_ACK_END - ACK the last byte sent from the buffer. This flags is only valid a write operation. Cannot be used with the I2C_STOP flag.

3.3 UART

The Universal Asynchronous Receiver/Transmitter (UART) interface is a type of serial interconnect. The interface is "asynchronous" since it recovers timing from the data stream itself, rather than a separate @@ -539,11 +531,11 @@ enabled, the enableReceiveInterrupt command MUST return FAIL.

interface UartStream { async command error_t send( uint8_t* buf, uint16_t len ); async event void sendDone( uint8_t* buf, uint16_t len, error_t error ); - + async command error_t enableReceiveInterrupt(); async command error_t disableReceiveInterrupt(); async event void receivedByte( uint8_t byte ); - + async command error_t receive( uint8_t* buf, uint8_t len ); async event void receiveDone( uint8_t* buf, uint16_t len, error_t error ); } @@ -563,8 +555,8 @@ interface UartByte {

4. Implementation

Example implementations of the pin interfaces can be found in tos/chips/msp430/pins, tos/chips/atm128/pins, and tos/chips/pxa27x/gpio.

Example implementations of the SPI interfaces can be found in tos/chips/msp430/usart, @@ -574,8 +566,8 @@ tos/chips/atm128/i2c, and tos/chips/pxa27x/i2c.

Example implementations of the UART interfaces can be found in tos/chips/msp430/usart, tos/chips/atm128/uart/ and tos/chips/pxa27x/uart.

5. Author's Address

Phil Buonadonna
Arch Rock Corporation

@@ -586,15 +578,15 @@ tos/chips/atm128/uart/ and tos/chips/pxa27x/uart.


Jonathan Hui

-Arched Rock Corporation

+Arch Rock Corporation
657 Mission St. Ste 600
San Francisco, CA 94105-4120

phone - +1 415 692-0828 x2835

6. Citations

diff --git a/doc/txt/tep117.txt b/doc/txt/tep117.txt index 4aac10db..8ea415c7 100644 --- a/doc/txt/tep117.txt +++ b/doc/txt/tep117.txt @@ -5,15 +5,10 @@ Low-Level I/O :TEP: 117 :Group: Core Working Group :Type: Documentary -:Status: Draft +:Status: Final :TinyOS-Version: 2.x :Author: Phil Buonadonna, Jonathan Hui -:Draft-Created: 23-Jan-2006 -:Draft-Version: $Revision$ -:Draft-Modified: $Date$ -:Draft-Discuss: TinyOS Developer List - .. Note:: This memo documents a part of TinyOS for the TinyOS Community, and @@ -306,7 +301,7 @@ tos/chips/atm128/uart/ and tos/chips/pxa27x/uart. | | | Jonathan Hui -| Arched Rock Corporation +| Arch Rock Corporation | 657 Mission St. Ste 600 | San Francisco, CA 94105-4120 |