From: regehr <regehr>
Date: Sat, 31 May 2008 20:20:49 +0000 (+0000)
Subject: switch to new annotation syntax
X-Git-Tag: release_tinyos_2_1_0_0~350
X-Git-Url: https://oss.titaniummirror.com/gitweb/?a=commitdiff_plain;h=695dd83589319d40275851183f4dd175fa77b95e;p=tinyos-2.x.git

switch to new annotation syntax
---

diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
index e8bc4668..786f77a0 100644
--- a/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
@@ -38,9 +38,9 @@ generic module HplAtm128GeneralIOPinP (uint8_t port_addr,
 }
 implementation
 {
-#define pin (*TCAST(volatile uint8_t * SINGLE NONNULL, pin_addr))
-#define port (*TCAST(volatile uint8_t * SINGLE NONNULL, port_addr))
-#define ddr (*TCAST(volatile uint8_t * SINGLE NONNULL, ddr_addr))
+#define pin (*TCAST(volatile uint8_t * ONE, pin_addr))
+#define port (*TCAST(volatile uint8_t * ONE, port_addr))
+#define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr))
 
   inline async command bool IO.get()        { return READ_BIT (pin, bit); }
   inline async command void IO.set()        { SET_BIT  (port, bit); }
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
index 692f17c7..48f33d3e 100644
--- a/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
@@ -39,9 +39,9 @@ generic module HplAtm128GeneralIOSlowPinP (uint8_t port_addr,
 }
 implementation
 {
-#define pin (*TCAST(volatile uint8_t * SINGLE NONNULL, pin_addr))
-#define port (*TCAST(volatile uint8_t * SINGLE NONNULL, port_addr))
-#define ddr (*TCAST(volatile uint8_t * SINGLE NONNULL, ddr_addr))
+#define pin (*TCAST(volatile uint8_t * ONE, pin_addr))
+#define port (*TCAST(volatile uint8_t * ONE, port_addr))
+#define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr))
 
   inline async command bool IO.get()        { return READ_BIT (pin, bit); }
   inline async command void IO.set()        { atomic SET_BIT  (port, bit); }
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
index ce4aa835..36b0f030 100644
--- a/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
+++ b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
@@ -42,7 +42,7 @@ implementation
   inline async command void Irq.enable()   { EIMSK |= 1 << bit; }
   inline async command void Irq.disable()  { EIMSK &= ~(1 << bit); }
 
-#define ctrl  (*(volatile uint8_t *)ctrl_addr)
+#define ctrl  (*TCAST(volatile uint8_t * ONE, ctrl_addr))
 
   inline async command void Irq.edge(bool low_to_high) {
     ctrl |= 1 << edge1bit; // use edge mode
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
index 48f49dfd..34debff4 100644
--- a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
@@ -37,10 +37,10 @@ generic module HplMsp430GeneralIOP(
 }
 implementation
 {
-  #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* SINGLE NONNULL, port_in_addr))
-  #define PORTx (*TCAST(volatile TYPE_PORT_OUT* SINGLE NONNULL, port_out_addr))
-  #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* SINGLE NONNULL, port_dir_addr))
-  #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* SINGLE NONNULL, port_sel_addr))
+  #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr))
+  #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr))
+  #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr))
+  #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr))
 
   async command void IO.set() { atomic PORTx |= (0x01 << pin); }
   async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
diff --git a/tos/chips/msp430/timer/Msp430TimerCapComP.nc b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
index 04707adf..efcd3b54 100644
--- a/tos/chips/msp430/timer/Msp430TimerCapComP.nc
+++ b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
@@ -38,8 +38,8 @@ generic module Msp430TimerCapComP(
 }
 implementation
 {
-  #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* SINGLE NONNULL, TxCCTLx_addr))
-  #define TxCCRx (*TCAST(volatile TYPE_TACCR0* SINGLE NONNULL, TxCCRx_addr))
+  #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* ONE, TxCCTLx_addr))
+  #define TxCCRx (*TCAST(volatile TYPE_TACCR0* ONE, TxCCRx_addr))
 
   typedef msp430_compare_control_t cc_t;
 
diff --git a/tos/chips/msp430/timer/Msp430TimerP.nc b/tos/chips/msp430/timer/Msp430TimerP.nc
index fdf1b632..0a40de80 100644
--- a/tos/chips/msp430/timer/Msp430TimerP.nc
+++ b/tos/chips/msp430/timer/Msp430TimerP.nc
@@ -44,9 +44,9 @@ generic module Msp430TimerP(
 }
 implementation
 {
-  #define TxIV (*TCAST(volatile TYPE_TAIV* SINGLE NONNULL, TxIV_addr))
-  #define TxR (*TCAST(volatile TYPE_TAR* SINGLE NONNULL, TxR_addr))
-  #define TxCTL (*TCAST(volatile TYPE_TACTL* SINGLE NONNULL, TxCTL_addr))
+  #define TxIV (*TCAST(volatile TYPE_TAIV* ONE, TxIV_addr))
+  #define TxR (*TCAST(volatile TYPE_TAR* ONE, TxR_addr))
+  #define TxCTL (*TCAST(volatile TYPE_TACTL* ONE, TxCTL_addr))
 
   async command uint16_t Timer.get()
   {