From 1ba974b83d19fc41bf80acd52726f36f7f1df297 Mon Sep 17 00:00:00 2001 From: scipio Date: Wed, 12 Jul 2006 16:58:54 +0000 Subject: [PATCH] Merge devel code into the trunk. --- apps/BaseStation/BaseStationC.nc | 89 + apps/BaseStation/BaseStationP.nc | 282 + apps/BaseStation/Makefile | 4 + apps/BaseStation/README | 45 + apps/BaseStation/README.txt | 40 + apps/Blink/BlinkAppC.nc | 58 + apps/Blink/BlinkC.nc | 74 + apps/Blink/Makefile | 3 + apps/Blink/README.txt | 22 + apps/Makefile | 50 + apps/MultihopOscilloscope/.cvsignore | 1 + apps/MultihopOscilloscope/Makefile | 4 + .../MultihopOscilloscope.h | 36 + .../MultihopOscilloscopeAppC.nc | 62 + .../MultihopOscilloscopeC.nc | 230 + apps/MultihopOscilloscope/README.txt | 46 + .../java/ColorCellEditor.java | 55 + apps/MultihopOscilloscope/java/Data.java | 74 + apps/MultihopOscilloscope/java/Graph.java | 232 + apps/MultihopOscilloscope/java/Makefile | 21 + apps/MultihopOscilloscope/java/Node.java | 101 + .../java/Oscilloscope.java | 128 + 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tos/system/dbg.h create mode 100644 tos/system/scale.h create mode 100644 tos/system/tos.h create mode 100644 tos/types/AM.h create mode 100644 tos/types/I2C.h create mode 100644 tos/types/Leds.h create mode 100644 tos/types/README create mode 100644 tos/types/Storage.h create mode 100644 tos/types/TinyError.h create mode 100644 tos/types/message.h diff --git a/apps/BaseStation/BaseStationC.nc b/apps/BaseStation/BaseStationC.nc new file mode 100644 index 00000000..016a8b1e --- /dev/null +++ b/apps/BaseStation/BaseStationC.nc @@ -0,0 +1,89 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * The TinyOS 2.x base station that forwards packets between the UART + * and radio.It replaces the GenericBase of TinyOS 1.0 and the + * TOSBase of TinyOS 1.1. + * + *

On the serial link, BaseStation sends and receives simple active + * messages (not particular radio packets): on the radio link, it + * sends radio active messages, whose format depends on the network + * stack being used. BaseStation will copy its compiled-in group ID to + * messages moving from the serial link to the radio, and will filter + * out incoming radio messages that do not contain that group ID.

+ * + *

BaseStation includes queues in both directions, with a guarantee + * that once a message enters a queue, it will eventually leave on the + * other interface. The queues allow the BaseStation to handle load + * spikes.

+ * + *

BaseStation acknowledges a message arriving over the serial link + * only if that message was successfully enqueued for delivery to the + * radio link.

+ * + *

The LEDS are programmed to toggle as follows:

+ * + * + * @author Phil Buonadonna + * @author Gilman Tolle + * @author David Gay + * @author Philip Levis + * @date August 10 2005 + */ + +configuration BaseStationC { +} +implementation { + components MainC, BaseStationP, LedsC; + components ActiveMessageC as Radio, SerialActiveMessageC as Serial; + + MainC.Boot <- BaseStationP; + + BaseStationP.RadioControl -> Radio; + BaseStationP.SerialControl -> Serial; + + BaseStationP.UartSend -> Serial; + BaseStationP.UartReceive -> Serial; + BaseStationP.UartPacket -> Serial; + BaseStationP.UartAMPacket -> Serial; + + BaseStationP.RadioSend -> Radio; + BaseStationP.RadioReceive -> Radio.Receive; + BaseStationP.RadioPacket -> Radio; + BaseStationP.RadioAMPacket -> Radio; + + BaseStationP.Leds -> LedsC; +} diff --git a/apps/BaseStation/BaseStationP.nc b/apps/BaseStation/BaseStationP.nc new file mode 100644 index 00000000..680bc49a --- /dev/null +++ b/apps/BaseStation/BaseStationP.nc @@ -0,0 +1,282 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/* + * @author Phil Buonadonna + * @author Gilman Tolle + * @author David Gay + * Revision: $Id$ + */ + +/* + * BaseStationP bridges packets between a serial channel and the radio. + * Messages moving from serial to radio will be tagged with the group + * ID compiled into the TOSBase, and messages moving from radio to + * serial will be filtered by that same group id. + */ + +#include "AM.h" +#include "Serial.h" + +module BaseStationP { + uses { + interface Boot; + interface SplitControl as SerialControl; + interface SplitControl as RadioControl; + + interface AMSend as UartSend[am_id_t id]; + interface Receive as UartReceive[am_id_t id]; + interface Packet as UartPacket; + interface AMPacket as UartAMPacket; + + interface AMSend as RadioSend[am_id_t id]; + interface Receive as RadioReceive[am_id_t id]; + interface Packet as RadioPacket; + interface AMPacket as RadioAMPacket; + + interface Leds; + } +} + +implementation +{ + enum { + UART_QUEUE_LEN = 12, + RADIO_QUEUE_LEN = 12, + }; + + message_t uartQueueBufs[UART_QUEUE_LEN]; + message_t *uartQueue[UART_QUEUE_LEN]; + uint8_t uartIn, uartOut; + bool uartBusy, uartFull; + + message_t radioQueueBufs[RADIO_QUEUE_LEN]; + message_t *radioQueue[RADIO_QUEUE_LEN]; + uint8_t radioIn, radioOut; + bool radioBusy, radioFull; + + task void uartSendTask(); + task void radioSendTask(); + + void dropBlink() { + call Leds.led2Toggle(); + } + + void failBlink() { + call Leds.led2Toggle(); + } + + event void Boot.booted() { + uint8_t i; + + for (i = 0; i < UART_QUEUE_LEN; i++) + uartQueue[i] = &uartQueueBufs[i]; + uartIn = uartOut = 0; + uartBusy = FALSE; + uartFull = TRUE; + + for (i = 0; i < RADIO_QUEUE_LEN; i++) + radioQueue[i] = &radioQueueBufs[i]; + radioIn = radioOut = 0; + radioBusy = FALSE; + radioFull = TRUE; + + call RadioControl.start(); + call SerialControl.start(); + } + + event void RadioControl.startDone(error_t error) { + if (error == SUCCESS) { + radioFull = FALSE; + } + } + + event void SerialControl.startDone(error_t error) { + if (error == SUCCESS) { + uartFull = FALSE; + } + } + + event void SerialControl.stopDone(error_t error) {} + event void RadioControl.stopDone(error_t error) {} + + uint8_t count = 0; + event message_t *RadioReceive.receive[am_id_t id](message_t *msg, + void *payload, + uint8_t len) { + message_t *ret = msg; +#if 0 + if (!msg->crc || msg->group != TOS_AM_GROUP) + return msg; +#endif + + atomic { + if (!uartFull) + { + ret = uartQueue[uartIn]; + uartQueue[uartIn] = msg; + + uartIn = (uartIn + 1) % UART_QUEUE_LEN; + + if (uartIn == uartOut) + uartFull = TRUE; + + if (!uartBusy) + { + post uartSendTask(); + uartBusy = TRUE; + } + } + else + dropBlink(); + } + + return ret; + } + + uint8_t tmpLen; + + task void uartSendTask() { + uint8_t len; + am_id_t id; + am_addr_t addr; + message_t* msg; + atomic + if (uartIn == uartOut && !uartFull) + { + uartBusy = FALSE; + return; + } + + msg = uartQueue[uartOut]; + tmpLen = len = call RadioPacket.payloadLength(msg); + id = call RadioAMPacket.type(msg); + addr = call RadioAMPacket.destination(msg); + + if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS) + call Leds.led1Toggle(); + else + { + failBlink(); + post uartSendTask(); + } + } + + event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) { + if (error != SUCCESS) + failBlink(); + else + atomic + if (msg == uartQueue[uartOut]) + { + if (++uartOut >= UART_QUEUE_LEN) + uartOut = 0; + if (uartFull) + uartFull = FALSE; + } + post uartSendTask(); + } + + event message_t *UartReceive.receive[am_id_t id](message_t *msg, + void *payload, + uint8_t len) { + message_t *ret = msg; + bool reflectToken = FALSE; + + atomic + if (!radioFull) + { + reflectToken = TRUE; + ret = radioQueue[radioIn]; + radioQueue[radioIn] = msg; + if (++radioIn >= RADIO_QUEUE_LEN) + radioIn = 0; + if (radioIn == radioOut) + radioFull = TRUE; + + if (!radioBusy) + { + post radioSendTask(); + radioBusy = TRUE; + } + } + else + dropBlink(); + + if (reflectToken) { + //call UartTokenReceive.ReflectToken(Token); + } + + return ret; + } + + task void radioSendTask() { + uint8_t len; + am_id_t id; + am_addr_t addr; + message_t* msg; + + atomic + if (radioIn == radioOut && !radioFull) + { + radioBusy = FALSE; + return; + } + + msg = radioQueue[radioOut]; + len = call UartPacket.payloadLength(msg); + addr = call UartAMPacket.destination(msg); + id = call UartAMPacket.type(msg); + if (call RadioSend.send[id](addr, msg, len) == SUCCESS) + call Leds.led0Toggle(); + else + { + failBlink(); + post radioSendTask(); + } + } + + event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) { + if (error != SUCCESS) + failBlink(); + else + atomic + if (msg == radioQueue[radioOut]) + { + if (++radioOut >= RADIO_QUEUE_LEN) + radioOut = 0; + if (radioFull) + radioFull = FALSE; + } + + post radioSendTask(); + } +} diff --git a/apps/BaseStation/Makefile b/apps/BaseStation/Makefile new file mode 100644 index 00000000..94fc4944 --- /dev/null +++ b/apps/BaseStation/Makefile @@ -0,0 +1,4 @@ +COMPONENT=BaseStationC +CFLAGS += -I%T/oski +include $(MAKERULES) + diff --git a/apps/BaseStation/README b/apps/BaseStation/README new file mode 100644 index 00000000..86c435cf --- /dev/null +++ b/apps/BaseStation/README @@ -0,0 +1,45 @@ +README for BaseStation +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +BaseStation is an application that acts as a simple Active Message +bridge between the serial and radio links. It replaces the GenericBase +of TinyOS 1.0 and the TOSBase of TinyOS 1.1. + +On the serial link, BaseStation sends and receives simple active +messages (not particular radio packets): on the radio link, it sends +radio active messages, whose format depends on the network stack being +used. BaseStation will copy its compiled-in group ID to messages +moving from the serial link to the radio, and will filter out incoming +radio messages that do not contain that group ID. + +BaseStation includes queues in both directions, with a guarantee that +once a message enters a queue, it will eventually leave on the other +interface. The queues allow the BaseStation to handle load spikes more +gracefully. + +BaseStation acknowledges a message arriving over the serial link only if +that message was successfully enqueued for delivery to the radio link. + +The LEDS are programmed to toggle as follows: + +RED Toggle - Message bridged from serial to radio +GREEN Toggle - Message bridged from radio to serial +YELLOW/BLUE Toggle - Dropped message due to queue overflow + in either direction + +Tools: + +tools/java/net/tinyos/sf/SerialForwarder. + +See doc/serialcomm/index.html for more information using these tools. + +Known bugs/limitations: + +On CC2420 platforms, BaseStation can only overhear packets transmitted +to it or to the broadcast address. This is due to how the CC2420 hardware +filters packets based on address and how the CC2420 stack uses that +functionality; future versions will not have this limitation. + + diff --git a/apps/BaseStation/README.txt b/apps/BaseStation/README.txt new file mode 100644 index 00000000..b0fa1803 --- /dev/null +++ b/apps/BaseStation/README.txt @@ -0,0 +1,40 @@ +README for BaseStation +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +BaseStation is an application that acts as a simple Active Message +bridge between the serial and radio links. It replaces the GenericBase +of TinyOS 1.0 and the TOSBase of TinyOS 1.1. + +On the serial link, BaseStation sends and receives simple active +messages (not particular radio packets): on the radio link, it sends +radio active messages, whose format depends on the network stack being +used. BaseStation will copy its compiled-in group ID to messages +moving from the serial link to the radio, and will filter out incoming +radio messages that do not contain that group ID. + +BaseStation includes queues in both directions, with a guarantee that +once a message enters a queue, it will eventually leave on the other +interface. The queues allow the BaseStation to handle load spikes more +gracefully. + +BaseStation acknowledges a message arriving over the serial link only if +that message was successfully enqueued for delivery to the radio link. + +The LEDS are programmed to toggle as follows: + +RED Toggle - Message bridged from serial to radio +GREEN Toggle - Message bridged from radio to serial +YELLOW/BLUE Toggle - Dropped message due to queue overflow + in either direction + +Tools: + +tools/java/net/tinyos/sf/SerialForwarder. + +See doc/serialcomm/index.html for more information using these tools. + +Known bugs/limitations: + +None. diff --git a/apps/Blink/BlinkAppC.nc b/apps/Blink/BlinkAppC.nc new file mode 100644 index 00000000..4f828694 --- /dev/null +++ b/apps/Blink/BlinkAppC.nc @@ -0,0 +1,58 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Blink is a basic application that toggles the a mote LED periodically. + * It does so by starting a Timer that fires every second. It uses the + * OSKI TimerMilli service to achieve this goal. + * + * @author tinyos-help@millennium.berkeley.edu + **/ + +configuration BlinkAppC +{ +} +implementation +{ + components MainC, BlinkC, LedsC; + components new TimerMilliC() as Timer0; + components new TimerMilliC() as Timer1; + components new TimerMilliC() as Timer2; + + + BlinkC -> MainC.Boot; + + BlinkC.Timer0 -> Timer0; + BlinkC.Timer1 -> Timer1; + BlinkC.Timer2 -> Timer2; + BlinkC.Leds -> LedsC; +} + diff --git a/apps/Blink/BlinkC.nc b/apps/Blink/BlinkC.nc new file mode 100644 index 00000000..90c4b264 --- /dev/null +++ b/apps/Blink/BlinkC.nc @@ -0,0 +1,74 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation for Blink application. Toggle the red LED when a + * Timer fires. + **/ + +#include "Timer.h" + +module BlinkC +{ + uses interface Timer as Timer0; + uses interface Timer as Timer1; + uses interface Timer as Timer2; + uses interface Leds; + uses interface Boot; +} +implementation +{ + event void Boot.booted() + { + call Timer0.startPeriodic( 250 ); + call Timer1.startPeriodic( 500 ); + call Timer2.startPeriodic( 1000 ); + } + + event void Timer0.fired() + { + dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string()); + call Leds.led0Toggle(); + } + + event void Timer1.fired() + { + dbg("BlinkC", "Timer 1 fired @ %s \n", sim_time_string()); + call Leds.led1Toggle(); + } + + event void Timer2.fired() + { + dbg("BlinkC", "Timer 2 fired @ %s.\n", sim_time_string()); + call Leds.led2Toggle(); + } +} + diff --git a/apps/Blink/Makefile b/apps/Blink/Makefile new file mode 100644 index 00000000..1fd72f16 --- /dev/null +++ b/apps/Blink/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkAppC +include $(MAKERULES) + diff --git a/apps/Blink/README.txt b/apps/Blink/README.txt new file mode 100644 index 00000000..3696539e --- /dev/null +++ b/apps/Blink/README.txt @@ -0,0 +1,22 @@ +README for Blink +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Blink is a simple application that blinks the 3 mote LEDs. It tests +that the boot sequence and millisecond timers are working properly. +The three LEDs blink at 1Hz, 2Hz, and 4Hz. Because each is driven by +an independent timer, visual inspection can determine whether there are +bugs in the timer system that are causing drift. Note that this +method is different than RadioCountToLeds, which fires a single timer +at a steady rate and uses the bottom three bits of a counter to display +on the LEDs. + +Tools: + +Known bugs/limitations: + +None. + + +$Id$ diff --git a/apps/Makefile b/apps/Makefile new file mode 100644 index 00000000..7ca8632f --- /dev/null +++ b/apps/Makefile @@ -0,0 +1,50 @@ +#-*-makefile-*- +###################################################################### +# +# Makes the entire suite of TinyOS applications for a given platform. +# +# Author: Martin Turon +# Date: August 18, 2005 +# +###################################################################### +# $Id$ + +# MAKECMDGOALS is the way to get the arguments passed into a Makefile ... +TARGET=$(MAKECMDGOALS) +NESDOC_TARGET=$(filter-out nesdoc,$(TARGET)) + +# Here is a way to get the list of subdirectories in a Makefile ... +ROOT=. +SUBDIRS := $(shell find * -type d) + +# Okay, match any target, and recurse the subdirectories +%: + @for i in $(SUBDIRS); do \ + HERE=$$PWD; \ + if [ -f $$i/Makefile ]; then \ + echo Building ... $(PWD)/$$i; \ + echo make $(TARGET); \ + cd $$i; \ + $(MAKE) $(TARGET); \ + cd $$HERE; \ + fi; \ + done + +BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' ) +# The output directory for generated documentation +DOCDIR = $(BASEDIR)/doc/nesdoc + +nesdoc: + @echo This target rebuilds documentation for all known platforms. + @echo It DOES NOT overwrite any existing documentation, thus, it + @echo is best run after deleting all old documentation. + @echo + @echo To delete all old documentation, delete the contents of the + @echo $(DOCDIR) directory. + @echo + @echo Press Enter to continue, or ^C to abort. + @read + for platform in `ncc -print-platforms`; do \ + $(MAKE) $$platform docs.nohtml.preserve; \ + nesdoc -o $(DOCDIR) -html -target=$$platform; \ + done diff --git a/apps/MultihopOscilloscope/.cvsignore b/apps/MultihopOscilloscope/.cvsignore new file mode 100644 index 00000000..040264a0 --- /dev/null +++ b/apps/MultihopOscilloscope/.cvsignore @@ -0,0 +1 @@ +build .*.swp diff --git a/apps/MultihopOscilloscope/Makefile b/apps/MultihopOscilloscope/Makefile new file mode 100644 index 00000000..17b63c13 --- /dev/null +++ b/apps/MultihopOscilloscope/Makefile @@ -0,0 +1,4 @@ +COMPONENT=MultihopOscilloscopeAppC +CFLAGS += -I$(TOSDIR)/lib/net/collection + +include $(MAKERULES) diff --git a/apps/MultihopOscilloscope/MultihopOscilloscope.h b/apps/MultihopOscilloscope/MultihopOscilloscope.h new file mode 100644 index 00000000..7e71fbfd --- /dev/null +++ b/apps/MultihopOscilloscope/MultihopOscilloscope.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * @author David Gay + * @author Kyle Jamieson + */ + +#ifndef MULTIHOP_OSCILLOSCOPE_H +#define MULTIHOP_OSCILLOSCOPE_H + +enum { + /* Number of readings per message. If you increase this, you may have to + increase the message_t size. */ + NREADINGS = 5, + /* Default sampling period. */ + DEFAULT_INTERVAL = 256, + AM_OSCILLOSCOPE = 0x93 +}; + +typedef nx_struct oscilloscope { + nx_uint16_t version; /* Version of the interval. */ + nx_uint16_t interval; /* Samping period. */ + nx_uint16_t id; /* Mote id of sending mote. */ + nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ + nx_uint16_t readings[NREADINGS]; +} oscilloscope_t; + +#endif diff --git a/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc b/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc new file mode 100644 index 00000000..164cb0c6 --- /dev/null +++ b/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * MultihopOscilloscope demo application using the collection layer. + * See README.txt file in this directory and TEP 119: Collection. + * + * @author David Gay + * @author Kyle Jamieson + */ + +configuration MultihopOscilloscopeAppC { } +implementation { + components MainC, MultihopOscilloscopeC, LedsC, new TimerMilliC(), + new DemoSensorC() as Sensor; + + MultihopOscilloscopeC.Boot -> MainC; + MultihopOscilloscopeC.Timer -> TimerMilliC; + MultihopOscilloscopeC.Read -> Sensor; + MultihopOscilloscopeC.Leds -> LedsC; + + // + // Communication components. These are documented in TEP 113: + // Serial Communication, and TEP 119: Collection. + // + components TreeCollectionC as Collector, // Collection layer + ActiveMessageC, // AM layer + new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF + SerialActiveMessageC, // Serial messaging + new SerialAMSenderC(AM_OSCILLOSCOPE); // Sends to the serial port + + MultihopOscilloscopeC.RadioControl -> ActiveMessageC; + MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC; + MultihopOscilloscopeC.RoutingControl -> Collector; + + MultihopOscilloscopeC.Send -> CollectionSenderC; + MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend; + MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE]; + MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE]; + MultihopOscilloscopeC.RootControl -> Collector; + + // + // Components for debugging collection. + // + components new PoolC(message_t, 10) as DebugMessagePool, + new QueueC(message_t*, 10) as DebugSendQueue, + new SerialAMSenderC(AM_COLLECTION_DEBUG) as DebugSerialSender, + UARTDebugSenderP as DebugSender; + + DebugSender.Boot -> MainC; + DebugSender.UARTSend -> DebugSerialSender; + DebugSender.MessagePool -> DebugMessagePool; + DebugSender.SendQueue -> DebugSendQueue; + Collector.CollectionDebug -> DebugSender; +} diff --git a/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc b/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc new file mode 100644 index 00000000..78e6a884 --- /dev/null +++ b/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc @@ -0,0 +1,230 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * MultihopOscilloscope demo application using the collection layer. + * See README.txt file in this directory and TEP 119: Collection. + * + * @author David Gay + * @author Kyle Jamieson + */ + +#include "Timer.h" +#include "MultihopOscilloscope.h" + +module MultihopOscilloscopeC { + uses { + // Interfaces for initialization: + interface Boot; + interface SplitControl as RadioControl; + interface SplitControl as SerialControl; + interface StdControl as RoutingControl; + + // Interfaces for communication, multihop and serial: + interface Send; + interface Receive as Snoop; + interface Receive; + interface AMSend as SerialSend; + interface CollectionPacket; + interface RootControl; + + // Miscalleny: + interface Timer; + interface Read; + interface Leds; + } +} + +implementation { + task void uartSendTask(); + static void startTimer(); + static void fatal_problem(); + static void report_problem(); + static void report_sent(); + static void report_received(); + + uint8_t uartlen; + message_t sendbuf; + message_t uartbuf; + bool sendbusy=FALSE, uartbusy=FALSE; + + /* Current local state - interval, version and accumulated readings */ + oscilloscope_t local; + + uint8_t reading; /* 0 to NREADINGS */ + + /* When we head an Oscilloscope message, we check it's sample count. If + it's ahead of ours, we "jump" forwards (set our count to the received + count). However, we must then suppress our next count increment. This + is a very simple form of "time" synchronization (for an abstract + notion of time). */ + bool suppress_count_change; + + // + // On bootup, initialize radio and serial communications, and our + // own state variables. + // + event void Boot.booted() { + local.interval = DEFAULT_INTERVAL; + local.id = TOS_NODE_ID; + + // Beginning our initialization phases: + if (call RadioControl.start() != SUCCESS) + fatal_problem(); + + if (call RoutingControl.start() != SUCCESS) + fatal_problem(); + } + + event void RadioControl.startDone(error_t error) { + if (error != SUCCESS) + fatal_problem(); + + if (sizeof(local) > call Send.maxPayloadLength()) + fatal_problem(); + + if (call SerialControl.start() != SUCCESS) + fatal_problem(); + } + + event void SerialControl.startDone(error_t error) { + if (error != SUCCESS) + fatal_problem(); + + // This is how to set yourself as a root to the collection layer: + if (local.id % 500 == 0) + call RootControl.setRoot(); + + startTimer(); + } + + static void startTimer() { + call Timer.startPeriodic(local.interval); + reading = 0; + } + + event void RadioControl.stopDone(error_t error) { } + event void SerialControl.stopDone(error_t error) { } + + // + // Only the root will receive messages from this interface; its job + // is to forward them to the serial uart for processing on the pc + // connected to the sensor network. + // + event message_t* + Receive.receive(message_t* msg, void *payload, uint8_t len) { + if (uartbusy == FALSE) { + oscilloscope_t* in = (oscilloscope_t*)payload; + oscilloscope_t* out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf); + if (len != sizeof(oscilloscope_t)) { + return msg; + } + else { + memcpy(out, in, sizeof(oscilloscope_t)); + } + uartbusy = TRUE; + uartlen = sizeof(oscilloscope_t); + post uartSendTask(); + } + + return msg; + } + + task void uartSendTask() { + if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) { + uartbusy = FALSE; + } + } + // + // Overhearing other traffic in the network. + // + event message_t* + Snoop.receive(message_t* msg, void* payload, uint8_t len) { + oscilloscope_t *omsg = payload; + + report_received(); + + // If we receive a newer version, update our interval. + if (omsg->version > local.version) { + local.version = omsg->version; + local.interval = omsg->interval; + startTimer(); + } + + // If we hear from a future count, jump ahead but suppress our own + // change. + if (omsg->count > local.count) { + local.count = omsg->count; + suppress_count_change = TRUE; + } + + return msg; + } + + /* At each sample period: + - if local sample buffer is full, send accumulated samples + - read next sample + */ + event void Timer.fired() { + if (reading == NREADINGS) { + if (!sendbusy) { + oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf); + memcpy(o, &local, sizeof(local)); + if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS) + sendbusy = TRUE; + else + report_problem(); + } + + reading = 0; + /* Part 2 of cheap "time sync": increment our count if we didn't + jump ahead. */ + if (!suppress_count_change) + local.count++; + suppress_count_change = FALSE; + } + + if (call Read.read() != SUCCESS) + fatal_problem(); + } + + event void Send.sendDone(message_t* msg, error_t error) { + if (error == SUCCESS) + report_sent(); + else + report_problem(); + + sendbusy = FALSE; + } + + event void Read.readDone(error_t result, uint16_t data) { + if (result != SUCCESS) { + data = 0xffff; + report_problem(); + } + local.readings[reading++] = data; + } + + event void SerialSend.sendDone(message_t *msg, error_t error) { + uartbusy = FALSE; + } + + // Use LEDs to report various status issues. + static void fatal_problem() { + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2On(); + call Timer.stop(); + } + + static void report_problem() { call Leds.led0Toggle(); } + static void report_sent() { call Leds.led1Toggle(); } + static void report_received() { call Leds.led2Toggle(); } +} diff --git a/apps/MultihopOscilloscope/README.txt b/apps/MultihopOscilloscope/README.txt new file mode 100644 index 00000000..05f0d20f --- /dev/null +++ b/apps/MultihopOscilloscope/README.txt @@ -0,0 +1,46 @@ +README for MultihopOscilloscope +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +MultihopOscilloscope is a simple data-collection demo. It periodically samples +the default sensor and broadcasts a message every few readings. These readings +can be displayed by the Java "Oscilloscope" application found in the +TOSROOT/apps/Oscilloscope/java subdirectory. The sampling rate starts at 4Hz, +but can be changed from the Java application. + +You can compile MultihopOscilloscope with a sensor board's default sensor by +compiling as follows: + + SENSORBOARD= make + +You can change the sensor used by editing MultihopOscilloscopeAppC.nc. + +Tools: + +The Java application displays readings it receives from motes running the +MultihopOscilloscope demo via a serial forwarder. To run it, change to the +TOSROOT/apps/Oscilloscope/java subdirectory and type: + + make + java net.tinyos.sf.SerialForwarder -comm serial@: + # e.g., java net.tinyps.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 + # or java net.tinyps.sf.SerialForwarder -comm serial@COM2:telosb + ./run + +The controls at the bootom of the screen allow yoy to zoom in or out the X +axis, change the range of the Y axis, and clear all received data. You can +change the color used to display a mote by clicking on its color in the +mote table. + +Known bugs/limitations: + +None. + +See also: +TEP 113: Serial Communications, TEP 119: Collection. + +Notes: + +MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero +to be a collection root. diff --git a/apps/MultihopOscilloscope/java/ColorCellEditor.java b/apps/MultihopOscilloscope/java/ColorCellEditor.java new file mode 100644 index 00000000..f88b0b6f --- /dev/null +++ b/apps/MultihopOscilloscope/java/ColorCellEditor.java @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import javax.swing.table.*; +import java.awt.*; +import java.awt.event.*; + +/* Editor for table cells representing colors. Popup a color chooser. */ +public class ColorCellEditor extends AbstractCellEditor + implements TableCellEditor { + private Color color; + private JButton button; + + public ColorCellEditor(String title) { + button = new JButton(); + final JColorChooser chooser = new JColorChooser(); + final JDialog dialog = JColorChooser.createDialog + (button, title, true, chooser, + new ActionListener() { + public void actionPerformed(ActionEvent e) { + color = chooser.getColor(); + } }, + null); + + button.setBorderPainted(false); + button.addActionListener + (new ActionListener () { + public void actionPerformed(ActionEvent e) { + button.setBackground(color); + chooser.setColor(color); + dialog.setVisible(true); + fireEditingStopped(); + } } ); + + } + + public Object getCellEditorValue() { return color; } + public Component getTableCellEditorComponent(JTable table, + Object value, + boolean isSelected, + int row, + int column) { + color = (Color)value; + return button; + } +} + diff --git a/apps/MultihopOscilloscope/java/Data.java b/apps/MultihopOscilloscope/java/Data.java new file mode 100644 index 00000000..ac35aa72 --- /dev/null +++ b/apps/MultihopOscilloscope/java/Data.java @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import java.util.*; + +/* Hold all data received from motes */ +class Data { + /* The mote data is stored in a flat array indexed by a mote's identifier. + A null value indicates no mote with that identifier. */ + private Node[] nodes = new Node[256]; + private Oscilloscope parent; + + Data(Oscilloscope parent) { + this.parent = parent; + } + + /* Data received from mote nodeId containing NREADINGS samples from + messageId * NREADINGS onwards. Tell parent if this is a new node. */ + void update(int nodeId, int messageId, int readings[]) { + if (nodeId >= nodes.length) { + int newLength = nodes.length * 2; + if (nodeId >= newLength) + newLength = nodeId + 1; + + Node newNodes[] = new Node[newLength]; + System.arraycopy(nodes, 0, newNodes, 0, nodes.length); + nodes = newNodes; + } + Node node = nodes[nodeId]; + if (node == null) { + nodes[nodeId] = node = new Node(nodeId); + parent.newNode(nodeId); + } + node.update(messageId, readings); + } + + /* Return value of sample x for mote nodeId, or -1 for missing data */ + int getData(int nodeId, int x) { + if (nodeId >= nodes.length || nodes[nodeId] == null) + return -1; + return nodes[nodeId].getData(x); + } + + /* Return number of last known sample on mote nodeId. Returns 0 for + unknown motes. */ + int maxX(int nodeId) { + if (nodeId >= nodes.length || nodes[nodeId] == null) + return 0; + return nodes[nodeId].maxX(); + } + + /* Return number of largest known sample on all motes (0 if there are no + motes) */ + int maxX() { + int max = 0; + + for (int i = 0; i < nodes.length; i++) + if (nodes[i] != null) { + int nmax = nodes[i].maxX(); + + if (nmax > max) + max = nmax; + } + + return max; + } +} diff --git a/apps/MultihopOscilloscope/java/Graph.java b/apps/MultihopOscilloscope/java/Graph.java new file mode 100644 index 00000000..9a42c1c8 --- /dev/null +++ b/apps/MultihopOscilloscope/java/Graph.java @@ -0,0 +1,232 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import java.awt.*; +import java.awt.event.*; +import java.awt.font.*; +import java.awt.geom.*; +import java.util.*; + +/* Panel for drawing mote-data graphs */ +class Graph extends JPanel +{ + final static int BORDER_LEFT = 40; + final static int BORDER_RIGHT = 0; + final static int BORDER_TOP = 10; + final static int BORDER_BOTTOM = 10; + + final static int TICK_SPACING = 40; + final static int MAX_TICKS = 16; + final static int TICK_WIDTH = 10; + + final static int MIN_WIDTH = 50; + + int gx0, gx1, gy0, gy1; // graph bounds + int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale + Window parent; + + /* Graph to screen coordinate conversion support */ + int height, width; + double xscale, yscale; + + void updateConversion() { + height = getHeight() - BORDER_TOP - BORDER_BOTTOM; + width = getWidth() - BORDER_LEFT - BORDER_RIGHT; + if (height < 1) + height = 1; + if (width < 1) + width = 1; + xscale = (double)width / (gx1 - gx0 + 1); + yscale = (double)height / (gy1 - gy0 + 1); + } + + Graphics makeClip(Graphics g) { + return g.create(BORDER_LEFT, BORDER_TOP, width, height); + } + + // Note that these do not include the border offset! + int screenX(int gx) { + return (int)(xscale * (gx - gx0) + 0.5); + } + + int screenY(int gy) { + return (int)(height - yscale * (gy - gy0)); + } + + int graphX(int sx) { + return (int)(sx / xscale + gx0 + 0.5); + } + + Graph(Window parent) { + this.parent = parent; + gy0 = 0; gy1 = 0xffff; + gx0 = 0; gx1 = MIN_WIDTH << scale; + } + + void rightDrawString(Graphics2D g, String s, int x, int y) { + TextLayout layout = + new TextLayout(s, parent.smallFont, g.getFontRenderContext()); + Rectangle2D bounds = layout.getBounds(); + layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); + } + + protected void paintComponent(Graphics g) { + Graphics2D g2d = (Graphics2D)g; + + /* Repaint. Synchronize on Oscilloscope to avoid data changing. + Simply clear panel, draw Y axis and all the mote graphs. */ + synchronized (parent.parent) { + updateConversion(); + g2d.setColor(Color.BLACK); + g2d.fillRect(0, 0, getWidth(), getHeight()); + drawYAxis(g2d); + + Graphics clipped = makeClip(g2d); + int count = parent.moteListModel.size(); + for (int i = 0; i < count; i++) { + clipped.setColor(parent.moteListModel.getColor(i)); + drawGraph(clipped, parent.moteListModel.get(i)); + } + } + } + + /* Draw the Y-axis */ + protected void drawYAxis(Graphics2D g) { + int axis_x = BORDER_LEFT - 1; + int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; + + g.setColor(Color.WHITE); + g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); + + /* Draw a reasonable set of tick marks */ + int nTicks = height / TICK_SPACING; + if (nTicks > MAX_TICKS) + nTicks = MAX_TICKS; + + int tickInterval = (gy1 - gy0 + 1) / nTicks; + if (tickInterval == 0) + tickInterval = 1; + + /* Tick interval should be of the family A * 10^B, + where A = 1, 2 * or 5. We tend more to rounding A up, to reduce + rather than increase the number of ticks. */ + int B = (int)(Math.log(tickInterval) / Math.log(10)); + int A = (int)(tickInterval / Math.pow(10, B) + 0.5); + if (A > 2) A = 5; + else if (A > 5) A = 10; + + tickInterval = A * (int)Math.pow(10, B); + + /* Ticks are printed at multiples of tickInterval */ + int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; + while (tick <= gy1) { + int stick = screenY(tick) + BORDER_TOP; + rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); + g.drawLine(axis_x - TICK_WIDTH / 2, stick, + axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); + tick += tickInterval; + } + + } + + /* Draw graph for mote nodeId */ + protected void drawGraph(Graphics g, int nodeId) { + SingleGraph sg = new SingleGraph(g, nodeId); + + if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel + for (int sx = 0; sx < width; sx++) + sg.nextPoint(g, graphX(sx), sx); + else // Less points than pixel-iterate by points + for (int gx = gx0; gx <= gx1; gx++) + sg.nextPoint(g, gx, screenX(gx)); + } + + /* Inner class to simplify drawing a graph. Simplify initialise it, then + feed it the X screen and graph coordinates, from left to right. */ + private class SingleGraph { + int lastsx, lastsy, nodeId; + + /* Start drawing the graph mote id */ + SingleGraph(Graphics g, int id) { + nodeId = id; + lastsx = -1; + lastsy = -1; + } + + /* Next point in mote's graph is at x value gx, screen coordinate sx */ + void nextPoint(Graphics g, int gx, int sx) { + int gy = parent.parent.data.getData(nodeId, gx); + int sy = -1; + + if (gy >= 0) { // Ignore missing values + double rsy = height - yscale * (gy - gy0); + + // Ignore problem values + if (rsy >= -1e6 && rsy <= 1e6) + sy = (int)(rsy + 0.5); + + if (lastsy >= 0 && sy >= 0) + g.drawLine(lastsx, lastsy, sx, sy); + } + lastsx = sx; + lastsy = sy; + } + } + + /* Update X-axis range in GUI */ + void updateXLabel() { + parent.xLabel.setText("X: " + gx0 + " - " + gx1); + } + + /* Ensure that graph is nicely positioned on screen. max is the largest + sample number received from any mote. */ + private void recenter(int max) { + // New data will show up at the 3/4 point + // The 2nd term ensures that gx1 will be >= max + int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); + gx0 += scrollby; + gx1 += scrollby; + if (gx0 < 0) { // don't bother showing negative sample numbers + gx1 -= gx0; + gx0 = 0; + } + updateXLabel(); + } + + /* New data received. Redraw graph, scrolling if necessary */ + void newData() { + int max = parent.parent.data.maxX(); + + if (max > gx1 || max < gx0) // time to scroll + recenter(max); + repaint(); + } + + /* User set the X-axis scale to newScale */ + void setScale(int newScale) { + gx1 = gx0 + (MIN_WIDTH << newScale); + scale = newScale; + recenter(parent.parent.data.maxX()); + repaint(); + } + + /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus + values (return false), or accept, redraw and return true. */ + boolean setYAxis(int newy0, int newy1) { + if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || + newy1 < 0 || newy1 > 65535) + return false; + gy0 = newy0; + gy1 = newy1; + repaint(); + return true; + } +} diff --git a/apps/MultihopOscilloscope/java/Makefile b/apps/MultihopOscilloscope/java/Makefile new file mode 100644 index 00000000..55c2605b --- /dev/null +++ b/apps/MultihopOscilloscope/java/Makefile @@ -0,0 +1,21 @@ +GEN=OscilloscopeMsg.java Constants.java + +all: oscilloscope.jar + +oscilloscope.jar: Oscilloscope.class + jar cf $@ *.class + +OscilloscopeMsg.java: ../MultihopOscilloscope.h + mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@ + +Constants.java: ../MultihopOscilloscope.h + ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ + +Oscilloscope.class: $(wildcard *.java) $(GEN) + javac *.java + +clean: + rm -f *.class $(GEN) + +veryclean: clean + rm oscilloscope.jar diff --git a/apps/MultihopOscilloscope/java/Node.java b/apps/MultihopOscilloscope/java/Node.java new file mode 100644 index 00000000..cfe8db9e --- /dev/null +++ b/apps/MultihopOscilloscope/java/Node.java @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Class holding all data received from a mote. + */ +class Node { + /* Data is hold in an array whose size is a multiple of INCREMENT, and + INCREMENT itself must be a multiple of Constant.NREADINGS. This + simplifies handling the extension and clipping of old data + (see setEnd) */ + final static int INCREMENT = 100 * Constants.NREADINGS; + final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT + + /* The mote's identifier */ + int id; + + /* Data received from the mote. data[0] is the dataStart'th sample + Indexes 0 through dataEnd - dataStart - 1 hold data. + Samples are 16-bit unsigned numbers, -1 indicates missing data. */ + int[] data; + int dataStart, dataEnd; + + Node(int _id) { + id = _id; + } + + /* Update data to hold received samples newDataIndex .. newEnd. + If we receive data with a lower index, we discard newer data + (we assume the mote rebooted). */ + private void setEnd(int newDataIndex, int newEnd) { + if (newDataIndex < dataStart || data == null) { + /* New data is before the start of what we have. Just throw it + all away and start again */ + dataStart = newDataIndex; + data = new int[INCREMENT]; + } + if (newEnd > dataStart + data.length) { + /* Try extending first */ + if (data.length < MAX_SIZE) { + int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; + if (newLength >= MAX_SIZE) + newLength = MAX_SIZE; + + int[] newData = new int[newLength]; + System.arraycopy(data, 0, newData, 0, data.length); + data = newData; + + } + if (newEnd > dataStart + data.length) { + /* Still doesn't fit. Squish. + We assume INCREMENT >= (newEnd - newDataIndex), and ensure + that dataStart + data.length - INCREMENT = newDataIndex */ + int newStart = newDataIndex + INCREMENT - data.length; + + if (dataStart + data.length > newStart) + System.arraycopy(data, newStart - dataStart, data, 0, + data.length - (newStart - dataStart)); + dataStart = newStart; + } + } + /* Mark any missing data as invalid */ + for (int i = dataEnd < dataStart ? dataStart : dataEnd; + i < newDataIndex; i++) + data[i - dataStart] = -1; + + /* If we receive a count less than the old count, we assume the old + data is invalid */ + dataEnd = newEnd; + + } + + /* Data received containing NREADINGS samples from messageId * NREADINGS + onwards */ + void update(int messageId, int readings[]) { + int start = messageId * Constants.NREADINGS; + setEnd(start, start + Constants.NREADINGS); + for (int i = 0; i < readings.length; i++) + data[start - dataStart + i] = readings[i]; + } + + /* Return value of sample x, or -1 for missing data */ + int getData(int x) { + if (x < dataStart || x >= dataEnd) + return -1; + else + return data[x - dataStart]; + } + + /* Return number of last known sample */ + int maxX() { + return dataEnd - 1; + } +} diff --git a/apps/MultihopOscilloscope/java/Oscilloscope.java b/apps/MultihopOscilloscope/java/Oscilloscope.java new file mode 100644 index 00000000..3db3741f --- /dev/null +++ b/apps/MultihopOscilloscope/java/Oscilloscope.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import net.tinyos.message.*; +import net.tinyos.util.*; +import java.io.*; + +/* The "Oscilloscope" demo app. Displays graphs showing data received from + the Oscilloscope mote application, and allows the user to: + - zoom in or out on the X axis + - set the scale on the Y axis + - change the sampling period + - change the color of each mote's graph + - clear all data + + This application is in three parts: + - the Node and Data objects store data received from the motes and support + simple queries + - the Window and Graph and miscellaneous support objects implement the + GUI and graph drawing + - the Oscilloscope object talks to the motes and coordinates the other + objects + + Synchronization is handled through the Oscilloscope object. Any operation + that reads or writes the mote data must be synchronized on Oscilloscope. + Note that the messageReceived method below is synchronized, so no further + synchronization is needed when updating state based on received messages. +*/ +public class Oscilloscope implements MessageListener +{ + MoteIF mote; + Data data; + Window window; + + /* The current sampling period. If we receive a message from a mote + with a newer version, we update our interval. If we receive a message + with an older version, we broadcast a message with the current interval + and version. If the user changes the interval, we increment the + version and broadcast the new interval and version. */ + int interval = Constants.DEFAULT_INTERVAL; + int version = -1; + + /* Main entry point */ + void run() { + data = new Data(this); + window = new Window(this); + window.setup(); + mote = new MoteIF(PrintStreamMessenger.err); + mote.registerListener(new OscilloscopeMsg(), this); + } + + /* The data object has informed us that nodeId is a previously unknown + mote. Update the GUI. */ + void newNode(int nodeId) { + window.newNode(nodeId); + } + + synchronized public void messageReceived(int dest_addr, Message msg) { + if (msg instanceof OscilloscopeMsg) { + OscilloscopeMsg omsg = (OscilloscopeMsg)msg; + + /* Update interval and mote data */ + periodUpdate(omsg.get_version(), omsg.get_interval()); + data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); + + /* Inform the GUI that new data showed up */ + window.newData(); + } + } + + /* A potentially new version and interval has been received from the + mote */ + void periodUpdate(int moteVersion, int moteInterval) { + if (moteVersion > version) { + /* It's new. Update our vision of the interval. */ + version = moteVersion; + interval = moteInterval; + window.updateSamplePeriod(); + } + else if (moteVersion < version) { + /* It's old. Update the mote's vision of the interval. */ + sendInterval(); + } + } + + /* The user wants to set the interval to newPeriod. Refuse bogus values + and return false, or accept the change, broadcast it, and return + true */ + synchronized boolean setInterval(int newPeriod) { + if (newPeriod < 1 || newPeriod > 65535) + return false; + interval = newPeriod; + version++; + sendInterval(); + return true; + } + + /* Broadcast a version+interval message. */ + void sendInterval() { + OscilloscopeMsg omsg = new OscilloscopeMsg(); + + omsg.set_version(version); + omsg.set_interval(interval); + try { + mote.send(MoteIF.TOS_BCAST_ADDR, omsg); + } + catch (IOException e) { + window.error("Cannot send message to mote"); + } + } + + /* User wants to clear all data. */ + void clear() { + data = new Data(this); + } + + public static void main(String[] args) { + Oscilloscope me = new Oscilloscope(); + me.run(); + } +} diff --git a/apps/MultihopOscilloscope/java/Window.java b/apps/MultihopOscilloscope/java/Window.java new file mode 100644 index 00000000..d7979bf9 --- /dev/null +++ b/apps/MultihopOscilloscope/java/Window.java @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import javax.swing.table.*; +import javax.swing.event.*; +import java.awt.*; +import java.awt.event.*; +import java.util.*; + +/* The main GUI object. Build the GUI and coordinate all user activities */ +class Window +{ + Oscilloscope parent; + Graph graph; + + Font smallFont = new Font("Dialog", Font.PLAIN, 8); + Font boldFont = new Font("Dialog", Font.BOLD, 12); + Font normalFont = new Font("Dialog", Font.PLAIN, 12); + MoteTableModel moteListModel; // GUI view of mote list + JLabel xLabel; // Label displaying X axis range + JTextField sampleText, yText; // inputs for sample period and Y axis range + JFrame frame; + + Window(Oscilloscope parent) { + this.parent = parent; + } + + /* A model for the mote table, and general utility operations on the mote + list */ + class MoteTableModel extends AbstractTableModel { + private ArrayList motes = new ArrayList(); + private ArrayList colors = new ArrayList(); + + /* Initial mote colors cycle through this list. Add more colors if + you want. */ + private Color[] cycle = { + Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, + Color.YELLOW, Color.GRAY, Color.YELLOW + }; + int cycleIndex; + + /* TableModel methods for achieving our table appearance */ + public String getColumnName(int col) { + if (col == 0) + return "Mote"; + else + return "Color"; + } + public int getColumnCount() { return 2; } + public synchronized int getRowCount() { return motes.size(); } + public synchronized Object getValueAt(int row, int col) { + if (col == 0) + return motes.get(row); + else + return colors.get(row); + } + public Class getColumnClass(int col) { + return getValueAt(0, col).getClass(); + } + public boolean isCellEditable(int row, int col) { return col == 1; } + public synchronized void setValueAt(Object value, int row, int col) { + colors.set(row, value); + fireTableCellUpdated(row, col); + graph.repaint(); + } + + /* Return mote id of i'th mote */ + int get(int i) { return ((Integer)motes.get(i)).intValue(); } + + /* Return color of i'th mote */ + Color getColor(int i) { return (Color)colors.get(i); } + + /* Return number of motes */ + int size() { return motes.size(); } + + /* Add a new mote */ + synchronized void newNode(int nodeId) { + /* Shock, horror. No binary search. */ + int i, len = motes.size(); + + for (i = 0; ; i++) + if (i == len || nodeId < get(i)) { + motes.add(i, new Integer(nodeId)); + // Cycle through a set of initial colors + colors.add(i, cycle[cycleIndex++ % cycle.length]); + break; + } + fireTableRowsInserted(i, i); + } + + /* Remove all motes */ + void clear() { + motes = new ArrayList(); + colors = new ArrayList(); + fireTableDataChanged(); + } + } + + /* A simple full-color cell */ + static class MoteColor extends JLabel implements TableCellRenderer { + public MoteColor() { setOpaque(true); } + public Component getTableCellRendererComponent + (JTable table, Object color, + boolean isSelected, boolean hasFocus, int row, int column) { + setBackground((Color)color); + return this; + } + } + + /* Convenience methods for making buttons, labels and textfields. + Simplifies code and ensures a consistent style. */ + + JButton makeButton(String label, ActionListener action) { + JButton button = new JButton(); + button.setText(label); + button.setFont(boldFont); + button.addActionListener(action); + return button; + } + + JLabel makeLabel(String txt, int alignment) { + JLabel label = new JLabel(txt, alignment); + label.setFont(boldFont); + return label; + } + + JLabel makeSmallLabel(String txt, int alignment) { + JLabel label = new JLabel(txt, alignment); + label.setFont(smallFont); + return label; + } + + JTextField makeTextField(int columns, ActionListener action) { + JTextField tf = new JTextField(columns); + tf.setFont(normalFont); + tf.setMaximumSize(tf.getPreferredSize()); + tf.addActionListener(action); + return tf; + } + + /* Build the GUI */ + void setup() { + JPanel main = new JPanel(new BorderLayout()); + + main.setMinimumSize(new Dimension(500, 250)); + main.setPreferredSize(new Dimension(800, 400)); + + // Three panels: mote list, graph, controls + moteListModel = new MoteTableModel(); + JTable moteList = new JTable(moteListModel); + moteList.setDefaultRenderer(Color.class, new MoteColor()); + moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); + moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); + JScrollPane motePanel = new JScrollPane(); + motePanel.getViewport().add(moteList, null); + main.add(motePanel, BorderLayout.WEST); + + graph = new Graph(this); + main.add(graph, BorderLayout.CENTER); + + // Controls. Organised using box layouts. + + // Sample period. + JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); + sampleText = makeTextField(6, new ActionListener() { + public void actionPerformed(ActionEvent e) { setSamplePeriod(); } + } ); + updateSamplePeriod(); + + // Clear data. + JButton clearButton = makeButton("Clear data", new ActionListener() { + public void actionPerformed(ActionEvent e) { clearData(); } + } ); + + // Adjust X-axis zoom. + Box xControl = new Box(BoxLayout.Y_AXIS); + xLabel = makeLabel("", JLabel.CENTER); + final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); + Hashtable xTable = new Hashtable(); + for (int i = 0; i <= 8; i += 2) + xTable.put(new Integer(i), + makeSmallLabel("" + (Graph.MIN_WIDTH << i), + JLabel.CENTER)); + xSlider.setLabelTable(xTable); + xSlider.setPaintLabels(true); + graph.updateXLabel(); + graph.setScale(graph.scale); + xSlider.addChangeListener(new ChangeListener() { + public void stateChanged(ChangeEvent e) { + //if (!xSlider.getValueIsAdjusting()) + graph.setScale((int)xSlider.getValue()); + } + }); + xControl.add(xLabel); + xControl.add(xSlider); + + // Adjust Y-axis range. + JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); + yText = makeTextField(12, new ActionListener() { + public void actionPerformed(ActionEvent e) { setYAxis(); } + } ); + yText.setText(graph.gy0 + " - " + graph.gy1); + + Box controls = new Box(BoxLayout.X_AXIS); + controls.add(clearButton); + controls.add(Box.createHorizontalGlue()); + controls.add(Box.createRigidArea(new Dimension(20, 0))); + controls.add(sampleLabel); + controls.add(sampleText); + controls.add(Box.createHorizontalGlue()); + controls.add(Box.createRigidArea(new Dimension(20, 0))); + controls.add(xControl); + controls.add(yLabel); + controls.add(yText); + main.add(controls, BorderLayout.SOUTH); + + // The frame part + frame = new JFrame("Oscilloscope"); + frame.setSize(main.getPreferredSize()); + frame.getContentPane().add(main); + frame.setVisible(true); + frame.addWindowListener(new WindowAdapter() { + public void windowClosing(WindowEvent e) { System.exit(0); } + }); + } + + /* User operation: clear data */ + void clearData() { + synchronized (parent) { + moteListModel.clear(); + parent.clear(); + graph.newData(); + } + } + + /* User operation: set Y-axis range. */ + void setYAxis() { + String val = yText.getText(); + + try { + int dash = val.indexOf('-'); + if (dash >= 0) { + String min = val.substring(0, dash).trim(); + String max = val.substring(dash + 1).trim(); + + if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) + error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); + return; + } + } + catch (NumberFormatException e) { } + error("Invalid range " + val + " (expected NN-MM)"); + } + + /* User operation: set sample period. */ + void setSamplePeriod() { + String periodS = sampleText.getText().trim(); + try { + int newPeriod = Integer.parseInt(periodS); + if (parent.setInterval(newPeriod)) + return; + } + catch (NumberFormatException e) { } + error("Invalid sample period " + periodS); + } + + /* Notification: sample period changed. */ + void updateSamplePeriod() { + sampleText.setText("" + parent.interval); + } + + /* Notification: new node. */ + void newNode(int nodeId) { + moteListModel.newNode(nodeId); + } + + /* Notification: new data. */ + void newData() { + graph.newData(); + } + + void error(String msg) { + JOptionPane.showMessageDialog(frame, msg, "Error", + JOptionPane.ERROR_MESSAGE); + } +} diff --git a/apps/MultihopOscilloscope/java/run b/apps/MultihopOscilloscope/java/run new file mode 100755 index 00000000..5b5df76f --- /dev/null +++ b/apps/MultihopOscilloscope/java/run @@ -0,0 +1,7 @@ +#!/bin/sh +if cygpath -w / >/dev/null 2>/dev/null; then + CLASSPATH="oscilloscope.jar;$CLASSPATH" +else + CLASSPATH="oscilloscope.jar:$CLASSPATH" +fi +java Oscilloscope diff --git a/apps/Null/Makefile b/apps/Null/Makefile new file mode 100644 index 00000000..dc4b4d37 --- /dev/null +++ b/apps/Null/Makefile @@ -0,0 +1,3 @@ +COMPONENT=NullAppC +include $(MAKERULES) + diff --git a/apps/Null/NullAppC.nc b/apps/Null/NullAppC.nc new file mode 100644 index 00000000..0fc7c971 --- /dev/null +++ b/apps/Null/NullAppC.nc @@ -0,0 +1,46 @@ +/* + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ +/* + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Null is an empty skeleton application. It is useful to test that the + * build environment is functional in its most minimal sense, i.e., you + * can correctly compile an application. + * + * @author Cory Sharp + * @date February 4, 2006 + */ + +configuration NullAppC{} +implementation { + components MainC, NullC; + + MainC.Boot <- NullC; +} + diff --git a/apps/Null/NullC.nc b/apps/Null/NullC.nc new file mode 100644 index 00000000..a104c74a --- /dev/null +++ b/apps/Null/NullC.nc @@ -0,0 +1,49 @@ +/* + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + */ +/* + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Null is an empty skeleton application. It is useful to test that the + * build environment is functional in its most minimal sense, i.e., you + * can correctly compile an application. + * + * @author Cory Sharp + * @date February 4, 2006 + */ +module NullC +{ + uses interface Boot; +} +implementation +{ + event void Boot.booted() + { + } +} + diff --git a/apps/Null/README.txt b/apps/Null/README.txt new file mode 100644 index 00000000..03d9afad --- /dev/null +++ b/apps/Null/README.txt @@ -0,0 +1,20 @@ +$Id$ + +README for Null +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Cory Sharp + +Description: + +Null is an empty skeleton application. It is useful to test that the +build environment is functional in its most minimal sense, i.e., you +can correctly compile an application. + +Tools: + +None. + +Known bugs/limitations: + +Hahaha. Seriously. + diff --git a/apps/Oscilloscope/Makefile b/apps/Oscilloscope/Makefile new file mode 100644 index 00000000..53febb82 --- /dev/null +++ b/apps/Oscilloscope/Makefile @@ -0,0 +1,3 @@ +COMPONENT=OscilloscopeAppC + +include $(MAKERULES) diff --git a/apps/Oscilloscope/Oscilloscope.h b/apps/Oscilloscope/Oscilloscope.h new file mode 100644 index 00000000..1e6af206 --- /dev/null +++ b/apps/Oscilloscope/Oscilloscope.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +// @author David Gay + +#ifndef OSCILLOSCOPE_H +#define OSCILLOSCOPE_H + +enum { + /* Number of readings per message. If you increase this, you may have to + increase the message_t size. */ + NREADINGS = 10, + + /* Default sampling period. */ + DEFAULT_INTERVAL = 256, + + AM_OSCILLOSCOPE = 0x93 +}; + +typedef nx_struct oscilloscope { + nx_uint16_t version; /* Version of the interval. */ + nx_uint16_t interval; /* Samping period. */ + nx_uint16_t id; /* Mote id of sending mote. */ + nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */ + nx_uint16_t readings[NREADINGS]; +} oscilloscope_t; + +#endif diff --git a/apps/Oscilloscope/OscilloscopeAppC.nc b/apps/Oscilloscope/OscilloscopeAppC.nc new file mode 100644 index 00000000..33409bed --- /dev/null +++ b/apps/Oscilloscope/OscilloscopeAppC.nc @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Oscilloscope demo application. Uses the demo sensor - change the + * new DemoSensorC() instantiation if you want something else. + * + * See README.txt file in this directory for usage instructions. + * + * @author David Gay + */ +configuration OscilloscopeAppC { } +implementation +{ + components OscilloscopeC, MainC, ActiveMessageC, LedsC, + new TimerMilliC(), new DemoSensorC() as Sensor, + new AMSenderC(AM_OSCILLOSCOPE), new AMReceiverC(AM_OSCILLOSCOPE); + + OscilloscopeC.Boot -> MainC; + OscilloscopeC.RadioControl -> ActiveMessageC; + OscilloscopeC.AMSend -> AMSenderC; + OscilloscopeC.Receive -> AMReceiverC; + OscilloscopeC.Timer -> TimerMilliC; + OscilloscopeC.Read -> Sensor; + OscilloscopeC.Leds -> LedsC; + + +} diff --git a/apps/Oscilloscope/OscilloscopeC.nc b/apps/Oscilloscope/OscilloscopeC.nc new file mode 100644 index 00000000..a198db8f --- /dev/null +++ b/apps/Oscilloscope/OscilloscopeC.nc @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Oscilloscope demo application. See README.txt file in this directory. + * + * @author David Gay + */ +#include "Timer.h" +#include "Oscilloscope.h" + +module OscilloscopeC +{ + uses { + interface Boot; + interface SplitControl as RadioControl; + interface AMSend; + interface Receive; + interface Timer; + interface Read; + interface Leds; + } +} +implementation +{ + message_t sendbuf; + bool sendbusy; + + /* Current local state - interval, version and accumulated readings */ + oscilloscope_t local; + + uint8_t reading; /* 0 to NREADINGS */ + + /* When we head an Oscilloscope message, we check it's sample count. If + it's ahead of ours, we "jump" forwards (set our count to the received + count). However, we must then suppress our next count increment. This + is a very simple form of "time" synchronization (for an abstract + notion of time). */ + bool suppress_count_change; + + // Use LEDs to report various status issues. + void report_problem() { call Leds.led0Toggle(); } + void report_sent() { call Leds.led1Toggle(); } + void report_received() { call Leds.led2Toggle(); } + + event void Boot.booted() { + local.interval = DEFAULT_INTERVAL; + local.id = TOS_NODE_ID; + if (call RadioControl.start() != SUCCESS) + report_problem(); + } + + void startTimer() { + call Timer.startPeriodic(local.interval); + reading = 0; + } + + event void RadioControl.startDone(error_t error) { + startTimer(); + } + + event void RadioControl.stopDone(error_t error) { + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { + oscilloscope_t *omsg = payload; + + report_received(); + + /* If we receive a newer version, update our interval. + If we hear from a future count, jump ahead but suppress our own change + */ + if (omsg->version > local.version) + { + local.version = omsg->version; + local.interval = omsg->interval; + startTimer(); + } + if (omsg->count > local.count) + { + local.count = omsg->count; + suppress_count_change = TRUE; + } + + return msg; + } + + /* At each sample period: + - if local sample buffer is full, send accumulated samples + - read next sample + */ + event void Timer.fired() { + if (reading == NREADINGS) + { + if (!sendbusy && sizeof local <= call AMSend.maxPayloadLength()) + { + memcpy(call AMSend.getPayload(&sendbuf), &local, sizeof local); + if (call AMSend.send(AM_BROADCAST_ADDR, &sendbuf, sizeof local) == SUCCESS) + sendbusy = TRUE; + } + if (!sendbusy) + report_problem(); + + reading = 0; + /* Part 2 of cheap "time sync": increment our count if we didn't + jump ahead. */ + if (!suppress_count_change) + local.count++; + suppress_count_change = FALSE; + } + if (call Read.read() != SUCCESS) + report_problem(); + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if (error == SUCCESS) + report_sent(); + else + report_problem(); + + sendbusy = FALSE; + } + + event void Read.readDone(error_t result, uint16_t data) { + if (result != SUCCESS) + { + data = 0xffff; + report_problem(); + } + local.readings[reading++] = data; + } +} diff --git a/apps/Oscilloscope/README.txt b/apps/Oscilloscope/README.txt new file mode 100644 index 00000000..a0a01b0b --- /dev/null +++ b/apps/Oscilloscope/README.txt @@ -0,0 +1,39 @@ +README for Oscilloscope +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Oscilloscope is a simple data-collection demo. It periodically samples the +default sensor and broadcasts a message every 10 readings. These readings +can be displayed by the Java "Oscilloscope" application found in the java +subdirectory. The sampling rate starts at 4Hz, but can be changed from the +Java application. + +You can compile Oscilloscope with a sensor board's default sensor by compiling +as follows: + SENSORBOARD= make + +You can change the sensor used by editing OscilloscopeAppC.nc. + +Tools: + +The Java application displays readings it receives from motes running the +Oscilloscope demo via a serial forwarder. To run it, change to the java +subdirectory and type: + make + java net.tinyos.sf.SerialForwarder -comm serial@: + # e.g., java net.tinyps.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2 + # or java net.tinyps.sf.SerialForwarder -comm serial@COM2:telosb + ./run + +The controls at the bootom of the screen allow yoy to zoom in or out the X +axis, change the range of the Y axis, and clear all received data. You can +change the color used to display a mote by clicking on its color in the +mote table. + +Known bugs/limitations: + +None. + + +$Id$ diff --git a/apps/Oscilloscope/java/.cvsignore b/apps/Oscilloscope/java/.cvsignore new file mode 100644 index 00000000..ccd75a30 --- /dev/null +++ b/apps/Oscilloscope/java/.cvsignore @@ -0,0 +1,3 @@ +Constants.java +OscilloscopeMsg.java +oscilloscope.jar diff --git a/apps/Oscilloscope/java/ColorCellEditor.java b/apps/Oscilloscope/java/ColorCellEditor.java new file mode 100644 index 00000000..f88b0b6f --- /dev/null +++ b/apps/Oscilloscope/java/ColorCellEditor.java @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import javax.swing.table.*; +import java.awt.*; +import java.awt.event.*; + +/* Editor for table cells representing colors. Popup a color chooser. */ +public class ColorCellEditor extends AbstractCellEditor + implements TableCellEditor { + private Color color; + private JButton button; + + public ColorCellEditor(String title) { + button = new JButton(); + final JColorChooser chooser = new JColorChooser(); + final JDialog dialog = JColorChooser.createDialog + (button, title, true, chooser, + new ActionListener() { + public void actionPerformed(ActionEvent e) { + color = chooser.getColor(); + } }, + null); + + button.setBorderPainted(false); + button.addActionListener + (new ActionListener () { + public void actionPerformed(ActionEvent e) { + button.setBackground(color); + chooser.setColor(color); + dialog.setVisible(true); + fireEditingStopped(); + } } ); + + } + + public Object getCellEditorValue() { return color; } + public Component getTableCellEditorComponent(JTable table, + Object value, + boolean isSelected, + int row, + int column) { + color = (Color)value; + return button; + } +} + diff --git a/apps/Oscilloscope/java/Data.java b/apps/Oscilloscope/java/Data.java new file mode 100644 index 00000000..ac35aa72 --- /dev/null +++ b/apps/Oscilloscope/java/Data.java @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import java.util.*; + +/* Hold all data received from motes */ +class Data { + /* The mote data is stored in a flat array indexed by a mote's identifier. + A null value indicates no mote with that identifier. */ + private Node[] nodes = new Node[256]; + private Oscilloscope parent; + + Data(Oscilloscope parent) { + this.parent = parent; + } + + /* Data received from mote nodeId containing NREADINGS samples from + messageId * NREADINGS onwards. Tell parent if this is a new node. */ + void update(int nodeId, int messageId, int readings[]) { + if (nodeId >= nodes.length) { + int newLength = nodes.length * 2; + if (nodeId >= newLength) + newLength = nodeId + 1; + + Node newNodes[] = new Node[newLength]; + System.arraycopy(nodes, 0, newNodes, 0, nodes.length); + nodes = newNodes; + } + Node node = nodes[nodeId]; + if (node == null) { + nodes[nodeId] = node = new Node(nodeId); + parent.newNode(nodeId); + } + node.update(messageId, readings); + } + + /* Return value of sample x for mote nodeId, or -1 for missing data */ + int getData(int nodeId, int x) { + if (nodeId >= nodes.length || nodes[nodeId] == null) + return -1; + return nodes[nodeId].getData(x); + } + + /* Return number of last known sample on mote nodeId. Returns 0 for + unknown motes. */ + int maxX(int nodeId) { + if (nodeId >= nodes.length || nodes[nodeId] == null) + return 0; + return nodes[nodeId].maxX(); + } + + /* Return number of largest known sample on all motes (0 if there are no + motes) */ + int maxX() { + int max = 0; + + for (int i = 0; i < nodes.length; i++) + if (nodes[i] != null) { + int nmax = nodes[i].maxX(); + + if (nmax > max) + max = nmax; + } + + return max; + } +} diff --git a/apps/Oscilloscope/java/Graph.java b/apps/Oscilloscope/java/Graph.java new file mode 100644 index 00000000..9a42c1c8 --- /dev/null +++ b/apps/Oscilloscope/java/Graph.java @@ -0,0 +1,232 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import java.awt.*; +import java.awt.event.*; +import java.awt.font.*; +import java.awt.geom.*; +import java.util.*; + +/* Panel for drawing mote-data graphs */ +class Graph extends JPanel +{ + final static int BORDER_LEFT = 40; + final static int BORDER_RIGHT = 0; + final static int BORDER_TOP = 10; + final static int BORDER_BOTTOM = 10; + + final static int TICK_SPACING = 40; + final static int MAX_TICKS = 16; + final static int TICK_WIDTH = 10; + + final static int MIN_WIDTH = 50; + + int gx0, gx1, gy0, gy1; // graph bounds + int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale + Window parent; + + /* Graph to screen coordinate conversion support */ + int height, width; + double xscale, yscale; + + void updateConversion() { + height = getHeight() - BORDER_TOP - BORDER_BOTTOM; + width = getWidth() - BORDER_LEFT - BORDER_RIGHT; + if (height < 1) + height = 1; + if (width < 1) + width = 1; + xscale = (double)width / (gx1 - gx0 + 1); + yscale = (double)height / (gy1 - gy0 + 1); + } + + Graphics makeClip(Graphics g) { + return g.create(BORDER_LEFT, BORDER_TOP, width, height); + } + + // Note that these do not include the border offset! + int screenX(int gx) { + return (int)(xscale * (gx - gx0) + 0.5); + } + + int screenY(int gy) { + return (int)(height - yscale * (gy - gy0)); + } + + int graphX(int sx) { + return (int)(sx / xscale + gx0 + 0.5); + } + + Graph(Window parent) { + this.parent = parent; + gy0 = 0; gy1 = 0xffff; + gx0 = 0; gx1 = MIN_WIDTH << scale; + } + + void rightDrawString(Graphics2D g, String s, int x, int y) { + TextLayout layout = + new TextLayout(s, parent.smallFont, g.getFontRenderContext()); + Rectangle2D bounds = layout.getBounds(); + layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2); + } + + protected void paintComponent(Graphics g) { + Graphics2D g2d = (Graphics2D)g; + + /* Repaint. Synchronize on Oscilloscope to avoid data changing. + Simply clear panel, draw Y axis and all the mote graphs. */ + synchronized (parent.parent) { + updateConversion(); + g2d.setColor(Color.BLACK); + g2d.fillRect(0, 0, getWidth(), getHeight()); + drawYAxis(g2d); + + Graphics clipped = makeClip(g2d); + int count = parent.moteListModel.size(); + for (int i = 0; i < count; i++) { + clipped.setColor(parent.moteListModel.getColor(i)); + drawGraph(clipped, parent.moteListModel.get(i)); + } + } + } + + /* Draw the Y-axis */ + protected void drawYAxis(Graphics2D g) { + int axis_x = BORDER_LEFT - 1; + int height = getHeight() - BORDER_BOTTOM - BORDER_TOP; + + g.setColor(Color.WHITE); + g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1); + + /* Draw a reasonable set of tick marks */ + int nTicks = height / TICK_SPACING; + if (nTicks > MAX_TICKS) + nTicks = MAX_TICKS; + + int tickInterval = (gy1 - gy0 + 1) / nTicks; + if (tickInterval == 0) + tickInterval = 1; + + /* Tick interval should be of the family A * 10^B, + where A = 1, 2 * or 5. We tend more to rounding A up, to reduce + rather than increase the number of ticks. */ + int B = (int)(Math.log(tickInterval) / Math.log(10)); + int A = (int)(tickInterval / Math.pow(10, B) + 0.5); + if (A > 2) A = 5; + else if (A > 5) A = 10; + + tickInterval = A * (int)Math.pow(10, B); + + /* Ticks are printed at multiples of tickInterval */ + int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval; + while (tick <= gy1) { + int stick = screenY(tick) + BORDER_TOP; + rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick); + g.drawLine(axis_x - TICK_WIDTH / 2, stick, + axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick); + tick += tickInterval; + } + + } + + /* Draw graph for mote nodeId */ + protected void drawGraph(Graphics g, int nodeId) { + SingleGraph sg = new SingleGraph(g, nodeId); + + if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel + for (int sx = 0; sx < width; sx++) + sg.nextPoint(g, graphX(sx), sx); + else // Less points than pixel-iterate by points + for (int gx = gx0; gx <= gx1; gx++) + sg.nextPoint(g, gx, screenX(gx)); + } + + /* Inner class to simplify drawing a graph. Simplify initialise it, then + feed it the X screen and graph coordinates, from left to right. */ + private class SingleGraph { + int lastsx, lastsy, nodeId; + + /* Start drawing the graph mote id */ + SingleGraph(Graphics g, int id) { + nodeId = id; + lastsx = -1; + lastsy = -1; + } + + /* Next point in mote's graph is at x value gx, screen coordinate sx */ + void nextPoint(Graphics g, int gx, int sx) { + int gy = parent.parent.data.getData(nodeId, gx); + int sy = -1; + + if (gy >= 0) { // Ignore missing values + double rsy = height - yscale * (gy - gy0); + + // Ignore problem values + if (rsy >= -1e6 && rsy <= 1e6) + sy = (int)(rsy + 0.5); + + if (lastsy >= 0 && sy >= 0) + g.drawLine(lastsx, lastsy, sx, sy); + } + lastsx = sx; + lastsy = sy; + } + } + + /* Update X-axis range in GUI */ + void updateXLabel() { + parent.xLabel.setText("X: " + gx0 + " - " + gx1); + } + + /* Ensure that graph is nicely positioned on screen. max is the largest + sample number received from any mote. */ + private void recenter(int max) { + // New data will show up at the 3/4 point + // The 2nd term ensures that gx1 will be >= max + int scrollby = ((gx1 - gx0) >> 2) + (max - gx1); + gx0 += scrollby; + gx1 += scrollby; + if (gx0 < 0) { // don't bother showing negative sample numbers + gx1 -= gx0; + gx0 = 0; + } + updateXLabel(); + } + + /* New data received. Redraw graph, scrolling if necessary */ + void newData() { + int max = parent.parent.data.maxX(); + + if (max > gx1 || max < gx0) // time to scroll + recenter(max); + repaint(); + } + + /* User set the X-axis scale to newScale */ + void setScale(int newScale) { + gx1 = gx0 + (MIN_WIDTH << newScale); + scale = newScale; + recenter(parent.parent.data.maxX()); + repaint(); + } + + /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus + values (return false), or accept, redraw and return true. */ + boolean setYAxis(int newy0, int newy1) { + if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 || + newy1 < 0 || newy1 > 65535) + return false; + gy0 = newy0; + gy1 = newy1; + repaint(); + return true; + } +} diff --git a/apps/Oscilloscope/java/Makefile b/apps/Oscilloscope/java/Makefile new file mode 100644 index 00000000..94fe64d0 --- /dev/null +++ b/apps/Oscilloscope/java/Makefile @@ -0,0 +1,21 @@ +GEN=OscilloscopeMsg.java Constants.java + +all: oscilloscope.jar + +oscilloscope.jar: Oscilloscope.class + jar cf $@ *.class + +OscilloscopeMsg.java: ../Oscilloscope.h + mig -target=null -java-classname=OscilloscopeMsg java ../Oscilloscope.h oscilloscope -o $@ + +Constants.java: ../Oscilloscope.h + ncg -target=null -java-classname=Constants java ../Oscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@ + +Oscilloscope.class: $(wildcard *.java) $(GEN) + javac *.java + +clean: + rm -f *.class $(GEN) + +veryclean: clean + rm oscilloscope.jar diff --git a/apps/Oscilloscope/java/Node.java b/apps/Oscilloscope/java/Node.java new file mode 100644 index 00000000..cfe8db9e --- /dev/null +++ b/apps/Oscilloscope/java/Node.java @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Class holding all data received from a mote. + */ +class Node { + /* Data is hold in an array whose size is a multiple of INCREMENT, and + INCREMENT itself must be a multiple of Constant.NREADINGS. This + simplifies handling the extension and clipping of old data + (see setEnd) */ + final static int INCREMENT = 100 * Constants.NREADINGS; + final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT + + /* The mote's identifier */ + int id; + + /* Data received from the mote. data[0] is the dataStart'th sample + Indexes 0 through dataEnd - dataStart - 1 hold data. + Samples are 16-bit unsigned numbers, -1 indicates missing data. */ + int[] data; + int dataStart, dataEnd; + + Node(int _id) { + id = _id; + } + + /* Update data to hold received samples newDataIndex .. newEnd. + If we receive data with a lower index, we discard newer data + (we assume the mote rebooted). */ + private void setEnd(int newDataIndex, int newEnd) { + if (newDataIndex < dataStart || data == null) { + /* New data is before the start of what we have. Just throw it + all away and start again */ + dataStart = newDataIndex; + data = new int[INCREMENT]; + } + if (newEnd > dataStart + data.length) { + /* Try extending first */ + if (data.length < MAX_SIZE) { + int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT; + if (newLength >= MAX_SIZE) + newLength = MAX_SIZE; + + int[] newData = new int[newLength]; + System.arraycopy(data, 0, newData, 0, data.length); + data = newData; + + } + if (newEnd > dataStart + data.length) { + /* Still doesn't fit. Squish. + We assume INCREMENT >= (newEnd - newDataIndex), and ensure + that dataStart + data.length - INCREMENT = newDataIndex */ + int newStart = newDataIndex + INCREMENT - data.length; + + if (dataStart + data.length > newStart) + System.arraycopy(data, newStart - dataStart, data, 0, + data.length - (newStart - dataStart)); + dataStart = newStart; + } + } + /* Mark any missing data as invalid */ + for (int i = dataEnd < dataStart ? dataStart : dataEnd; + i < newDataIndex; i++) + data[i - dataStart] = -1; + + /* If we receive a count less than the old count, we assume the old + data is invalid */ + dataEnd = newEnd; + + } + + /* Data received containing NREADINGS samples from messageId * NREADINGS + onwards */ + void update(int messageId, int readings[]) { + int start = messageId * Constants.NREADINGS; + setEnd(start, start + Constants.NREADINGS); + for (int i = 0; i < readings.length; i++) + data[start - dataStart + i] = readings[i]; + } + + /* Return value of sample x, or -1 for missing data */ + int getData(int x) { + if (x < dataStart || x >= dataEnd) + return -1; + else + return data[x - dataStart]; + } + + /* Return number of last known sample */ + int maxX() { + return dataEnd - 1; + } +} diff --git a/apps/Oscilloscope/java/Oscilloscope.java b/apps/Oscilloscope/java/Oscilloscope.java new file mode 100644 index 00000000..3db3741f --- /dev/null +++ b/apps/Oscilloscope/java/Oscilloscope.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import net.tinyos.message.*; +import net.tinyos.util.*; +import java.io.*; + +/* The "Oscilloscope" demo app. Displays graphs showing data received from + the Oscilloscope mote application, and allows the user to: + - zoom in or out on the X axis + - set the scale on the Y axis + - change the sampling period + - change the color of each mote's graph + - clear all data + + This application is in three parts: + - the Node and Data objects store data received from the motes and support + simple queries + - the Window and Graph and miscellaneous support objects implement the + GUI and graph drawing + - the Oscilloscope object talks to the motes and coordinates the other + objects + + Synchronization is handled through the Oscilloscope object. Any operation + that reads or writes the mote data must be synchronized on Oscilloscope. + Note that the messageReceived method below is synchronized, so no further + synchronization is needed when updating state based on received messages. +*/ +public class Oscilloscope implements MessageListener +{ + MoteIF mote; + Data data; + Window window; + + /* The current sampling period. If we receive a message from a mote + with a newer version, we update our interval. If we receive a message + with an older version, we broadcast a message with the current interval + and version. If the user changes the interval, we increment the + version and broadcast the new interval and version. */ + int interval = Constants.DEFAULT_INTERVAL; + int version = -1; + + /* Main entry point */ + void run() { + data = new Data(this); + window = new Window(this); + window.setup(); + mote = new MoteIF(PrintStreamMessenger.err); + mote.registerListener(new OscilloscopeMsg(), this); + } + + /* The data object has informed us that nodeId is a previously unknown + mote. Update the GUI. */ + void newNode(int nodeId) { + window.newNode(nodeId); + } + + synchronized public void messageReceived(int dest_addr, Message msg) { + if (msg instanceof OscilloscopeMsg) { + OscilloscopeMsg omsg = (OscilloscopeMsg)msg; + + /* Update interval and mote data */ + periodUpdate(omsg.get_version(), omsg.get_interval()); + data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings()); + + /* Inform the GUI that new data showed up */ + window.newData(); + } + } + + /* A potentially new version and interval has been received from the + mote */ + void periodUpdate(int moteVersion, int moteInterval) { + if (moteVersion > version) { + /* It's new. Update our vision of the interval. */ + version = moteVersion; + interval = moteInterval; + window.updateSamplePeriod(); + } + else if (moteVersion < version) { + /* It's old. Update the mote's vision of the interval. */ + sendInterval(); + } + } + + /* The user wants to set the interval to newPeriod. Refuse bogus values + and return false, or accept the change, broadcast it, and return + true */ + synchronized boolean setInterval(int newPeriod) { + if (newPeriod < 1 || newPeriod > 65535) + return false; + interval = newPeriod; + version++; + sendInterval(); + return true; + } + + /* Broadcast a version+interval message. */ + void sendInterval() { + OscilloscopeMsg omsg = new OscilloscopeMsg(); + + omsg.set_version(version); + omsg.set_interval(interval); + try { + mote.send(MoteIF.TOS_BCAST_ADDR, omsg); + } + catch (IOException e) { + window.error("Cannot send message to mote"); + } + } + + /* User wants to clear all data. */ + void clear() { + data = new Data(this); + } + + public static void main(String[] args) { + Oscilloscope me = new Oscilloscope(); + me.run(); + } +} diff --git a/apps/Oscilloscope/java/Window.java b/apps/Oscilloscope/java/Window.java new file mode 100644 index 00000000..d7979bf9 --- /dev/null +++ b/apps/Oscilloscope/java/Window.java @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2006 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +import javax.swing.*; +import javax.swing.table.*; +import javax.swing.event.*; +import java.awt.*; +import java.awt.event.*; +import java.util.*; + +/* The main GUI object. Build the GUI and coordinate all user activities */ +class Window +{ + Oscilloscope parent; + Graph graph; + + Font smallFont = new Font("Dialog", Font.PLAIN, 8); + Font boldFont = new Font("Dialog", Font.BOLD, 12); + Font normalFont = new Font("Dialog", Font.PLAIN, 12); + MoteTableModel moteListModel; // GUI view of mote list + JLabel xLabel; // Label displaying X axis range + JTextField sampleText, yText; // inputs for sample period and Y axis range + JFrame frame; + + Window(Oscilloscope parent) { + this.parent = parent; + } + + /* A model for the mote table, and general utility operations on the mote + list */ + class MoteTableModel extends AbstractTableModel { + private ArrayList motes = new ArrayList(); + private ArrayList colors = new ArrayList(); + + /* Initial mote colors cycle through this list. Add more colors if + you want. */ + private Color[] cycle = { + Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA, + Color.YELLOW, Color.GRAY, Color.YELLOW + }; + int cycleIndex; + + /* TableModel methods for achieving our table appearance */ + public String getColumnName(int col) { + if (col == 0) + return "Mote"; + else + return "Color"; + } + public int getColumnCount() { return 2; } + public synchronized int getRowCount() { return motes.size(); } + public synchronized Object getValueAt(int row, int col) { + if (col == 0) + return motes.get(row); + else + return colors.get(row); + } + public Class getColumnClass(int col) { + return getValueAt(0, col).getClass(); + } + public boolean isCellEditable(int row, int col) { return col == 1; } + public synchronized void setValueAt(Object value, int row, int col) { + colors.set(row, value); + fireTableCellUpdated(row, col); + graph.repaint(); + } + + /* Return mote id of i'th mote */ + int get(int i) { return ((Integer)motes.get(i)).intValue(); } + + /* Return color of i'th mote */ + Color getColor(int i) { return (Color)colors.get(i); } + + /* Return number of motes */ + int size() { return motes.size(); } + + /* Add a new mote */ + synchronized void newNode(int nodeId) { + /* Shock, horror. No binary search. */ + int i, len = motes.size(); + + for (i = 0; ; i++) + if (i == len || nodeId < get(i)) { + motes.add(i, new Integer(nodeId)); + // Cycle through a set of initial colors + colors.add(i, cycle[cycleIndex++ % cycle.length]); + break; + } + fireTableRowsInserted(i, i); + } + + /* Remove all motes */ + void clear() { + motes = new ArrayList(); + colors = new ArrayList(); + fireTableDataChanged(); + } + } + + /* A simple full-color cell */ + static class MoteColor extends JLabel implements TableCellRenderer { + public MoteColor() { setOpaque(true); } + public Component getTableCellRendererComponent + (JTable table, Object color, + boolean isSelected, boolean hasFocus, int row, int column) { + setBackground((Color)color); + return this; + } + } + + /* Convenience methods for making buttons, labels and textfields. + Simplifies code and ensures a consistent style. */ + + JButton makeButton(String label, ActionListener action) { + JButton button = new JButton(); + button.setText(label); + button.setFont(boldFont); + button.addActionListener(action); + return button; + } + + JLabel makeLabel(String txt, int alignment) { + JLabel label = new JLabel(txt, alignment); + label.setFont(boldFont); + return label; + } + + JLabel makeSmallLabel(String txt, int alignment) { + JLabel label = new JLabel(txt, alignment); + label.setFont(smallFont); + return label; + } + + JTextField makeTextField(int columns, ActionListener action) { + JTextField tf = new JTextField(columns); + tf.setFont(normalFont); + tf.setMaximumSize(tf.getPreferredSize()); + tf.addActionListener(action); + return tf; + } + + /* Build the GUI */ + void setup() { + JPanel main = new JPanel(new BorderLayout()); + + main.setMinimumSize(new Dimension(500, 250)); + main.setPreferredSize(new Dimension(800, 400)); + + // Three panels: mote list, graph, controls + moteListModel = new MoteTableModel(); + JTable moteList = new JTable(moteListModel); + moteList.setDefaultRenderer(Color.class, new MoteColor()); + moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color")); + moteList.setPreferredScrollableViewportSize(new Dimension(100, 400)); + JScrollPane motePanel = new JScrollPane(); + motePanel.getViewport().add(moteList, null); + main.add(motePanel, BorderLayout.WEST); + + graph = new Graph(this); + main.add(graph, BorderLayout.CENTER); + + // Controls. Organised using box layouts. + + // Sample period. + JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT); + sampleText = makeTextField(6, new ActionListener() { + public void actionPerformed(ActionEvent e) { setSamplePeriod(); } + } ); + updateSamplePeriod(); + + // Clear data. + JButton clearButton = makeButton("Clear data", new ActionListener() { + public void actionPerformed(ActionEvent e) { clearData(); } + } ); + + // Adjust X-axis zoom. + Box xControl = new Box(BoxLayout.Y_AXIS); + xLabel = makeLabel("", JLabel.CENTER); + final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale); + Hashtable xTable = new Hashtable(); + for (int i = 0; i <= 8; i += 2) + xTable.put(new Integer(i), + makeSmallLabel("" + (Graph.MIN_WIDTH << i), + JLabel.CENTER)); + xSlider.setLabelTable(xTable); + xSlider.setPaintLabels(true); + graph.updateXLabel(); + graph.setScale(graph.scale); + xSlider.addChangeListener(new ChangeListener() { + public void stateChanged(ChangeEvent e) { + //if (!xSlider.getValueIsAdjusting()) + graph.setScale((int)xSlider.getValue()); + } + }); + xControl.add(xLabel); + xControl.add(xSlider); + + // Adjust Y-axis range. + JLabel yLabel = makeLabel("Y:", JLabel.RIGHT); + yText = makeTextField(12, new ActionListener() { + public void actionPerformed(ActionEvent e) { setYAxis(); } + } ); + yText.setText(graph.gy0 + " - " + graph.gy1); + + Box controls = new Box(BoxLayout.X_AXIS); + controls.add(clearButton); + controls.add(Box.createHorizontalGlue()); + controls.add(Box.createRigidArea(new Dimension(20, 0))); + controls.add(sampleLabel); + controls.add(sampleText); + controls.add(Box.createHorizontalGlue()); + controls.add(Box.createRigidArea(new Dimension(20, 0))); + controls.add(xControl); + controls.add(yLabel); + controls.add(yText); + main.add(controls, BorderLayout.SOUTH); + + // The frame part + frame = new JFrame("Oscilloscope"); + frame.setSize(main.getPreferredSize()); + frame.getContentPane().add(main); + frame.setVisible(true); + frame.addWindowListener(new WindowAdapter() { + public void windowClosing(WindowEvent e) { System.exit(0); } + }); + } + + /* User operation: clear data */ + void clearData() { + synchronized (parent) { + moteListModel.clear(); + parent.clear(); + graph.newData(); + } + } + + /* User operation: set Y-axis range. */ + void setYAxis() { + String val = yText.getText(); + + try { + int dash = val.indexOf('-'); + if (dash >= 0) { + String min = val.substring(0, dash).trim(); + String max = val.substring(dash + 1).trim(); + + if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) + error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)"); + return; + } + } + catch (NumberFormatException e) { } + error("Invalid range " + val + " (expected NN-MM)"); + } + + /* User operation: set sample period. */ + void setSamplePeriod() { + String periodS = sampleText.getText().trim(); + try { + int newPeriod = Integer.parseInt(periodS); + if (parent.setInterval(newPeriod)) + return; + } + catch (NumberFormatException e) { } + error("Invalid sample period " + periodS); + } + + /* Notification: sample period changed. */ + void updateSamplePeriod() { + sampleText.setText("" + parent.interval); + } + + /* Notification: new node. */ + void newNode(int nodeId) { + moteListModel.newNode(nodeId); + } + + /* Notification: new data. */ + void newData() { + graph.newData(); + } + + void error(String msg) { + JOptionPane.showMessageDialog(frame, msg, "Error", + JOptionPane.ERROR_MESSAGE); + } +} diff --git a/apps/Oscilloscope/java/run b/apps/Oscilloscope/java/run new file mode 100755 index 00000000..5b5df76f --- /dev/null +++ b/apps/Oscilloscope/java/run @@ -0,0 +1,7 @@ +#!/bin/sh +if cygpath -w / >/dev/null 2>/dev/null; then + CLASSPATH="oscilloscope.jar;$CLASSPATH" +else + CLASSPATH="oscilloscope.jar:$CLASSPATH" +fi +java Oscilloscope diff --git a/apps/Powerup/Makefile b/apps/Powerup/Makefile new file mode 100644 index 00000000..bfe92d41 --- /dev/null +++ b/apps/Powerup/Makefile @@ -0,0 +1,3 @@ +COMPONENT=PowerupAppC +include $(MAKERULES) + diff --git a/apps/Powerup/PowerupAppC.nc b/apps/Powerup/PowerupAppC.nc new file mode 100644 index 00000000..7e4f8061 --- /dev/null +++ b/apps/Powerup/PowerupAppC.nc @@ -0,0 +1,43 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +//@author Cory Sharp + +configuration PowerupAppC{} +implementation { + components MainC, PowerupC, LedsC; + + MainC.Boot <- PowerupC; + + + PowerupC -> LedsC.Leds; +} + diff --git a/apps/Powerup/PowerupC.nc b/apps/Powerup/PowerupC.nc new file mode 100644 index 00000000..21deb83e --- /dev/null +++ b/apps/Powerup/PowerupC.nc @@ -0,0 +1,45 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +//@author Cory Sharp + +module PowerupC +{ + uses interface Boot; + uses interface Leds; +} +implementation +{ + event void Boot.booted() { + call Leds.led0On(); + } +} + diff --git a/apps/Powerup/README.txt b/apps/Powerup/README.txt new file mode 100644 index 00000000..3273d0d7 --- /dev/null +++ b/apps/Powerup/README.txt @@ -0,0 +1,20 @@ +$Id$ + +README for Powerup +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Cory Sharp + +Description: + +Powerup turns on the red LED on powerup. It is useful to test that the +build environment is functional and that an application correctly installs +on a piece of hardware. + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/RadioCountToLeds/.cvsignore b/apps/RadioCountToLeds/.cvsignore new file mode 100644 index 00000000..b7fdc6cf --- /dev/null +++ b/apps/RadioCountToLeds/.cvsignore @@ -0,0 +1,2 @@ +RadioCountMsg.py +RadioCountMsg.java diff --git a/apps/RadioCountToLeds/Makefile b/apps/RadioCountToLeds/Makefile new file mode 100644 index 00000000..f1a70970 --- /dev/null +++ b/apps/RadioCountToLeds/Makefile @@ -0,0 +1,15 @@ +COMPONENT=RadioCountToLedsAppC +BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class + +RadioCountMsg.py: RadioCountToLeds.h + mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h RadioCountMsg -o $@ + +RadioCountMsg.class: RadioCountMsg.java + javac RadioCountMsg.java + +RadioCountMsg.java: RadioCountToLeds.h + mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToLeds.h RadioCountMsg -o $@ + + +include $(MAKERULES) + diff --git a/apps/RadioCountToLeds/README.txt b/apps/RadioCountToLeds/README.txt new file mode 100644 index 00000000..77471ba5 --- /dev/null +++ b/apps/RadioCountToLeds/README.txt @@ -0,0 +1,22 @@ +README for RadioCountToLeds +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +RadioCountToLeds maintains a 4Hz counter and broadcsts its value. A +RadioCountToLeds node that hears a counter displays the bottom three bits +on its LEDs. This application is a useful test to show that basic AM +communication and timers work. + +Tools: + +RadioCountMsg.java is a Java class representing the message that +this application sends. RadioCountMsg.py is a Python class representing +the message that this application sends. + +Known bugs/limitations: + +None. + + +$Id$ diff --git a/apps/RadioCountToLeds/RadioCountToLeds.h b/apps/RadioCountToLeds/RadioCountToLeds.h new file mode 100644 index 00000000..b2d4a68b --- /dev/null +++ b/apps/RadioCountToLeds/RadioCountToLeds.h @@ -0,0 +1,12 @@ +#ifndef RADIO_COUNT_TO_LEDS_H +#define RADIO_COUNT_TO_LEDS_H + +typedef nx_struct RadioCountMsg { + nx_uint16_t counter; +} RadioCountMsg; + +enum { + AM_RADIOCOUNTMSG = 6, +}; + +#endif diff --git a/apps/RadioCountToLeds/RadioCountToLedsAppC.nc b/apps/RadioCountToLeds/RadioCountToLedsAppC.nc new file mode 100644 index 00000000..e19cc16b --- /dev/null +++ b/apps/RadioCountToLeds/RadioCountToLedsAppC.nc @@ -0,0 +1,62 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This application sends OSKI broadcasts at 1Hz and blinks LED 0 when + * it receives a broadcast. + * + * @author Philip Levis + * @date June 6 2005 + */ + +#include "RadioCountToLeds.h" + +configuration RadioCountToLedsAppC {} +implementation { + components MainC, RadioCountToLedsC as App, LedsC; + components new AMSenderC(AM_RADIOCOUNTMSG); + components new AMReceiverC(AM_RADIOCOUNTMSG); + components new TimerMilliC(); + components ActiveMessageC; + + + + App.Boot -> MainC.Boot; + + App.Receive -> AMReceiverC; + App.AMSend -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + App.Packet -> AMSenderC; +} + + diff --git a/apps/RadioCountToLeds/RadioCountToLedsC.nc b/apps/RadioCountToLeds/RadioCountToLedsC.nc new file mode 100644 index 00000000..fc22f57c --- /dev/null +++ b/apps/RadioCountToLeds/RadioCountToLedsC.nc @@ -0,0 +1,138 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI RadioCountToLeds application. This + * application periodically broadcasts a 16-bit counter, and displays + * broadcasts it hears on its LEDs. + * + * @author Philip Levis + * @date June 6 2005 + * + **/ + +#include "Timer.h" +#include "RadioCountToLeds.h" + +module RadioCountToLedsC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface SplitControl as AMControl; + interface Packet; + } +} +implementation { + + message_t packet; + + bool locked; + uint16_t counter = 0; + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call MilliTimer.startPeriodic(1000); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + // do nothing + } + + event void MilliTimer.fired() { + counter++; + dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter); + if (locked) { + return; + } + else { + RadioCountMsg* rcm = (RadioCountMsg*)call Packet.getPayload(&packet, NULL); + if (call Packet.maxPayloadLength() < sizeof(RadioCountMsg)) { + return; + } + + rcm->counter = counter; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(RadioCountMsg)) == SUCCESS) { + dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter); + locked = TRUE; + } + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len); + if (len != sizeof(RadioCountMsg)) {return bufPtr;} + else { + RadioCountMsg* rcm = (RadioCountMsg*)payload; + if (rcm->counter & 0x1) { + call Leds.led0On(); + } + else { + call Leds.led0Off(); + } + if (rcm->counter & 0x2) { + call Leds.led1On(); + } + else { + call Leds.led1Off(); + } + if (rcm->counter & 0x4) { + call Leds.led2On(); + } + else { + call Leds.led2Off(); + } + return bufPtr; + } + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + +} + + + + diff --git a/apps/RadioSenseToLeds/.cvsignore b/apps/RadioSenseToLeds/.cvsignore new file mode 100644 index 00000000..968cab89 --- /dev/null +++ b/apps/RadioSenseToLeds/.cvsignore @@ -0,0 +1,2 @@ +RadioSenseMsg.java +RadioSenseMsg.py diff --git a/apps/RadioSenseToLeds/Makefile b/apps/RadioSenseToLeds/Makefile new file mode 100644 index 00000000..2a916e36 --- /dev/null +++ b/apps/RadioSenseToLeds/Makefile @@ -0,0 +1,15 @@ +COMPONENT=RadioSenseToLedsAppC +BUILD_EXTRA_DEPS = RadioSenseMsg.py RadioSenseMsg.class + +RadioSenseMsg.py: RadioSenseToLeds.h + mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioSenseMsg RadioSenseToLeds.h RadioSenseMsg -o $@ + +RadioSenseMsg.class: RadioSenseMsg.java + javac RadioSenseMsg.java + +RadioSenseMsg.java: RadioSenseToLeds.h + mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioSenseMsg RadioSenseToLeds.h RadioSenseMsg -o $@ + + +include $(MAKERULES) + diff --git a/apps/RadioSenseToLeds/README.txt b/apps/RadioSenseToLeds/README.txt new file mode 100644 index 00000000..21192a6d --- /dev/null +++ b/apps/RadioSenseToLeds/README.txt @@ -0,0 +1,23 @@ +README for RadioSenseToLeds +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +RadioSenseToLeds samples a platform's default sensor at 4Hz and broadcasts +this value in an AM packet. +A RadioSenseToLeds node that hears a counter displays the bottom three bits +on its LEDs. This application is a useful test to show that basic AM +communication, timers, and the default sensor work. + +Tools: + +RadioSenseMsg.java is a Java class representing the message that +this application sends. RadioSenseMsg.py is a Python class representing +the message that this application sends. + +Known bugs/limitations: + +None. + + +$Id$ diff --git a/apps/RadioSenseToLeds/RadioSenseToLeds.h b/apps/RadioSenseToLeds/RadioSenseToLeds.h new file mode 100644 index 00000000..bc4fe328 --- /dev/null +++ b/apps/RadioSenseToLeds/RadioSenseToLeds.h @@ -0,0 +1,13 @@ +#ifndef RADIO_SENSE_TO_LEDS_H +#define RADIO_SENSE_TO_LEDS_H + +typedef nx_struct RadioSenseMsg { + nx_uint16_t error; + nx_uint16_t data; +} RadioSenseMsg; + +enum { + AM_RADIOSENSEMSG = 7, +}; + +#endif diff --git a/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc b/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc new file mode 100644 index 00000000..d59d273c --- /dev/null +++ b/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc @@ -0,0 +1,59 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * + * @author Philip Levis + * @date June 6 2005 + */ + +#include "RadioSenseToLeds.h" + +configuration RadioSenseToLedsAppC {} +implementation { + components MainC, RadioSenseToLedsC as App, LedsC, new DemoSensorC(); + components ActiveMessageC; + components new AMSenderC(AM_RADIOSENSEMSG); + components new AMReceiverC(AM_RADIOSENSEMSG); + components new TimerMilliC(); + + + + App.Boot -> MainC.Boot; + + App.Receive -> AMReceiverC; + App.AMSend -> AMSenderC; + App.RadioControl -> ActiveMessageC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + App.Packet -> AMSenderC; + App.Read -> DemoSensorC; +} diff --git a/apps/RadioSenseToLeds/RadioSenseToLedsC.nc b/apps/RadioSenseToLeds/RadioSenseToLedsC.nc new file mode 100644 index 00000000..53efff01 --- /dev/null +++ b/apps/RadioSenseToLeds/RadioSenseToLedsC.nc @@ -0,0 +1,128 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI RadioSenseToLeds application. This + * application periodically broadcasts a reading from its platform's + * demo sensor, and displays broadcasts it hears on its LEDs. It displays + * the two most signficant bits of the value on LEDs 1 and 2; if there is + * an error, it lights LED 0. + * + * @author Philip Levis + * @date June 12 2005 + * + **/ + +#include "Timer.h" +#include "RadioSenseToLeds.h" + +module RadioSenseToLedsC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface Packet; + interface Read; + interface SplitControl as RadioControl; + } +} +implementation { + + message_t packet; + bool locked = FALSE; + + event void Boot.booted() { + call RadioControl.start(); + } + + event void RadioControl.startDone(error_t err) { + if (err == SUCCESS) { + call MilliTimer.startPeriodic(1000); + } + } + event void RadioControl.stopDone(error_t err) {} + + event void MilliTimer.fired() { + call Read.read(); + } + + event void Read.readDone(error_t result, uint16_t data) { + if (locked) { + return; + } + else { + RadioSenseMsg* rsm; + + rsm = (RadioSenseMsg*)call Packet.getPayload(&packet, NULL); + if (call Packet.maxPayloadLength() < sizeof(RadioSenseMsg)) { + return; + } + rsm->error = result; + rsm->data = data; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(RadioSenseMsg)) == SUCCESS) { + locked = TRUE; + } + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + call Leds.led1Toggle(); + if (len != sizeof(RadioSenseMsg)) {return bufPtr;} + else { + RadioSenseMsg* rsm = (RadioSenseMsg*)payload; + uint16_t val = rsm->data; + call Leds.led0Toggle(); + if (val & 0x8000) { + call Leds.led1On(); + } + else { + call Leds.led1Off(); + } + if (val & 0x4000) { + call Leds.led2On(); + } + else { + call Leds.led2Off(); + } + return bufPtr; + } + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + +} diff --git a/apps/Sense/Makefile b/apps/Sense/Makefile new file mode 100644 index 00000000..0b746763 --- /dev/null +++ b/apps/Sense/Makefile @@ -0,0 +1,3 @@ +COMPONENT=SenseAppC + +include $(MAKERULES) diff --git a/apps/Sense/README.txt b/apps/Sense/README.txt new file mode 100644 index 00000000..695c3e4a --- /dev/null +++ b/apps/Sense/README.txt @@ -0,0 +1,20 @@ +README for Sense +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Sense is a simple sensing demo application. It periodically samples the +default sensor and displays the bottom bits of the readings on the leds of the +node. Have a look at tinyos-2.x/doc/html/tutorial/lesson5.html for a general +tutorial on sensing in TinyOS. + +Tools: + +None. + +Known bugs/limitations: + +None. + + +$Id$ diff --git a/apps/Sense/SenseAppC.nc b/apps/Sense/SenseAppC.nc new file mode 100644 index 00000000..c7a1a652 --- /dev/null +++ b/apps/Sense/SenseAppC.nc @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * @author: Jan Hauer + * ======================================================================== + */ + +/** + * + * Sensing demo application. See README.txt file in this directory for usage + * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html + * for a general tutorial on sensing in TinyOS. + * + * @author Jan Hauer + */ + +configuration SenseAppC +{ +} +implementation { + + components SenseC, MainC, LedsC, new TimerMilliC(), new DemoSensorC() as Sensor; + + SenseC.Boot -> MainC; + SenseC.Leds -> LedsC; + SenseC.Timer -> TimerMilliC; + SenseC.Read -> Sensor; +} diff --git a/apps/Sense/SenseC.nc b/apps/Sense/SenseC.nc new file mode 100644 index 00000000..c2cc90ce --- /dev/null +++ b/apps/Sense/SenseC.nc @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2006, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * @author: Jan Hauer + * ======================================================================== + */ + +/** + * + * Sensing demo application. See README.txt file in this directory for usage + * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html + * for a general tutorial on sensing in TinyOS. + * + * @author Jan Hauer + */ + +#include "Timer.h" + +module SenseC +{ + uses { + interface Boot; + interface Leds; + interface Timer; + interface Read; + } +} +implementation +{ + // sampling frequency in milliseconds + #define SAMPLING_FREQUENCY 100 + + event void Boot.booted() { + call Timer.startPeriodic(SAMPLING_FREQUENCY); + } + + event void Timer.fired() + { + call Read.read(); + } + + event void Read.readDone(error_t result, uint16_t data) + { + if (result == SUCCESS){ + if (data & 0x8000) + call Leds.led2On(); + else + call Leds.led2Off(); + if (data & 0x4000) + call Leds.led1On(); + else + call Leds.led1Off(); + if (data & 0x2000) + call Leds.led0On(); + else + call Leds.led0Off(); + } + } +} diff --git a/apps/tests/RadioStress/Makefile b/apps/tests/RadioStress/Makefile new file mode 100644 index 00000000..17656a9a --- /dev/null +++ b/apps/tests/RadioStress/Makefile @@ -0,0 +1,5 @@ +COMPONENT=RadioStressAppC +PFLAGS += -I%T/lib/oski +#PFLAGS += -g +include $(MAKERULES) + diff --git a/apps/tests/RadioStress/RadioStress.h b/apps/tests/RadioStress/RadioStress.h new file mode 100644 index 00000000..3b8d83c4 --- /dev/null +++ b/apps/tests/RadioStress/RadioStress.h @@ -0,0 +1,7 @@ +typedef nx_struct RadioCountMsg { + nx_uint16_t counter; +} RadioCountMsg; + +enum { + AM_RADIOCOUNTMSG = 6, +}; diff --git a/apps/tests/RadioStress/RadioStressAppC.nc b/apps/tests/RadioStress/RadioStressAppC.nc new file mode 100644 index 00000000..1fb0f06c --- /dev/null +++ b/apps/tests/RadioStress/RadioStressAppC.nc @@ -0,0 +1,63 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This application sends OSKI broadcasts at 1Hz and blinks LED 0 when + * it receives a broadcast. + * + * @author Philip Levis + * @date June 6 2005 + */ + +#include "RadioStress.h" + +configuration RadioStressAppC {} +implementation { + components MainC, RadioStressC as App, LedsC; + components new AMSenderC(AM_RADIOCOUNTMSG); + components new AMReceiverC(AM_RADIOCOUNTMSG); + components new TimerMilliC(); + components ActiveMessageC; + + + + App.Boot -> MainC.Boot; + + App.Receive -> AMReceiverC; + App.AMSend -> AMSenderC; + App.RadioControl -> ActiveMessageC; + App.Leds -> LedsC; + App.Packet -> AMSenderC; + App.Acks -> AMSenderC; + App.Timer -> TimerMilliC; +} + + diff --git a/apps/tests/RadioStress/RadioStressC.nc b/apps/tests/RadioStress/RadioStressC.nc new file mode 100644 index 00000000..30bc6592 --- /dev/null +++ b/apps/tests/RadioStress/RadioStressC.nc @@ -0,0 +1,150 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI RadioCountToLeds application. This + * application periodically broadcasts a 16-bit counter, and displays + * broadcasts it hears on its LEDs. + * + * @author Philip Levis + * @date June 6 2005 + * + **/ + +#include "Timer.h" +#include "RadioStress.h" + +module RadioStressC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface SplitControl as RadioControl; + interface Packet; + interface Timer; + interface PacketAcknowledgements as Acks; + } +} +implementation { + + message_t packet; + + bool locked; + bool resourceHeld; + uint32_t txCounter = 0; + uint32_t ackCounter = 0; + uint32_t rxCounter = 0; + int16_t timerCounter = -1; + uint16_t taskCounter = 0; + uint16_t errorCounter = 0; + + event void Boot.booted() { + call Leds.led0On(); + call RadioControl.start(); + } + + task void sendTask(); + + void sendPacket() { + RadioCountMsg* rcm = (RadioCountMsg*)call Packet.getPayload(&packet, NULL); + if (locked) {return;} + rcm->counter = txCounter; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 2) == SUCCESS) { + locked = TRUE; + } + else { + post sendTask(); + } + } + + task void sendTask() { + taskCounter++; + sendPacket(); + } + + event void RadioControl.startDone(error_t err) { + if (err != SUCCESS) { + call RadioControl.start(); + } + else { + call Leds.led1On(); + call Timer.startPeriodic(1000); + //call Acks.enable(); + } + } + + event void RadioControl.stopDone(error_t err) { + + } + + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + rxCounter++; + if ((rxCounter % 32) == 0) { + call Leds.led0Toggle(); + } + return bufPtr; + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (error != SUCCESS) { + errorCounter++; + } + txCounter++; + if (txCounter % 32 == 0) { + call Leds.led1Toggle(); + } + if (call Acks.wasAcked(bufPtr)) { + ackCounter++; + if (ackCounter % 32 == 0) { + call Leds.led2Toggle(); + } + } + locked = FALSE; + sendPacket(); + } + + event void Timer.fired() { + call Leds.led2Toggle(); + timerCounter++; + if (!locked) { + sendPacket(); + } + + } + +} + + + + diff --git a/apps/tests/RadioStress/gdb-file b/apps/tests/RadioStress/gdb-file new file mode 100644 index 00000000..fc9318f8 --- /dev/null +++ b/apps/tests/RadioStress/gdb-file @@ -0,0 +1,24 @@ +define printTxPps + print RadioStressC$txCounter / RadioStressC$timerCounter + end + +define printAckPps + print RadioStressC$ackCounter / RadioStressC$timerCounter + end + +define printAckPercent + print (double)RadioStressC$ackCounter / (double)RadioStressC$txCounter + end + +define printErrorRate + print (double)RadioStressC$errorCounter / (double)RadioStressC$txCounter + end + +define printErrorPps + print RadioStressC$error / RadioStressC$timerCounter + end + +define printRxPps + print RadioStressC$rxCounter / RadioStressC$timerCounter + end + diff --git a/apps/tests/TestAM/Makefile b/apps/tests/TestAM/Makefile new file mode 100644 index 00000000..81e0d2d6 --- /dev/null +++ b/apps/tests/TestAM/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestAMAppC +PFLAGS += -I%T/lib/oski + +include $(MAKERULES) + diff --git a/apps/tests/TestAM/TestAMAppC.nc b/apps/tests/TestAM/TestAMAppC.nc new file mode 100644 index 00000000..4e5c0fdb --- /dev/null +++ b/apps/tests/TestAM/TestAMAppC.nc @@ -0,0 +1,56 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This application sends active message broadcasts at 1Hz and blinks + * LED 0 when it receives a broadcast. It uses the radio HIL component + * ActiveMessageC, and its packets are AM type 240. + * + * @author Philip Levis + * @date May 16 2005 + */ + +configuration TestAMAppC {} +implementation { + components MainC, TestAMC as App, LedsC; + components ActiveMessageC; + components new TimerMilliC(); + + App.Boot -> MainC.Boot; + + App.Receive -> ActiveMessageC.Receive[240]; + App.AMSend -> ActiveMessageC.AMSend[240]; + App.SplitControl -> ActiveMessageC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; +} + + diff --git a/apps/tests/TestAM/TestAMC.nc b/apps/tests/TestAM/TestAMC.nc new file mode 100644 index 00000000..35bbb617 --- /dev/null +++ b/apps/tests/TestAM/TestAMC.nc @@ -0,0 +1,98 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the TestAM application. + * + * @author Philip Levis + * @date May 16 2005 + * + **/ + +#include "Timer.h" + +module TestAMC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface SplitControl; + } +} +implementation { + + message_t packet; + + bool locked; + uint8_t counter = 0; + + event void Boot.booted() { + call SplitControl.start(); + } + + event void MilliTimer.fired() { + counter++; + if (locked) { + return; + } + else if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) { + call Leds.led0On(); + locked = TRUE; + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + call Leds.led1Toggle(); + return bufPtr; + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + call Leds.led0Off(); + } + } + + event void SplitControl.startDone(error_t err) { + call MilliTimer.startPeriodic(1000); + } + + event void SplitControl.stopDone(error_t err) { + } + +} + + + + diff --git a/apps/tests/TestAMOnOff/Makefile b/apps/tests/TestAMOnOff/Makefile new file mode 100644 index 00000000..3e6b2f9d --- /dev/null +++ b/apps/tests/TestAMOnOff/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestAMOnOffAppC + +include $(MAKERULES) + diff --git a/apps/tests/TestAMOnOff/README b/apps/tests/TestAMOnOff/README new file mode 100644 index 00000000..1b4ddcc3 --- /dev/null +++ b/apps/tests/TestAMOnOff/README @@ -0,0 +1,27 @@ +TestAMOnOff + +This application has two different versions, slave and master. The +version compiled is determined by a compile-time flag (SERVICE_MASTER +or SERVICE_SLAVE). + +To compile a master: + CFLAGS=-DSERVICE_MASTER make + +To compile a slave: + CFLAGS=-DSERVICE_SLAVE make + +A master is always on. A master broadcasts a packet every second. Four of +the five packets are data packets; every fifth packet is a control packet. +It toggles Led0 when it sends a data packet and Led1 when it sends a +control packet. + +When a slave hears a data packet, it toggles Led0. When a slave +hears a control packet, it turns off its radio for a short +period of time. Led1 indicates whether the slave's radio is on. + +If you install a slave and a master, you should see the slave blink +Led0 a few times, then when the master blinks Led1, the slave stops +for a little while, then resumes blinking Led0. + +Philip Levis, 8/7/2005 + diff --git a/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc b/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc new file mode 100644 index 00000000..ede457f4 --- /dev/null +++ b/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc @@ -0,0 +1,73 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This OSKI test application tests whether OSKI can turn the active + * message service on and off. It has two versions: slave and master, + * which are set by a command line -D: SERVICE_SLAVE or + * SERVICE_MASTER. A master is always on, and transmits data packets + * at 1Hz. Every 5s, it transmits a power message. When a slave hears + * a data message, it toggles its red led; when it hears a power + * message, it turns off its radio, which it turns back on in a few + * seconds. This essentially tests whether ActiveMessageC is turning + * the radio off appropriately. It uses AM types 240 (power messages) + * and 241 (data messages). + * + * @author Philip Levis + * @date June 19 2005 + */ + +configuration TestAMOnOffAppC {} +implementation { + components MainC, TestAMOnOffC as App, LedsC; + components new AMSenderC(240) as PowerSend; + components new AMReceiverC(240) as PowerReceive; + components new AMSenderC(241) as DataSend; + components new AMReceiverC(241) as DataReceive; + components new TimerMilliC(); + components ActiveMessageC; + + + + App.Boot -> MainC.Boot; + + App.PowerReceive -> PowerReceive; + App.PowerSend -> PowerSend; + App.DataReceive -> DataReceive; + App.DataSend -> DataSend; + + App.RadioControl -> ActiveMessageC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + +} + + diff --git a/apps/tests/TestAMOnOff/TestAMOnOffC.nc b/apps/tests/TestAMOnOff/TestAMOnOffC.nc new file mode 100644 index 00000000..40455852 --- /dev/null +++ b/apps/tests/TestAMOnOff/TestAMOnOffC.nc @@ -0,0 +1,162 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI TestAMOnOff application. This + * application has two versions: slave and master. A master is always + * on, and transmits data packets at 1Hz. Every 5s, it transmits a + * power message. When a slave hears a data message, it toggles its + * red led; when it hears a power message, it turns off its radio, + * which it turns back on in a few seconds. This essentially tests + * whether ActiveMessageC is turning the radio off appropriately. + * + * @author Philip Levis + * @date June 19 2005 + * + **/ + +#include "Timer.h" + +#if !(defined(SERVICE_SLAVE) || defined(SERVICE_MASTER)) || (defined(SERVICE_SLAVE) && defined(SERVICE_MASTER)) +#error "You must compile with either -DSERVICE_SLAVE or -DSERVICE_MASTER" +#endif + +module TestAMOnOffC { + uses { + interface Leds; + interface Boot; + interface Receive as PowerReceive; + interface AMSend as PowerSend; + interface Receive as DataReceive; + interface AMSend as DataSend; + interface Timer as MilliTimer; + interface SplitControl as RadioControl; + } +} +implementation { + + message_t packet; + + bool locked; + uint8_t counter = 0; + bool on = FALSE; + event void Boot.booted() { + call RadioControl.start(); + call MilliTimer.startPeriodic(1000); + } + + event void MilliTimer.fired() { + call Leds.led2Toggle(); + counter++; +#ifdef SERVICE_SLAVE + if ((counter % 7) == 0) { + if (!on) { + call RadioControl.start(); + } + } +#endif +#ifdef SERVICE_MASTER + if (locked) { + return; + } + if (counter % 5) { + if (call DataSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) { + call Leds.led0Toggle(); + locked = TRUE; + } + } + else { + if (call PowerSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) { + call Leds.led1Toggle(); + locked = TRUE; + } + } +#endif + } + + event message_t* DataReceive.receive(message_t* bufPtr, + void* payload, uint8_t len) { +#ifdef SERVICE_SLAVE + call Leds.led0Toggle(); +#endif + return bufPtr; + } + + event message_t* PowerReceive.receive(message_t* bufPtr, + void* payload, uint8_t len) { +#ifdef SERVICE_SLAVE + if (on) { + call RadioControl.stop(); + } +#endif + return bufPtr; + } + + event void PowerSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + + event void DataSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + + event void RadioControl.startDone(error_t err) { + if (err != SUCCESS) { + call RadioControl.start(); + } + else { + on = TRUE; +#ifdef SERVICE_SLAVE + call Leds.led1On(); +#endif + } + } + + event void RadioControl.stopDone(error_t err) { + if (err != SUCCESS) { + call RadioControl.stop(); + } + else { + on = FALSE; +#ifdef SERVICE_SLAVE + call Leds.led1Off(); +#endif + } + } +} + + + + diff --git a/apps/tests/TestAMService/Makefile b/apps/tests/TestAMService/Makefile new file mode 100644 index 00000000..fc26026c --- /dev/null +++ b/apps/tests/TestAMService/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestAMServiceAppC +PFLAGS += -I%T/lib/oski + +include $(MAKERULES) + diff --git a/apps/tests/TestAMService/TestAMServiceAppC.nc b/apps/tests/TestAMService/TestAMServiceAppC.nc new file mode 100644 index 00000000..6be8bbfe --- /dev/null +++ b/apps/tests/TestAMService/TestAMServiceAppC.nc @@ -0,0 +1,63 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This OSKI test application sends active message broadcasts at 1Hz + * and blinks LED 0 when it receives a broadcast, using active message + * ID 240. It is compatible with the TestAM application, but rather + * than use the ActiveMessageC component, it uses OSKI active message + * services. + * + * @author Philip Levis + * @date May 16 2005 + */ + +configuration TestAMServiceAppC {} +implementation { + components MainC, TestAMServiceC as App, LedsC; + components new AMSenderC(240); + components new AMReceiverC(240); + components new TimerMilliC(); + components new AMServiceC(); + + + + App.Boot -> MainC.Boot; + + App.Receive -> AMReceiverC; + App.AMSend -> AMSenderC; + App.Service -> AMServiceC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + +} + + diff --git a/apps/tests/TestAMService/TestAMServiceC.nc b/apps/tests/TestAMService/TestAMServiceC.nc new file mode 100644 index 00000000..c89f97e0 --- /dev/null +++ b/apps/tests/TestAMService/TestAMServiceC.nc @@ -0,0 +1,93 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI TestAMService application. + * + * @author Philip Levis + * @date May 24 2005 + * + **/ + +#include "Timer.h" + +module TestAMServiceC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface Service; + //interface ServiceNotify; + } +} +implementation { + + message_t packet; + + bool locked; + uint8_t counter = 0; + + event void Boot.booted() { + call Service.start(); + call MilliTimer.startPeriodic(1000); + } + + event void MilliTimer.fired() { + counter++; + if (locked) { + return; + } + else if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) { + call Leds.led0On(); + locked = TRUE; + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + call Leds.led1Toggle(); + return bufPtr; + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + call Leds.led0Off(); + } + } + +} + + + + diff --git a/apps/tests/TestAdc/Makefile b/apps/tests/TestAdc/Makefile new file mode 100644 index 00000000..d5fbac34 --- /dev/null +++ b/apps/tests/TestAdc/Makefile @@ -0,0 +1,3 @@ +COMPONENT=TestAdcAppC +CFLAGS += -I%T/oski +include $(MAKERULES) diff --git a/apps/tests/TestAdc/README.txt b/apps/tests/TestAdc/README.txt new file mode 100644 index 00000000..41c09c9b --- /dev/null +++ b/apps/tests/TestAdc/README.txt @@ -0,0 +1,18 @@ +README for TestAdc +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +TestAdc is an application for testing the ADC subsystem. It requires a generic +platform dependent DemoSensorC, DemoSensorNowC and DemoSensorStreamC components +that provide the following interfaces: Read (DemoSensorC), +ReadStream (DemoSensorStreamC) and ReadNow and Resource (DemoSensorNowC). +It requests data via the three data collection interfaces and switches on +leds 0, 1 and 2 when the conversion results are signalled from the ADC subsystem: + + LED0 denotes a successful Read operation, + LED1 denotes a successful ReadNow operation, + LED2 denotes a successful ReadStream operation. + +Please refer to TEP 101 for more information on the ADC abstraction. + diff --git a/apps/tests/TestAdc/TestAdcAppC.nc b/apps/tests/TestAdc/TestAdcAppC.nc new file mode 100644 index 00000000..a3f05e45 --- /dev/null +++ b/apps/tests/TestAdc/TestAdcAppC.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2004, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * @author: Jan Hauer + * ======================================================================== + */ + +/** + * Tests the AdcC subsystem and switches on leds 0, 1 and 2 + * if the test is successful: + * LED0 denotes a successful Read operation, + * LED1 denotes a successful ReadNow operation, + * LED2 denotes a successful ReadStream operation. + * + * Requires a platform-specific DemoSensorC component that provides + * Read, a platform-specific DemoSensorStreamC component that provides + * ReadStream and a platform-specific DemoSensorNowC component that provides + * ReadNow and Resource + * + * @author Jan Hauer + */ +configuration TestAdcAppC { +} +implementation +{ + components MainC, + TestAdcC, + new DemoSensorC() as Sensor, + new DemoSensorNowC() as SensorNow, + new DemoSensorStreamC() as SensorStream, + LedsC; + + TestAdcC -> MainC.Boot; + + TestAdcC.Leds -> LedsC; + TestAdcC.Read -> Sensor; + TestAdcC.ReadNow -> SensorNow; + TestAdcC.ReadNowResource -> SensorNow; + TestAdcC.ReadStream -> SensorStream; +} + diff --git a/apps/tests/TestAdc/TestAdcC.nc b/apps/tests/TestAdc/TestAdcC.nc new file mode 100644 index 00000000..eeb4555c --- /dev/null +++ b/apps/tests/TestAdc/TestAdcC.nc @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2004, Technische Universitaet Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitaet Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * @author: Jan Hauer + * ======================================================================== + */ + +/** + * Tests the AdcC subsystem and switches on leds 0, 1 and 2 + * if the test is successful: + * LED0 denotes a successful Read operation, + * LED1 denotes a successful ReadNow operation, + * LED2 denotes a successful ReadStream operation. + * + * @author Jan Hauer + */ +module TestAdcC +{ + uses interface Read as Read; + uses interface ReadNow as ReadNow; + uses interface Resource as ReadNowResource; + uses interface ReadStream as ReadStream; + uses interface Boot; + uses interface Leds; +} +implementation +{ +#define BUF_SIZE 100 + uint16_t buf[BUF_SIZE]; + bool streamSuccess; + + event void Boot.booted() + { + streamSuccess = FALSE; + call Read.read(); + call ReadStream.postBuffer(buf, BUF_SIZE); + call ReadStream.read(10000); + call ReadNowResource.request(); + } + + event void Read.readDone(error_t result, uint16_t data) + { + if (result == SUCCESS) + call Leds.led0On(); + } + + event void ReadNowResource.granted() + { + call ReadNow.read(); + } + + async event void ReadNow.readDone(error_t result, uint16_t data) + { + if (result == SUCCESS) + call Leds.led1On(); + call ReadNowResource.release(); + } + + event void ReadStream.bufferDone( error_t result, + uint16_t* buffer, uint16_t count ) + { + streamSuccess = TRUE; + } + + event void ReadStream.readDone(error_t result, uint32_t actualPeriod) + { + if (result == SUCCESS && streamSuccess) + call Leds.led2On(); + } +} + diff --git a/apps/tests/TestAlarm/BlinkC.nc b/apps/tests/TestAlarm/BlinkC.nc new file mode 100644 index 00000000..8834017d --- /dev/null +++ b/apps/tests/TestAlarm/BlinkC.nc @@ -0,0 +1,15 @@ +// $Id$ + +configuration BlinkC +{ +} +implementation +{ + components MainC, BlinkM, LedsC, new AlarmMilliC() as AlarmC; + BlinkM.Boot -> MainC; + + MainC.SoftwareInit -> AlarmC; + BlinkM.Leds -> LedsC; + BlinkM.Alarm -> AlarmC; +} + diff --git a/apps/tests/TestAlarm/BlinkM.nc b/apps/tests/TestAlarm/BlinkM.nc new file mode 100644 index 00000000..5c38391b --- /dev/null +++ b/apps/tests/TestAlarm/BlinkM.nc @@ -0,0 +1,34 @@ +// $Id$ + +#include "Timer.h" + +module BlinkM +{ + uses interface Boot; + uses interface Leds; + uses interface Alarm as Alarm; +} +implementation +{ + enum { DELAY_MILLI = 512 }; + + event void Boot.booted() + { + atomic + { + call Leds.led1On(); + call Alarm.start( DELAY_MILLI ); + } + } + + async event void Alarm.fired() + { + atomic + { + // this usage produces a periodic alarm with no frequency skew + call Alarm.startAt( call Alarm.getAlarm(), DELAY_MILLI ); + call Leds.led0Toggle(); + } + } +} + diff --git a/apps/tests/TestAlarm/Makefile b/apps/tests/TestAlarm/Makefile new file mode 100644 index 00000000..57038bd6 --- /dev/null +++ b/apps/tests/TestAlarm/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkC +include $(MAKERULES) + diff --git a/apps/tests/TestArbiter/TestFcfsArbiter/Makefile b/apps/tests/TestArbiter/TestFcfsArbiter/Makefile new file mode 100644 index 00000000..ff0bfed7 --- /dev/null +++ b/apps/tests/TestArbiter/TestFcfsArbiter/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestArbiterAppC +CFLAGS += -I%T/lib/oski +OPTFLAGS = -O0 +include $(MAKERULES) + diff --git a/apps/tests/TestArbiter/TestFcfsArbiter/README.txt b/apps/tests/TestArbiter/TestFcfsArbiter/README.txt new file mode 100644 index 00000000..5112d71e --- /dev/null +++ b/apps/tests/TestArbiter/TestFcfsArbiter/README.txt @@ -0,0 +1,38 @@ +README for TestFcfsArbiter +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Kevin Klues + +Description: + +Please refer to TEP 108 for more information about the components +this application is used to test. + +This application is used to test the functionality of the +FcfsArbiter component developed using the Resource +interface. Three Resource users are created and all three request +control of the resource before any one of them is granted it. +Once the first user is granted control of the resource, a timer +is set to allow this user to have control of it for a specific +amount of time. Once this timer expires, the resource is released +and then immediately requested again. Upon releasing the resource +control will be granted to the next user that has requested it in FCFS +order. Initial requests are made by the three resource users in the +following order. + -- Resource 0 + -- Resource 2 + -- Resource 1 +It is expected then that using a round robin policy, control of the +resource will be granted in the order of 0,2,1 and the Leds +corresponding to each resource will flash whenever this occurs. + -- Led 0 -> Resource 0 + -- Led 1 -> Resource 1 + -- Led 2 -> Resource 2 + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterAppC.nc b/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterAppC.nc new file mode 100644 index 00000000..a8cd61cb --- /dev/null +++ b/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterAppC.nc @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Please refer to TEP 108 for more information about the components + * this application is used to test.

+ * + * This application is used to test the functionality of the + * FcfsArbiter component developed using the Resource + * interface. Three Resource users are created and all three request + * control of the resource before any one of them is granted it. + * Once the first user is granted control of the resource, a timer + * is set to allow this user to have control of it for a specific + * amount of time. Once this timer expires, the resource is released + * and then immediately requested again. Upon releasing the resource + * control will be granted to the next user that has + * requested it in FCFS order. Initial requests are made + * by the three resource users in the following order
+ *
  • Resource 0 + *
  • Resource 2 + *
  • Resource 1 + *
    + * It is expected then that using a round robin policy, control of the + * resource will be granted in the order of 0,2,1 and the Leds + * corresponding to each resource will flash whenever this occurs.
    + *
  • Led 0 -> Resource 0 + *
  • Led 1 -> Resource 1 + *
  • Led 2 -> Resource 2 + *
    + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#define TEST_ARBITER_RESOURCE "Test.Arbiter.Resource" +configuration TestArbiterAppC{ +} +implementation { + components MainC, TestArbiterC,LedsC, + new TimerMilliC() as Timer0, + new TimerMilliC() as Timer1, + new TimerMilliC() as Timer2, + new FcfsArbiterC(TEST_ARBITER_RESOURCE) as Arbiter; + + enum { + RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE), + RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE), + RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE), + }; + + TestArbiterC -> MainC.Boot; + + MainC.SoftwareInit -> Arbiter; + + TestArbiterC.Resource0 -> Arbiter.Resource[RESOURCE0_ID]; + TestArbiterC.Resource1 -> Arbiter.Resource[RESOURCE1_ID]; + TestArbiterC.Resource2 -> Arbiter.Resource[RESOURCE2_ID]; + TestArbiterC.Timer0 -> Timer0; + TestArbiterC.Timer1 -> Timer1; + TestArbiterC.Timer2 -> Timer2; + + TestArbiterC.Leds -> LedsC; +} + diff --git a/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterC.nc b/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterC.nc new file mode 100644 index 00000000..08bc24dc --- /dev/null +++ b/apps/tests/TestArbiter/TestFcfsArbiter/TestArbiterC.nc @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Please refer to TEP 108 for more information about the components + * this application is used to test + * + * This application is used to test the functionality of the + * FcfsArbiter component developed using the Resource + * interface. Three Resource users are created and all three request + * control of the resource before any one of them is granted it. + * Once the first user is granted control of the resource, a timer + * is set to allow this user to have control of it for a specific + * amount of time. Once this timer expires, the resource is released + * and then immediately requested again. Upon releasing the resource + * control will be granted to the next user that has + * requested it in FCFS order. Initial requests are made + * by the three resource users in the following order
    + *
  • Resource 0 + *
  • Resource 2 + *
  • Resource 1 + *
    + * It is expected then that using a round robin policy, control of the + * resource will be granted in the order of 0,2,1 and the Leds + * corresponding to each resource will flash whenever this occurs.
    + *
  • Led 0 -> Resource 0 + *
  • Led 1 -> Resource 1 + *
  • Led 2 -> Resource 2 + *
    + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#include "Timer.h" + +module TestArbiterC { + uses { + interface Boot; + interface Leds; + interface Resource as Resource0; + interface Resource as Resource1; + interface Resource as Resource2; + interface Timer as Timer0; + interface Timer as Timer1; + interface Timer as Timer2; + } +} +implementation { + + #define HOLD_PERIOD 250 + + //All resources try to gain access + event void Boot.booted() { + call Resource0.request(); + call Resource2.request(); + call Resource1.request(); + } + + //If granted the resource, turn on an LED + event void Resource0.granted() { + call Timer0.startOneShot(HOLD_PERIOD); + call Leds.led0Toggle(); + } + event void Resource1.granted() { + call Timer1.startOneShot(HOLD_PERIOD); + call Leds.led1Toggle(); + } + event void Resource2.granted() { + call Timer2.startOneShot(HOLD_PERIOD); + call Leds.led2Toggle(); + } + + //After the hold period release the resource + event void Timer0.fired() { + call Resource0.release(); + call Resource0.request(); + } + event void Timer1.fired() { + call Resource1.release(); + call Resource1.request(); + } + event void Timer2.fired() { + call Resource2.release(); + call Resource2.request(); + } +} + diff --git a/apps/tests/TestArbiter/TestPriorityArbiter/Makefile b/apps/tests/TestArbiter/TestPriorityArbiter/Makefile new file mode 100644 index 00000000..09772784 --- /dev/null +++ b/apps/tests/TestArbiter/TestPriorityArbiter/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestPriorityArbiterAppC +CFLAGS += -I%T/lib/oski +OPTFLAGS = -O0 +include $(MAKERULES) + diff --git a/apps/tests/TestArbiter/TestPriorityArbiter/README.txt b/apps/tests/TestArbiter/TestPriorityArbiter/README.txt new file mode 100644 index 00000000..daa8f8bd --- /dev/null +++ b/apps/tests/TestArbiter/TestPriorityArbiter/README.txt @@ -0,0 +1,43 @@ +README for TestPriorityArbiter +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Kevin Klues +@author Philipp Huppertz + +Description: + +Please refer to TEP 108 for more information about the components +this application is used to test. + +This application is used to test the functionality of the +FcfsPriorityArbiter component developed using the Resource +interface. + +In this test there are 4 users of one resource. The leds indicate which +user is the owner of the resource: + - normal priority client 1 - led 0 + - normal priority client 2 - led 1 + - power manager - led 2 + - high priority client - led 0 and led 1 and led 2 + +The short flashing of the according leds inidicate that a user has requested the +resource. The users have the following behaviour: + - normal priority clients are idle for a period of time before requesting the resource. + If they are granted the resource they will use it for a specific amount of time before releasing it. + - power manager only request the resource if its idle. It releases the resource immediatly + if there is a request from another client. + - high priority client behaves like a normal client but it will release the resource + after a shorter period of time if there are requests from other clients. + +The poliy of the arbiter should be FirstComeFirstServed with one exception: +If the high priority client requests the resource, the resource will be granted to the +high priority client after the release of the current owner regardless of the internal queue of the arbiter. +After the high priority client releases the resource the normal FCFS arbitration resumes. + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterAppC.nc b/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterAppC.nc new file mode 100644 index 00000000..8f924575 --- /dev/null +++ b/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterAppC.nc @@ -0,0 +1,97 @@ + /* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * ======================================================================== + */ + + /** + * TestPriorityArbiter Application + * This application is used to test the functionality of the FcfsPriorityArbiter + * component developed using the Resource and ResourceUser interfaces. + *
    + * In this test there are 4 users of one ressource. The Leds indicate which + * user is the owner of the resource:
    + *
  • normal priority client 1 - led 0 + *
  • normal priority client 2 - led 1 + *
  • power manager - led 2 + *
  • high priority client - led 0 and led 1 and led 2 + *

    + * The short flashing of the according leds inidicate that a user has requested the + * resource. The users have the following behaviour:

    + *
  • Normal priority clients are idle for a period of time before requesting the resource. + * If they are granted the resource they will use it for a specific amount of time before releasing it. + *
  • Power manager only request the resource if its idle. It releases the resource immediatly + * if there is a request from another client. + *
  • High priority client behaves like a normal client but it will release the resource + * after a shorter period of time if there are requests from other clients. + *

    + * The poliy of the arbiter should be FirstComeFirstServed with one exception: + * If the high priority client requests the resource, the resource will be granted to the + * high priority client after the release of the current owner regardless of the internal queue of the arbiter. After + * the high priority client releases the resource the normal FCFS arbitration resumes. + * + * @author Kevin Klues (klues@tkn.tu-berlin.de) + * @author Philipp Huppertz (extended test FcfsPriorityArbiter) + */ + + + configuration TestPriorityArbiterAppC{ + } + implementation { + components MainC, + TestPriorityArbiterC, + LedsC, + BusyWaitMicroC, + new FcfsPriorityArbiterC("Test.Arbiter.Resource") as Arbiter, + new TimerMilliC() as TimerHigh, + new TimerMilliC() as TimerClient1, + new TimerMilliC() as TimerClient2; + + + + TestPriorityArbiterC -> MainC.Boot; + MainC.SoftwareInit -> LedsC; + MainC.SoftwareInit -> Arbiter; + + + TestPriorityArbiterC.BusyWait -> BusyWaitMicroC; + TestPriorityArbiterC.TimerHighClient -> TimerHigh; + TestPriorityArbiterC.TimerClient1 -> TimerClient1; + TestPriorityArbiterC.TimerClient2 -> TimerClient2; + + + TestPriorityArbiterC.HighClient -> Arbiter.HighPriorityClient; + TestPriorityArbiterC.PowerManager -> Arbiter.LowPriorityClient; + TestPriorityArbiterC.Client2 -> Arbiter.Resource[unique("Test.Arbiter.Resource")]; + TestPriorityArbiterC.Client1 -> Arbiter.Resource[unique("Test.Arbiter.Resource")]; + + TestPriorityArbiterC.Leds -> LedsC; + } + diff --git a/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterC.nc b/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterC.nc new file mode 100644 index 00000000..a7e2abe6 --- /dev/null +++ b/apps/tests/TestArbiter/TestPriorityArbiter/TestPriorityArbiterC.nc @@ -0,0 +1,234 @@ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * - Revision ------------------------------------------------------------- + * $Revision$ + * $Date$ + * ======================================================================== + */ + + +/** + * TestPriorityArbiter Application + * This application is used to test the functionality of the FcfsPriorityArbiter + * component developed using the Resource and ResourceUser interfaces. + *
    + * In this test there are 4 users of one ressource. The Leds indicate which + * user is the owner of the resource:
    + *
  • normal priority client 1 - led 0 + *
  • normal priority client 2 - led 1 + *
  • power manager - led 2 + *
  • high priority client - led 0 and led 1 and led 2 + *

    + * The short flashing of the according leds inidicate that a user has requested the + * resource. The users have the following behaviour:

    + *
  • Normal priority clients are idle for a period of time before requesting the resource. + * If they are granted the resource they will use it for a specific amount of time before releasing it. + *
  • Power manager only request the resource if its idle. It releases the resource immediatly + * if there is a request from another client. + *
  • High priority client behaves like a normal client but it will release the resource + * after a shorter period of time if there are requests from other clients. + *

    + * The poliy of the arbiter should be FirstComeFirstServed with one exception: + * If the high priority client requests the resource, the resource will be granted to the + * high priority client after the release of the current owner regardless of the internal queue of the arbiter. After + * the high priority client releases the resource the normal FCFS arbitration resumes. + * + * @author Kevin Klues (klues@tkn.tu-berlin.de) + * @author Philipp Huppertz (extended test FcfsPriorityArbiter) + */ +#include "Timer.h" + +module TestPriorityArbiterC { + uses { + interface Boot; + interface Leds; + interface Resource as Client1; + interface Resource as Client2; + interface ResourceController as PowerManager; + interface ResourceController as HighClient; + interface BusyWait; + interface Timer as TimerClient1; + interface Timer as TimerClient2; + interface Timer as TimerHighClient; + } +} +implementation { + +#define HIGHCLIENT_FULL_PERIOD 8000 +#define HIGHCLIENT_SAFE_PERIOD 1000 +#define HIGHCLIENT_SLEEP_PERIOD 10000 + +#define CLIENT2_ACTIVE_PERIOD 1000 +#define CLIENT2_WAIT_PERIOD 6000 + +#define CLIENT1_ACTIVE_PERIOD 2000 +#define CLIENT1_WAIT_PERIOD 6000 + + + + // internal states of Resource4 (High Prio Resource) + uint8_t sleepCnt = 0; + bool resReq = FALSE; + + // internal state Resources (active / not active) + bool client1Active = FALSE; + bool client2Active = FALSE; + + + task void startHighClientSafePeriod() { + call TimerHighClient.stop(); + call TimerHighClient.startOneShot(HIGHCLIENT_SAFE_PERIOD); + } + + // flash the apropriate leds when requesting the ressource + event void TimerClient1.fired() { + if (client1Active) { + call Client1.release(); + call TimerClient1.startOneShot(CLIENT1_WAIT_PERIOD); + call Leds.led0Off(); + client1Active = FALSE; + } else { + call Leds.led0Toggle(); + call BusyWait.wait(100); + call Leds.led0Toggle(); + call Client1.request(); + } + } + + // flash the apropriate leds when requesting the ressource + event void TimerClient2.fired() { + if (client2Active) { + call Client2.release(); + call TimerClient2.startOneShot(CLIENT2_WAIT_PERIOD); + call Leds.led1Off(); + client2Active = FALSE; + } else { + call Leds.led1Toggle(); + call BusyWait.wait(100); + call Leds.led1Toggle(); + call Client2.request(); + } + } + + // flash the apropriate leds when requesting the ressource + event void TimerHighClient.fired() { + call Leds.led0Toggle(); + call Leds.led1Toggle(); + call Leds.led2Toggle(); + call BusyWait.wait(100); + call Leds.led0Toggle(); + call Leds.led1Toggle(); + call Leds.led2Toggle(); + call HighClient.release(); + // and request again 'cause we know that one client will be served in between... + call HighClient.request(); + atomic {resReq = FALSE;} + } + + + //All resources try to gain access at the start + event void Boot.booted() { + call Client1.request(); + call Client2.request(); + call HighClient.request(); + } + + //If granted the resource, turn on an LED 0 + event void Client1.granted() { + call Leds.led0On(); + call Leds.led1Off(); + call Leds.led2Off(); + call TimerClient1.startOneShot(CLIENT1_ACTIVE_PERIOD); + client1Active = TRUE; + } + + //If granted the resource, turn on an LED 1 + event void Client2.granted() { + call Leds.led0Off(); + call Leds.led1On(); + call Leds.led2Off(); + call TimerClient2.startOneShot(CLIENT2_ACTIVE_PERIOD); + client2Active = TRUE; + } + + //If granted the resource, turn on an LED 2 + event void PowerManager.granted() { + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2On(); + } + + //If granted the resource, turn on an LED 0 & 1 & 2 + event void HighClient.granted() { + if (sleepCnt > 7) { + // immediatly release resource and sleep + call HighClient.release(); + call TimerHighClient.startOneShot(HIGHCLIENT_SLEEP_PERIOD); + sleepCnt = 0; + } else { + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2On(); + atomic { + if (resReq) { + call TimerHighClient.startOneShot(HIGHCLIENT_SAFE_PERIOD); + } else { + call TimerHighClient.startOneShot(HIGHCLIENT_FULL_PERIOD); + } + } + } + ++sleepCnt; + } + + //If detect that someone else wants the resource, + // release it + async event void PowerManager.requested() { + call PowerManager.release(); + } + + //If detect that someone else wants the resource, + // release it if its safe + async event void HighClient.requested() { + if (!resReq) { + if ( call HighClient.isOwner() ) { + post startHighClientSafePeriod(); + } else {} + atomic {resReq = TRUE;} + } + } + + // do something + async event void PowerManager.idle() { + call PowerManager.request(); + } + + // do nothing + async event void HighClient.idle() { + } +} + diff --git a/apps/tests/TestArbiter/TestRoundRobinArbiter/Makefile b/apps/tests/TestArbiter/TestRoundRobinArbiter/Makefile new file mode 100644 index 00000000..ff0bfed7 --- /dev/null +++ b/apps/tests/TestArbiter/TestRoundRobinArbiter/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestArbiterAppC +CFLAGS += -I%T/lib/oski +OPTFLAGS = -O0 +include $(MAKERULES) + diff --git a/apps/tests/TestArbiter/TestRoundRobinArbiter/README.txt b/apps/tests/TestArbiter/TestRoundRobinArbiter/README.txt new file mode 100644 index 00000000..3b42da3b --- /dev/null +++ b/apps/tests/TestArbiter/TestRoundRobinArbiter/README.txt @@ -0,0 +1,38 @@ +README for TestRoundRobinArbiter +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Kevin Klues + +Description: + +Please refer to TEP 108 for more information about the components +this application is used to test. + +This application is used to test the functionality of the +RoundRobinArbiter component developed using the Resource +interface. Three Resource users are created and all three request +control of the resource before any one of them is granted it. +Once the first user is granted control of the resource, a timer +is set to allow this user to have control of it for a specific +amount of time. Once this timer expires, the resource is released +and then immediately requested again. Upon releasing the resource +control will be granted to the next user that has requested it in +round robin order. Initial requests are made by the three resource +users in the following order. + -- Resource 0 + -- Resource 2 + -- Resource 1 +It is expected then that using a round robin policy, control of the +resource will be granted in the order of 0,1,2 and the Leds +corresponding to each resource will flash whenever this occurs. + -- Led 0 -> Resource 0 + -- Led 1 -> Resource 1 + -- Led 2 -> Resource 2 + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterAppC.nc b/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterAppC.nc new file mode 100644 index 00000000..afc65839 --- /dev/null +++ b/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterAppC.nc @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Please refer to TEP 108 for more information about the components + * this application is used to test.

    + * + * This application is used to test the functionality of the + * RoundRobinArbiter component developed using the Resource + * interface. Three Resource users are created and all three request + * control of the resource before any one of them is granted it. + * Once the first user is granted control of the resource, a timer + * is set to allow this user to have control of it for a specific + * amount of time. Once this timer expires, the resource is released + * and then immediately requested again. Upon releasing the resource + * control will be granted to the next user that has + * requested it in Round Robin order. Initial requests are made + * by the three resource users in the following order
    + *
  • Resource 0 + *
  • Resource 2 + *
  • Resource 1 + *
    + * It is expected then that using a round robin policy, control of the + * resource will be granted in the order of 0,1,2, and the Leds + * corresponding to each resource will flash whenever this occurs.
    + *
  • Led 0 -> Resource 0 + *
  • Led 1 -> Resource 1 + *
  • Led 2 -> Resource 2 + *
    + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#define TEST_ARBITER_RESOURCE "Test.Arbiter.Resource" +configuration TestArbiterAppC{ +} +implementation { + components MainC, TestArbiterC,LedsC, + new TimerMilliC() as Timer0, + new TimerMilliC() as Timer1, + new TimerMilliC() as Timer2, + new RoundRobinArbiterC(TEST_ARBITER_RESOURCE) as Arbiter; + + enum { + RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE), + RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE), + RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE), + }; + + TestArbiterC -> MainC.Boot; + + MainC.SoftwareInit -> Arbiter; + + TestArbiterC.Resource0 -> Arbiter.Resource[RESOURCE0_ID]; + TestArbiterC.Resource1 -> Arbiter.Resource[RESOURCE1_ID]; + TestArbiterC.Resource2 -> Arbiter.Resource[RESOURCE2_ID]; + TestArbiterC.Timer0 -> Timer0; + TestArbiterC.Timer1 -> Timer1; + TestArbiterC.Timer2 -> Timer2; + + TestArbiterC.Leds -> LedsC; +} + diff --git a/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterC.nc b/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterC.nc new file mode 100644 index 00000000..3e4c38c2 --- /dev/null +++ b/apps/tests/TestArbiter/TestRoundRobinArbiter/TestArbiterC.nc @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2004, Technische Universitat Berlin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of the Technische Universitat Berlin nor the names + * of its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Please refer to TEP 108 for more information about the components + * this application is used to test + * + * This application is used to test the functionality of the + * RoundRobinArbiter component developed using the Resource + * interface. Three Resource users are created and all three request + * control of the resource before any one of them is granted it. + * Once the first user is granted control of the resource, a timer + * is set to allow this user to have control of it for a specific + * amount of time. Once this timer expires, the resource is released + * and then immediately requested again. Upon releasing the resource + * control will be granted to the next user that has + * requested it in Round Robin order. Initial requests are made + * by the three resource users in the following order
    + *
  • Resource 0 + *
  • Resource 2 + *
  • Resource 1 + *
    + * It is expected then that using a round robin policy, control of the + * resource will be granted in the order of 0,1,2, and the Leds + * corresponding to each resource will flash whenever this occurs.
    + *
  • Led 0 -> Resource 0 + *
  • Led 1 -> Resource 1 + *
  • Led 2 -> Resource 2 + *
    + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#include "Timer.h" + +module TestArbiterC { + uses { + interface Boot; + interface Leds; + interface Resource as Resource0; + interface Resource as Resource1; + interface Resource as Resource2; + interface Timer as Timer0; + interface Timer as Timer1; + interface Timer as Timer2; + } +} +implementation { + + #define HOLD_PERIOD 250 + + //All resources try to gain access + event void Boot.booted() { + call Resource0.request(); + call Resource2.request(); + call Resource1.request(); + } + + //If granted the resource, turn on an LED + event void Resource0.granted() { + call Timer0.startOneShot(HOLD_PERIOD); + call Leds.led0Toggle(); + } + event void Resource1.granted() { + call Timer1.startOneShot(HOLD_PERIOD); + call Leds.led1Toggle(); + } + event void Resource2.granted() { + call Timer2.startOneShot(HOLD_PERIOD); + call Leds.led2Toggle(); + } + + //After the hold period release the resource + event void Timer0.fired() { + call Resource0.release(); + call Resource0.request(); + } + event void Timer1.fired() { + call Resource1.release(); + call Resource1.request(); + } + event void Timer2.fired() { + call Resource2.release(); + call Resource2.request(); + } +} + diff --git a/apps/tests/TestBroadcast/Makefile b/apps/tests/TestBroadcast/Makefile new file mode 100644 index 00000000..08838d2d --- /dev/null +++ b/apps/tests/TestBroadcast/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestBroadcastAppC +PFLAGS += -I%T/lib/oski + +include $(MAKERULES) + diff --git a/apps/tests/TestBroadcast/TestBroadcastAppC.nc b/apps/tests/TestBroadcast/TestBroadcastAppC.nc new file mode 100644 index 00000000..0574b011 --- /dev/null +++ b/apps/tests/TestBroadcast/TestBroadcastAppC.nc @@ -0,0 +1,61 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This OSKI test application sends broadcasts at 1Hz and blinks + * LED 0 when it receives a broadcast. It uses the OSKI broadcast + * service with broadcast ID 240: it does not interoperate with + * the TestAM or TestAMService applications. + * + * @author Philip Levis + * @date May 16 2005 + */ + +configuration TestBroadcastAppC {} +implementation { + components MainC, TestBroadcastC as App, LedsC; + components new BroadcastSenderC(240) as Sender; + components new BroadcastReceiverC(240) as Receiver; + components new BroadcastServiceC(); + components new TimerMilliC(); + + + + App.Boot -> MainC.Boot; + + App.Receive -> Receiver; + App.Send -> Sender; + App.Service -> BroadcastServiceC.Service; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; +} + + diff --git a/apps/tests/TestBroadcast/TestBroadcastC.nc b/apps/tests/TestBroadcast/TestBroadcastC.nc new file mode 100644 index 00000000..8c503459 --- /dev/null +++ b/apps/tests/TestBroadcast/TestBroadcastC.nc @@ -0,0 +1,88 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the OSKI TestBroadcast application. + * + * @author Philip Levis + * @date May 16 2005 + * + **/ + +#include "Timer.h" + +module TestBroadcastC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface Send; + interface Timer as MilliTimer; + interface Service; + } +} +implementation { + + message_t packet; + bool locked; + + event void Boot.booted() { + call Service.start(); + call MilliTimer.startPeriodic(1000); + } + + event void MilliTimer.fired() { + if (locked) { + return; + } + else if (call Send.send(&packet, 6) == SUCCESS) { + call Leds.led0On(); + locked = TRUE; + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + call Leds.led1Toggle(); + return bufPtr; + } + + event void Send.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + call Leds.led0Off(); + locked = FALSE; + } + } +} + + + + diff --git a/apps/tests/TestCollection/Makefile b/apps/tests/TestCollection/Makefile new file mode 100644 index 00000000..41f1fa1e --- /dev/null +++ b/apps/tests/TestCollection/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestCollectionAppC +CFLAGS += -I$(TOSDIR)/lib/net/collection + +include $(MAKERULES) diff --git a/apps/tests/TestCollection/TestCollectionAppC.nc b/apps/tests/TestCollection/TestCollectionAppC.nc new file mode 100644 index 00000000..8400b5c0 --- /dev/null +++ b/apps/tests/TestCollection/TestCollectionAppC.nc @@ -0,0 +1,21 @@ +/** + * TestCollectionAppC exercises collection. + * + * + * @author Kyle Jamieson + * @version $Id$ + * @see Net2-WG + */ + +configuration TestCollectionAppC {} +implementation { + components TestCollectionC, MainC, LedsC; + + TestCollectionC.Boot -> MainC; + TestCollectionC.Leds -> LedsC; + + components new CollectionSenderC(0xDE); + + components new TimerMilliC(); + TestCollectionC.Timer -> TimerMilliC; +} diff --git a/apps/tests/TestCollection/TestCollectionC.nc b/apps/tests/TestCollection/TestCollectionC.nc new file mode 100644 index 00000000..d128dc22 --- /dev/null +++ b/apps/tests/TestCollection/TestCollectionC.nc @@ -0,0 +1,36 @@ +/** + * @author Kyle Jamieson + * @version $Id$ + */ + +#include +#include +#include + +module TestCollectionC { + uses { + interface Boot; + interface Leds; + interface Timer; + interface Send; + interface Packet; + } +} +implementation { + message_t msg; + + event void Boot.booted() { + if ( TOS_NODE_ID % 4 == 1 ) { + call Timer.startPeriodic(20000); + } + } + + event void Send.sendDone(message_t* m, error_t error) { + } + + event void Timer.fired() { + call Leds.led0Toggle(); + call Leds.led1Toggle(); + dbg("TestCollectionC", "TestCollectionC: Timer fired.\n"); + } +} diff --git a/apps/tests/TestDissemination/Makefile b/apps/tests/TestDissemination/Makefile new file mode 100644 index 00000000..ff2cfed3 --- /dev/null +++ b/apps/tests/TestDissemination/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestDisseminationAppC +CFLAGS += -I$(TOSDIR)/lib/net + +include $(MAKERULES) + diff --git a/apps/tests/TestDissemination/TestDisseminationAppC.nc b/apps/tests/TestDissemination/TestDisseminationAppC.nc new file mode 100644 index 00000000..0d5c6132 --- /dev/null +++ b/apps/tests/TestDissemination/TestDisseminationAppC.nc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** + * TestDisseminationAppC exercises the dissemination layer, by causing + * the node with ID 1 to inject 2 new values into the network every 4 + * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED + * 0 when it sends, and every other node toggles LED 0 when it + * receives the correct value. For the 16-bit object with key 0x2345, + * node 1 toggles LED 1 when it sends, and every other node toggles + * LED 1 when it receives the correct value. + * + * See TEP118 - Dissemination for details. + * + * @author Gilman Tolle + * @version $Revision$ $Date$ + */ + +configuration TestDisseminationAppC {} +implementation { + components TestDisseminationC; + + components MainC; + TestDisseminationC.Boot -> MainC; + + components new DisseminatorC(uint32_t, 0x1234) as Object32C; + TestDisseminationC.Value32 -> Object32C; + TestDisseminationC.Update32 -> Object32C; + + components new DisseminatorC(uint16_t, 0x2345) as Object16C; + TestDisseminationC.Value16 -> Object16C; + TestDisseminationC.Update16 -> Object16C; + + components LedsC; + TestDisseminationC.Leds -> LedsC; + + components new TimerMilliC(); + TestDisseminationC.Timer -> TimerMilliC; +} + diff --git a/apps/tests/TestDissemination/TestDisseminationC.nc b/apps/tests/TestDissemination/TestDisseminationC.nc new file mode 100644 index 00000000..270f61ac --- /dev/null +++ b/apps/tests/TestDissemination/TestDisseminationC.nc @@ -0,0 +1,101 @@ +#include + +/* + * Copyright (c) 2006 Arched Rock Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * - Neither the name of the Arched Rock Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE + * + */ + +/** + * TestDisseminationC exercises the dissemination layer, by causing + * the node with ID 1 to inject 2 new values into the network every 4 + * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED + * 0 when it sends, and every other node toggles LED 0 when it + * receives the correct value. For the 16-bit object with key 0x2345, + * node 1 toggles LED 1 when it sends, and every other node toggles + * LED 1 when it receives the correct value. + * + * See TEP118 - Dissemination for details. + * + * @author Gilman Tolle + * @version $Revision$ $Date$ + */ + +module TestDisseminationC { + uses interface Boot; + + uses interface DisseminationValue as Value32; + uses interface DisseminationUpdate as Update32; + + uses interface DisseminationValue as Value16; + uses interface DisseminationUpdate as Update16; + + uses interface Leds; + + uses interface Timer; +} +implementation { + event void Boot.booted() { + if ( TOS_NODE_ID % 4 == 1 ) { + call Timer.startPeriodic(20000); + } + } + + event void Timer.fired() { + uint32_t newVal32 = 0xDEADBEEF; + uint16_t newVal16 = 0xABCD; + call Leds.led0Toggle(); + call Leds.led1Toggle(); + call Update32.change( &newVal32 ); + call Update16.change( &newVal16 ); + dbg("TestDisseminationC", "TestDisseminationC: Timer fired.\n"); + } + + event void Value32.changed() { + const uint32_t* newVal = call Value32.get(); + if ( *newVal == 0xDEADBEEF ) { + call Leds.led0Toggle(); + dbg("TestDisseminationC", "Received new correct 32-bit value @ %s.\n", sim_time_string()); + } + else { + dbg("TestDisseminationC", "Received new incorrect 32-bit value.\n"); + } + } + + event void Value16.changed() { + const uint16_t* newVal = call Value16.get(); + if ( *newVal == 0xABCD ) { + call Leds.led1Toggle(); + dbg("TestDisseminationC", "Received new correct 16-bit value @ %s.\n", sim_time_string()); + } + else { + dbg("TestDisseminationC", "Received new incorrect 16-bit value: 0x%hx\n", *newVal); + } + } +} diff --git a/apps/tests/TestDissemination/test.py b/apps/tests/TestDissemination/test.py new file mode 100644 index 00000000..75924922 --- /dev/null +++ b/apps/tests/TestDissemination/test.py @@ -0,0 +1,42 @@ +# This script is a simple TOSSIM test of dissemination. +# It builds a 15x15 grid of nodes and has nodes start +# disseminating two values (based on the TinyOS app). +# It prints out when nodes receive new values, including +# the dissemination key and sequence number. You should +# be able to see how the implementation can resolve +# multiple concurrent changes within the network as +# well as more than one value being updated at a time. + +import TOSSIM +import sys + +t = TOSSIM.Tossim([]) +m = t.mac(); +r = t.radio(); +t.init() + +#t.addChannel("LedsC", sys.stdout); +#t.addChannel("AM", sys.stdout); +#t.addChannel("TestDisseminationC", sys.stdout); +t.addChannel("Dissemination", sys.stdout); +#t.addChannel("Gain", sys.stdout); +#t.addChannel("TossimPacketModelC", sys.stdout); + +print (dir(TOSSIM.Tossim)) + +f = open("topo.txt", "r") +lines = f.readlines() +for line in lines: + s = line.split() + if (len(s) > 0): + if (s[0] == "gain"): + r.add(int(s[1]), int(s[2]), float(s[3])) + elif (s[0] == "noise"): + r.setNoise(int(s[1]), float(s[2]), float(s[3])) + +for i in range(0, 225): + m = t.getNode(i); + m.bootAtTime((t.ticksPerSecond() / 50) * i + 43); + +while (t.time() / t.ticksPerSecond() < 600): + t.runNextEvent() diff --git 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a/apps/tests/TestNetwork/.cvsignore b/apps/tests/TestNetwork/.cvsignore new file mode 100644 index 00000000..e31fcb20 --- /dev/null +++ b/apps/tests/TestNetwork/.cvsignore @@ -0,0 +1,7 @@ +build .*.swp +collection_debug_msg.c +collection_debug_msg.h +set_rate_msg.c +set_rate_msg.h +test_network_msg.c +test_network_msg.h diff --git a/apps/tests/TestNetwork/Driver.c b/apps/tests/TestNetwork/Driver.c new file mode 100644 index 00000000..f8b4f430 --- /dev/null +++ b/apps/tests/TestNetwork/Driver.c @@ -0,0 +1,37 @@ +#include +#include +#include +#include + +int main() { + Tossim* t = new Tossim(NULL); + t-> init(); + + for (int i = 0; i < 10; i++) { + Mote* m = t->getNode(i * 5); + m->bootAtTime(rand() % t->ticksPerSecond()); + } + + + t->addChannel("TestNetworkC", stdout); + t->addChannel("Forwarder", stdout); +// t->addChannel("PointerBug", stdout); +// t->addChannel("QueueC", stdout); +// t->addChannel("PoolP", stdout); + //t->addChannel("LITest", stdout); + //t->addChannel("AM", stdout); +// t->addChannel("Route", stdout); + + Radio* r = t->radio(); + for (int i = 0; i < 10; i++) { + r->setNoise(i * 5, -105.0, 1.0); + for (int j = 0; j < 10; j++) { + r->add(i * 5, j * 5, -96.0 - (double)abs(i - j)); + r->add(j * 5, i * 5, -96.0 - (double)abs(i - j)); + } + } + + while(t->time() < 600 * t->ticksPerSecond()) { + t->runNextEvent(); + } +} diff --git a/apps/tests/TestNetwork/Makefile b/apps/tests/TestNetwork/Makefile new file mode 100644 index 00000000..2efeb470 --- /dev/null +++ b/apps/tests/TestNetwork/Makefile @@ -0,0 +1,60 @@ +COMPONENT=TestNetworkAppC +CFLAGS += -I$(TOSDIR)/lib/net -I$(TOSDIR)/lib/net/collection + +TFLAGS += -I$(TOSDIR)/../apps/tests/TestDissemination \ + -I$(TOSDIR)/../support/sdk/c \ + -I$(TOSDIR)/types \ + -I. + +LIBMOTE = $(TOSDIR)/../support/sdk/c/libmote.a +#BUILD_EXTRA_DEPS += tn-injector #tn-listener +LISTEN_OBJS = collection_msg.o test_network_msg.o tn-listener.o $(LIBMOTE) +INJECT_OBJS = set_rate_msg.o tn-injector.o collection_debug_msg.o $(LIBMOTE) + +# arguments: output filename stem, input filename, struct name +define mig_templ +MIGFILES += $(1).c $(1).h $(1).java $(1).o +$(1).c: + mig -o $(1).h c -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) +$(1).java: + mig -o $(1).java java -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3) +endef + +$(eval $(call mig_templ,test_network_msg,TestNetwork.h,TestNetworkMsg)) +$(eval $(call mig_templ,set_rate_msg,$(TOSDIR)/lib/net/DisseminationEngine.h,dissemination_message)) +$(eval $(call mig_templ,collection_debug_msg,$(TOSDIR)/lib/net/collection/CollectionDebugMsg.h,CollectionDebugMsg)) + +%.o: %.c + gcc -v $(TFLAGS) $(CFLAGS) -c -o $@ $< + +tn-listener: $(LISTEN_OBJS) + gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(LISTEN_OBJS) + +tn-injector: $(INJECT_OBJS) + gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(INJECT_OBJS) + +#tn-listener.o: tn-listener.c +# gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< + +tn-injector.o: tn-injector.c test_network_msg.c + gcc $(TFLAGS) $(CFLAGS) -c -o $@ $< + +#test_network_msg.c: +# mig -o test_network_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) TestNetwork.h TestNetworkMsg + +#set_rate_msg.c: +# mig -o set_rate_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/DisseminationEngine.h dissemination_message + +#set_rate_msg.o: set_rate_msg.c +# gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< + +#test_network_msg.o: test_network_msg.c +# gcc $(CFLAGS) $(TFLAGS) -c -o $@ $< + +#collection_msg.c: +# mig -o collection_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/collection/ForwardingEngine.h collection_header + +include $(MAKERULES) + +migclean: + rm -rf $(MIGFILES) diff --git a/apps/tests/TestNetwork/Makefile.Driver b/apps/tests/TestNetwork/Makefile.Driver new file mode 100644 index 00000000..e4ac9d88 --- /dev/null +++ b/apps/tests/TestNetwork/Makefile.Driver @@ -0,0 +1,7 @@ + +all: + make micaz sim + g++ -g -c -o Driver.o Driver.c -I../../../tos/lib/tossim/ -I../../../tos/lib/net -I../../../tos/lib/net/collection + g++ -o Driver Driver.o build/micaz/sim.o build/micaz/tossim.o + + diff --git a/apps/tests/TestNetwork/TestNetwork.h b/apps/tests/TestNetwork/TestNetwork.h new file mode 100644 index 00000000..0f789ec2 --- /dev/null +++ b/apps/tests/TestNetwork/TestNetwork.h @@ -0,0 +1,18 @@ +#ifndef TEST_NETWORK_H +#define TEST_NETWORK_H + +#include +#include "TestNetworkC.h" + +typedef nx_struct TestNetworkMsg { + nx_am_addr_t source; + nx_uint16_t seqno; + nx_am_addr_t parent; + nx_uint16_t metric; + nx_uint16_t data; + nx_uint8_t hopcount; + nx_uint16_t sendCount; + nx_uint16_t sendSuccessCount; +} TestNetworkMsg; + +#endif diff --git a/apps/tests/TestNetwork/TestNetworkAppC.nc b/apps/tests/TestNetwork/TestNetworkAppC.nc new file mode 100644 index 00000000..fabad2c3 --- /dev/null +++ b/apps/tests/TestNetwork/TestNetworkAppC.nc @@ -0,0 +1,52 @@ +/** + * TestNetworkC exercises the basic networking layers, collection and + * dissemination. The application samples DemoSensorC at a basic rate + * and sends packets up a collection tree. The rate is configurable + * through dissemination. + * + * See TEP118: Dissemination and TEP 119: Collection for details. + * + * @author Philip Levis + * @version $Revision$ $Date$ + */ +#include "TestNetwork.h" +#include "Collection.h" + +configuration TestNetworkAppC {} +implementation { + components TestNetworkC, MainC, LedsC, ActiveMessageC; + components new DisseminatorC(uint16_t, SAMPLE_RATE_KEY) as Object16C; + components new CollectionSenderC(CL_TEST); + components TreeCollectionC as Collector; + components new TimerMilliC(); + components new DemoSensorC(); + components new SerialAMSenderC(CL_TEST); + components SerialActiveMessageC; + components new SerialAMSenderC(AM_COLLECTION_DEBUG) as UARTSender; + components UARTDebugSenderP as DebugSender; + components RandomC; + + TestNetworkC.Boot -> MainC; + TestNetworkC.RadioControl -> ActiveMessageC; + TestNetworkC.SerialControl -> SerialActiveMessageC; + TestNetworkC.RoutingControl -> Collector; + TestNetworkC.Leds -> LedsC; + TestNetworkC.Timer -> TimerMilliC; + TestNetworkC.DisseminationPeriod -> Object16C; + TestNetworkC.Send -> CollectionSenderC; + TestNetworkC.ReadSensor -> DemoSensorC; + TestNetworkC.RootControl -> Collector; + TestNetworkC.Receive -> Collector.Receive[CL_TEST]; + TestNetworkC.UARTSend -> SerialAMSenderC.AMSend; + TestNetworkC.CollectionPacket -> Collector; + TestNetworkC.TreeRoutingInspect -> Collector; + TestNetworkC.Random -> RandomC; + + components new PoolC(message_t, 10) as DebugMessagePool; + components new QueueC(message_t*, 10) as DebugSendQueue; + DebugSender.Boot -> MainC; + DebugSender.UARTSend -> UARTSender; + DebugSender.MessagePool -> DebugMessagePool; + DebugSender.SendQueue -> DebugSendQueue; + Collector.CollectionDebug -> DebugSender; +} diff --git a/apps/tests/TestNetwork/TestNetworkC.h b/apps/tests/TestNetwork/TestNetworkC.h new file mode 100644 index 00000000..c9966f8e --- /dev/null +++ b/apps/tests/TestNetwork/TestNetworkC.h @@ -0,0 +1,11 @@ +#ifndef TEST_NETWORK_C_H +#define TEST_NETWORK_C_H + + +enum { + AM_TESTNETWORKMSG = 0x05, + SAMPLE_RATE_KEY = 0x1, + CL_TEST = 0xee, +}; + +#endif diff --git a/apps/tests/TestNetwork/TestNetworkC.nc b/apps/tests/TestNetwork/TestNetworkC.nc new file mode 100644 index 00000000..4ed48a2e --- /dev/null +++ b/apps/tests/TestNetwork/TestNetworkC.nc @@ -0,0 +1,160 @@ +/** + * TestNetworkC exercises the basic networking layers, collection and + * dissemination. The application samples DemoSensorC at a basic rate + * and sends packets up a collection tree. The rate is configurable + * through dissemination. The default send rate is every 10s. + * + * See TEP118: Dissemination and TEP 119: Collection for details. + * + * @author Philip Levis + * @version $Revision$ $Date$ + */ + +#include +#include "TestNetwork.h" + +module TestNetworkC { + uses interface Boot; + uses interface SplitControl as RadioControl; + uses interface SplitControl as SerialControl; + uses interface StdControl as RoutingControl; + uses interface DisseminationValue as DisseminationPeriod; + uses interface Send; + uses interface Leds; + uses interface Read as ReadSensor; + uses interface Timer; + uses interface RootControl; + uses interface Receive; + uses interface AMSend as UARTSend; + uses interface CollectionPacket; + uses interface TreeRoutingInspect; + uses interface Random; +} +implementation { + task void uartEchoTask(); + message_t packet; + message_t uartpacket; + message_t* recvPtr = &uartpacket; + uint8_t msglen; + bool busy = FALSE, uartbusy = FALSE; + bool firstTimer = TRUE; + uint16_t seqno; + + event void Boot.booted() { + call SerialControl.start(); + } + event void SerialControl.startDone(error_t err) { + call RadioControl.start(); + } + event void RadioControl.startDone(error_t err) { + if (err != SUCCESS) { + call RadioControl.start(); + } + else { + call RoutingControl.start(); + if (TOS_NODE_ID % 500 == 0) { + call RootControl.setRoot(); + } + seqno = 0; + call Timer.startOneShot(call Random.rand16() & 0x1ff); + } + } + + event void RadioControl.stopDone(error_t err) {} + event void SerialControl.stopDone(error_t err) {} + + event void Timer.fired() { + call Leds.led0Toggle(); + dbg("TestNetworkC", "TestNetworkC: Timer fired.\n"); + if (firstTimer) { + firstTimer = FALSE; + call Timer.startPeriodic(1024); + } + if (busy || call ReadSensor.read() != SUCCESS) { + signal ReadSensor.readDone(SUCCESS, 0); + return; + } + busy = TRUE; + } + + void failedSend() { + dbg("App", "%s: Send failed.\n", __FUNCTION__); + } + + event void ReadSensor.readDone(error_t err, uint16_t val) { + TestNetworkMsg* msg = (TestNetworkMsg*)call Send.getPayload(&packet); + uint8_t hopcount; + uint16_t metric; + am_addr_t parent; + + call TreeRoutingInspect.getParent(&parent); + call TreeRoutingInspect.getHopcount(&hopcount); + call TreeRoutingInspect.getMetric(&metric); + + msg->source = TOS_NODE_ID; + msg->seqno = seqno; + msg->data = val; + msg->parent = parent; + msg->hopcount = hopcount; + msg->metric = metric; + + if (err != SUCCESS) { + dbg("App", "%s: read done failed.\n", __FUNCTION__); + busy = FALSE; + } + if (call Send.send(&packet, sizeof(TestNetworkMsg)) != SUCCESS) { + failedSend(); + call Leds.led0On(); + dbg("TestNetworkC", "%s: Transmission failed.\n", __FUNCTION__); + } + else { + seqno++; + dbg("TestNetworkC", "%s: Transmission succeeded.\n", __FUNCTION__); + + } + } + + event void Send.sendDone(message_t* m, error_t err) { + if (err != SUCCESS) { + // call Leds.led0On(); + } + else { + busy = FALSE; + } + dbg("TestNetworkC", "Send completed.\n"); + } + + event void DisseminationPeriod.changed() { + const uint16_t* newVal = call DisseminationPeriod.get(); + call Timer.stop(); + call Timer.startPeriodic(*newVal); + } + + event message_t* + Receive.receive(message_t* msg, void* payload, uint8_t len) { + dbg("TestNetworkC", "Received packet at %s from node %hhu.\n", sim_time_string(), call CollectionPacket.getOrigin(msg)); + call Leds.led1Toggle(); + if (!uartbusy) { + message_t* tmp = recvPtr; + recvPtr = msg; + uartbusy = TRUE; + msglen = len + 4; + post uartEchoTask(); + call Leds.led2Toggle(); + return tmp; + } + return msg; + } + + task void uartEchoTask() { + dbg("Traffic", "Sending packet to UART.\n"); + if (call UARTSend.send(0xffff, recvPtr, msglen) != SUCCESS) { + uartbusy = FALSE; + } + } + + event void UARTSend.sendDone(message_t *msg, error_t error) { + dbg("Traffic", "UART send done.\n"); + uartbusy = FALSE; + } +} diff --git a/apps/tests/TestNetwork/sparse-grid.txt b/apps/tests/TestNetwork/sparse-grid.txt new file mode 100644 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+noise 195 -105.12 4.00 +noise 196 -106.37 4.00 +noise 197 -107.20 4.00 +noise 198 -106.28 4.00 +noise 199 -104.01 4.00 +noise 200 -105.85 4.00 +noise 201 -105.60 4.00 +noise 202 -103.91 4.00 +noise 203 -105.07 4.00 +noise 204 -105.75 4.00 +noise 205 -104.77 4.00 +noise 206 -102.30 4.00 +noise 207 -107.39 4.00 +noise 208 -105.65 4.00 +noise 209 -102.82 4.00 +noise 210 -109.21 4.00 +noise 211 -105.20 4.00 +noise 212 -103.75 4.00 +noise 213 -106.22 4.00 +noise 214 -104.94 4.00 +noise 215 -108.01 4.00 +noise 216 -105.58 4.00 +noise 217 -105.94 4.00 +noise 218 -102.37 4.00 +noise 219 -107.01 4.00 +noise 220 -102.30 4.00 +noise 221 -104.20 4.00 +noise 222 -105.14 4.00 +noise 223 -103.82 4.00 +noise 224 -105.47 4.00 diff --git a/apps/tests/TestNetwork/special-topo.txt b/apps/tests/TestNetwork/special-topo.txt new file mode 100644 index 00000000..7023a4a9 --- /dev/null +++ b/apps/tests/TestNetwork/special-topo.txt @@ -0,0 +1,42 @@ +noise 0 -105 5 +noise 1 -105 5 +noise 2 -105 5 +noise 3 -105 5 +noise 4 -105 5 +noise 5 -105 5 + +gain 0 1 -80 +gain 1 0 -90 +gain 0 2 -80 +gain 2 0 -83 +gain 2 3 -70 +gain 3 2 -80 +gain 1 3 -90 +gain 3 1 -92 +gain 4 3 -88 +gain 3 4 -85 +gain 5 3 -60 +gain 3 5 -76 + +gain 0 3 -110 +gain 3 0 -110 +gain 0 4 -110 +gain 4 0 -110 +gain 0 5 -110 +gain 5 0 -110 + +gain 5 1 -110 +gain 1 5 -110 +gain 4 1 -110 +gain 1 4 -110 +gain 2 1 -90 +gain 1 2 -90 + +gain 5 2 -110 +gain 2 5 -110 +gain 4 2 -110 +gain 2 4 -110 + +gain 5 4 -90 +gain 4 5 -90 + diff --git a/apps/tests/TestNetwork/test.py b/apps/tests/TestNetwork/test.py new file mode 100644 index 00000000..cabe01ba --- /dev/null +++ b/apps/tests/TestNetwork/test.py @@ -0,0 +1,45 @@ +from TOSSIM import * +from tinyos.tossim.TossimApp import * +from random import * +import sys + +#n = NescApp("TestNetwork", "app.xml") +#t = Tossim(n.variables.variables()) +t = Tossim([]) +r = t.radio() + +f = open("sparse-grid.txt", "r") +lines = f.readlines() +for line in lines: + s = line.split() + if (len(s) > 0): + if s[0] == "gain": + r.add(int(s[1]), int(s[2]), float(s[3])) + elif s[0] == "noise": + r.setNoise(int(s[1]), float(s[2]), float(s[3])) + +for i in range(0, 10): + m = t.getNode(i); + time = randint(t.ticksPerSecond(), 10 * t.ticksPerSecond()) + m.bootAtTime(time) + print "Booting ", i, " at time ", time + +print "Starting simulation." + +#t.addChannel("AM", sys.stdout) +#t.addChannel("TreeRouting", sys.stdout) +#t.addChannel("TestNetworkC", sys.stdout) +#t.addChannel("Route", sys.stdout) +#t.addChannel("PointerBug", sys.stdout) +#t.addChannel("QueueC", sys.stdout) +#t.addChannel("Gain", sys.stdout) +t.addChannel("Forwarder", sys.stdout) +t.addChannel("TestNetworkC", sys.stdout) +#t.addChannel("App", sys.stdout) +#t.addChannel("Traffic", sys.stdout) +#t.addChannel("Acks", sys.stdout) + +while (t.time() < 1000 * t.ticksPerSecond()): + t.runNextEvent() + +print "Completed simulation." diff --git a/apps/tests/TestNetwork/tn-injector.c b/apps/tests/TestNetwork/tn-injector.c new file mode 100644 index 00000000..d90d8698 --- /dev/null +++ b/apps/tests/TestNetwork/tn-injector.c @@ -0,0 +1,48 @@ +#include +#include +#include + +#include "sfsource.h" +#include "serialpacket.h" +#include "test_network_msg.h" +#include "set_rate_msg.h" +#include "TestNetworkC.h" + +int main(int argc, char **argv) +{ + int fd,i; + + if (argc != 5) { + fprintf(stderr, "Usage: %s - change sample rate (ms/sample)\n", argv[0]); + exit(2); + } + + fd = open_sf_source(argv[1], atoi(argv[2])); + + if (fd < 0) { + fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", + argv[1], argv[2]); + exit(1); + } + uint8_t len = DISSEMINATION_MESSAGE_SIZE + SPACKET_SIZE + sizeof(uint16_t); + void* storage = malloc(len); + tmsg_t* serialMsg = new_tmsg(storage, len); + void* payload = storage + (spacket_data_offsetbits(0) / 8); + tmsg_t* dataMsg = new_tmsg(payload, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t)); + void* data = payload + (dissemination_message_data_offsetbits(0) / 8); + + spacket_header_type_set(serialMsg, DISSEMINATION_MESSAGE_AM_TYPE); + spacket_header_length_set(serialMsg, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t)); + dissemination_message_key_set(dataMsg, SAMPLE_RATE_KEY); + dissemination_message_seqno_set(dataMsg, atoi(argv[3])); + + uint16_t* rate = (uint16_t*)data; + *rate = (uint16_t)atoi(argv[4]); + + printf("Writing packet:\n "); + for (i = 0; i < len; i++) { + printf("%0.2x ", ((uint8_t*)storage)[i]); + } + printf("\n"); + write_sf_packet(fd,storage,len); +} diff --git a/apps/tests/TestNetwork/tn-listener.c b/apps/tests/TestNetwork/tn-listener.c new file mode 100644 index 00000000..2b5dc47a --- /dev/null +++ b/apps/tests/TestNetwork/tn-listener.c @@ -0,0 +1,52 @@ +#include +#include +#include + +#include "sfsource.h" +#include "serialpacket.h" +#include "test_network_msg.h" +#include "collection_msg.h" +#include "set_rate_msg.h" +#include "TestNetworkC.h" + +int main(int argc, char **argv) +{ + int fd,i; + + if (argc != 3) { + fprintf(stderr, "Usage: %s - print received packets\n", argv[0]); + exit(2); + } + + fd = open_sf_source(argv[1], atoi(argv[2])); + + if (fd < 0) { + fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n", + argv[1], argv[2]); + exit(1); + } + + for (;;) { + int len, i; + const unsigned char *packet = read_sf_packet(fd, &len); + char* myPacket = (char*)malloc(len); + memcpy(myPacket, packet, len); + free((void*)packet); + + if (!packet) + exit(0); + else { + tmsg_t* serialMsg = new_tmsg(myPacket, len); + void* payload = (void*)myPacket + (spacket_data_offsetbits(0) / 8); + tmsg_t* dataMsg = new_tmsg(payload, len - SPACKET_SIZE); + void* data = payload + (dissemination_message_data_offsetbits(0) / 8); + + + for (i = 0; i < len; i++) + printf("%02x ", packet[i]); + putchar('\n'); + fflush(stdout); + free((void *)myPacket); + } + } +} diff --git a/apps/tests/TestNetwork/topo.txt b/apps/tests/TestNetwork/topo.txt new file mode 100644 index 00000000..7a223f69 --- /dev/null +++ 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mode 100644 index 00000000..9063cece --- /dev/null +++ b/apps/tests/TestPowerManager/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestPowerManagerAppC +OPTFLAGS = -O0 +PFLAGS += -I%T/lib/oski -I%T/lib/power +include $(MAKERULES) + diff --git a/apps/tests/TestPowerManager/MyComponentC.nc b/apps/tests/TestPowerManager/MyComponentC.nc new file mode 100644 index 00000000..262b33c2 --- /dev/null +++ b/apps/tests/TestPowerManager/MyComponentC.nc @@ -0,0 +1,71 @@ +/* + * "Copyright (c) 2005 Washington University in St. Louis. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY + * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING + * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON + * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR + * MODIFICATIONS." + * + */ + +/** + * Please refer to TEP 115 for more information about the components + * this application is used to test. + * + * This component is used to create a "dummy" non-virtualized component for use + * with the TestPowerManager component. It can be powered on and off through any + * of the AsyncStdControl, StdControl, and SplitControl interfaces. + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#define MYCOMPONENT_RESOURCE "MyComponent.Resource" +configuration MyComponentC{ + provides { + interface Init; + interface Resource[uint8_t]; + } +} +implementation { + components MyComponentP, LedsC, + new TimerMilliC() as StartTimer, new TimerMilliC() as StopTimer, + new FcfsArbiterC(MYCOMPONENT_RESOURCE) as Arbiter, +// new AsyncStdControlPowerManagerC() as PowerManager; +// new AsyncStdControlDeferredPowerManagerC(750) as PowerManager; +// new StdControlPowerManagerC() as PowerManager; +// new StdControlDeferredPowerManagerC(750) as PowerManager; +// new SplitControlPowerManagerC() as PowerManager; + new SplitControlDeferredPowerManagerC(750) as PowerManager; + + Init = Arbiter; + Init = PowerManager; + Init = LedsC; + Resource = Arbiter; + +// PowerManager.AsyncStdControl -> MyComponentP.AsyncStdControl; +// PowerManager.StdControl -> MyComponentP.StdControl; + PowerManager.SplitControl -> MyComponentP.SplitControl; + PowerManager.ArbiterInit -> Arbiter.Init; + PowerManager.ResourceController -> Arbiter.ResourceController; + PowerManager.ArbiterInfo -> Arbiter.ArbiterInfo; + + MyComponentP.Leds -> LedsC; + MyComponentP.StartTimer -> StartTimer; + MyComponentP.StopTimer -> StopTimer; +} + diff --git a/apps/tests/TestPowerManager/MyComponentP.nc b/apps/tests/TestPowerManager/MyComponentP.nc new file mode 100644 index 00000000..71a1d4da --- /dev/null +++ b/apps/tests/TestPowerManager/MyComponentP.nc @@ -0,0 +1,97 @@ +/* + * "Copyright (c) 2005 Washington University in St. Louis. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY + * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING + * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON + * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR + * MODIFICATIONS." + * + */ + +/** + * Please refer to TEP 115 for more information about the components + * this application is used to test. + * + * This component is used to create a "dummy" non-virtualized component for use + * with the TestPowerManager component. It can be powered on and off through any + * of the AsyncStdControl, StdControl, and SplitControl interfaces. + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +module MyComponentP { + provides { + interface SplitControl; + interface StdControl; + interface AsyncStdControl; + } + uses { + interface Leds; + interface Timer as StartTimer; + interface Timer as StopTimer; + } +} +implementation { + + #define START_DELAY 10 + #define STOP_DELAY 10 + + command error_t SplitControl.start() { + call StartTimer.startOneShot(START_DELAY); + return SUCCESS; + } + + event void StartTimer.fired() { + call Leds.led0On(); + signal SplitControl.startDone(SUCCESS); + } + + command error_t SplitControl.stop() { + call StopTimer.startOneShot(STOP_DELAY); + return SUCCESS; + } + + event void StopTimer.fired() { + call Leds.led0Off(); + signal SplitControl.stopDone(SUCCESS); + } + + command error_t StdControl.start() { + call Leds.led0On(); + return SUCCESS; + } + + command error_t StdControl.stop() { + call Leds.led0Off(); + return SUCCESS; + } + + async command error_t AsyncStdControl.start() { + call Leds.led0On(); + return SUCCESS; + } + + async command error_t AsyncStdControl.stop() { + call Leds.led0Off(); + return SUCCESS; + } + + default event void SplitControl.startDone(error_t error) {} + default event void SplitControl.stopDone(error_t error) {} +} + diff --git a/apps/tests/TestPowerManager/README.txt b/apps/tests/TestPowerManager/README.txt new file mode 100644 index 00000000..868470e4 --- /dev/null +++ b/apps/tests/TestPowerManager/README.txt @@ -0,0 +1,56 @@ +README for TestPowerManager +Author/Contact: tinyos-help@millennium.berkeley.edu +@author Kevin Klues + +Description: + +Please refer to TEP 115 for more information about the components +this application is used to test. + +This application tests the functionality of the various non-mcu power +management components that are used with non-virtualized devices. +Different policies can be tested by making a simple wiring change +in the "MyComponentsC" configuration. This component is used +to simulate a non-virtualized device that has a set of resource users +that need to share it. An arbiter component is used to control +access to the resource, and one of the 6 default power management +policies can be chosen to perform shutdown of the device whenever +it is no longer in use. Depending on the power management policy +chosen, power down of the device will occur through either the +AsyncStdControl, StdControl, or SplitControl interfaces and will +occur at different times. The application itself simply wires to +"MyComponentC" and is unaware of the power management policy being +used by it. + +Two resource users are created by the application to share the +"MyComponent" resource. They each hold the device for a specific +amount of time and then release it. There is some delay between +when the first user releases the resource and when the second one +requests it. Since the resource uses one of the default power +management polices, we expect the device to be automatically shutdown +whenever both resource users do not require use of the resource. +Different shutdown times will occur, however, depeneding on which +power mangament policy is under test. The various leds are used to +indicate which resource user currently has control of the resource, +and whether the "MyComponent" device is currently powered on or not. + + -- Led0 0n -> MyComponent" powered on + -- Led0 0ff -> MyComponent" powered off + -- Led1 0n -> Resource 0 controls "MyComponent" resource + -- Led1 0ff -> Resource 0 does not control "MyComponent" resource + -- Led2 0n -> Resource 1 controls "MyComponent" resource + -- Led2 0ff -> Resource 1 does not control "MyComponent" resource + +This application demonstrates, therefore, not only how one would use +one of the provided power management polices to control the power +states of a non-virtualized device, but also how to wire everything +together. + +Tools: + +None. + +Known bugs/limitations: + +None. + diff --git a/apps/tests/TestPowerManager/TestPowerManagerAppC.nc b/apps/tests/TestPowerManager/TestPowerManagerAppC.nc new file mode 100644 index 00000000..99e9a7c7 --- /dev/null +++ b/apps/tests/TestPowerManager/TestPowerManagerAppC.nc @@ -0,0 +1,53 @@ +/* + * "Copyright (c) 2005 Washington University in St. Louis. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY + * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING + * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON + * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR + * MODIFICATIONS." + * + */ + +/** + * Please refer to TEP 115 for more information about the components + * this application is used to test. + * + * This application is used to test the functionality of the non mcu power + * management component for non-virtualized devices. Changes to + * MyComponentC allow one to choose between different Power + * Management policies. + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +configuration TestPowerManagerAppC{ +} +implementation { + components MainC, TestPowerManagerC, MyComponentC, LedsC, new TimerMilliC(); + + TestPowerManagerC -> MainC.Boot; + + MainC.SoftwareInit -> MyComponentC; + + TestPowerManagerC.TimerMilli -> TimerMilliC; + TestPowerManagerC.Resource0 -> MyComponentC.Resource[unique("MyComponent.Resource")]; + TestPowerManagerC.Resource1 -> MyComponentC.Resource[unique("MyComponent.Resource")]; + + TestPowerManagerC.Leds -> LedsC; +} + diff --git a/apps/tests/TestPowerManager/TestPowerManagerC.nc b/apps/tests/TestPowerManager/TestPowerManagerC.nc new file mode 100644 index 00000000..460e8638 --- /dev/null +++ b/apps/tests/TestPowerManager/TestPowerManagerC.nc @@ -0,0 +1,97 @@ +/* + * "Copyright (c) 2005 Washington University in St. Louis. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY + * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING + * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON + * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR + * MODIFICATIONS." + * + */ + +/** + * Please refer to TEP 115 for more information about the components + * this application is used to test. + * + * This application is used to test the functionality of the non mcu power + * management component for non-virtualized devices. Changes to + * MyComponentC allow one to choose between different Power + * Management policies. + * + * @author Kevin Klues + * @version $Revision$ + * @date $Date$ + */ + +#include "Timer.h" + +module TestPowerManagerC { + uses { + interface Boot; + interface Leds; + interface Resource as Resource0; + interface Resource as Resource1; + interface Timer as TimerMilli; + } +} +implementation { + + #define HOLD_PERIOD 500 + #define WAIT_PERIOD 1000 + uint8_t whoHasIt; + uint8_t waiting; + + //All resources try to gain access + event void Boot.booted() { + call Resource0.request(); + waiting = FALSE; + } + + //If granted the resource, turn on an LED + event void Resource0.granted() { + whoHasIt = 0; + call Leds.led1On(); + call TimerMilli.startOneShot(HOLD_PERIOD); + } + + event void Resource1.granted() { + whoHasIt = 1; + call Leds.led2On(); + call TimerMilli.startOneShot(HOLD_PERIOD); + } + + event void TimerMilli.fired() { + if(waiting == TRUE) { + waiting = FALSE; + if(whoHasIt == 0) + call Resource1.request(); + if(whoHasIt == 1) + call Resource0.request(); + } + else { + if(whoHasIt == 0) { + call Leds.led1Off(); + call Resource0.release(); + } + if(whoHasIt == 1) { + call Leds.led2Off(); + call Resource1.release(); + } + waiting = TRUE; + call TimerMilli.startOneShot(WAIT_PERIOD); + } + } +} + diff --git a/apps/tests/TestPowerup/Makefile b/apps/tests/TestPowerup/Makefile new file mode 100644 index 00000000..bfe92d41 --- /dev/null +++ b/apps/tests/TestPowerup/Makefile @@ -0,0 +1,3 @@ +COMPONENT=PowerupAppC +include $(MAKERULES) + diff --git a/apps/tests/TestPowerup/PowerupAppC.nc b/apps/tests/TestPowerup/PowerupAppC.nc new file mode 100644 index 00000000..7954cb8c --- /dev/null +++ b/apps/tests/TestPowerup/PowerupAppC.nc @@ -0,0 +1,51 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This application turns on LED 0 when the mote boots successfully + * (MainC signals the booted event). It is a useful sanity + * test when developing a new platform. + * + * @author Cory Sharp + * @date Aug 12 2005 + * + */ + +configuration PowerupAppC{} +implementation { + components MainC, PowerupC, LedsC; + + MainC.Boot <- PowerupC; + + + PowerupC -> LedsC.Leds; +} + diff --git a/apps/tests/TestPowerup/PowerupC.nc b/apps/tests/TestPowerup/PowerupC.nc new file mode 100644 index 00000000..21deb83e --- /dev/null +++ b/apps/tests/TestPowerup/PowerupC.nc @@ -0,0 +1,45 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +//@author Cory Sharp + +module PowerupC +{ + uses interface Boot; + uses interface Leds; +} +implementation +{ + event void Boot.booted() { + call Leds.led0On(); + } +} + diff --git a/apps/tests/TestScheduler/Makefile b/apps/tests/TestScheduler/Makefile new file mode 100644 index 00000000..86979195 --- /dev/null +++ b/apps/tests/TestScheduler/Makefile @@ -0,0 +1,4 @@ +COMPONENT=TestSchedulerAppC +OPTFLAGS = -O0 +include $(MAKERULES) + diff --git a/apps/tests/TestScheduler/README.txt b/apps/tests/TestScheduler/README.txt new file mode 100644 index 00000000..9899eb29 --- /dev/null +++ b/apps/tests/TestScheduler/README.txt @@ -0,0 +1,23 @@ +$Id$ + +README for Null +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +TestScheduler is a simple test application for a Scheduler's implementation +of the TaskBasic interface. The application has three tasks, each of +which toggles a different LED after a brief spin loop. + +This application has little (if any) use to a TinyOS user; it is intended +to be a basic sanity test for schedulers. + +Tools: + +None. + +Known bugs/limitations: + +None + + diff --git a/apps/tests/TestScheduler/TestSchedulerAppC.nc b/apps/tests/TestScheduler/TestSchedulerAppC.nc new file mode 100644 index 00000000..6e45bef9 --- /dev/null +++ b/apps/tests/TestScheduler/TestSchedulerAppC.nc @@ -0,0 +1,57 @@ +// $Id$ + +/* + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * TestScheduler is a simple scheduler test that posts three CPU + * intensive tasks of different durations. It is not intended to be + * of great use to TinyOS programmers; rather, it is a sanity check + * for schedulers. For details and information on how to + * replace the scheduler, refer to TEP 106. + * + * @author Philip Levis + * @date Aug 10 2005 + * @see TEP 106: Tasks and Schedulers + */ + +configuration TestSchedulerAppC {} +implementation { + components MainC, TestSchedulerC, LedsC, TinySchedulerC; + + + TestSchedulerC -> MainC.Boot; + + TestSchedulerC.Leds -> LedsC; + + TestSchedulerC.TaskRed -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")]; + TestSchedulerC.TaskGreen -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")]; + TestSchedulerC.TaskBlue -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")]; +} + diff --git a/apps/tests/TestScheduler/TestSchedulerC.nc b/apps/tests/TestScheduler/TestSchedulerC.nc new file mode 100644 index 00000000..051bed3a --- /dev/null +++ b/apps/tests/TestScheduler/TestSchedulerC.nc @@ -0,0 +1,108 @@ +// $Id$ + +/* + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * TestScheduler is a simple scheduler test that posts three CPU + * intensive tasks of different durations. It is not intended to be + * of great use to TinyOS programmers; rather, it is a sanity check + * for schedulers. For details and information on how to + * replace the scheduler, refer to TEP 106. + * + * @author Philip Levis + * @date Aug 10 2005 + * @see TEP 106: Tasks and Schedulers + */ + +#include "Timer.h" + +module TestSchedulerC { + uses interface Leds; + uses interface Boot; + uses interface TaskBasic as TaskRed; + uses interface TaskBasic as TaskGreen; + uses interface TaskBasic as TaskBlue; +} +implementation { + + event void TaskRed.runTask() { + uint16_t i, j; + for (i= 0; i < 50; i++) { + for (j = 0; j < 10000; j++) {} + } + call Leds.led0Toggle(); + + if (call TaskRed.postTask() == FAIL) { + call Leds.led0Off(); + } + else { + call TaskRed.postTask(); + } + } + + event void TaskGreen.runTask() { + uint16_t i, j; + for (i= 0; i < 25; i++) { + for (j = 0; j < 10000; j++) {} + } + call Leds.led1Toggle(); + + if (call TaskGreen.postTask() == FAIL) { + call Leds.led1Off(); + } + } + + event void TaskBlue.runTask() { + uint16_t i, j; + for (i= 0; i < 5; i++) { + for (j = 0; j < 10000; j++) {} + } + call Leds.led2Toggle(); + + if (call TaskBlue.postTask() == FAIL) { + call Leds.led2Off(); + } + } + + + + /** + * Event from Main that TinyOS has booted: start the timer at 1Hz. + */ + event void Boot.booted() { + call Leds.led2Toggle(); + call TaskRed.postTask(); + call TaskGreen.postTask(); + call TaskBlue.postTask(); + } + +} + + diff --git a/apps/tests/TestSerial/.cvsignore b/apps/tests/TestSerial/.cvsignore new file mode 100644 index 00000000..e3c6d30c --- /dev/null +++ b/apps/tests/TestSerial/.cvsignore @@ -0,0 +1 @@ +TestSerialMsg.java diff --git a/apps/tests/TestSerial/Makefile b/apps/tests/TestSerial/Makefile new file mode 100644 index 00000000..afe39480 --- /dev/null +++ b/apps/tests/TestSerial/Makefile @@ -0,0 +1,14 @@ +COMPONENT=TestSerialAppC +CFLAGS += -I%T/lib/oski +BUILD_EXTRA_DEPS += TestSerial.class +CLEAN_EXTRA = *.class TestSerialMsg.java + +TestSerial.class: $(wildcard *.java) TestSerialMsg.java + javac *.java + +TestSerialMsg.java: + mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o $@ + + +include $(MAKERULES) + diff --git a/apps/tests/TestSerial/README.txt b/apps/tests/TestSerial/README.txt new file mode 100644 index 00000000..980ac110 --- /dev/null +++ b/apps/tests/TestSerial/README.txt @@ -0,0 +1,28 @@ +README for TestSerial +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +TestSerial is a simple application that may be used to test that the +TinyOS java toolchain can communicate with a mote over the serial +port. The java application sends packets to the serial port at 1Hz: +the packet contains an incrementing counter. When the mote application +receives a counter packet, it displays the bottom three bits on its +LEDs. (This application is similar to RadioCountToLeds, except that it +operates over the serial port.) Likewise, the mote also sends packets +to the serial port at 1Hz. Upon reception of a packet, the java +application prints the counter's value to standard out. + +Java Application Usage: + Linux: java TestSerial.class [-comm ] + Windows: java TestSerial [-comm ] + + If not specified, the defaults to sf@localhost:9001 or + to your MOTECOM environment variable (if defined). + +Tools: + +Known bugs/limitations: + +None. + diff --git a/apps/tests/TestSerial/TestSerial.h b/apps/tests/TestSerial/TestSerial.h new file mode 100644 index 00000000..4ba5b1ef --- /dev/null +++ b/apps/tests/TestSerial/TestSerial.h @@ -0,0 +1,13 @@ + +#ifndef TEST_SERIAL_H +#define TEST_SERIAL_H + +typedef nx_struct TestSerialMsg { + nx_uint16_t counter; +} TestSerialMsg; + +enum { + AM_TESTSERIALMSG = 9, +}; + +#endif diff --git a/apps/tests/TestSerial/TestSerial.java b/apps/tests/TestSerial/TestSerial.java new file mode 100644 index 00000000..873fdec4 --- /dev/null +++ b/apps/tests/TestSerial/TestSerial.java @@ -0,0 +1,106 @@ +/* tab:4 + * "Copyright (c) 2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY + * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS + * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * Java-side application for testing serial port communication. + * + * + * @author Phil Levis + * @date August 12 2005 + */ + +import java.io.IOException; + +import net.tinyos.message.*; +import net.tinyos.packet.*; +import net.tinyos.util.*; + +public class TestSerial implements MessageListener { + + private MoteIF moteIF; + + public TestSerial(MoteIF moteIF) { + this.moteIF = moteIF; + this.moteIF.registerListener(new TestSerialMsg(), this); + } + + public void sendPackets() { + int counter = 0; + TestSerialMsg payload = new TestSerialMsg(); + + try { + while (true) { + System.out.println("Sending packet " + counter); + payload.set_counter(counter); + moteIF.send(0, payload); + counter++; + try {Thread.sleep(1000);} + catch (InterruptedException exception) {} + } + } + catch (IOException exception) { + System.err.println("Exception thrown when sending packets. Exiting."); + System.err.println(exception); + } + } + + public void messageReceived(int to, Message message) { + TestSerialMsg msg = (TestSerialMsg)message; + System.out.println("Received packet sequence number " + msg.get_counter()); + } + + private static void usage() { + System.err.println("usage: TestSerial [-comm ]"); + } + + public static void main(String[] args) throws Exception { + String source = null; + if (args.length == 2) { + if (!args[0].equals("-comm")) { + usage(); + System.exit(1); + } + source = args[1]; + } + else if (args.length != 0) { + usage(); + System.exit(1); + } + + PhoenixSource phoenix; + + if (source == null) { + phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); + } + else { + phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); + } + + MoteIF mif = new MoteIF(phoenix); + TestSerial serial = new TestSerial(mif); + serial.sendPackets(); + } + + +} diff --git a/apps/tests/TestSerial/TestSerialAppC.nc b/apps/tests/TestSerial/TestSerialAppC.nc new file mode 100644 index 00000000..4dda88d6 --- /dev/null +++ b/apps/tests/TestSerial/TestSerialAppC.nc @@ -0,0 +1,67 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Application to test that the TinyOS java toolchain can communicate + * with motes over the serial port. The application sends packets to + * the serial port at 1Hz: the packet contains an incrementing + * counter. When the application receives a counter packet, it + * displays the bottom three bits on its LEDs. This application is + * very similar to RadioCountToLeds, except that it operates over the + * serial port. There is Java application for testing the mote + * application: run TestSerial to print out the received packets and + * send packets to the mote. + * + * @author Gilman Tolle + * @author Philip Levis + * + * @date Aug 12 2005 + * + **/ + +#include "TestSerial.h" + +configuration TestSerialAppC {} +implementation { + components TestSerialC as App, LedsC, MainC; + components SerialActiveMessageC as AM; + components new TimerMilliC(); + + App.Boot -> MainC.Boot; + App.Control -> AM; + App.Receive -> AM.Receive[AM_TESTSERIALMSG]; + App.AMSend -> AM.AMSend[AM_TESTSERIALMSG]; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + App.Packet -> AM; +} + + diff --git a/apps/tests/TestSerial/TestSerialC.nc b/apps/tests/TestSerial/TestSerialC.nc new file mode 100644 index 00000000..4f3f351e --- /dev/null +++ b/apps/tests/TestSerial/TestSerialC.nc @@ -0,0 +1,129 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Application to test that the TinyOS java toolchain can communicate + * with motes over the serial port. + * + * @author Gilman Tolle + * @author Philip Levis + * + * @date Aug 12 2005 + * + **/ + +#include "Timer.h" +#include "TestSerial.h" + +module TestSerialC { + uses { + interface SplitControl as Control; + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface Packet; + } +} +implementation { + + message_t packet; + + bool locked = FALSE; + uint16_t counter = 0; + + event void Boot.booted() { + call Control.start(); + } + + event void MilliTimer.fired() { + counter++; + if (locked) { + return; + } + else { + TestSerialMsg* rcm = (TestSerialMsg*)call Packet.getPayload(&packet, NULL); + if (call Packet.maxPayloadLength() < sizeof(TestSerialMsg)) { + return; + } + + rcm->counter = counter; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSerialMsg)) == SUCCESS) { + locked = TRUE; + } + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + if (len != sizeof(TestSerialMsg)) {return bufPtr;} + else { + TestSerialMsg* rcm = (TestSerialMsg*)payload; + if (rcm->counter & 0x1) { + call Leds.led0On(); + } + else { + call Leds.led0Off(); + } + if (rcm->counter & 0x2) { + call Leds.led1On(); + } + else { + call Leds.led1Off(); + } + if (rcm->counter & 0x4) { + call Leds.led2On(); + } + else { + call Leds.led2Off(); + } + return bufPtr; + } + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + } + } + + event void Control.startDone(error_t err) { + if (err == SUCCESS) { + call MilliTimer.startPeriodic(1000); + } + } + event void Control.stopDone(error_t err) {} +} + + + + diff --git a/apps/tests/TestSerialBandwidth/Makefile b/apps/tests/TestSerialBandwidth/Makefile new file mode 100644 index 00000000..a3aa5622 --- /dev/null +++ b/apps/tests/TestSerialBandwidth/Makefile @@ -0,0 +1,13 @@ +COMPONENT=TestSerialAppC +CFLAGS += -I%T/lib/oski +BUILD_EXTRA_DEPS += TestSerialMsg.class TestSerial.class +CFLAGS += -DTOSH_DATA_LENGTH=100 + +%.class: %.java + javac $< + +TestSerialMsg.java: + mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o $@ + +include $(MAKERULES) + diff --git a/apps/tests/TestSerialBandwidth/TestSerial.h b/apps/tests/TestSerialBandwidth/TestSerial.h new file mode 100644 index 00000000..da0a4c6f --- /dev/null +++ b/apps/tests/TestSerialBandwidth/TestSerial.h @@ -0,0 +1,8 @@ +typedef nx_struct TestSerialMsg { + nx_uint16_t counter; + nx_uint8_t x[TOSH_DATA_LENGTH-sizeof(nx_uint16_t)]; +} TestSerialMsg; + +enum { + AM_TESTSERIALMSG = 9, +}; diff --git a/apps/tests/TestSerialBandwidth/TestSerial.java b/apps/tests/TestSerialBandwidth/TestSerial.java new file mode 100644 index 00000000..b36233a3 --- /dev/null +++ b/apps/tests/TestSerialBandwidth/TestSerial.java @@ -0,0 +1,108 @@ +/* tab:4 + * "Copyright (c) 2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY + * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL + * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS + * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * Java-side application for testing serial port communication. + * + * + * @author Phil Levis + * @date August 12 2005 + */ + +import java.io.IOException; + +import net.tinyos.message.*; +import net.tinyos.packet.*; +import net.tinyos.util.*; + +public class TestSerial implements MessageListener { + + private MoteIF moteIF; + + public TestSerial(MoteIF moteIF) { + this.moteIF = moteIF; + this.moteIF.registerListener(new TestSerialMsg(), this); + } + + public void sendPackets() { + int counter = 0; + TestSerialMsg payload = new TestSerialMsg(); + + try { + while (true) { + System.out.println("Sending packet " + counter); + payload.set_counter(counter); + moteIF.send(0, payload); + counter++; + try {Thread.sleep(1000);} + catch (InterruptedException exception) {} + } + } + catch (IOException exception) { + System.err.println("Exception thrown when sending packets. Exiting."); + System.err.println(exception); + } + } + + public void messageReceived(int to, Message message) { + TestSerialMsg msg = (TestSerialMsg)message; + System.out.println("Received packet sequence number " + msg.get_counter()); + } + + private static void usage() { + System.err.println("usage: TestSerial [-comm ]"); + } + + public static void main(String[] args) throws Exception { + String source = ""; + System.out.println("hello"); + if (args.length == 2) { + if (!args[0].equals("-comm")) { + usage(); + System.exit(1); + } + source = args[1]; + } + else if (args.length != 0) { + usage(); + System.exit(1); + } + + PhoenixSource phoenix; + + if (source == null) { + phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err); + } + else { + phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err); + } + + System.out.println("goodbye"); + MoteIF mif = new MoteIF(phoenix); + TestSerial serial = new TestSerial(mif); + serial.sendPackets(); + } + + +} diff --git a/apps/tests/TestSerialBandwidth/TestSerialAppC.nc b/apps/tests/TestSerialBandwidth/TestSerialAppC.nc new file mode 100644 index 00000000..eae10ae3 --- /dev/null +++ b/apps/tests/TestSerialBandwidth/TestSerialAppC.nc @@ -0,0 +1,71 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Application to test that the TinyOS java toolchain can communicate + * with motes over the serial port. The application sends packets to + * the serial port at 1Hz: the packet contains an incrementing + * counter. When the application receives a counter packet, it + * displays the bottom three bits on its LEDs. This application is + * very similar to RadioCountToLeds, except that it operates over the + * serial port. There is Java application for testing the mote + * application: run TestSerial to print out the received packets and + * send packets to the mote. + * + * @author Gilman Tolle + * @author Philip Levis + * + * @date Aug 12 2005 + * + **/ + +#include "TestSerial.h" + +configuration TestSerialAppC {} +implementation { + components TestSerialC as App, LedsC, MainC; + components SerialActiveMessageC as AM; + components new TimerMilliC(); + + + + MainC.SoftwareInit -> AM; + + App.Boot -> MainC.Boot; + App.Control -> AM; + App.Receive -> AM.Receive[AM_TESTSERIALMSG]; + App.AMSend -> AM.AMSend[AM_TESTSERIALMSG]; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; + App.Packet -> AM; +} + + diff --git a/apps/tests/TestSerialBandwidth/TestSerialC.nc b/apps/tests/TestSerialBandwidth/TestSerialC.nc new file mode 100644 index 00000000..b361e3ab --- /dev/null +++ b/apps/tests/TestSerialBandwidth/TestSerialC.nc @@ -0,0 +1,160 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Application to test that the TinyOS java toolchain can communicate + * with motes over the serial port. The application sends packets to + * the serial port at 1Hz: the packet contains an incrementing + * counter. When the application receives a counter packet, it + * displays the bottom three bits on its LEDs. This application is + * very similar to RadioCountToLeds, except that it operates over the + * serial port. There is Java application for testing the mote + * application: run TestSerial to print out the received packets and + * send packets to the mote. + * + * @author Gilman Tolle + * @author Philip Levis + * + * @date Aug 12 2005 + * + **/ + +#include "Timer.h" +#include "TestSerial.h" + +module TestSerialC { + uses { + interface SplitControl as Control; + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface Packet; + } +} +implementation { + + message_t packet; + + bool locked; + bool afap = TRUE; + uint32_t interval = 10; + + uint16_t counter = 0; + + event void Boot.booted() { + call Control.start(); + } + + event void MilliTimer.fired() { + counter++; + if (locked) { + if (afap) call MilliTimer.startPeriodic(interval); + + return; + } + else { + TestSerialMsg* rcm = (TestSerialMsg*)call Packet.getPayload(&packet, NULL); + if (call Packet.maxPayloadLength() < sizeof(TestSerialMsg)) { + return; + } + + rcm->counter = counter; + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSerialMsg)) == SUCCESS) { + locked = TRUE; + } + } + } + + event message_t* Receive.receive(message_t* bufPtr, + void* payload, uint8_t len) { + + if (len != sizeof(TestSerialMsg)) {return bufPtr;} + else { + TestSerialMsg* rcm = (TestSerialMsg*)payload; + if (rcm->counter & 0x1) { + call Leds.led0On(); + } + else { + call Leds.led0Off(); + } + if (rcm->counter & 0x2) { + call Leds.led1On(); + } + else { + call Leds.led1Off(); + } + if (rcm->counter & 0x4) { + call Leds.led2On(); + } + else { + call Leds.led2Off(); + } + return bufPtr; + } + } + + event void AMSend.sendDone(message_t* bufPtr, error_t error) { + if (&packet == bufPtr) { + locked = FALSE; + // as fast as possible + if (afap){ + TestSerialMsg* rcm = (TestSerialMsg*)call Packet.getPayload(&packet,NULL); + counter++; + rcm->counter = counter; + call Leds.led0Toggle(); + if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSerialMsg)) == SUCCESS) { + locked = TRUE; + } + else { + call MilliTimer.startOneShot(interval); + } + } + } + } + + event void Control.startDone(error_t err) { + if (err == SUCCESS) { + if (afap){ + call MilliTimer.startOneShot(interval); + } + else { + call MilliTimer.startPeriodic(interval); + } + } + } + event void Control.stopDone(error_t err) {} +} + + + + diff --git a/apps/tests/TestSerialBandwidth/TestSerialMsg.java b/apps/tests/TestSerialBandwidth/TestSerialMsg.java new file mode 100644 index 00000000..257e8cd5 --- /dev/null +++ b/apps/tests/TestSerialBandwidth/TestSerialMsg.java @@ -0,0 +1,318 @@ +/** + * This class is automatically generated by mig. DO NOT EDIT THIS FILE. + * This class implements a Java interface to the 'TestSerialMsg' + * message type. + */ + +public class TestSerialMsg extends net.tinyos.message.Message { + + /** The default size of this message type in bytes. */ + public static final int DEFAULT_MESSAGE_SIZE = 100; + + /** The Active Message type associated with this message. */ + public static final int AM_TYPE = 9; + + /** Create a new TestSerialMsg of size 100. */ + public TestSerialMsg() { + super(DEFAULT_MESSAGE_SIZE); + amTypeSet(AM_TYPE); + } + + /** Create a new TestSerialMsg of the given data_length. */ + public TestSerialMsg(int data_length) { + super(data_length); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg with the given data_length + * and base offset. + */ + public TestSerialMsg(int data_length, int base_offset) { + super(data_length, base_offset); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg using the given byte array + * as backing store. + */ + public TestSerialMsg(byte[] data) { + super(data); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg using the given byte array + * as backing store, with the given base offset. + */ + public TestSerialMsg(byte[] data, int base_offset) { + super(data, base_offset); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg using the given byte array + * as backing store, with the given base offset and data length. + */ + public TestSerialMsg(byte[] data, int base_offset, int data_length) { + super(data, base_offset, data_length); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg embedded in the given message + * at the given base offset. + */ + public TestSerialMsg(net.tinyos.message.Message msg, int base_offset) { + super(msg, base_offset, DEFAULT_MESSAGE_SIZE); + amTypeSet(AM_TYPE); + } + + /** + * Create a new TestSerialMsg embedded in the given message + * at the given base offset and length. + */ + public TestSerialMsg(net.tinyos.message.Message msg, int base_offset, int data_length) { + super(msg, base_offset, data_length); + amTypeSet(AM_TYPE); + } + + /** + /* Return a String representation of this message. Includes the + * message type name and the non-indexed field values. + */ + public String toString() { + String s = "Message \n"; + try { + s += " [counter=0x"+Long.toHexString(get_counter())+"]\n"; + } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } + try { + s += " [x="; + for (int i = 0; i < 98; i++) { + s += "0x"+Long.toHexString(getElement_x(i) & 0xff)+" "; + } + s += "]\n"; + } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ } + return s; + } + + // Message-type-specific access methods appear below. + + ///////////////////////////////////////////////////////// + // Accessor methods for field: counter + // Field type: int, unsigned + // Offset (bits): 0 + // Size (bits): 16 + ///////////////////////////////////////////////////////// + + /** + * Return whether the field 'counter' is signed (false). + */ + public static boolean isSigned_counter() { + return false; + } + + /** + * Return whether the field 'counter' is an array (false). + */ + public static boolean isArray_counter() { + return false; + } + + /** + * Return the offset (in bytes) of the field 'counter' + */ + public static int offset_counter() { + return (0 / 8); + } + + /** + * Return the offset (in bits) of the field 'counter' + */ + public static int offsetBits_counter() { + return 0; + } + + /** + * Return the value (as a int) of the field 'counter' + */ + public int get_counter() { + return (int)getUIntBEElement(offsetBits_counter(), 16); + } + + /** + * Set the value of the field 'counter' + */ + public void set_counter(int value) { + setUIntBEElement(offsetBits_counter(), 16, value); + } + + /** + * Return the size, in bytes, of the field 'counter' + */ + public static int size_counter() { + return (16 / 8); + } + + /** + * Return the size, in bits, of the field 'counter' + */ + public static int sizeBits_counter() { + return 16; + } + + ///////////////////////////////////////////////////////// + // Accessor methods for field: x + // Field type: short[], unsigned + // Offset (bits): 16 + // Size of each element (bits): 8 + ///////////////////////////////////////////////////////// + + /** + * Return whether the field 'x' is signed (false). + */ + public static boolean isSigned_x() { + return false; + } + + /** + * Return whether the field 'x' is an array (true). + */ + public static boolean isArray_x() { + return true; + } + + /** + * Return the offset (in bytes) of the field 'x' + */ + public static int offset_x(int index1) { + int offset = 16; + if (index1 < 0 || index1 >= 98) throw new ArrayIndexOutOfBoundsException(); + offset += 0 + index1 * 8; + return (offset / 8); + } + + /** + * Return the offset (in bits) of the field 'x' + */ + public static int offsetBits_x(int index1) { + int offset = 16; + if (index1 < 0 || index1 >= 98) throw new ArrayIndexOutOfBoundsException(); + offset += 0 + index1 * 8; + return offset; + } + + /** + * Return the entire array 'x' as a short[] + */ + public short[] get_x() { + short[] tmp = new short[98]; + for (int index0 = 0; index0 < numElements_x(0); index0++) { + tmp[index0] = getElement_x(index0); + } + return tmp; + } + + /** + * Set the contents of the array 'x' from the given short[] + */ + public void set_x(short[] value) { + for (int index0 = 0; index0 < value.length; index0++) { + setElement_x(index0, value[index0]); + } + } + + /** + * Return an element (as a short) of the array 'x' + */ + public short getElement_x(int index1) { + return (short)getUIntBEElement(offsetBits_x(index1), 8); + } + + /** + * Set an element of the array 'x' + */ + public void setElement_x(int index1, short value) { + setUIntBEElement(offsetBits_x(index1), 8, value); + } + + /** + * Return the total size, in bytes, of the array 'x' + */ + public static int totalSize_x() { + return (784 / 8); + } + + /** + * Return the total size, in bits, of the array 'x' + */ + public static int totalSizeBits_x() { + return 784; + } + + /** + * Return the size, in bytes, of each element of the array 'x' + */ + public static int elementSize_x() { + return (8 / 8); + } + + /** + * Return the size, in bits, of each element of the array 'x' + */ + public static int elementSizeBits_x() { + return 8; + } + + /** + * Return the number of dimensions in the array 'x' + */ + public static int numDimensions_x() { + return 1; + } + + /** + * Return the number of elements in the array 'x' + */ + public static int numElements_x() { + return 98; + } + + /** + * Return the number of elements in the array 'x' + * for the given dimension. + */ + public static int numElements_x(int dimension) { + int array_dims[] = { 98, }; + if (dimension < 0 || dimension >= 1) throw new ArrayIndexOutOfBoundsException(); + if (array_dims[dimension] == 0) throw new IllegalArgumentException("Array dimension "+dimension+" has unknown size"); + return array_dims[dimension]; + } + + /** + * Fill in the array 'x' with a String + */ + public void setString_x(String s) { + int len = s.length(); + int i; + for (i = 0; i < len; i++) { + setElement_x(i, (short)s.charAt(i)); + } + setElement_x(i, (short)0); //null terminate + } + + /** + * Read the array 'x' as a String + */ + public String getString_x() { + char carr[] = new char[Math.min(net.tinyos.message.Message.MAX_CONVERTED_STRING_LENGTH,98)]; + int i; + for (i = 0; i < carr.length; i++) { + if ((char)getElement_x(i) == (char)0) break; + carr[i] = (char)getElement_x(i); + } + return new String(carr,0,i); + } + +} diff --git a/apps/tests/TestTimerSync/Makefile b/apps/tests/TestTimerSync/Makefile new file mode 100644 index 00000000..b5e56b92 --- /dev/null +++ b/apps/tests/TestTimerSync/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestTimerSyncAppC +PFLAGS += -I%T/lib/oski + +include $(MAKERULES) + diff --git a/apps/tests/TestTimerSync/TestTimerSyncAppC.nc b/apps/tests/TestTimerSync/TestTimerSyncAppC.nc new file mode 100644 index 00000000..8895fbaa --- /dev/null +++ b/apps/tests/TestTimerSync/TestTimerSyncAppC.nc @@ -0,0 +1,65 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * This application sends a single active message broadcast if it has + * address 0, and then starts a timer at 1Hz. If it has any address + * other than 0, it starts a timer at 1 Hz upon receiving a broadcast + * message. The idea is to have one base station with address 0 send + * out a broadacst message to synchronize itself with all receivers. + * All Leds from the base station and any receivers of the broadcast + * should blink together. + + * It uses the radio HIL component + * ActiveMessageC, and its packets are AM type 240. + * + * @author Phil Levis + * @author Kevin Klues + * @date Nov 7 2005 + */ + +configuration TestTimerSyncAppC {} +implementation { + components MainC, TestTimerSyncC as App, LedsC; + components ActiveMessageC; + components new TimerMilliC(); + components new AMSenderC(240), new AMReceiverC(240); + + App.Boot -> MainC.Boot; + + App.Receive -> AMReceiverC; + App.AMSend -> AMSenderC; + App.SplitControl -> ActiveMessageC; + App.Leds -> LedsC; + App.MilliTimer -> TimerMilliC; +} + + diff --git a/apps/tests/TestTimerSync/TestTimerSyncC.nc b/apps/tests/TestTimerSync/TestTimerSyncC.nc new file mode 100644 index 00000000..e582f1fa --- /dev/null +++ b/apps/tests/TestTimerSync/TestTimerSyncC.nc @@ -0,0 +1,92 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * Implementation of the TestTimerSync application. + * + * @author Phil Levis + * @author Kevin Klues + * @date Nov 7 2005 + * + **/ + +#include "Timer.h" + +module TestTimerSyncC { + uses { + interface Leds; + interface Boot; + interface Receive; + interface AMSend; + interface Timer as MilliTimer; + interface SplitControl; + } +} +implementation { + #define PERIOD 500 + + message_t syncMsg; + + event void Boot.booted() { + call SplitControl.start(); + } + + event void SplitControl.startDone(error_t err) { + if(TOS_NODE_ID == 0) { + call AMSend.send(AM_BROADCAST_ADDR, &syncMsg, 0); + } + } + + event void SplitControl.stopDone(error_t err) { + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if(error == SUCCESS) { + call Leds.led2Toggle(); + call MilliTimer.startOneShot(PERIOD); + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) { + call Leds.led2Toggle(); + call MilliTimer.startOneShot(PERIOD); + return msg; + } + + event void MilliTimer.fired() { + call Leds.led2Toggle(); + call MilliTimer.startOneShot(PERIOD); + } +} + + + + diff --git a/apps/tests/TestTreeRouting/Makefile b/apps/tests/TestTreeRouting/Makefile new file mode 100644 index 00000000..2e3c34c1 --- /dev/null +++ b/apps/tests/TestTreeRouting/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestTreeRoutingC +CFLAGS += -I$(TOSDIR)/lib/net/collection + +include $(MAKERULES) + diff --git a/apps/tests/TestTreeRouting/Makefile.driver b/apps/tests/TestTreeRouting/Makefile.driver new file mode 100644 index 00000000..f29a3fcd --- /dev/null +++ b/apps/tests/TestTreeRouting/Makefile.driver @@ -0,0 +1,4 @@ +all: + make micaz sim + g++ -g -c -o test.o test.cc -I$(TOSROOT)/tos/lib/tossim/ + g++ -o test test.o build/micaz/tossim.o build/micaz/sim.o diff --git a/apps/tests/TestTreeRouting/README b/apps/tests/TestTreeRouting/README new file mode 100644 index 00000000..1d7c0dab --- /dev/null +++ b/apps/tests/TestTreeRouting/README @@ -0,0 +1,14 @@ +This is a simple configuration and test driver to test tree building and link +estimation. Currently to be used in simulation, because it does not have any +debugging or state output to the radio. + +The nesc files just wire and start the tree building, with no data traffic. +Nodes 0 and 173, when started, are set as roots. + +The python script starts node 173 later, so in the first phase there should be +one tree and when the node boots, there should be two trees, one rooted at +0, the other at 173. + + +Rodrigo Fonseca + diff --git a/apps/tests/TestTreeRouting/TestTreeRoutingC.nc b/apps/tests/TestTreeRouting/TestTreeRoutingC.nc new file mode 100644 index 00000000..d0f6a812 --- /dev/null +++ b/apps/tests/TestTreeRouting/TestTreeRoutingC.nc @@ -0,0 +1,52 @@ +/* Minimal confiruation to compile TreeRoutingEngine.nc */ +configuration TestTreeRoutingC {} +implementation { + enum { + TREE_ROUTING_TABLE_SIZE = 12, + }; + + components MainC; + components ActiveMessageC; + components TestTreeRoutingP; + + components new TreeRoutingEngineP(TREE_ROUTING_TABLE_SIZE) as RE; + //components LinkEstimatorP as LE; + components LinkEstimatorDummyP as LE; + + TestTreeRoutingP.Boot -> MainC; + TestTreeRoutingP.RadioControl -> ActiveMessageC; + + TestTreeRoutingP.Init -> RE; + TestTreeRoutingP.Init -> LE; + TestTreeRoutingP.TreeControl -> RE; + + TestTreeRoutingP.RootControl -> RE; + + + components new AMSenderC(AM_TREE_ROUTING_CONTROL) as SubSender; + + LE.AMSend -> SubSender; + LE.SubPacket -> SubSender; + LE.SubAMPacket -> SubSender; + + + RE.BeaconSend -> LE.Send; + RE.BeaconReceive -> LE.Receive; + RE.LinkEstimator -> LE.LinkEstimator; + RE.LinkSrcPacket -> LE.LinkSrcPacket; + RE.AMPacket -> SubSender; + RE.RadioControl -> ActiveMessageC; + + components new AMReceiverC(AM_TREE_ROUTING_CONTROL) as SubReceiver; + LE.SubReceive -> SubReceiver; + + components new TimerMilliC() as LETimer; + LE.Timer -> LETimer; + + components new TimerMilliC() as BeaconTimer; + RE.BeaconTimer -> BeaconTimer; + + components RandomC; + RE.Random -> RandomC; + +} diff --git a/apps/tests/TestTreeRouting/TestTreeRoutingP.nc b/apps/tests/TestTreeRouting/TestTreeRoutingP.nc new file mode 100644 index 00000000..b8b1adb6 --- /dev/null +++ b/apps/tests/TestTreeRouting/TestTreeRoutingP.nc @@ -0,0 +1,25 @@ +module TestTreeRoutingP { + uses interface Boot; + uses interface Init; + uses interface StdControl as TreeControl; + uses interface SplitControl as RadioControl; + uses interface RootControl; + uses interface Timer; +} +implementation { + event void Boot.booted() { + call Init.init(); + call RadioControl.start(); + call TreeControl.start(); + if (TOS_NODE_ID == 0 || TOS_NODE_ID == 173) { + call RootControl.setRoot(); + } + + } + + event void RadioControl.startDone(error_t error) { + } + + event void RadioControl.stopDone(error_t error) { + } +} diff --git a/apps/tests/TestTreeRouting/parse_tree.pl b/apps/tests/TestTreeRouting/parse_tree.pl new file mode 100644 index 00000000..d8753f54 --- /dev/null +++ b/apps/tests/TestTreeRouting/parse_tree.pl @@ -0,0 +1,35 @@ +#!/usr/bin/perl -w + +# *Very* simple script to plot the logical structure of the forest generated by the +# tree formation algorithm. +# INPUT: (stdin) tossim debug log +# OUTPUT: (stdout) a ps version of the graph + +# The script parses a specific type of debug message in the TreeRouting TOSSIM channel: +# DEBUG (node) ... sendBeaconTask$runTask parent: X hopcount ... +# It then plots the *last* parent seen for each node in the log. +# Requires the installation of the GraphViz perl module (just do >cpan install GraphViz) + +# Author: Rodrigo Fonseca + +use GraphViz; +$INVALID_ADDR = 65535; + +$g = GraphViz->new(); + +while (<>) { + chomp; + if (($child,$parent) = /DEBUG \((\d+)\):.*sendBeaconTask\$runTask parent: (\d+) hopcount/) { + if ($parent != $INVALID_ADDR) { + $parent{$child} = $parent; + } + } + +} +for $node (keys %parent) { + $g->add_node($node); + $g->add_node($parent{$node}); + $g->add_edge($node => $parent{$node}); +} +print $g->as_ps; + diff --git a/apps/tests/TestTreeRouting/test.cc b/apps/tests/TestTreeRouting/test.cc new file mode 100644 index 00000000..5ed31baa --- /dev/null +++ b/apps/tests/TestTreeRouting/test.cc @@ -0,0 +1,33 @@ +#include +#include +#include + + +int main() { + Tossim* t = new Tossim(NULL); + t->init(); + + t->addChannel("TreeRouting", stdout); + t->addChannel("TreeRoutingCtl", stdout); + t->addChannel("AM", stdout); + + + Radio* r = t->radio(); + + for (int i = 0; i < 2; i++) { + printf("Mote %i at %i\n", i, 15000000 * i + 1); + Mote* m = t->getNode(i); + m->bootAtTime(15000000 * i + 1); + r->setNoise(i, -77.0, 3); + for (int j = 0; j < 2; j++) { + if (i != j) { + r->add(i, j, -50.0); + } + } + } + + while (t->time()/t->ticksPerSecond() < 600) { + t->runNextEvent(); + } + +} diff --git a/apps/tests/TestTreeRouting/test.py b/apps/tests/TestTreeRouting/test.py new file mode 100644 index 00000000..7ebbb29d --- /dev/null +++ b/apps/tests/TestTreeRouting/test.py @@ -0,0 +1,44 @@ +# This script is a simple TOSSIM test of tree building +# It builds a 15x15 grid of nodes and just lets the +# tree form. There's currently no routing going on. + +import TOSSIM +import sys + +t = TOSSIM.Tossim([]) +m = t.mac(); +r = t.radio(); +t.init() + +#t.addChannel("LedsC", sys.stdout); +t.addChannel("AM", sys.stdout); +t.addChannel("TreeRouting", sys.stdout); +t.addChannel("TreeRoutingCtl", sys.stdout); +t.addChannel("LI", sys.stdout); +#t.addChannel("Gain", sys.stdout); +#t.addChannel("TossimPacketModelC", sys.stdout); + +print (dir(TOSSIM.Tossim)) + +f = open("topo.txt", "r") +lines = f.readlines() +for line in lines: + s = line.split() + if (len(s) > 0): + if (s[0] == "gain"): + r.add(int(s[1]), int(s[2]), float(s[3])) + elif (s[0] == "noise"): + r.setNoise(int(s[1]), float(s[2]), float(s[3])) + +for i in range(0, 225): + m = t.getNode(i); + if (i == 173): + m.bootAtTime(t.ticksPerSecond() * 100) + else: + m.bootAtTime((t.ticksPerSecond() / 50) * i + 43); + +while (t.time() / t.ticksPerSecond() < 1600): + if (t.time() == t.ticksPerSecond() * 100): + print "---------" + t.runNextEvent() + diff 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a/apps/tests/TestTrickleTimer/Driver.c b/apps/tests/TestTrickleTimer/Driver.c new file mode 100644 index 00000000..1aa8c67b --- /dev/null +++ b/apps/tests/TestTrickleTimer/Driver.c @@ -0,0 +1,48 @@ +#include + +int main() { + nesc_app_t na; + na.numVariables = 1; + na.variableNames = (char**)malloc(sizeof(char*)); + na.variableTypes = (char**)malloc(sizeof(char*)); + na.variableArray = (int*)malloc(sizeof(int)); + na.variableNames[0] = "TestSerialC.arrayTest"; + na.variableTypes[0] = "int"; + na.variableArray[0] = 1; + + Tossim* t = new Tossim(&na); + t->init(); + // t->addChannel("BlinkC", fdopen(1, "w")); + // t->addChannel("HplAtm128CompareC", fdopen(1, "w")); + //t->addChannel("HplCounter0C", fdopen(1, "w")); + //t->addChannel("Atm128AlarmC", fdopen(1, "w")); + //t->addChannel("TransformAlarmCounterC", fdopen(1, "w")); + //t->addChannel("Scheduler", fdopen(1, "w")); + //t->addChannel("Trickle", fdopen(1, "w")); + t->addChannel("TestTrickle", fdopen(1, "w")); + t->addChannel("TrickleTimes", fdopen(1, "w")); + + for (int i = 0; i < 1; i++) { + printf("Mote %i at %i\n", i, 500 * i + 1); + Mote* m = t->getNode(i); + m->bootAtTime(500 * i + 1); + } + + for (int i = 0; i < 5000; i++) { + t->runNextEvent(); + } + + int x = 2; + + for (int i = 0; i < 5000; i++) { + t->runNextEvent(); + } + + // Mote* m = t->getNode(2); + //Variable* v = m->getVariable("TestSerialC.arrayTest"); + + // variable_string_t s = v->getData(); + + //printf ("TestSerialC.arrayTest: %s %s\n", s.type, s.isArray? "[]":""); + +} diff --git a/apps/tests/TestTrickleTimer/Makefile b/apps/tests/TestTrickleTimer/Makefile new file mode 100644 index 00000000..a137cc42 --- /dev/null +++ b/apps/tests/TestTrickleTimer/Makefile @@ -0,0 +1,5 @@ +COMPONENT=TestTrickleTimerAppC +CFLAGS += -I%T/lib/oski -I%T/lib/net -I. + +include $(MAKERULES) + diff --git a/apps/tests/TestTrickleTimer/Makefile.Driver b/apps/tests/TestTrickleTimer/Makefile.Driver new file mode 100644 index 00000000..4acaadd3 --- /dev/null +++ b/apps/tests/TestTrickleTimer/Makefile.Driver @@ -0,0 +1,7 @@ + +all: + make micaz sim + g++ -g -c -o Driver.o Driver.c -I../../../tos/lib/tossim/ -Lbuild/micaz -L. + g++ -o Driver Driver.o build/micaz/sim.o build/micaz/tossim.o + + diff --git a/apps/tests/TestTrickleTimer/TestTrickleC.nc b/apps/tests/TestTrickleTimer/TestTrickleC.nc new file mode 100644 index 00000000..a8dc8f76 --- /dev/null +++ b/apps/tests/TestTrickleTimer/TestTrickleC.nc @@ -0,0 +1,41 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/* + * Test of the trickle timers. + * @author Philip Levis + * @date Jan 7 2006 + */ + +#include + +configuration TestTrickleC { + provides interface TrickleTimer[uint8_t]; +} +implementation { + components new TrickleTimerMilliC(1, 120, 2, uniqueCount(UQ_TEST_TRICKLE)); + TrickleTimer = TrickleTimerMilliC; +} + + diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc new file mode 100644 index 00000000..b2e3f776 --- /dev/null +++ b/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc @@ -0,0 +1,58 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/* + * Test of the trickle timers. + * @author Philip Levis + * @date Jan 7 2006 + */ + +configuration TestTrickleTimerAppC { +} +implementation { + components TestTrickleTimerAppP, MainC, RandomC; + components new TestTrickleTimerC() as TimerA; + components new TestTrickleTimerC() as TimerB; + components new TestTrickleTimerC() as TimerC; + components new TestTrickleTimerC() as TimerD; + components new TimerMilliC(); + components new BitVectorC(1) as PendingVector; + components new BitVectorC(1) as ChangeVector; + + // Timer.Timer -> TimerMilliC; + //Timer.Random -> RandomC; + //Timer.Changed -> ChangeVector; + //Timer.Pending -> PendingVector; + + MainC.SoftwareInit -> TestTrickleTimerAppP; + TestTrickleTimerAppP.Boot -> MainC.Boot; + + TestTrickleTimerAppP.TimerA -> TimerA; + TestTrickleTimerAppP.TimerB -> TimerB; + TestTrickleTimerAppP.TimerC -> TimerC; + TestTrickleTimerAppP.TimerD -> TimerD; + +} + + diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc new file mode 100644 index 00000000..35d87277 --- /dev/null +++ b/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc @@ -0,0 +1,110 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/* + * Test of the trickle timers. + * @author Philip Levis + * @date Jan 7 2006 + */ + +module TestTrickleTimerAppP { + provides interface Init; + uses { + interface Boot; + interface TrickleTimer as TimerA; + interface TrickleTimer as TimerB; + interface TrickleTimer as TimerC; + interface TrickleTimer as TimerD; + } +} +implementation { + + bool a = 0; + bool b = 0; + bool c = 0; + bool d = 0; + + command error_t Init.init() {return SUCCESS;} + + event void Boot.booted() { + a = 1; + call TimerA.reset(); + call TimerA.start(); + } + + event void TimerA.fired() { + dbg("TestTrickle", " Timer A fired at %s\n", sim_time_string()); + if (!b) { + call TimerB.reset(); + call TimerB.start(); + b = 1; + } + } + + + event void TimerB.fired() { + dbg("TestTrickle", " Timer B fired at %s\n", sim_time_string()); + if (!c) { + call TimerC.reset(); + call TimerC.start(); + b = 1; + } + } + + + event void TimerC.fired() { + dbg("TestTrickle", " Timer C fired at %s\n", sim_time_string()); + if (!d) { + call TimerD.reset(); + call TimerD.start(); + b = 1; + } + } + + uint8_t i = 0; + event void TimerD.fired() { + dbg("TestTrickle", "Timer D fired at %s\n", sim_time_string()); + i++; + i = i % 3; + switch (i) { + case 0: + // call TimerA.reset(); + break; + case 1: + // call TimerB.reset(); + break; + case 2: + call TimerC.reset(); + break; + case 3: + call TimerD.reset(); + break; + } + } + + + +} + + diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc new file mode 100644 index 00000000..c6e194a0 --- /dev/null +++ b/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc @@ -0,0 +1,42 @@ +// $Id$ +/* + * "Copyright (c) 2006 Stanford University. All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without written + * agreement is hereby granted, provided that the above copyright + * notice, the following two paragraphs and the author appear in all + * copies of this software. + * + * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN + * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH + * DAMAGE. + * + * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE + * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY + * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, + * ENHANCEMENTS, OR MODIFICATIONS." + */ + +/* + * Test of the trickle timers. + * @author Philip Levis + * @date Jan 7 2006 + */ + +#include + +generic configuration TestTrickleTimerC() { + provides interface TrickleTimer; +} +implementation { + components TestTrickleC; + + TrickleTimer = TestTrickleC.TrickleTimer[unique(UQ_TEST_TRICKLE)]; +} + + diff --git a/apps/tests/TestTrickleTimer/test.py b/apps/tests/TestTrickleTimer/test.py new file mode 100644 index 00000000..9523a3fc --- /dev/null +++ b/apps/tests/TestTrickleTimer/test.py @@ -0,0 +1,15 @@ +from TOSSIM import * +import sys + +t = Tossim([]); +t.init() +t.addChannel("Trickle", sys.stdout); + +for i in range(0, 10): + m = t.getNode(i) + m.bootAtTime(i * 5023211 + 10002322) + +for i in range(0, 100): + t.runNextEvent() + + diff --git a/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc new file mode 100644 index 00000000..c9f38d73 --- /dev/null +++ b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc @@ -0,0 +1,54 @@ +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * + **/ + +#include "Timer.h" +configuration TestTda5250ControlC { +} +implementation { + components MainC, TestTda5250ControlP + , new AlarmMilliC() as ModeTimer + , LedsC + , Tda5250RadioC + , RandomLfsrC + ; + + TestTda5250ControlP -> MainC.Boot; + + TestTda5250ControlP.Random -> RandomLfsrC.Random; + TestTda5250ControlP.ModeTimer -> ModeTimer; + TestTda5250ControlP.Leds -> LedsC; + TestTda5250ControlP.Tda5250Control -> Tda5250RadioC.Tda5250Control; + TestTda5250ControlP.RadioSplitControl -> Tda5250RadioC.SplitControl; +} + + + diff --git a/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc new file mode 100644 index 00000000..19870377 --- /dev/null +++ b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc @@ -0,0 +1,158 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +module TestTda5250ControlP { + uses { + interface Boot; + interface Alarm as ModeTimer; + interface Leds; + interface Tda5250Control; + interface Random; + interface SplitControl as RadioSplitControl; + } +} + +implementation { + + #define MODE_TIMER_RATE 500 + + uint8_t mode; + + event void Boot.booted() { + atomic mode = 0; + call RadioSplitControl.start(); + } + + event void RadioSplitControl.startDone(error_t error) { + call ModeTimer.start(MODE_TIMER_RATE); + } + + event void RadioSplitControl.stopDone(error_t error) { + call ModeTimer.stop(); + } + + + /* tasks and helper functions*/ + void setTimer() { + call ModeTimer.start(call Random.rand16() % MODE_TIMER_RATE); + } + task void RxModeTask() { + if (call Tda5250Control.RxMode() != SUCCESS) + post RxModeTask(); + } + task void TxModeTask() { + if (call Tda5250Control.TxMode() != SUCCESS) + post TxModeTask(); + } + task void SleepModeTask() { + if (call Tda5250Control.SleepMode() != SUCCESS) + post SleepModeTask(); + } + + /*********************************************************************** + * Commands and events + ***********************************************************************/ + + async event void ModeTimer.fired() { + switch(mode) { +/* case 0: + call Tda5250Control.TimerMode(call Random.rand16() % MODE_TIMER_RATE/20, + call Random.rand16() % MODE_TIMER_RATE/20); + break; + case 1: + call Tda5250Control.SelfPollingMode(call Random.rand16() % MODE_TIMER_RATE/20, + call Random.rand16() % MODE_TIMER_RATE/20); + break; + */ + case 2: + if (call Tda5250Control.RxMode() != SUCCESS) + post RxModeTask(); + break; + case 3: + if (call Tda5250Control.TxMode() != SUCCESS) + post TxModeTask(); + break; + default: + if (call Tda5250Control.SleepMode() != SUCCESS) + post SleepModeTask(); + break; + } + } + + async event void Tda5250Control.PWDDDInterrupt() { + call Tda5250Control.RxMode(); + } + + async event void Tda5250Control.TimerModeDone(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2On(); + setTimer(); + } + async event void Tda5250Control.SelfPollingModeDone(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2Off(); + setTimer(); + } + async event void Tda5250Control.RxModeDone(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0On(); + call Leds.led1Off(); + call Leds.led2On(); + setTimer(); + } + async event void Tda5250Control.TxModeDone(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0Off(); + call Leds.led1On(); + call Leds.led2On(); + setTimer(); + } + async event void Tda5250Control.SleepModeDone(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2On(); + setTimer(); + } + async event void Tda5250Control.RssiStable(){ + atomic mode = call Random.rand16() % 6; + call Leds.led0On(); + call Leds.led1Off(); + call Leds.led2Off(); + } + +} + + diff --git a/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc new file mode 100644 index 00000000..ff0158c4 --- /dev/null +++ b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc @@ -0,0 +1,188 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +module TestPacketSerializerP { + uses { + interface Boot; + interface Alarm as TxTimer; + interface Alarm as RxTimer; +// interface Alarm as TimerTimer; + interface Alarm as CCATimer; + interface Alarm as SelfPollingTimer; +// interface Alarm as SleepTimer; + interface Leds; + interface TDA5250Control; + interface Random; + interface SplitControl as RadioSplitControl; + interface Send; + interface Receive; + } +} + +implementation { + +#define TIMER_RATE 500 +#define NUM_BYTES TOSH_DATA_LENGTH + + uint8_t bytes_sent; + bool sending; + message_t sendMsg; + + event void Boot.booted() { + uint8_t i; + bytes_sent = 0; + sending = FALSE; + for(i=0; i as TxTimer; + interface Leds; + interface TDA5250Control; + interface Random; + interface SplitControl as RadioSplitControl; + interface PhyPacketTx; + interface PhyPacketRx; + interface RadioByteComm; + } +} + +implementation { + +#define TX_TIMER_RATE 500 +#define NUM_BYTES 36 + + uint8_t bytes_sent; + + event void Boot.booted() { + bytes_sent = 0; + call RadioSplitControl.start(); + } + + event void RadioSplitControl.startDone(error_t error) { + // call TDA5250Control.TxMode(); + call TDA5250Control.RxMode(); + } + + event void RadioSplitControl.stopDone(error_t error) { + call TxTimer.stop(); + } + + /*********************************************************************** + * Commands and events + ***********************************************************************/ + + async event void TxTimer.fired() { + call TDA5250Control.TxMode(); + } + + async event void TDA5250Control.TxModeDone(){ + call PhyPacketTx.sendHeader(); + } + + async event void PhyPacketTx.sendHeaderDone(error_t error) { + call RadioByteComm.txByte(call Random.rand16() / 2); + } + + async event void RadioByteComm.txByteReady(error_t error) { + if(++bytes_sent < NUM_BYTES) { + call RadioByteComm.txByte(call Random.rand16() / 2); + } else { + bytes_sent = 0; + call PhyPacketTx.sendFooter(); + } + } + + async event void PhyPacketTx.sendFooterDone(error_t error) { + call TDA5250Control.SleepMode(); + call TxTimer.start(call Random.rand16() % TX_TIMER_RATE); + call Leds.led0Toggle(); + } + + async event void PhyPacketRx.recvHeaderDone() { + call Leds.led2On(); + } + + async event void PhyPacketRx.recvFooterDone(bool error) { + } + + async event void RadioByteComm.rxByteReady(uint8_t data) { + call Leds.led2Toggle(); + } + + async event void TDA5250Control.PWDDDInterrupt() { + } + async event void TDA5250Control.TimerModeDone(){ + } + async event void TDA5250Control.SelfPollingModeDone(){ + } + async event void TDA5250Control.RxModeDone(){ + } + async event void TDA5250Control.SleepModeDone(){ + } + async event void TDA5250Control.CCAModeDone(){ + } + +} + + diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc new file mode 100644 index 00000000..e5d712e0 --- /dev/null +++ b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc @@ -0,0 +1,194 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2003 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +module TestUARTPhyP { + uses { + interface Boot; + interface Alarm as TxTimer; + interface Alarm as RxTimer; + interface Alarm as TimerTimer; + interface Alarm as CCATimer; +// interface Alarm as SelfPollingTimer; +// interface Alarm as SleepTimer; + interface Leds; + interface TDA5250Control; + interface Random; + interface SplitControl as RadioSplitControl; + interface PhyPacketTx; + interface PhyPacketRx; + interface RadioByteComm; + } +} + +implementation { + + #define TIMER_RATE 500 + #define NUM_BYTES 36 + + uint8_t bytes_sent; + bool sending; + + event void Boot.booted() { + bytes_sent = 0; + sending = FALSE; + call RadioSplitControl.start(); + } + + event void RadioSplitControl.startDone(error_t error) { + call TxTimer.start(call Random.rand16() % TIMER_RATE); + call TimerTimer.start(call Random.rand16() % TIMER_RATE); + call RxTimer.start(call Random.rand16() % TIMER_RATE); + call CCATimer.start(call Random.rand16() % TIMER_RATE); + } + + event void RadioSplitControl.stopDone(error_t error) { + call TxTimer.stop(); + } + + /*********************************************************************** + * Commands and events + ***********************************************************************/ + + async event void TxTimer.fired() { + atomic { + if(call TDA5250Control.TxMode() != FAIL) { + bytes_sent = 0; + sending = TRUE; + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2On(); + return; + } + } + call TxTimer.start(call Random.rand16() % TIMER_RATE); + } + + async event void RxTimer.fired() { + if(sending == FALSE) + if(call TDA5250Control.RxMode() != FAIL) + return; + call RxTimer.start(call Random.rand16() % TIMER_RATE); + } + + async event void CCATimer.fired() { + if(sending == FALSE) + if(call TDA5250Control.CCAMode() != FAIL) + return; + call CCATimer.start(call Random.rand16() % TIMER_RATE); + } + + async event void TimerTimer.fired() { + if(sending == FALSE) + if(call TDA5250Control.TimerMode(call Random.rand16() % TIMER_RATE/20, + call Random.rand16() % TIMER_RATE/20) != FAIL) + return; + call TimerTimer.start(call Random.rand16() % TIMER_RATE); + } + +// async event void SelfPollingTimer.fired() { +// if(sending == FALSE) +// if(call TDA5250Control.SelfPollingMode(call Random.rand16() % TIMER_RATE/20, +// call Random.rand16() % TIMER_RATE/20) != FAIL) +// return; +// call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE); +// } + +// async event void SleepTimer.fired() { +// if(sending == FALSE) +// if(call TDA5250Control.SleepMode() != FAIL) +// return; +// call SleepTimer.start(call Random.rand16() % TIMER_RATE); +// } + + + async event void TDA5250Control.TxModeDone(){ + call PhyPacketTx.sendHeader(); + } + + async event void PhyPacketTx.sendHeaderDone(error_t error) { + call RadioByteComm.txByte(call Random.rand16() / 2); + } + + async event void RadioByteComm.txByteReady(error_t error) { + if(++bytes_sent < NUM_BYTES) + call RadioByteComm.txByte(call Random.rand16() / 2); + else { + bytes_sent = 0; + call PhyPacketTx.sendFooter(); + } + } + + async event void PhyPacketTx.sendFooterDone(error_t error) { + call TDA5250Control.SleepMode(); + sending = FALSE; + call TxTimer.start(call Random.rand16() % TIMER_RATE); + } + + async event void TDA5250Control.TimerModeDone(){ + call TimerTimer.start(call Random.rand16() % TIMER_RATE); + call Leds.led0On(); + call Leds.led1On(); + call Leds.led2Off(); + } + async event void TDA5250Control.SelfPollingModeDone(){ +// call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE); +// call Leds.led0On(); +// call Leds.led1Off(); +// call Leds.led2On(); + } + async event void TDA5250Control.RxModeDone(){ + call RxTimer.start(call Random.rand16() % TIMER_RATE); + call Leds.led0Off(); + call Leds.led1On(); + call Leds.led2On(); + } + async event void TDA5250Control.SleepModeDone(){ +// call SleepTimer.start(call Random.rand16() % TIMER_RATE); + call Leds.led0Off(); + call Leds.led1Off(); + call Leds.led2On(); + } + async event void TDA5250Control.CCAModeDone(){ + call CCATimer.start(call Random.rand16() % TIMER_RATE); + call Leds.led0On(); + call Leds.led1Off(); + call Leds.led2Off(); + } + + async event void TDA5250Control.PWDDDInterrupt() { + } + async event void PhyPacketRx.recvHeaderDone() {} + async event void PhyPacketRx.recvFooterDone(bool error) {} + async event void RadioByteComm.rxByteReady(uint8_t data) {} + +} + + diff --git a/apps/tests/msp430/BlinkMSP430/BlinkC.nc b/apps/tests/msp430/BlinkMSP430/BlinkC.nc new file mode 100644 index 00000000..c39efceb --- /dev/null +++ b/apps/tests/msp430/BlinkMSP430/BlinkC.nc @@ -0,0 +1,15 @@ +// $Id$ + +configuration BlinkC +{ +} +implementation +{ + components MainC as Main, BlinkM, LedsC, MSP430TimerC; + BlinkM.Boot -> Main; + Main.SoftwareInit -> LedsC; + BlinkM.Leds -> LedsC; + BlinkM.TimerControl -> MSP430TimerC.ControlB4; + BlinkM.TimerCompare -> MSP430TimerC.CompareB4; +} + diff --git a/apps/tests/msp430/BlinkMSP430/BlinkM.nc b/apps/tests/msp430/BlinkMSP430/BlinkM.nc new file mode 100644 index 00000000..38b2bd40 --- /dev/null +++ b/apps/tests/msp430/BlinkMSP430/BlinkM.nc @@ -0,0 +1,26 @@ +// $Id$ + +module BlinkM +{ + uses interface MSP430TimerControl as TimerControl; + uses interface MSP430Compare as TimerCompare; + uses interface Boot; + uses interface Leds; +} +implementation +{ + event void Boot.booted() + { + call Leds.led1On(); + call TimerControl.setControlAsCompare(); + call TimerCompare.setEventFromNow( 8192 ); + call TimerControl.enableEvents(); + } + + async event void TimerCompare.fired() + { + call Leds.led0Toggle(); + call TimerCompare.setEventFromPrev( 8192 ); + } +} + diff --git a/apps/tests/msp430/BlinkMSP430/Makefile b/apps/tests/msp430/BlinkMSP430/Makefile new file mode 100644 index 00000000..57038bd6 --- /dev/null +++ b/apps/tests/msp430/BlinkMSP430/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkC +include $(MAKERULES) + diff --git a/apps/tests/storage/Block/Makefile b/apps/tests/storage/Block/Makefile new file mode 100644 index 00000000..43ed20b8 --- /dev/null +++ b/apps/tests/storage/Block/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RandRWAppC +include $(MAKERULES) diff --git a/apps/tests/storage/Block/README.txt b/apps/tests/storage/Block/README.txt new file mode 100644 index 00000000..191ffbff --- /dev/null +++ b/apps/tests/storage/Block/README.txt @@ -0,0 +1,30 @@ +README for Block +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Application to test the BlockStorageC abstraction. There must be a +volumes-.xml file in this directory describing the a 256kB volume +named BLOCKTEST for your flash chip. + +The mote id is of the form T*100 + k, where k is a random seed and +T specifies the test to be performed: + +T = 0: perform a full test +T = 2: read a previously written block with the same seed +T = 3: write a block with the given seed + +For example, install with an id of 310 to write some data to the flash, +then with an id of 210 to check that the data is correct. Or install +with an id of 10 to do a combined write+read test. + +A successful test will blink the yellow led a few times, then turn on the +green led. A failed test will turn on the red led. + +Tools: + +Known bugs/limitations: + +None. + +$Id$ diff --git a/apps/tests/storage/Block/RandRWAppC.nc b/apps/tests/storage/Block/RandRWAppC.nc new file mode 100644 index 00000000..6b1ac0ff --- /dev/null +++ b/apps/tests/storage/Block/RandRWAppC.nc @@ -0,0 +1,31 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Block storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ + +#include "StorageVolumes.h" + +configuration RandRWAppC { } +implementation { + components RandRWC, new BlockStorageC(VOLUME_BLOCKTEST), + MainC, LedsC, PlatformC, SerialActiveMessageC; + + MainC.Boot <- RandRWC; + + RandRWC.SerialControl -> SerialActiveMessageC; + RandRWC.AMSend -> SerialActiveMessageC.AMSend[1]; + RandRWC.BlockRead -> BlockStorageC.BlockRead; + RandRWC.BlockWrite -> BlockStorageC.BlockWrite; + RandRWC.Leds -> LedsC; +} diff --git a/apps/tests/storage/Block/RandRWC.nc b/apps/tests/storage/Block/RandRWC.nc new file mode 100644 index 00000000..385f8ea4 --- /dev/null +++ b/apps/tests/storage/Block/RandRWC.nc @@ -0,0 +1,248 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Block storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ +/* + address & 3: + 0, 2: r + 1: w + 3: r&w +*/ +module RandRWC { + uses { + interface Boot; + interface Leds; + interface BlockRead; + interface BlockWrite; + interface AMSend; + interface SplitControl as SerialControl; + } +} +implementation { + enum { + SIZE = 1024L * 256, + NWRITES = SIZE / 4096, + }; + + uint16_t shiftReg; + uint16_t initSeed; + uint16_t mask; + + /* Return the next 16 bit random number */ + uint16_t rand() { + bool endbit; + uint16_t tmpShiftReg; + + tmpShiftReg = shiftReg; + endbit = ((tmpShiftReg & 0x8000) != 0); + tmpShiftReg <<= 1; + if (endbit) + tmpShiftReg ^= 0x100b; + tmpShiftReg++; + shiftReg = tmpShiftReg; + tmpShiftReg = tmpShiftReg ^ mask; + + return tmpShiftReg; + } + + void resetSeed() { + shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); + initSeed = shiftReg; + mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); + } + + uint8_t data[512], rdata[512]; + int count, testCount; + uint32_t addr, len; + uint16_t offset; + message_t reportmsg; + + void done(); + + void report(error_t e) { + uint8_t *msg = call AMSend.getPayload(&reportmsg); + + msg[0] = e; + if (call AMSend.send(AM_BROADCAST_ADDR, &reportmsg, 1) != SUCCESS) + call Leds.led0On(); + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if (error != SUCCESS) + call Leds.led0On(); + } + + void fail(error_t e) { + call Leds.led0On(); + report(e); + } + + void success() { + call Leds.led1On(); + report(0x80); + } + + bool scheck(error_t r) __attribute__((noinline)) { + if (r != SUCCESS) + fail(r); + return r == SUCCESS; + } + + bool bcheck(bool b) { + if (!b) + fail(FAIL); + return b; + } + + void setParameters() { + addr = (uint32_t)count << 12 | (rand() >> 6); + len = rand() >> 7; + if (addr + len > SIZE) + addr = SIZE - len; + offset = rand() >> 8; + if (offset + len > sizeof data) + offset = sizeof data - len; + } + + event void Boot.booted() { + call SerialControl.start(); + } + + event void SerialControl.stopDone(error_t e) { } + + event void SerialControl.startDone(error_t e) { + int i; + + if (e != SUCCESS) + { + call Leds.led0On(); + return; + } + + resetSeed(); + for (i = 0; i < sizeof data; i++) + data[i++] = rand() >> 8; + + done(); + } + + void nextRead() { + if (++count == NWRITES) + done(); + else + { + setParameters(); + scheck(call BlockRead.read(addr, rdata, len)); + } + } + + void nextWrite() { + if (++count == NWRITES) + { + call Leds.led2Toggle(); + scheck(call BlockWrite.commit()); + } + else + { + setParameters(); + scheck(call BlockWrite.write(addr, data + offset, len)); + } + } + + event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) { + if (scheck(result)) + nextWrite(); + } + + event void BlockWrite.eraseDone(error_t result) { + if (scheck(result)) + { + call Leds.led2Toggle(); + nextWrite(); + } + } + + event void BlockWrite.commitDone(error_t result) { + if (scheck(result)) + done(); + } + + event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { + if (scheck(result) && bcheck(x == addr && rlen == len && buf == rdata && + memcmp(data + offset, rdata, rlen) == 0)) + nextRead(); + } + + event void BlockRead.verifyDone(error_t result) { + if (scheck(result)) + { + call Leds.led2Toggle(); + nextRead(); + } + } + + event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) { + } + + enum { A_READ = 2, A_WRITE }; + + void doAction(int act) { + count = 0; + resetSeed(); + + switch (act) + { + case A_WRITE: + scheck(call BlockWrite.erase()); + break; + case A_READ: + scheck(call BlockRead.verify()); + break; + } + } + + const uint8_t actions[] = { + A_WRITE, + A_READ + }; + + void done() { + uint8_t act = TOS_NODE_ID / 100; + + call Leds.led2Toggle(); + + switch (act) + { + case 0: + if (testCount < sizeof actions) + doAction(actions[testCount]); + else + success(); + break; + + case A_READ: case A_WRITE: + if (testCount) + success(); + else + doAction(act); + break; + + default: + fail(FAIL); + break; + } + testCount++; + } + +} diff --git a/apps/tests/storage/Block/volumes-at45db.xml b/apps/tests/storage/Block/volumes-at45db.xml new file mode 100644 index 00000000..792c8d6b --- /dev/null +++ b/apps/tests/storage/Block/volumes-at45db.xml @@ -0,0 +1,3 @@ + + + diff --git a/apps/tests/storage/Block/volumes-stm25p.xml b/apps/tests/storage/Block/volumes-stm25p.xml new file mode 100644 index 00000000..70a68f96 --- /dev/null +++ b/apps/tests/storage/Block/volumes-stm25p.xml @@ -0,0 +1,4 @@ + + + + \ No newline at end of file diff --git a/apps/tests/storage/CircularLog/Makefile b/apps/tests/storage/CircularLog/Makefile new file mode 100644 index 00000000..43ed20b8 --- /dev/null +++ b/apps/tests/storage/CircularLog/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RandRWAppC +include $(MAKERULES) diff --git a/apps/tests/storage/CircularLog/README.txt b/apps/tests/storage/CircularLog/README.txt new file mode 100644 index 00000000..135989e3 --- /dev/null +++ b/apps/tests/storage/CircularLog/README.txt @@ -0,0 +1,36 @@ +README for CircularLog +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Application to test the LogStorageC abstraction, using the log in circular +mode. There must be a volumes-.xml file in this directory describing +the a 256kB volume named LOGTEST for your flash chip. + +The mote id is of the form T*100 + k, where k is a random seed and +T specifies the test to be performed: + +T = 0: perform a full test +T = 1: erase the log +T = 2: read the log +T = 3: write some data to the log + +The write test writes a random sequence of 4095 32-byte records chosen from +a set of 16 possible records. The read test checks that the log contains +that all records in the log are one of the 16 possible records. The valid +records depend on the seed. Running 2 write tests will fill the log, and +the third one will wrap around. So for instance, you could run the test +with id = 117 (erase), then 317 three times (fill the log and wrap around), +then 217 to check that the log is valid. Or just run it with id = 17 +to perform a full test. + +A successful test will turn on the green led. A failed test will turn on +the red led. The yellow led is turned on after erase is complete. + +Tools: + +Known bugs/limitations: + +None. + +$Id$ diff --git a/apps/tests/storage/CircularLog/RandRWAppC.nc b/apps/tests/storage/CircularLog/RandRWAppC.nc new file mode 100644 index 00000000..008bc0bd --- /dev/null +++ b/apps/tests/storage/CircularLog/RandRWAppC.nc @@ -0,0 +1,31 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Block storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ + +#include "StorageVolumes.h" + +configuration RandRWAppC { } +implementation { + components RandRWC, new LogStorageC(VOLUME_LOGTEST, TRUE), + MainC, LedsC, PlatformC, SerialActiveMessageC; + + MainC.Boot <- RandRWC; + + RandRWC.SerialControl -> SerialActiveMessageC; + RandRWC.AMSend -> SerialActiveMessageC.AMSend[1]; + RandRWC.LogRead -> LogStorageC.LogRead; + RandRWC.LogWrite -> LogStorageC.LogWrite; + RandRWC.Leds -> LedsC; +} diff --git a/apps/tests/storage/CircularLog/RandRWC.nc b/apps/tests/storage/CircularLog/RandRWC.nc new file mode 100644 index 00000000..3c91369e --- /dev/null +++ b/apps/tests/storage/CircularLog/RandRWC.nc @@ -0,0 +1,241 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Log storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ +/* + address & 3: + 1: erase, write + 2: read + 3: write some more +*/ +module RandRWC { + uses { + interface Boot; + interface Leds; + interface LogRead; + interface LogWrite; + interface AMSend; + interface SplitControl as SerialControl; + } +} +implementation { + enum { + SIZE = 1024L * 256, + RECSIZE = 32, + NRECS = 16, + NWRITES = SIZE / (2 * RECSIZE), + }; + + uint16_t shiftReg; + uint16_t initSeed; + uint16_t mask; + + void done(); + + /* Return the next 16 bit random number */ + uint16_t rand() { + bool endbit; + uint16_t tmpShiftReg; + + tmpShiftReg = shiftReg; + endbit = ((tmpShiftReg & 0x8000) != 0); + tmpShiftReg <<= 1; + if (endbit) + tmpShiftReg ^= 0x100b; + tmpShiftReg++; + shiftReg = tmpShiftReg; + tmpShiftReg = tmpShiftReg ^ mask; + + return tmpShiftReg; + } + + void resetSeed() { + shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); + initSeed = shiftReg; + mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); + } + + uint8_t data[NRECS * RECSIZE], rdata[RECSIZE]; + int count, testCount; + message_t reportmsg; + + void report(error_t e) { + uint8_t *msg = call AMSend.getPayload(&reportmsg); + + msg[0] = e; + if (call AMSend.send(AM_BROADCAST_ADDR, &reportmsg, 1) != SUCCESS) + call Leds.led0On(); + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if (error != SUCCESS) + call Leds.led0On(); + } + + void fail(error_t e) { + call Leds.led0On(); + report(e); + } + + void success() { + call Leds.led1On(); + report(0x80); + } + + bool scheck(error_t r) __attribute__((noinline)) { + if (r != SUCCESS) + fail(r); + return r == SUCCESS; + } + + bool bcheck(bool b) { + if (!b) + fail(FAIL); + return b; + } + + void nextRead() { + scheck(call LogRead.read(rdata, RECSIZE)); + } + + event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { + if (rlen == 0) + done(); + else if (scheck(result) && bcheck(rlen == RECSIZE && buf == rdata)) + { + int i; + + /* It must be one of our possible records */ + for (i = 0; i < sizeof data; i += RECSIZE) + if (memcmp(buf, data + i, RECSIZE) == 0) + { + nextRead(); + return; + } + bcheck(FALSE); + } + } + + event void LogRead.seekDone(error_t error) { + } + + void nextWrite() { + if (count++ == NWRITES) + scheck(call LogWrite.sync()); + else + { + int offset = ((rand() >> 8) % NRECS) * RECSIZE; + + scheck(call LogWrite.append(data + offset, RECSIZE)); + } + } + + event void LogWrite.appendDone(void *buf, storage_len_t y, error_t result) { + if (scheck(result)) + nextWrite(); + } + + event void LogWrite.eraseDone(error_t result) { + if (scheck(result)) + done(); + } + + event void LogWrite.syncDone(error_t result) { + if (scheck(result)) + done(); + } + + event void Boot.booted() { + int i; + + resetSeed(); + for (i = 0; i < sizeof data; i++) + data[i++] = rand() >> 8; + + call SerialControl.start(); + } + + event void SerialControl.stopDone(error_t e) { } + + event void SerialControl.startDone(error_t e) { + if (e != SUCCESS) + { + call Leds.led0On(); + return; + } + + testCount = 0; + done(); + } + + enum { A_ERASE = 1, A_READ, A_WRITE }; + + void doAction(int act) { + switch (act) + { + case A_ERASE: + scheck(call LogWrite.erase()); + break; + case A_WRITE: + resetSeed(); + count = 0; + nextWrite(); + break; + case A_READ: + resetSeed(); + count = 0; + nextRead(); + break; + } + } + + const uint8_t actions[] = { + A_ERASE, + A_READ, + A_WRITE, + A_READ, + A_WRITE, + A_WRITE, + A_WRITE, + A_READ, + }; + + void done() { + uint8_t act = TOS_NODE_ID / 100; + + call Leds.led2Toggle(); + + switch (act) + { + case 0: + if (testCount < sizeof actions) + doAction(actions[testCount]); + else + success(); + break; + + case A_ERASE: case A_READ: case A_WRITE: + if (testCount) + success(); + else + doAction(act); + break; + + default: + fail(FAIL); + break; + } + testCount++; + } +} diff --git a/apps/tests/storage/CircularLog/volumes-at45db.xml b/apps/tests/storage/CircularLog/volumes-at45db.xml new file mode 100644 index 00000000..daa0d507 --- /dev/null +++ b/apps/tests/storage/CircularLog/volumes-at45db.xml @@ -0,0 +1,3 @@ + + + diff --git a/apps/tests/storage/CircularLog/volumes-stm25p.xml b/apps/tests/storage/CircularLog/volumes-stm25p.xml new file mode 100644 index 00000000..dbe926a1 --- /dev/null +++ b/apps/tests/storage/CircularLog/volumes-stm25p.xml @@ -0,0 +1,4 @@ + + + + diff --git a/apps/tests/storage/Config/Makefile b/apps/tests/storage/Config/Makefile new file mode 100644 index 00000000..43ed20b8 --- /dev/null +++ b/apps/tests/storage/Config/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RandRWAppC +include $(MAKERULES) diff --git a/apps/tests/storage/Config/README.txt b/apps/tests/storage/Config/README.txt new file mode 100644 index 00000000..aecb7701 --- /dev/null +++ b/apps/tests/storage/Config/README.txt @@ -0,0 +1,26 @@ +README for Config +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Application to test the ConfigStorageC abstraction. There must be a +volumes-.xml file in this directory describing the a volume +named CONFIGTEST capable of storing 2kB of config data. + +The mote id is of the form T*100 + k, where k is a random seed and +T specifies the test to be performed: + +T = 0: do a bunch of writes, reads and commits +T != 0: check if the contents of the volume are consistent with + a previous run with T = 0 and the same random seed + +A successful test will turn on the green led. A failed test will turn on +the red led. The yellow led blinks to indicate test progress + +Tools: + +Known bugs/limitations: + +None. + +$Id$ diff --git a/apps/tests/storage/Config/RandRWAppC.nc b/apps/tests/storage/Config/RandRWAppC.nc new file mode 100644 index 00000000..7a41aa08 --- /dev/null +++ b/apps/tests/storage/Config/RandRWAppC.nc @@ -0,0 +1,31 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Block storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ + +#include "StorageVolumes.h" + +configuration RandRWAppC { } +implementation { + components RandRWC, new ConfigStorageC(VOLUME_CONFIGTEST), + MainC, LedsC, PlatformC, SerialActiveMessageC; + + MainC.Boot <- RandRWC; + + RandRWC.SerialControl -> SerialActiveMessageC; + RandRWC.AMSend -> SerialActiveMessageC.AMSend[1]; + RandRWC.ConfigStorage -> ConfigStorageC.ConfigStorage; + RandRWC.ConfigMount -> ConfigStorageC.Mount; + RandRWC.Leds -> LedsC; +} diff --git a/apps/tests/storage/Config/RandRWC.nc b/apps/tests/storage/Config/RandRWC.nc new file mode 100644 index 00000000..c286f991 --- /dev/null +++ b/apps/tests/storage/Config/RandRWC.nc @@ -0,0 +1,284 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Log storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ +module RandRWC { + uses { + interface Boot; + interface Leds; + interface ConfigStorage; + interface AMSend; + interface SplitControl as SerialControl; + interface Mount as ConfigMount; + } +} +implementation { + enum { + SIZE = 2048, + NWRITES = 100, + }; + + uint16_t shiftReg; + uint16_t initSeed; + uint16_t mask; + + uint8_t data[512], rdata[512]; + int count, testCount, writeCount, countAtCommit; + struct { + uint32_t addr; + void *data; + uint16_t len; + } ops[NWRITES]; + + message_t reportmsg; + + + void done(); + + /* Return the next 16 bit random number */ + uint16_t rand() { + bool endbit; + uint16_t tmpShiftReg; + + tmpShiftReg = shiftReg; + endbit = ((tmpShiftReg & 0x8000) != 0); + tmpShiftReg <<= 1; + if (endbit) + tmpShiftReg ^= 0x100b; + tmpShiftReg++; + shiftReg = tmpShiftReg; + tmpShiftReg = tmpShiftReg ^ mask; + + return tmpShiftReg; + } + + void resetSeed(int offset) { + shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1 + offset); + initSeed = shiftReg; + mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1 + offset); + } + + void report(error_t e) { + uint8_t *msg = call AMSend.getPayload(&reportmsg); + + msg[0] = e; + if (call AMSend.send(AM_BROADCAST_ADDR, &reportmsg, 1) != SUCCESS) + call Leds.led0On(); + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if (error != SUCCESS) + call Leds.led0On(); + } + + void fail(error_t e) { + call Leds.led0On(); + report(e); + } + + void success() { + call Leds.led1On(); + report(0x80); + } + + bool scheck(error_t r) __attribute__((noinline)) { + if (r != SUCCESS) + fail(r); + return r == SUCCESS; + } + + bool bcheck(bool b) { + if (!b) + fail(FAIL); + return b; + } + + void setupOps(int wcount) { + int i; + uint16_t offset; + + count = 0; + resetSeed(wcount); + + for (i = 0; i < NWRITES; i++) + { + uint16_t addr = rand() & (SIZE - 1); + uint16_t len = rand() >> 7; + if (addr + len > SIZE) + addr = SIZE - len; + ops[i].addr = addr; + ops[i].len = len; + offset = rand() >> 8; + if (offset + ops[i].len > sizeof data) + offset = sizeof data - ops[i].len; + ops[i].data = data + offset; + } + } + + int overlap(int a, int b) { + + return ops[a].addr >= ops[b].addr && ops[a].addr < ops[b].addr + ops[b].len; + } + + int overwritten(int c) { + int i; + + /* True if write c is overwritten by a later write */ + for (i = c + 1; i < NWRITES; i++) + if (overlap(i, c) || overlap(c, i)) + return TRUE; + return FALSE; + } + + void nextRead() { + int c = count++; + + if (c == NWRITES) + done(); + else + scheck(call ConfigStorage.read(ops[c].addr, rdata, ops[c].len)); + } + + event void ConfigStorage.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { + int c = count - 1; + + if (scheck(result) && + bcheck(x == ops[c].addr && rlen == ops[c].len && buf == rdata) && + bcheck(overwritten(c) || memcmp(ops[c].data, rdata, rlen) == 0)) + nextRead(); + } + + void nextWrite() { + int c = count++; + + if (c == NWRITES) + done(); + else + scheck(call ConfigStorage.write(ops[c].addr, ops[c].data, ops[c].len)); + } + + event void ConfigStorage.writeDone(storage_addr_t x, void *buf, storage_len_t y, error_t result) { + int c = count - 1; + + if (scheck(result) && + bcheck(x == ops[c].addr && y == ops[c].len && buf == ops[c].data)) + nextWrite(); + } + + event void ConfigStorage.commitDone(error_t result) { + if (scheck(result)) + done(); + } + + event void Boot.booted() { + int i; + + resetSeed(0); + for (i = 0; i < sizeof data; i++) + data[i++] = rand() >> 8; + + call SerialControl.start(); + } + + event void SerialControl.startDone(error_t e) { + if (e != SUCCESS) + { + call Leds.led0On(); + return; + } + + scheck(call ConfigMount.mount()); + } + + event void ConfigMount.mountDone(error_t e) { + if (e != SUCCESS) + fail(e); + else + done(); + } + + enum { A_COMMIT, A_READ, A_WRITE }; + + void doAction(int act) { + switch (act) + { + case A_COMMIT: + countAtCommit = writeCount; + scheck(call ConfigStorage.commit()); + break; + case A_WRITE: + setupOps(++writeCount); + nextWrite(); + break; + case A_READ: + setupOps(countAtCommit); + nextRead(); + break; + } + } + + const uint8_t actions[] = { + A_WRITE, + A_COMMIT, + A_READ, + A_WRITE, + A_COMMIT, + A_READ, + A_WRITE, + A_READ + }; + + void done() { + uint8_t act = TOS_NODE_ID / 100; + + call Leds.led2Toggle(); + + switch (act) + { + case 0: + if (testCount < sizeof actions) + doAction(actions[testCount]); + else + success(); + break; + + default: + if (testCount) + success(); + else + { + uint8_t i, nwrites = 0; + + /* Figure out countAtCommit */ + for (i = 0; i < sizeof actions; i++) + switch (actions[i]) + { + case A_WRITE: + nwrites++; + break; + case A_COMMIT: + countAtCommit = nwrites; + break; + } + + /* And check we have the right data */ + doAction(A_READ); + } + break; + } + testCount++; + } + + event void SerialControl.stopDone(error_t e) { } +} diff --git a/apps/tests/storage/Config/volumes-at45db.xml b/apps/tests/storage/Config/volumes-at45db.xml new file mode 100644 index 00000000..7cc59802 --- /dev/null +++ b/apps/tests/storage/Config/volumes-at45db.xml @@ -0,0 +1,4 @@ + + + + diff --git a/apps/tests/storage/Config/volumes-stm25p.xml b/apps/tests/storage/Config/volumes-stm25p.xml new file mode 100644 index 00000000..adce9924 --- /dev/null +++ b/apps/tests/storage/Config/volumes-stm25p.xml @@ -0,0 +1,4 @@ + + + + diff --git a/apps/tests/storage/Log/Makefile b/apps/tests/storage/Log/Makefile new file mode 100644 index 00000000..43ed20b8 --- /dev/null +++ b/apps/tests/storage/Log/Makefile @@ -0,0 +1,2 @@ +COMPONENT=RandRWAppC +include $(MAKERULES) diff --git a/apps/tests/storage/Log/README.txt b/apps/tests/storage/Log/README.txt new file mode 100644 index 00000000..c0ec039b --- /dev/null +++ b/apps/tests/storage/Log/README.txt @@ -0,0 +1,37 @@ +README for Log +Author/Contact: tinyos-help@millennium.berkeley.edu + +Description: + +Application to test the LogStorageC abstraction, using the log in linear +mode. There must be a volumes-.xml file in this directory describing +a 256kB volume named LOGTEST for your flash chip. + +The mote id is of the form T*100 + k, where k is a random seed and +T specifies the test to be performed: + +T = 0: perform a full test +T = 1: erase the log +T = 2: read the log +T = 3: write some data to the log + +The read test expects to see one or more consecutive results of the data +written by the write test (with the same seed). The last write data can be +partial. So, for instance, you could run the test with mote id = 104, then +304 twice to erase the log and write 2 copies of the data sequence for k = +4, then run with mote id = 204 to test all these writes. Or you can just +run the test with mote id = 4 to do a complete test. + +If the log fills up (which should take 4 or 5 write operations), the write +will fail, but a subsequent read will succeed. + +A successful test will turn on the green led. A failed test will turn on +the red led. The yellow led blinks during the steps of the full test. + +Tools: + +Known bugs/limitations: + +None. + +$Id$ diff --git a/apps/tests/storage/Log/RandRWAppC.nc b/apps/tests/storage/Log/RandRWAppC.nc new file mode 100644 index 00000000..8f8a21fe --- /dev/null +++ b/apps/tests/storage/Log/RandRWAppC.nc @@ -0,0 +1,31 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Block storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ + +#include "StorageVolumes.h" + +configuration RandRWAppC { } +implementation { + components RandRWC, new LogStorageC(VOLUME_LOGTEST, FALSE), + MainC, LedsC, PlatformC, SerialActiveMessageC; + + MainC.Boot <- RandRWC; + + RandRWC.SerialControl -> SerialActiveMessageC; + RandRWC.AMSend -> SerialActiveMessageC.AMSend[1]; + RandRWC.LogRead -> LogStorageC.LogRead; + RandRWC.LogWrite -> LogStorageC.LogWrite; + RandRWC.Leds -> LedsC; +} diff --git a/apps/tests/storage/Log/RandRWC.nc b/apps/tests/storage/Log/RandRWC.nc new file mode 100644 index 00000000..4e322de5 --- /dev/null +++ b/apps/tests/storage/Log/RandRWC.nc @@ -0,0 +1,247 @@ +/* $Id$ + * Copyright (c) 2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ +/** + * Log storage test application. Does a pattern of random reads and + * writes, based on mote id. See README.txt for more details. + * + * @author David Gay + */ +/* + address & 3: + 1: erase, write + 2: read + 3: write some more +*/ +module RandRWC { + uses { + interface Boot; + interface Leds; + interface LogRead; + interface LogWrite; + interface AMSend; + interface SplitControl as SerialControl; + } +} +implementation { + enum { + SIZE = 1024L * 256, + NWRITES = SIZE / 512, + }; + + uint16_t shiftReg; + uint16_t initSeed; + uint16_t mask; + + void done(); + + /* Return the next 16 bit random number */ + uint16_t rand() { + bool endbit; + uint16_t tmpShiftReg; + + tmpShiftReg = shiftReg; + endbit = ((tmpShiftReg & 0x8000) != 0); + tmpShiftReg <<= 1; + if (endbit) + tmpShiftReg ^= 0x100b; + tmpShiftReg++; + shiftReg = tmpShiftReg; + tmpShiftReg = tmpShiftReg ^ mask; + + return tmpShiftReg; + } + + void resetSeed() { + shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1); + initSeed = shiftReg; + mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1); + } + + uint8_t data[512], rdata[512]; + int count, testCount; + uint32_t len; + uint16_t offset; + message_t reportmsg; + + void report(error_t e) { + uint8_t *msg = call AMSend.getPayload(&reportmsg); + + msg[0] = e; + if (call AMSend.send(AM_BROADCAST_ADDR, &reportmsg, 1) != SUCCESS) + call Leds.led0On(); + } + + event void AMSend.sendDone(message_t* msg, error_t error) { + if (error != SUCCESS) + call Leds.led0On(); + } + + void fail(error_t e) { + call Leds.led0On(); + report(e); + } + + void success() { + call Leds.led1On(); + report(0x80); + } + + bool scheck(error_t r) __attribute__((noinline)) { + if (r != SUCCESS) + fail(r); + return r == SUCCESS; + } + + bool bcheck(bool b) { + if (!b) + fail(FAIL); + return b; + } + + void setParameters() { + len = rand() >> 8; + offset = rand() >> 9; + if ( len > 254 ) + len = 254; + if (offset + len > sizeof data) + offset = sizeof data - len; + } + + void nextRead() { + if (count == NWRITES) + count = 0; + if (count++ == 0) + resetSeed(); + setParameters(); + scheck(call LogRead.read(rdata, len)); + } + + event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) { + if (len != 0 && rlen == 0) + done(); + else if (scheck(result) && bcheck(rlen == len && buf == rdata && memcmp(data + offset, rdata, rlen) == 0)) + nextRead(); + } + + event void LogRead.seekDone(error_t error) { + } + + void nextWrite() { + if (count++ == NWRITES) + scheck(call LogWrite.sync()); + else + { + setParameters(); + scheck(call LogWrite.append(data + offset, len)); + } + } + + event void LogWrite.appendDone(void *buf, storage_len_t y, error_t result) { + if (scheck(result)) + nextWrite(); + } + + event void LogWrite.eraseDone(error_t result) { + if (scheck(result)) + done(); + } + + event void LogWrite.syncDone(error_t result) { + if (scheck(result)) + done(); + } + + event void Boot.booted() { + int i; + + resetSeed(); + for (i = 0; i < sizeof data; i++) + data[i++] = rand() >> 8; + + call SerialControl.start(); + } + + event void SerialControl.stopDone(error_t e) { } + + event void SerialControl.startDone(error_t e) { + if (e != SUCCESS) + { + call Leds.led0On(); + return; + } + + testCount = 0; + done(); + } + + enum { A_ERASE = 1, A_READ, A_WRITE }; + + void doAction(int act) { + switch (act) + { + case A_ERASE: + scheck(call LogWrite.erase()); + break; + case A_WRITE: + resetSeed(); + count = 0; + nextWrite(); + break; + case A_READ: + resetSeed(); + count = 0; + nextRead(); + break; + } + } + + const uint8_t actions[] = { + A_ERASE, + A_READ, + A_WRITE, + A_READ, + A_WRITE, + A_WRITE, + A_WRITE, + A_READ, + A_ERASE, + A_READ, + A_WRITE, + A_WRITE + }; + + void done() { + uint8_t act = TOS_NODE_ID / 100; + + call Leds.led2Toggle(); + + switch (act) + { + case 0: + if (testCount < sizeof actions) + doAction(actions[testCount]); + else + success(); + break; + + case A_ERASE: case A_READ: case A_WRITE: + if (testCount) + success(); + else + doAction(act); + break; + + default: + fail(FAIL); + break; + } + testCount++; + } +} diff --git a/apps/tests/storage/Log/volumes-at45db.xml b/apps/tests/storage/Log/volumes-at45db.xml new file mode 100644 index 00000000..daa0d507 --- /dev/null +++ b/apps/tests/storage/Log/volumes-at45db.xml @@ -0,0 +1,3 @@ + + + diff --git a/apps/tests/storage/Log/volumes-stm25p.xml b/apps/tests/storage/Log/volumes-stm25p.xml new file mode 100644 index 00000000..dbe926a1 --- /dev/null +++ b/apps/tests/storage/Log/volumes-stm25p.xml @@ -0,0 +1,4 @@ + + + + diff --git a/apps/tutorials/BlinkTask/BlinkTaskAppC.nc b/apps/tutorials/BlinkTask/BlinkTaskAppC.nc new file mode 100644 index 00000000..77c32bbf --- /dev/null +++ b/apps/tutorials/BlinkTask/BlinkTaskAppC.nc @@ -0,0 +1,49 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2005 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + */ + +/** + * + * @author tinyos-help@millennium.berkeley.edu + **/ + +configuration BlinkTaskAppC +{ +} +implementation +{ + components MainC, BlinkTaskC, LedsC; + components new TimerMilliC() as Timer0; + + BlinkTaskC -> MainC.Boot; + BlinkTaskC.Timer0 -> Timer0; + BlinkTaskC.Leds -> LedsC; +} + diff --git a/apps/tutorials/BlinkTask/BlinkTaskC.nc b/apps/tutorials/BlinkTask/BlinkTaskC.nc new file mode 100644 index 00000000..d10523ac --- /dev/null +++ b/apps/tutorials/BlinkTask/BlinkTaskC.nc @@ -0,0 +1,71 @@ +// $Id$ + +/* tab:4 + * "Copyright (c) 2000-2005 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + * Copyright (c) 2002-2003 Intel Corporation + * All rights reserved. + * + * This file is distributed under the terms in the attached INTEL-LICENSE + * file. If you do not find these files, copies can be found by writing to + * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, + * 94704. Attention: Intel License Inquiry. + * + */ + +/** + * BlinkTask demo application: simple example of posting a task in TinyOS. + * + * @author Kristin Wright + * + */ + +/** + * Blink Led0 every second. For expository purposes, use a task to + * toggle the LED. + **/ + +#include "Timer.h" + +module BlinkTaskC +{ + uses interface Timer as Timer0; + uses interface Leds; + uses interface Boot; +} +implementation +{ + task void toggle() + { + call Leds.led0Toggle(); + } + + event void Boot.booted() + { + call Timer0.startPeriodic( 1000 ); + } + + event void Timer0.fired() + { + post toggle(); + } + +} + diff --git a/apps/tutorials/BlinkTask/Makefile b/apps/tutorials/BlinkTask/Makefile new file mode 100644 index 00000000..349fe480 --- /dev/null +++ b/apps/tutorials/BlinkTask/Makefile @@ -0,0 +1,4 @@ +COMPONENT=BlinkTaskAppC + +include $(MAKERULES) + diff --git a/apps/tutorials/BlinkTask/README.txt b/apps/tutorials/BlinkTask/README.txt new file mode 100644 index 00000000..f200f8d8 --- /dev/null +++ b/apps/tutorials/BlinkTask/README.txt @@ -0,0 +1,22 @@ +$Id$ + +README for BlinkTask + +Author/Contact: + + tinyos-help@millennium.berkeley.edu + +Description: + + The BlinkTask application: a simple example of how to post a task + in TinyOS. A periodic timer is set to fire every + second. The Timer.fired() event posts a task to toggle the LEDs + rather than toggling the LEDs directly. + +Tools: + + None + +Known bugs/limitations: + + None. \ No newline at end of file diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadio.h b/apps/tutorials/BlinkToRadio/BlinkToRadio.h new file mode 100644 index 00000000..ce100013 --- /dev/null +++ b/apps/tutorials/BlinkToRadio/BlinkToRadio.h @@ -0,0 +1,16 @@ +// $Id$ + +#ifndef BLINKTORADIO_H +#define BLINKTORADIO_H + +enum { + AM_BLINKTORADIO = 6, + TIMER_PERIOD_MILLI = 250 +}; + +typedef nx_struct BlinkToRadioMsg { + nx_uint16_t nodeid; + nx_uint16_t counter; +} BlinkToRadioMsg; + +#endif diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc b/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc new file mode 100644 index 00000000..a0a2ef59 --- /dev/null +++ b/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc @@ -0,0 +1,61 @@ +// $Id$ + +/* + * "Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * Application file for the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +configuration BlinkToRadioAppC { +} +implementation { + components MainC; + components LedsC; + components BlinkToRadioC as App; + components new TimerMilliC() as Timer0; + components ActiveMessageC; + components new AMSenderC(AM_BLINKTORADIO); + components new AMReceiverC(AM_BLINKTORADIO); + + App.Boot -> MainC; + App.Leds -> LedsC; + App.Timer0 -> Timer0; + App.Packet -> AMSenderC; + App.AMPacket -> AMSenderC; + App.AMControl -> ActiveMessageC; + App.AMSend -> AMSenderC; + App.Receive -> AMReceiverC; +} diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc b/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc new file mode 100644 index 00000000..11869665 --- /dev/null +++ b/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc @@ -0,0 +1,116 @@ +// $Id$ + +/* + * "Copyright (c) 2000-2006 The Regents of the University of California. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation for any purpose, without fee, and without written agreement is + * hereby granted, provided that the above copyright notice, the following + * two paragraphs and the author appear in all copies of this software. + * + * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR + * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT + * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF + * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO + * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS." + * + */ + +/** + * Implementation of the BlinkToRadio application. A counter is + * incremented and a radio message is sent whenever a timer fires. + * Whenever a radio message is received, the three least significant + * bits of the counter in the message payload are displayed on the + * LEDs. Program two motes with this application. As long as they + * are both within range of each other, the LEDs on both will keep + * changing. If the LEDs on one (or both) of the nodes stops changing + * and hold steady, then that node is no longer receiving any messages + * from the other node. + * + * @author Prabal Dutta + * @date Feb 1, 2006 + */ +#include +#include "BlinkToRadio.h" + +module BlinkToRadioC { + uses interface Boot; + uses interface Leds; + uses interface Timer as Timer0; + uses interface Packet; + uses interface AMPacket; + uses interface AMSend; + uses interface Receive; + uses interface SplitControl as AMControl; +} +implementation { + + uint16_t counter; + message_t pkt; + bool busy = FALSE; + + void setLeds(uint16_t val) { + if (val & 0x01) + call Leds.led0On(); + else + call Leds.led0Off(); + if (val & 0x02) + call Leds.led1On(); + else + call Leds.led1Off(); + if (val & 0x04) + call Leds.led2On(); + else + call Leds.led2Off(); + } + + event void Boot.booted() { + call AMControl.start(); + } + + event void AMControl.startDone(error_t err) { + if (err == SUCCESS) { + call Timer0.startPeriodic(TIMER_PERIOD_MILLI); + } + else { + call AMControl.start(); + } + } + + event void AMControl.stopDone(error_t err) { + } + + event void Timer0.fired() { + counter++; + if (!busy) { + BlinkToRadioMsg* btrpkt = + (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, NULL)); + btrpkt->nodeid = TOS_NODE_ID; + btrpkt->counter = counter; + if (call AMSend.send(AM_BROADCAST_ADDR, + &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) { + busy = TRUE; + } + } + } + + event void AMSend.sendDone(message_t* msg, error_t err) { + if (&pkt == msg) { + busy = FALSE; + } + } + + event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){ + if (len == sizeof(BlinkToRadioMsg)) { + BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload; + setLeds(btrpkt->counter); + } + return msg; + } +} diff --git a/apps/tutorials/BlinkToRadio/Makefile b/apps/tutorials/BlinkToRadio/Makefile new file mode 100644 index 00000000..b7135212 --- /dev/null +++ b/apps/tutorials/BlinkToRadio/Makefile @@ -0,0 +1,3 @@ +COMPONENT=BlinkToRadioAppC +include $(MAKERULES) + diff --git a/apps/tutorials/BlinkToRadio/README.txt b/apps/tutorials/BlinkToRadio/README.txt new file mode 100644 index 00000000..0aef98cd --- /dev/null +++ b/apps/tutorials/BlinkToRadio/README.txt @@ -0,0 +1,27 @@ +$Id$ + +README for Blink + +Author/Contact: + + tinyos-help@millennium.berkeley.edu + +Description: + + The BlinkToRadio application. A counter is incremented and a radio + message is sent whenever a timer fires. Whenever a radio message is + received, the three least significant bits of the counter in the + message payload are displayed on the LEDs. Program two motes with + this application. As long as they are both within range of each + other, the LEDs on both will keep changing. If the LEDs on one (or + both) of the nodes stops changing and hold steady, then that node is + no longer receiving any messages from the other node. + + +Tools: + + None + +Known bugs/limitations: + + None. \ No newline at end of file diff --git a/doc/Makefile b/doc/Makefile new file mode 100644 index 00000000..d6bfdacd --- /dev/null +++ b/doc/Makefile @@ -0,0 +1,26 @@ +OVERVIEW = txt/overview.txt +OVERVIEW_HTML = $(subst txt/,,$(subst .txt,.html,$(OVERVIEW))) +TEPS = $(wildcard txt/*.txt) +TEPS_HTML = $(subst txt/,,$(subst .txt,.html,$(TEPS))) +TEP_STYLESHEET = stylesheets/tep.css + + +STYLESHEET = stylesheets/doc.css + +HTML = $(OVERVIEW_HTML) + +all: overview teps + +$(OVERVIEW_HTML): $(OVERVIEW) $(STYLESHEET) + rst2html.py --stylesheet-path=$(STYLESHEET) --embed-stylesheet $< > html/$@ + +%.html: txt/%.txt $(TEP_STYLESHEET) + rst2html.py --stylesheet-path=$(TEP_STYLESHEET) --embed-stylesheet $< > html/$@ + +overview: $(OVERVIEW_HTML) + +teps: $(TEPS_HTML) + +clean: + rm -f html/*.html txt/*~ + diff --git a/doc/README b/doc/README new file mode 100644 index 00000000..a580da3c --- /dev/null +++ b/doc/README @@ -0,0 +1,92 @@ +Introduction +============ + +The TinyOS Extension Proposals (TEPs) are written using the +reStructuredText. Converting them into HTML documents can be performed +using the "rst2html" tool from the python Docutils package:: + + http://docutils.sourceforge.net + +Installing Docutils using a native package +========================================== + +Many Linux distributions provide a native Docutils package. We provide +short instructions for installing the package on Fedora Core 3, Fedora +Core 4 and Debian. + +Fedora Core 3 +------------- + +The Docutils package is part of the "extras" distribution channel. + +When using the "yum" package manager, the "extras" repository can be +added by creating a new extras.repo file in the /etc/yum/yum.repos.d +directory with the content:: + + [extras] + name=Fedora Extras - $releasever - $basearch + baseurl=http://download.fedora.redhat.com/pub/fedora/linux/extras/$releasever/$basearch/ + gpgcheck=1 + enabled=1 + +After that, Docutils can be installed by issuing:: + + sudo yum install python-docutils + +Alternatively, the Docutils RPM package can be downloaded manually +from:: + + http://download.fedora.redhat.com/pub/fedora/linux/extras/3/i386/python-docutils-0.3.9-1.fc3.noarch.rpm + +and installed using: + + sudo rpm -ivh python-docutils-0.3.9-1.fc3.noarch.rpm + + +Fedora Core 4 +------------- + +In Fedora Core 4, the "extras" repository is already configured, but +disabled by default. The docutils package can be installed using:: + + sudo yum --enablerepo=extras install python-docutils + +Alternatively, the Docutils RPM package can be downloaded manually +from:: + + http://download.fedora.redhat.com/pub/fedora/linux/extras/4/i386/python-docutils-0.3.9-1.fc4.noarch.rpm + +and installed using: + + sudo rpm -ivh python-docutils-0.3.9-1.fc4.noarch.rpm + + +Debian +------ + +The Docutils are packaged in the python-docutils DEB package and can +be installed using: + + sudo apt-get install python-docutils + +Alternatively, the Docutils DEB package can be download (for Debian +stable) from:: + + http://packages.debian.org/cgi-bin/download.pl?arch=all&file=pool%2Fmain%2Fp%2Fpython-docutils%2Fpython-docutils_0.3.7-2_all.deb&md5sum=4f21cac36c65f9edc080bc5b77169c51&arch=all&type=main + +and installed using:: + + sudo dpkg -i python-docutils_0.3.7-2_all.deb + + +Installing Docutils from sources +================================ + +The latest Docutils source release (0.3.9) can be downloaded from:: + +http://prdownloads.sourceforge.net/docutils/docutils-0.3.9.tar.gz?download + +The source is packaged using python Distutils and can be installed using:: + + sudo python setup.py install + diff --git a/doc/html/install-tinyos.html b/doc/html/install-tinyos.html new file mode 100644 index 00000000..c8f05f83 --- /dev/null +++ b/doc/html/install-tinyos.html @@ -0,0 +1,367 @@ + + + + + Installing TinyOS 2.0 + + + + +
    Installing TinyOS 2.0
    +
    Last updated 12 June 2006
    + +

    If you already have a 1.x tree, you are better off following the upgrade +instructions at upgrade-tinyos.html. + +

    Currently, the TinyOS Core Working Group supports TinyOS on two platforms: Cygwin (Windows) +and Linux. There have been some successful efforts to getting TinyOS environments working +on Mac OSX, but OSX is not supported by the Core WG.

    + +

    Installing a TinyOS enviromnent has four basic steps; Windows requires an extra step, +installing Cygwin, which is a UNIX-like environment. The steps are:

    + +
      +
    1. Installing a Java 1.5 (Java 5) JDK. Java is the most common way of interacting + with mote base stations or gateways that are plugged into a PC or laptop.
      2. +
    2. Windows only. Install Cygwin. This gives you a shell + and many UNIX tools which the TinyOS environment uses, such as perl and shell + scripts.
      3. +
    3. Installing native compilers. As you're compiling code for low-power + microcontrollers, you need compilers that can generate the proper assembly code. + If you using mica-family motes, you need the AVR toolchain; if you're using + telos-family motes, you need the MSP430 toolchain.
      4. +
    4. Installing the nesC compiler. TinyOS is written in nesC, a dialect + of C with support for the TinyOS concurrency model and component-based + programming. The nesC compiler is platform-independent: it passes its output + to the native compilers, so that it can take advantage of all of the effort + put into their optimizations.
      5. +
    5. Installing the TinyOS source tree. If you want to compile and + install TinyOS programs, you need the code.
      6. +
    6. Installing the Graphviz visualization tool. The TinyOS + environment includes nesdoc, a tool that automatically + generates HTML documentation from source code. Part of this process + involves drawing diagrams that show the relationships between + different TinyOS components. Graphviz + is an open source tool + that nesdoc uses to draw the diagrams.
      7. +
    + +

    Step 1: Install Java 1.5 JDK

    + +Windows
    +Download and install Sun's 1.5 JDK from http://java.sun.com. + +

    +Linux
    +Download and install IBM's 1.5 JDK from http://www-128.ibm.com/developerworks/java/jdk/. + +

    Step 2: Install Cygwin

    + + This step is required for Windows installations only. If you are installing +on Linux, skip to step 3. + +

    We have put online the cygwin packages that we've confirmed to be +compatible with TinyOS. The instructions below use those packages. You +can also upgrade your cygwin environment according to the instructions +at www.cygwin.com and your environment will most likely work. A large +number of TinyOS users, upgrade their cygwin packages at least monthly +from cygnus. However, since we can't test what packages are compatible +as they become available daily, we can't confirm that today's set will +work. + +

    +

      +
    1. Download the confirmed-compatible cygwin packages from the tinyos web site here. +

      +

    2. In a cygwin shell, unzip the above package into some directory. In these instructions the directory is /cygdrive/c/newcygpkgs. +
      +     $ cd /cygdrive/c/newcygpkgs
+     $ tar zxvf cygwin-1.2a.tgz 
+
      +This unzips the packages. +

      +

    3. In Windows Explorer, navigate to /cygdrive/c/newcygpkgs and click on the file setup.exe. Setup.exe is the setup program distributed by Cygnus Solutions. +

      +

    4. Follow these steps when the Cygwin Setup windows appears: +
        +
      +
    5. Opt to disable the virus scanner (it will be enabled when you're finished). +

      +

    6. Opt to Install from Local Directory. +

      +

    7. Specify the Root directory to be where your current cygwin installation is. This would be the directory that directories like 'opt' and 'usr' are in. For example, mine is rooted at c:\tinyos\cygwin, so I enter that. +

      +

    8. Select to Install for All Users +

      +

    9. Select the Unix file type (very important!) +

      +

    10. For the Local Packages Directory, specify where you unzipped the cygwin packages tarfile. For example, I would specify c:\newcygpkgs. (The setup.exe program will probably select the right default directory.) +

      +

    11. The next window will allow you to select packages to install. You should see that most of the packages have an X-ed box next to them; these are the packages that are to be installed. +

      +

    12. Click install. Some notes: +
        +
      • You might see a message explaining that you need to reboot because some files are in use. This most likely means that your cygwin DLL is loaded and in-use and, therefore, cannot be replaced. When you reboot, the new DLL will be loaded. +
      • Related to the above warnings, if you see warnings about the cygwin1.dll not being found, don't worry. All will be well once you reboot and the right DLL is loaded. +
      +
    + + +

    Step 3: Install native compilers

    + +Install the appropriate version of the following (Windows or Linux, +avr or msp430 or both) with the rpm command 'rpm -ivh '. +On +windows, if you get an error claiming that the rpm was build for an NT +computer and you're on a windows NT computer, bypass the erroneous +error by using 'rpm -ivh --ignoreos rpmname'. +(We have xscale +compiler tools online at +http://www.tinyos.net/dist-1.2.0/tools/ +but they have not yet been extensively tested by a large community.) + + +

    Atmel AVR Tools + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ToolWindows/CygwinLinux
    avr-binutils†avr-binutils-2.15tinyos-3.cygwin.i386.rpmavr-binutils-2.15tinyos-3.i386.rpm
    avr-gccavr-gcc-3.4.3-1.cygwin.i386.rpm avr-gcc-3.4.3-1.i386.rpm
    avr-libcavr-libc-1.2.3-1.cygwin.i386.rpmavr-libc-1.2.3-1.i386.rpm
    avariceavarice-2.4-1.cygwin.i386.rpmavarice-2.4-1.i386.rpm
    insight (avr-gdb)avr-insight-6.3-1.cygwin.i386.rpmavr-insight-6.3-1.i386.rpm
    +†If you receive an rpm error that indicates that you have a newer version already installed, try rpm -Uvh --force + + +

    TI MSP430 Tools + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ToolWindows/CygwinLinux
    basemsp430tools-base-0.1-20050607.cygwin.i386.rpmmsp430tools-base-0.1-20050607.i386.rpm
    python toolsmsp430tools-python-tools-1.0-1.cygwin.noarch.rpmmsp430tools-python-tools-1.0-1.noarch.rpm
    binutils msp430tools-binutils-2.16-20050607.cygwin.i386.rpmmsp430tools-binutils-2.16-20050607.i386.rpm
    gccmsp430tools-gcc-3.2.3-20050607.cygwin.i386.rpmmsp430tools-gcc-3.2.3-20050607.i386.rpm
    libcmsp430tools-libc-20050308cvs-20050608.cygwin.i386.rpmmsp430tools-libc-20050308cvs-20050608.i386.rpm
    jtagNot yet availablemsp430tools-jtag-lib-20031101cvs-20050610.i386.rpm
    gdbNot yet availablemsp430tools-gdb-6.0-20050609.i386.rpm
    + +

    Step 4: Install TinyOS toolchain

    + +The TinyOS-specific tools are the NesC compiler and a set of tools +developed in the tinyos-2.x/tools source code repository. They are +also installed using rpms. + +

    TinyOS-specific Tools + + + + + + + + + + + + + + + + + + + + + + +
    ToolWindows/CygwinLinuxCommand
    NesCnesc-1.2.7a-1.cygwin.i386.rpmnesc-1.2.7a-1.i386.rpm rpm -Uvh
    tinyos-toolstinyos-tools-1.2.2-1.cygwin.i386.rpmtinyos-tools-1.2.2-1.i386.rpmrpm -ivh --force (1.x tree)
    rpm -Uvh (no 1.x tree)
    + +

    Step 5: Install the TinyOS 2.x source tree

    + +Now that the tools are installed, you need only install the tinyos 2.x +source tree and then set your environment variables. +Install the appropriate version of the following (Window or Linux) +with the rpm command 'rpm -ivh '. +As with the previous rpms, if you get an error claiming that the rpm +was build for an NT computer and you're on a windows NT computer, +bypass the erroneous error by using 'rpm -ivh --ignoreos +rpmname'. + +
      +
    • Install tinyos-2.x +

      + + + +

      TinyOS 2.x + + + + + + + + + + + + + +
      Windows/CygwinLinux
      TinyOStinyos-2.0.0beta2-3.cygwin.noarch.rpmtinyos-2.0.0beta2-3.noarch.rpm
      +

    • Configure your environment +

      +Ideally, you'll put these environment variables in a shell script that will run when your shell starts, but you needn't +put such a script under /etc/profile.d. +

      +The example +settings below assume that the tinyos-2.x installation is in /opt/tinyos-2.x. +Change the settings to be correct for where you've put your tinyos-2.x tree. Note +that the windows CLASSPATH must be a windows-style path, not a cygwin path. You can +generate a windows style path from a cygwin-style path using 'cygpath -w'. For example: +

      export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java/tinyos.jar`
+export CLASSPATH="$CLASSPATH;."
+
      + +

      TinyOS 2.x + + + + + + + + + + + + + + + + + + + + + + + + + + + +
      Environment VariableWindowsLinux
      TOSROOT/opt/tinyos-2.xsame as in Cygwin + +
      TOSDIR$TOSROOT/tossame as in Cygwin + +
      CLASSPATHC:\tinyos\cygwin\opt\tinyos-2.x\support\sdk\java\tinyos.jar;.$TOSROOT/support/sdk/java/tinyos.jar:. + +
      MAKERULES$TOSROOT/support/make/Makerulessame as in Cygwin + +
      PATH†/opt/msp430/bin:$PATHsame as in Cygwin + +
      + +†Only necessary if you're using the MSP430 platform/tools. + +

      +In addition to the above environment variables, do the following on Linux machines: +

        +
      1. Change the ownership on your /opt/tinyos-2.x files: chown -R <your uid> /opt/tinyos-2.x +
      2. Change the permissions on any serial (/dev/ttyS<N>), usb +(/dev/tts/usb<N>, /dev/ttyUSB<N>), or parallel (/dev/parport) devices you +are going to use: chmod 666 /dev/<devicename> + +
      + +
    + +

    Step 6: Installing Graphviz

    + +

    Go to download page of the Graphviz project +and download the appropriate RPM. You only need the basic graphviz RPM (graphviz-); +you don't need all of the add-ons, such as -devel, -doc, -perl, etc. +If you're not sure what version of Linux you're running,

    + +
    uname -a
    + +

    might give you some useful information. Install the rpm with rpm -i rpm-name. +In the case of Windows, there is a simple install program, so you don't need to deal with RPMs.

    + + + diff --git a/doc/html/overview.html b/doc/html/overview.html new file mode 100644 index 00000000..166e94aa --- /dev/null +++ b/doc/html/overview.html @@ -0,0 +1,728 @@ + + + + + + +TinyOS 2.0 Overview + + + + + +
    +

    TinyOS 2.0 Overview

    + +++ + + + + + +
    Author:Philip Levis
    Date:Feb 8 2006
    +
    +

    Note

    +

    This document gives a brief overview of TinyOS 2.0, highlighting how +and where it departs from 1.1 and 1.0. Further detail on these changes +is detailed in TEP (TinyOS Enhancement Proposal) documents.

    +
    +
    +

    1. Introduction

    +

    TinyOS 2.0 is a clean slate redesign and re-implementation of TinyOS. +Its development was motivated by our belief that many aspects of 1.x +strain to meet requirements and uses that were not foreseen +when it was designed and implemented. The structure and interfaces 1.x +defines have several fundamental limitations. While these limitations +can be worked around, this practice has led to tightly coupled +components, hard to find interactions, and a very steep learning curve +for a newcomer to sensor network programming.

    +

    TinyOS 2.0 is not backwards compatible with 1.x: code written for the +latter will not compile for the former. However, one important aspect +of 2.0's design is to minimize the difficulty of upgrading +code. Therefore, while porting a 1.x application to 2.0 will require +some work, it should not be very much.

    +

    This document provides a high-level overview of 2.0 and describes some +of the ways in which it departs from 1.x. It covers the basic TinyOS +abstractions, such as hardware abstractions, communication, timers, +the scheduler, booting and initialization. Further detail on each of +these can be found in TEPs (TinyOS Enhancement Proposals), which +document and describe these abstractions.

    +
    +
    +

    2. Platforms/Hardware Abstraction

    +

    Platforms exist in the tos/platforms subdirectory. In TinyOS 2.0, a +platform is a collection of chips and some glue code that connects +them together. For example, the mica2 platform is the CC1000 radio +chip and the ATmega128 microcontroller, while the micaZ platform is +the CC2420 radio and the ATmega128 microcontroller, and the Teloi +platforms are the CC2420 radio and the MSP430 microcontroller. Chip +code exists in tos/chips. A platform directory generally has a +.platform file, which has options to pass to the nesC compiler. For +example, the mica2 .platform file tells ncc to look in chips/cc1000 +and chips/atm128 directories, as well as to use avr-gcc to compile a +mote binary (Teloi platforms tell it to use msp430-gcc).

    +

    Hardware abstractions in TinyOS 2.0 generally follow a three-level +abstaction heirarchy, called the HAA (Hardware Abstraction +Architecture).

    +

    At the bottom of the HAA is the HPL (Hardware Presentation Layer). The +HPL is a thin software layer on top of the raw hardware, presenting +hardare such as IO pins or registers as nesC interfaces. The HPL +generally has no state besides the hardware itself (it has no +variables). HPL components usually have the prefix Hpl, followed by +the name of the chip. For example, the HPL components of the CC1000 +begin with HplCC1000.

    +

    The middle of the HAA is the HAL (Hardware Abstraction Layer). The HAL +builds on top of the HPL and provides higher-level abstractions that +are easier to use than the HPL but still provide the full +functionality of the underlying hardware. The HAL components usually have +a prefix of the chip name. For example, the HAL components of the CC1000 +begin with CC1000.

    +

    The top of the HAA is the HIL (Hardware Independent Layer). The HIL +builds on top of the HAL and provides abstractions that are hardware +independent. This generalization means that the HIL usually does not +provide all of the functionality that the HAL can. HIL components have +no naming prefix, as they represent abstractions that applications can +use and safely compile on multiple platforms. For example, the HIL +component of the CC1000 on the mica2 is ActiveMessageC, representing +a full active message communication layer.

    +

    The HAA is described in TEP 2: Hardware Abstraction Architecture[TEP2].

    +

    Currently (as of the 2.0 beta release at TTX3), TinyOS 2.0 supports +the following platforms:

    +
    +
      +
    • eyesIFXv2
      • +
    • intelmote2
      • +
    • mica2
      • +
    • mica2dot
      • +
    • micaZ
      • +
    • telosb
      • +
    • tinynode
      • +
    • btnode3
      • +
    +
    +
    +
    +

    3. Scheduler

    +

    As with TinyOS 1.x, TinyOS 2.0 scheduler has a non-preemptive FIFO +policy. However, tasks in 2.0 operate slightly differently than in +1.x.

    +

    In TinyOS 1.x, there is a shared task queue for all tasks, and a +component can post a task multiple times. If the task queue is full, +the post operation fails. Experience with networking stacks showed +this to be problematic, as the task might signal completion of a +split-phase operation: if the post fails, the component above might +block forever, waiting for the completion event.

    +

    In TinyOS 2.x, every task has its own reserved slot in the task queue, +and a task can only be posted once. A post fails if and only if the +task has already been posted. If a component needs to post a task +multiple times, it can set an internal state variable so that when +the task executes, it reposts itself.

    +

    This slight change in semantics greatly simplifies a lot of component +code. Rather than test to see if a task is posted already before +posting it, a component can just post the task. Components do not have +to try to recover from failed posts and retry. The cost is one byte of +state per task. Even in large systems such as TinyDB, this cost is +under one hundred bytes (in TinyDB is is approximately 50).

    +

    Applications can also replace the scheduler, if they wish. This allows +programmers to try new scheduling policies, such as priority- or +deadline-based. It is important to maintain non-preemptiveness, +however, or the scheduler will break all nesC's static concurrency +analysis. Details on the new scheduler and how to extend it can be found +in TEP 106: Schedulers and Tasks[TEP106].

    +
    +
    +

    4. Booting/Initialization

    +

    TinyOS 2.0 has a different boot sequence than 1.x. The 1.x interface +StdControl has been split into two interfaces: Init and +StdControl. The latter only has two commands: start and stop. +In TinyOS 1.x, wiring components to the boot sequence would cause them +to be powered up and started at boot. That is no longer the case: the +boot sequence only initializes components. When it has completed +initializing the scheduler, hardware, and software, the boot sequence +signals the Boot.booted event. The top-level application component +handles this event and start services accordingly. Details on +the new boot sequence can be found in TEP 107: TinyOS 2.x Boot +Sequence[TEP107].

    +
    +
    +

    5. Virtualization

    +

    TinyOS 2.0 is written with nesC 1.2, which introduces the concept +of a 'generic' or instantiable component. Generic modules allow +TinyOS to have reusable data structures, such as bit vectors and +queues, which simplify development. More importantly, generic +configurations allow services to encapsulate complex wiring +relationships for clients that need them.

    +

    In practice, this means that many basic TinyOS services are now +virtualized. Rather than wire to a component with a parameterized +interface (e.g., GenericComm or TimerC in 1.x), a program instantiates +a service component that provides the needed interface. This +service component does all of the wiring underneath (e.g., in the +case of timers, to a unique) automatically, reducing wiring +mistakes and simplifying use of the abstraction.

    +
    +
    +

    6. Timers

    +

    TinyOS 2.0 provides a much richer set of timer interfaces than +1.x. Experience has shown that timers are one of the most critical +abstractions a mote OS can provide, and so 2.0 expands the fidelity +and form that timers take. Depending on the hardware resources of a +platform, a component can use 32KHz as well as millisecond granularity +timers, and the timer system may provide one or two high-precision +timers that fire asynchronously (they have the async +keyword). Components can query their timers for how much time +remainins before they fire, and can start timers in the future (e.g., +'start firing a timer at 1Hz starting 31ms from now'). TEP 102: +Timers[TEP102] defines what HIL components a platform must provide +in order to support standard TinyOS timers. Platforms are +required to provide millisecond granularity timers, and can provide +finer granularity timers (e.g., 32kHz) if needed.

    +

    Timers present a good example of virtualization in 2.0. In 1.x, +a program instantiates a timer by wiring to TimerC:

    +
    +components App, TimerC;
+App.Timer -> TimerC.Timer[unique("Timer")];
+
    +

    In 2.0, a program instantiates a timer:

    +
    +components App, new TimerMilliC();
+App.Timer -> TimerMilliC;
+
    +
    +
    +

    7. Communication

    +

    In TinyOS 2.0, the message buffer type is message_t, and it is a +buffer that is large enough to hold a packet from any of a node's +communication interfaces. The structure itself is completely opaque: +components cannot reference its fields. Instead, all buffer accesses +go through interfaces. For example, to get the destination address of +an AM packet named msg, a component calls AMPacket.destination(msg).

    +

    Send interfaces distinguish the addressing mode of communication +abstractions. For example, active message communication has the +AMSend interface, as sending a packet require an AM destination +address. In contrast, broadcasting and collection tree abstractions +have the address-free Send interface.

    +

    Active messages are the network HIL. A platform's ActiveMessageC +component defines which network interface is the standard +communication medium. For example, a mica2 defines the CC1000 active +message layer as ActiveMessageC, while the TMote defines the CC2420 +active message layer as ActiveMessageC.

    +

    There is no longer a TOS_UART_ADDRESS for active message +communication. Instead, a component should wire to +SerialActiveMessageC, which provides active message communication over +the serial port.

    +

    Active message communication is virtualized through four generic +components, which take the AM type as a parameter: AMSenderC, +AMReceiverC, AMSnooperC, and AMSnoopingReceiverC. AMSenderC is +virtualized in that the call to send() does not fail if some +other component is sending (as it does with GenericComm in 1.x). Instead, +it fails only if that particular AMSenderC already has a packet +outstanding or if the radio is not in a sending state. Underneath, +the active message system queues and sends these outstanding packets. +This is different than the QueuedSendC approach of 1.x, in which there +is an N-deep queue that is shared among all senders. With N AMSenderC +components, there is an N-deep queue where each sender has a single +reserved entry. This means that each AMSenderC receives +1/n of the available post-MAC transmission opportunities, where +n is the number of AMSenderC components with outstanding packets. +In the worst case, n is the number of components; even when every +protocol and component that sends packets is trying to send a packet, +each one will receive its fair share of transmission opportunities.

    +

    Further information on message_t can be found in TEP 111: +message_t[TEP111], while further information on AM can be +found in TEP 116: Packet Protocoks[TEP116].

    +
    +
    +

    8. Sensors

    +

    In TinyOS 2.0, named sensor components comprise the HIL of a +platform's sensors. TEP 114 describes a set of HIL data acquisition +interfaces, such as Read, ReadStream, and Get, which sensors +provide according to their acquisition capabilities.

    +

    If a component needs +high-frequency or very accurate sampling, it must use the HAL, which +gives it the full power of the underlying platform (highly accurate +platform-independent sampling is not really feasible, due to the +particulars of individual platforms). Read assumes that the +request can tolerate some latencies (for example, it might schedule +competing requests using a FIFO policy).

    +

    Details on the ADC subsystem can be found in +TEP 101: Analog-to-Digital Converters[TEP101]; details on +the organization of sensor boards can be found in TEP 109: +Sensorboards[TEP109], and the details of the HIL sensor interfaces +can be found in TEP 114: Source and Sink Independent Drivers[TEP114].

    +
    +
    +

    9. Error Codes

    +

    The standard TinyOS 1.x return code is result_t, whose value is +either SUCCESS (a non-zero value) or FAIL (a zero value). While this +makes conditionals on calls very easy to write (e.g., if (call +A.b())), it does not allow the callee to distinguish causes of error +to the caller. In TinyOS 2.0, result_t is replaced by error_t, +whose values include SUCCESS, FAIL, EBUSY, and ECANCEL. Interface +commands and events define which error codes they may return and why.

    +

    From the perspective of porting code, this is the most significant +different in 2.0. Calls that were once:

    +
    +if (call X.y()) {
+  busy = TRUE;
+}
+
    +

    now have their meanings reversed. In 1.x, the busy statement will execute +if the call succeeds, while in 2.0 it will execute if the call fails. +This encourages a more portable, upgradable, and readable approach:

    +
    +if (call X.y() == SUCCESS) {
+  busy = TRUE;
+}
+
    +
    +
    +

    10. Arbitration

    +

    While basic abstractions, such as packet communication and timers, +can be virtualized, experiences with 1.x showed that some cannot +without either adding significant complexity or limiting the system. +The most pressing example of this is a shared bus on a microcontroller. +Many different systems -- sensors, storage, the radio -- might need +to use the bus at the same time, so some way of arbitrating access +is needed.

    +

    To support these kinds of abstractions, TinyOS 2.0 introduces +the Resource interface, which components use to request and +acquire shared resources, and arbiters, which provide a policy for +arbitrating access between multiple clients. For some abstractions, +the arbiter also provides a power management policy, as it can tell +when the system is no longer needed and can be safely turned off.

    +

    TEP 108: Resource Arbitration[TEP108] describes the Resource interface +and how arbiters work.

    +
    +
    +

    11. Power Management

    +

    Power management in 2.0 is divided into two parts: the power state +of the microcontroller and the power state of devices. The former, +discussed in TEP 112: Microcontroller Power Management[TEP112], +is computed in a chip-specific manner by examining which devices +and interrupt souces are active. The latter, discussed in +TEP 115: Power Management of Non-Virtualised Devices{TEP115], is handled +through resource abiters. Fully virtualized services have their +own, individual power management policies.

    +
    +
    +

    12. Network Protocols

    +

    TinyOS 2.0 provides simple reference implementations of two of +the most basic protocols used in mote networks: dissemination +and collection. Dissemination reliably delivers small (fewer +than 20 byte) data items to every node in a network, while +collection builds a routing tree rooted at a sink node. Together, +these two protocols enable a wide range of data collection +applications.

    +
    +
    +

    12. Conclusion

    +

    TinyOS 2.0 represents the next step of TinyOS development. Building on +user experiences over the past few years, it has taken the basic +TinyOS architecture and pushed it forward in several directions, +hopefully leading to simpler and easier application development. It is +still under active development: future prereleases will include +non-volatile storage, basic multihop protocols (collection routing, +dissemination), and further power management abstractions.

    +
    +
    +

    13. Acknowledgments

    +

    TinyOS 2.0 is the result of a lot of hard work from a lot of people, +including (but not limited to) David Gay, Philip Levis, Cory Sharp, +Vlado Handziski, Jan Hauer, Kevin Klues, Joe Polastre, Jonathan Hui, +Prabal Dutta, +Gilman Tolle, Martin Turon, Phil Buonodonna, Ben Greenstein, David Culler, +Kristin Wright, Ion Yannopoulos, Henri Dubois-Ferriere, Jan Beutel, +Robert Szewczyk, Rodrigo Fonseca, Kyle Jamieson, Omprakash Gnawali, +and Kristin Wright.

    +
    +
    +

    14. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates
    +
    Computer Systems Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +

    +
    email - pal@cs.stanford.edu
    +
    +
    +
    +

    15. Citations

    + + + + + +
    [TEP1]TEP 1: TEP Structure and Keywords. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep1.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP2]TEP 2: Hardware Abstraction Architecture. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep2.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP3]TEP 3: Coding Standard. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep3.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP101]TEP 101: Analog-to-Digital Converters. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep101.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP102]TEP 102: Timers. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep102.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP106]TEP 106: Schedulers and Tasks. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep106.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP107]TEP 107: Boot Sequence. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep107.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP108]TEP 108: message_t. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep108.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP109]TEP 109: Sensorboards. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep109.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP110]TEP 110: Service Distributions. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep110.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP111]TEP 111: message_t. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep111.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP112]TEP 112: Microcontroller Power Management. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep112.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP113]TEP 113: Serial Communication. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep113.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP114]TEP 114: SIDs: Source and Sink Independent Drivers. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep114.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP115]TEP 115: Power Management of Non-Virtualised Devices. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep115.html?pathrev=tinyos-2_0_devel-BRANCH
    + + + + + +
    [TEP116]TEP 116: Packet Protocols. http://tinyos.cvs.sourceforge.net/checkout/tinyos/tinyos-2.x/doc/html/tep116.html?pathrev=tinyos-2_0_devel-BRANCH
    +
    +
    + + diff --git a/doc/html/tep1.html b/doc/html/tep1.html new file mode 100644 index 00000000..46bdd8cf --- /dev/null +++ b/doc/html/tep1.html @@ -0,0 +1,510 @@ + + + + + + +TEP Structure and Keywords + + + + +
    +

    TEP Structure and Keywords

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:1
    Group:Core Working Group
    Type:Best Current Practice
    Status:Draft
    TinyOS-Version:All
    Author:Philip Levis
    Draft-Created:18-Oct-2004
    Draft-Version:1.1.2.3
    Draft-Modified:2006-06-13
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This document specifies a Best Current Practices for the +TinyOS Community, and requests discussion and suggestions for +improvements. Distribution of this memo is unlimited.

    +
    +
    +

    Abstract

    +

    This memo describes the structure all TinyOS Extension Proposal (TEP) +documents follow, and defines the meaning of several key words in +those documents.

    +
    +
    +

    1. Introduction

    +

    In order to simplify management, reading, and tracking development, +all TinyOS Extension Proposals (TEPs) MUST have a particular +structure. Additionally, to simplify development and improve +implementation interoperability, all TEPs MUST observe the meaning of +several key words that specify levels of compliance. This document +describes and follows both.

    +
    +
    +

    2. Keywords

    +

    The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", +"SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this +document are to be interpreted as described in TEP 1.

    +

    Note that the force of these words is modified by the requirement +level of the document in which they are used.

    +
    +

    2.1 MUST

    +

    MUST: This word, or the terms "REQUIRED" or "SHALL", mean that the +definition is an absolute requirement of the specification.

    +
    +
    +

    2.2 MUST NOT

    +

    MUST NOT: This phrase, or the phrase "SHALL NOT", mean that the +definition is an absolute prohibition of the specification.

    +
    +
    +

    2.3 SHOULD

    +

    SHOULD: This word, or the adjective "RECOMMENDED", mean that there +may exist valid reasons in particular circumstances to ignore a +particular item, but the full implications must be understood and +carefully weighed before choosing a different course.

    +
    +
    +

    2.4 SHOULD NOT

    +

    SHOULD NOT: This phrase, or the phrase "NOT RECOMMENDED" mean that +there may exist valid reasons in particular circumstances when the +particular behavior is acceptable or even useful, but the full +implications should be understood and the case carefully weighed +before implementing any behavior described with this label.

    +
    +
    +

    2.5 MAY

    +

    MAY: This word, or the adjective "OPTIONAL", mean that an item is +truly optional. One implementer may choose to include the item +because a particular application requires it or because the +implementer feels that it enhances the system while another +implementer may omit the same item. An implementation which does not +include a particular option MUST be prepared to interoperate with +another implementation which does include the option, though perhaps +with reduced functionality. In the same vein an implementation which +does include a particular option MUST be prepared to interoperate with +another implementation which does not include the option (except, of +course, for the feature the option provides.)

    +
    +
    +

    2.6 Guidance in the use of these Imperatives

    +

    Imperatives of the type defined in this memo must be used with care +and sparingly. In particular, they MUST only be used where it is +actually required for interoperation or to limit behavior which has +potential for causing harm (e.g., limiting retransmissions) For +example, they must not be used to try to impose a particular method +on implementors where the method is not required for +interoperability.

    +
    +
    +
    +

    3. TEP Structure

    +

    TEPs have two major parts, a header and a body. The header states +document metadata, for management and status. The body contains the +content of the proposal.

    +

    All TEPs MUST follow the TEP docutils template, and conform to +reStructuredText standards [1], to enable translation from +reStructuredText to HTML and Latex.

    +
    +

    3.1 TEP Header

    +

    The TEP header has several fields which MUST be included, as well as +others which MAY be included. The first six header fields MUST be +included in all TEPs, in the order stated here.

    +

    The first field is "TEP," and specifies the TEP number of the +document. A TEP's number is unique.. This document is TEP 1. The +TEP type (discussed below) +determines how a number is assigned to it. Generally, when a document +is ready to be a TEP, it is assigned the smallest available number. +BCP TEPs start at 1 and all other TEPs (Documentary, Experimental, +and Informational) start at 101.

    +

    The second field states the name of the working group that produced +the document. This document was produced by the Core Working Group.

    +

    The third field is "Type," and specifies the type of TEP the document +is. There are four types of TEP: Best Current Practice (BCP), +Documentary, Informational, and Experimental. This document is Best +Current Practice.

    +

    Best Current Practice is the closest thing TEPs have to a standard: it +represents conclusions from significant experience and work by its +authors. Developers desiring to add code (or TEPs) to TinyOS SHOULD +follow all current BCPs.

    +

    Documentary TEPs describe a system or protocol that exists; a +documentary TEP MUST reference an implementation that a reader can +easily obtain. Documentary TEPs simplify interoperability when +needed, and document TinyOS service implementations.

    +

    Informational TEPs provide information that is of interest to the +community. Informational TEPs include data gathered on radio behavior, +hardware characteristics, other aspects of TinyOS software/hardware, +organizational and logistic information, +or experiences which could help the community achieve its goals.

    +

    Experimental TEPs describe a completely experimental approach to a +problem, which are outside the TinyOS core and will not necessarily +become part of it. Unlike Documentary TEPs, Experimental TEPs may +describe systems that do not have a reference implementation.

    +

    The fourth field is "Status," which specifies the status of the TEP. +A TEP status can either be "Draft," which means it is a work in +progress, "Final," which means it is complete and will not change, or +"Obsolete," which means it should no longer be considered. If a TEP is +"Obsolete" because it has been replaced by another TEP, then the new +TEP number should follow "Obsolete," such as "Obsolete by TEP 1231."

    +

    If a TEP is Best Current Practices or Documentary, then it MUST +include an additional field, "TinyOS-Version:," which states what +version(s) of TinyOS the document pertains to. This document pertains +to all versions of TinyOS, until made obsolete by a future TEP. This +field MUST appear after the Status field and before the Author field.

    +

    The final required field is Author, which states the names of the +authors of the document. Full contact information should not be listed +here (see Section 3.2).

    +

    If a TEP is a Draft, then four additional fields MUST be included: +Draft-Created, Draft-Modified, Draft-Version, and Draft-Discuss. +Draft-Created states the date the document was created, Draft-Modified +states when it was last modified. Draft-Version specifies the version +of the draft, which MUST increase every time a modification is +made. Draft-Discuss specifies the email address of a mailing list +where the draft is being discussed. Final and Obsolete TEPs MUST NOT +have these fields, which are for Drafts only.

    +
    +
    +

    3.2 TEP Body

    +

    The first element of the TEP body MUST be the title of the document. A +TEP SHOULD follow the title with an Abstract, which gives a brief +overview of the content of the TEP. Longer TEPs MAY, after the +Abstract, have a Table of Contents. After the Abstract and Table of +Contents there SHOULD be an Introduction, stating the problem the TEP +seeks to solve and providing needed background information.

    +

    If a TEP is Documentary, it MUST have a section entitled +"Implementation," which instructs the reader how to obtain the +implementation documented.

    +

    If a TEP is Best Current Practices, it MUST have a section entitled +"Reference," which points the reader to one or more reference uses of +the practices.

    +

    The last section of a TEP (but before citations, if there are any), +entitled "Author's Address" or "Author's Addresses" MUST contain +detailed author contact information.

    +
    +
    +
    +

    4. Reference

    +

    The reference use of this document is TEP 1 (itself).

    +
    +
    +

    5. Acknowledgments

    +

    The definitions of the compliance terms are a direct copy of +definitions taken from IETF RFC 2119.

    +
    +
    +

    6. Author's Address

    +
    +
    Philip Levis
    +
    467 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    phone - +1 510 290 5283
    +

    +
    email - pal@cs.berkeley.edu
    +
    +
    +
    +

    7. Citations

    + + + + + +
    [1]reStructuredText Markup Specification. <http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html>
    +
    +
    + + diff --git a/doc/html/tep101.html b/doc/html/tep101.html new file mode 100644 index 00000000..2ec1e50c --- /dev/null +++ b/doc/html/tep101.html @@ -0,0 +1,881 @@ + + + + + + +Analog-to-Digital Converters (ADCs) + + + + +
    +

    Analog-to-Digital Converters (ADCs)

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:101
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay
    Draft-Created:20-Dec-2004
    Draft-Version:1.1.2.6
    Draft-Modified:2006-06-14
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +[TEP1].

    +
    +
    +

    Abstract

    +

    This TEP proposes a hardware abstraction for TinyOS 2.x analog-to-digital +converters (ADCs). It focuses on aligning the ADC abstraction with the +three-layer Hardware Abstraction Architecture (HAA) described in [TEP2], but +addresses only the HPL and HAL, because the highest level abstraction of an +ADC is platform-dependent.

    +
    +
    +

    1. Introduction

    +

    Analog-to-digital converters (ADCs) are devices that convert analog input +signals to discrete digital output signals, typically voltage to a digital +number. The interested reader can refer to Appendix A for a brief overview of +the ADC hardware on some current TinyOS platforms. In earlier versions of +TinyOS, the distinction between a sensor and an ADC were blurred: this led +components that had nothing to do with an ADC to still resemble one +programatically, even though the semantics and forms of operation were +completely different. To compensate for the difference non-ADC sensors +introduced additional interfaces, such as ADCError, that were tightly bound to +sensor acquisition but separate in wiring. The separation between the ADC and +ADCError interface is bug prone and problematic, as is the equation of a +sensor and an ADC. TinyOS 2.x separates the structure and interfaces of an ADC +from those of sensors (which may be on top of an ADC, but this fact is hidden +from higher level components). This TEP presents how TinyOS 2.x decomposes and +structures ADC software. TEP 109 (Sensor Boards) shows how a platform can +present actual named sensors [TEP109].

    +

    As can be seen in Appendix A the ADC hardware used on TinyOS platforms differ +in many respects, which makes it difficult to find a chip independent +representation for an ADC. Even if there were such a representation, the +configuration details of an ADC would still depend on the actual device +producing the input signal (sensor). Neither a platform independent +application nor the ADC hardware stack itself has access to this information, +as it can only be determined on a platform or sensorboard level. For example, +determining which ADC port a sensor is attached to and how a conversion result +is to be interpreted is a platform-specific determination.

    +

    In spite of their hardware differences, one aspect represents a common +denominator of all ADCs: they produce conversion results. In order to +facilitate sensor software development this capability can be made available +via chip-independent interfaces for every ADC. However, conversion results +depend on and have to be interpreted with respect to the platform-specific +configuration settings (the ADC channel, the applied reference voltage, etc.). +Therefore the highest level of ADC abstraction consists of +platform-independent interfaces for ADC data collection and chip-specific +interfaces for ADC hardware configuration. The top layer of the ADC stack +thus remains platform-dependent and consequently the ADC abstraction does not +include an HIL, but ends with the HAL. Following the principles of the +HAA [TEP2] the HAL of an ADC should also expose the chip-specific capabilities +for ADC data collection. For example, the ADC12 on the MSP430 MCU supports a +complex repeat conversion mode for a set of different input channels, which is +too specific to be represented by a platform-independent data collection +interface. Therefore the HAL of an ADC abstraction is broken into two +sublayers: The bottom HAL layer, called HAL1, exposes the full capabilities of +the respective ADC in a chip-specific way. It realizes the standard HAL in the +HAA [TEP2] and the HPL lies below it. On top of the HAL1 sits the HAL2 which +maps the interfaces it uses from HAL1 to a set of platform-independent +interfaces for data collection and chip-specific configuration interfaces.

    +

    The rest of this TEP specifies:

    + +

    This TEP ends with appendices documenting, as an example, the ADC +implementation for the TI MSP430 MCU.

    +
    +
    +

    2. Interfaces

    +

    This TEP proposes to adopt the following three generic, source-independent +data collection interfaces from [TEP114] for the collection of ADC conversion +results:

    +
    +interface Read< size_type >
+interface ReadNow< size_type >
+interface ReadStream< size_type >
+
    +

    Every data collection interface is associated with certain chip-specific +configuration data (e.g. input channel, sample-hold-time, etc.). How this +association can be realized is explained in Section 4. HAL2 requirements. +As the resolution of conversion results is chip-specific, the 'size_type' +parameter reflects an upper bound for the chip-specific resolution of the +conversion results - the actual resolution may be smaller, depending on the +ADC and/or data source (e.g. uint16_t for a 12-bit ADC). The above interfaces +are specified in [TEP114], in the following their usage is explained with +respect to ADCs.

    +
    +

    Read

    +

    The Read interface can be used to sample an ADC channel and return a single +conversion result. It provides no guarantees about when exactly the sampling +occurs (the request may be buffered).

    +
    +
    +

    ReadNow

    +

    The ReadNow interface provides more precise control over the time of the +sampling: If a call to ReadNow.read() succeeds, the ADC starts to sample the +channel immediately (the request is not buffered). Due to its timing +constraints the ReadNow interface is always provided in conjunction with an +instance of the Resource interface. A client MUST request access to the ADC +via the Resource interface before it can call ReadNow.read() and it MUST +release access via the Resource interface when it is finished (see [TEP108]).

    +
    +
    +

    ReadStream

    +

    The ReadStream interface can be used to sample an ADC channel multiple times +with a specified sampling period. It provides no guarantees about when exactly +the first sampling occurs, but all subsequent samplings occur with the +specified sampling period.

    +
    +
    +
    +

    3. HAL1 guidelines

    +

    As explained in 1. Introduction the HAL of an ADC abstraction consists of +two sublayers, HAL1 and HAL2. In the ADC component stack the HAL1 resides +below HAL2 and above the HPL. It exposes the full capabilities of the ADC in a +chip-specific way and has the same function as the 'traditional' HAL in the +HAA [TEP2]. Therefore only chip- and platform-dependent clients MAY wire to +the HAL1. Although the HAL1 is chip-specific, both, in terms of implementation +and representation, its design SHOULD follow the guidelines described below to +facilitate the mapping to platform-independent interfaces on the level of +HAL2. Appendix B shows the HAL1 specification for the TI MSP430 MCU.

    +
    +

    Resource reservation

    +

    As the ADC hardware is a shared resource that is multiplexed between several +clients, it requires access arbitration. Therefore the HAL1 configuration +component SHOULD provide a parameterized 'Resource' interface, instantiate a +generic arbiter component and connect the 'Resource' interface to the arbiter +as described in [TEP108]. To provide a uniform arbitration service for all +platforms on the level of HAL2 (see 4. HAL2 requirements), all ADCs should +be arbitrated in round robin fashion, i.e. the HAL1 SHOULD instantiate the +standard round robin arbiter. On the level of HAL1 a client MUST have +successfully requested access to the ADC via the 'Resource' interface before +it can configure / sample a channel. After use it MUST release the ADC via the +'Resource' interface (see [TEP108]).

    +
    +
    +

    Configuration and sampling

    +

    As the ADC hardware is a shared resource the HAL1 SHOULD support hardware +configuration and sampling on a per-client basis (although per-port +configuration is possible, it is not recommended, because it forces all +clients to use the same settings for a given port). Therefore an HAL1 SHOULD +provide "sampling interfaces" parameterized by a client identifier. An HAL1 +client can use its instance of the sampling interface to configure the ADC +hardware, start the sampling process and get conversion results. It wires to a +sampling interface using a unique client identifier. All commands and events +in the sampling interface SHOULD be 'async' to reflect the potential timing +requirements of clients. An HAL1 MAY provide multiple different parameterized +sampling interfaces, depending on the hardware capabilities. This allows to +differentiate/group ADC functionality, for example single vs. repeated +sampling, single channel vs. multiple channels or low-frequency vs. +high-frequency sampling. Every sampling interface SHOULD allow the client to +individually configure the ADC hardware, for example by including the +configuration data as parameters in the sampling commands. However, if +configuration data is passed as a pointer, the HAL1 component MUST NOT +reference it after the return of the respective command. Appendix B shows the +HAL1 interfaces for the TI MSP430 MCU.

    +
    +
    +

    HAL1 virtualization

    +

    In order to hide wiring complexities and/or export only a subset of all ADC +functions generic ADC wrapper components MAY be provided on the level of HAL1 +to be instantiated by chip- and platform-dependent clients.

    +
    +
    +
    +

    4. HAL2 requirements

    +

    The following components MUST be provided on all platforms that have an ADC:

    +
    +AdcReadClient
+AdcReadNowClient
+AdcReadStreamClient
+
    +

    These generic components are instantiated and provide access to the ADC on a +per-client basis via a platform-independent interface for data collection and +a chip-specific ADC configuration interface. This section describes the +representation of the HAL2. Guidelines on how the HAL2 can be implemented are +discussed in Section 5. HAL2 implementation guidelines. Appendix C shows +the AdcReadClient for the TI MSP430 MCU.

    +

    The fact that the components use chip-specific ADC configuration interfaces +(see below) and the fact that the provided interfaces for data-collection must +be interpreted with respect to the configuration data - for example the +reference voltage - makes the HAL2 representation chip dependent. Therefore +the ADC abstraction does not include an HIL.

    +
    +

    AdcReadClient

    +
    +generic configuration AdcReadClient() {
+  provides {
+    interface Read< size_type >;
+  }
+  uses {
+    // chip-dependent configuration interface
+  }
+}
+
    +

    The AdcReadClient provides platform-independent access for data collection via +the 'Read' interface. The actual ADC channel (port) and further configuration +details are determined by a chip-dependent configuration interface. It is the +task of the client to wire this interface to a component that provides its ADC +configuration. The HAL2 implementation will use this interface to "pull" the +client's ADC settings when it translates the 'Read.read()' command to a +chip-specific sampling command. The resolution of the conversion result is +chip-specific, the 'size_type' parameter represents an upper bound for the +resolution of the conversion results.

    +
    +
    +

    AdcReadNowClient

    +
    +generic configuration AdcReadNowClient() {
+  provides {
+    interface Resource;
+    interface ReadNow< size_type >;
+  }
+  uses {
+     // chip-dependent configuration interface
+  }
+}
+
    +

    The AdcReadNowClient provides platform-independent access for data collection +via the 'ReadNow' and 'Resource' interface. The actual ADC channel (port) and +further configuration details are determined by a chip-dependent configuration +interface. It is the task of the client to wire this interface to a component +that provides its ADC configuration. The HAL2 implementation will use this +interface to "pull" the client's ADC settings when it translates the +'ReadNow.read()' command to a chip-specific sampling command. A client MUST +use the 'Resource' interface to request access to the ADC as described in +[TEP108] (the HAL2 implementation SHOULD return the error code 'ERESERVE' if +the client has not reserved access). The resolution of the conversion result +is chip-specific, the 'size_type' parameter represents an upper bound for the +resolution of the conversion result.

    +
    +
    +

    AdcReadStreamClient

    +
    +generic configuration AdcReadStreamClient() {
+  provides {
+    interface ReadStream< size_type >;
+  }
+  uses {
+     // chip-dependent configuration interface
+  }
+}
+
    +

    The AdcReadStreamClient provides platform-independent access for data +collection via the 'ReadStream' interface. The actual ADC channel (port) and +further configuration details are determined by a chip-dependent configuration +interface. It is the task of the client to wire this interface to a component +that provides its ADC configuration. The HAL2 implementation will use this +interface to "pull" the client's ADC settings when it translates the +'ReadStream.read()' command to a chip-specific sampling command. The +resolution of the conversion results is chip-specific, the 'size_type' +parameter represents an upper bound for the resolution of the conversion +results.

    +
    +
    +
    +

    5. HAL2 implementation guidelines

    +

    The HAL2 implementation of an ADC stack has two main tasks: It translates a +platform-independent HAL2 request (from the 'Read', 'ReadNow' or 'ReadStream' +interface) to a chip-specific HAL1 sampling command and it abstracts from the +'Resource' interface. The first task cannot be solved in a chip-independent +way, because it involves chip-specific configuration data. The second task MAY +be performed by the following library components: ArbitratedReadC, and +ArbitratedReadStreamC (in tinyos-2.x/tos/system) - refer to the Atmel Atmega +128 HAL2 implementation (in tinyos-2.x/tos/chips/atm128/adc), for an example. +Note that since the 'ReadNow' interface is always provided in conjunction with +a 'Resource' interface the HAL2 implementation does not have to perform the +ADC resource reservation in this case, but can simply forward an instance of +the 'Resource' interface from the HAL1 (to AdcReadNowClient).

    +

    To support multiple ADC clients the HAL2 implementation should provide +parameterized 'Read', 'ReadNow' and 'ReadStream' interfaces as well as a +parameterized chip-specific configuration interface. It should also use an +instance of the 'Resource' interface (provided by the HAL1) per provided +'Read' and 'ReadStream' interface to perform automatic resource reservation. +The HAL2 representation ('AdcReadClient', 'AdcReadNowClient' and +'AdcReadStreamClient') should ensure the correct wiring between the HAL1 and +HAL2.

    +

    From the perspective of the HAL2 the typical sequence of events is as follows: +After a client has requested data via the 'Read' or 'ReadStream' interface the +HAL2 will request access to the HAL1 via the 'Resource' interface, e.g. using +the library components mentioned above. When it is signalled the 'granted' +event, the HAL2 will 'pull' the client's ADC settings and translate the +client's command to a chip-specific HAL1 sampling command. Once it is +signalled the conversion result(s) it releases the ADC via the 'Resource' +interface and forwards the conversion result(s) to the client. When a client +has requested data via the 'ReadNow' interface the HAL2 translates the +client's command to the chip-specific HAL1 sampling command without using the +'Resource' interface (it may check ownership of the client via the +'ArbiterInfo' interface). In order to reduce state in the HAL2 and facilitate +the mapping between used and provided interfaces the 'AdcReadClient', +'AdcReadNowClient' and 'AdcReadStreamClient' should use the same interface +identifier when it connects the HAL2 to HAL1 (see, for example, the MSP430 +ADC12 implementation in Appendix C).

    +
    +
    +

    6. Implementation

    +

    The implementation of the ADC12 stack on the MSP430 can be found in +tinyos-2.x/tos/chips/msp430/adc12:

    +
    +
      +
    • HplAdc12P.nc is the HPL implementation
      • +
    • Msp430Adc12P.nc is the HAL1 implementation
      • +
    • AdcC.nc is the HAL2 implementation
      • +
    • AdcReadClientC.nc, AdcReadNowClientC.nc and +AdcReadStreamClientC.nc provide access to the ADC on a per-client +basis via the interfaces 'Read', 'ReadNow' and 'ReadStream', +respectively, and the msp430-specific ADC configuration +interface Msp430Adc12Config.nc
      • +
    +
    +

    The Atmel Atmega 128 ADC implementation can be found in +tinyos-2.x/tos/chips/atm128/adc:

    +
    +
      +
    • HplAtm128AdcC.nc is the HPL implementation
      • +
    • Atm128AdcP.nc is the HAL1 implementation
      • +
    • WireAdcP.nc and the library components for arbitrating 'Read', +'ReadNow' and 'ReadStream', ArbitratedReadC and +ArbitratedReadStreamC (in tinyos-2.x/tos/system), realize +the HAL2
      • +
    • AdcReadClientC.nc, AdcReadNowClientC.nc and +AdcReadStreamClientC.nc provide access to the ADC on a per-client +basis via the platform-independent interfaces 'Read', 'ReadNow' and +'ReadStream', respectively, and the atmega-specific ADC configuration +interface Atm128AdcConfig.nc
      • +
    +
    +
    +
    +

    Appendix A: Hardware differences between platforms

    +

    The following table compares the characteristics of two microcontrollers +commonly used in TinyOS platforms:

    + +++++ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     Atmel Atmega 128TI MSP430 ADC12
    Resolution10-bit12-bit
    channels
      +
    • 8 multiplexed +external channels
      • +
    • 16 differential +voltage input +combinations
      • +
    • 2 differential +inputs with gain +amplification
      • +
    +
      +
    • 8 individually +configurable +external channels
      • +
    • internal channels +(AVcc, temperature, +reference voltages)
      • +
    +
    internal reference +voltage2.56V1.5V or 2.5V
    conversion reference
      +
    • positive terminal: +AVcc or 2.56V or +AREF (external)
      • +
    • negative terminal: +GND
      • +
    +
    +individually +selectable per +channel:
    +
      +
    • AVcc and AVss
      • +
    • Vref+ and AVss
      • +
    • Veref+ and AVss
      • +
    • AVcc and (Vref- or +Veref-)
      • +
    • AVref+ and (Vref- +or Veref-)
      • +
    • Veref+ and (Vref- +or Veref-)
      • +
    +
    conversion modes
      +
    • single channel +conversion mode
      • +
    • free running mode +(channels and +reference voltages +can be switched +between samples)
      • +
    +
      +
    • single conversion +mode
      • +
    • repeat single +conversion mode
      • +
    • sequence mode +(sequence <= 16 +channels)
      • +
    • repeat sequence +mode
      • +
    +
    conversion clock +sourceclkADC with prescalerACLK, MCLK, SMCLK or +ADC-oscillator (5MHz) +with prescaler +respectively
    sample-hold-time1.5 clock cycles +(fixed)selectable values +from 4 to 1024 clock +cycles
    conversion triggeringby softwareby software or timers
    conversion during +sleep mode possibleyesyes
    interruptsafter each conversionafter single or +sequence conversion
    +
    +
    +

    Appendix B: an HAL1 representation: MSP430 ADC12

    +

    The following shows the HAL1 representation for the ADC12 of the TI MSP430 +MCU. It reflects the four MSP430 ADC12 conversion modes as it lets a client +sample an ADC channel once ("Single-channel-single-conversion") or repeatedly +("Repeat-single-channel"), multiple times ("Sequence-of-channels") or multiple +times repeatedly ("Repeat-sequence-of-channels"). In contrast to the single +channel conversion modes the sequence conversion modes trigger a single +interrupt after multiple samples and thus enable high-frequency sampling (a +sequence conversion mode for multiple different channels is not (yet) +implemented).:

    +
    +configuration Msp430Adc12C
+{
+  provides interface Resource[uint8_t id];
+  provides interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
+}
+
+interface Msp430Adc12SingleChannel
+{
+  async command error_t getSingleData(const msp430adc12_channel_config_t *config);
+  async command error_t getSingleDataRepeat(const msp430adc12_channel_config_t *config,
+    uint16_t jiffies);
+  async command error_t getMultipleData( const msp430adc12_channel_config_t *config,
+    uint16_t *buffer, uint16_t numSamples, uint16_t jiffies);
+  async command error_t getMultipleDataRepeat(const msp430adc12_channel_config_t *config,
+    uint16_t *buffer, uint8_t numSamples, uint16_t jiffies);
+  async event error_t singleDataReady(uint16_t data);
+  async event uint16_t* multipleDataReady(uint16_t *buffer, uint16_t
+    numSamples);
+}
+
    +

    There exist two wrapper components, Msp430Adc12ClientC and +Msp430Adc12RefVoltAutoClientC, which SHOULD be used to eliminate wiring +errors.

    +
    +
    +

    Appendix C: an HAL2 representation: MSP430 ADC12

    +

    The AdcReadClientC component for the MSP430 ADC12 is implemented as follows:

    +
    +generic configuration AdcReadClientC() {
+  provides interface Read<uint16_t>;
+  uses interface Msp430Adc12Config;
+} implementation {
+  components AdcC;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  components new Msp430Adc12RefVoltAutoClientC() as Msp430AdcClient;
+#else
+  components new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  Read = AdcC.Read[CLIENT];
+  Msp430Adc12Config = AdcC.Config[CLIENT];
+  AdcC.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  AdcC.Resource[CLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  Msp430Adc12Config = Msp430AdcClient.Msp430Adc12Config;
+#endif
+}
+
    +

    Note that the same CLIENT identifier is used for all involved interfaces to +facilitate the mapping between the HAL2 and HAL1 interfaces. The conditional +compile directive REF_VOLT_AUTO_CONFIGURE can be used to automatically enable +the internal reference voltage generator during the sampling process.

    + + + + + +
    [TEP1]TEP 1: TEP Structure and Keywords.
    + + + + + +
    [TEP2](1, 2, 3, 4) TEP 2: Hardware Abstraction Architecture.
    + + + + + +
    [TEP108](1, 2, 3, 4) TEP 108: Resource Arbitration.
    + + + + + +
    [TEP109]TEP 109: Sensor Boards.
    + + + + + +
    [TEP114](1, 2) TEP 114: SIDs: Source and Sink Independent Drivers.
    +
    +
    + + diff --git a/doc/html/tep102.html b/doc/html/tep102.html new file mode 100644 index 00000000..85a7e624 --- /dev/null +++ b/doc/html/tep102.html @@ -0,0 +1,1052 @@ + + + + + + +Timers + + + + +
    +

    Timers

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:102
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Cory Sharp, Martin Turon, David Gay
    Draft-Created:22-Sep-2004
    Draft-Version:1.1.2.4
    Draft-Modified:2006-06-16
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This TEP proposes a Timer design that supports common timing +requirements both in precision and width across common hardware +configurations. This TEP focuses on aligning the Timer abstraction +with the three-layer Hardware Abstraction Architecture (HAA).

    +
    +
    +

    1. Introduction

    +

    Most microcontrollers offer a rich timer system, with features like:

    +
      +
    • several counters, possibly of different widths, with multiple clocking options
      • +
    • one or more compare registers for each counter, which can trigger +interrupts, changes to output pins and changes to the counter value
      • +
    • capture of the time of input pin changes
      • +
    +

    The interested reader can refer to Appendix A for a brief overview of +the timer hardware on some current TinyOS platforms.

    +

    TinyOS does not attempt to capture all this diversity in a +platform-independent fashion. Instead, following the principles of the +HAA[_tep2], each microcontroller should expose all this functionality +via components and interfaces at the HPL and, where appropriate, HAL levels. +However, two aspects of timers are sufficiently common and important +that they should be made available in a well-defined way: measuring time, +and triggering (possibly repeating) events at specific times. The rest +of this TEP specifies:

    +
      +
    • a set of platform-independent interfaces for counting time and triggering +events (2. Interfaces)
      • +
    • guidelines on how each microcontroller's HAL SHOULD expose its timer hardware +in terms of the above interfaces (3. HAL guidelines)
      • +
    • what components a microcontroller's timer HIL MUST implement +(4. HIL requirements)
      • +
    • a set of utility components whose use simplifies building the components +specified by the HAL guidelines and HIL requirements (5. Utility components)
      • +
    +

    This TEP ends with appendices documenting, as an example, the mica2 +timer subsystem implementation.

    +
    +
    +

    2. Interfaces

    +

    Before presenting the interfaces (2.2), we start with a general +discussion of the issues of precision, width and accuracy in +timer interfaces (2.1).

    +
    +

    2.1 Precision, Width and Accuracy.

    +

    Three fundamental properties of timers are precision, width and +accuracy.

    +

    Examples of precision are millisecond, a cycle of a 32kHz clock, and +microseconds. All precisions are in "binary" units with respect to +one second. That is, one second contains 1024 binary milliseconds, +32768 32kHz ticks, or 1048576 microseconds. This TEP emphasizes +millisecond and 32kHz tick precisions while reasonably accommodating +other precisions.

    +

    Examples of widths are 8-bit, 16-bit, 32-bit, and 64-bit. The width +for timer interfaces and components SHOULD be 32-bits. That is, for +lack of a good reason, timer interfaces should expose a 32-bit +interface. In a number of circumstances there are good reasons not +to expose a 32-bit interface. This TEP emphasizes 32-bit widths +while reasonably accommodating other widths.

    +

    Accuracy reflects how closely a component conforms to the precision it +claims to provide. Accuracy is affected by issues such as clock drift (much +higher for internal vs crystal oscillators) and hardware limitations. As an +example of hardware limitations, a mica2 clocked at 7.37MHz cannot offer an +exact microsecond timer -- the closest it can come is 7.37MHz/8. Rather +than introduce a plethora of precisions, we believe it is often best to +pick the existing precision closest to what can be provided, along with +appropriate documentation. However, the accuracy MUST remain reasonable: +for instance, it would be inappropriate to claim that a millisecond timer +is a 32kHz timer.

    +

    This TEP parameterizes all interfaces by precision and some +interfaces by width. This intentionally makes similar timer +interfaces with different precision or width mutually incompatible. +It also allows user code to clearly express and understand the +precision and width for a given timer interface. Accuracy is not +reflected in the interface type.

    +

    Precision is expressed as an empty type -- TMilli, T32khz, and +TMicro -- written in the standard Timer.h header like this:

    +
    +typedef struct { } TMilli;
+typedef struct { } T32khz;
+typedef struct { } TMicro;
+
    +

    Note that the precision names are expressed as either frequency or +period, whichever is convenient.

    +
    +
    +

    2.2 Timer interfaces

    +

    This TEP proposes these timer interfaces:

    +
    +interface Counter< precision_tag, size_type >
+interface Alarm< precision_tag, size_type >
+interface BusyWait< precision_tag, size_type >
+interface LocalTime< precision_tag >
+interface Timer< precision_tag >
+
    +

    The LocalTime and Timer interfaces are used primarily by user +applications and use a fixed width of 32-bits. The Alarm, BusyWait, +and Counter interfaces are used by the TinyOS timer system and +advanced user components.

    +
    +
    +

    Counter

    +

    A Counter component will increase the width of a low-level hardware timer +by wrapping the overflow event and incrementing its higher order bits. +These higher order bits are considered extra state over the HPL register +layer, and therefore qualify all Counters as HAL components. +The Counter interface returns the current time and provides commands +and an event for managing overflow conditions. These overflow +commands and events are necessary for properly deriving larger width +Counters from smaller widths.

    +
    +interface Counter<precision_tag,size_type>
+{
+  async command size_type get();
+  async command bool isOverflowPending();
+  async command void clearOverflow();
+  async event void overflow();
+}
+
    +
    +
    get()
    +
    return the current time.
    +
    isOverflowPending()
    +
    return TRUE if an overflow interrupt will occur after the outermost +atomic block is exits. FALSE otherwise.
    +
    clearOverflow()
    +
    cancel the pending overflow interrupt.
    +
    overflow()
    +
    signals that an overflow in the current time. That is, the current +time has wrapped around from its maximum value to zero.
    +
    +
    +
    +

    Alarm

    +

    Alarm components are extensions of Counters that signal an event +when their Compare register detects the alarm time has been hit. +All commands and events of the Alarm interface are asynchronous (or +in "interrupt context"). The Alarm interface provides a set of +"basic" commands for common usage and provides a set of "extended" +commands for advanced use.

    +
    +interface Alarm<precision_tag,size_type>
+{
+  // basic interface
+  async command void start( size_type dt );
+  async command void stop();
+  async event void fired();
+
+  // extended interface
+  async command bool isRunning();
+  async command void startAt( size_type t0, size_type dt );
+  async command size_type getNow();
+  async command size_type getAlarm();
+}
+
    +
    +
    start(dt)
    +
    cancel any previously running alarm and set to fire in dt time units +from the time of invocation. The alarm will only fire once then +stop.
    +
    stop()
    +
    cancel any previously running alarm.
    +
    fired()
    +
    signals that the alarm has occurred.
    +
    isRunning()
    +
    return TRUE if the alarm has been started and has not been cancelled +or has not yet fired. FALSE is returned otherwise.
    +
    startAt(t0,dt)
    +
    cancel any previously running alarm and set to fire at time t1 = +t0+dt. This form allows a delay to be anchored to some time t0 +taken before the invocation of start. This is also the form used +internally in the timer subsystem to allow the use of the full width +of an alarm while being able to detect if the alarm time for a short +alarm prematurely elapsed.
    +
    getNow()
    +
    return the current time in the precision and width of the alarm.
    +
    getAlarm()
    +
    return the time the currently running alarm will fire or the time +that the previously running alarm was set to fire.
    +
    +
    +
    +

    BusyWait

    +

    The BusyWait interface replaces the TOSH_uwait macro from TinyOS +1.x.

    +
    +interface BusyWait<precision_tag,size_type>
+{
+  async command void wait( size_type dt );
+}
+
    +
    +
    wait(dt)
    +
    block for no less than the specified amount of time.
    +
    +
    +
    +

    LocalTime

    +

    The LocalTime interface exposes a 32-bit counter without overflow +utilities. This is primarily for application code that does not +care about overflow conditions.

    +
    +interface LocalTime<precision_tag>
+{
+  async command uint32_t get();
+}
+
    +
    +
    get()
    +
    return the current time.
    +
    +
    +
    +

    Timer

    +

    All commands and events of the Timer interface are synchronous (or +in "task context"). The Timer interface provides a set of "basic" +commands for common usage and provides a set of "extended" commands +for advanced use. The Timer interface allows for periodic events.

    +
    +interface Timer<precision_tag>
+{
+  // basic interface
+  command void startPeriodic( uint32_t dt );
+  command void startOneShot( uint32_t dt );
+  command void stop();
+  event void fired();
+
+  // extended interface
+  command bool isRunning();
+  command bool isOneShot();
+  command void startPeriodicAt( uint32_t t0, uint32_t dt );
+  command void startOneShotAt( uint32_t t0, uint32_t dt );
+  command uint32_t getNow();
+  command uint32_t gett0();
+  command uint32_t getdt();
+}
+
    +
    +
    startPeriodic(dt)
    +
    cancel any previously running timer and set to fire in dt time units +from the time of invocation. The timer will fire periodically every +dt time units until stopped.
    +
    startOneShot(dt)
    +
    cancel any previously running timer and set to fire in dt time units +from the time of invocation. The timer will only fire once then +stop.
    +
    stop()
    +
    cancel any previously running timer.
    +
    fired()
    +
    signals that the timer has occurred.
    +
    isRunning()
    +
    return TRUE if the timer has been started and has not been cancelled +and has not fired for the case of one-shot timers. One a periodic +timer is started, isRunning will return TRUE until it is cancelled.
    +
    isOneShot()
    +
    return TRUE if the timer is a one-shot timer. Return FALSE +otherwise if the timer is a periodic timer.
    +
    startPeriodicAt(t0,dt)
    +
    cancel any previously running timer and set to fire at time t1 = +t0+dt. The timer will fire periodically every dt time units until +stopped.
    +
    startOneShotAt(t0,dt)
    +
    cancel any previously running timer and set to fire at time t1 = +t0+dt. The timer will fire once then stop.
    +
    getNow()
    +
    return the current time in the precision and width of the timer.
    +
    gett0()
    +
    return the time anchor for the previously started timer or the time +of the previous event for periodic timers.
    +
    getdt()
    +
    return the delay or period for the previously started timer.
    +
    +
    +
    +
    +

    3. HAL guidelines

    +

    Platforms typically select a clocking option for each of their +hardware counters, based on their hardware design (e.g., the mica +family of motes all run their hardware timer 0 at 32kHz, and the micaz +mote runs its timer 1 at cpu frequency/256). Platforms SHOULD expose +the timing functionality of these timers using the Alarm and Counter +interfaces, in the fashion described below. Platforms MAY expose the +same hardware timer with different frequencies - use of conflicting +frequences in the same program SHOULD produce compile-time +errors.

    +

    A hardware timer with precision P and width W SHOULD be exposed as a +several components:

    +
    +configuration CounterPWC {
+  provides interface Counter<TP, uintW_t>;
+} ...
+generic configuration AlarmPWC {
+  provides interface Alarm<TP,uintW_t>;
+} ...
+
    +

    and, except if W is 32:

    +
    +configuration CounterP32C {
+  provides interface Counter<TP, uint32_t>;
+} ...
+generic configuration AlarmP32C {
+  provides interface Alarm<TP,uint32_t>;
+} ...
+
    +

    Instantiating the Alarm... components provides a new Alarm independent +of all prior instantiations. Instantiating such a component "consumes" +a compare register from the corresponding hardware timer; when no more +compare registers are available, instantiation SHOULD produce a +compile-time error (see Appendix B for an example of how to achieve +this).

    +

    For example, the micaz platform includes an AlarmMilli8C and +AlarmMilli32C components for timer 0 (one instantiation allowed), and +Alarm32kHz16C and Alarm32kHz32C for timer 1 (three instantiations +allowed).

    +
    +
    +

    4. HIL requirements

    +
    +
    The following component MUST be provided on all platforms::
    +
    TimerMilliC +BusyWaitMicroC
    +
    +
    +

    TimerMilliC

    +
    +#define TIMERMILLIC_SERVICE ...
+configuration TimerMilliC
+{
+  provides interface Init;
+  provides interface Timer<TMilli>[uint8_t num];
+  provides interface LocalTime<TMilli>;
+}
+
    +

    A timer is allocated using unique(TIMERMILLIC_SERVICE) to obtain a new +unique timer number. This timer number is used to index the TimerMilli +parameterised interface.

    +
    +
    +

    BusyWaitMicroC

    +
    +configuration BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro,uint16_t>;
+}
+
    +

    BusyWaitMicroC allows applications to busy-wait for a number of +microseconds. It's use should be restricted to situations where the +delay is small and setting a timer or alarm would be impractical, +inefficient or insufficiently precise.

    +
    +
    +
    +

    5. Utility components

    +

    A number of platform independent generic components are provided to +help implementers and advanced users of the TinyOS timer system:

    +
      +
    • AlarmToTimerC
      • +
    • BusyWaitCounterC
      • +
    • CounterToLocalTimeC
      • +
    • TransformAlarmC
      • +
    • TransformCounterC
      • +
    • VirtualizeTimerC
      • +
    +

    Appendices B and C show how these can be used to help implement +the timer HAL and HIL.

    +
    +

    AlarmToTimerC

    +

    AlarmToTimerC converts a 32-bit Alarm to a Timer.

    +
    +generic component AlarmToTimerC( typedef precision_tag )
+{
+  provides interface Timer<precision_tag>;
+  uses interface Alarm<precision_tag,uint32_t>;
+}
+
    +
    +
    +

    BusyWaitCounterC

    +

    BusyWaitCounterC uses a Counter to block until a specified amount of +time elapses.

    +
    +generic component BusyWaitC( typedef precision_tag,
+  typedef size_type @integer() )
+{
+  provides interface BusyWait<precision_tag,size_type>;
+  uses interface Counter<precision_tag,size_type>;
+}
+
    +
    +
    +

    CounterToLocalTimeC

    +

    CounterToLocalTimeC converts from a 32-bit Counter to LocalTime.

    +
    +generic component CounterToLocalTimeC( precision_tag )
+{
+  provides interface LocalTime<precision_tag>;
+  uses interface Counter<precision_tag,uint32_t>;
+}
+
    +
    +
    +

    TransformAlarmC

    +

    TransformAlarmC decreases precision and/or widens an Alarm. An +already widened Counter component is used to help.

    +
    +generic component TransformAlarmC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right )
+{
+  provides interface Alarm<to_precision_tag,to_size_type> as Alarm;
+  uses interface Counter<to_precision_tag,to_size_type> as Counter;
+  uses interface Alarm<from_precision_tag,from_size_type> as AlarmFrom;
+}
+
    +

    to_precision_tag and to_size_type describe the final precision and +final width for the provided Alarm. from_precision_tag and +from_size_type describe the precision and width for the source +AlarmFrom. bit_shift_right describes the bit-shift necessary to +convert from the used precision to the provided precision.

    +

    For instance to convert from an Alarm<T32khz,uint16_t> to an +Alarm<TMilli,uint32_t>, the following TransformAlarmC would be +created:

    +
    +new TransformAlarmC( TMilli, uint32_t, T32khz, uint16_t, 5 )
+
    +
    +
    +

    TransformCounterC

    +

    TransformCounterC decreases precision and/or widens a Counter.

    +
    +generic component TransformCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer() )
+{
+  provides interface Counter<to_precision_tag,to_size_type> as Counter;
+  uses interface Counter<from_precision_tag,from_size_type> as CounterFrom;
+}
+
    +

    to_precision_tag and to_size_type describe the final precision and +final width for the provided Counter. from_precision_tag and +from_size_type describe the precision and width for the source +AlarmFrom. bit_shift_right describes the bit-shift necessary to +convert from the used precision to the provided precision. +upper_count_type describes the numeric type used to store the +additional counter bits. upper_count_type MUST be a type with width +greater than or equal to the additional bits in to_size_type plus +bit_shift_right.

    +

    For instance to convert from a Counter<T32khz,uint16_t> to a +Counter<TMilli,uint32_t>, the following TransformCounterC would be +created:

    +
    +new TransformCounterC( TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t )
+
    +
    +
    +

    VirtualizeTimerC

    +

    VirtualizeTimerC uses a single Timer to create up to 255 virtual +timers.

    +
    +generic component VirtualizeTimerC( typedef precision_tag, int max_timers )
+{
+  provides interface Init;
+  provides interface Timer<precision_tag> as Timer[ uint8_t num ];
+  uses interface Timer<precision_tag> as TimerFrom;
+}
+
    +
    +
    +
    +

    Appendix A: Timer hardware on various microcontrollers

    +
    +
      +
    1. Atmega128
      2. +
    +
    +
      +
    1. Two 8-bit timers, each allowing
      2. +
    +
    +
      +
    • 7 prescaler values (division by different powers of 2)
      • +
    • Timer 0 can use an external 32768Hz crystal
      • +
    • One compare register, with many compare actions (change +output pin, clear counter, generate interrupt, etc)
      • +
    +
    +
      +
    1. Two 16-bit timers, each with
      2. +
    +
    +
      +
    • 5 prescaler values
      • +
    • External and software clocking options
      • +
    • Three compare registers (again with many actions)
      • +
    • Input capture
      • +
    +
    +
    +
      +
    1. MSP430
      2. +
    +
    +
      +
    1. Two 16-bit timers with
      2. +
    +
    +
      +
    • One with three compare registers
      • +
    • One with eight compare registers
      • +
    • Each from distinct clock source
      • +
    • Each with limited prescalers
      • +
    +
    +
    +
      +
    1. Intel PXA27x
      2. +
    +
    +
      +
    1. One fixed rate (3.25MHz) 32-bit timer with
      2. +
    +
    +
      +
    • 4 compare registers
      • +
    • Watchdog functionality
      • +
    +
    +
      +
    1. 8 variable rate 32-bit timers with
      2. +
    +
    +
      +
    • 1 associated compare register each
      • +
    • Individually selectable rates: 1/32768s, 1ms, 1s, 1us
      • +
    • Individually selectable sources: (32.768 external osc, +13 Mhz internal clock)
      • +
    +
    +
      +
    1. Periodic & one-shot capability
      2. +
    2. Two external sync events
      3. +
    +
    +
    +
    +
    +

    Appendix B: a microcontroller: Atmega 128 timer subsystem

    +

    The Atmega128 exposes its four timers through a common set of interfaces:

    +
    +
      +
    • HplTimer<width> - get/set current time, overflow event, control, init
      • +
    • HplCompare<width> - get/set compare time, fired event, control
      • +
    • HplCapture<width> - get/set capture time, captured event, control, config
      • +
    +
    +

    Parameterising these interfaces by width allows reusing the same interfaces +for the 8 and 16-bit timers. This simplifies building reusable higher level +components which are independent of timer width.

    +
    +interface HplAtm128Timer<timer_size>
+{
+  /// Timer value register: Direct access
+  async command timer_size get();
+  async command void       set( timer_size t );
+
+  /// Interrupt signals
+  async event void overflow();        //<! Signalled on overflow interrupt
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset(); //<! Clear the overflow interrupt flag
+  async command void start(); //<! Enable the overflow interrupt
+  async command void stop();  //<! Turn off overflow interrupts
+  async command bool test();  //<! Did overflow interrupt occur?
+  async command bool isOn();  //<! Is overflow interrupt on?
+
+  /// Clock initialization interface
+  async command void    off();                     //<! Turn off the clock
+  async command void    setScale( uint8_t scale);  //<! Turn on the clock
+  async command uint8_t getScale();                //<! Get prescaler setting
+}
+
+interface HplAtm128Compare<size_type>
+{
+  /// Compare value register: Direct access
+  async command size_type get();
+  async command void      set(size_type t);
+
+  /// Interrupt signals
+  async event void fired();           //<! Signalled on compare interrupt
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset();         //<! Clear the compare interrupt flag
+  async command void start();         //<! Enable the compare interrupt
+  async command void stop();          //<! Turn off comparee interrupts
+  async command bool test();          //<! Did compare interrupt occur?
+  async command bool isOn();          //<! Is compare interrupt on?
+}
+
+interface HplAtm128Capture<size_type>
+{
+  /// Capture value register: Direct access
+  async command size_type get();
+  async command void      set(size_type t);
+
+  /// Interrupt signals
+  async event void captured(size_type t);  //<! Signalled on capture int
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset();          //<! Clear the capture interrupt flag
+  async command void start();          //<! Enable the capture interrupt
+  async command void stop();           //<! Turn off capture interrupts
+  async command bool test();           //<! Did capture interrupt occur?
+  async command bool isOn();           //<! Is capture interrupt on?
+
+  async command void setEdge(bool up); //<! True = detect rising edge
+}
+
    +

    These interfaces are provided by four components, corresponding to +each hardware timer: HplAtm128Timer0C through HplAtm128Timer3C.

    +

    The Atmega128 chip components do not define a HAL, as the timer +configuration choices (frequencies, use of input capture or compare output, +etc) are platform-specific. Instead, it provides a few generic components +for converting the HPL interfaces into platform-independent interfaces. +These generic components include appropriate configuration parameters +(e.g., prescaler values):

    +
    +generic module Atm128AlarmC(typedef frequency_tag,
+                            typedef timer_size @integer(),
+                            uint8_t prescaler,
+                            int mindt)
+{
+  provides interface Init;
+  provides interface Alarm<frequency_tag, timer_size> as Alarm;
+  uses interface HplTimer<timer_size>;
+  uses interface HplCompare<timer_size>;
+} ...
+
+generic module Atm128CounterC(typedef frequency_tag,
+                              typedef timer_size @integer())
+{
+  provides interface Counter<frequency_tag,timer_size> as Counter;
+  uses interface HplTimer<timer_size> as Timer;
+} ...
+
    +
    +
    +

    Appendix C: a mote: Mica family timer subsystem

    +

    Members of the mica family (mica2, mica2dot, micaz) use the Atmega128 +microprocessor and have external crystals at 4 or 7.37MHz. Additionally, +they can be run from an internal oscillator at 1, 2, 4, or 8 MHz. The +internal oscillator is less precise, but allows for much faster startup +from power-down and power-save modes (6 clocks vs 16000 clocks). Finally, +power consumption is lower at the lower frequencies.

    +

    The mica family members support operation at all these frequencies via +a MHZ preprocessor symbol, which can be defined to 1, 2, 4, or 8. +If undefined, it defaults to a platform-dependent value (4 for mica2dot, +8 for mica2 and micaz).

    +

    The mica family configures its four timers in part based on the value +of this MHZ symbol:

    +
      +

    • Timer 0: divides the external 32768Hz crystal by 32 to build AlarmMilli8C +and AlarmMilli32C (see Section 3). As timer 0 has a single compare +register, these can only be instantiated once. +Timing accuracy is as good as the external crystal.

      +
      • +

    • Timer 1: the 16-bit hardware timer 1 is set to run at 1MHz if possible. +However, the set of dividers for timer 1 is limited to 1, 8, +64, 256 and 1024. So, when clocked at 2 or 4MHz, a divider of 1 is +selected and timer 1 runs at 2 or 4MHz. To reflect this fact, the +HAL components exposing timer 1 are named CounterOne16C and +AlarmOne16C (rather than the CounterMicro16C AlarmMicro16C +as suggested in Section 3).

      +

      When building the 32-bit counter and 32-bit alarms, the rate of +timer 1 is adjusted in software to 1MHz. Thus the 32-bit HAL components +for timer are named CounterMicro32C and AlarmMicro32C.

      +

      Three compare registers are available on timer1, so up to three instances +of AlarmOne16C and/or AlarmMicro32C can be created. The timing +accuracy depends on how the mote is clocked:

      +
        +
      • internal clock: depends on how well the clock is calibrated
        • +
      • external 7.37MHz crystal: times will be off by ~8.6%
        • +
      • external 4MHz crystal: times will be as accurate as the crystal
        • +
      +
      • +

    • Timer 2: this timer is not currently exposed by the HAL.

      +
      • +

    • Timer 3: the 16-bit hardware timer 3 is set to run at a rate close to +32768Hz, if possible. As with timer 1, the limited set of dividers makes +this impossible at some clock frequencies, so the 16-bit timer 3 HAL +components are named CounterThree16C and AlarmThree16C. As +with timer 1, the rate of timer 3 is adjusted in software when +building the 32-bit counter and 32-bit alarms, giving components +Counter32khz32C and Alarm32khz32C. As with timer 1, three compare +registers, hence up to three instances of Alarm32khz32C and/or +AlarmThree16C are available.

      +

      At 1, 2, 4 and 8MHz, Counter32khz32C and Alarm32khz32C run +at 31.25kHz (plus clock rate inaccuracy). At 7.37MHz, they run at +~28.8kHz.

      +
      • +
    +

    When an Atmega128 is in any power-saving mode, hardware timers 1, 2 and 3 +stop counting. The default Atmega128 power management will enter these +power-saving modes even when timers 1 and 3 are enabled, so time as +measured by timers 1 and 3 does not represent real time. However, if any +alarms built on timers 1 or 3 are active, the Atmega128 power management +will not enter power-saving modes.

    +

    The mica family HIL components are built as follows:

    +
      +
    • TimerMilliC: built using AlarmMilli32C (consuming its single compare +register)
      • +
    • BusyWaitMicroC: implemented using a simple software busy-wait loop which +waits for MHZ cycles per requested microsecond. Accuracy is the same as +Timer 1.
      • +
    +

    Finally, the mica family motes measure their clock rate at boot time, based +on the external 32768Hz crystal. The results of this clock rate measurement +are made available via the cyclesPerJiffy command of the +Atm128Calibrate interface of the MeasureClockC component. This +command reports the number of cycles per 1/32768s. Please see this interface +definition for other useful commands for more accurate timing.

    +
    +
    + + diff --git a/doc/html/tep103.html b/doc/html/tep103.html new file mode 100644 index 00000000..6ed078f4 --- /dev/null +++ b/doc/html/tep103.html @@ -0,0 +1,807 @@ + + + + + + +Permanent Data Storage (Flash) + + + + +
    +

    Permanent Data Storage (Flash)

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:103
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:David Gay, Jonathan Hui
    Draft-Created:27-Sep-2004
    Draft-Version:1.1.2.12
    Draft-Modified:2006-06-21
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents a set of hardware-independent interfaces to non-volatile +storage for TinyOS 2.x. It describes some design principles for the HPL and +HAL layers of various flash chips.

    +
    +
    +

    1. Introduction

    +

    Flash chips are a form of EEPROM (electrically-eraseable, programmable +read-only memory), distinguished by a fast erase capability. However, +erases can only be done in large units (from 256B to 128kB depending on the +flash chip). Erases are the only way to switch bits from 0 to 1, and +programming operations can only switch 1's to 0's. Additionally, some +chips require that programming only happen once between each erase, +or that it be in relatively large units (e.g., 256B).

    +

    In the table below, we summarise these differences by categorising +flash chips by their underlying technology (NOR vs NAND). We also +include a column for Atmel's AT45DB flash chip family, as it has +significantly different tradeoffs than other flash chips:

    +
    +                 NOR                AT45DB         NAND
+
+Erase        :  Slow (seconds)      Fast (ms)      Fast (ms)
+Erase unit   :  Large (64KB-128KB)  Small (256B)   Medium (8K-32KB)
+Writes       :  Slow (100s kB/s)    Slow (60kB/s)  Fast (MBs/s)
+Write unit   :  1 bit               256B           100's of bytes
+Bit-errors   :  Low                 Low            High (requires ECC,
+                                                   bad-block mapping)
+Read         :  Fast*               Slow+I/O bus   Fast (but limited by
+                                                   I/O bus)
+Erase cycles :  10^4 - 10^5         10^4 **        10^5 - 10^7
+Intended use :  Code storage        Data storage   Data storage
+Energy/byte  :  1uJ                 1uJ            .01uJ
+
+*  Intel Mote2 NOR flash is memory mapped (reads are very fast and can
+   directly execute code)
+** Or infinite? Data sheet just says that every page within a sector
+   must be written every 10^4 writes within that sector
+
    +

    The energy/byte is the per-byte cost of erasing plus programming. It is +derived from the timing and power consumption of erase and write operations +(for NOR flash, values are for the STMicroelectronics M25P family, for NAND +flash, values are from a Samsung datasheet). Energy/byte for reads appears +to depend mostly on how long the read takes (the power consumptions are +comparable), i.e., on the efficiency of the bus + processor.

    +

    Early TinyOS platforms all used a flash chip from the AT45DB +family. In TinyOS 1.x, this chip could be accessed through three +different components:

    +
      +
    • Using a low-level interface (PageEEPROMC) which gave direct +access to per-page read, write and erase operations.
      • +
    • Using a high-level memory-like interface (ByteEEPROMC) with +read, write and logging operations.
      • +
    • Using a simple file system (Matchbox) with sequential-only +files [1].
      • +
    +

    Some more recent platforms use different flash chips: the ST M25P family (Telos +rev. B, eyes) and the Intel Strataflash (Intel Mote2). None of the +three components listed above are supported on these chips:

    +
      +
    • The PageEEPROMC component is (and was intended to be) AT45DB-specific
      • +
    • ByteEEPROMC allows arbitrary rewrites of sections of the flash. +This is not readily implementable on a flash chip with large erase units.
      • +
    • The Matchbox implementation was AT45DB-specific. It was not +reimplemented for these other chips, in part because it does not +support some applications (e.g., network reprogramming) very well.
      • +
    +

    One approach to hiding the differences between different flash chips is to +provide a disk-like, block interface (with, e.g., 512B blocks). This is the +approach taken by compact flash cards. However, in the context of TinyOS, +this approach has several drawbacks:

    +
      +
    • This approach is protected by patents, making it difficult to provide +in a free, open-source operating system.
      • +
    • To support arbitrary block writes where blocks are smaller than the +erase unit, and to deal with the limited number of erase cycles/block +requires remapping blocks. We believe that maintaining this remapping +table is too expensive on many mote-class devices.
      • +
    +

    Another approach to supporting multiple flash chips is to build a +file system (like Matchbox) which can be implemented for multiple +flash chips. However, TinyOS is currently targeted at running a +single application, and many applications know their storage needs +in advance: for instance, a little space for configuration data, and +everything else for a log of all sampled data. In such cases, the +flexibility offered by a filing system (e.g., arbitrary numbers of +files) is overkill, and may come at the expense of implementation +and runtime complexity.

    +

    Instead, TinyOS 2.x, divides flash chips into separate volumes (with +sizes fixed at compile-time). Each volume provides a single storage +abstraction (the abstraction defines the format). So far there are three +such abstractions: large objects written in a single session, +small objects with arbitrary reads and writes, and logs. This approach +has two advantages:

    +
      +
    • Each abstraction is relatively easy to implement on a new flash chip, and +has relatively little overhead.
      • +
    • The problem of dealing with the limited number of erase cycles/block +is simplified: it is unlikely that user applications will need to +rewrite the same small object 100'000 times, or cycle 100'000 times +through their log. Thus the abstractions can mostly ignore the need for +"wear levelling" (ensuring that each block of the flash is erased +the same number of time, to maximise flash chip lifetime).
      • +
    +

    New abstractions (including a filing system) can easily be added to this +framework, or can be built on top of these abstractions.

    +

    The rest of this TEP covers some principles for the organisation of +flash chips (Section 2), then describes the flash volumes and +storage abstractions in detail (Section 3).

    +
    +
    +

    2. HPL/HAL/HIL Architecture

    +

    The flash chip architecture dollows the three-layer Hardware +Abstraction Architecture (HAA), with each chip providing a presentation +layer (HPL, Section 2.1), adaptation layer (HAL, Section 2.2) and +platform-independent interface layer (the storage abstractions described in +Section 3) [2]. The implementation of these layers SHOULD be found in the +tos/chips/CHIPNAME directory. If a flash chip is part of a larger +family with a similar interface, the HAA SHOULD support all family members +by relying, e.g., on platform-provided configuration information.

    +

    Appendix A shows example HPL and HAL specifications for the AT45DB +and ST M25P chip families.

    +
    +

    2.1 Hardware Presentation Layer (HPL)

    +

    The flash HPL has a chip-dependent, system-independent interface. The +implementation of this HPL is system-dependent. The flash HPL SHOULD be +stateless.

    +

    To remain platform independent, a flash chip's HPL SHOULD connect to +platform-specific components +providing access to the flash chip; these components +SHOULD be placed in the tos/platforms/PLATFORM/chips/CHIPNAME +directory. If the flash chip implementation supports a family of +flash chips, this directory MAY also contain a file describing the +particular flash chip found on the platform.

    +
    +
    +

    2.2 Hardware Adaptation Layer (HAL)

    +

    The flash HAL has a chip-dependent, system-independent interface and +implementation. Flash families with a common HPL SHOULD have a common +HAL. Flash HAL's SHOULD expose a Resource interface and automatically +power-manage the underlying flash chip. Finally, the flash HAL MUST +provide a way to access the volume information specified by the +programmer (see Section 3). This allows users to build new flash +abstractions that interact cleanly with the rest of the flash system.

    +
    +
    +
    +

    3. Non-Volatile Storage Abstracitons in TinyOS 2.x

    +

    The HIL implementations are system-independent, but chip (family) +dependent. They implement the three storage abstractions and +volume structure discussed in the introduction.

    +
    +

    3.1. Volumes

    +

    The division of the flash chip into fixed-size volumes is specified by +an XML file that is placed in the application's directory (where one +types 'make'). The XML file specifies the allocation as follows:

    +
    +<volume_table>
+  <volume name="DELUGE0" size="65536" />
+  <volume name="CONFIGLOG" size="65536" />
+  <volume name="DATALOG" size="131072" />
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+</volume_table>
+
    +

    The name and size parameters are required, while base is optional. The name +is a string containing one or more characters in [a-zA-Z0-9_], while size +and base are in bytes. Each storage chip MUST provide a compile-time tool +that translates the allocation specification to chip-specific nesC +code. There is no constraint on how this is done or what code is produced, +except that the specification to physical allocation MUST be one-to-one +(i.e. a given specification should always have the same resulting physical +allocation on a given chip) and the result MUST be placed in the build +directory. When not specified, the tool may give any suitable physical +location to a volume. If there is any reason that the physical allocation +cannot be satisfied, an error should be given at compile time. The tool +SHOULD be named tos-storage-CHIPNAME and be distributed with the other +tools supporting a platform.

    +

    The compile-time tool MUST prepend 'VOLUME_' to each volume name in +the XML file and '#define' each resulting name to map to a unique +integer.

    +

    The storage abstractions are accessed by instantiating generic +components that take the volume macro as argument:

    +
    +components new BlockStorageC(VOLUME_DELUGE0);
+
    +

    If the named volume is not in the specification, nesC will give a +compile-time error since the symbol will be undefined.

    +

    A volume MUST NOT be used with more than one storage abstraction instance.

    +
    +
    +

    3.2 Large objects

    +

    The motivating example for large objects is the transmission or long-term +storage of large pieces of data. For instance, programs in a network-reprogramming +system, or large data-packets in a reliable data-transmission system. Such +objects have two interesting characteristics: each byte in the object is +written at most once, and a full object is written in a single "session" +(i.e., without the mote rebooting).

    +

    This leads to the definition of the BlockStorageC abstraction for storing +large objects:

    +
      +
    • A large object ranges from a few kilobytes upwards.
      • +
    • A large object must be erased before use.
      • +
    • A large object must be committed to ensure it survives a reboot or crash; +after a commit no more writes may be performed.
      • +
    • Random reads are allowed.
      • +
    • Random writes are allowed are allowed between erase and commit; data +cannot be overwritten.
      • +
    +

    Large objects are accessed by instantiating a BlockStorageC component +which takes a volume id argument:

    +
    +generic configuration BlockStorageC(volume_id_t volid) {
+  provides {
+      interface BlockWrite;
+      interface BlockRead;
+  }
+} ...
+
    +

    The BlockRead and BlockWrite interfaces contain the following +operations (all split-phase, except BlockRead.getSize):

    +
      +
    • BlockWrite.erase: erase the volume. After a reboot or a commit, a +volume must be erased before it can be written to.
      • +
    • BlockWrite.write: write some bytes starting at a given offset. Each +byte can only be written once between an erase and the subsequent commit.
      • +
    • BlockWrite.commit: commit all writes to a given volume. No writes can +be performed after a commit until a subsequent erase.
      • +
    • BlockRead.verify: verify that the volume contains the results of a +successful commit.
      • +
    • BlockRead.read: read some bytes starting at a given offset.
      • +
    • BlockRead.computeCrc: compute the CRC of some bytes starting at a +given offset.
      • +
    • BlockRead.getSize: return bytes available for large object storage in +volume.
      • +
    +

    For full details on arguments and other considerations, see the comments in +the interface definitions.

    +
    +
    +

    3.3 Logging

    +

    Event and reuslt logging is a common requirement in sensor +networks. Such logging should be reliable (a mote crash should not +lose data). It should also be easy to extract data from the log, +either partially or fully. Some logs are linear (stop logging when +the volume is full), others are circular (the oldest data is +overwritten when the volume is full).

    +

    The LogStorageC abstraction supports these requirements. The log is record +based: each call to LogWrite.append (see below) creates a new +record. On failure (crash or reboot), the log is guaranteed to only lose +whole records from the end of the log. Additionally, once a circular log +wraps around, calls to LogWrite.append only lose whole records from the +beginning of the log. These guarantees mean that applications do not to +have worry about incomplete or inconsistent log entries.

    +

    Logs are accessed by instantiating a LogStorageC component which takes a +volume id and a boolean argument:

    +
    +generic configuration LogStorageC(volume_id_t volid, bool circular) {
+  provides {
+      interface LogWrite;
+      interface LogRead;
+  }
+} ...
+
    +

    If the circular argument is TRUE, the log is circular; otherwise +it is linear.

    +

    The LogRead and LogWrite interfaces contain the following +operations (all split-phase except LogWrite.currentOffset, +LogRead.currentOffset and LogRead.getSize):

    +
      +

    • LogWrite.erase: erase the log.

      +
      • +

    • LogWrite.append: append some bytes to the log. In a circular log, +this may overwrite the current read position. In this case, the +read position is implicitly advanced to the log's current beginning +(i.e., as if LogRead.seek had been called with SEEK_BEGINNING).

      +

      Each append creates a separate record. Log implementations may have a +maximum record size; all implementations MUST support records of up +to 255 bytes.

      +
      • +

    • LogWrite.sync: guarantee that data written so far will not be lost to +a crash or reboot (it can still be overwritten when a circular log wraps +around). Using sync may waste some space in the log.

      +
      • +

    • LogWrite.currentOffset: return cookie representing current +append position (for use with LogRead.seek).

      +
      • +

    • LogRead.read: read some bytes from the current read position in +the log and advance the read position.

      +
      • +

    • LogRead.currentOffset: return cookie representing current +read position (for use with LogRead.seek).

      +
      • +

    • LogRead.seek: set the read position to a value returned by +a prior call to LogWrite.currentOffset or LogRead.currentOffset, +or to the special SEEK_BEGINNING value. In a circular log, if +the specified position has been overwritten, behave as if +SEEK_BEGINNING was requested.

      +

      SEEK_BEGINNING positions the read position at the beginning of +the oldest record still present in the log.

      +
      • +

    • LogRead.getSize: return an approximation of the log's capacity. +Uses of sync and other overhead may reduce this number.

      +
      • +
    +

    For full details on arguments, etc, see the comments in the interface +definitions.

    +
    +
    +

    3.4 Small objects:

    +

    Sensor network applications may need to store configuration data, e.g., +mote id, radio frequency, sample rates, etc. Such data is not large, but +losing it may lead to a mote misbehaving or losing contact with the +network.

    +

    The ConfigStorageC abstraction stores a single small object in a volume. It:

    +
      +
    • Assumes that configuration data is relatively small (a few +hundred bytes).
      • +
    • Allows random reads and writes.
      • +
    • Has simple transactional behaviour: each read is a separate transaction, +all writes up to a commit form a single transaction.
      • +
    • At reboot, the volume contains the data as of the most recent successful +commit.
      • +
    +

    Small objects are accessed by instantiating a ConfigStorageC component +which takes a volume id argument:

    +
    +generic configuration ConfigStorageC(volume_id_t volid) {
+  provides {
+      interface Mount;
+      interface ConfigStorage;
+  }
+} ...
+
    +

    A small object MUST be mounted (via the Mount interface) before +the first use.

    +

    The Mount and ConfigStorage interfaces contain the following +operations (all split-phase except ConfigStorage.getSize and +ConfigStorage.valid):

    +
      +
    • Mount.mount: mount the volume.
      • +
    • ConfigStorage.valid: return TRUE if the volume contains a +valid small object.
      • +
    • ConfigStorage.read: read some bytes starting at a given offset. +Fails if the small object is not valid. Note that this reads the +data as of the last successful commit.
      • +
    • ConfigStorage.write: write some bytes to a given offset.
      • +
    • ConfigStorage.commit: make the small object contents reflect all the +writes since the last commit.
      • +
    • ConfigStorage.getSize: return the number of bytes that can be stored +in the small object.
      • +
    +

    For full details on arguments, etc, see the comments in the interface +definitions.

    +
    +
    +
    +

    4. Implementations

    +

    An AT45DB implementation can be found in tinyos-2.x/tos/chips/at45db.

    +

    An ST M25P implementation can be found in tinyos-2.x/tos/chips/stm25p.

    +
    +
    +

    5. Authors' Addresses

    +
    +
    David Gay
    +
    2150 Shattuck Ave, Suite 1300
    +
    Intel Research
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 495 3055
    +
    email - david.e.gay@intel.com
    +

    +

    +
    Jonathan Hui
    +
    657 Mission St. Ste. 600
    +
    Arched Rock Corporation
    +
    San Francisco, CA 94105-4120
    +

    +
    phone - +1 415 692 0828
    +
    email - jhui@archedrock.com
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [1]David Gay. "Design of Matchbox, the simple filing system for +motes. (version 1.0)."
    + + + + + +
    [2]TEP 2: Hardware Abstraction Architecture.
    +
    +
    +

    Appendix A. HAA for some existing flash chips

    +
    +

    A.1 AT45DB

    +

    The Atmel AT45DB family HPL is:

    +
    +configuration HplAt45dbC {
+  provides interface HplAt45db;
+} ...
+
    +

    The HplAt45db interface has flash->buffer, buffer->flash, compare +buffer to flash, erase page, read, compute CRC, and write operations. Most +of these operations are asynchronous, i.e., their completion is signaled +before the flash chip has completed the operation. The HPL also includes +operations to wait for asynchronous operations to complete.

    +

    A generic, system-independent implementation of the HPL +(HplAt45dbByteC) is included allowing platforms to just provide SPI and +chip selection interfaces.

    +

    Different members of the AT45DB family are supported by specifying a few +constants (number of pages, page size).

    +

    The AT45DB HAL has two components, one for chip access and the other +providing volume information:

    +
    +component At45dbC
+{
+  provides {
+    interface At45db;
+    interface Resource[uint8_t client];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+} ...
+
+configuration At45dbStorageManagerC {
+  provides interface At45dbVolume[volume_id_t volid];
+} ...
+
    +

    Note that the AT45DB HAL resource management is independent of the +underlying HPL's power management. The motivation for this is that +individual flash operations may take a long time, so it may be desirable to +release the flash's bus during long-running operations.

    +

    The At45db interface abstracts from the low-level HPL operations by:

    +
      +
    • using the flash's 2 RAM buffers as a cache to allow faster reads and +writes
      • +
    • hiding the asynchronous nature of the HPL operations
      • +
    • verifying that all writes were successful
      • +
    +

    It provides cached read, write and CRC computation, and page erase and +copy. It also includes flush and sync operations to manage the cache.

    +

    The At45dbVolume interface has operations to report volume size and +map volume-relative pages to absolute pages.

    +
    +
    +

    A.2 ST M25P

    +

    The ST M25P family HPL is:

    +
    +configuration Stm25pSpiC {
+  provides interface Init;
+  provides interface Resource;
+  provides interface Stm25pSpi;
+}
+
    +

    The Stm25pSpi interface has read, write, compute CRC, sector erase +and block erase operations. The implementation of this HPL is +system-independent, built over a few system-dependent components +providing SPI and chip selection interfaces.

    +

    Note that these two examples have different resource management policies: +the AT45DB encapsulates resource acquisition and release within each +operation, while the M25P family requires that HPL users acquire and +release the resource itself.

    +

    The ST M25P HAL is:

    +
    +configuration Stm25pSectorC {
+  provides interface Resource as ClientResource[storage_volume_t volume];
+  provides interface Stm25pSector as Sector[storage_volume_t volume];
+  provides interface Stm25pVolume as Volume[storage_volume_t volume];
+}
+
    +

    The Stm25pSector interface provides volume-relative operations similar +to those from the HPL interface: read, write, compute CRC and +erase. Additionally, it has operations to report volume size and remap +volume-relative addresses. Clients of the ST M25P HAL must implement the +getVolumeId event of the Stm25pVolume interface so that the HAL can +obtain the volume id of each of its clients.

    +
    +
    +
    + + diff --git a/doc/html/tep106.html b/doc/html/tep106.html new file mode 100644 index 00000000..c8939f50 --- /dev/null +++ b/doc/html/tep106.html @@ -0,0 +1,807 @@ + + + + + + +Schedulers and Tasks + + + + +
    +

    Schedulers and Tasks

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:106
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis and Cory Sharp
    Draft-Created:10-Dec-2004
    Draft-Version:1.1.2.9
    Draft-Modified:2006-06-13
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents the structure and implementation of tasks +and task schedulers in TinyOS 2.x.

    +
    +
    +

    1. Introduction

    +

    TinyOS has two basic computational abstractions: asynchronous events +and tasks. Early versions of TinyOS provided a single type of task -- +parameter free -- and only a FIFO scheduling policy. While changing +the latter was possible, the incorporation of tasks into the nesC +language made it very difficult. Presenting task schedulers as a +TinyOS component enables much easier customization, and allowing tasks +to be presented as an interface enables extending the classes of tasks +available. TinyOS 2.0 takes both approaches, and this memo documents +the structure of how it does so as well as a simple mechanism that +greatly increases system dependability.

    +
    +
    +

    2. Tasks and the Scheduler in TinyOS 1.x

    +

    Tasks in TinyOS are a form of deferred procedure call (DPC) [1], which +enable a program to defer a computation or operation until a later +time. TinyOS tasks run to completion and do not pre-empt one +another. These two constraints mean that code called from tasks +runs synchonously with respect to other tasks. Put another way, tasks +are atomic with respect to other tasks [2].

    +

    In TinyOS 1.x, the nesC language supports tasks through two +mechanisms, task declarations and post expressions:

    +
    +task void computeTask() {
+  // Code here
+}
+
    +

    and:

    +
    +result_t rval = post computeTask();
+
    +

    TinyOS 1.x provides a single kind of task, a parameter-free function, +and a single scheduling policy, FIFO. post expressions can return +FAIL, to denote that TinyOS was unable to post the task. Tasks can be +posted multiple times. For example, if a task is posted twice in quick +succession and the first succeeds while the second fails, then the +task will be run once in the future; for this reason, even if a post +fails, the task may run.

    +

    The TinyOS 1.x scheduler is implemented as a set of C functions in the +file sched.c. Modifying the scheduler requires replacing or +changing this file. Additionally, as tasks are supported solely through +nesC task declarations and post expressions, which assume +a parameter-free function, modifying the syntax or capabilities of +tasks is not possible.

    +

    The task queue in TinyOS 1.x is implemented as a fixed size circular +buffer of function pointers. Posting a task puts the task's function +pointer in the next free element of the buffer; if there are no free +elements, the post returns fail. This model has several issues:

    +
    +
      +
    1. Some components do not have a reasonable response to a failed post
      2. +
    2. As a given task can be posted multiple times, it can consume more than one element in the buffer
      3. +
    3. All tasks from all components share a single resource: one misbehaving component can cause other's posts to fail
      4. +
    +
    +

    Fundamentally, in order for a component A to repost a task after post +failure, another component B must call a function on it (either a +command or event). E.g., component A must schedule a timer, or expect +a retry from its client. However, as many of these systems might +depend on tasks as well (e.g., timers), it is possible that an +overflowing task queue can cause the entire system to fail.

    +

    The combination of the above three issues mean that one misbehaving +component can cause TinyOS to hang. Consider, for example, this +scenario (a real and encountered problem on the Telos platform):

    +
    +
      +
    • A packet-based hardware radio, which issues an interrupt only when it finishes sending a packet
      • +
    • A networking component that handles the interrupt to post a task to signal SendMsg.sendDone.
      • +
    • A sensing component that posts a task when it handles an ADC.dataReady event
      • +
    • An application component that sends a packet and then sets its ADC sampling rate too high
      • +
    +
    +

    In this scenario, the sensing component will start handling events at +a faster rate than it can process them. It will start posting tasks to +handle the data it receives, until it fills the task queue. At some +point later, the radio finishes sending a packet and signals its +interrupt. The networking component, however, is unable to post its +task that signals SendMsg.sendDone(), losing the event. The +application component does not try to send another packet until it +knows the one it is sending completes (so it can re-use the +buffer). As the sendDone() event was lost, this does not occur, +and the application stops sending network traffic.

    +

    The solution to this particular problem in TinyOS 1.x is to signal +sendDone() in the radio send complete interrupt if the post fails: +this violates the sync/async boundary, but the justification is that +a possible rare race condition is better than certain failure. +Another solution would be to use an interrupt source to periodically +retry posting the task; while this does not break the sync/async +boundary, until the post succeeds the system cannot send packets. +The TinyOS 1.x model prevents it from doing any better.

    +
    +
    +

    3. Tasks in TinyOS 2.x

    +

    The semantics of tasks in TinyOS 2.x are different than those in 1.x. +This change is based on experiences with the limitations and run time +errors that the 1.x model introduces. In TinyOS 2.x, a basic post will +only fail if and only if the task has already been posted and has not +started execution. A task can always run, but can only have one +outstanding post at any time.

    +

    2.x achieves these semantics by allocating one +byte of state per task (the assumption is that there will be fewer than 255 +tasks in the system). While a very large number of tasks could make +this overhead noticable, it is not significant in practice. +If a component needs to post a task several times, then the end of +the task logic can repost itself as need be.

    +

    For example, one can do this:

    +
    +post processTask();
+...
+task void processTask() {
+  // do work
+  if (moreToProcess) {
+    post processTask();
+  }
+}
+
    +

    These semantics prevent several problems, such as the inability to +signal completion of split-phase events because the task queue is +full, task queue overflow at initialization, and unfair task +allocation by components that post a task many times.

    +

    TinyOS 2.x takes the position that the basic use case of tasks should +remain simple and easy to use, but that it should be possible to +introduce new kinds of tasks beyond the basic use case. TinyOS +achieves this by keeping post and task for the basic case, +and introducing task interfaces for additional ones.

    +

    Task interfaces allow users to extend the syntax and semantics of +tasks. Generally, a task interface has an async command, post , +and an event, run. The exact signature of these functions are +up to the interface. For example, a task interface that allows a task +to take an integer parameter could look like this:

    +
    +interface TaskParameter {
+  async error_t command postTask(uint16_t param);
+  event void runTask(uint16_t param);
+}
+
    +

    Using this task interface, a component could post a task with a +uint16_t parameter. When the scheduler runs the task, it will +signal the runTask event with the passed parameter, which contains +the task's logic. Note, however, that this does not save any RAM: if +anything, it will cost RAM as space must be allocated in the scheduler +and may then also be allocated in the component. Furthermore, as +there can only be one copy of a task outstanding at any time, it +is just as simple to store the variable in the component. E.g., +rather than:

    +
    +call TaskParameter.postTask(34);
+...
+event void TaskParameter.runTask(uint16_t param) {
+  ...
+}
+
    +

    one can:

    +
    +uint16_t param;
+...
+  param = 34;
+  post parameterTask();
+...
+task void parameterTask() {
+  // use param
+}
+
    +

    The principal difference between the simplest code for these +two models is that if the component posts the task twice, it +will use the older parameter in the TaskParameter example, +while it will use the newer parameter in the basic task example. +If a component wants to use the oldest parameter, then it can do +this:

    +
    +if (post myTask() == SUCCESS) {
+  param = 34;
+}
+
    +
    +
    +

    4. The Scheduler in TinyOS 2.x

    +

    In TinyOS 2.x, the scheduler is a TinyOS component. Every scheduler +MUST support nesC tasks. It MAY also support any number of +additional task interfaces. The scheduler component is resonsible for +the policy of reconciling different task types (e.g., earliest +deadline first tasks vs. priority tasks).

    +

    The basic task in TinyOS 2.x is parameterless and FIFO. Tasks continue +to follow the nesC semantics of task and post, which are linguistic +shortcuts for declaring an interface and wiring it to the +scheduler component. Appendix A describes how these shortcuts can be +configured. A scheduler provides a task interface as a parameterized +interface. Every task that wires to the interface uses the unique() +function to obtain a unique identifier, which the scheduler uses to +dispatch tasks.

    +

    For example, the standard TinyOS scheduler has this signature:

    +
    +module SchedulerBasicP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  uses interface McuSleep;
+}
+
    +

    A scheduler MUST provide a parameterized TaskBasic interface. +If a call to TaskBasic.postTask() returns SUCCESS, the scheduler MUST run it +eventually. The scheduler MUST return SUCCESS to a TaskBasic.postTask() +operation unless it is not the first call to TaskBasic.postTask() since +that task's TaskBasic.runTask() event has been signaled. The +McuSleep interface is used for microcontroller power management; +its workings are explained in TEP 112 [3].

    +

    A scheduler MUST provide the Scheduler interface. +The Scheduler interface has commands for initialization and running +tasks, and is used by TinyOS to execute tasks:

    +
    +interface Scheduler {
+  command void init();
+  command bool runNextTask(bool sleep);
+  command void taskLoop();
+}
+
    +

    The init() command initializes the task queue and scheduler data +structures. runNextTask() MUST run to completion whatever task the +scheduler's policy decides is the next one: the return value indicates +whether it ran a task. The bool parameter sleep indicates what the +scheduler should do if there are no tasks to execute. If sleep is +FALSE, then the command will return immediately with FALSE as a return +value. If sleep is TRUE, then the command MUST NOT return until a task +is executed, and SHOULD put the CPU to sleep until a new task arrives. +Calls of runNextTask(FALSE) may return TRUE or FALSE; calls of +runNextTask(TRUE) always return TRUE. The taskLoop() command tells +the scheduler to enter an infinite task-running loop, putting the MCU +into a low power state when the processor is idle: it never returns.

    +

    This is the TaskBasic interface:

    +
    +interface TaskBasic {
+  async command error_t postTask();
+  void event runTask();
+}
+
    +

    When a component declares a task with the task keyword in nesC, it +is implicitly declaring that it uses an instance of the TaskBasic +interface: the task body is the runTask event. When a component uses the +post keyword, it calls the postTask command. Each TaskBasic MUST be +wired to the scheduler with a unique identifier as its parameter. +The parameter MUST be obtained with the unique function in nesC, +with a key of "TinySchedulerC.TaskBasic". The nesC compiler +automatically does this wiring when the task and post +keywords are used.

    +

    The SchedulerBasicP implementation uses these identifiers as its queue +entries. When TinyOS tells the scheduler to run a task, it pulls the +next identifier off the queue and uses it to dispatch on the +parameterized TaskBasic interface.

    +
    +
    +

    5. Replacing the Scheduler

    +

    The TinyOS scheduler is presented as a component named TinySchedulerC. +The default TinyOS scheduler implementation is a module named +SchedulerBasicP; the default scheduler component is a configuration +that provides wire-through of SchedulerBasicP.

    +

    To replace the scheduler for a particular application, a developer +SHOULD put a configuration named TinySchedulerC in the application +directory: this will replace the default. The scheduler component +provides a wire-through of the desired scheduler implementation. All +scheduler implementations SHOULD provide a parameterize TaskBasic +interface, as SchedulerBasicP does; this supports nesC post statements +and task declarations. If a scheduler does not provide the TaskBasic +interface, compiling applications requires modifying the standard +ncc scheduler parameters (as described in Appendix A). All scheduler +implementations MUST provide the Scheduler interface.

    +

    For example, imagine a hypothetical scheduler that provides earliest +deadline first tasks, which are provided through the TaskEdf +interface:

    +
    +interface TaskEdf {
+  async command error_t postTask(uint16_t deadlineMs);
+  event void runTask();
+}
+
    +

    The scheduler implementation is named SchedulerEdfP, and provides both +TaskBasic and TaskEdf interfaces:

    +
    +module SchedulerEdfP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskEdf[uint8_t taskID];
+}
+
    +

    An application that wants to use SchedulerEdfP instead of +SchedulerBasicP includes a configuration named TinySchedulerC, which +exports all of SchedulerEdfP's interfaces:

    +
    +configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskEdf[uint8_t taskID];
+}
+implementation {
+  components SchedulerEdfP;
+  Scheduler = SchedulerEdf;
+  TaskBasic = SchedulerEdfP;
+  TaskEDF   = SchedulerEdfP;
+}
+
    +

    For a module to have an earliest deadline first task, it uses the +TaskEdf interface. Its configuration SHOULD wire it to TinySchedulerC. +The key used for task unique identifiers MUST be "TinySchedulerC.TaskInterface", +where TaskInterface is the name of the new task interface as presented +by the scheduler. For example, the module SomethingP requires two EDF +tasks:

    +
    +configuration SomethingC {
+  ...
+}
+implementation {
+  components SomethingP, TinySchedulerC;
+  SomethingP.SendTask -> TinySchedulerC.TaskEdf["TinySchedulerC.TaskEdf"];
+  SomethingP.SenseTask -> TinySchedulerC.TaskEdf["TinySchedulerC.TaskEdf"];
+}
+
    +

    The module SomethingP also has a basic task. The nesC compiler +automatically transforms task keywords into BasicTask interfaces and +wires them appropriately. Therefore, for basic tasks, a component +author can either use the task and post keywords or use a TaskBasic +interface. A component SHOULD use the keywords whenever possible, and it +MUST NOT mix the two syntaxes for a given task. This is an example +implementation of SomethingP that uses keywords for basic tasks:

    +
    +module SomethingP {
+  uses interface TaskEdf as SendTask
+  uses interface TaskEdf as SenseTask
+}
+implementation {
+  // The TaskBasic, written with keywords
+  task void cleanupTask() { ... some logic ... }
+  event void SendTask.runTask() { ... some logic ... }
+  event void SenseTask.runTask() { ... some logic ... }
+
+  void internal_function() {
+    call SenseTask.postTask(20);
+    call SendTask.postTask(100);
+    post cleanupTask();
+  }
+}
+
    +

    If the scheduler provides two instances of the same task interface, +their unique keys are based on the name of the interface as the +scheduler presents it (the "as" keyword). For example, imagine +a scheduler which provides two instances of TaskBasic: standard +tasks and high-priority tasks. The scheduler always selects a task +for the high priority queue before the standard queue:

    +
    +configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskBasic[uint8_t taskID] as TaskHighPriority;
+}
+
    +

    A component that uses a high priority task would then wire to +TaskHighPriority with the key "TinySchedulerC.TaskHighPriority":

    +
    +configuration SomethingElseC {}
+implementation {
+  components TinySchedulerC as Sched, SomethingElseP;
+  SomethingElseP.RetransmitTask -> Sched.TaskHighPriority[unique("TinySchedulerC.TaskHighPriority")];
+}
+
    +
    +
    +

    6. Implementation

    +

    The following files in tinyos-2.x/tos/system contain the reference +implementations of the scheduler:

    +
    +
      +
    • SchedulerBasicP.nc is the basic TinyOS scheduler, providing +a parameterized TaskBasic interface.
      • +
    • TinySchedulerC.nc is the default scheduler configuration +that wires SchedulerBasicP to McuSleepC [3].
      • +
    +
    +

    A prototype of a scheduler that supports EDF tasks can be obtained +at the URL http://csl.stanford.edu/~pal/tinyos/edf-sched.tgz.

    +
    +
    +

    7. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates Hall
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +

    +
    Cory Sharp
    +
    410 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    email - cssharp@eecs.berkeley.edu
    +
    +
    +
    +

    8. Citations

    + + + + + +
    [1]Erik Cota-Robles and James P. Held. "A Comparison of Windows +Driver Model Latency Performance on Windows NT and Windows 98." In +Proceedings of the Third Symposium on Operating System Design +and Implementation (OSDI).
    + + + + + +
    [2]David Gay, Philip Levis, Rob von Behren, Matt Welsh, Eric Brewer +and David Culler. "The nesC Language: A Holistic Approach to Networked +Embedded Systems." In Proceedings of the ACM SIGPLAN 2003 Conference on +Programming Language Design and Implementation (PLDI).
    + + + + + +
    [3](1, 2) TEP 112: Microcontroller Power Management.
    +
    +
    +

    Appendix A: Changing the Scheduler

    +

    The nesC compiler transforms the post and task keywords into +nesC interfaces, wirings, and calls. By default, the statement:

    +
    +module a {
+  ...
+}
+implementation {
+  task x() {
+    ...
+    post x();
+  }
+
+}
+
    +

    is effectively:

    +
    +module a {
+  ...
+  provides interface TaskBasic as x;
+}
+implementation {
+  event void x.runTask() {
+    ...
+    call x.postTask();
+  }
+}
+
    +

    Specifically, TinyOS maps a task with name T to a TaskBasic +interface with name T. Posting T is a call to T.postTask(), and +the task body is T.runTask(). Finally, T is automatically wired to +TinySchedulerC with a unique() call.

    +

    While the fact that tasks are transformed into interfaces is built in +to the nesC compiler, the exact names can be configured. Each +platform's .platform file passes the -fnesc-scheduler option +to the compiler. The standard option is:

    +
    +-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
    +

    There are 6 strings passed. They are:

    +
    +
      +
    1. The name of the scheduler component to wire the interface +to (TinySchedulerC).
      2. +
    2. The unique string used when wiring to the scheduler component's +parameterized interface (TinySchedulerC.TaskBasic).
      3. +
    3. The name of the interface on the scheduler component (TaskBasic).
      4. +
    4. The name of the interface type (TaskBasic).
      5. +
    5. The name of the event for running the task (runTask).
      6. +
    6. The name of the command for posting the task (postTask).
      7. +
    +
    +

    The nescc man page has further details.

    +
    +
    + + diff --git a/doc/html/tep107.html b/doc/html/tep107.html new file mode 100644 index 00000000..5c9f4e36 --- /dev/null +++ b/doc/html/tep107.html @@ -0,0 +1,636 @@ + + + + + + +TinyOS 2.x Boot Sequence + + + + +
    +

    TinyOS 2.x Boot Sequence

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:107
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis
    Draft-Created:10-Dec-2004
    Draft-Version:1.1.2.11
    Draft-Modified:2006-06-13
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents the structure and implementation of the mote +boot sequence in TinyOS 2.x.

    +
    +
    +

    1. Introduction

    +

    TinyOS has a set of calling conventions and semantics in its boot +sequence. Earlier versions of TinyOS used an interface named +"StdControl" to take care of system initialization and starting +required software systems. Experience with several hardware platforms +showed StdControl to be insufficient, as it provided only a +synchronous interface. Additionally, StdControl bundled the notion of +initialization, which happens only at boot, with power management and +service control. TinyOS 2.x solves these problems by separating what +was once StdControl into three separate interfaces: one for +initialization, one for starting and stopping components, and one for +notification that the mote has booted. This memo describes the TinyOS +boot sequence and reasons for its semantics.

    +
    +
    +

    2. TinyOS 1.x Boot Sequence

    +

    The TinyOS 1.x boot sequence is uniform across most mote platforms +(TOSSIM has a very different boot sequence, as it is a PC +program). The module RealMain implements main(), and has the following +signature:

    +
    +module RealMain {
+  uses {
+    command result_t hardwareInit();
+    interface StdControl;
+    interface Pot;
+  }
+}
+
    +

    The mote main() function uses a mix of nesC and C:

    +
    +int main() __attribute__ ((C, spontaneous)) {
+  call hardwareInit();
+  call Pot.init(10);
+  TOSH_sched_init();
+
+  call StdControl.init();
+  call StdControl.start();
+  __nesc_enable_interrupt();
+
+  while(1) {
+    TOSH_run_task();
+  }
+}
+
    +

    Several problems exist. Some of these calls are artifacts of old +platforms: the Pot component refers to the mica variable potentiometer +for controlling radio transmission power, and for other platforms is a +stub component Some of the calls -- TOSH_sched_init and TOSH_run_task +-- are C functions that are implemented in other, automatically +included files. Separation from the nesC component model makes +changing what lies behind these functions more difficult than normal +in TinyOS.

    +

    More importantly, the initialization sequence has several +limitations. The component HPLInit implements the hardwareInit command +(wired by the component Main): hardware initialization may not be part +of a pure HPL layer. The scheduler is initialized after hardware, +which means that no hardware initialization can post a task if it +needs one. The StdControl interface combines component initialization +(init()) and activation (start()/stop()); if a component needs to be +initialized by RealMain, it must also be started. Separating these two +leads to more flexible power management, and distinguishes required +low-level components that must always be running (such as a Timer) +from high level components that can be power managed (such as an +application). Finally, some components that need to often need to be +started by main, such as a radio, do not follow a synchronous +start/stop model. In this case, some components can't operate properly +until the radio starts, but main has no mechanism for waiting for the +radio start completion event.

    +
    +
    +

    3. TinyOS 2.x Boot Interfaces

    +

    The TinyOS 2.x boot sequence uses three interfaces:

    +
    +
      +
    • Init, for initializing component/hardware state
      • +
    • Scheduler, for initializing and running tasks
      • +
    • Boot, for signalling that the system has successfully booted
      • +
    +
    +

    The Init interface has a single command, init():

    +
    +interface Init {
+  command error_t init();
+}
+
    +

    Init provides a synchronous interface, enabling initialization +ordering. Unlike normal execution, in which operations from a wide +range of components need to be interleaved effectively, initialization +is a sequential, synchronous operation: no component can be started +until initialization is complete. If a particular component's +initialization requires waiting for interrupts or other asynchronous +events, then it must explicitly wait for them (e.g., +with a spin loop), MUST NOT return until complete. Otherwise the system +may start before initialization is complete.

    +

    The Scheduler interface is for initializing and controlling task +execution. It is detailed in TEP 106 [1].

    +

    The Boot interface has a single event, booted(), which the boot +sequence signals when it has completed:

    +
    +interface Boot {
+  event void booted();
+}
+
    +
    +
    +

    4. TinyOS 2.x Boot Sequence

    +

    The module RealMainP implements the standard TinyOS 2.x boot sequence. +The configuration MainC wires some of RealMainP's interfaces to +components that implement standard abstractions and exports the others +that are application specific. Code above the Hardware Independent +Layer (TEP 2) SHOULD wire to MainC and not RealMainP:

    +
    +module RealMainP {
+  provides interface Booted;
+  uses {
+    interface Scheduler;
+    interface Init as PlatformInit;
+    interface Init as SoftwareInit;
+  }
+}
+implementation {
+  int main() __attribute__ ((C, spontaneous)) {
+    atomic {
+      call Scheduler.init();
+      call PlatformInit.init();
+      while (call Scheduler.runNextTask());
+      call SoftwareInit.init();
+      while (call Scheduler.runNextTask());
+    }
+    __nesc_enable_interrupt();
+    signal Boot.booted();
+    call Scheduler.taskLoop();
+    return -1;
+  }
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
    +
    +

    4.1 Initialization

    +

    The first step in the boot sequence is initializing the system:

    +
    +atomic {
+  call Scheduler.init();
+  call PlatformInit.init();
+  while (call Scheduler.runNextTask());
+  call SoftwareInit.init();
+  while (call Scheduler.runNextTask());
+}
+
    +

    The boot sequence has three separate initializations: Scheduler, +PlatformInit, and SoftwareInit. The boot configuration (MainC) wires +the first two automatically, to TinySchedulerC (discussed in TEP 106) +and to PlatformC:

    +
    +configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+
+  RealMainP.Scheduler -> TinySchedulerC;
+  RealMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = RealMainP;
+}
+
    +

    MainC exports the Boot and SoftwareInit interfaces for applications to +wire to. TinySchedulerC is the standard name for the TinyOS +scheduler. As the initialization sequence requires being able to run +tasks, the boot sequence initializes it first. The second step of +initialization is to call PlatformInit.init(), which MainC wires to a +component named PlatformC. PlatformInit is for initializations which +must follow a very specific order due to hidden dependencies, e.g., as +part of making the overall hardware platform operable. One example of +this sort of initialization is clock calibration. Because PlatformInit +calls the component PlatformC, each platform can specify the required +initialization order. As these hidden dependencies must be due to +hardware, the sequence is platform-specific. A port of TinyOS to a +new plaform MUST include a component PlatformC which provides +one and only one instance of the Init interface.

    +

    Components whose initialization does not directly depend on hardware +resources SHOULD wire to MainC.SoftwareInit. If a component requires a +specific initialization ordering, then it is responsible for +establishing that ordering. Due to the semantics of Init, this is +usually quite rare; a component SHOULD NOT introduce initialization +dependencies unless they are required.

    +

    One common approach is for a configuration to "auto-wire" the +initialization routines of its internal components. The configuration +does not provide an Init interface. Virtualized services (TEP 108) +often take this approach, as the service, rather than the clients, is +what needs to be initialized. For example, the standard Timer +virtualization (TEP 102), TimerMilliC, wires to TimerMilliP, which is +a very simple configuration that takes the underlying implementation +(HilTimerMilliC) and wires it to MainC:

    +
    +configuration TimerMilliP {
+  provides interface Timer<TMilli> as TimerMilli[uint8_t id];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -> HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+
    +

    Rather than require an application to wire HilTimerMilliC to MainC, +TimerMilliP does it automatically. When a component instantiates a +TimerMilliC, that names TimerMilliP, which will automatically make +sure that the timer system is initialized when TinyOS boots.

    +
    +
    +

    4.2 Interrupts in Initialization

    +

    Interrupts are not enabled until all calls to Init.init have returned. +If a component's initialization needs to handle interrupts, it can +do one of three things:

    +
    +
      +
    1. If a status flag for the interrupt exists, the Init.init() +implementations SHOULD use a spin loop to test for when +an interrupt has been issued.
      2. +
    2. If no such flag exists, the Init.init() implementation MAY +temporarily enable interrupts, if doing so will not cause any other +components to handle an interrupt. That is, if a component enables +an interrupt, it MUST NOT enable interrupts whose handlers would +invoke any other component. Furthermore, when Init.init() exits, +the interrupts must be disabled.
      3. +
    3. If no such flag exists and there is no way to isolate which +interrupt handlers are called, then the component MUST rely +on mechanisms outside the Init sequence, such as SplitControl.
      4. +
    +
    +

    The boot sequence assumes that 1) is by far the dominant case. There +are, however, possible situations where a component might need to +handle an interrupt because of, e.g., hardware limitations (no pending +flag) or to catch a brief edge transition. In these cases, a component +can handle an interrupt in the boot sequence only if doing so will not +cause any other component to handle an interrupt. As they have all +been written assuming that interrupts are not enabled until after Init +completes, making one of them handle an interrupt could cause it to +fail.

    +

    Depending on what capabilities the hardware provides, there are +several ways to meet these requirements. The simplest is to push these +initialization edge cases out of the main boot sequence, e.g., into +SplitControl. A second possibility is to redirect the interrupt table, +if the MCU supports doing so. Whichever mechanism is chosen, extreme +care needs to be used in order to not disrupt the operation of other +components.

    +

    Unless part of a hardware abstraction architecture (HAA) [2], the +Init.init() command MUST NOT assume that other components have been +initialized unless it has initialized them, and MUST NOT call any +functional interfaces on any components that might be shared. An HAA +component MAY make other calls to initialize hardware state. A +component that is not part of an HAA SHOULD NOT call Init.init() on +other components unless it needs to enforce a temporal ordering on +initialization.

    +

    If a component A depends on another component, B, +which needs to be initialized, then A SHOULD wire B's Init directly +to the boot sequence, unless there is a temporal ordering requirement to +the initialization. The purpose of this convention is to simplify +component initialization and the initialization sequence.

    +
    +
    +
    +

    5. Implementation

    +

    The following files in tinyos-2.x/tos/system contain the reference +implementations of the TinyOS boot sequence:

    +
    +
      +
    • RealMainP.nc is the module containing the function main.
      • +
    • MainC.nc is the configuration that wires RealMainP to +PlatformC and TinySchedulerC [1].
      • +
    +
    +
    +
    +

    6. Author's Address

    +
    +
    Philip Levis
    +
    467 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    phone - +1 510 290 5283
    +

    +
    email - pal@cs.berkeley.edu
    +
    +
    +
    +

    7. Citations

    + + + + + +
    [1](1, 2) TEP 106: Schedulers and Tasks.
    + + + + + +
    [2]TEP 2: Hardware Abstraction Architecture.
    +
    +
    + + diff --git a/doc/html/tep108.html b/doc/html/tep108.html new file mode 100644 index 00000000..795f1ca0 --- /dev/null +++ b/doc/html/tep108.html @@ -0,0 +1,819 @@ + + + + + + +Resource Arbitration + + + + +
    +

    Resource Arbitration

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:108
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Authors:Kevin Klues +
    Philip Levis +
    David Gay +
    David Culler +
    Vlado Handziski
    Draft-Created:28-Mar-2005
    Draft-Version:1.1.2.9
    Draft-Modified:2006-06-21
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents the general resource sharing mechanisms for TinyOS +2.x. These mechanisms are used to allow multiple software components to +arbitrate access to shared abstractions.

    +
    +
    +

    1. Introduction

    +

    TinyOS 1.x has two mechanisms for managing shared resources: +virtualization and completion events. A virtualized resource appears +as an independent instance of an abstraction, such as the Timer +interface is TimerC. A client of a Timer instance can use it +independently of the others: TimerC virtualizes the underlying +hardware clock into N separate timers.

    +

    Some abstractions, however, are not well suited to virtualization: +programs need the control provided by a physical abstraction. For +example, components in 1.x share a single communication stack, +GenericComm. GenericComm can only handle one outgoing packet at a +time. If a component tries to send a packet when GenericComm is +already busy, then the call returns FAIL. Therefore, shared use of +GenericComm follows a first-come, first-served arbitration policy. If +a component sends a packet but GenericComm is busy, the component +needs a way to tell when GenericComm is free so it can retry. TinyOS +1.x provides the mechanism of a global completion event which is +signalled whenever a packet send completes. Interested components can +handle this event and retry.

    +

    The approach to physical (rather than virtualized) abstractions +has several drawbacks:

    +
      +
    • If you need to make several requests, you have to handle the +possibility of a request returning FAIL at any point. This complicates +implementations by adding internal states.
      • +
    • You have no control over the timing of a sequence of operations. One +example of when this can be a problem is timing-sensitive use of an +A/D converter.
      • +
    • If a hardware resource supports reservation, you cannot express this +via this software interface. For instance, I2C buses have a +concept of "repeated start" when doing multiple bus transactions, +but it is not clear how to use this in TinyOS 1.x's I2C abstraction.
      • +
    • Most TinyOS 1.x services do not provide a very convenient way of +monitoring an abstractions's availability for the purpose of retries, +nor very clear documentation of which requests could happen simultaneously.
      • +
    +

    A single approach to resource sharing is not appropriate for all +circumstances. For instance, requiring resource reservation allows +programs to have better timing guarantees for access to an A/D converter. +But if a program does not need precise timing guarantees (e.g., when measuring +temperature in a biological monitoring application), this extra resource +reservation step unnecessarily complicates code.

    +
    +
    +

    2. Resource Classes

    +

    TinyOS 2.x distinguishes between three kinds of abstractions: +dedicated, shared, and virtualized. +Components offer resource sharing mechanisms appropriate to their +goals and level of abstraction. As discussed in Section 2.1, access +control to dedicated abstractions is generally handled +through nesC interfaces. As discussed in Section 2.2, access control +to virtualized abstractions is handled through software design +patterns such as the Service Instance [3] and/or +queueing. Section 2.3 addresses with the most complex class of +abstraction, shared, while Section 3 describes the +components and interfaces used to arbitrate access to this class.

    +

    Hardware Presentation Layer (HPL) components of the HAA [1] are not +virtual, as virtualization inevitably requires state. Depending on their +expected use, HPL abstractions are either dedicated or +shared. For example, while hardware timers are rarely +multiplexed between multiple components, buses almost always are. +For example, on the MSP430 microcontroller, compare and counter registers are +dedicated, while the USARTs are shared.

    +
    +

    2.1 Dedicated

    +

    An abstraction is dedicated if it is a resource +which a subsystem needs exclusive access to at all times. Examples of +dedicated abstractions include interrupts and counters. +Generally, a physical and dedicated abstraction is just an interface +which its user wires to. For example, on the Atmega128, Timer 2 is +presented by the component HplAtm128Timer2C:

    +
    +module HplAtm128Timer2C {
+  provides {
+    interface HplTimer<uint8_t>   as Timer2;
+    interface HplTimerCtrl8       as Timer2Ctrl;
+    interface HplCompare<uint8_t> as Compare2;
+  }
+}
+
    +

    Dedicated abstractions MAY be annotated with the nesC attribute +@atmostonce or @exactlyonce is to provide compile-time checks that +their usage assumptions are not violated.

    +
    +
    +

    2.2 Virtual

    +

    Virtual abstractions hide multiple clients from each other +through software virtualization. Every client of the resource thinks it +has its own independent instance of the resource, but these virtualized +instances are multiplexed on top of a single underlying resource. Because +the virtualization is in software, there is no upper bound on the number +of clients of the abstraction, barring memory or efficiency constraints. +For example, the TimerMilliC component provides a virtual and shared +abstraction of millisecond precision timers to application +components [2]. As virtualization usually requires keeping state +that scales with the number of virtualized instances, +virtualized resources often use the Service Instance pattern [3], +which is based on a parameterized interface. For example, HilTimerMilliC +provides multiple virtualized timer clients and auto-wires the +chip timer implementation (HilTimerMilliC [2]) to the boot initialization +sequence:

    +
    +configuration TimerMilliP {
+  provides interface Timer<TMilli> as TimerMilli[uint8_t num];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -> HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+
    +

    while TimerMilliC encapsulates this in a generic configuration:

    +
    +generic configuration TimerMilliC {
+  provides interface Timer<TMilli>;
+}
+implementation {
+  components HilTimerMilliC;
+  Timer = HilTimerMilliC.Timer[unique(UQ_TIMER_MILLI)];
+}
+
    +

    Virtualization generally allows a client to use a very simple interface. +This simplicity comes at a cost of reduced efficiency and an inability to +precisely control the underlying resource. For example, TimerMilli32C +introduces CPU overhead from dispatching and maintaining all of the +virtual timers as well as jitter from when two timers want to fire at +the same time.

    +
    +
    +

    2.3 Shared

    +

    Dedicated abstractions are useful when a resource is +always controlled by a single component. Virtualized abstractions are +useful when clients are willing to pay a bit of overhead and sacrifice +control in order to share a resource in a simple way. There are +situations, however, when many clients need precise control of a +resource. Clearly, they can't all have such control at the same time: +some degree of multiplexing is needed.

    +

    In TinyOS 2.x, a resource arbiter is responsible for this +multiplexing. The arbiter determines which client has access to the +resource. While a client holds a resource, it has complete and +unfettered control. Arbiters assume that clients are cooperative, only +acquiring the resource when needed and holding on to it no longer than +necessary. Clients explicitly release resources: there is no way for +an arbiter to forcibly reclaim it.

    +

    A motivating example of a shared resource is a bus. +The bus may have multiple peripherals on it, corresponding to +different subsystems. For example, on the Telos platform the flash +chip (storage) and the radio (network) share a bus. The storage and +network stacks need exclusive access to the bus when using it, +but they also need to share it with the other subsystem. In this +case, virtualization is problematic, as the radio stack needs to be +able to perform a series of operations in quick succession without +having to reacquire the bus in each case. Having the bus be a +physical but shared resource allows the radio stack to +send a series of operations atomically across to the radio without +having to buffer them all up in memory beforehand (which would +introduce memory pressure).

    +
    +
    +
    +

    3. Resource Arbiters

    +

    Every shared resource has an arbiter to manage which client +can use the resource at any given time. Because an arbiter is a +centralized place that knows whether the resource is in use, it also +provides information useful for a variety of other services, such as +power management. An arbiter MUST provide a parameterized Resource +interface as well as an instance of the ArbiterInfo interface. An +arbiter SHOULD also provide an instance of ResourceController and +ResourceConfigure interfaces. An arbiter MAY provide additional +interfaces or instance of interfaces in order to provide a particular +arbitration policy.

    +
    +

    3.1 Resource

    +

    Clients of a shared resource arbiter request access +with the Resource interface:

    +
    +interface Resource {
+  async command error_t request();
+  async command error_t immediateRequest();
+  event void granted();
+  async command void release();
+}
+
    +

    A client lets an arbiter know it needs access to the resource with +a call to request(). The arbiter signals the granted() event to a +client when it gains exclusive access to the resource. A client +can also acquire the resource with immediateRequest(). The +return value of this call determines whether the client was able +to acquire the resource. If immmediateRequest() does not successfully +acquire the resource (does not return SUCCESS), then it can try to do +so in the standard, +split-phase way with request(). If the call to immediateRequest() +returns SUCCESS, then the arbiter MUST NOT issue a granted() event.

    +

    An arbiter MUST provide a parameterized Resource interface, +where the parameter is a client ID, following the Service +Instance pattern [3]. An arbitrated component SomeNameC MUST +#define SOME_NAME_RESOURCE to a string which can be passed to unique() +to obtain a client id. For instance, an I2C bus might look like this:

    +
    +includes I2CPacketC;
+configuration I2CPacketC {
+  provides {
+    interface Resource[uint8_t id];
+    interface I2CPacket[uint8_t busId];
+  }
+} ...
+
    +

    where I2CPacketC.h contains the #define for the resource:

    +
    +#ifndef I2CPACKETC_H
+#define I2CPACKETC_H
+#define I2CPACKET_RESOURCE "I2CPacket.Resource"
+#endif
+
    +

    The #define for the unique string must be placed in a separate file +because of the way nesC files are preprocessed: referring to I2CPacketC +isn't enough to ensure that macros #define'd in I2CPacketC are visible +in the referring component.

    +

    For example, clients of the I2C service might use it as follows:

    +
    +module I2CUserM {
+  uses interface Resource as I2CResource;
+  uses interface I2CPacket;
+} ...
+
+#include <I2CPacketC.h>
+configuration I2CUserC { }
+implementation {
+  components I2CUserM, I2CPacketC;
+
+  I2CUserM.I2CResource -> I2CPacketC.Resource[unique(I2C_RESOURCE)];
+  I2CUserM.I2CPacket -> I2CPacket.I2CPacket[0x73]; // using I2C device 0x73
+}
+
    +
    +
    +

    3.2 ResourceController

    +

    An arbiter SHOULD provide one instance of the ResourceController +interface and MAY provide more than one. The Resource interface is for +simple and basic use cases, where clients are peers that share the +resource in some equal fashion. ResourceController is for clients that +require additional information due to the policies of the arbiter and +how they use the resource. The ResourceController interface is based +on Resource, but introduces two additional events, idle() and +requested():

    +
    +interface ResourceController {
+  async command error_t request();
+  async command error_t immediateRequest();
+  event void granted();
+  async command void release();
+  async event void requested();
+  async event void idle();
+}
+
    +

    An arbiter signals the requested event if the client currently has the resource +and some other client has requested it. It signals the idle() event when +no client holds the resource.

    +

    ResourceController allows an arbiter to provide a much richer set of +policies than simple sharing. For example, arbiters that want to +incorporate a power management policy can provide ResourceController +for a power management component. The power management component can +detect when nobody is using the resource with idle(), acquire it +atomically with immediateRequest(), and power it down. When another +client requests the resource, the power manager will handle the +requested() event. It can then power up the resource and release it +when the power up completes. Note that if power up is a split-phase +operation (takes a while), then calls by clients to immediateRequest() +when in powered down state will not return SUCCESS. See TEP 115 for +details. The default arbiters in TinyOS 2.x (see Section 4) all provide a +single instance of ResourceController, in order to enable power +management as described above.

    +

    ResourceController can also be used for special case clients: the +algorithm used to determine when its requests are handled in +comparison to instances of Resource is arbiter specific. Therefore, +arbiters MAY provide one or more instances of ResourceController. For +example, the FcfsPriorityArbiter has a single high-priority client who +is always granted access to the resource before any other client. +Other clients only obtain the resource if the high-priority client has +not requested it or when the high-priority client releases it.

    +
    +
    +

    3.3 ArbiterInfo

    +

    Arbiters MUST provide an instance of the ArbiterInfo interface. +The ArbiterInfo interface allows a component to query the current +status of an arbiter:

    +
    +interface ArbiterInfo {
+  async command bool inUse();
+  async command uint8_t userId();
+}
+
    +

    The ArbiterInfo interface has a variety of uses. For example, the resource +implementation can use it to refuse requests from clients that do not +currently have access. In this case, the abstraction would need to provide +a parameterized interface for its operations so it could distinguish separate +clients, and the client ID for its operations would need to be the same +as the client ID for the arbiter.

    +
    +
    +

    3.4 ResourceConfigure

    +

    The ResourceConfigure interface provides a mechanism for clients that need +to use a resource with different configurations. Rather than forcing a +client to reconfigure the resource itself, the component representing a +client can wire to an arbiter's ResourceConfigure interface, which is called +before the client is granted the resource.

    +

    For example, the MSP430 USART0 bus can operate in three modes: SPI, I2C, and +UART. Using all three concurrently is problematic: only one should be enabled +at a time. However, different clients of the bus might need different bus +protocols. For example, Telos sensors use an I2C, while the radio and flash +chip use SPI.

    +

    Arbiters MAY use a parameterized ResourceConfigure interface:

    +
    +interface ResourceConfigure {
+  async command void configure();
+  async command void unconfigure();
+}
+
    +

    The parameter is the client ID, and corresponds directly to an instance of +the Resource interface. For example:

    +
    +generic component RoundRobinArbiterC {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+  }
+}
+
    +

    If an arbiter uses the ResourceConfigure interface, before it signals the +Resource.granted() event and before it returns SUCCESS from a call to +Resource.immediateRequest(), it MUST call ResourceConfigure.configure() on +the granted client ID. Similarly, after a valid call to Resource.release(), +it MUST call ResourceConfigure.unconfigure() on the releasing client ID.

    +

    Using a parameterized interface that calls out rather than a decorator +on the Resource interface simplifies code reuse. Using a decorator +could lead to a large number of clients all including redundant +configuration code, while the call out will only have one instance +of the code. For example, an SPI client might look like this:

    +
    +generic component Msp430Spi0ClientC {
+  provides {
+    interface Resource;
+    interface SPIByte;
+    interface SPIPacket;
+  }
+}
+implementation {
+  enum {MSP430_SPI0_CLIENT = unique(MSP430_USART_RESOURCE);
+  components Msp430Usart0C, Msp430Spi0Configure as Configure;
+
+  Resource = Msp430Usart0C.Resource[MSP430_SPI0_CLIENT];
+  Msp430Usart0C.ResourceConfigure[MSP430_SPI0_CLIENT] -> Configure;
+}
+
    +

    Arbiters SHOULD provide a parameterized ResourceConfigure interface.

    +
    +
    +

    3.5 Cross-component reservation

    +

    In some cases, it is desirable to share reservation of resources +across components. For example, on the TI MSP430, the same pins can +be used as an I2C bus, a UART, or an SPI connection. Clearly, on this +chip, a reservation of the I2C bus implicitly reserves the +corresponding UART and SPI. This can be accomplished in the framework +described above by:

    +
      +
    1. using the same unique string for all three resources
      2. +
    +

    2) wiring the three parameterised Resource interfaces to the same +arbiter

    +

    The common way to do this is as follows (the UART and SPI components +are omitted, they are similar to I2CC, low-level I2C component):

    +
    +#define I2C_RESOURCE MSP_BUS_RESOURCE
+configuration I2CC {
+  provides interface Resource[uint8_t clientId];
+  provides interface I2C;
+}
+implementation {
+  components MspBusC, I2CM;
+
+  Resource = MspBusC.Resource;
+  I2C = I2CM.I2C;
+}
+
    +

    MspBusC (the arbiter for the MSP bus):

    +
    +#define MSP_BUS_RESOURCE "MspBus.Resource"
+configuration {
+  provides interface Resource[uint8_t clientId];
+} ...
+
    +
    +
    +
    +

    4. Implementation

    +

    Because most components use one of a small number of arbitration +policies, TinyOS includes a number of default resource arbiters. These +arbiters can be found in tinyos-2.x/tos/system and are all +generic components that include this signature:

    +
    +generic module ArbiterC {
+  provides interface Resource[uint8_t id];
+  provides interface ResourceController;
+  provides interface ArbiterInfo;
+  uses interface ResourceConfigure[uint8_t id];
+}
+
    +

    For example, RoundRobinArbiterC provides round-robin arbitration. This +arbiter assigns a fixed order to all clients and grants outstanding +requests in that order, which is based on client ID. FcfsArbiterC +provides a FIFO order, where requests are serviced in the order they +are received. FcfsPriorityArbiterC is similar to FcfsArbiterC, but +provides an additional ResourceController interface for the +high-priority client.

    +
    +
    +

    5. Author's Address

    +
    +
    Kevin Klues
    +
    503 Bryan Hall
    +
    Washington University
    +
    St. Louis, MO 63130
    +

    +
    phone - +1-314-935-6355
    +
    email - klueska@cs.wustl.edu
    +

    +
    Philip Levis
    +
    358 Gates Hall
    +
    Stanford University
    +
    Stanford, CA 94305-9030
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +

    +
    David Gay
    +
    2150 Shattuck Ave, Suite 1300
    +
    Intel Research
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 495 3055
    +
    email - david.e.gay@intel.com
    +

    +
    David Culler
    +
    627 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    phone - +1 510 643 7572
    +
    email - culler@cs.berkeley.edu
    +

    +

    +
    Vlado Handziski
    +
    Sekr FT5
    +
    Einsteinufer 25
    +
    10587 Berlin
    +
    GERMANY
    +

    +
    email - handzisk@tkn.tu-berlin.de
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [1]TEP 2: Hardware Abstraction Architecture.
    + + + + + +
    [2](1, 2) TEP 102: Timers.
    + + + + + +
    [3](1, 2, 3) Service Instance Pattern. In Software Design Patterns for TinyOS. David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
    +
    +
    + + diff --git a/doc/html/tep109.html b/doc/html/tep109.html new file mode 100644 index 00000000..dad85f80 --- /dev/null +++ b/doc/html/tep109.html @@ -0,0 +1,615 @@ + + + + + + +Sensor Boards + + + + +
    +

    Sensor Boards

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:109
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:David Gay, Phil Levis, Wei Hong, and Joe Polastre
    Draft-Created:19-Apr-2005
    Draft-Version:1.1.2.1
    Draft-Modified:2005-10-31
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents how sensor boards are organized in TinyOS, and the +general principles followed by the components that provide access to +its sensors.

    +
    +
    +

    1. Introduction

    +

    This document defines the default organization of a sensor board in +TinyOS. There likely will be sensor boards that cannot conform +to this specification, but following as closely to its spirit as possible +will simplify generic applications that use a range of sensor boards.

    +

    This document assumes that sensors return uninterpreted 16-bit values, and, +optionally uninterpreted, arbitrary-size calibration data. Conversion of +sensor values to something with actual physical meaning is beyond the +scope of this document.

    +
    +
    +

    2. Directory Organization

    +
      +
    • A sensor board MUST have a unique name, composed of letters, numbers +and underscores. Case is significant, but two sensor boards MUST +differ in more than case. This is necessary to support platforms where +filename case differences are not significant. We will use SBOARD to +denote the sensor board name in the rest of this document.
      • +
    • Each sensor board MUST have its own directory named SBOARD; default TinyOS +sensor boards are placed in tinyos-2.x/tos/sensorboards, but +sensor board directories can be placed anywhere as long as the nesC compiler +receives a -I directive pointing to the sensor board's directory.
      • +
    • Each sensor board directory MUST contain a .sensor file. This file +is a perl script which contains any additional compiler settings needed for +this sensor board (this file will be empty in many cases).
      • +
    • If the sensor board wishes to define any C types or constants, it SHOULD +place these in a file named SBOARD.h in the sensor board's directory.
      • +
    • The sensor board directory SHOULD contain sensor board components +for accessing each sensor on the sensor board. The conventions for these +components are detailed in Section 3.
      • +
    • A sensor board MAY include additional components providing alternative or +higher-level interfaces to the sensors (e.g., for TinyDB). These components +are beyond the scope of this document.
      • +
    • Finally, the sensor board MAY contain any number of components, +interfaces, C files, etc for internal use. To avoid name collisions, all +externally visible names (interface types, components, C constants and +types) used for internal purposes SHOULD be prefixed with SBOARD. All such +components should end in P.
      • +
    +

    A simple example: the basic sensor board is named basicsb, it's directory +is tinyos-2.x/tos/sensorboards/basicsb. It has no basicsb.h file and +its .sensor file is empty. It has two components, PhotoC and TempC +representing its light and temperature sensors.

    +
    +
    +

    3. Sensor Board Components

    +

    We have not yet selected any naming conventions for sensor board +components. Please select reasonable namesldots

    +

    A sensor board component MUST provide:

    +
      +
    • An Init interface.
      • +
    • A StdControl or SplitControl interface for power management.
      • +
    • A non-empty set of AcquireData interfaces for sampling.
      • +
    +

    A sensor board component MAY provide:

    +
      +
    • Some CalibrationData interfaces for obtaining calibration data. +A calibration interface for a sensor accessed via interface X should +be called XCalibration.
      • +
    • Some AcquireDataNow and AcquireDataBuffered interfaces, for high-speed +or low-latency data acquisition.
      • +
    • Any other appropriate interface.
      • +
    +

    The CalibrationData interface is shown below, while AcquireData, +AcquireDataNow and AcquireDataBuffered are in TEP 101. The +AcquireData interface returns uinterpreted 16-bit data. This might +represent an A/D conversion result, a counter, etc. The optional +calibration interface returns uninterpreted, arbitrary-size data.

    +

    A sensor board component SHOULD be as lightweight as possible - it should +just provide basic access to the physical sensors and SHOULD NOT attempt to do +calibration, signal processing, etc. If such functionality is desired, it +SHOULD be provided in separate components.

    +
    +
    +
    interface CalibrationData {
    +
    +
    +
    /* Collect uninterpreted calibration data from a sensor */
    +

    +
    /** Request calibration data
    +
    +
    *  @return SUCCESS if request accepted, FAIL if it is refused
    +
    *    data error will be signaled if SUCCESS is returned
    +
    */
    +
    +
    command result_t get();
    +

    +
    +
    /** Returns calibration data
    +
    +
    * @param x Pointer to (uinterpreted) calibration data. This data
    +
    *   must not be modified.
    +
    * @param len Length of calibration data
    +
    * @return Ignored.
    +
    */
    +
    +
    event result_t data(const void *x, uint8_t len);
    +
    +
    +
    }
    +
    +

    Some common setups for sensor board components are:

    +
      +
    • A single AcquireData interface. This is probably the most common case, +where a single component corresponds to a single physical sensor, e.g., for +light, temperature, pressure and there is no expectation of high sample +rates.
      • +
    • Multiple AcquireData interfaces. Some sensors might be strongly +related, e.g., the axes of an accelerometer. A single component could then +provide a sensor interface for each axis. For instance, a 2-axis +accelerometer which can be sampled at high speed, and which has some +calibration data might be declared with:
      • +
    +
    +
    configuration Accelerometer2D {
    +
    +
    provides {
    +
    +
    interface StdControl
    +
    interface AcquireData as AccelX;
    +
    interface AcquireDataNow as AccelXSingle;
    +
    interface AcquireDataBuffered as AccelXMultiple;
    +
    interface CalibrationData as AccelXCalibration;
    +

    +
    interface AcquireData as AccelY;
    +
    interface AcquireDataNow as AccelYSingle;
    +
    interface AcquireDataBuffered as AccelYMultiple;
    +
    interface CalibrationData as AccelYCalibration;
    +
    +
    }
    +
    +
    }
    +
    +
      +
    • A parameterised AcquireData interface. If a sensor board has multiple +similar sensors, it may make sense to provide a single component to access +all of these, using a parameterised AcquireData interface. For instance, +a general purpose sensor board with multiple A/D channels might provide an +AcquireData interface parameterised by the A/D channel id.
      • +
    • In all of these examples, if high-speed sampling makes sensor for the +sensor (e.g., a microphone), and the sensor is connected in a way that +supports high-frequency and/or low-latency access (e.g., via an +on-microcontroller A/D converter), the component should offer +AcquireDataNow and AcquireDataBuffered interfaces.
      • +
    +

    Sensor board components MUST respect the following conventions +on the use of the Init, StdControl, and SplitControl +interfaces. These are given assuming StdControl is used, but the +behaviour with SplitControl is identical except that start and stop +are not considered complete until the startDone and stopDone events are +signaled. The conventions are:

    +
      +

    1. Init.init: must be called at mote boot time.

      +
      2. +
    2. +
      StdControl.start: ensure the sensor corresponding to this component is
      +

      ready for use. For instance, this should power-up the sensor if +necessary. The application can call getData once StdControl.start +completes.

      +

      If a sensor takes a while to power-up, the sensor board implementer can +either use a SplitControl interface and signal startDone +when the sensor is ready for use, or delay dataReady events +until the sensor is ready. The former choice is preferable.

      +
      +
      +
      3. +

    3. StdControl.stop: put the sensor in a low-power mode. +StdControl.start must be called before any further readings +are taken. The behaviour of calls to StdControl.stop during +sampling (i.e., when an dataReady event is going to be +signaled) is undefined.

      +
      4. +
    +
    +
    +

    .sensor File

    +

    This file is a perl script which gets executed as part of the ncc +nesC compiler frontend. It can add or modify any compile-time options +necessary for a particular sensor board. It MAY modify the following perl +variables, and MUST NOT modify any others:

    +
      +
    • @new_args: This is the array of arguments which will be +passed to nescc. For instance, you might add an include directive +to @new_args with push @new_args, -Isomedir
      • +
    • @commonboards: This can be set to a list of sensor board names which +should be added to the include path list. These sensor boards must be +in tinyos-2.x/tos/sensorboards.
      • +
    +
    +
    +

    Example: mts3x0

    +

    The mica sensor board (mts300/mts310) has five sensors (and one actuator, +the sounder) -- the accelerometer and magnetometer are only present on +the mts310:

    + ++ + + +
    +
    +
    Name | Component | Sensor Interfaces | Other Interfaces |
    +
    +

    +===============+===========+===================+==================+

    +
    +
    Accelerometer | AccelC | AccelX | |
    +
    +
    +
    | | AccelY | |
    +
    +
    +
    Magnetometer | MagC | MagX | MagSetting |
    +
    +
    +
    | | MagY | |
    +
    +
    +
    Microphone | MicC | MicADC | Mic |
    +
    +
    +
    | | | MicInterrupt |
    +
    +
    +
    Light | PhotoC | PhotoADC | |
    +
    +
    +
    Temperature | TempC | TempADC | |
    +
    + ++ + + +
    +

    Each physical sensor is represented by a separate component. Specific +sensors that have more than one axis of measurement (AccelC and MagC) +provide more than one AcquireData interface on a single component. Some +sensors, such as the magnetometer and microphone, have additional +functionality provided through sensor-specific interfaces.

    +

    Although light and temperature are represented by separate components, in +reality they share a single microcontroller pin. The two components PhotoC +and TempC sit on top of the PhotoTempP component, which controls access to +the shared pin, and orchestrates which sensor is currently connected to +it. From a programmer's perspective, they appear as individual sensors, +even though their underlying implementation is a bit more complex.

    +

    The board's mts3x0.h file contains private configuration data +(pin usage, ADC ports, etc).

    +

    The mica sensor board has an empty .sensor file.

    +
    +
    +

    6. Author's Address

    +
    +
    David Gay
    +
    2150 Shattuck Ave, Suite 1300
    +
    Intel Research
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 495 3055
    +

    +
    email - david.e.gay@intel.com
    +

    +
    Wei Hong
    +
    Arched Rock
    +
    Berkeley, CA 94704
    +

    +
    email - wei.hong@gmail.com
    +

    +
    Philip Levis
    +
    358 Gates Hall
    +
    Computer Science Department
    +
    353 Serra Mall
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +

    +
    email - pal@cs.stanford.edu
    +

    +
    Joe Polastre
    +
    467 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    email - polastre@cs.berkeley.edu
    +
    +
    +
    + + diff --git a/doc/html/tep110.html b/doc/html/tep110.html new file mode 100644 index 00000000..e1f4648c --- /dev/null +++ b/doc/html/tep110.html @@ -0,0 +1,852 @@ + + + + + + +Virtualization + + + + +
    +

    Virtualization

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:110
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis
    Draft-Created:20-Jun-2005
    Draft-Version:1.1.2.2
    Draft-Modified:2006-02-08
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo desribes how TinyOS 2.0 virtualizes common abstractions through +a combination of static allocation and runtime arbitration. It describes +the benefits and tradeoffs of this approach and how it is used in several +major abstractions.

    +
    +
    +

    1. Introduction

    +

    The TinyOS component model allows flexible composition, but that +flexibility is often limited by reasons which are not explicitly +stated in components. These implicit assumptions can manifest as buggy +behavior. In TinyOS 1.x, on the Telos platform, if a program +simultaneously initializes non-volatile storage and the radio, one of +them will fail: a program has to initialize them serially. They can +also manifest as compile-time errors: if two separate communication +services happen to receive packets of the same AM type, the nesC +compiler will issue a warning due to the buffer swap semantics.

    +

    On one hand, the flexbility components provide allows expert users to +build complex and intricate applications. On the other, it can make +managing complexity and intricacy very difficult when building very +simple and basic applications. To promote this latter class of +development, TinyOS 2.x has the notion of "distributions," which are +collections of system abstractions that are designed to be used +together. As long as a user implements an application in terms of the +distribution, the underlying components will operate correctly and +there will be no unforseen failures.

    +

    This memo documents an example distribution, named OSKI (Operating +System Key Interfaces). It describes the services OSKI provides and +how their implementations are structured to simplify application +writing.

    +
    +
    +

    2. Distributions

    +

    A distribution presents services to the programmer. A service is a +set of generic (instantiable) components that represent API +abstractions. To use an abstraction, a programmer instantiates the +generic. For example, OSKI has the AMSenderC abstraction for +sending active messages. The AMSender generic component takes a single +parameter, the AM type. For example, if a programmer wants a component +named AppM to send active messages of type 32, the configuration would +look something like this:

    +
    +
    configuration AppC {}
    +
    implementation {
    +
    +
    components AppM, new AMSenderC(32);
    +
    AppM.AMSend -> AMSenderC;
    +
    +
    }
    +
    +

    Services often present abstractions at a fine grain. For example, the +active message service has AMSender, AMReceiver, and AMSnooper, each +of which is a separate abstraction.

    +
    +

    2.1 Controlling a Service

    +

    Every service has two abstractions: ServiceC, for powering it on +and off, and ServiceNotifierC, for learning when the service's +power state has changed. For example, active messages have the +AMServiceC and AMServiceNotifierC abstractions. A service +abstraction provides the Service interface

    +
    +
    interface Service {
    +
    +
    command void start();
    +
    command void stop();
    +
    command bool isRunning();
    +
    +
    }
    +
    +

    while a notifier abstraction provides the ServiceNotify interface

    +
    +
    interface ServiceNotify {
    +
    +
    event void started();
    +
    event void stopped();
    +
    +
    }
    +
    +

    For example, if a routing layer wants to be able to turn the active +message layer on and off, then it needs to instantiate an AMServiceC. +However, many components may be using active messages and have their +own instances of AMServiceC; while routing might consider it +acceptable to turn off active messages, other components might +not. Therefore, a service abstraction does not necessarily represent +explicit control; instead, each service has a policy for how it +deals with control requests. When a service changes its activity +state, it MUST signal all instances of its ServiceNotifierC.

    +

    For example, the active messages service has an "OR" policy; the +service remains active if any of its ServiceC instances are in the +on state, and goes inactive if and only if all of its ServiceC +instances are in the off state. This is an example timeline for +active messages being used by two components, RouterA and RouterB:

    +
      +
    1. System boots: active messages are off.
      2. +
    2. RouterA calls Service.start(). The AM layer is turned on.
      3. +
    3. All AMServiceNotifierC abstractions signal ServiceNotify.started().
      4. +
    4. RouterB calls Service.start().
      5. +
    5. RouterA calls Service.stop(). RouterB is still using active messages, so the layer stays on.
      6. +
    6. RouterB calls Service.stop(). The AM layer is turned off.
      7. +
    7. All AMServiceNotifierC abstractions signal ServiceNotify.stopped().
      8. +
    +

    By default, a service that has a control interface MUST be off. For an +application to use the service, at least one component has to call +Service.start().

    +
    +
    +

    2.2 Service Initialization

    +

    Because distributions are collections of services that are designed to +work together, they can avoid many of the common issues that arise +when composing TinyOS programs. For example, user code does not have +to initialize a service; this is done automatically by the +distribution. If a user component instantiates a service abstraction, +the distribution MUST make sure that the service is properly +initialized. Section 4 goes into an example implementation of how a +distribution can achieve this.

    +
    +
    +
    +

    3. OSKI Services

    +

    This section briefly describes the services that OSKI, an example +distribution provides. It is intended to give a feel for how a +distribution presents its abstractions.

    +
    +

    3.1 Timers

    +

    OSKI provides timers at one fidelity: milliseconds. Timers do not have +a Service abstraction, as their use implicitly defines whether the +service is active or not (the timer service is off if there are no +pending timers). The OSKITimerMsC component provides the +abstraction: it provides a single interface, Timer<TMilli>.

    +

    This is an example code snippet for instantiating a timer in a +configuration:

    +
    +
    configuration ExampleC {
    +
    +
    uses interface Timer<TMilli>;
    +
    +
    }
    +

    +
    configuration TimerExample {}
    +
    implementation {
    +
    +
    components ExampleC, new OSKITimerMsC() as T;
    +
    ExampleC.Timer -> T;
    +
    +
    }
    +
    +
    +
    +

    3.2 Active Messages

    +

    OSKI provides four functional active messaging abstractions: +AMSender, AMReceiver, AMSnooper, and +AMSnoopingReceiver. Each one takes an am_id_t as a parameter, +indicating the AM type. Following the general TinyOS 2.x approach to +networking, all active message abstractions provide the Packet and +AMPacket interfaces.

    +
    +
    AMSender
    +
    This abstraction is for sending active messages. In addition to Packet +and AMPacket, it provides the AMSend interface.
    +
    AMReceiver
    +
    This abstraction is for receiving active messages addressed to the +node or to the broadcast address. In addition to Packet and AMPacket, +it provides the Receive interface.
    +
    AMSnooper
    +
    This abstraction is for receiving active messages addressed to other +nodes ("snooping" on traffic). In addition to Packet and AMPacket, +it provides the Receive interface.
    +
    AMSnoopingReceiver
    +
    A union of the functionality of AMReceiver and AMSnooper, this +abstraction allows a component to receive all active messages +that it hears. The AMPacket interface allows a component to determine +whether such a message is destined for it. In addition to +Packet and AMPacket, this component provides the Receive interface.
    +
    +

    This snippet of code is an example of a configuration that composes a +routing layer with needed active message abstractions. This +implementation snoops on data packets sent by other nodes to improve +its topology formation:

    +
    +
    configuration RouterC {
    +
    +
    uses interface AMSend as DataSend;
    +
    uses interface AMSend as ControlSend;
    +
    uses interface Receive as DataReceive;
    +
    uses interface Receive as BeaconReceive;
    +
    +
    }
    +

    +
    configuration RoutingExample {
    +
    +
    components RouterC;
    +
    components new AMSender(5) as CSender;
    +
    components new AMSender(6) as DSender;
    +
    components new AMReceiver(5) as CReceiver;
    +
    components new AMSnoopingReceiver(6) as DReceiver;
    +

    +
    RouterC.DataSend -> DSender;
    +
    RouterC.ControlSend -> CSender;
    +
    RouterC.DataReceive -> DReceiver;
    +
    RouterC.ControlReceive -> CReceiver;
    +
    +
    }
    +
    +

    The active messages layer has control abstractions, named AMServiceC +and AMServiceNotifierC. Active messages follow an OR policy.

    +
    +
    +

    3.3 Broadcasts

    +

    In addition to active messages, OSKI provides a broadcasting service. +Unlike active messages, which are addressed in terms of AM addresses, +broadcasts are address-free. Broadcast communication has two +abstractions: BroadcastSenderC and BroadcastReceiverC, both of +which take a parameter, a broadcast message type. This parameter is +similar to the AM type in active messages. Both abstractions provide +the Packet interface. The broadcast service has control abstractions, +named BroadcastServiceC and BroadcastServiceNotifierC, which +follow an OR policy.

    +
    +
    +

    3.4 Tree Collection/Convergecast

    +

    NOTE: These services are not supported as of the 2.x prerelease. +They will be supported by the first full release.

    +

    OSKI's third communication service is tree-based collection routing. +This service has four abstractions:

    +
    +
    CollectionSenderC
    +
    This abstraction is for sending packets up the collection tree, +to the collection root. It provides the Send and Packet interfaces.
    +
    CollectionReceiverC
    +
    This abstraction is for a collection end-point (a tree root). It +provides the Receive, Packet, and CollectionPacket interfaces.
    +
    CollectionInterceptorC
    +
    This abstraction represents a node's ability to view and possibly +suppress packets it has received for forwarding. It provides +the Intercept, CollectionPacket, and Packet interfaces.
    +
    CollectionSnooperC
    +
    This abstraction allows a node to overhear routing packets +sent to other nodes to forward. It provides the Receive, +CollectionPacket, and Packet interfaces.
    +
    +

    All of the collection routing communication abstractions take a +parameter, similar to active messages and broadcasts, so multiple +components can independelty use collection routing. In addition to +communication, collection routing has an additional abstraction:

    +
    +
    CollectionControlC
    +
    This abstraction controls whether a node is a collection root +or not.
    +
    +

    Finally, collection routing has CollectionServiceC and +CollectionServiceNotifierC abstractions, which follow an OR +policy.

    +
    +
    +

    3.5 UART

    +

    NOTE: These services are not supported as of the 2.x prerelease. +They will be supported by the first full release. +They will be fully defined pending discussion/codification of +UART interfaces.

    +
    +
    +
    +

    4. OSKI Service Structure and Design

    +

    Presenting services through abstractions hides the underlying wiring +details and gives a distribution a great deal of implementation +freedom. One issue that arises, however, is initialization. If a user +component instantiates a service, then a distribution MUST make sure +the service is initialized properly. OSKI achieves this by +encapsulating a complete service as a working component; abstractions +export the service's interfaces.

    +
    +

    4.1 Example: Timers

    +

    For example, the timer service provides a single abstraction, +OskiTimerMilliC, which is a generic component. OskiTimerMilliC provides a +single instance of the Timer<TMilli> interface. It is implemented as a +wrapper around the underlying timer service, a component named +TimerMilliImplP, which provides a parameterized interface and +follows the Service Instance design pattern[sipattern]_:

    +
    +
    generic configuration OskiTimerMilliC() {
    +
    +
    provides interface Timer<TMilli>;
    +
    +
    }
    +
    implementation {
    +
    +
    components TimerMilliImplP;
    +
    Timer = TimerMilliImplP.TimerMilli[unique("TimerMilliC.TimerMilli")];
    +
    +
    }
    +
    +

    TimerMilliImplP is a fully composed and working service. It takes +a platform's timer implementation and makes sure it is initialized through +the TinyOS boot sequence[boot]_:

    +
    +
    configuration TimerMilliImplP {
    +
    +
    provides interface Timer<TMilli> as TimerMilli[uint8_t id];
    +
    +
    }
    +
    implementation {
    +
    +
    components TimerMilliC, Main;
    +
    Main.SoftwareInit -> TimerMilliC;
    +
    TimerMilli = TimerMilliC;
    +
    +
    }
    +
    +

    This composition means that if any component instantiates a timer, +then TimerMilliImplP will be included in the component graph. If +TimerMilliImplP is included, the TimerMilliP (the actual platform HIL +implementation) will be properly initialized at system boot time. In +this case, the order of initialization isn't important; in cases where +there are services that have to be initialized in a particular +sequence to ensure proper ordering, the Impl components can +orchestrate that order. For example, a distribution can wire +Main.SoftwareInit to a DistributionInit component, which calls +sub-Inits in a certain order; when a service is included, it wires +itself to one of the sub-Inits.

    +

    The user does not have to worry about unique strings to manage the +underlying Service Instance pattern: the abstractions take care of +that.

    +
    +
    +

    4.2 Example: Active Messages

    +

    Active messaging reprsent a slightly more complex service, as it has +several abstractions and a control interface. However, it follows the +same basic pattern: abstractions are generics that export wirings to +the underlying service, named ActiveMessageImplP:

    +
    +
    configuration ActiveMessageImplP {
    +
    +
    provides {
    +
    +
    interface SplitControl;
    +
    interface AMSend[am_id_t id];
    +
    interface Receive[am_id_t id];
    +
    interface Receive as Snoop[am_id_t id];
    +
    interface Packet;
    +
    interface AMPacket;
    +
    +
    }
    +
    +
    }
    +

    +
    implementation {
    +
    +
    components ActiveMessageC, Main;
    +

    +
    Main.SoftwareInit -> ActiveMessageC;
    +

    +
    SplitControl = ActiveMessageC;
    +
    AMSend = ActiveMessageC;
    +
    Receive = ActiveMessageC.Receive;
    +
    Snoop = ActiveMessageC.Snoop;
    +
    Packet = ActiveMessageC;
    +
    AMPacket = ActiveMessageC;
    +
    +
    }
    +
    +

    For example, this is the AMSender abstraction:

    +
    +
    generic configuration AMSenderC(am_id_t AMId) {
    +
    +
    provides {
    +
    +
    interface AMSend;
    +
    interface Packet;
    +
    interface AMPacket;
    +
    +
    }
    +
    +
    }
    +

    +
    implementation {
    +
    +
    components ActiveMessageImplP as Impl;
    +

    +
    AMSend = Impl.AMSend[AMId];
    +
    Packet = Impl;
    +
    AMPacket = Impl;
    +
    +
    }
    +
    +

    AMReceiver is similar, except that it wires to the Receive interface, +while AMSnooper wires to the Snoop interface, and AMSnoopingReceiver +provides a single Receive that exports both Snoop and Receive (the +unidirectional nature of the Receive interface makes this simple to +achieve, as it represents only fan-in and no fan-out).

    +

    ActiveMessageImplP does not provide a Service interface; it provides +the SplitControl interface of the underlying active message +layer. OSKI layers a ServiceController on top of SplitControl. As +the active message service follows an OR policy, OSKI uses a +ServiceOrControllerM, which is a generic component with the +following signature:

    +
    +
    generic module ServiceOrControllerM(char strID[]) {
    +
    +
    provides {
    +
    +
    interface Service[uint8_t id];
    +
    interface ServiceNotify;
    +
    +
    }
    +
    uses {
    +
    +
    interface SplitControl;
    +
    +
    }
    +
    +
    }
    +
    +

    ServiceOrControllerM follows the Service Instance pattern[sipattern]; +it calls its underlying SplitControl based on the state of each of its +instances of the Service interface. The parameter denotes the string +used to generate the unique service IDs. The active messages service +controller implementation, AMServiceImplP, instantiates a +ServiceOrControllerM, wires it to ActiveMessageImplP:

    +
    +
    configuration AMServiceImplP {
    +
    +
    provides interface Service[uint8_t id];
    +
    provides interface ServiceNotify;
    +
    +
    }
    +
    implementation {
    +
    +
    components ActiveMessageImplP;
    +
    components new ServiceOrControllerM("AMServiceImplP.Service");
    +

    +
    Service = ServiceOrControllerM;
    +
    ServiceOrControllerM.SplitControl -> ActiveMessageImplP;
    +
    ServiceNotify = ServiceOrControllerM;
    +
    +
    }
    +
    +

    AMServiceC then provides an instance of AMServiceImplP.Service:

    +
    +
    generic configuration AMServiceC() {
    +
    +
    provides interface Service;
    +
    +
    }
    +

    +
    implementation {
    +
    +
    components AMServiceImplP;
    +

    +
    Service = AMServiceImplP.Service[unique("AMServiceImplP.Service")];
    +
    +
    }
    +
    +

    Note that the two strings are the same, so that the uniqueCount() in +the ServiceOrControllerM is correct based on the number of instances +of AMServiceC. As with timers, encapsulating the service instance +pattern in generic components relieves the programmer of having to +deal with unique strings, a common source of bugs in TinyOS 1.x code.

    +
    +
    +

    4.3 OSKI Requirements

    +

    OSKI is a layer on top of system components: it presents a more +usable, less error-prone, and simpler interface to common TinyOS +functionality. For OSKI to work properly, a platform MUST be compliant +with the following TEPs:

    +
    +o TEP 102: Timers +o TEP 106: Schedulers and Tasks +o TEP 107: TinyOS 2.x Boot Sequence +o TEP 1XX: Active Messages +o TEP 1XX: Collection Routing
    +

    Not following some of these TEPS MAY lead to OSKI services being +inoperable, exhibit strange behavior, or being uncompilable.

    +
    +
    +
    +

    5. Distribution Interfaces

    +

    The basic notion of a distribution is that it provides a self-contained, +tested, and complete (for an application domain) programming interface +to TinyOS. Layers can be added on top of a distribution, but as a +distribution is a self-contained set of abstractions, adding new +services can lead to failures. A distribution represents a hard line +above which all other code operates. One SHOULD NOT add new services, +as they can disrupt the underlying organization. Of course, one MAY +create a new distribution that extends an existing one, but this is +in and of itself a new distribution.

    +

    Generally, as distributions are intended to be higher-level abstractions, +they SHOULD NOT provide any asynchronous (async) events. They can, +of course, provide async commands. The idea is that no code written on +top of a distribution should be asynchronous, due to the complexity +introduced by having to manage concurrency. Distributions are usually +platform independent; if an application needs async events, then +chances are it is operating close to the hardware, and so is not +platform independent.

    +
    +
    +

    6. Author's Address

    +
    +
    Philip Levis
    +
    467 Soda Hall
    +
    UC Berkeley
    +
    Berkeley, CA 94720
    +

    +
    phone - +1 510 290 5283
    +

    +
    email - pal@cs.berkeley.edu
    +
    +
    +
    +

    7. Citations

    + + + + + +
    [rst]reStructuredText Markup Specification. <http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html>
    + + + + + +
    [sipattern]The Service Instance Pattern. In Software Design Patterns for TinyOS. David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
    + + + + + +
    [boot]TEP 107: TinyOS 2.x Boot Sequence.
    +
    +
    + + diff --git a/doc/html/tep111.html b/doc/html/tep111.html new file mode 100644 index 00000000..64bf1249 --- /dev/null +++ b/doc/html/tep111.html @@ -0,0 +1,701 @@ + + + + + + +message_t + + + + +
    +

    message_t

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:111
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis
    Draft-Created:11-Jul-2005
    Draft-Version:1.1.2.12
    Draft-Modified:2006-06-13
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo covers the TinyOS 2.x message buffer abstraction, message_t. +It describes the message buffer design considerations, how and where +message_t is specified, and how data link layers should access it.

    +
    +
    +

    1. Introduction

    +

    In TinyOS 1.x, a message buffer is a TOS_Msg. A buffer contains an +active message (AM) packet as well as packet metadata, such as timestamps, +acknowledgement bits, and signal strength if the packet was received. +TOS_Msg is a fixed size structure whose size is defined by the maximum +AM payload length (the default is 29 bytes). Fixed sized buffers allows +TinyOS 1.x to have zero-copy semantics: when a component receives a +buffer, rather than copy out the contents it can return a pointer +to a new buffer for the underlying layer to use for the next received +packet.

    +

    One issue that arises is what defines the TOS_Msg structure, as different +link layers may require different layouts. For example, 802.15.4 radio +hardware (such as the CC2420, used in the Telos and micaZ platforms) +may require 802.15.4 headers, while a software stack built on top of +byte radios (such as the CC1000, used in the mica2 platform) can specify +its own packet format. This means that TOS_Msg may be different on +different platforms.

    +

    The solution to this problem in TinyOS 1.x is for there to be a standard +definition of TOS_Msg, which a platform (e.g., the micaZ) can +redefine to match its radio. For example, a mica2 mote uses the standard +definition, which is:

    +
    +typedef struct TOS_Msg {
+  // The following fields are transmitted/received on the radio.
+  uint16_t addr;
+  uint8_t type;
+  uint8_t group;
+  uint8_t length;
+  int8_t data[TOSH_DATA_LENGTH];
+  uint16_t crc;
+
+  // The following fields are not actually transmitted or received
+  // on the radio! They are used for internal accounting only.
+  // The reason they are in this structure is that the AM interface
+  // requires them to be part of the TOS_Msg that is passed to
+  // send/receive operations.
+  uint16_t strength;
+  uint8_t ack;
+  uint16_t time;
+  uint8_t sendSecurityMode;
+  uint8_t receiveSecurityMode;
+} TOS_Msg;
+
    +

    while on a mote with a CC420 radio (e.g., micaZ), TOS_Msg is defined as:

    +
    +typedef struct TOS_Msg {
+  // The following fields are transmitted/received on the radio.
+  uint8_t length;
+  uint8_t fcfhi;
+  uint8_t fcflo;
+  uint8_t dsn;
+  uint16_t destpan;
+  uint16_t addr;
+  uint8_t type;
+  uint8_t group;
+  int8_t data[TOSH_DATA_LENGTH];
+
+  // The following fields are not actually transmitted or received
+  // on the radio! They are used for internal accounting only.
+  // The reason they are in this structure is that the AM interface
+  // requires them to be part of the TOS_Msg that is passed to
+  // send/receive operations.
+
+  uint8_t strength;
+  uint8_t lqi;
+  bool crc;
+  uint8_t ack;
+  uint16_t time;
+ } TOS_Msg;
+
    +

    There are two basic problems with this approach. First, exposing all of +the link layer fields leads components to directly access the packet +structure. This introduces dependencies between higher level components +and the structure layout. For example, many network services built on +top of data link layers care whether sent packets are acknowledged. They +therefore check the ack field of TOS_Msg. If a link layer does not +provide acknowledgements, it must still include the ack field +and always set it to 0, wasting a byte of RAM per buffer.

    +

    Second, this model does not easily support multiple data link layers. +Radio chip implementations assume that the fields they require are +defined in the structure and directly access them. If a platform +has two different link layers (e.g., a CC1000 and a CC2420 radio), +then a TOS_Msg needs to allocate the right amount of space for both +of their headers while allowing implementations to directly access +header fields. This is very difficult to do in C.

    +

    The data payload is especially problematic. Many +components refer to this field, so it must be at a fixed offset. +Depending on the underlying link layer, the header fields +preceding it might have different lengths, and packet-level radios +often require packets to be contiguous memory regions. Overall, these +complexities make specifying the format of TOS_Msg very difficult.

    +
    +
    +

    2. message_t

    +

    In TinyOS 2.x, the standard message buffer is message_t. The +message_t structure is defined in tos/types/message.h:

    +
    +typedef nx_struct message_t {
+  nx_uint8_t header[sizeof(message_header_t)];
+  nx_uint8_t data[TOSH_DATA_LENGTH];
+  nx_uint8_t footer[sizeof(message_footer_t)];
+  nx_uint8_t metadata[sizeof(message_metadata_t)];
+} message_t;
+
    +

    This format keeps data at a fixed offset, which is important when +passing a message buffer between two different link layers. If the +data payload were at different offsets for different link layers, then +passing a packet between two link layers would require a memmove(3) +operation (essentially, a copy).

    +

    The header, footer, and metadata formats are all opaque. Source code +cannot access fields directly. Instead, data-link layers provide access +to fields through nesC interfaces. Section 3 discusses this in +greater depth.

    +

    Every link layer defines its header, footer, and metadata +structures. These structures MUST be external structs (nx_struct), +and all of their fields MUST be external types (nx_*), for two +reasons. First, external types ensure cross-platform compatibility. +Second, it forces structures to be aligned on byte boundaries, +circumventing issues with the +alignment of packet buffers and field offsets within them. +For example, the CC1000 radio implementation defines +its structures in CC1000Msg.h:

    +
    +typedef nx_struct cc1000_header {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} cc1000_header_t;
+
+typedef nx_struct cc1000_footer {
+  nxle_uint16_t crc;
+} cc1000_footer_t;
+
+typedef nx_struct cc1000_metadata {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;
+} cc1000_metadata_t;
+
    +

    Each link layer defines its structures, but a platform is +responsible for defining message_header_t, message_footer_t, +and message_metadata_t. This is because a platform may have +multiple link layers, and so only it can resolve which structures are +needed. These definitions MUST be in a file in a platform directory +named platform_message.h. The mica2 platform, for example, has +two data link layers: the CC1000 radio and the TinyOS serial +stack [1]. The serial packet format does not have a footer +or metadata section. The platform_message.h of the mica2 +looks like this:

    +
    +typedef union message_header {
+  cc1000_header_t cc1k;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc1000_footer_t cc1k;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc1000_metadata cc1k;
+} message_metadata_t;
+
    +

    For a more complex example, consider a fictional platform named +'megamica' that has both a CC1000 and a CC2420 radio. Its +platform_message.h would look like this:

    +
    +typedef union mega_mica_header {
+  cc1000_header_t cc1k;
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union mega_mica_footer {
+  cc1000_footer_t cc1k;
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union mega_mica_metadata {
+  cc1000_metadata_t cc1k;
+  cc2420_metadata_t cc2420;
+} message__metadata_t;
+
    +

    If a platform has more than one link layer, it SHOULD define each of the +message_t fields to be a union of the underlying link layer structures. +This ensures that enough space is allocated for all underlying link layers.

    +
    +
    +

    3. The message_t fields

    +

    TinyOS 2.x components treat packets as abstract data types (ADTs), +rather than C structures, obtaining all of the traditional benefits +of this approach. First and foremost, clients of a packet layer +do not depend on particular field names or locations, allowing the +implementations to choose packet formats and make a variety of +optimizations.

    +

    Components above the basic data-link layer MUST always access +packet fields through interfaces. A component that introduces +new packet fields SHOULD provide an interface to those that +are of interest to other components. +For example, active messages have an interface named AMPacket +which provides access commands to AM fields. In TinyOS 1.x, a +component would directly access TOS_Msg.addr; in TinyOS 2.x, +a component calls AMPacket.getAddress(msg). +The most basic of these interfaces is Packet, which provides +access to a packet payload. TEP 116 describes common TinyOS +packet ADT interfaces [2].

    +

    Link layer components MAY access packet fields differently than other +components, as they are aware of the actual packet format. They can +therefore implement the interfaces that provide access to the fields +for other components.

    +
    +

    3.1 Headers

    +

    The message_t header field is an array of bytes whose size is +the size of a platform's union of data-link headers. +Because packets are stored contiguously, the layout of a packet +in memory is not the same as the layout of its nesC structure.

    +

    A packet header does not necessarily start at the beginning of +the message_t. For example, consider the Telos platform:

    +
    +typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
    +

    The CC2420 header is 11 bytes long, while the serial header is +5 bytes long. The serial header ends at the beginning of the +data payload, and so six padding bytes precede it. This figure +shows the layout of message_t, a 12-byte CC2420 packet, and +a 12-byte serial packet on the Telos platform:

    +
    +            11 bytes         TOSH_DATA_LENGTH        7 bytes
+          +-----------+-----------------------------+-------+
+message_t |  header   |          data               | meta  |
+          +-----------+-----------------------------+-------+
+
+          +-----------+------------+                +-------+
+CC2420    |  header   |   data     |                | meta  |
+          +-----------+------------+                +-------+
+
+                +-----+------------+
+Serial          | hdr |   data     |
+                +-----+------------+
+
    +

    Neither the CC2420 nor the serial stack has packet footers, and +the serial stack does not have any metadata.

    +

    The packet for a link layer does not necessarily start at the beginning +of the message_t. Instead, it starts at a negative offset from the +data field. When a link layer component needs to read or write protocol +header fields, it MUST compute the location of the header as a negative +offset from the data field. For example, the serial stack header has +active message fields, such as the AM type. The command that returns +the AM type, AMPacket.type(), looks like this:

    +
    +serial_header_t* getHeader(message_t* msg) {
+  return (serial_header_t*)(msg->data - sizeof(serial_header_t));
+}
+command am_id_t AMPacket.type(message_t* msg) {
+  serial_header_t* hdr = getheader(msg);
+  return hdr->type;
+}
+
    +

    Because calculating the negative offset is a little bit unwieldy, the +serial stack uses the internal helper function getHeader(). Many +single-hop stacks follow this approach, as it is very likely +that nesC will inline the function, eliminating the possible overhead. +In most cases, the C compiler also compiles the call into a simple +memory offset load.

    +

    The following code is incorrect, as it directly casts the header field. +It is an example of what components MUST NOT do:

    +
    +serial_header_t* getHeader(message_t* msg) {
+  return (serial_header_t*)(msg->header);
+}
+
    +

    In the case of Telos, for example, this would result in a packet +layout that looks like this:

    +
    +            11 bytes         TOSH_DATA_LENGTH           7 bytes
+          +-----------+-----------------------------+-------+
+message_t |  header   |          data               | meta  |
+          +-----------+-----------------------------+-------+
+
+          +-----+     +------------+
+Serial    | hdr |     |   data     |
+          +-----+     +------------+
+
    +
    +
    +

    3.2 Data

    +

    The data field of message_t stores the single-hop packet payload. +It is TOSH_DATA_LENGTH bytes long. The default size is 28 bytes. +A TinyOS application can redefine TOSH_DATA_LENGTH at compile time +with a command-line option to ncc: -DTOSH_DATA_LENGTH=x. +Because this value can be reconfigured, it is possible that two +different versions of an application can have different MTU sizes. +If a packet layer receives a packet whose payload size is +longer than TOSH_DATA_LENGTH, it MUST discard the packet.

    +
    +
    +

    3.3 Footer

    +

    The message_footer_t field ensures that message_t has enough space to +store the footers for all underlying link layers when there are +MTU-sized packets. Like headers, footers are not necessarily stored +where the C structs indicate they are: instead, their placement is +implementation dependent. A single-hop layer MAY store the footer +contiguously with the data region. For short packets, this can mean +that the footer will actually be stored in the data field.

    +
    +
    +

    3.4 Metadata

    +

    The metadata field of message_t stores data that +a single-hop stack uses or collects does not transmit. +This mechanism allows packet layers to store per-packet +information such as RSSI or timestamps. For example, this is +the CC2420 metadata structure:

    +
    +typedef nx_struct cc2420_metadata_t {
+  nx_uint8_t tx_power;
+  nx_uint8_t rssi;
+  nx_uint8_t lqi;
+  nx_bool crc;
+  nx_bool ack;
+  nx_uint16_t time;
+} cc2420_metadata_t;
+
    +
    +
    +
    +

    5. Implementation

    +

    The definition of message_t can be found in +tinyos-2.x/tos/types/message.h. The definition of the CC2420 +message format can be found in tinyos-2.x/tos/chips/cc2420/CC2420.h. +The defintion of the CC1000 message format can be found in +tinyos-2.x/tos/chips/cc1000/CC1000Msg.h. The definition +of the standard serial stack packet format can be found in +tinyos-2.x/tos/lib/serial/Serial.h''. The definition of +the telosb packet format can be found in +``tinyos-2.x/tos/platform/telosa/platform_message.h and the micaz format can be found in +tinyos-2.x/tos/platforms/micaz/platform_message.h.

    +
    +
    +

    6. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates Hall
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [1]TEP 113: Serial Communication.
    + + + + + +
    [2]TEP 116: Packet Protocols.
    +
    +
    + + diff --git a/doc/html/tep112.html b/doc/html/tep112.html new file mode 100644 index 00000000..2dcba25e --- /dev/null +++ b/doc/html/tep112.html @@ -0,0 +1,688 @@ + + + + + + +Microcontroller Power Management + + + + +
    +

    Microcontroller Power Management

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:112
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman, Philip Buonadonna, Vlado Handziski
    Draft-Created:19-Sep-2005
    Draft-Version:1.1.2.2
    Draft-Modified:2005-10-31
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents how TinyOS manages the lower power state of a +microcontroller.

    +
    +
    +

    1. Introduction

    +

    Microcontrollers often have several power states, with varying power +draws, wakeup latencies, and peripheral support. The microcontroller +should always be in the lowest possible power state that can satisfy +application requirements. Determining this state accurately requires +knowing a great deal about the power state of many subsystems and +their peripherals. Additionally, state transitions are common. Every +time a microcontroller handles an interrupt, it moves from a low power +state to an active state, and whenever the TinyOS scheduler finds the +task queue empty it returns the microcontroller to a low power state. +TinyOS 2.x uses three mechanisms to decide what low power state it +puts a microcontroller into: status and control registers, a dirty +bit, and a power state override. This memo documents these mechanisms +and how they work, as well as the basics of subsystem power +management.

    +
    +
    +

    2. Background

    +

    The TinyOS scheduler[_tep106] puts a processor into a sleep state when +the task queue is empty. However, processors can have a spectrum of +power states. For example, the MSP430 has one active mode (issuing +instructions) and five low-power modes. The low power modes range from +LPM0, which disables only the CPU and main system clock, to LPM4, +which disables the CPU, all clocks, and the oscillator, expecting to +be woken by an external interrupt source. The power draws of these low +power modes can differ by a factor of 350 or more (75 uA for LPM0 at +3V, 0.2 uA for LPM4). Correctly choosing the right microcontroller low +power state can greatly increase system lifetime.

    +

    TinyOS 1.x platforms manage MCU power in several different ways, but +there are commonalities in the approaches. The mica platforms, for +example, have a component named HPLPowerManagement, which has a +commands for enabling and disabling low power modes, as well as a +command (adjustPower()) to tell it to compute the low power state +based on the configuration of its various control and status +registers, storing the result in the Atmega128's MCU control +register. When TinyOS tells the microcontroller to go to sleep, it +uses the control register to decide exactly which power state to go +into. In contrast, MSP430 based platforms such as Telos and eyes +compute the low power state every time the scheduler tells the system +to go to sleep.

    +

    Each of the two approaches has benefits and drawbacks. The 1.x mica +approach is efficient, in that it only calculates the low power state +when told to. However, this leaves the decision of when to calculate +the low power state to other components, which is an easy way to +introduce bugs. The lack of a well-defined hardware abstraction +architecture in 1.x exacerbates this problem. In contrast, the MSP430 +approach is simpler, in that the system will always enter the right +power state without any external prompting. However, it is +correspondingly costly, introducing 40-60 cycles of overhead to every +interrupt that wakes the system up, which can be a bottleneck on the rate +at which the system can handle interrupts.

    +

    Both of these approaches assume that TinyOS can determine the correct +low power state by examining control and status registers. For +example, the MSP430 defaults to low power mode 3 (LPM3) unless it +detects that Timer A, the USARTs, or the ADC is active, in which case +it uses low power mode 1 (LPM1). From the perspective of what +peripherals and subsystems might wake the node up or must continue +operating while the MCU sleeps, this is true. However, power modes +introduce wakeup latency, a factor which could be of interest to +higher-level components. While wakeup latency is not a significant +issue on very low power microcontrollers, such as the Atmega128 and +MSP430, more powerful processors, such as the Xscale family (the basis +of platforms such as the imote2) can power states with wakeup +latencies as large as 5ms. For some application domains, this latency +could be a serious issue. Higher level components therefore need a way +to give the TinyOS microcontroller power manager information on their +requirements, which it considers when calculating the right low power +state.

    +
    +
    +

    3. Microcontroller Power Management

    +

    TinyOS 2.x uses three basic mechanisms to manage and control +microcontroller power states: a dirty bit, a chip-specific low power +state calculation function, and a power state override function. The +dirty bit tells TinyOS when it needs to calculate a new low power +state, the function performs the calculation, and the override allows +higher level components to introduce additional requirements, if +needed.

    +

    These three mechanisms all operate in the TinyOS core scheduling loop, +described in TEP 106: Schedulers and Tasks[_tep106]. This loop is +called from the boot sequence, which is described in TEP 107: Boot +Sequence[_tep107]. The command in question is +Scheduler.runNextTask(), when its sleep parameter is TRUE (i.e., +call Scheduler.runNextTask(TRUE)).

    +

    If this command is called when the task queue is empty, the TinyOS +scheduler puts the microcontroller to sleep. It does so through +the McuSleep interface:

    +
    +
    interface McuSleep {
    +
    +
    async command void sleep();
    +
    +
    }
    +
    +

    McuSleep.sleep() puts the microcontroller into a low power sleep +state, to be woken by an interrupt. This command deprecates the +__nesc_atomic_sleep() call of TinyOS 1.x. Note that, as the 1.x +call suggests, putting the microcontroller to sleep MUST have certain +atomicity properties. The command is called from within an atomic +section, and MUST atomically re-enable interrupts and go to sleep. An +issue arises if the system handles an interrupt after it re-enables +interrupts but before it sleeps: the interrupt may post a task, but +the task will not be run until the microcontroller wakes up from sleep.

    +

    Microcontrollers generally have hardware mechanisms to support this +requirement. For example, on the Atmega128, the sei instruction +does not re-enable interrupts until two cycles after it is issued (so +the sequence sei sleep runs atomically).

    +

    A component named McuSleepC provides the McuSleep interface, and +TinySchedulerC MUST automatically wire it to the scheduler +implementation. McuSleepC is a chip- or platform-specific component, +whose signature MUST include the following interfaces:

    +
    +
    component McuSleepC {
    +
    +
    provides interface McuSleep;
    +
    provides interface PowerState;
    +
    uses interface PowerOverride;
    +
    +
    }
    +

    +
    interface McuPowerState {
    +
    +
    async command void update();
    +
    +
    }
    +

    +
    interface McuPowerOverride {
    +
    +
    async command mcu_power_t lowestState();
    +
    +
    }
    +
    +

    McuSleepC MAY have additional interfaces.

    +
    +
    +

    3.1 The Dirty Bit

    +

    Whenever a Hardware Presentation Layer (HPL, see TEP 2: Hardware +Abstraction Architecture[_tep2]) component changes an aspect of +hardware configuration that might change the possible low power state +of the microcontroller, it MUST call McuPowerState.update(). This is +the first power management mechanism, a dirty bit. If +McuPowerState.update() is called, then McuSleepC MUST recompute the +low power state before the next time it goes to sleep as a result of +McuSleep.sleep() being called.

    +
    +
    +

    3.2 Low Power State Calculation

    +

    McuSleepC is responsible for calculating the lowest power state that +it can safely put the microcontroller into without disrupting the +operation of TinyOS subsystems. McuSleepC SHOULD minimize how often it +must perform this calculation: it is an inherently atomic calculation, +and so if performed very often (e.g., on every interrupt) can +introduce significant overhead and jitter.

    +

    MCU power states MUST be represented as an enum in the standard chip +implementation header file. This file MUST also define a type +mcu_power_t and a combine function that given two power state +values returns one that provides the union of their functionality.

    +

    For example, consider a hypothetical microcontroller with three low +power states, (LPM0, LPM1, LPM2) and two hardware resources such as +clocks (HR0, HR1). In LPM0, both HR0 and HR1 are active. In LPM1, HR0 +is inactive but HR1 is active. In LPM2, both HR0 and HR1 are inactive. +The following table describes the results of a proper combine function +(essentially a MAX):

    + ++++++ + + + + + + + + + + + + + + + + + + + + + + +
     LPM0LPM1LPM2
    LPM0LPM0LPM0LPM0
    LPM1LPM0LPM1LPM1
    LPM2LPM0LPM1LPM2
    +

    In contrast, if in LPM2, HR0 is active but HR1 is inactive, the +combine function would look like this:

    + ++++++ + + + + + + + + + + + + + + + + + + + + + + +
     LPM0LPM1LPM2
    LPM0LPM0LPM0LPM0
    LPM1LPM0LPM1LPM0
    LPM2LPM0LPM0LPM2
    +
    +
    +

    3.3 Power State Override

    +

    When McuSleepC computes the best low power state, it MUST call +PowerOverride.lowestState(). McuSleepC SHOULD have a default +implementation of this command, which returns the lowest power state +the MCU is capable of. The return value of this command is a +mcu_power_t. McuSleepC MUST respect the requirements of the return +of this call and combine it properly with the low power state it +computes.

    +

    The PowerOverride functionality exists in case higher-level components +have some knowledge or requirements that cannot be captured in +hardware status and configuration registers, such as a maximum +tolerable wakeup latency. Because it can overrides all of the MCU +power conservation mechanisms, it SHOULD be used sparingly, if at +all. Because it is called in an atomic section during the core +scheduling loop, implementations of PowerOverride.lowestState() SHOULD +be an efficient function, and SHOULD NOT be longer than twenty or +thirty cycles; implementations SHOULD be a simple return of a cached +variable. Wiring arbitrarily to this command is an easy way to cause +TinyOS to behave badly. The presence of a combine function for +mcu_power_t means that this command can have fan-out calls.

    +
    +
    +

    4. Peripherals and Subsystems

    +

    At the HIL level, TinyOS subsystems generally have a simple, +imperative power management interface. Depending on the latencies +involved, this interface is either StdControl or SplitControl. +These interfaces are imperative in that when any component calls +StdControl.stop on another component, it causes the subsystem that +component represents to enter an inactive, low-power state.

    +

    From the perspective of MCU power management, this transition causes a +change in status and control registers (e.g., a clock is +disabled). Following the requirements in 3.1, the MCU power management +subsystem will be notified of a significant change and act +appropriately when the system next goes to sleep.

    +

    These imperative appraoches are flexible and powerful, but are also +very error prone, partially due to their deep semantics. For example, +depending on the circumstances, an application calling StdControl.stop +on a routing layer may or may not also want to turn off the underlying +radio. StdControl and SplitControl provide a mechanism to control +subsystem power states, but no real policy for arbitrating +conflicting requirements from components built on top of them.

    +

    Service distributions (described in TEP 110[_tep110]) are responsible +for providing policies on top of these low-level mechanisms. OSKI, for +example, the sample distribution described in TEP 110, uses an +OR-policy: a subsystem is active if any of its clients want it active, +and inactive iff all of its clients want it inactive. Other +distributions can provide alternative power management policies in top +of the basic HIL mechanisms.

    +
    +
    +

    5. Author's Address

    +
    +
    Robert Szewczyk
    +
    Moteiv Corporation
    +
    2168 Shattuck Ave, Floor 2
    +
    Berkeley, CA 94704
    +

    +
    email - rob@moteiv.com
    +

    +

    +
    Philip Levis
    +
    358 Gates
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +

    +

    +
    Martin Turon
    +
    PO Box 8525
    +
    Berkeley, CA 94707
    +

    +
    phone - +1 408 965 3355
    +
    email - mturon@xbow.com
    +

    +

    +
    Lama Nachman
    +
    3600 Juliette Lane, SC12-319
    +
    Intel Research
    +
    Santa Clara, CA 95052
    +

    +
    email - lama.nachman@intel.com
    +

    +

    +
    Phil Buonadonna
    +
    Arched Rock Corp.
    +
    2168 Shattuck Ave. 2nd Floor
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 981 8714
    +
    email - pbuonadonna@archedrock.com
    +

    +

    +
    Vlado Handziski
    +
    Sekr FT5
    +
    Einsteinufer 25
    +
    10587 Berlin
    +
    GERMANY
    +

    +
    email - handzisk@tkn.tu-berlin.de
    +

    +
    +
    +
    +

    6. Citations

    + + + + + +
    [tep106]TEP 106: Schedulers and Tasks.
    + + + + + +
    [tep107]TEP 107: TinyOS 2.x Boot Sequence.
    + + + + + +
    [tep110]TEP 110: Service Distributions.
    + + + + + +
    [tep2]TEP 2: Hardware Abstraction Architecture.
    +
    +
    + + diff --git a/doc/html/tep113.html b/doc/html/tep113.html new file mode 100644 index 00000000..7e3f307e --- /dev/null +++ b/doc/html/tep113.html @@ -0,0 +1,724 @@ + + + + + + +Serial Communication + + + + +
    +

    Serial Communication

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:113
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Ben Greenstein and Philip Levis
    Draft-Created:11-Jul-2005
    Draft-Version:1.1.2.4
    Draft-Modified:2006-06-14
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo describes the structure and standard implementation of the +TinyOS 2.x serial communication system for mote-to-PC data +exchange. The system is broken into three levels (encoding, framing, +and dispatch) to allow easy experimentation and replacement. It can +also handle multiple packet formats: unlike 1.x, 2.x serial packets +are not bound to the mote's radio packet format. Additionally, one of +the supported packet formats is platform independent, so PC-side +applications can communicate with arbitrary motes.

    +
    +
    +

    1. Introduction

    +

    Users need to read data out of a TinyOS network. The most common +approach is to attach a mote to a PC or latop with a wired +connection. While the interface on the PC side can vary from a serial +cable to a USB device to IP, the mote generally talks to a serial port +(UART). In TinyOS 1.x, the UART packet format is platform-specific, +pushing a good deal of complexity into the protocol and PC-side tools +in order to discover and properly handle platform diversity. TinyOS +2.0 introduces the notion of packet format dispatch, so a mote can +support multiple UART packet formats simultaneously. This allows +transparent bridging (e.g., an 802.15.4 base station) to exist in +parallel with platform-independent communication, which allows +simplifies the PC toolchain. This memo documents the protocols and +structure of the TinyOS 2.x serial communication stack.

    +
    +
    +

    2. Serial Stack Structure

    +

    The TinyOS 2.x serial communication stack is broken up into four +functional components. From bottom to top, they are

    +
    +

    o the raw UART,

    +

    o the encoder/framer,

    +

    o the protocol,

    +

    o and the dispatcher.

    +
    +

    Structurally, they look like this:

    +
    + _____________________
+|                     |
+|     Dispatcher      |       Packet formatting.
+|_____________________|
+ _____________________
+|                     |
+|      Protocol       |       Acknowledgements, CRC computation,
+|_____________________|       windowing.
+ _____________________
+|                     |
+|    Encoder/Framer   |       Translating raw bytes into frame
+|_____________________|       delimiters, escape bytes.
+ _____________________
+|                     |
+|      Raw UART       |       Platform code for reading/writing
+|_____________________|       bytes over the serial connection.
+
    +

    The bottom three provide a byte-level interface: only the Dispatcher +provides a packet-level interface. The top three are all +platform-independent: only the UART is platform-specific code.

    +

    The lowest level of the stack is the raw UART. This HIL component +provides functionality for configuring the UART (speed, stop bytes, +etc.) as well as sending/receiving bytes.

    +

    The Encoder/Framer sits above the raw UART. This component translates +raw data bytes into packet bytes using a serial protocol's +encoding. The Encoder/Framer assumes that a protocol's encoding has +two kinds of bytes: delimiters and data bytes, and signals each in +separate events to the component above.

    +

    The Protocol component handles data and delimiter byte events. It is +responsible for reading in and sending all protocol control +packets. If the Protocol component starts receiving a data packet, it +signals to the Dispatcher that a packet has started and signals the +data bytes. When the data packet completes, the Protocol signals to +the Dispatcher that the packet is complete and whether it passed the +protocol-level CRC.

    +

    The Dispatcher component handles data packet bytes and delimiters. It +is responsible for reading data bytes into a message_t and signaling +packet reception to components above it. The dispatcher can support +multiple packet formats. Based on how message_t works (see TEP +111[tep111]), this boils down to knowing where in a message_t a +particular packet format begins (based on its header size). Section +3.4 describes how the default TinyOS 2.x implementation, +SerialDispatcherC does this.

    +
    +
    +

    3. The 2.x Serial Stack Implementation

    +

    Section 2 describes the basic structure of the TinyOS 2.x serial +stack structure. This section describes its actual implementation, +including SerialActiveMessageC, which sits on top of the Dispatcher. +All of the components except for UartC are part of the serial +library that lives in tos/lib/serial.

    +
    +

    3.1 Raw UART: UartC

    +

    The UART HIL[TEP2] is UartC, which provides a byte-level +interface to the underlying serial communication. It provides the +SerialByteComm interface:

    +
    +interface SerialByteComm {
+  async command error_t put(uint8_t data);
+  async event void get(uint8_t data);
+  async event void putDone();
+}
+
    +

    It also provides interfaces for configuring the serial port. NOTE: +These are not codified yet, and so working out the UART HIL seems like +a good idea.

    +
    +
    +

    3.2 Encoder/Framer: HdlcTranslateC

    +

    HdlcTranslateC is the serial encoder/framer. It uses the +SerialByteComm interface and provides the SerialFrameComm +interface:

    +
    +interface SerialFrameComm {
+  async command error_t putDelimiter();
+  async command error_t putData(uint8_t data);
+  async command void resetSend();
+  async command void resetReceive();
+  async event void delimiterReceived();
+  async event void dataReceived(uint8_t data);
+  async event void putDone();
+}
+
    +

    As its name suggests, it uses the same encoding as the HDLC[HDLC] +protocol. 0x7e is reserved as a frame delimiter byte, and 0x7d +is reserved as an escape byte. HdlcTranslateC maintains ten bits of +state. The receive and send paths each have one bit to store whether +they are using an escape byte, and the transmit path has a byte for +when it sends an escaped byte.

    +

    When HdlcTranslateC receives a delimiter byte, it signals +delimiterReceived(). When HdlcTranslateC receives an escape byte, it +sets the receiveEscape flag to true. When it receives any other byte, +it tests to see if the receiveEscape flag is set; if so, it XORs the +data byte with 0x20 and clears the flag. It signals dataReceived() +with the byte. The most common use of escape byte is to transmit data +bytes corresponding to the delimiter byte or escape byte. For example, +0x7e becomes 0x7d 0x5e.

    +

    HdlcTranslateC performs similar actions on the transmit side. When +told to transmit the delimiter or escape byte as a data byte, it sets +the transmitEscape flag to true, stores the data byte XOR 0x20, +and sends an escape byte. When the escape byte is sent, it sends the +stored data byte.

    +
    +
    +

    3.3 Protocol: SerialP

    +

    The SerialP component implements the serial protocol using PPP/HDLC- +like framing (See RFC 1662[RFC1662]). Type dispatch and buffer +management are left to higher layers in the serial stack. The protocol +is currently stop-and-wait in the host-to-mote direction and best +effort in the mote-to-host direction. The first performance upgrade of +this module will be to implement sliding window reliability in both +directions.

    +

    SerialP provides two byte-level interfaces to the upper layer for +sending and receiving packets, respectively called SendBytePacket and +ReceiveBytePacket.

    +

    On the sending side, SerialP is responsible for encapsulation of upper +layer packets. An upper layer component such as SerialDispatcherC +initiates the sending of a packet by calling startSend, passing the +first byte to send. SerialP collects subsequent bytes by signalling +nextByte. Within the nextByte handler or between calls to nextByte, +the upper layer should indicate the end-of-packet by calling +completeSend. If completeSend is called from within a nextByte +handler, SerialP will ignore the return of the call to nextByte.

    +
    +interface SendBytePacket {
+  async command error_t startSend(uint8_t first_byte);
+  async command error_t completeSend();
+  async event uint8_t nextByte();
+  async event void sendCompleted(error_t error);
+}
+
    +

    SerialP maintains a small window of bytes that have been received by +the upper layer and not yet sent to the UART. Depending on the timing +requirements of the underlying UART, the size of this window can be +changed. SerialP uses repeated calls to nextByte to keep this window +filled.

    +

    SerialP uses SerialFrameComm to send a delimiter between frames, +a serial-level type field, the bytes of the packet, and a two-byte +frame CRC. For mote-to-host gap detection and link reliability, a +sequence number may also be sent (not currently activated).

    +

    After sending an entire frame and receiving the last putDone event +from below, SerialP signals sendCompleted to indicate the success or +failure of a requested transmission.

    +

    Packet reception is also managed by SerialP and the interface +provided to the upper layer is ReceiveBytePacket:

    +
    +interface ReceiveBytePacket {
+  async event error_t startPacket();
+  async event void byteReceived(uint8_t b);
+  async event void endPacket(error_t result);
+}
+
    +

    Upon receiving an interframe delimiter and a new frame's header, +SerialP signals the upper layer indicating that a packet is +arriving. For each byte received, SerialP signals byteReceived. (Note: +SerialP signals on byte k-2 when byte k arrives, because the +implementation precludes it from knowing when it has encountered the +2-byte CRC in the frame footer until after it has received it. Lagging +behind by two bytes makes it possible to hide all frame details from +the upper layer.) Once SerialP receives the complete frame it signals +endPacket with a value of SUCCESS. If instead it loses sync during +reception it signals endPacket with FAIL.

    +

    SerialP acknowledges frames it receives. Acknowledgements have a +higher priority than data transmissions and consequently, data frames +may be slightly delayed. However, acknowledgement information is +stored in a queue separate from the data buffer, so a data packet to +be transmitted may begin spooling into SerialP while SerialP is +actively sending an acknowledgement.

    +
    +
    +

    3.4 Dispatcher: SerialDispatcherC

    +

    SerialDispatcherC handles the data packets that the Protocol component +receives. It uses the SendBytePacket and ReceiveBytePacket interfaces, +and provides parameterized Send and Receive interfaces. The parameter +in the Send and Receive interfaces (uart_id_t) determines the +packet format contained in the message_t.

    +

    SerialDispatcherC places a one-byte header, the packet format +identifier, on the packets sent and received through SerialP. +SerialDispatcherC uses a parameterized SerialPacketInfo interface to +be able to handle various packet formats:

    +
    +interface SerialPacketInfo {
+  async command uint8_t offset();
+  async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+  async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+}
+
    +

    When SerialDispatcherC receives the first data byte of a packet from +SerialP, it stores it as the packet type and calls +SerialPacketInfo.offset() to determine where in a message_t that +packet format begins. It then spools data bytes in, filling them into +its message_t buffer. Similarly, on the send side, it first sends the +type byte and spools out data bytes starting from the index denoted by +the call to offset(). SerialDispatcherC uses the two length commands, +dataLinkLength and upperLength, to translate between the two notions +of packet length: above, length refers to the payload excluding +header, while below it refers to the payload plus header.

    +

    A component that provides communication over the serial port with +uart_id_t U MUST wire a component implementing SerialPacketInfo to +SerialDispatcherC with uart_id_t U. The file Serial.h contains +reserved uart_id_t's for supported packet formats. Currently, only +platform independent active messages +(TOS_SERIAL_ACTIVE_MESSAGE_ID, described in Section 3.5), 802.15.4 +active messages (TOS_SERIAL_802_15_4_ID), mica2 CC1000 packets +(TOS_SERIAL_CC1000_ID) and the error code +TOS_SERIAL_UNKNOWN_ID are reserved. New packet formats MUST NOT +reuse any reserved identifiers.

    +
    +
    +

    3.5 SerialActiveMessageC

    +

    SerialActiveMessageC is a platform-independent active message layer +that operates on top of the serial communication +stack. SerialActiveMessageC is a configuration that wires +SerialActiveMessageP to SerialDispatcherC with uart_id_t +TOS_SERIAL_ACTIVE_MESSAGE_ID and wires SerialPacketInfoActiveMessageP +to SerialDispatcherC with uart_id_t TOS_SERIAL_ACTIVE_MESSAGE_ID:

    +
    +includes Serial;``
+configuration SerialActiveMessageC {
+  provides {
+    interface Init;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+  }
+  uses interface Leds;
+}
+implementation {
+  components new SerialActiveMessageP() as AM, SerialDispatcherC;
+  components SerialPacketInfoActiveMessageP as Info;
+
+  Init = SerialDispatcherC;
+  Leds = SerialDispatcherC;
+
+  AMSend = AM;
+  Receive = AM;
+  Packet = AM;
+  AMPacket = AM;
+
+  AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+}
+
    +

    SerialActiveMessageP is a generic component so that it can be used to +sit on top of any packet-level communication layer. It does not filter +packets based on destination address or group. It assumes that if the +packet was received over the serial port, it was destined to the +node. This saves PC-side tools from having to discover or consider the +ID and group of a mote.

    +

    Platform-independent active messages do not have a CRC (they assumes +the serial stack CRC is sufficient), and have the following header:

    +
    +typedef nx_struct SerialAMHeader {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} SerialAMHeader;
+
    +
    +
    +

    3.6 Packet Format

    +

    A data packet in the TinyOS 2.x serial stack has the following format +over the wire. Each protocol field is associated with a specific component:

    +
    +   ____________________________________________
+  | | | | |                               |  | |
+  | | | | |                               |  | |
+  |_|_|_|_|_______________________________|__|_|
+   F P S D         Payload                 CR F
+
+F       = Framing byte, denoting start of packet: HdlcTranslateC
+P       = Protocol byte: SerialP
+S       = Sequence number byte: SerialP
+D       = Packet format dispatch byte: SerialDispatcherC
+Payload = Data payload (stored in SerialDispatcherC): SerialDispatcherC
+CR      = Two-byte CRC over S to end of Payload: SerialP
+F       = Framing byte denoting end of packet: HdlcTranslateC
+
    +

    Payload is a contiguous packet that SerialDispatcherC reads in. Note +that any data bytes (P - CR) equal to 0x7e or 0x7d will be escaped to +0x7d 0x5e or 0x7d 0x5d accordingly. For example, a platform +independent AM packet of type 6, group 0x7d, and length 5 to +destination 0xbeef with a payload of 1 2 3 4 5 would look like this:

    +

    7e 40 09 00 be ef 05 7d 5d 06 01 02 03 04 05 7e

    +

    Note that the group 0x7d is escaped to 0x7d 0x5d. The protocol field +(P) is 0x40 (64), corresponding to SERIAL_PROTO_ACK (in Serial.h).

    +
    +
    +
    +

    4. Access Abstractions

    +

    Two generic components: SerialAMSenderC and SerialAMReceiverC connect +to SerialActiveMessageC to provide virtualized access to the serial +stack. Each instantiation of SerialAMSenderC has its own queue of +depth one. Therefore, it does not have to contend with other +SerialAMSender instantiations for queue space. The underlying +implementation schedulers the packets in these queues using some form +of fair-share queueing. SerialAMReceiverC provides the virtualized +abstraction for reception. These abstraction are very similar to +TinyOS's radio abstractions, namely, AMSenderC and AMReceiverC. See +Section 4 of TEP 116[TEP116] for more information. Unlike the +services in the TEP 116, the serial component virtualizations provide +no snooping capabilities.

    +
    +
    +

    5. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +

    +

    +
    Ben Greenstein
    +
    Center for Embedded Networked Sensing
    +
    UCLA 3563 Boelter Hall
    +
    Los Angeles, CA 90095-1596
    +

    +
    phone - +1 310 206 3925
    +
    email - ben@cs.ucla.edu
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [TEP2]TEP 2: Hardware Abstraction Architecture. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep2.txt?view=markup
    + + + + + +
    [TEP111]TEP 111: message_t. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep111.txt?view=markup
    + + + + + +
    [TEP116]TEP 116: Packet Protocols. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep116.txt?view=markup
    + + + + + +
    [HDLC]International Organization For Standardization, ISO Standard 3309-1979, "Data communication - High-level data link control procedures - Frame structure", 1979.
    + + + + + +
    [RFC1662]PPP in HDLC-like Framing, Internet Engineering Task Force (IETF), 1994
    +
    +
    + + diff --git a/doc/html/tep114.html b/doc/html/tep114.html new file mode 100644 index 00000000..f40baace --- /dev/null +++ b/doc/html/tep114.html @@ -0,0 +1,669 @@ + + + + + + +SIDs: Source and Sink Independent Drivers + + + + +
    +

    SIDs: Source and Sink Independent Drivers

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:114
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Gilman Tolle, Philip Levis, and David Gay
    Draft-Created:30-Oct-2005
    Draft-Version:1.1.2.3
    Draft-Modified:2006-06-09
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo documents a set of hardware- and sensor-independent interfaces +for data sources and sinks in TinyOS 2.x.

    +
    +
    +

    1. Introduction

    +

    Sensing is an integral part of any sensor network application. Having +a wide variety of sensor interfaces usually does not impose a large +burden on an application developer, as any given application uses a +small and static set. However, applications often build on top of more +general systems, such as management or database layers, which may need +to sample sensors. Since these are general and sensor-independent +systems, they require a sensor-independent interface. TinyOS 2.0 +therefore has telescoping sensor abstractions, providing both simple +and sensor-independent as well as sensor-specific interfaces.

    +
    +
    +

    2. Sensors in TinyOS 1.x

    +

    Early TinyOS sensors were generally analog. To sample one of these +sensors, an application makes an analog-to-digital conversion using +the MCU ADC. Because all early sensors required ADC conversions, the +ADC interface has become the de-facto 1.x sensor interface. However, +the ADC interface was originally designed for inexpensive, +interrupt-driven sampling. All of its commands and events are async +and sensor values are always 16 bits, although only some subset of the +bits may be significant (e.g., a 12-bit value).

    +

    Because sensing can be a part of high-level application logic, +the asynchronicity of these events means that high-level components +must deal with atomic sections and possible race conditions, even +if the sampling rate is very low (e.g., every five minutes) +and so could be easily placed in a task.

    +

    Additionally, not all sensors require ADC conversions from the MCU. +Many sensors today are digital. To sample these sensors, the MCU sends +a sample command and receives the corresponding data over a bus (e.g., +SPI, I2C). The latency involved, combined with possible Resource +arbitration [_tep108], means that these bus operations are often +synchronous code. In the command direction, this can force a task +allocation to convert async to sync; in the event direction, the +application has to deal with async code even though the event is, in +practice, in a task.

    +

    Finallly, the simplicity of the ADC interface has led many sensors to +introduce several new ones for calibration and control, such as +Mic and MagSetting. Because ADCs generally do not have error +conditions, the ADC interface has no way to signal that a sample +failed. This turns out to be important for sensors where the sampling +request is split-phase, such as sensors over a bus. In these cases, it +is possible that the driver accepts the request to sample, but once +acquiring the bus discovers something is wrong with the sensor. This +property has led bus-based sensors to also have a separate +ADCError interface; this interface breaks the basic TinyOS pattern +of a tight coupling between split-phase commands and their completion +events, as the command is in ADC but the completion event is in +ADCError.

    +

    All of these complications can make it difficult to write high-level +code that is sensor independent, unless the sensor is a simple ADC +reading. Sensors, when possible, should follow an approach similar to +the HAA[_haa], where they have sensor- or sensor-class-specific +interfaces for high performance or special case use, but also simple +and common interfaces for basic and portable use. Providing a +telescoping sensor abstraction allows both classes of use.

    +
    +
    +

    3. Sensors in TinyOS 2.x

    +

    TinyOS 2.x has several sensor-independent interfaces, which cover a +range of common use cases. These interfaces can be used to write a +Source- or Sink-Independent Driver (SID). A SID is source/sink +independent because its interfaces do not themselves contain +information on the sort of sensor or device they sit on top of. A SID +SHOULD provide one or more of the interfaces described in this +section, depending on its expected uses and underlying data model.

    +
    +

    3.1 Split-Phase Small Scalar I/O

    +

    The first set of interfaces can be used for low-rate scalar I/O:

    +
    +interface Read<val_t> {
+  command error_t read();
+  event void readDone( error_t result, val_t val );
+}
+
+interface Write<val_t> {
+  command error_t write( val_t val );
+  event void writeDone( error_t result );
+}
+
    +

    A component that provides both read and write functionality might want +to use a combined version of the interface, to reduce the amount of +wiring required by the client application:

    +
    +interface ReadWrite<val_t> {
+  command error_t read();
+  event void readDone( error_t result, val_t val );
+
+  command error_t write( val_t val );
+  event void writeDone( error_t result );
+}
+
    +

    A component that can support concurrent reads and writes SHOULD +provide separate Read/Write interfaces. A component whose internal +logic will cause a read to fail while a write is pending or a write to +fail while a read is pending MUST provide a ReadWrite interface.

    +

    If the result parameter of the Read.readDone and +ReadWrite.readDone events is not SUCCESS, then the memory of the +val parameter MUST be filled with zeroes.

    +

    Examples of sensors that would be suited to this class of interface +include many basic sensors, such as photo, temp, voltage, and ADC +readings.

    +
    +
    +

    3.2 Split-Phase Large Scalar I/O

    +

    If the SID's data object is too big to be passed efficienctly on the +stack, it can provide read/write interfaces that pass parameters by +pointer rather than value:

    +
    +interface ReadRef<val_t> {
+  command error_t read( val_t* val );
+  event void readDone( error_t result, val_t* val );
+}
+
+interface WriteRef<val_t> {
+  command error_t write( val_t* val );
+  event void writeDone( error_t result, val_t* val );
+}
+
+interface ReadWriteRef<val_t> {
+  command error_t read( val_t* val );
+  event void readDone( error_t result, val_t* val );
+
+  command error_t write( val_t* val );
+  event void writeDone( error_t result, val_t* val );
+}
+
    +

    The caller is responsible for allocating storage pointed to by the val +pointer which is passed to read() or write(). The SID MUST then +take ownership of the storage, store a new value into it or copy a +value out of it, and then relinquish it before signaling readDone() or +writeDone(). If read or write() returns SUCCESS then the caller MUST +NOT access or modify the storage pointed to by the val pointer until +it handles the readDone() or writeDone() event.

    +

    As is the case with the parameters by value, whether a component +provides separate ReadRef and WriteRef or ReadWriteRef affects the +concurrency it allows. If a component can allow the two to execute +concurrently, then it SHOULD provide separate ReadRef and WriteRef +interfaces. If the two cannot occur concurrently, then it MUST provide +ReadWriteRef.

    +

    If the result parameter of the ReadRef.readDone and +ReadWriteRef.readDone events is not SUCCESS, then the memory the +val parameter points to MUST be filled with zeroes.

    +

    Examples of sensors that are suited to this set of interfaces include +those that generate multiple simultaneous readings for which +passing by value is inefficient, such as a two-axis digital +accelerometer.

    +
    +
    +

    3.3 Metadata and Shifting

    +

    Generally, simple types are made up of octets. However, sensor values +often have levels of precision besides a multiple of 8. Any value +contained in a simple type MUST be left shifted so that it covers as +much of the type's range as possible. For example, if a 12-bit ADC +reading is presented as a 16-bit Read interface:

    +
    +component DemoSensorC {
+  provides interface Read<uint16_t>;
+}
+
    +

    then the 12-bit value MUST be shifted left so that its range is 0x0000 +- 0xfff0, rather than 0x0000 - 0x0fff. A device MAY specify the +precision of one of its interfaces with the DeviceMetadata interface:

    +
    +interface DeviceMetadata {
+  command uint8_t getSignificantBits();
+}
+
    +

    The name of the instance of DeviceMetadata SHOULD clearly indicate +which interface it corresponds to.

    +
    +
    +

    3.4 Single-Phase Scalar I/O

    +

    Some devices may have their state cached or readily available. In +these cases, the device can provide a single-phase instead of +split-phase operation. Examples include a node's MAC address (which +the radio stack caches in memory), profiling information (e.g., +packets received), or a GPIO pin. These devices MAY use these +single-phase interfaces:

    +
    +interface Get<val_t> {
+  command val_t get();
+}
+
+interface Set<val_t> {
+  command void set( val_t val );
+}
+
+interface GetSet<val_t> {
+  command val_t get();
+  command void set( val_t val );
+}
+
    +

    If a device's data object is readily available but still too large to +be passed on the stack, then the device MAY use these interfaces:

    +
    +interface GetRef<val_t> {
+  command error_t get( val_t* val );
+}
+
+interface SetRef<val_t> {
+  command error_t set( val_t* val );
+}
+
+interface GetSetRef<val_t> {
+  command error_t get( val_t* val );
+  command error_t set( val_t* val );
+}
+
    +
    +
    +

    3.5 Notification-Based Scalar I/O

    +

    Some sensor devices represent triggers, rather than request-driven +data acquisition. Examples of such sensors include switches, +passive-IR (PIR) motion sensors, tone detectors, and smoke +detectors. This class of event-driven sensors can be presented with +the Notify interface:

    +
    +interface Notify<val_t> {
+  command error_t enable();
+  command error_t disable();
+  event void notify( val_t val );
+}
+
    +

    The Notify interface is intended for relatively low-rate events (e.g., +that can easily tolerate task latencies). High-rate events may require +more platform- or hardware-specific async interfaces.

    +

    The enable() and disable() command enable and disable notification +events for the interface instance used by a single particular +client. They are distinct from the sensor's power state. For example, +if an enabled sensor is powered down, then when powered up it MUST +remain enabled.

    +

    The val parameter is used as defined in the Read interface.

    +
    +
    +

    3.7 Split-Phase Streaming I/O

    +

    Some sensors can provide a continuous stream of readings, and some +actuators can accept a continuous stream of new data. Depending on the +rate needed and jitter bounds that higher level components can +tolerate, it can be useful to be able to read or write readings in +blocks instead of singly. For example, a microphone or accelerometer +may provide data at a high rate that cannot be processed quickly +enough when each new reading must be transferred from asynchronous to +synchronous context through the task queue.

    +

    The ReadStreaming interface MAY be provided by a device that can +provide a continuous stream of readings:

    +
    +interface ReadStream<val_t> {
+
+  command error_t postBuffer( val_t* buf, uint16_t count );
+
+  command error_t read( uint32_t usPeriod );
+
+  event void bufferDone( error_t result,
+                         val_t* buf, uint16_t count );
+
+  event void readDone( error_t result );
+}
+
    +

    The postBuffer command takes an array parameterized by the sample +type, and the number of entries in that buffer. A driver can then +enqueue the buffer for filling. The client can call postBuffer() more +than once, to "pre-fill" the queue with any number of buffers. The +size of the memory region pointed to by the buf parameter MUST be at +least as large as the size of a pointer on the node architecture plus +the size of the uint16_t count argument. This requirement supports +drivers that may store the queue of buffers and count sizes by +building a linked list.

    +

    After posting at least one buffer, the client can call read() with a +specified sample period in terms of microseconds. The driver then +begins to fill the buffers in the queue, signalling the bufferDone() +event when a buffer has been filled. The client MAY call postBuffer() +after read() in order to provide the device with new storage for +future reads.

    +

    If the device ever takes a sample that it cannot store (e.g., no +buffers are available), it MUST signal readDone(). If an error occurs +during a read, then the device MUST signal readDone() with an +appropriate failure code. Before a device signals readDone(), it MUST +signal bufferDone() for all outstanding buffers. If a readDone() is +pending, calls to postBuffer MUST return FAIL.

    +

    The following interface can be used for bulk writes:

    +
    +interface WriteStream<val_t> {
+
+  command error_t postBuffer( val_t* buf, uint16_t count );
+
+  command error_t write( uint32_t period );
+
+  event void bufferDone( error_t result,
+                         val_t* buf, uint16_t count );
+
+  event void writeDone( error_t result );
+}
+
    +

    postBuffer() and bufferDone() are matched in the same way described +for the ReadStream interface, as are write() and writeDone().

    +
    +
    +
    +

    4. Summary

    +

    According to the design principles described in the HAA[_haa], authors +should write device drivers that provide rich, device-specific +interfaces that expose the full capabilities of each device. In +addition, authors can use the interfaces described in this memo to +provide a higher-level device-independent abstractions: SIDs. By +providing such an abstraction, driver authors can support developers +who only need simple interfaces, and can reduce the effort needed to +connect a sensor into a more general system.

    +
    +
    +

    5. Author's Address

    +
    +
    Gilman Tolle
    +
    2168 Shattuck Ave.
    +
    Arched Rock Corporation
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 981 8714
    +
    email - gtolle@archedrock.com
    +

    +

    +
    Philip Levis
    +
    358 Gates
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +

    +

    +
    David Gay
    +
    2150 Shattuck Ave, Suite 1300
    +
    Intel Research
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 495 3055
    +
    email - david.e.gay@intel.com
    +

    +
    +
    +
    + + diff --git a/doc/html/tep115.html b/doc/html/tep115.html new file mode 100644 index 00000000..98ca5a71 --- /dev/null +++ b/doc/html/tep115.html @@ -0,0 +1,871 @@ + + + + + + +Power Management of Non-Virtualised Devices + + + + +
    +

    Power Management of Non-Virtualised Devices

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:115
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Vlado Handziski, Kevin Klues, Jan-Hinrich Hauer, Phil Levis
    Draft-Created:11-Jan-2006
    Draft-Version:1.1.2.3
    Draft-Modified:2006-05-16
    Draft-Discuss:TinyOS Developer List +<tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with TEP +1.

    +
    +
    +

    Abstract

    +

    This memo documents how TinyOS 2.x manages the power state of physical +(not virtualised) abstractions.

    +
    +
    +

    1. Introduction

    +

    The energy resources on a typical TinyOS platform are limited, so +every effort should be made to put all devices on a given platform +into their lowest possible power-consumption states as often as +possible. Depending on the device type, selecting the correct +power-consumption state could be as simple as switching between on and +off states, or could involve selecting the optimum state from among +several. Choosing the best power-consumption state requires making +tradeoffs between various factors such as power consumption, fidelity, +performance, and wake-up latency.

    +

    Because of the large difference in the number of supported power- +consumption states that could potentially be present on any given +device, as well as the complexity in keeping track of the state +information needed for safe execution of any sort of system wide +power-control algorithm, a unified power management strategy for all +devices on all possible platforms is simply infeasible. Developing +such a solution would most likely be overly complex and in some cases +even suboptimal. TinyOS 2.x, therefore, takes the approach of +defining several different classes of devices for which several +different power-management strategies have been optimized. [TEP112], +for example, details how TinyOS 2.x manages the multiple power- +consumption states for microcontrollers. This document, in turn, +details the support for managing the physical and dedicated and +physical and shared device classes as defined in [TEP108]. Devices +belonging to these classes often have only two power consumption +states (on and off), and can therefore be treated differently than +devices that have multiple power consumption states. Additionally, it +turns out that, in practice, TinyOS software often just uses the two +most useful of the many power states in these cases.

    +

    Various policies can be implemented on top of these two classes of +devices that decide exactly when a device should be powered on or off. +For physical and shared devices, for example, a power management +policy could be written that explicitly powers a device on and off +whenever the higher level component that uses it no longer requires +it. Another policy, however, might decide to defer the power down of +the device for a a few milliseconds if its wake-up time is large +enough and it is likely that the device will be needed again sometime +in the near future. A similar set of policies could be implemented +for physical and shared devices, except that an attempt to power +down such a device would not occur until all components using it had +signalled that they no longer needed it. Providing these sorts of +policies cause devices belonging to one of these two classes to become +virtualized in the sense that their power states are automatically +handled. Any higher level components connecting to one of these +virtual devices need only signify when they require the use of the +device and when they don't. The time at which the device actually +becomes powered on or off, is left up to the power managment policy +being used.

    +

    In order to provide the building blocks for implementing such power +managment policies on top of physical and dedicated and physical +and shared devices, TinyOS 2.x defines two different power management +models that devices belonging to one of these two classes must adhere +to: the explicit power management model and the implicit power +management model.

    +
    +
    +

    2. Power Management Models

    +

    The explicit power management model provides a means for explicitly +controlling the power state of a physical device by some higher level +component. Whenever this higher level component tells the device to +power up or down it does so without delay. This model can be +particularly useful when the control information driving the selection +of the proper power state of a device is external to that device.

    +

    The implicit power management model, on the other hand, provides a +means for allowing the power state of a device to be controlled from +within the device itself. Devices following this model are never +explicitly powered up or down by some external component, but rather +require some policy to be defined that decides exactly when their +power states should be changed. This policy could exist natively on +the hardware of the physical device itself, or be implemented on top +of some lower level abstraction of the physical device which adheres +to the explicit power management model.

    +

    Just like in TinyOS 1.x, StdControl and SplitControl interfaces have +been defined by TinyOS 2.x (along with a third interface, +AsyncStdControl) in order to control the on and off states of devices +that follow the explicit power management model. One of these three +interfaces SHOULD be provided by any component wrapping a hardware +device that supports switching between an on and off state. The +selection of the right interface depends on the latencies involved in +changing between these two power states as well as the nature of the +code (sync or async) executing any of the interfaces commands.

    +

    Devices implemented according to the implicit power management +model, on the other hand, MAY expose one of these three interfaces, +but they are not required to do so. Virtual abstractions of physical +and dedicated devices that implement power management policies +according to this model, will indeed provide one of the three +derivatives of the StdControl interface. The interface provided will +no longer be used to explicitly power the device on and off, but +rather allow the power management policy to determine whether the +dedicated user of the device requires the device to be powered or not. +It will then make its own decision as to which state to put the device +in.

    +

    For physical and shared devices, the information required to +determine if one of its many users require it to be powered or not can +be inferred through information provided by the Resource interface +they provide. Because of this, no StdControl-like interface needs to +be provided, and the power management policy can act accordingly +whenever users request of release the device.

    +
    +

    2.1 Explicit Power Management using StdControl

    +

    When a devices powerup and powerdown times are negligible, they SHOULD +provide the StdControl interface as defined below:

    +
    +interface StdControl {
+  command error_t start();
+  command error_t stop();
+}
+
    +

    An external component MUST call StdControl.start() to power a +device on and StdControl.stop() to power a device off. Calls to +either command return SUCCESS or FAIL.

    +

    Upon the successful return of a call to StdControl.start(), a +device MUST be completely powered, and calls to commands of other +interfaces implemented by the device abstraction CAN succeed.

    +

    Upon the successful return of a call to StdControl.stop(), a +device MUST be completely powered down, and any subsequent operation +requests through calls to commands of other interfaces implemented by +that device abstraction MUST return FAIL or EOFF.

    +

    If a device is not able to complete the StdControl.start() or +StdControl.stop() requests for any reason, they MUST return FAIL.

    +

    Based on these specifications, this matrix describes the valid return +values of calls based on the compoenent's power state:

    + +++++ + + + + + + + + + + + + + + + + + + + + +
    CallOnOff
    StdControl.start()SUCCESSSUCCESS or FAIL
    StdControl.stop()SUCCESS or FAILSUCCESS
    operationdependsFAIL or EOFF
    +

    Devices adhereing to this power management model would provide this +interface as shown below:

    +
    +configuration DeviceC {
+  provides {
+    interface Init;
+    interface StdControl;  //For Power Management
+    ....
+  }
+}
+
    +
    +
    +

    2.2 Power Management with SplitControl

    +

    When a devices powerup and powerdown times are non-negligible, the +SplitControl interface MUST be used in place of the StdControl +interface. The definition of this interface can be seen below:

    +
    +interface SplitControl {
+  command error_t start();
+  event void startDone(error_t error);
+  command error_t stop();
+  event void stopDone(error_t error);
+}
+
    +

    An external component MUST call SplitControl.start() to power a +device on and SplitControl.stop() to power a device off. Calls to +either command return one of SUCCESS, FAIL, or EBUSY.

    +

    Successful calls to SplitControl.startDone() MUST signal one of +SplitControl.startDone(SUCCESS) or +SplitControl.startDone(FAIL).

    +

    Successful calls to SplitControl.stopDone() MUST signal one of +SplitControl.stopDone(SUCCESS) or SplitControl.stopDone(FAIL).

    +

    Upon signalling either a SplitControl.startDone(SUCCESS) or a +SplitControl.stopDone(FAIL) event, a device MUST be completely +powered, and operation requests through calls to commands of other +interfaces implemented by the device abstraction SHOULD succeed.

    +

    Upon signalling either a SplitControl.stopDone(SUCCESS) or a +SplitControl.startDone(FAIL) event, a device MUST be completely +powered down, and any subsequent calls to commands of other interfaces +implemented by the device abstraction MUST return EOFF or FAIL.

    +

    If a device is not able to complete the SplitControl.start() or +SplitControl.stop() requests for any reason, they MUST return +FAIL.

    +

    Calls to either StdControl.start() or StdControl.stop() while +a start or top operattion is pending MUST return an EBUSY.

    + +++++++ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    CallOnOffStartingStopping
    SplitControl.start()SUCCESSSUCCESS +FAILEBUSYEBUSY
    SplitControl.stop()SUCCESS +FAILSUCCESSEBUSYEBUSY
    operationdependsFAIL +EOFF +EOFFFAIL +EOFF +SUCCESSFAIL +EOFF
    +

    Devices adhereing to this power management model would provide this +interface as shown below:

    +
    +configuration DeviceC {
+  provides {
+    interface Init;
+    interface SplitControl; \\ For Power Management
+    ....
+  }
+}
+
    +
    +
    +

    2.3 Power Management with AsyncStdControl

    +

    The commands and the events of the StdControl and the SplitControl +interfaces are synchronous and can not be called from within +asynchronous code (such as interrupt service routines, etc.). For the +cases when the power state of the device needs to be controlled from +within asynchronous code, the AsyncStdControl interface MUST be used +in place of the StdControl interface. The definition of this +interface can be seen below:

    +
    +interface AsyncStdControl {
+  async command error_t start();
+  async command error_t stop();
+}
+
    +

    All of the semantics that held true for devices providing the +StdControl interface also hold for this interface.

    +

    Devices adhereing to this power management model would provide this +interface as shown below:

    +
    +configuration DeviceC {
+  provides {
+    interface Init;
+    interface AsyncStdControl; \\ For Power Management
+    ....
+  }
+}
+
+
+.. Note::
+
+Determining exactly when to use the AsyncStdControl interface
+instead of simply posting a task and using the StdControl interface
+can be tricky.  One must consider the advantages and disadvantages
+of using one interface over the other.  How complex is the code
+being I am trying to execute?  Do I really want to execute all of
+my startup code in async context?  Do I gain some performance in
+terms of startup latency or code size if I run my startup code in
+async context?  These are just a few of the factors that need to be
+considered when making this decision, and unfortunately there just
+is no easy answer. Note that a component with an AsyncStdControl
+cannot call SplitControl or StdControl. In practice, AsyncStdControl
+is used for low-level hardware resources.
+
    +
    +
    +
    +

    3. Power management policies

    +

    While the explicit power management model provides the basic means +for controlling the power state of the device, it is void of any +policy about who, when, or how the power of the device should be +managed. This does not represent a large problem for the simple case +of physical and dedicated devices, but can become crucial for +non-trivial cases involving complex interdependencies between devices +being controlled by multiple users.

    +

    For example, if component A is using two devices, B and C, +what happens with B and C when one calls StdControl.stop() on +the top component A? The above problem has its dual in the case of +shared devices. Assuming that device A is shared by components B +and C, the question exists as to when device A can be powered +down?

    +

    The complex nature of the problem is evident from the number of +unexpected behaviors in TinyOS 1.x involving StdControl. On several +platforms, one of the SPI buses is shared between the radio and the +flash device. On some of them, issuing StdControl.stop() on the +radio results in a cascaded SPI bus becoming disabled, rendering the +communication with the flash impossible. Of course, the right policy +would involve tracking the users of the SPI bus and powering it off +only once both the radio and the flash devices wer no longer using +it. Conversely, the SPI bus should be powered on whenever there is at +least one active user.

    +

    The selection of the right policy is a complex task that depends on +the nature of the devices, their interdependency, as well as on the +application requirements. For the cases when some of these features +are known a-priori or are restricted in some sense, it is preferable +that the system provide architectural support for enforcing a +meaningful default power-management policy instead of simply passing +the task to the application programmer to be solved on a case-by-case +basis.

    +

    TinyOS 2.x provides two contexts of restricted resource +interdependency where such a default power-management policy can be +offered. For physical and shared resources (defined in [TEP108]) +(and covered by the Hardware Abstraction Architecture [TEP2]), TinyOS +2.x provides a flexible implicit power management model that is +tightly coupled with the arbiter concept and uses the basic +mechanisms offered by the explicit power management scheme.

    +
    +

    4. Implicit Power Management for Physical and Shared Resources

    +

    The physical and shared resource class defined in Section 2.3 of +[TEP108], provides a well defined component interdependency, where a +single resource is shared among multiple clients. This relationship +enables definition of a simple default power-management policy that +powers the resource off when no potential users are waiting for access +to the resource. Conversely, the resource is powered on whenever a +client requests its use. When the resource being controlled happens +to be an actual physical device, the implicit power management model +for physical devices as described in section two applies.

    +

    The realization of a specific power-control policy for shared reources +does not need to be resource specific. Just as generic arbiters are +offered in TinyOS 2.x to provide the arbitration functionality +required by shared resources, generic power management policies are +also offered to allow the power management of devices to be automated.

    +

    The PowerManager component implementing one of these polices acts as +the lowest-priority user of the shared resource. In contrast to +"normal" clients, the PowerManager interacts with the resource +arbiter using the richer ResourceController interface:

    +
    +interface ResourceController {
+    async command error_t request();
+    async command error_t immediateRequest();
+    event void granted();
+    async command void release();
+    async event void requested();
+    async event void idle();
+}
+
    +

    Acting as a lowest priority client, the Power Manager waits for the +ResourceController.idle() event to be signalled before trying to +gain ownership over the resource. It does so using the +ResourceController.immediateRequest() command in order to gain +control of the resource as quickly as possible.

    +

    Once it owns the resource, the PowerManager is free to execute its +power-management policy using the mechanisms provided by the resource +via the explicit power-management model. Different managers can +implement different policies. In the simplest case, this would involve +an immediate power-down via one of the .stop() commands. When the +power-state transition involves non-negligible costs in terms of +wake-up latency or power consumption, the PowerManager might revert +to a more intelligent strategy that tries to reduce these effects. +One strategy might involve using a delayed power-down timer to defer +the powers-down of a resource to some later point in time unless some +normal-priority client requests the device in the meantime.

    +

    Regardless of the power-off policy, the PowerManager remains owner +of the resource as long as the resource is not requested by a normal +user. When one of these "normal" users finally makes a request, the +PowerManager component will receive a +ResourceController.requested() from the arbiter it is associated +with. Upon receiving this event, the PowerManager MUST power the +resource back on (in case it was powered-off) through one of the +explicit power-management interfaces provided by the lower level +abstraction of the physical device. The PowerManager can release the +ownership of the resource (using the ResourceController.release() +command) ONLY after the resource has been fully powered-on.

    +

    Modeling devices as shared resources and allowing them to be +controlled in the way described here, solves the problems outlined in +section 3 regarding how to keep track of who, when, and how the +powerdown of nested resources should proceed. The PowerManager +component answers the question of who, the combination of the power +management policy being used and the reception of the +ResourceController.idle() and ResourceController.requested() +events answers the question of when, and through one of the explicit +power-management interfaces provided by the lower level abstraction +of the physical device answers how. As long as the device resource at +the bottom of a large set of nested resource users is released at the +proper time, the power mananger will ba ble to power down its device +appropriately.

    +

    Using the model described above, a device resource that follows the +implicitly powere management model could be built as shown below:

    +
    +module MyFlashP {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface Resource;
+    ...
+  }
+}
+implementation {
+...
+}
+
+generic module PowerManagerC(uint8_t POWERDOWN_DELAY) {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface SplitControl;
+    interface ResourceController;
+  }
+}
+implementation {
+...
+}
+
+#define MYFLASH_RESOURCE "MyFlash.resource"
+configuration MyFlashC {
+  provides {
+    interface Init;
+    interface Resource;
+  }
+}
+implementation {
+  components new PowerManagerC(MYFLASH_POWERDOWN_DELAY)
+           , FcfsArbiter(MYFLASH_RESOURCE)
+           , MyFlashP;
+
+  Init = MyFlashP;
+  Resource = FcfsArbiter;
+
+  PowerManagerC.ResourceController -> FcfsArbiter;
+  PowerManagerC.SplitControl -> MyFlashP;
+}
+
    +

    This example implementation is built out of three components. The +first component (MyFlashP) follows the explicit power management +model for defining the interfaces to the physical flash device. The +second component (PowerManagerC) is the generic powermanager +component that will be used to implement the specific power management +policy for this device. The third component (MyFlashC) is the +configuration file that wires together all of the components required +by the implementation of device adhereing to the implicit power +management model. It includes the MyflashP and PowerManagerC +components, as well as an arbiter component for managing shared users +of the device. Notice how the powermanager is wired to both the +resourcecontroller interface provided by the arbiter, and the +SplitControl interface provided by the flash. All normal users of the +resource are directly connected to the resource interface provided by +the arbiter. As outlined above, the PowerManagerC component will use +the events signalled through the ResourceController interface from the +arbiter to determine when to make calls to the commands provided by +the SplitControl interface coming from the FlashP component in order +to power it up and power it down.

    +
    +
    +
    +

    5. Sample Power Managers: PowerManagerC and DeferredPowerManagerC

    +

    TinyOS 2.x currently has two sample power management policies in +lib/power. Each policy has three implementations: StdControl, +SplitControl, and AsyncStdControl. The two policies are immediate +and deferred. T

    +
    +
    +

    6. Author's Address

    +
    +
    Vlado Handziski
    +
    Sekr FT5
    +
    Einsteinufer 25
    +
    10587 Berlin
    +
    GERMANY
    +

    +
    phone - +49 30 314 23831
    +
    email - handzisk@tkn.tu-berlin.de
    +

    +
    Kevin Klues
    +
    503 Bryan Hall
    +
    Washington University
    +
    St. Louis, MO 63130
    +

    +
    phone - +1-314-935-6355
    +
    email - klueska@cs.wustl.edu
    +

    +
    Jan-Hinrich Hauer
    +
    Sekr FT5
    +
    Einsteinufer 25
    +
    10587 Berlin
    +
    GERMANY
    +

    +
    phone - +49 30 314 23813
    +
    email - hauer@tkn.tu-berlin.de
    +

    +
    Philip Levis
    +
    358 Gates Hall
    +
    Stanford University
    +
    Stanford, CA 94305-9030
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [TEP2]TEP 2: Hardware Abstraction Architecture.
    + + + + + +
    [TEP108](1, 2) TEP 108: Resource Arbitration.
    + + + + + +
    [TEP112]TEP 112: Microcontroller Power Management.
    +
    +
    + + diff --git a/doc/html/tep116.html b/doc/html/tep116.html new file mode 100644 index 00000000..f0171631 --- /dev/null +++ b/doc/html/tep116.html @@ -0,0 +1,921 @@ + + + + + + +Packet Protocols + + + + +
    +

    Packet Protocols

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:116
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis
    Draft-Created:10-Dec-2004
    Draft-Version:1.1.2.10
    Draft-Modified:2006-06-22
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    The memo documents the interfaces used by packet protocol components in +TinyOS 2.x as well as the structure and implementation of ActiveMessageC, +the basic data-link HIL component. It also documents the virtualized +active message interfaces AMSender and AMReceiver.

    +
    +
    +

    1. Introduction

    +

    Sensor nodes are network-centric devices. Much of their software +complexity comes from network protocols and their interactions. +In TinyOS, the basic network abstraction is an active message, +a single-hop, unreliable packet. Active messages have a destination +address, provide synchronous acknowledgements, and can be of +variable length up to a fixed maximum size. They also have a +type field, which is essentially a protocol identifier for +components built on top of this abstraction.

    +

    In TinyOS 1.x, the component GenericComm provides interfaces for +transmitting and receiving active messages:

    +
    +configuration GenericComm {
+  provides {
+    interface StdControl as Control;
+    interface SendMsg[uint8_t id];
+    interface ReceiveMsg[uint8_t id];
+    command uint16_t activity();
+  }
+  uses {
+    event result_t sendDone();
+  }
+}
+
    +

    This component, while simple, has several issues. First, it has the +activity() commmand, which does not have a single caller in the entire +TinyOS tree. This command requires GenericComm to allocate a +timer, wasting CPU cycles and RAM.

    +

    Second, it does not allow a node to receive packets besides +those destined to it. Several network +protocols (e.g., MintRoute [1], TAG [2]) take advantage +of snooping on these packets for a variety of improvements in efficiency or +performance. This has led to the creation of GenericCommPromiscuous, +whose Receive interface does not distinguish +between packets received that were addressed to the node and +packets received that were addressed to other nodes. Choosing +one of the two implementations is a global decision across +an application. There is a way to enable both reception +semantics at the same time for a different protocols, +but they require a creative use of default event handlers.

    +

    Third, it assumes that components will directly access the packet +structure, the accepted approach in TinyOS 1.x. However, directly +accessing packet structures introduces unforseen dependencies: +a component that names a header field, for example, binds itself +to data link layers that have a field with that name. Similarly, +components on top of GenericComm directly access the data payload +of a packet.

    +

    TEP 111 documents the structure of a TinyOS 2.x packet buffer [3]. +This TEP documents the interfaces used to access packet buffers, +as well as ActiveMessageC, the basic data-link packet communication +HIL.

    +
    +
    +

    2. Communication interfaces

    +

    Packet-level communication has three basic classes of interfaces. +Packet interfaces are for accessing message fields and payloads. +Send interfaces are for transmitting packets, and are +distinguished by their addressing scheme. +Finally, the Receive interface is for handling packet reception events.

    +
    +

    2.1 Packet interfaces

    +

    The basic TinyOS 2.x message buffer type is message_t, which is +described in TEP 111. message_t right-justifies data-link +headers to the data payload so that higher-level components can +pass buffers between different data link layers without having +to move data payloads. This means that the data payload of a +data link frame is always at a fixed offset of a message_t.

    +

    Once protocols layer on top of each other, the data +payload for components on top of the data link layer are +no longer at a fixed offset. Where a component can put its +header or data depends on what headers underlying components +introduce. Therefore, in order to be able to find out where +it can put its data, it must query the components below it. +The Packet interface defines this mechanism:

    +
    +interface Packet {
+  command void clear(message_t* msg);
+  command uint8_t payloadLength(message_t* msg);
+  command void setPayLoadLength(message_t* msg, uint8_t len);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t* len);
+}
+
    +

    A component can obtain a pointer to its data region within a packet by +calling getPayload() the optional len argument is for also +obtaining the size of the data region. A provider of a Packet +interface MUST check if len is NULL and ignore it if it is. A +component can also obtain the size of the data region with a call to +payloadLength.

    +

    A component can set the payload length with +setPayLoadLength. As Send interfaces always include a length +parameter in their send call, this command is not required for +sending, and so is never called in common use cases. Instead, +it is a way for queues and other packet buffering components +to store the full state of a packet without requiring additional +memory allocation.

    +

    The distinction between payloadLength and maxPayloadLength +comes from whether the packet is being received or sent. In the receive +case, determining the size of the existing data payload is needed; +in the send case, a component needs to know how much data it can put +in the packet.

    +

    The Packet interface assumes that headers have a fixed size. +It is difficult to return a pointer into the data region when its +position will only be known once the header values are bound.

    +

    Generally, an incoming call to the Packet interface of a protocol +has an accompanying outgoing call to the Packet interface of the +component below it. The one exception to this is the data link +layer. For example, if there is a network that introduces +16-bit sequence numbers to packets, it might look like this:

    +
    +generic module SequenceNumber {
+  provides interface Packet;
+  uses interface Packet as SubPacket;
+}
+implementation {
+  typedef nx_struct seq_header {
+    nx_uint16_t seqNo;
+  } seq_header_t;
+
+  enum {
+    SEQNO_OFFSET = sizeof(seq_header_t),
+  };
+
+  command void Packet.clear(message_t* msg) {
+    uint8_t len;
+    void* payload = call SubPacket.getPayload(msg, &len);
+    memset(payload, len, 0);
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return SubPacket.payloadLength(msg) - SEQNO_OFFSET;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    SubPacket.setPayloadLength(msg, len + SEQNO_OFFSET);
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return SubPacket.maxPayloadLength(msg) - SEQNO_OFFSET;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len);
+    if (len != NULL) {
+      *len -= SEQNO_OFFSET;
+    }
+    return payload + SEQNO_OFFSET;
+  }
+}
+
    +

    The above example is incomplete: it does not include the code for +the send path that increments sequence numbers.

    +

    In practice, calls to Packet are very efficient even if they +pass through many components before reaching the data link +layer. nesC's inlining means that in almost all cases +there will not actually be any function calls, and since payload +position and length calculations all use constant offsets, +the compiler generally uses constant folding to generate a +fixed offset.

    +

    The Packet interface provides access to the one field all packet +layers have, the data payload. Communication layers can add additional +header and footer fields, and may need to provide access to these +fields. If a packet communication component provides access to header +and/or footer fields, it MUST do so through an interface. The interface +SHOULD have a name of the form XPacket, where X is a name that +describes the communication layer. For example, active message components +provide both the Packet interface and the AMPacket interface. The latter +has this signature:

    +
    +interface AMPacket {
+  command am_addr_t address();
+  command am_addr_t destination(message_t* amsg);
+  command void setDestination(message_t* amsg, am_addr_t addr);
+  command bool isForMe(message_t* amsg);
+  command am_id_t type(message_t* amsg);
+  command void setType(message_t* amsg, am_id_t t);
+}
+
    +

    The command address() returns the local AM address of the +node. AMPacket provides accessors for its two fields, destination and +type. It does not provide commands to set these fields, as they are +set in the sending call path (see Section 2.3). The setDestination +and setType commands fulfill a similar purpose to +Packet.setLength.

    +
    +
    +

    2.2 Sending interfaces

    +

    There are multiple sending interfaces, corresponding to different +addressing modes. For example, address-free protocols, such as +collection routing, provide the basic Send interface. Active +message communication has a destination of an AM address, so +it provides the AMSend interface. This, for example, is the +basic, address-free Send interface:

    +
    +interface Send {
+  command error_t send(message_t* msg, uint8_t len);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg);
+}
+
    +

    while this is the AMSend interface:

    +
    +interface AMSend {
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg);
+}
+
    +

    Sending interfaces MUST include these four commands and one event. +The duplication of some of the commands in Packet is solely for ease +of use: maxPayloadLength and getPayload MUST behave +identically as Packet.maxPayloadLength and Packet.getPayload, +with the exception that the latter has no length parameter (it should +behave as if the length parameter of the Packet call were +NULL). Their inclusion is so that components do not have to wire to +both Packet and the sending interface for basic use cases.

    +
    +
    +

    2.3 Receive interface

    +

    Receive is the interface for receiving packets. It has this signature:

    +
    +interface Receive {
+  event message_t* receive(message_t* msg, void* payload, uint8_t len);
+  command void* getPayload(message_t* msg, uint8_t* len);
+  command uint8_t payloadLength(message_t* msg);
+}
+
    +

    A call to Receive.getPayload() MUST behave identically to a call +to Packet.getPayload(). The receive() event's payload +parameter MUST be identical to what a call to getPayload() would +return, and the len parameter MUST be identical to the length that +a call to getPayload would return. These parameters are for +convenience, as they are commonly used by receive handlers, and their +presence removes the need for a call to getPayload(), while +getPayload() is a convenience so a component does not have to wire +to Packet. The command payloadLength has a similar motivation +and the same semantics as its twin in Packet.

    +

    Receive has a buffer-swap policy. The handler of the event MUST return +a pointer to a valid message buffer for the signaler to use. This +approach enforces an equilibrium between upper and lower packet +layers. If an upper layer cannot handle packets as quickly as they +are arriving, it still has to return a valid buffer to the lower +layer. This buffer could be the msg parameter passed to it: it +just returns the buffer it was given without looking at it. Following +this policy means that a data-rate mismatch in an upper-level component +will be isolated to that component. It will drop packets, but it will +not prevent other components from receiving packets. If an upper +layer did not have to return a buffer immediately, then when an +upper layer cannot handle packets quickly enough it will end up +holding all of them, starving lower layers and possibly preventing +packet reception.

    +

    A user of the Receive interface has three basic options when it +handles a receive event:

    +
      +
    1. Return msg without touching it.
      2. +
    2. Copy some data out of payload and return msg.
      3. +
    3. Store msg in its local frame and return a different message_t* for the lower layer to use.
      4. +
    +

    These are simple code examples of the three cases:

    +
    +// Case 1
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  return msg;
+}
+
+// Case 2
+uint16_t value;
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  if (len >= sizeof(uint16_t)) {
+    nx_uint16_t* nval = (nx_uint16_t*)payload;
+    value = *nval;
+  }
+  return msg;
+}
+
+//Case 3
+message_t* ptr;
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  message_t* tmp = ptr;
+  ptr = msg;
+  post processTask();
+  return tmp;
+}
+
    +

    Because of case 3), a lower layer MUST respect the buffer swap semantics +and use the pointer returned from receive. The pointer passed as +a parameter to receive MUST NOT be touched, used, or stored after +the signaling of receive.

    +
    +
    +

    2.4 Dispatch

    +

    A packet protocol MAY have a dispatch identifier. This generally manifests +as the protocol component provided parameterized interfaces (rather than +a single interface instances). A dispatch identifier allows multiple +services to use a protocol independently. If a protocol provides a +dispatch mechanism, then each dispatch identifier SHOULD correspond to +a single packet format: if an identifier corresponds to multiple packet +formats, then there is no way to disambiguate them. Packets whose internal +structure depends on their fields (for example, +a packet that has a control field which indicates which optional fields +are present) do not pose such problems.

    +
    +
    +
    +

    3. HIL: ActiveMessageC

    +

    A platform MUST provide ActiveMessageC as a basic HIL to +packet-level communication. ActiveMessageC provides a best-effort, +single-hop communication abstraction. Every active message has a +16-bit destination address and an 8-bit type. There is one reserved +destination address, AM_BROADCAST_ADDR, which has the value +of 0xffff. ActiveMessageC has the following signature:

    +
    +configuration ActiveMessageC {
+  provides {
+    interface Init;
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+
    +

    The Receive interface is for packets destined to the node, while +the Snoop interface is for packets destined to other nodes. A +packet is destined for a node if its destination AM address is +either the AM broadcast address or an address associated with +the AM stack. Different link layers have different snooping +capabilities. The Snoop interface does not assume always-on +listening, for example, in the case of a TDMA or RTS/CTS data +link layer. By separating out these two interfaces, ActiveMessageC +avoids the complications encountered in 1.x with regards to +GenericComm vs. GenericCommPromiscuous.

    +

    ActiveMessageC is usually just a configuration that has +pass-through wiring to a chip-specific HAL active message +implementation. The definition of ActiveMessageC is left +to the platform for when a node has more than one +radio. In this case, the platform decides how to map the +basic packet abstraction to the hardware underneath. Approaches +include choosing one radio or having some form of address-based +dispatch.

    +
    +
    +

    4. AM Services: AMSenderC, AMReceiverC, AMSnooperC, AMSnoopingReceiverC

    +

    TinyOS 2.x provides four component single-hop communication +virtualizations to applications: +AMReceiverC, AMSnooperC, AMSnoopingReceiverC, and AMSenderC. Each is a +generic component that takes an active message ID as a +parameter. These components assume the existence of ActiveMessageC.

    +
    +

    4.1 Dispatch: am_id_t

    +

    Active messages have an 8-bit type field, which allows multiple +protocols to all use AM communication without conflicting. Following +the guidelines for protocol dispatch identifiers, each +am_id_t used in a network SHOULD have a single packet format, so +that the am_id_t, combined with the packet contents, are sufficient +to determine the exact packet format.

    +
    +
    +

    4.2 AMReceiverC

    +

    AMReceiverC has the following signature:

    +
    +generic configuration AMReceiverC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
    +

    AMReceiver.Receive.receive is signalled whenever the packet layer +receives an active message of the corresponding AM type whose +destination address is the local address or the broadcast +address. Note that since Receive.receive swaps buffers, a program MUST +NOT instantiate two AMReceivers with the same am_id_t and MUST NOT +instantiate an AMReceiver and an AMSnoopingReceiver with the same +am_id_t.

    +
    +
    +

    4.3 AMSnooperC

    +

    AMSnooper has an identical signature to AMReceiver:

    +
    +generic configuration AMSnooperC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
    +

    AMSnooper.Receive.receive is signalled whenever the packet layer +receives an active message of the corresponding AM type whose +destination address is neither to the local address nor the broadcast +address. Note that since Receive.receive swaps buffers, a program MUST +NOT instantiate two AMSnoopers with the same am_id_t and MUST NOT +instantiate an AMSnooper and an AMSnoopingReceiver with the same +am_id_t.

    +
    +
    +

    4.4 AMSnoopingReceiverC

    +

    AMSnoopingReceiverC has an identical signature to AMReceiverC:

    +
    +generic configuration AMSnoopingReceiverC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
    +

    AMSnoopingReceiverC.Receive.receive is signalled whenever the packet +layer receives an active message of the corresponding AM type, +regardless of destination address. Note that since Receive.receive +swaps buffers, a program that instantiates an AMSnoopingReceiverC with +a certain am_id_t MUST NOT instantiate another AMSnoopingReceiverC, +AMSnooperC, or AMReceiverC with the same am_id_t.

    +
    +
    +

    4.5 AMSender

    +

    AMSenderC has the following signature:

    +
    +generic configuration AMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
    +

    Because this is a send virtualization, AMSenderC.AMSend.send returns +EBUSY only if there is a send request outstanding on this particular +AMSenderC. That is, each AMSenderC has a queue of depth one. The exact +order in which pending AMSenderC requests are serviced is undefined, +but it MUST be fair, where fair means that each client with outstanding +packets receives a reasonable approximation of an equal share of the +available transmission bandwidth.

    +
    +
    +

    4.6 Power Management

    +

    The communication virtualizations do not support power management. +ActiveMessageC provides SplitControl for explicit power control. +For packet communication to operate properly, a component in an +application has to call ActiveMessageC.SplitControl.start(). +The HAL underneath ActiveMessageC MAY employ power management +techniques, such as TDMA scheduling or low power listening, when +"on."

    +
    +
    +
    +

    5. HAL Requirements

    +

    A radio chip X MUST have a packet abstraction with the following +signature:

    +
    +provides interface Init;
+provides interface SplitControl;
+provides interface AMSend[am_id_t type];
+provides interface Receive[am_id_t type];
+provides interface Receive as Snoop[am_id_t type];
+provides interface Packet;
+provides interface AMPacket;
+provides interface PacketAcknowledgments;
+
    +

    The component SHOULD be named XActiveMessageC, where X is +the name of the radio chip. The component MAY have additional interfaces. +These interfaces can either be chip-specific or chip-independent.

    +
    +
    +

    6. message_t

    +

    Active messages are a basic single-hop packet abstraction. Therefore, +following TEP 111 [3], all data link and active message headers +MUST be in the message_header_t structure of message_t. This ensures +that an active message received from one data link layer (e.g., the radio) +can be passed to another data link layer (e.g., the UART) without +shifting the data payload. This means that the message_header_t must +include all data needed for AM fields, which might introduce headers +in addition to those of the data link. For example, this is the +structure of the CC2420 header:

    +
    +typedef nx_struct cc2420_header_t {
+  nx_uint8_t length;
+  nx_uint16_t fcf;
+  nx_uint8_t dsn;
+  nx_uint16_t destpan;
+  nx_uint16_t dest;
+  nx_uint16_t src;
+  nx_uint8_t type;
+} cc2420_header_t;
+
    +

    The first six fields (length through src) are all 802.15.4 headers. The +type field, however, has been added to the header structure in order +to support AM dispatch.

    +
    +
    +

    7. Implementation

    +

    The following files in tinyos-2.x/tos/system provide reference +implementations of the abstractions described in this TEP.

    +
    +
      +
    • AMSenderC.nc, AMReceiverC.nc, AMSnooperC.nc, +and AMSnoopingReceiverC.nc are implementations of +virtualized AM services.
      • +
    • AMQueueP provides a send queue of n entries for n +AMSenderC clients, such that each client has a dedicated entry.
      • +
    • AMQueueImplP is the underlying queue implementation, +which is reusable for different clients (it is also used +in the serial stack [4]).
      • +
    • AMQueueEntryP sits on top of AMQueueP and stores +the parameters to AMSend.send in an outstanding +packet with the AMPacket interface.
      • +
    +
    +

    The following files in tinyos-2.x/tos/interfaces contain +example implementations of packet protocol interfaces:

    +
    +
      +

    • Packet.nc is the basic interface that almost all +packet protocols provide.

      +
      • +
    • +
      Send.nc is the transmission interface for address-free
      +

      protocols.

      +
      +
      +
      • +
    • +
      AMSend.nc is the transmission interface for AM address
      +

      send protocols.

      +
      +
      +
      • +

    • AMPacket.nc is the packet interface for AM-specific +fields.

      +
      • +
    +
    +

    An active messaging implementation for the CC2420 radio chip +can be found in tos/chips/CC2420/CC2420ActiveMessageC.nc. +The micaz platform and telos family have an ActiveMessageC.nc +which exports the interfaces of CC2420ActiveMessageC.

    +
    +
    +

    8. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates Hall
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    +
    +
    +

    9. Citations

    + + + + + +
    [1]The MintRoute protocol. tinyos-1.x/tos/lib/MintRoute. Also, A. Woo, T. Tong, and D. Culler. "Taming the Underlying Challenges of Reliable Multihop Routing in Sensor Networks." SenSys 2003.
    + + + + + +
    [2]Tiny AGgregation, one protocol of the TinyDB system. tinyos-1.x/tos/lib/TinyDB. Also, S. Madden and M. Franklin and J. Hellerstein and W. Hong. "TinyDB: An Acquisitional Query Processing System for Sensor Networks." Transactions on Database Systems (TODS) 2005.
    + + + + + +
    [3](1, 2) TEP 111: message_t.
    + + + + + +
    [4]TEP 113: Serial Communication.
    +
    +
    + + diff --git a/doc/html/tep117.html b/doc/html/tep117.html new file mode 100644 index 00000000..a6701827 --- /dev/null +++ b/doc/html/tep117.html @@ -0,0 +1,522 @@ + + + + + + +Pins and Buses + + + + +
    +

    Pins and Buses

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:117
    Group:Core Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Phil Buonadonna
    Draft-Created:23-Jan-2006
    Draft-Version:1.1.2.4
    Draft-Modified:2006-01-25
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    The memo documents the TinyOS 2.x interfaces used for controlling +digital IO functionality and digital interfaces other than serial +communication covered in [tep113].

    +
    +
    +

    1. Introduction

    +

    The canonical TinyOS device is likely to have a variety of digital +interfaces. These interfaces may be divided into two broad +categories. The first are general purpose digital I/O lines (pins) +for individual digital signals at physical pins on a chip or +platform. The second are digital I/O interfaces that have predefined +communication protocol formats. The two buses covered in this +document are the Serial Peripheral Interface (SPI) and the +Inter-Integrated Circuit (I2c) or Two-Wire interface. While there are +likely other bus formats, we presume SPI and I2C to have the largest +coverage. While the UART interface is also in this category, it is +covered separately in [tep113].

    +

    This memo documents the interfaces used for pins and the two buses.

    +
    +
    +

    2. Pins

    +

    General Purpose I/O (GPIO) pins are single, versatile digital I/O signals +individually controllable on a particular chip or platform. Each GPIO +can be placed into either an input mode or an output mode. On +some platforms a third 'tri-state' mode may exist, but this +functionality is platform specific and will not be covered in this +document.

    +

    On many platforms, a physical pin may function as either a digital GPIO +or another special function I/O such. Examples include ADC I/O or a bus +I/O. Interfaces to configure the specific function of a pin are +platform specific.

    +

    The objective of the interfaces described here is not to attempt to +cover all possibilities of GPIO functionality and features, but to +distill down to a basis that may be expected on most platforms.

    +
    +
    In input mode, we assume the following capabilities:
    +
      +
    • The ability to arbitrarily sample the pin
      • +
    • The ability to generate an interrupt/event from either a rising edge or falling edge digital signal.
      • +
    +
    +
    In output mode, we assume the following capabilities:
    +
      +
    • An I/O may be individually cleared (low) or set (hi)
      • +
    +
    +
    +

    Platform that provide GPIO capabilities MUST provide the following HIL +interfaces:

    +
    +
      +
    • GeneralIO
      • +
    • GpioInterrupt
      • +
    +
    +

    Platforms MAY provide the following capture interface.

    +
    +
      +
    • GpioCapture
      • +
    +
    +
    +

    2.1 GeneralIO

    +

    The GeneralIO HIL interface is the fundamental mechanism for controlling a +GPIO pin. The interface provides a mechanism for setting the pin mode +and reading/setting the pin value. The toggle function switches the +output state to the opposite of what it currently is.

    +

    Platforms with GPIO functionality MUST provide this interface. It +SHOULD be provided in a component named GeneralIOC, but MAY be +provided in other components as needed.

    +
    +interface GeneralIO
+{
+  async command void set();
+  async command void clr();
+  async command void toggle();
+  async command bool get();
+  async command void makeInput();
+  async command void makeOutput();
+}
+
    +
    +
    +

    2.2 GpioInterrupt

    +

    The GPIO Interrupt HIL interface provides baseline event control for a +GPIO pin. It provides a mechanism to detect a rising edge OR a falling +edge. Note that calls to enableRisingEdge and enableFallingEdge are +NOT cumulative and only one edge may be detected at a time. There may +be other edge events supported by the platform which MAY be exported +through a platform specific HAL interface.

    +
    +interface GpioInterrupt {
+
+  async command error_t enableRisingEdge();
+  async command error_t enableFallingEdge();
+  async command error_t disable();
+  async event void fired();
+
+}
+
    +
    +
    +

    2.3 GpioCapture

    +

    The GpioCapture interface provides a means of associating a timestamp +with a GPIO event. Platforms MAY provide this interface.

    +

    Some platforms may have hardware support for such a feature. Other +platforms may emulate this capability using the SoftCaptureC +component. The interface makes not declaration of the precision or +accuracy of the timestamp with respect to the associated GPIO event.

    +
    +interface GpioCapture {
+
+  async command error_t captureRisingEdge();
+  async command error_t captureFallingEdge();
+  async event void captured(uint16_t time);
+  async command void disable();
+
+}
+
    +
    +
    +
    +

    3. Buses

    +

    Bus operations may be divided into two categories: data and +control. The control operations of a particular bus controller are +platform specific and not covered here. Instead, we focus on the data +interfaces at the HIL level that are expected to be provided.

    +
    +

    3.1 Serial Peripheral Interface

    +

    The Serial Peripheral Interface (SPI) is part of a larger class of +Synchronous Serial Protocols. The term SPI typically refers to the +Motorola SPI protocols. Other protocols include the National +Semiconductor Microwire, the TI Synchronous Serial Protocol and the +Programmable Serial Protocol. The dataside interfaces here were +developed for the Motorola SPI format, but may work for others.

    +

    Platforms supporting SPI MUST provide these interfaces.

    +

    Of note, the interfaces DO NOT define the behavior of any chip select +or framing signals. These SHOULD determined by platform specific HAL +interfaces and implementations.

    +

    The interface is split into a synchronous byte level and an +asynchronous packet level interface. The byte level interface is +intended for short transactions (3-4 bytes) on the SPI bus.

    +
    +interface SPIByte {
+  async command error_t write( uint8_t tx, uint8_t* rx );
+}
+
    +

    The packet level interface is for larger bus transactions. The +pointer/length interface permits use of hardware assist such as DMA.

    +
    +interface SPIPacket {
+
+  async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+  async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                            error_t error );
+}
+
    +
    +
    +

    3.2 I2C

    +

    The Inter-Integrated Circuit (I2C) interface is another type of +digital bus that is often used for chip-to-chip communication. It is +also known as a two-wire interface.

    +

    The I2CPacket interface provides for asynchronous Master mode communication on an +I2C with application framed packets. It supports only single +transfers with a start-stop condition around each transfer.

    +

    Platforms providing I2C capability MUST provide this interface.

    +
    +interface I2CPacket {
+  async command result_t readPacket(uint16_t _addr, uint8_t _length, uint8_t* _data);
+  async command result_t writePacket(uint16_t _addr, uint8_t _length, uint8_t* _data);
+  async event void readPacketDone(uint16_t addr, uint8_t length, uint8_t* data, result_t success);
+  async event void writePacketDone(uint16_t addr, uint8_t length, uint8_t* data, result_t success);
+}
+
    +
    +
    +
    +

    4. Author's Address

    +
    +
    Phil Buonadonna
    +
    Arched Rock Corporation
    +
    657 Mission St. Ste 600
    +
    San Francisco, CA 94105-4120
    +

    +
    phone - +1 415 692-0828 x2833
    +
    +
    +
    +

    5. Citations

    + + + + + +
    [tep113]TEP 113: Serial Communication.
    +
    +
    + + diff --git a/doc/html/tep118.html b/doc/html/tep118.html new file mode 100644 index 00000000..b5895d4a --- /dev/null +++ b/doc/html/tep118.html @@ -0,0 +1,527 @@ + + + + + + +Dissemination + + + + +
    +

    Dissemination

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:118
    Group:Net2 Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Philip Levis and Gilman Tolle
    Draft-Created:10-Dec-2004
    Draft-Version:1.1.2.3
    Draft-Modified:2006-06-20
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    The memo documents the interfaces, components, and semantics for +disseminating small (smaller than a single packet payload) pieces of +data in TinyOS 2.x. Dissemination is reliably delivering a piece of +data to every node in a network.

    +
    +
    +

    1. Introduction

    +

    Dissemination is a basic sensor network protocol. The ability to +reliably deliver a piece of data to every node allows administrators +to reconfigure, query, and reprogram a network. Reliability is +important because it makes the operation robust to temporary +disconnections or high packet loss. Unlike flooding protocols, which +are discrete efforts that terminate, possibly not delivering the data +to some nodes, dissemination achieves reliability by using a +continuous approach that can detect when a node is missing the data.

    +

    Depending on the size of the data item, dissemination protocols can +differ greatly: efficiently disseminating tens of kilobytes of a +binary requires a different protocol than disseminating a two-byte +configuration constant. Looking more deeply, however, there are +similarities. Separating a dissemination protocol into two parts --- +control traffic and data traffic --- shows that while the data traffic +protocols are greatly dependent on the size of the data item, the +control traffic tends to be the same or very similar.

    +

    Being able to reliably disseminate small values into a network is a +useful building block for sensornet applications. It allows an +administrator to inject small programs or commands and configuration +constants. Because TinyOS nodes have limited RAM, these dissemination +services have the assumption that data values have some form of +versioning. Dissemination propagates only the most recent version. +This means that if a node is disconnected from a network and the +network goes through eight versions of a disseminated value, when it +rejoins the network it will only see the most recent. The rest of this +document describes a set of components and interfaces for a +dissemination service of this kind.

    +
    +
    +

    2. Dissemination interfaces

    +

    Small-value dissemination has two interfaces: DisseminationValue and +DisseminationUpdate. The former is for consumers of a disseminated +value, the latter is for producers. They are as follows:

    +
    +interface DisseminationValue<t> {
+  command const t* get();
+  event void changed();
+}
+
+interface DisseminationUpdate<t> {
+  command void change(t* newVal);
+}
+
    +

    These interfaces assume that the allocation for the disseminated data +is within the dissemination service. A consumer can obtain a const +pointer to the data through DissemnationValue.get(). It MUST NOT +store this pointer, as it may not be constant across updates. +Additionally, doing so wastes RAM, as it can be easily re-obtained. +The service signals a changed() event whenever the dissemination value +changes, in case the consumer needs to perform some computation on it.

    +

    DisseminationUpdate has a single command, change, which takes a +pointer as an argument. This pointer is not stored: a provider of +DisseminationUpdate MUST copy the data into its own allocated memory.

    +

    A dissemination protocol MUST reach consensus on the newest value in a +network (assuming the network is connected). Calling change +implicitly makes the data item "newer" so that it will be disseminated +to every node in the network. This change is local, however. If a node +that is out-of-date also calls change, the new value might not +disseminate, as other nodes might already have a newer value. If two +nodes call change at the same time but pass different values, then the +network might reach consensus when nodes have different values. The +dissemination protocol therefore MUST have a tie-breaking mechanism, +so that eventually every node has the same data value.

    +
    +
    +

    3 Dissemination Service

    +

    A dissemination service MUST provide one component, DisseminatorC, +which has the following signature:

    +
    +generic configuration DisseminatorC(typedef t, uint16_t key) {
+  provides interface DisseminationValue <t>;
+  provides interface DisseminationUpdate <t>;
+}
+
    +

    The t argument MUST be able to fit in a single message_t[tep111_] after +considering the headers that the dissemination protocol introduces. +A dissemination implementation SHOULD have a compile error if a larger +type than this is used.

    +

    As each instantiation of DisseminatorC probably allocates storage +and generates code, if more than one component wants to share +a disseminated value then they SHOULD encapsulate the value in +a non-generic component that can be shared. E.g.:

    +
    +configuration DisseminateTxPowerC {
+  provides interface DisseminationValue<uint8_t>;
+}
+implementation {
+  components new DisseminatorC(uint8_t, DIS_TX_POWER);
+  DisseminationValue = DisseminatorC;
+}
+
    +

    Two different instances of DisseminatorC MUST NOT share the same value +for the key argument.

    +
    +
    +

    4 Dissemination Keys

    +

    One issue that comes up when using this interfaces is the selection of +a key for each value. On one hand, using unique() is easy, but this +means that the keyspaces for two different compilations of the same +program might be different and there's no way to support a network +with more than one binary. On the other, having a component declare +its own key internally means that you can run into key collisions that +can't be resolved. In the middle, an application can select keys on +behalf of other components.

    +

    Ordinarily, dissemination keys can be generated by unique or selected +by hand. However, these defined keys can be overridden by an +application-specific header file. The unique namespace and the static +namespace are separated by their most significant bit. A component +author might write something like this:

    +
    +#include <disseminate_keys.h>
+configuration SomeComponentC {
+  ...
+}
+implementation {
+#ifndef DIS_SOME_COMPONENT_KEY
+  enum {
+    DIS_SOME_COMPONENT_KEY = unique(DISSEMINATE_KEY) + 1 << 15;
+  };
+#endif
+  components SomeComponentP;
+  components new DisseminatorC(uint8_t, DIS_SOME_COMPONENT_KEY);
+  SomeComponentP.ConfigVal -> DisseminatorC;
+}
+
    +

    To override, you can then make a disseminate_keys.h in your app +directory:

    +
    +#define DIS_SOME_COMPONENT_KEY 32
+
    +

    Even with careful key selection, two incompatible binaries with +keyspace collisions may end up in the same network. If this happens, a +GUID that's unique to a particular binary MAY be included in the +protocol. The GUID enables nodes to detect versions from other +binaries and not store them. This GUID won't be part of the external +interface, but will be used internally.

    +
    +
    +

    5. More Complex Dissemination

    +

    An application can use this low-level networking primitive to build +more complex dissemination systems. For example, if you want have a +dissemination that only nodes which satisfy a predicate receive, you +can do that by making the <t> a struct that stores a predicate and +data value in it, and layering the predicate evaluation on top of the +above interfaces.

    +
    +
    +

    6. Implementation

    +

    An implementation of this TEP can be found in +tinyos-2.x/tos/lib/net. This dissemination implementation uses +network trickles [2]. Each dissemination value has a separate +trickle.

    +
    +
    +

    6. Author's Address

    +
    +
    Philip Levis
    +
    358 Gates Hall
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +

    +

    +
    Gilman Tolle
    +
    2168 Shattuck Ave.
    +
    Arched Rock Corporation
    +
    Berkeley, CA 94704
    +

    +
    phone - +1 510 981 8714
    +
    email - gtolle@archedrock.com
    +
    +
    +
    +

    7. Citations

    + + + + + +
    [1]TEP 111: message_t.
    + + + + + +
    [2]Philip Levis, Neil Patel, David Culler, and Scott Shenker. "Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks." In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).
    +
    +
    +

    Docutils System Messages

    +
    +

    System Message: ERROR/3 (txt/tep118.txt, line 116); backlink

    +Unknown target name: "tep111".
    +
    +
    + + diff --git a/doc/html/tep119.html b/doc/html/tep119.html new file mode 100644 index 00000000..4ec768b8 --- /dev/null +++ b/doc/html/tep119.html @@ -0,0 +1,681 @@ + + + + + + +Collection + + + + +
    +

    Collection

    + +++ + + + + + + + + + + + + + + + + + +
    TEP:119
    Group:Net2 Working Group
    Type:Documentary
    Status:Draft
    TinyOS-Version:2.x
    Author:Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis
    Draft-Created:09-Feb-2006
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a part of TinyOS for the TinyOS Community, and +requests discussion and suggestions for improvements. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    The memo documents the interfaces, components, and semantics used by +collection protocol in TinyOS 2.x. Collection provides a best-effort, +multihop delivery of packets to the root of a tree.

    +
    +
    +

    1. Introduction

    +

    Collecting data at a base station is a common requirement of sensor +network applications. The general approach used is to build one +or more collection trees, each of which is rooted at a base +station. When a node has data which needs to be collected, it +sends the data up the tree, and it forwards collection data that +other nodes send to it. Sometimes, depending on the form of data +collection, systems need to be able to inspect packets as they go +by, either to gather statistics, compute aggregates, or suppress +redundant transmissions.

    +

    When a network has multiple base stations that act as root nodes, +rather than one tree, it has a forest of trees. By picking a +parent node, a collection protocol implicitly joins one of these +trees. Collection provides a best-effort, +multihop delivery of packets to one of a network's tree roots: +it is an anycast protocol.

    +

    Given the limited state that nodes can store and a general need +for distributed tree building algorithms, simple collection protocols +encounter several challenges. These challenges are not unique to +collection protocols. Instead, they represent a subset of common +networking algorithmic edge cases that occur in this protocol +family:

    +
    +
      +
    • Loop detection, detecting when a node selects one of its +descendants as a new parent.
      • +
    • Duplicate suppression, detecting and dealing with when lost +acknowledgments are causing packets to replicate in the +network, wasting bandwidth.
      • +
    • Link estimation, evaluating the link quality to single-hop +neighbors.
      • +
    • Self-interference, preventing forwarding packets along the route +from introducing interference for subsequent packets.
      • +
    +
    +

    The rest of this document describes a set of components and interfaces +for a collection service outlined above.

    +
    +
    +

    2. Collection interfaces

    +

    A node can perform four different roles in collection: producer, +consumer, snooper, and in-network processor. Depending on their role, +the nodes use different interfaces to interact with the collection +component.

    +

    The nodes that generate data to be sent to the root are +producers. The producers use the Send interface [1] to send +data to the root of the collection tree. The collection tree +identifier is be specified as a parameter to Send during +instantiation.

    +

    Root nodes that receive data from the network are consumers. The +consumers use the Receive interface [1] to receive a message +delivered by collection. The collection tree identifier is be +specified as a parameter to Receive during instantiation.

    +

    The nodes that overhear messages in transit are snoopers. The snoopers +use the Receive interface [1] to receive a snooped message. The +collection tree identifier is be specified as a parameter to Receive +during instantiation.

    +

    The nodes can process a packet that are in transit. These in-network +processors use the Intercept interface [1] to receive and +update a packet. The collection tree identifier is be specified as a +parameter to Intercept during instantiation.

    +

    A node is configured to become a root by using the RootControl +interface. RootControl.setRoot() MUST make the current node a root of +the tree specified during instantiation. RootControl.unsetRoot() MUST +make the current root no longer a root in the tree specified during +instantiation. RootControl.unsetRoot() MAY be called on a node that is +not a root:

    +
    +interface RootControl {
+  command error_t setRoot();
+  command error_t unsetRoot();
+  command bool isRoot();
+}
+
    +
    +
    +

    3 Collection Services

    +

    A collection service MUST provide one component, TreeCollectionC, +which has the following signature:

    +
    +configuration TreeCollectionC {
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface RootControl;
+    interface Packet;
+    interface CollectionPacket;
+    interface TreeRoutingInspect;
+  }
+  uses {
+    interface CollectionId[uint8_t client];
+  }
+}
+
    +

    TreeCollectionC MAY have additional interfaces, but they MUST have +default functions on all outgoing invocations (commands for uses, +events for provides) of those interfaces so that it can operate +properly if they are not wired.

    +

    Components SHOULD NOT wire to TreeCollectionC.Send. The generic +component CollectionSenderC (described in section 3.1) provides +a virtualized sending interface.

    +

    Receive, Snoop, and Intercept are all parameterized by +collection_id_t. Each collection_id_t corresponds to a different +protocol operating on top of collection, in the same way that +different am_id_t values represent different protocols operating on +top of active messages. All packets sent with a particular +collection_id_t generally have the same payload format, so that +snoopers, intercepters, and receivers can parse it properly.

    +

    Receive.receive MUST NOT be signaled on non-root +nodes. TreeCollectionC MAY signal Receive.receive on a root node when +a data packet successfully arrives at that node. If a root node calls +Send, TreeCollectionC MUST treat it as it if were a received packet. +Note that the buffer swapping semantics of Receive.receive, when +combined with the pass semantics of Send, require that TreeCollectionC +make a copy of the buffer if it signals Receive.receive.

    +

    If TreeCollectionC receives a data packet to forward and it is not a +root node, it MAY signal Intercept.forward.

    +

    If TreeCollectionC receives a data packet that a different node +is supposed to forward, it MAY signal Snoop.receive.

    +

    RootControl allows a node to be made a collection tree root. +TreeCollectionC SHOULD NOT configure a node as a root by default.

    +

    Packet and CollectionPacket allow components to access collection +data packet fields [1].

    +

    TreeRoutingInspect provides information on the current position of +the node in a routing tree:

    +
    +interface TreeRoutingInspect {
+  command error_t getParent(am_addr_t* parent);
+  command error_t getHopcount(uint8_t* hopcount);
+  command error_t getMetric(uint16_t* metric);
+}
+
    +

    In each of these commands, if the return value is not SUCCESS, the +value stored in the pointer argument is undefined. The getMetric +command provides a measure of the quality of a node's route to the +base station. This routing metric MUST be monotonically increasing +across hops. In a collection tree, if node A is the parent of node B, +then node B's metric value MUST be greater than node A's.

    +
    +

    3.1 CollectionSenderC

    +

    Collection has a virtualized sending abstraction, the generic +component CollectionSenderC:

    +
    +

    System Message: WARNING/2 (txt/tep119.txt, line 198)

    +Literal block expected; none found.
    +
    +
    generic configuration CollectionSenderC(collection_id_t collectid) {
    +
    +
    provides {
    +
    interface Send; +interface Packet;
    +
    +
    +

    System Message: WARNING/2 (txt/tep119.txt, line 202)

    +Definition list ends without a blank line; unexpected unindent.
    +

    }

    +
    +
    +
    +

    System Message: WARNING/2 (txt/tep119.txt, line 203)

    +Definition list ends without a blank line; unexpected unindent.
    +

    }

    +

    This abstraction follows a similar virtualization approach to +AMSenderC [1], except that it is parameterized by a collection_id_t +rather than an am_id_t. As with am_id_t, every collection_id_t SHOULD +have a single packet format, so that receivers can parse a packet +based on its collection ID and contents.

    +
    +
    +
    +

    4 Implementation

    +

    An implementation of this TEP can be found in +tinyos-2.x/tos/lib/net/collection. The implementation consists of +three major components, which are wired together to form a +CollectionC: LinkEstimatorP, TreeRoutingEngineP, and ForwardingEngineP.

    +

    This decomposition tries to encourage evolution of components and ease +of use through modularization. Neighbor management and link estimation +are are decoupled from the routing protocol. Furthermore, the routing +protocol and route selection are decoupled from the forwarding policies, +such as queueing and timing.

    +
    +

    4.1 LinkEstimatorP

    +

    LinkEstimatorP estimates the quality of link to or from each +neighbor. Link estimation can be done in a variety of ways, and we do +not impose one here. It is decoupled from the establishment of +routes. There is a narrow interface (LinkEstimator) between the link +estimator and the routing engine. The one requirement is that the +quality returned is standardized. A larger return value from +LinkEstimator.getQuality(), LinkEstimator.getforwardQuality(), +LinkEstimator.getreserveQuality() MUST imply that the link to the +neighbor is estimated to be of a higher quality than the one that +results in a smaller return value. The range of value SHOULD be +[0,255] and the variation in link quality in that range SHOULD be +linear. Radio provided values such as LQI or RSI, beacon based link +estimation to compute ETX, or their combination are some possible +approaches to estimating link qualities. LinkEstimatorP MAY have its +own control messages to compute bi-directional link qualities:

    +
    +typedef uint16_t neighbor_t
+
+LinkEstimatorP {
+  provides {
+    interface LinkEstimator;
+    interface NeighborTable;
+  }
+}
+
+interface LinkEstimator {
+  command uint8_t getLinkQuality(neighbot_t neighbor);
+  command uint8_t getReverseQuality(neighbot_t neighbor);
+  command uint8_t getForwardQuality(neighbot_t neighbor);
+}
+
+interface NeighborTable {
+  event void evicted(neighbot_t neighbor)
+}
+
    +
    +
    +

    4.2 TreeRoutingEngineP

    +

    TreeRoutingEngineP is responsible for computing routes to the roots of a +tree. It uses NeighborTable and LinkEstimator interfaces to learn +about the nodes in the neighbor table maintained by LinkEstimatorP and +the quality of links to and from the neighbors. The routing protocol +on which collection is implemented MUST be a tree-based routing +protocol with a single or multiple roots. TreeRoutingEngineP +allows a node to be configured as a root or a non-root node +dynamically. TreeRoutingEngineP maintains multiple candidate next hops:

    +
    +generic module TreeRoutingEngineP(uint8_t routingTableSize) {
+  provides {
+      interface UnicastNameFreeRouting as Routing;
+      interface RootControl;
+      interface TreeRoutingInspect;
+      interface StdControl;
+      interface Init;
+  }
+  uses {
+      interface AMSend as BeaconSend;
+      interface Receive as BeaconReceive;
+      interface LinkEstimator;
+      interface AMPacket;
+      interface LinkSrcPacket;
+      interface SplitControl as RadioControl;
+      interface Timer<TMilli> as BeaconTimer;
+      interface Random;
+      interface CollectionDebug;
+  }
+}
+
    +
    +
    +

    4.3 ForwardingEngineP

    +

    The ForwardingEngineP component provides all the top level interfaces +(except RootControl) which TreeCollectionC provides and an application +uses:

    +
    +generic module ForwardingEngineP() {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t id];
+    interface Intercept[collection_id_t id];
+    interface Packet;
+    interface CollectionPacket;
+  }
+  uses {
+    interface AMSend as SubSend;
+    interface Receive as SubReceive;
+    interface Receive as SubSnoop;
+    interface Packet as SubPacket;
+    interface UnicastNameFreeRouting;
+    interface SplitControl as RadioControl;
+    interface Queue<fe_queue_entry_t*> as SendQueue;
+    interface Pool<fe_queue_entry_t> as QEntryPool;
+    interface Pool<message_t> as MessagePool;
+    interface Timer<TMilli> as RetxmitTimer;
+    interface Cache<uint32_t> as SentCache;
+    interface TreeRoutingInspect;
+    interface PacketAcknowledgements;
+    interface Random;
+    interface RootControl;
+    interface CollectionId[uint8_t client];
+    interface AMPacket;
+    interface CollectionDebug;
+  }
+}
+
    +

    ForwardingEngineP uses a large number of interfaces, which can be +broken up into a few groups of functionality:

    +
    +
      +
    • Single hop communication: SubSend, SubReceive, SubSnoop, +SubPacket, PacketAcknowledgments, AMPacket
      • +
    • Routing: UnicastNameFreeRouting, TreeRoutingInspect, +RootControl, CollectionId, SentCache
      • +
    • Queue and buffer management: SendQueue, MessagePool, +QEntryPool
      • +
    • Packet timing: Random, RetxmitTimer
      • +
    +
    +
    +
    +
    +

    5. Author's Address

    +
    +
    Rodrigo Fonseca
    +
    473 Soda Hall
    +
    Berkeley, CA 94720-1776
    +

    +
    phone - +1 510 642-8919
    +
    email - rfonseca@cs.berkeley.edu
    +

    +

    +
    Omprakash Gnawali
    +
    Ronald Tutor Hall (RTH) 418
    +
    3710 S. McClintock Avenue
    +
    Los Angeles, CA 90089
    +

    +
    phone - +1 213 821-5627
    +
    email - gnawali@usc.edu
    +

    +

    +
    Kyle Jamieson
    +
    The Stata Center
    +
    32 Vassar St.
    +
    Cambridge, MA 02139
    +

    +
    email - jamieson@csail.mit.edu
    +

    +

    +
    Philip Levis
    +
    358 Gates Hall
    +
    Computer Science Laboratory
    +
    Stanford University
    +
    Stanford, CA 94305
    +

    +
    phone - +1 650 725 9046
    +
    email - pal@cs.stanford.edu
    +
    +
    +
    +

    6. Citations

    + + + + + +
    [1]TEP 116: Packet Protocols
    +
    +
    + + diff --git a/doc/html/tep120.html b/doc/html/tep120.html new file mode 100644 index 00000000..9c375968 --- /dev/null +++ b/doc/html/tep120.html @@ -0,0 +1,856 @@ + + + + + + +TinyOS Alliance Structure + + + + +
    +

    TinyOS Alliance Structure

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:120
    Group:Alliance Working Group
    Type:Informational
    Status:Draft
    TinyOS-Version:All
    Authors:Philippe Bonnet +
    David Culler +
    Deborah Estrin +
    Ramesh Govindan +
    Mike Horton +
    Jeonghoon Kang +
    Philip Levis +
    Lama Nachman +
    Jack Stankovic +
    Rob Szewczyk +
    Matt Welsh +
    Adam Wolisz
    Draft-Created:17-April-2006
    Draft-Version:1.1.2.3
    Draft-Modified:2006-06-09
    Draft-Discuss:TinyOS Alliance <tinyos-alliance at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo documents a blueprint for an open alliance aroung +TinyOS for the TinyOS Community and requests discussion and +suggestions for improvement. Distribution +of this memo is unlimited. This memo is in full compliance with +TEP 1.

    +
    +
    +

    Abstract

    +

    This memo describes the goals and organization structure of the TinyOS Alliance. +It covers membership, the working group forums for contribution, intellectual +property, source licensing, and the TinyOS Steering Committee (TSC).

    +
    +
    +

    1. Charter

    + +

    Formulate a legal and organizational framework for an alliance that +can facilitate the continued advancement of the open embedded network +ecosystem around TinyOS and support the activities, interactions, and +development of the worldwide academic and industrial TinyOS community.

    +
    +
    +

    2. Overview

    +

    This memo defines a blueprint and conceptual foundation for an open +alliance that fulfills the above charter. +It defines the following ten aspects of the alliance:

    +
    +
      +
    • Mission
      • +
    • Legal structure
      • +
    • Organizational structure
      • +
    • Membership criteria
      • +
    • Working group processes
      • +
    • Election process
      • +
    • Intellectual property
      • +
    • Source licensing
      • +
    • Funding
      • +
    • Work products
      • +
    +
    +

    We (the Alliance) recognize that each of these aspects contributes to the +whole, is inter-related and needs to be consistent overall. This document +attempts to address them sequentially, recognizing that each depends on the +others. It draws on lessons from several related +organizations, although each of these also has significantly +different goals from those set out in the charter.

    +
      +
    1. IETF - Open protocols, technical documents
      2. +
    2. OSDL - Stable, Enterprise Linux
      3. +
    3. Apache - Suite of open source tools
      4. +
    4. Zigbee - Network layer and marketing for 15.4
      5. +
    5. OSGI - Service layer
      6. +
    6. FSF - Foundational software
      7. +
    +

    We (the Alliance) draw most strongly upon the IETF, even though that +organization was +focused around creating and standardizing protocols, rather than +developing a code base. Its emphasis on rough consensus AND +running code placed issues akin to those we face near the fore. We +share the view that technical excellence is a primary goal and that +the organization should be structured to sustain and overall cohesive +architecture. In our case, it is represented by high quality +reference implementations and standard APIs, as well as techical +documents and protocols. We share an emphasis on broad participation +centered on the contributions of individual members.

    +

    We encourage industrial involvement, industrial development, and +industrial support. The organization is welcoming to +companies, but it keeps financial support and marketing +activities (while both important) at arms length from the technical +process. We share the concept that proper behavior of participants +and member companies is most strongly shaped by code of ethics, +captured in organization rules and social norms, rather than threats +of legal reprocusions. The broader marketplace is a more effective +enforcement body than any technical organization. Thus, we ask that +participants declare relevant IP that they are aware of, rather than +force a strict accounting of potentially relevant IP. We encourage +the development of open solutions that implemented without need +particular proprietary IP. In the IETF, this is addressed by the +requirement of multiple interoperable implementations before +standardization. If such implementations can be developed without +legal issues, it is likely that other non-infringing implementations +are possible. Like IETF, we seek a lean bureacracy adn mostly +volunteer organization.

    +

    From OSDL, we share the goal of developing a stable, high quality +version of an open source system. This suggests that the alliance +have strong role in developing test suites and broadly accessible +testbeds, as well as structures for sharing development resources. +However, we avoid the OSDL structure of the scale of monetary +contributions dictating technical oversite. We are not constrained by +a GPL license structure, as is the OSDL.

    +

    From Apache, we draw the strong sense of a technical meritocracy +centered on individual contributors. We seek to permit a loose enough +consortium that there can be a lot of individual innovation, +especially in areas of tools, devices, and new platforms. We also +seek to retain the notion that credit should be given to authors. In +Apache the technical merit associated with the brand is exchanged to +giving the copyright to the Apache organization. For a broad alliance +representing many universities and large companies, such a copyright +scheme is likely to be an untennable barrier. Instead, we seek to +provide a simple source license regime with technical tools for giving +credit and strong social pressure to comply.

    +

    From Zigbee, we share the goal of providing marketing support for the +accomplishments of the alliance and that we should see to define +standardized services, not just protocols. We recognize that the +alliance and serve a useful function in being a point of allocation +for various namespaces, but that this important function should not be +a tool for extracting financial contributions. We see the value of an +IP pool to give confidence that the standard can be adopted without +becoming entrapped later by IP terms, however, we also see that such a +pool presents a very significant barrier. Moreover, it does not +prevent members from obtaining IP to use it to their advantage with +other members of the alliance. It also does not constrain non-members +from obtaining blocking IP. It does discourage contributions that +might pull IP into the pool. We prefer a process of declaration and +multiple implementation.

    +
    +
    +

    3. Mission

    +

    The mission of the TinyOS Alliance is to provide a forum to facilitate:

    +
    +
      +
    • the continued growth of a healthy TinyOS developer and user community +with support for innovation as well as industry advancement,
      • +
    • the development and maintenance of a stable, technically-sound base of +TinyOS technology and surrounding tools through the creation of +standard interfaces and protocols, vetted extensions, open reference +implementations, technical documents, testing and verification suites, +and educational materials,
      • +
    • the contribution of innovative technology from a world-wide research +community and the maturation and dissemination of these +contributions, and
      • +
    • the promotion of the technology, the community, and the impact of networked +embedded systems.
      • +
    +
    +
    +
    +

    4. Organizational Structure

    +

    The Alliance has a technical advisory function: guide the evolution of +the TinyOS architecture, formulate and track progress of working +groups, and provide an open and impartial process for technical +documentation. It also has an organizational advisory function: manage +industry +interaction, legal and IP issues, evolution of the organization +itself, membership issues and so on.

    +

    We follow an approach that starts small and grows the structure as +needed. The focus should be on the working groups. Working groups are +not limited to technical functions; they can be formed to promote +developments, markets, etc. Beyond the working groups, the +organization should remain lean, relying primarily on volunteers. We +want to avoid creating a situation where the organization becomes +focused on its own growth and pre-eminence at the expense of the +larger community and technical agenda.

    +

    Technical directions should be driven by merit and overall soundness, +and built on consensus.

    +

    The Alliance consists of a non-profit corporation with a Board of +Directors, a small support staff (primarily volunteer or outsourced) +and a Steering Committee. The Steering Committee oversees a collection +of Working Groups, each with a Chair and Members.

    +
    +

    4.1 Steering Committee

    +

    In the steady state the Steering Committee will consist of the chairs +of working groups plus a handful of elected members at large. Tenure +of a position on the Steering Committee will consist of two years with +opportunity for renewal. We want to see a vibrant, engaged, and +constantly evolving leadership while allowing for long-term and +committed members.

    +

    Initially the steering committee would be formed from working group +chairs plus some subset of the Alliance working group members. This +initial committee will be responsible for putting in place the +membership and elections processes, which will then be utilized to +form the regular Steering Committee.

    +

    The primary role of the Steering Committee (SC) is to oversee the Working +groups (WGs). This means establishing WG policy, providing appeals +process, managing WG creation/extinction, arbitrating between WGs, and +supervising activities to resolve conflicting directions and moving +the process towards overall architectural coherence.

    +

    The SC is also responsible for reviewing and approving all TEPs. WGs +submit TEPs to the SC for review. The SC should appoint one +contributing Alliance member not affiliated with the corresponding WG +to review the TEP. This reviewer, who may or may not be a member of +the SC, may solicit comments from the community at large, but must +also thoroughly review the submitted TEP. WGs must address any +issues/questions brought up either by the reviewer or by other +community members. Once the reviewer approves the revisions, he/she +presents the TEP to the SC for approval by rough consensus. Finally, +TEPs that affect the organizational structure of the Alliance must +also be approved by the Board.

    +

    Finally, the Steering Commitee will be responsible for determining the +procedural elements of the Alliance. This includes election +procedures, membership criteria, selection of venues, oversight of +access to code repositories and Alliance web sites, and regular +Alliance meetings.

    +
    +
    +

    4.2 Working Groups

    +

    The working groups form the core of the alliance. Each working +group will have a chair who will be responsible for WG processes, +reporting, meetings, and membership. Working groups and their +functions are discussed in more detail in a later section.

    +
    +
    +

    4.3 Board of Directors

    +

    The non-profit will require a Board of Directors responsible for +corporate matters.

    +
    +
    +
    +

    5. Membership and Participation

    +

    We desire to continue the TinyOS tradition of promoting broad +membership. This means that we want to keep barriers to entry low in +all respects: legal, financial, and organizational. As with IETF and +Apache, we want to shape the organization as a meritocracy that +encourages, promotes, and credits the contributions of its members. +Companies have essential role, but merit, not finances should +dictate direction. Membership and influence should recognize the +importance of adopters, not just developers.

    +

    The fundamental membership is individual, as individuals create work products, +serve on working groups and committees, and vote. We have two forms:

    +
    +
      +
    • +
      Member: Individual who joins the Alliance and participates at a
      +

      basic level, typically as consumer of technology.

      +
      +
      +
      • +

    • Contributing Member: Individual who aditionally joins working groups, +attends meetings, or contributes code or other assets to the +Alliance. Contributing members are elected to various posts and +have voting rights.

      +
      • +
    +
    +

    There is no individual membership fee, but members will be responsible for +nominal registration fees at Alliance meetings.

    +

    Corporations and organizational have institutional membership, which reflects +their degree of effort.

    +
    +
      +
    • Institutional Member: Corporation or institutional organization +that joins the Alliance, agrees to appear on the Alliance +web site and documents, and pays a nominal administrative fee. +(Min. Annual $500 for small companies and non-profits, $1000 for larger)
      • +
    • Contributing Institutional Member: Corporation or institutional +organization that additionally provides financial support, resources, +facilities, technical contributions, intellectual property, +marketing support, or other meaningful contributions to the +Alliance. Such institutions are featured prominently in the Alliance and +have the opportunity to appoint individuals as contributing members. +(Min. Annual $2000 for small companies and non-profits, $5000 for larger)
      • +
    +
    +

    Rather than focusing on maximizing the financial contributions into +the alliance, we are interested in maximizing the impact of the +alliance in facilitating a healthy academic and industrial, research +and production ecosystem around embedded network technology.

    +

    The organization will be able to accept direct financial and +intellectual property contributions. The IP policy should encourage +corporate participation while preserving focus on soundness, merit, +and consensus building. Ultimately, we seek to promote a meritocracy +that recognizess the contributions of the individuals, whether they +be members of corporations, academic institutions, govermental +institutions, or unaffiliated. We will provide a fee structure that encourages +the participation of small companies and start-ups.

    +
    +
    +

    6. Working Groups

    +

    There will be two forms of working groups. LONG-STANDING +groups are chartered to develop important areas or subsystems. For +example, we expect longstanding groups on +routing, management, platforms, testing, programming tools, and +education. SHORT-TERM groups have a fixed mandate to tackle a +particular topic. For example, there may be groups to develop a +particular protocol, establish a policy or licensing format, or +address a particular application capability.

    +

    There will be two means of Working Group formation: grass roots and +charter. Grass roots groups are formed by individuals or groups +who have a preliminary version of something important and want to make +it part of TinyOS. They assemble and make a request to the SC with a +proposed charter statement and chair. Chartered groups are +formed by SC or Board of Directors to address a recognized need for an +important area of development. The SC solicits members and chair with +a particular charter in mind. WGs may be formed for organizational or +marketing goals, as well as technical goals.

    +

    The typical output of a working group is technical documentation AND +working code, including interface definitions and standard proposals. +We seek to promote the development of standardized interfaces, +protocols, services, and tools with high quality, open reference +implementations of each. We seek to have these standards be +implementable without relying on particular proprietary intellectual +property. We are not interested in discouraging development of +implementations that have excel in various ways through proprietary +IP, but standards should not require the use of such IP and should +allow for multiple, interoperable implementations. +The Steering committee will be engaged in ratification of standards.

    +
    +
    +

    7. Intellectual Property

    +

    In general we want to promote the development, adoption and use of +open technology. We want to avoid having the advancement of embedded +networks getting trapped into proprietary IP. Accordingly, our IP +policy builds heavily on the IETF mode. We also want to avoid a high +barrier to participation. Thus, we want to avoid demanding membership +requirements that require extensive legal analysis and assessing deep +strategic analysis before joining. In particular, IP pooling or broad +IP assignment requirements are seen to too large a barrier and +discourage the active participation of members. At the same time, we +recognize that without such measures only, members cannot expect +guarantees of IP rights. We also want to avoid sponging IP from +others or worse, having members or non-members running ahead of the +Alliance and creating blocking IP. In essence, all participants must +operate with eyes open. The Alliance encourage an open process, open +standards, and open source with a clear code of ethics, but leaves +broader issues of enforcement to the outside market. Like IETF, we +rely on disclosure of known IP of relevance, an open process, and a +code of conduct. Working groups are encourage to create work products +that do not rely on proprietary IP for implementation.

    +

    We also want to avoid requiring a member institution from having to +conduct a complete inventory of IP holdings for potential relevance. +This is impractical for Universities and large corporations. It is +the responsibility of the members to disclose IP or relvance, whether +it is their property or not, so that they Alliance members can make +informed decisions and trade-offs.

    +

    Following the IETF, to establish a culture of openness, meeting +discussions, presentations, and technical documents are +non-confidential. This simple measure is a signficant step towards +establishing the culture of openness and it avoids large legal and +organizational hassles, as evident in OSDL.

    +

    As with the IETF, there will be a mechanism for contributing IP to the +Alliance. This will be treated along with other forms of contribution +in establishing member status.

    +

    Working Groups will be tasked to avoid forming standards and creating +work products that fundamentally depend on proprietary IP, i.e., where +the proposal can only reasonably be implemented using such IP. +Members recognize that in making proposals, they are required by +Alliance rules to disclose what IP they know to be relevant. In the +rare cases where working group determine that IP dependent proposals +are sufficiently critical that they be pursued, such IP must be +available on reasonable and non-discriminatory (RAND) terms for the +Steering Committee to be able to approve the action.

    +

    Of course, Intellectual Property in the TinyOS alliance is closely +tied to source licensing terms, as dicussed in greater detail in that +section. As part of Alliance rules, members agree to only check in +code that conforms to Alliance source license policy. As part of +keeping barriers to participation low, GPL and code based on +potentially viral licensing terms must be carefully compartmentalized, +explicit, and not present in core software. It will typically involve +development tools, such as the compilers and peripheral Linux-based +devices.

    +
    +
    +

    8. Source Licensing

    +

    In general, we want to provide a mechanism where individuals and +companies can easily contribute source, can utilize what is available, +and can gain recognition for their efforts. Following the TinyOS +tradition, our source licensing policy will be most strongly aligned +with BSD and its more modern variants. We recognize several inherent +tensions and trade-offs in formulating the source license.

    +

    We want to give credit where credit is due. Fundamentally, the +community moves forward by contributing valuable technology and +standing open each other's shoulders, not on their feet. Credit and +respect drive a virtuous cycle of technical advance. We do have +several examples where companies, or even resarch institutions, have +gained substantial benefit from the work of others while presenting it +as their own. This concern is partially addressed by GPL, where if +you build upon the work of others you are oblicated to put it back in +the open. Apache addresses this issue by requiring acreditation of +the Apache foundation. However, this is connected with a stiff +membership requirement of signing the copyright to Apache. +Participants make that sacrafice when they view the brand appeal +associated with the Apache meritocracy as of sufficient value to +warrant the arrangement. Apache is also a losely affiliated +consortium of realtively localized projects, typically in very well +established technical areas. Our situation is different because we +have many contributors to a cohesive whole and many of these +contributors are at leading research institutions where copyright must +rest with the host institution. Moreover, much of the work is at the +leading edge of technology.

    +

    We recognize that the TinyOS "brand" is of value and will be +increasingly so as the Alliance becomes more formal. We do not want +it tainted with its use as a marketing tool on inferior technology. +Thus, we want to connect the use of the term with membership, +contribution, and conformance to Alliance rules and guidelines.

    +

    We have the additional wrinkle that we are dealing primarily with +embedded technology, which may have no visible user interface. And, +we have limited resources so carrying additional footprint for legal +conformance is unattractive.

    +

    Furthermore, many of our contributors are from organizations that have +very precisely defined sets of acceptable source licensing terms. As +much as having a common license throughout the Alliance would make it +easy for everyone to know the specific terms, getting diverse +institutions to agree to common language is impractical. We do, +however, want to have as few distinct licenses with a little variation +as possible. Fortunately, we are seeing convergence in licenses, +after several years of proliferation.

    +

    To address these matters, the Alliance will have a +preferred source license based on the BSD framework and a +small set of accepted licenses, some of which have been gradfathered +in with the existing code base. +Contributions can be made using one of those accepted licenses, with +the member organization name changed appropriately. Organizations can +submit additional proposed licenses to the Steering Committee.

    +

    We will not require that the Alliance hold copyright of submitted +source code, but that it conform to Alliance guidelines. These +include guidelines for adding copyrights to existing sources.

    +

    We will utilize the available development tools to facilitate the +generation of list of contributors associated with any particular +instantiation of TinyOS components into an overall system, +application, or distribution. We will provide tools for registering +contributors, copyrights, and applicable source licenses on line, for +ease of reference.

    +

    Alliance rules will set guidelines for giving credit to contributors +in documentation, source, tools, web sites and so on. We want to +recognize the individuals and their host institutions, as well as the +Alliance. But we do not want to create a bureacratic nightmare that +deters adoption, nor do we want to turn the Alliance into a policing +organization. Harsh and threatening legal terms that have no credible +means of enforcement create a adversarial culture with little +practical advantage. Instead, the Alliance will utilize cultural +norms and reputation as mechanisms for enforcing proper creditation. +We will develop tools that make compliance relatively easy, reward +those that do so, and provide a complaint mechanism to identify misuse.

    +

    In taking this approach, we focus on needs of reference implementation +of standardized interfaces and protocols. Alliance is not the only +vehicle for producing a hardened, tested, certified code base. +To do so would require the Alliance host a large technical staff, as +OSDL does. +Comapanies may do so, or produce implementations with enhanced +performance, reliability, or efficiency using their own proprietary +technology. The Alliance encourages such innovation while promoting +standardized interfaces that allows such technology to interoperate.

    +
    +
    +

    9. Funding

    +

    As with the IETF, individuals are responsible for their own costs, +which primarily involve meetings, travel, and generation of work +products. Membership participation will involve attendance at +Alliance meetings. Registration fees will be charged to cover costs +associated with adminstration of the meetings.

    +

    Companies and institutions are encouraged to contribute financial and +in-kind support. It will be essential that companies provide initial +funding to create the legal structure and to establish basic IT +capabilities to host the web site and working groups.

    +

    Initially, we expect that there are no full time employees in the +Alliance and that funding needs are limited to such items as lawyer's +fees, web site costs, and insurance. If the Alliance eventually +requires full time support personnel, the funding structure will have +to be re-visited.

    +

    To maintain the focus on technical excellence and meritocracy, we want +to avoid the heavy-handed quid-pro-quo seen in many industrial +consortiums where funding determines influence. The best use of funds +and the best form of influence is direct contribution to the work +products of the Alliance. We will permit targeted contributions +toward specific working groups or technical capabilities.

    +

    We seek to keep overall structure lean, mostly volunteer. +Focus on desired impact and recognition, rather than control.

    +

    Institutional members +will pay an annual membership fee. In some cases, a +contributing corporate member may provide in-kind services +such as lawyers' time used to +draw up or comment on by-laws. +Targeted contributions will be +solicited and encouraged. In this case the donator need not +become a contributing corporate member, e.g., in those cases +where such a membership may be prohibited or unwanted. +The costs of meetings, such as the TinyOS +technology exchange, will be covered through registration fees.

    +

    Individuals are responsible +for their own costs such as +for travel, meeting costs, or costs for contributing +software or documentation to the Alliance. The Alliance +is primarily a volunteer organization.

    +
    +
    +

    10. Work Products

    +

    Code base +Stable, robust core release +Rapidly evolving, innovative extensions +Reference Implementations +Tools +Data +Documentation +Standard proposals +Marketing and Promotion +Testing and Compliance +Assessments +Applications and uses of technology +Educational Materials

    +
    +
    +

    11. Conclusions

    +

    The time has come to create an organizational structure to allow the effort to grow +Beyond the Berkeley + Others +It is a balancing act +Stability vs Innovation +Broad Participation vs Strong Requirements +Uniform Licensing vs Institutional Differences +Goal is to help to community to work together +Not a forum for maneuvering and intrigue +Focus on consensus building and technical soundness +Minimal mechanism to resolve rare differences +Focus on working groups and individual contributions +with architectural and organization oversight +Be pragmatic on participation +Don’t have to make deep commitments to participate +Can’t expect broad guarantees in return

    +
    +
    +

    12. Author's Address

    +
    +
    Philippe Bonnet <bonnet.p@gmail.com>
    +
    David Culler <culler@cs.berkeley.edu>
    +
    Deborah Estrin <destrin@cs.ucla.edu>
    +
    Ramesh Govindan <ramesh@usc.edu>
    +
    Mike Horton <mhorton@xbow.com>
    +
    Jeonghoon Kang <budge@keti.re.kr>
    +
    Philip Levis <pal@cs.stanford.edu>
    +
    Lama Nachman <lama.nachman@intel.com>
    +
    Jack Stankovic <stankovic@cs.virginia.edu>
    +
    Rob Szewczyk <rob@moteiv.com>
    +
    Matt Welsh <mdw@cs.harvard.edu>
    +
    Adam Wolisz <awo@ieee.org>
    +
    +
    +
    David Culler <dculler at archrock.com>,
    +
    +
    +
    + + diff --git a/doc/html/tep121.html b/doc/html/tep121.html new file mode 100644 index 00000000..f0e0bc52 --- /dev/null +++ b/doc/html/tep121.html @@ -0,0 +1,875 @@ + + + + + + +Towards TinyOS for 8051 + + + + +
    +

    Towards TinyOS for 8051

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:121
    Group:TinyOS 8051 Working Group
    Type:Informational
    Status:Draft
    TinyOS-Version:1.x
    Author:Anders Egeskov Petersen, Sidsel Jensen, Martin Leopold
    Draft-Created:15-Dec-2005
    Draft-Version:1
    Draft-Modified:27-Mar-2006
    Draft-Discuss:TinyOS 8051 Working Group List <Tinyos-8051wg at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This memo is informational. It will hopefully be a basis for +discussions and suggestions for improvements. Distribution of this +memo is unlimited. This memo is in full compliance with TEP 1.

    +
    +
    +

    Abstract

    +

    This TEP covers our effort of porting TinyOS to the nRF24E1 +platform. We ported the basic modules of TinyOS: Timer, UART, ADC and +LEDS.

    +
    +
    +

    1. Project Outline

    +

    The original 8 bit 8051 chip is a member of the mcs51 family and +was developed in 1980 by Intel. It is still to this date one of the most +widely used microcontrollers. Porting TinyOS to the 8051 System on chip +architecture makes perfect sense - the mcs51 family has been thoroughly +tested, it is relatively cheap and it has a reasonable small footprint - +which makes it ideal for embedded solutions and sensor networks.

    +

    For this work, we use a Nordic Semiconductor VLSI nRF24E1 +evaluation-board [NSC]. The board contains an Intel 8051 compatible MCU +with 4KB program memory, a 16 MHz clock, 3 different Timers (one being +8052 compatible), a 2.4 GHz wireless RF transceiver and 9 input 10 bit +ADC, SPI and a RS232 Serial interface. The nRF24E1 board was chosen +because the radio component matches the radio on the specially designed +DIKU/DTU HogthrobV0 [HOG] boards used for research purposes at DIKU +[PEH].

    +

    We ported a subset of TinyOS for the 8051 platform consisting of the +Timer, UART, ADC and LED modules. We did not port the radio module and +the underlying SPI-bus code.

    +

    This works attacks the two most immediate problems when porting TinyOS +to 8051: the toolchain and the hardware abstraction components. The +first problem when porting TinyOS to 8051-based platforms concerns the +toolchain. The Gcc compiler does not support 8051. This is a major issue +as the code generated by the NesC preprocessor is tailored for gcc. The +second problem concerns the hardware abstraction components that must be +specialized to the 8051 idiosyncracies. In a perfect world, such a +specialization should not require to modify any interface. +Unfortunately, we needed to modify some of the interfaces to accomodate +the 8051 features.

    +

    This work was done under the supervision of Martin Leopold at University +of Copenhagen.

    +
    +
    +

    2. Project Approach

    +

    The approach to the porting project has been pragmatic. The focus has +been on producing working code, so testing and debugging have been key +elements of our work. The process has been to implement new +functionality in small iterative steps and do testing simultaneously.

    +

    To bootstrap the development without a JTAG module or alike, we built a +small LED expansion board attachable to the port logic. The LEDs was an +easy way to get instant low level test output. We also built a small +stimulator based on a potentiometer (variable resistor) to get valid +input from the ADC pins.

    +
    +
    The following TinyOS application programs have been written and tested:
    +
      +
    • Empty - test of port logic and tool chain
      • +
    • mcsatomic - test of atomic and interrupts
      • +
    • mcsBlink - test of LEDs
      • +
    • mcsBlinkTimer - test of Timers using LEDs
      • +
    • mcsSerialTest - test of UART code, simple input/output one char
      • +
    • mcsSerialTest2 - test of multiple byte output
      • +
    • mcsTimerSerialTest - test of UART controlled by Timer interrupts
      • +
    • mcsADC - test of ADC code with Timer and LEDs
      • +
    +
    +
    +
    +
    +

    3. Development Environment and Tool Chain

    +

    The following subsections describe the different development tools, +their selection and interconnection.

    +
    +

    3.1 Selection of Development Tools/Compilers

    +

    A large number of 8051 compilers exist primarily for the DOS and Windows +platforms. We have focused on two popular and regularly updated +compilers: KEIL and the Small Device C Compiler (SDCC).

    +

    SDCC is an open source project hosted on the Sourceforge website, +whereas the KEIL C51 compiler is a commercial compiler and Integrated +Development Environment (IDE). The debugger for SDCC (SDCDB) is still +fairly experimental. The KEIL suite runs on the Windows platform, and +has a good interactive debugger and simulator. KEIL and SDCC accepts +roughly the same syntactical dialect, which eases the work of moving +between the two compilers.

    +

    During our work with SDCC and SDCDB we encountered numerous problems and +bugs. SDCC 2.4.0 suddenly returned 'fatal compiler errors' with no +apparent reason. After an update of SDCC from version 2.4.0 to 2.5.0 +(most recent release) the error disappeared, the code compiled, but it +still did not work correctly on the board. We also discovered a serious +problem regarding sign bits in SDCC 2.5.0. SDCC made a type error when +reading a 32 bit signed value. Apparently SDCC did not interpret the +sign bit correctly, so a very small negative number was interpreted as a +very large positive number as if the value was unsigned. KEIL however +interprets the value correctly. The bug was submitted by us and fixed by +the SDCC development team in just two days, but the timer module still +does not work using SDCC.

    +

    Our attempts using SDCC's debugger/simulator (SDCDB) was equally +troublesome. SDCDB simply stopped at address 0, and running or stepping +through the code returned us to the UNIX prompt with no error message. +Without SDCDB, we had no debug possibility and we were forced to rethink +the tool chain. We decided to substitute SDCC with the KEIL development +kit. This gave us a working debug environment - with minimal change to +the already produced code.

    +
    +
    +

    3.1.1 Our Recommendation

    +

    In our experience the SDCC compiler and associated tools are not yet +mature enough to support our development. We recommend pursuing other +alternatives such as KEIL or other compiler suites.

    +

    We continue to mention SDCC in the remaining text, because we encourage +the use of open source software and cross-platform development. We hope +SDCC will prove an reliable alternative in the future.

    +
    +
    +

    3.2 Tool Chain Overview

    +

    The following figure and sections are an overview of the current tool +chain. The tool chain is based on TinyOS 1.x, NesC 1.1.3, avr-gcc 3.4.3, +PERL v. 5.8.6 and SDCC 2.5.4 or KEIL C51 version 7.20.

    +

    Each step in the tool chain will be explained in the section below.

    +
    +             Mangle-
+TinyOS       script
+-----> app.c -----> app_mangled.c --------> app.hex ------> nRF24E1
+ NesC         PERL                SDCC/KEIL         nRFPROG
+
    +
    +
    +

    3.3 Description of the Tool Chain

    +

    The compilation of the TinyOS test program outputs two files, a +'main.exe' file and an 'app.c' file. The 'app.c' file contains all the +needed code to run the TinyOS application. However the C code produced +by NesC cannot be compiled for the 8051 platform directly.

    +

    One solution could be to alter the syntax NesC produces for this +specific platform, by modifying the source for NesC. However as a first +step we chose not to make changes to NesC, but instead changed the +content of the NesC output file 'app.c'. We inserted an extra step in +the tool chain in the form of a mangle script. The mangle script works +as the rope, tying the output from NesC to the input of SDCC or KEIL.

    +

    After running the mangling script on the 'app.c' file we obtain an +'app_mangled.c' file which can be compiled by either SDCC or KEIL. This +produces a hex file that is transferred to the chip by the nRFPROG +software.

    +
    +
    +

    3.4 Description of the Mangling Script

    +

    The mangling script is written in PERL, a commonly used general purpose +scripting language with powerful pattern matching capabilities and +extensive handling of regular expressions. The mangle script handles all +currently known problems, and it can easily be expanded to handle +additional alterations.

    +

    To run the mangle script use the following syntax:

    +
    +
    "./sdccMangleAppC.pl -KEIL -file build/mcs51/app.c >
    +
    build/mcs51/app_mangled.c"
    +
    +

    or

    +
    +
    "./sdccMangleAppC.pl -SDCC -file build/mcs51/app.c >
    +
    build/mcs51/app_mangled.c"
    +
    +

    The 'sdccMangleAppC.pl' script handles a number of needed alterations:

    +
    +
      +
    • it alters the SFR and SBIT declarations for SDCC and KEIL +respectively
      • +
    • it convert 64 bit data types to 32 bit
      • +
    • it alters the reserved SDCC keyword data to _data
      • +
    • it removes inlining directives
      • +
    • it removes preprocessor line numbering
      • +
    • it alters $ in identifiers to underscore
      • +
    • it alters GCC interrupt declaration to SDCC syntax
      • +
    +
    +

    Each of these alterations will be explained in the sections below.

    +
    +
    +

    3.4.1 SFR and SBIT Declarations

    +

    In order to make TinyOS accept the 8051 special function registers (SFR) +and special bit variables (SBIT), we have included them into the TinyOS +8051 platform folder as a 8051.h file.

    +

    SFRs are located on an address dividable by 8, whereas an SBIT addresses +a specific bit within these SFR.

    +

    In order to make TinyOS accept the SFRs we have type defined them in the +NesC code as:

    +
    +typedef int sfr; +sfr P0 __attribute((x80));
    +

    which is altered to

    +
    +//typedef int sfr; +sfr at 0x80 P0;
    +

    for the SDCC compiler in the mangle script and

    +
    +sfr P0 = 0x80;
    +

    for the KEIL compiler and similar for the SBIT declarations.

    +

    NOTE: The SDCC website refers to a PERL script (keil2sdcc.pl - last +updated June 2003) for translating SFR and SBIT declarations from KEIL +to SDCC, but it produces code with illegal syntax, so either do not use +it, or alter it to produce code with the right syntax.

    +
    +
    +

    3.4.2 SDCC/KEIL Data Types

    +

    TinyOS and SDCC/KEIL do not support the same data types, so some +alterations were needed to compile the code with SDCC and KEIL.

    +
    +
    SDCC/KEIL supports the following data types:
    +
      +
    • char (8 bits, 1 byte)
      • +
    • short (16 bits, 2 bytes)
      • +
    • int (16 bits, 2 bytes)
      • +
    • long (32 bit, 4 bytes)
      • +
    • float (32 bit, 4 bytes).
      • +
    +
    +
    +

    TinyOS supports an extra data type - 64 bit long long (u)int64_t. Since +we are working with software that does not support this data type, on a +very small hardware memory model, we decided to change the NesC 64 bit +data types to 32 bit. This is done in the mangling script.

    +
    +
    +

    3.4.3 Reserved Keywords in SDCC

    +

    A number of keywords are reserved in SDCC. Half of them represent a +directive to the compiler, defining which memory segment on the nRF24E1 +the specific lines of code refer to. To ensure that the developer does +not break code by unintentionally and unaware of their effect use them +fx. as a variable name in the NesC code, they need to be replaced or +altered to something else, e.g. data to _data, before compiling for +SDCC. Right now the mangle script only handles the reserved keyword +data. None of the other keywords except SFR, SBIT and interrupt are +currently in use in the code. This might pose as a problem to future +work, but the mangle script can easily be expanded to handle misuse of +the other keywords.

    +

    However, if the code size increases significantly in the future, it +might be nessecary to insert the keywords into the code, to support the +architectures segmented memory model. Right now, everything is stored in +the directly addressable memory segment, which is quite small.

    +
    +
    The reserved keywords are:
    +
      +
    • data / near
      • +
    • xdata / far
      • +
    • idata / pdata
      • +
    • code
      • +
    • bit
      • +
    • SFR / SBIT
      • +
    • interrupt
      • +
    • critical
      • +
    +
    +
    +

    Variables declared with keyword storage class data/near will be +allocated in the directly addressable portion of the internal RAM. This +is the default option for the small memory model. Variables declared +with storage class xdata/far will be placed in external RAM, which is +default for the large memory model.

    +

    Variables declared with keyword storage class idata will be allocated in +the indirectly addressable portion of the internal RAM. The first 128 +byte of idata physically access the same RAM as the data memory. The +original 8051 had 128 byte idata, but nowadays most devices have 256 +byte idata memory. Paged xdata access (pdata) is just as +straightforward.

    +

    The different memory segments that the keywords apply to, can be seen in +the figure below.

    +

    nRF24E1 Internal Data Memory Structure Overview:

    +
    +                       IRAM                  SFR
+                +---------------------+---------------------+
+            FFh |                     |                     | FFh
+                |   Accessible by     |   Accessible by     |
+Upper 128 bytes |   indirect          |   direct            |
+                |   addressing only   |   addressing only   |
+            80h |                     |                     | 80h
+                +---------------------+---------------------+
+            7Fh |                     |
+                | Addressable by      |
+Lower 128 bytes | direct and          |
+                | indirect addressing |
+            00h |                     |
+                +---------------------+
+
    +

    The prefered memory model can be defined in SDCC through CLI option +--model-small or --model-large - the small memory model is default. In +KEIL it can be changed through selecting it in the options pane for the +target.

    +
    +
    +

    3.4.4 Removal of inlining

    +

    NesC assumes that GCC is being used for the final compilation. GCC +supports inline functions and can be made to optimize code quite +aggressively, so the code generated by NesC does not need to be very +efficient. Unfortunately SDCC does not support code inlining, so the +inline statements have to be removed, when compiling for SDCC.

    +

    Lines with the following format are affected:

    +

    static inline void TOSH_sleep(void ); +static __inline void TOSH_SET_RED_LED_PIN(void); +__inline void__nesc_enable_interrupt(void);

    +

    Lines with the noinline attribute is substituted with the +#pragma NO_INLINE.

    +
    +
    +

    3.4.5 Removal of Preprocessor Line Numbering

    +

    Also NesC produce preprocessor line number meta data, to allow the +compiler to report error messages referring to the original code. We do +not really need them for anything, so we filter them out to minimize the +code size. It also eases the code reading significantly. If needed for +debug purposes the regular expression in the mangle script which remove +them can be commented out.

    +
    +
    +

    3.4.6 Change $ in Identifiers

    +

    The SDCC compiler is very strict when it comes to valid symbols in +identifiers. NesC produce GCC-code which inserts $ as a separator +character in identifiers. We mangle the $ to two underscores in order to +enable SDCC/KEIL to compile.

    +
    +
    +

    3.4.7 Interrupt Vectors

    +

    The syntax for declaration of interrupt vectors are different in GCC and +SDCC/KEIL. So we mangle the interrupt declaration:

    +

    From: void __attribute((interrupt)) __vector_5(void) +To: void __vector_5(void) interrupt 5

    +

    Additionally KEIL does not understand that the interrupt vector is +defined previous to its use. So we remove the forward declaration of the +vectors in the mangle script, when compiling for KEIL.

    +
    +
    +
    +

    4. TinyOS Modifications

    +

    TinyOS is based on modules with different levels of hardware +abstraction. When porting TinyOS to a new platform, you change the +underlying hardware dependencies in TinyOS, and you have to rebuild the +modules bottom up. Hence, it has been necessary to modify a number of +modules in TinyOS. The figure below shows the topological hierarchy of +the TinyOS modules we have focused on. By far, most of the work has been +done in the Hardware Presentation Layer (HPL), but certain changes also +affected the higher abstractions, such as changes in interfaces and +interrupt handling.

    +

    Modified TinyOS modules overview:

    +
    ++------------------------------------------------------------+
+|                     TinyOS Application                     |  App
++------------------------------------------------------------+
+  \/    /\            \/    /\           \/   /\      \/  /\   -----
++----------+        +----------+       +---------+  +--------+
+|  Timer   |        |   UART   |       |   ADC   |  |  LEDs  |  HAL
++----------+        +----------+       +---------+  +--------+
+  \/    /\            \/    /\           \/   /\               -----
++----------+  +---------------------+  +---------+
+| HPLClock |  |       HPLUART       |  | HPLADC  |      \/      HPL
++----------+  +---------------------+  +---------+
+  \/    /\        \/         \/  /\      \/   /\               -----
++----------+  +--------+   +--------+  +---------+  +--------+
+|  Timer2  |  | Timer1 | > | Serial |  | Sensors |  |  Port  |  HW
++----------+  +--------+   |  Port  |  +---------+  +--------+
+                          +--------+
+
    +

    The following sections describe the changes to the four groups of modules.

    +
    +

    4.1 HPLClock and related modules

    +

    The 8051 chip has three independent timer/counter circuits: Timer0, +Timer1 and Timer2, which can run in various modes. Each timer/counter +consists of a 16-bit register that is accessible to software as three +SFRs (TL0/TH0, TL1/TH1 and TL2/TH2). Timer0 and Timer1 can be used as 13 +or 16 bit timer/counter or as 8 bit counters with auto-reload. Timer2 is +only capable of running as a 16 bit timer/counter, but can remain as +such even in auto-reload mode. Reload is desirable for loading the clock +with a start value.

    +

    We have chosen to use Timer2 for the clock module, since it gives our +design a maximum clock interval of 49.15 ms at a 16 MHz system clock. +Using a different timer circuit would limit the interval to 0.192 ms, +which would result in a great deal of interrupts and consume processing +power for administrational overhead.

    +
    +
    +

    4.1.1 Timer

    +

    The Timer module (HAL) uses the HPLClock module to handle the hardware +timing. These two modules communicate through the clock interface. +However, the standard TinyOS clock interface is designed for an MCU with +a more flexible prescaler, then the 8051 chip is equipped with. The 8051 +is limited to a prescaler with a factor of 1/4 or 1/12 of the CPU clock +frequency, whereas the TinyOS clock interface currently uses an 8 bit +prescaler and an 8 bit timer. Because of the 8051s limited prescaler +options, and the possibility to use a 16 bit timer/counter to compensate +for the reduced prescaler options, we decided to widen the clock +interface from 8 to 16 bit. We are using the factor 1/4 for the +prescaler.

    +

    The interface change has affected the following methods: +result_t setRate(uint16_t interval, char scale) +void setInterval(uint16_t value) +void setNextInterval(uint16_t value) +uint16_t getInterval() +result_t setIntervalAndScale(uint16_t interval, uint8_t scale) +uint16_t readCounter() +void setCounter(uint16_t n)

    +
    +
    See:
    +
    Clock.h +Clock.nc +HPLClock.nc +TimerM.nc +TimerC.nc +8051.h
    +
    +
    +
    +

    4.2 HPLUART

    +

    The UART is depending on a timer to generate a baud rate for the serial +port. The architecture only allows two of the three timers (Timer1 or +Timer2), to act as such. Since Timer2 is already used by the clock +module, this leaves only Timer1 available for the UART module.

    +

    When using Timer1 as the baud rate generator, 5 different baud rates can +be obtained: 1.20 KiB/s, 2.4 KiB/s, 4.8 KiB/s, 9.6 KiB/s or 19.2 KiB/s. +We chose to use a baud rate of 19.2 KiB/s with 8 data bits, no parity +and one stop bit, since this speed is commonly used and the fastest +speed possible using this timer.

    +

    We have also expanded the HPLUART interface to include a put2 method. +This method is able to send more than one byte, by taking two pointers +as arguments. These pointers refer to the first and last bytes to be +sent. The HPLUART interrupt handler was also modified to take the +multiple byte data into account.

    +
    +
    See:
    +
    8051.h +HPLUART.nc +HPLUARTC.nc +HPLUARTM.nc
    +
    +
    +
    +

    4.3 HPLADC

    +

    The TinyOS standard ADC interface was developed for the AVR which +includes hardware functionality for repetitive sampling at a given +interval. Implementing this functionality on the 8051, which does not +support this in hardware, would require use of the last timer. We chose +not to implement repetitive sampling, therefore the setSampleRate method +currently has no use.

    +
    +
    See:
    +
    8051.h +ADCM.nc +HPLADCC.nc +HPLADCM.nc
    +
    +
    +
    +

    4.4 LEDS

    +

    TinyOS features three standard LEDs (Red, Green and Yellow), but the +nRF24E1 evaluation board is not equipped with programmable LEDs so we +used the general purpose ports (GPIO).

    +

    The standard 8051 platform features four 8 bit GPIO, however the nRF24E1 +evaluation board is only equipped with two ports: Port0 and Port1, where +Port0 has eight bits and Port1 has only three bits.

    +

    Intuitively the best solution would have been to place the standard +three TinyOS LED bits on Port1, but unfortunately we were unable to +control the most significant bit on Port1, since it is hard-wired as +input and controlled by external SPI_CTRL. The Yellow LED was moved to +Port0.

    +

    To visualize the status of the GPIO, including the three standard LEDs, +we built a LED expansion board.

    +
    +
    The three LEDs are currently wired to:
    +
    Red -> P1.0 +Green -> P1.1 +Yellow -> P0.7.
    +
    See:
    +
    8051.h +hardware.h +mcs51hardware.h +LedsC.nc
    +
    +
    +
    +

    4.5 Interrupts

    +

    In TinyOS interrupts are not implemented as a single module, they are +mainly facilitated in atomic blocks and in the init, start and stop +methods of the various HPL modules. The init, start and stop methods +only handle interrupts that are specific to the module, i.e. timer +interrupt for the HPLClock module and serial interrupt for the HPLUART +module. While the atomic block handle the enabling of global interrupts. +This is used to avoid preempting code execution in critical blocks.

    +
    +
    +
    +

    5. Conclusion

    +

    The project have reached a plateau of development in porting TinyOS to +the 8051 platform, on which future development can be based. The basic +modules (Timer, UART, ADC and LEDS) have been implemented making 8051 +accessible for the TinyOS community. However a essential module for the +field of sensor networks, the radio module, is still missing.

    +

    The result of our work will be uploaded to the TinyOS 8051 Working Group +website.

    +
    +
    +

    6. Future Work

    +

    The work presented in this TEP is short of being a complete porting of +TinyOS to the 8051 platform. Two obvious future tasks are implementing a +Radio module involving the SPI interface and Power Management for duty +cycling. The radio module is currently under development, in which the +main hurdle is the three wire SPI interface.

    +

    This work is done for TinyOS 1.x, but looking forward, the 8051 port +should target TinyOS 2.0. This might be a challenge with the timer +interface being so different from TinyOS 1.x.

    +
    +
    +

    7. Authors

    +
    +
    Anders Egeskov Petersen
    +
    University of Copenhagen, Dept. of Computer Science
    +
    Universitetsparken 1
    +
    DK-2100 K¯benhavn ÿ
    +
    Denmark
    +

    +
    Sidsel Jensen
    +
    University of Copenhagen, Dept. of Computer Science
    +
    Universitetsparken 1
    +
    DK-2100 K¯benhavn ÿ
    +
    Denmark
    +

    +
    email - purps@diku.dk
    +

    +
    Martin Leoold
    +
    University of Copenhagen, Dept. of Computer Science
    +
    Universitetsparken 1
    +
    DK-2100 K¯benhavn ÿ
    +
    Denmark
    +

    +
    Phone +45 3532 1464
    +

    +
    email - leopold@diku.dk
    +
    +
    +
    +

    8. Citations

    + + + + + +
    [NSC]Nordic Semiconductor. nRF24E1 Evalutaion board. +http://www.nordicsemi.no/files/Product/development_tools/nRF24E1_EVBOARD_rev1_0.pdf
    + + + + + +
    [PEH]Martin Leopold. "Power Estimation using the Hogthrob Prototype Platform" M.Sc. +Thesis, DIKU, Copenhagen University, Denmark, December 2004 .
    + + + + + +
    [HOG]Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet. +"Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor +Nodes" Eighth Euromicro Symposium on Digital Systems Design, 2005.
    +
    +
    + + diff --git a/doc/html/tep2.html b/doc/html/tep2.html new file mode 100644 index 00000000..546dda3a --- /dev/null +++ b/doc/html/tep2.html @@ -0,0 +1,882 @@ + + + + + + +Hardware Abstraction Architecture + + + + +
    +

    Hardware Abstraction Architecture

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:2
    Group:Core Working Group
    Type:Best Current Practice
    Status:Draft
    TinyOS-Version:2.0
    Author:Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer, Cory Sharp, Adam Wolisz and David Culler
    Draft-Created:14-Sep-2004
    Draft-Version:$revision$
    Draft-Modified:$date$
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This document specifies a Best Current Practices for the TinyOS +Community, and requests discussion and suggestions for +improvements. The distribution of the memo is unlimited, provided +that the header information and this note are preserved. Parts of +this document are taken verbatim from the [HAA2005] paper that is +under IEEE copyright. This memo is in full compliance with [TEP1].

    +
    +
    +

    1   Abstract

    +

    This TEP documents the Hardware Abstraction Architecture (HAA) for TinyOS +2.0 that balances conflicting requirements of WSN applications and the +desire for increased portability and streamlined development of +applications. The three-layer design gradually adapts the capabilities +of the underlying hardware platforms to the selected +platform-independent hardware interface between the operating system +core and the application code. At the same time, it allows the +applications to utilize a platform's full capabilities -- exported at +the second layer, when the performance requirements outweigh the need +for cross-platform compatibility.

    + +
    +
    +

    2   Table of Contents

    +
    +

    Contents

    + +
    +
    +
    +

    3   Introduction

    +

    The introduction of hardware abstraction in modern operating systems +has proved valuable for increasing portability and simplifying +application development by hiding the hardware intricacies from the +rest of the system. Although enabling portability, hardware +abstractions come into conflict with the performance and +energy-efficiency requirements of WSN applications.

    +

    We need a Hardware Abstraction Architecture (HAA) that can strike a +balance between the above conflicting goals. The component-based model +of TinyOS has the functionality required for resolving this +tension. The main challenge is to select an appropriate organization +of abstraction functionality in form of components to support +reusability while maintaining energy-efficiency through access to the +full hardware capabilities when it is needed.

    +

    Based on the experience in porting TinyOS to new platforms we believe +that an effective organization is possible when the strengths of the +component-based approach are combined with a flexible, three-tier +organization of the hardware abstraction architecture.

    +
    +
    +

    4   Architecture

    +

    In the proposed architecture (Fig.1), the hardware abstraction +functionality is organized in three distinct layers of components. +Each layer has clearly defined responsibilities and is dependent on +interfaces provided by lower layers. The capabilities of the +underlying hardware are gradually adapted to the established +platform-independent interface between the operating system and the +applications. As we move from the hardware towards this top interface, +the components become less and less hardware dependent, giving the +developer more freedom in the design and the implementation of +reusable applications.

    +
    +                                +-----------------------------+
+                                |                             |
+                                | Cross-platform applications |
+                                |                             |
+                                +--------------+--------------+
++-----------------+                            |                            +-----------------+
+|Platform-specific|                            |                            |Platform-specific|
+|  applications   |                            |                            |  applications   |
++--------+--------+       Platform-independent |  hardware interface        +--------+--------+
+         |          +-----------------+--------+--------+-----------------+          |
+         |          |                 |                 |                 |          |
+         |  +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+  |
+         |  |.------+------.| |.------+------.| |.------+------.| |.------+------.|  |
+         |  ||             || ||             || ||             || ||    HIL 4    ||  |
+         |  ||    HIL 1    || ||    HIL 2    || ||    HIL 3    || |`------+------'|  |
+         |  ||             || |`------+------'| |`------+------'| |       |       |  |
+         |  |`------+------'| |       |       | |       |       | |       |  +----+--+
+         +--+----+  |       | |.------+------.| |       |       | |       |  |    |
+            |    |  |       | ||             || |.------+------.| |.------+--+---.|
+            |.---+--+------.| ||             || ||             || ||             ||
+            ||             || ||    HAL 2    || ||             || ||             ||
+            ||             || ||             || ||    HAL 3    || ||    HAL 4    ||
+            ||    HAL 1    || |`------+------'| ||             || ||             ||
+            ||             || |       |       | ||             || ||             ||
+            ||             || |       |       | |`------+------'| |`------+------'|
+            |`------+------'| |.------+------.| |       |       | |       |       |
+            |       |       | ||             || |.------+------.| |       |       |
+            |.------+------.| ||    HPL 2    || ||             || |.------+------.|
+            ||    HPL 1    || ||             || ||    HPL 3    || ||    HPL 4    ||
+            |`------+------'| |`------+------'| |`------+------'| |`------+------'|
+            +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+  HW/SW
+                    |                 |                 |                 |          boundary
+       ************************************************************************************
+             +------+------+   +------+------+   +------+------+   +------+------+
+             |HW Platform 1|   |HW Platform 2|   |HW Platform 3|   |HW Platform 4|
+             +-------------+   +-------------+   +-------------+   +-------------+
+
+
+                      Fig.1: The proposed Hardware Abstraction Architecture
+
    +
    +

    4.1   Hardware Presentation Layer (HPL)

    +

    The components belonging to the HPL are positioned directly over +the HW/SW interface. As the name suggests, their major task is to +"present" the capabilities of the hardware using the native concepts +of the operating system. They access the hardware in the usual way, +either by memory or by port mapped I/O. In the reverse direction, the +hardware can request servicing by signaling an interrupt. Using these +communication channels internally, the HPL hides the hardware +intricacies and exports a more usable interface (simple function +calls) for the rest of the system.

    +

    The HPL components SHOULD be stateless and expose an interface +that is fully determined by the capabilities of the hardware module +that is abstracted. This tight coupling with the hardware leaves +little freedom in the design and the implementation of the components. +Even though each HPL component will be as unique as the underlying +hardware, all of them will have a similar general structure. For +optimal integration with the rest of the architecture, each HPL +component SHOULD have:

    +
      +
    • commands for initialization, starting, and stopping of the +hardware module that are necessary for effective power management +policy
      • +
    • "get" and "set" commands for the register(s) that control +the operation of the hardware
      • +
    • separate commands with descriptive names for the most +frequently used flag-setting/testing operations
      • +
    • commands for enabling and disabling of the interrupts generated by +the hardware module
      • +
    • service routines for the interrupts that are generated by the +hardware module
      • +
    +

    The interrupt service routines in the HPL components perform only +the most time critical operations (like copying a single value, +clearing some flags, etc.), and delegate the rest of the processing to +the higher level components that possess extended knowledge about the +state of the system.

    +

    The above HPL structure eases manipulation of the hardware. +Instead of using cryptic macros and register names whose definitions +are hidden deep in the header files of compiler libraries, the +programmer can now access hardware through a familiar interface.

    +

    This HPL does not provide any substantial abstraction over the +hardware beyond automating frequently used command +sequences. Nonetheless, it hides the most hardware-dependent code and +opens the way for developing higher-level abstraction components. +These higher abstractions can be used with different HPL +hardware-modules of the same class. For example, many of the +microcontrollers used on the existing WSN platforms have two USART +modules for serial communication. They have the same functionality +but are accessed using slightly different register names and generate +different interrupt vectors. The HPL components can hide these +small differences behind a consistent interface, making the +higher-level abstractions resource independent. The programmer can +then switch between the different USART modules by simple rewiring +(not rewriting) the HPL components, without any changes to the +implementation code.

    +
    +
    +

    4.2   Hardware Adaptation Layer (HAL)

    +

    The adaptation layer components represent the core of the +architecture. They use the raw interfaces provided by the HPL +components to build useful abstractions hiding the complexity +naturally associated with the use of hardware resources. In contrast +to the HPL components, they are allowed to maintain state that can +be used for performing arbitration and resource control.

    +

    Due to the efficiency requirements of WSN, abstractions at the HAL +level are tailored to the concrete device class and platform. Instead +of hiding the individual features of the hardware class behind generic +models, HAL interfaces expose specific features and provide the +"best" possible abstraction that streamlines application development +while maintaining effective use of resources.

    +

    For example, rather than using a single "file-like" abstraction for +all devices, we propose domain specific models like Alarm, ADC +channel, EEPROM. According to the model, HAL components SHOULD +provide access to these abstractions via rich, customized interfaces, +and not via standard narrow ones that hide all the functionality +behind few overloaded commands.

    +
    +
    +

    4.3   Hardware Interface Layer (HIL)

    +

    The final tier in the architecture is formed by the HIL components +that take the platform-specific abstractions provided by the HAL and +convert them to hardware-independent interfaces used by cross-platform +applications. These interfaces provide a platform independent +abstraction over the hardware that simplifies the development of the +application software by hiding the hardware differences. To be +successful, this API "contract" SHOULD reflect the typical +hardware services that are required in a WSN application.

    +

    The complexity of the HIL components mainly depends on how advanced +the capabilities of the abstracted hardware are with respect to the +platform-independent interface. When the capabilities of the hardware +exceed the current API contract, the HIL "downgrades" the +platform-specific abstractions provided by the HAL until they are +leveled-off with the chosen standard interface. Consequently, when the +underlying hardware is inferior, the HIL might have to resort to +software simulation of the missing hardware capabilities. As newer +and more capable platforms are introduced in the system, the pressure +to break the current API contract will increase. When the performance +requirements outweigh the benefits of the stable interface, a discrete +jump will be made that realigns the API with the abstractions provided +in the newer HAL. The evolution of the platform-independent interface +will force a reimplementation of the affected HIL components. For +newer platforms, the HIL will be much simpler because the API contract +and their HAL abstractions are tightly related. On the other extreme, +the cost of boosting up (in software) the capabilities of the old +platforms will rise.

    +

    Since we expect HIL interfaces to evolve as new platforms are +designed, we must determine when the overhead of software emulation of +hardware features can no longer be sustained. At this point, we +introduce versioning of HIL interfaces. By assigning a version +number to each iteration of an HIL interface, we can design +applications using a legacy interface to be compatible with previously +deployed devices. This is important for WSNs since they execute +long-running applications and may be deployed for years. An HIL MAY +also branch, providing multiple different HIL interfaces with +increasing levels of functionality.

    +
    +
    +

    4.4   Selecting the level of abstraction

    +

    The platform-dependence of the HAL in the architecture leads to the +more general question about why we have opted for a three-layered +design. In other words, why we do not expose the platform-independent +hardware interface directly from the HAL components. The main reason +behind this decision is the increased flexibility that arises from +separating the platform-specific abstractions and the adaptation +wrappers that upgrade or downgrade them to the current +platform-independent interface. In this way, for maximum performance, +the platform specific applications can circumvent the HIL components +and directly tap to the HAL interfaces that provide access to the full +capabilities of the hardware module.

    +

    Selecting the "right" level--whether an application should use the HIL +or directly access the HAL--can sometimes cause one hardware asset to +be accessed using two levels of abstraction from different parts of +the application or the OS libraries.

    +

    Let us take an application similar to the standard OscilloscopeRF +application in TinyOS as an example. The application uses the ADC to +sample several values from a temperature sensor and sends them in the +form of a message over the radio. If the observed phenomenon does not +have a large signal bandwidth and the time between subsequent +conversions is long, for the sake of cross-platform compatibility, the +programmer might decide to use the standard ADCSingle +interface. This interface is exported by the HIL sensor wrapper +(Fig.2) using the services of the platform-specific HAL +component. When enough samples are collected in the message buffer, +the application passes the message to the networking stack. The MAC +protocol used for message exchange over the radio uses clear channel +assessment to determine when it is safe to send the message. This +usually requires taking several samples of the RSSI signal provided by +the radio hardware. Since this is a very time critical operation in +which the correlation between the consecutive samples has a +significant influence, the programmer of the MAC might directly use +the MSP430ADC12Multiple interface of the HAL component as it +provides much finer control over the conversion process.

    +
    +StdControl
+       | ADCSingle
+       |    |  ADCMultiple
+       |    |    |
++------|----|----|------------------------------------------+
+|      |    |    |                            Temperature   |
+|      v    v    v                                          |
+| +--------------------+ MSP430ADC12Single   +------------+ |
+| |   TemperatureM     |-------------------->|MSP430ADC12C| |
+| |                    | MSP430ADC12Multiple |            | |
+| |                    |-------------------->|            | |
+| +--------------------+                     +------------+ |
++-----------------------------------------------------------+
+
+           Fig.2: The ADC HIL sensor wrapper
+
    +

    As a result of this chain of decisions, we end up with a concurrent +use of the ADC hardware module using two different levels of +abstraction. To support this type of "vertical" flexibility we include +more complex arbitration and resource control functionality in the HAL +components so that a safe shared access to the HPL exported resources +can be guaranteed.

    +
    +
    +
    +

    5   Reference

    +

    The proposed HAA was applied for the first time during the +implementation of the MSP430 platform that abstracts the +capabilities of the TI MSP430 microcontroller in TinyOS 1.1.7. The +implementation is currently being used by four hardware platforms +(TelosA, TelosB, eyesIFX and eyesIFXv2) and has quite successfully +satisfied the requirements of a large range of applications.

    +

    In the following we illustrate the properties of the proposed +architecture using real-world examples from the planned hardware +abstraction functionality in TinyOS 2.0.

    +
    +

    5.1   Processing unit

    +

    In TinyOS most of the variability between the processing units is +hidden from the OS simply by using a nesC/C based programming language +with a common compiler suite (GCC). For example, the standard library +distributed with the compiler creates the necessary start-up code for +initializing the global variables, the stack pointer and the interrupt +vector table, shielding the OS from these MCU-specific tasks.

    +

    To unify things further, TinyOS provides mechanisms for declaring +reentrant and non-reentrant interrupt service routines and critical +code-sections. For the MCU's external pins, it provides macros that +permit setting and clearing the pin, as well as changing its direction +and function. For example, the TI~MSP430's ADC pins may be used as +either general I/O or as an analog input to the ADC hardware module. +Macros are also provided for timed spin loops at microsecond +resolution, independent of the microcontroller. These macros are +defined in each platform's hardware.h descriptor file. Finally, +the HPL components deal with the different ways of accessing +registers (memory-mapped or port-mapped I/O) using the definitions in +the standard library header files.

    +

    The three-layer architecture is not intended to abstract the features +of the different MCU cores. For the currently supported MCUs, the +combination of the compiler suite support with the thin abstraction in +the hardware.h files is sufficient. Nevertheless, if new cores +with radically different architectures need to be supported by TinyOS +in the future, this part of the hardware abstraction functionality +will have to be explicitly addressed.

    +
    +
    +

    5.2   Power management

    +

    On both the MSP430 and the Atmel, before entering a sleep mode, a +component checks if any hardware modules require that the MCU core is +active. Additionally, all services including HPL and HAL +components have a start and stop function. When a service is no +longer using a hardware module, it may call the stop function of the +HPL or HAL component. Doing so disables the module for power +savings, but also removes the MCU's dependence on that hardware module +to enter sleep mode. For example, the ADC module may be clocked from +a high speed oscillator. When a sample is not in progress, the ADC +module may be shut down and it will no longer use the high speed +oscillator. As a result, when the MCU is idle, it may enter low power +mode.

    +

    This rather efficient way of implementing the power management +functionality is made possible by the fact that most of the hardware +modules are on-chip, attached directly to the MCU system bus, and that +there is no hardware memory protection hindering the access to their +status registers. As TinyOS platforms add more external devices +connected via the peripheral buses, this task will get increasingly +complicated. Ultimately, keeping some state in the form of device +enumeration or reference counting mechanisms might be needed for +proper power management.

    +
    +
    +

    5.3   Clocks and timers

    +

    The application of the HAA for abstracting the clock and timer +modules is documented in [TEP102].

    +
    +
    +

    5.4   Analog-to-digital converters

    +

    The application of the HAA for abstracting the analog-to-digital +converter modules is documented in [TEP101].

    +
    +
    +

    5.5   Data busses

    +

    The HPL functionality for the data busses includes two paths--one +for data and a second for control. The control path allows the clock +source, prescaler, and baud rate to be set. Interrupts may be enabled +or disabled and various hardware flags may be read, set, or cleared, +useful for polling or blocking implementations. Through the control +path, the entire module may be started or stopped for power control. +The data interface simply consists of sending and receiving a byte +through the hardware's data registers, as well as interrupt based +reporting of received data. Here is an example of the interfaces used +in the MSP430 platform:

    +
    +interface HPLUSARTControl {
+  async command void enableUART();
+  async command void disableUART();
+  async command void enableUARTTx();
+  async command void disableUARTTx();
+  async command void enableUARTRx();
+  async command void disableUARTRx();
+  async command void enableSPI();
+  async command void disableSPI();
+  async command void setModeSPI();
+  async command void setModeUART_TX();
+  async command void setModeUART_RX();
+  async command void setModeUART();
+  async command void setClockSource(
+        uint8_t source);
+  async command void setClockRate(
+        uint16_t baudrate, uint8_t mctl);
+  async command result_t disableRxIntr();
+  async command result_t disableTxIntr();
+  async command result_t enableRxIntr();
+  async command result_t enableTxIntr();
+  async command result_t isTxIntrPending();
+  async command result_t isRxIntrPending();
+  async command result_t isTxEmpty();
+  async command result_t tx(uint8_t data);
+  async command uint8_t rx();
+}
+
+interface HPLUSARTFeedback {
+  async event result_t txDone();
+  async event result_t rxDone(uint8_t data);
+}
+
    +

    Sometimes functionality for more than one bus protocol are supported +through a single hardware module. In these cases, wrappers for each +bus provide standard application interfaces for using the bus. +Sharing the bus amongst different hardware devices or protocols may be +done through a bus arbitration component. Bus arbitration allows +higher level services to attain exclusive use of the bus, complete its +operations, and then release the bus to the next service:

    +
    +interface BusArbitration {
+  async command result_t getBus();
+  async command result_t releaseBus();
+  event result_t busFree();
+}
+
    +
    +
    +

    5.6   External storage

    +

    The application of the HAA for abstracting the external storage +modules is documented in [TEP103].

    +
    +
    +

    5.7   Radios

    +

    The application of the HAA for abstracting the radio modules is +documented in [TEP104] and [TEP105].

    +
    +
    +
    +

    6   Conclusion

    +

    The referenced TEPs in the previous section show that the three-layer +design can be successfully used for exposing to the applications the +functionality of the main hardware modules. The proposed architecture +provides a set of core services that eliminate duplicated code and +provide a coherent view of the system across different architectures +and platforms. It supports the concurrent use of platform-independent +and the platform-dependent interfaces in the same application. In this +way, applications can localize their platform dependence to only the +places where performance matters, while using standard cross-platform +hardware interfaces for the remainder of the application.

    +
    +
    +

    7   Author's Address

    +
    +
    Vlado Handziski (handzisk at tkn.tu-berlin.de) [1]
    +
    Joseph Polastre (polastre at cs.berkeley.edu) [2]
    +
    Jan-Hinrich Hauer (hauer at tkn.tu-berlin.de) [1]
    +
    Cory Sharp (cssharp at eecs.berkeley.edu) [2]
    +
    Adam Wolisz (awo at ieee.org) [1]
    +
    David Culler (culler at eecs.berkeley.edu) [2]
    +
    + + + + + +
    [1](1, 2, 3) Technische Universitaet Berlin +Telecommunication Networks Group +Sekr. FT 5, Einsteinufer 25 +10587 Berlin, Germany
    + + + + + +
    [2](1, 2, 3) University of California, Berkeley +Computer Science Department +Berkeley, CA 94720 USA
    +
    +
    +

    8   Citations

    + + + + + +
    [HAA2005]V. Handziski, J.Polastre, J.H.Hauer, C.Sharp, +A.Wolisz and D.Culler, "Flexible Hardware Abstraction for Wireless +Sensor Networks", in Proceedings of the 2nd European Workshop on +Wireless Sensor Networks (EWSN 2005), Istanbul, Turkey, 2005.
    + + + + + +
    [TEP1]
      +
    1. Levis, "TEP structure and key words"
      2. +
    +
    + + + + + +
    [TEP101]J.H. Hauer, V. Handziski, J. Polastre, L. Nachman, +"Analog-to-digital Converter Abstraction"
    + + + + + +
    [TEP102]
      +
    1. Sharp, "Clock and Timers Abstraction"
      2. +
    +
    + + + + + +
    [TEP103]
      +
    1. Gay, J. Hui, "Non-volatile Storage Abstraction"
      2. +
    +
    + + + + + +
    [TEP104]
      +
    1. Klues, "Radio Hardware Abstraction"
      2. +
    +
    + + + + + +
    [TEP105]
      +
    1. Polastre, "Link Layer Primitives in TinyOS"
      2. +
    +
    + +
    +
    + + diff --git a/doc/html/tep3.html b/doc/html/tep3.html new file mode 100644 index 00000000..a5f6123a --- /dev/null +++ b/doc/html/tep3.html @@ -0,0 +1,768 @@ + + + + + + +Coding Standard + + + + +
    +

    Coding Standard

    + +++ + + + + + + + + + + + + + + + + + + + + + +
    TEP:3
    Group:TinyOS 2.0 Working Group
    Type:Best Current Practice
    Status:Draft
    TinyOS-Version:2.x
    Author:Ion Yannopoulos, David Gay
    Draft-Created:31-Dec-2004
    Draft-Version:1.1.2.3
    Draft-Modified:2006-01-16
    Draft-Discuss:TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
    +
    +

    Note

    +

    This document specifies a Best Current Practices for the +TinyOS Community, and requests discussion and suggestions for +improvements. Distribution of this memo is unlimited. This memo +is in full compliance with [TEP_1].

    +
    +
    +

    Contents

    + +
    +
    +

    1   Introduction

    +
    +
    The purpose of a naming convention is twofold:
    +
      +
    • To avoid collisions which prevent compilation or lead to errors. +In TinyOS the most important place to avoid such collisions is in +interface and component names.
      • +
    • To enable readers of the code to identify which names are grouped +together and which packages they are defined in.
      • +
    +
    +
    +

    Remember that code that is useful will end up being read far more often +than it is written. If you deviate from the suggestions or requirements +below, be consistent in how you do so. If you add any new conventions to +your code, note it in a README.

    +
    +
    +

    2   General Conventions

    +
    +

    2.1   General

    +
    +
      +
    • Avoid the use of acronyms and abbreviations that are not well known. +Try not to abbreviate "just because".
      • +
    • Acronyms should be capitalized (as in Java), i.e., Adc, not ADC. +Exception: 2-letter acronyms should be all caps (e.g., AM for active +messages, not Am)
      • +
    • If you need to abbreviate a word, do so consistently. Try to be +consistent with code outside your own.
      • +
    • All code should be documented using nesdoc [nesdoc], Doxygen +[Doxygen] or Javadoc [Javadoc]. Ideally each command, event and +function has documentation. At a bare minimum the interface, component, +class or file needs a paragraph of description.
      • +
    • If you write code for a file, add an @author tag to the toplevel +documentation block.
      • +
    +
    +
    +
    +
    +

    3   Packages

    +

    For the purposes of this document a package is a collection of related +source and other files, in whatever languages are needed. A package is +a logical grouping. It may or may not correspond to a physical grouping +such as a single directory. In TinyOS a package is most often a +directory with zero or more subdirectories.

    +

    nesC and C do not currently provide any package support, thus names +of types and components in different packages might accidentally +clash. To make this less likely, judiciously use prefixes on groups +of related files (often, but not always, part of a single package). +See the examples below.

    +

    In a package, we distinguish between public components (intended to +be used and wired outside the package) and private components (only +used and wired within the package). This distinction is not enforced +by nesC.

    +
    +

    3.1   Directory structure

    +
    +
      +

    • Each package should have it's own directory. It may have as many +subdirectories as are necessary.

      +
      • +

    • The package's directory should match the package's prefix (if it +uses one), but in lower-case.

      +
      • +

    • The default packages in a TinyOS distribution are:

      +
        +
      • +
        tos/system/. Core TinyOS components. This directory's
        +

        components are the ones necessary for TinyOS to actually run.

        +
        +
        +
        • +
      • +
        tos/interfaces/. Core TinyOS interfaces, including
        +

        hardware-independent abstractions. Expected to be heavily +used not just by tos/system but throughout all other code. +tos/interfaces should only contain interfaces named in TEPs.

        +
        +
        +
        • +
      • +
        tos/platforms/. Contains code specific to mote platforms, but
        +

        chip-independent.

        +
        +
        +
        • +
      • +
        tos/chips/. Contains code specific to particular chips and to
        +

        chips on particular platforms.

        +
        +
        +
        • +
      • +
        tos/libs/. Contains interfaces and components which extend the
        +

        usefulness of TinyOS but which are not viewed as essential to its +operation. Libraries will likely contain subdirectories.

        +
        +
        +
        • +
      • +
        apps/, apps/demos, apps/tests, apps/tutorials. Contain
        +

        applications with some division by purpose. Applications may +contain subdirectories.

        +
        +
        +
        • +
      +
      • +

    • It is not necessary that packages other than the core break up their +components and their interfaces. The core should allow overrides of +components fairly easily however.

      +
      • +

    • Each directory should have a README describing its purpose.

      +
      • +
    +
    +
    +
    +
    +

    4   Language Conventions

    +
    +

    4.1   nesC convention

    +
    +

    4.1.1   Names

    +
    +
      +
    • All nesC files must have a .nc extension. The nesC compiler requires +that the filename match the interface or component name.
      • +
    • Directory names should be lowercase.
      • +
    • Interface and component names should be mixed case, starting upper +case.
      • +
    • All public components should be suffixed with 'C'.
      • +
    • All private components should be suffixed with 'P'.
      • +
    • Avoid interfaces ending in 'C' or 'P'.
      • +
    • If an interface and component are related it is useful if they have +the same name except for the suffix of the component.
      • +
    • Commands, events, tasks and functions should be mixed case, starting +lower case.
      • +
    • Events which handle the second half of a split-phase operation begun +in a command should have names that are related to the commands. +Making the command past tense or appending 'Done' are suggested.
      • +
    • Constants should be all upper case, words separated by underscores. +- Use of #define for integer constants is discouraged: use enum.
      • +
    • Type arguments to generic components and interfaces should use the +same case as C types: all lower-case separated by underscores, ending +in '_t'.
      • +
    • Module (global) variables should be mixed case, starting lower case.
      • +
    +
    +
    +
    +

    4.1.2   Packages

    +
    +
      +

    • Each package may use a prefix for its component, interface and +global C names. These prefixes may sometimes be common to multiple +packages. Examples:

      +
      +
        +
      • All hardware presentation layer names start with Hpl (this is +an example of a shared prefix).
        • +
      • Chip-specific hardware abstraction layer components and interfaces +start with the chip name, e.g., Atm128 for ATmega128.
        • +
      • The Maté virtual machine uses the Mate to prefix all its names.
        • +
      • Core TinyOS names (e.g., the timer components, the Init interface) +do not use a prefix.
        • +
      +
      +
      • +

    • Some packages may use multiple prefixes. For instance, the ATmega128 +chip package uses an Hpl prefix for hardware presentation layer +components and Atm128 for hardware abstraction layer components.

      +
      • +
    +
    +
    +
    +

    4.1.3   Preprocessor

    +
    +
      +
    • Don't use the nesC includes statement. It does not handle macro +inclusion properly. Use #include instead.
      • +
    • Macros declared in an .nc file must be #define'd after the +module or configuration keyword to actually limit their scope to +the module.
      • +
    • Macros which are meant for use in multiple .nc files should be +#define'd in a #include'd C header file.
      • +
    • Use of macros should be minimized: +#define should only be used where enum and inline do not suffice.
        +
      • Arguments to unique() should be #define string constants rather +than strings. This minimizes nasty bugs from typos the compiler +can't catch.
        • +
      +
      • +
    +
    +
    +
    +
    +

    4.2   C Convention

    +
    +
      +
    • All C files have a .h (header) or (rarely) a .c (source) extension.
        +
      • Filenames associated with a component should have the same name as +the component.
        • +
      • Filenames of a package should have a name with the package +prefix (if any).
        • +
      • Filenames which are not associated with a component should be lowercase.
        • +
      +
      • +
    • C does not protect names in any way. If a package uses a prefix, it +should also use it for all types, tags, functions, variables, +constants and macros. This leads naturally to:
        +
      • Minimize C code outside of nesC files. In particular: most uses of +hardware specific macros in TinyOS 1.x should be replaced with nesC +components in TinyOS 2.x.
        • +
      +
      • +
    • C type names (define with typedef) should be lower case, words +separated by underscores and ending in '_t'.
      • +
    • C tag names (for struct, union, or enum) should be lower case, +words separated by underscores. Types with tag names should provide +a typedef.
      • +
    • C types which represent opaque pointers (for use in parameters) should +be named similar to other types but should end in '_ptr_t'.
      • +
    • Functions should be lower case, words separated by underscores.
      • +
    • Function macros (#define ) should be all upper case, words separated +by underscores.
        +
      • Using function macros is discouraged: use inline functions.
        • +
      +
      • +
    • Constants should be all upper case, words separated by underscores. +- Use of #define for integer constants is discouraged: use enum.
      • +
    • Global variables should be mixed case, starting lower case.
      • +
    +
    +
    +
    +

    4.3   Java convention

    +
    +
      +
    • The standard Java coding convention [Java_Coding_Convention] +should be followed.
      • +
    • All core TinyOS code is in the package net.tinyos.
      • +
    +
    +
    +
    +

    4.4   Other languages

    +
    +
      +
    • No established conventions.
      • +
    +
    +
    +
    +
    +

    5   TinyOS Conventions

    +

    TinyOS also follows a number of higher-level programming conventions, +mostly designed to provide a consistent "look" to TinyOS interfaces and +components, and to increase software reliability.

    +
    +

    5.1   Error returns

    +

    TinyOS defines a standard error return type, error_t, similar to Unix's +error returns, except that error codes are positive:

    +
    +enum {
+  SUCCESS        = 0,
+  FAIL           = 1,
+  ESIZE          = 2, // Parameter passed in was too big.
+  ...
+};
+
    +

    SUCCESS represents successful execution of an operation, and FAIL +represents some undescribed failure. Operations can also return more +descriptive failure results using one of the Exxx constants, see the +tos/types/TinyError.h file for the current list of errors.

    +

    The error_t type has a combining function to support multiple wiring +of commands or events retuning error_t, defined as follows:

    +
    +error_t ecombine(error_t r1, error_t r2) { return r1 == r2 ? r1 : FAIL; }
+
    +

    This function returns SUCCESS if both error returns are SUCCESS, an +error code if they both return the same error, and FAIL otherwise.

    +

    Commands that initiate a split-phase operation SHOULD return error_t if +the operation may be refused (i.e., the split-phase event may not be +signaled under some conditions). With such functions, the split-phase event +will be signaled iff the split-phase command returns SUCCESS.

    +
    +
    +

    5.2   Passing pointers between components

    +

    Sharing data across components can easily lead to bugs such as data races, +overwriting data, etc. To minimise the likelyhood of these occurrences, +we discourage the use of pointers in TinyOS interfaces.

    +

    However, there are circumstances where pointers are necessary for +efficiency or convenience, for instance when receiving messages, reading +data from a flash chip, returning multiple results, etc. Thus we allow the +use of pointers within interfaces as long as use of those pointers follows +an "ownership" model: at any time, only one component may refer to the +object referenced by the pointer. We distinguish two cases:

    +
      +

    • Ownership transferred for the duration of a call: in the following command:

      +
      +command void getSomething(uint16_t *value1, uint32_t *value2);
+
      +

      we are using pointers to return multiple results. The component +implementing getSomething MAY read/write *value1 or *value2 +during the call and MUST NOT access these pointers after getSomething +returns.

      +
      • +

    • Permanent ownership transfer: in the following split-phase interface:

      +
      +interface Send {
+  command void send(message_t *PASS msg);
+  event void sendDone(message_t *PASS msg);
+}
+
      +

      components calling send or signaling sendDone relinquish ownership of +the message buffer. For example, take a program where component A uses +the Send interface and B provides it. If A calls send with a +pointer to message_t x, then ownership of x passes to B and A +MUST NOT access x while B MAY access x. Later, when B signals the +sendDone event with a pointer to x as parameter, ownership of x +returns to A and A MAY access x, while B MUST NOT access x.

      +

      If an interface with PASS parameters has a return type of +error_t, then ownership is transferred iff the result is +SUCCESS. For instance, in

      +
      +interface ESend {
+  command error_t esend(message_t *PASS msg);
+  event void esendDone(message_t *PASS msg, error_t sendResult);
+}
+
      +

      ownership is transferred only if esend returns SUCCESS, while +ownership is always transferred with esendDone. This convention +matches the rule for signaling split-phase completion events discussed +above.

      +

      PASS is a do-nothing macro defined as follows:

      +
      +#define PASS
+
      +
      • +
    +

    In the future, some tool may check that programs respect these ownership +transfer rules.

    +
    +
    +

    5.3   Usage of wiring annotations

    +

    TinyOS checks constraints on a program's wiring graph specified by +annotations on a component's interfaces. Wiring constraints are specified +by placing @atmostonce(), @atleastonce() and @exactlyonce() +attributes on the relevant interfaces. For instance, writing

    +
    +module Fun {
+  provides interface Init @atleastonce();
+...
+
    +

    ensures that programs using module Fun must wire its Init interface +at least once.

    +

    The @atleastonce() and @exactlyonce() annotations SHOULD be used +sparingly, as they can easily prevent modularising subsystem +implementations, which is undesirable. However, the @atleastonce() +annotation SHOULD be used on initialisation interfaces (typically, the +Init interface) in modules, to prevent the common bug of forgetting to +wire initialisation code.

    +
    +
    +
    +

    6   Citations

    + + + + + +
    [TEP_1]TEP 1 +<http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-1.html>
    + + + + + +
    [TEP_2]TEP 2 +<http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-2.html>
    + + + + + +
    [Doxygen]Doxygen <http://www.doxygen.org>
    + + + + + +
    [Java_Coding_Convention]Java Coding Convention +<http://java.sun.com/docs/codeconv/html/CodeConvTOC.doc.html>
    + + + + + +
    [JavaDoc]JavaDoc <http://java.sun.com/j2se/javadoc>
    + + + + + +
    [nesdoc]nesdoc <http://www.tinyos.net/tinyos-1.x/doc/nesc/nesdoc.html>
    +
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index 00000000..22c9b2f0 --- /dev/null +++ b/doc/html/tutorial/index.html @@ -0,0 +1,97 @@ + + + + TinyOS Tutorial + + + + + +

    TinyOS 2.0 Tutorials
    +
    Last updated 14 Jun 2006
    + + + These brief tutorials are intended to get you started with TinyOS. They show + you the basics of writing, compiling, and installing TinyOS applications. + They introduce the basic TinyOS abstractions: computation, communication, + sensing, and storage. The later tutorials go a little deeper into some of + the more advanced areas of TinyOS, such as handling interrupts, + power management, and how platforms are organized. For the beta2 release, + only tutorials 1-5 are ready. + +

    Lesson 1: TinyOS

    + +
    Lesson 1 introduces the major concepts of TinyOS: components, modules, + configurations and interfaces. It shows you how to compile and install + a TinyOS program on a mote. +
    + +

    Lesson 2: Modules and the TinyOS Execution Model

    + +
    Lesson 2 explains the TinyOS execution model, looking more closely + at modules. It explains events, commands and their relationships to + interfaces in greater depth, introducing split-phase operations. + It explains tasks, the basic mechanism in TinyOS for components to + cooperatively share the processor. +
    + +

    Lesson 3: Mote-mote radio communication

    + +
    Lesson 3 introduces the TinyOS communication model. There is an exercise that + illustrates sending and receiving messages. +
    + +

    Lesson 4: Mote-PC serial communication and SerialForwarder

    + +
    Lesson 4 introduces the the TinyOS toolchain for PCs + and laptops to communicate with motes. It describes the + concept of a packet source, the mig tool, + and SerialForwarder. +
    + +

    Lesson 5: Sensing

    + +
    Lesson 5 explains how to sample sensors in TinyOS. There is an exercise that + periodically samples a sensor and displays the value on the leds. +
    + +

    Lesson 6: Boot Sequence

    + +
    Lesson 6 details the boot sequence and, in doing so, answers the question, "But where is main()?". +
    + +

    Lesson 7: Storage

    + +
    Lesson 7 introduces the TinyOS model model. A sample + application illustrates storing data. +
    + +

    Lesson 8: Power Management

    + +
    Lesson 8 introduces the TinyOS power management model. There is an exercise that + illustrates how to turn components on and off. +
    + +

    Lesson 9: Concurrency

    + +
    Lesson 9 introduces the TinyOS concurrency model. Tasks are revisited and async code is introduced. +
    + +

    Lesson 10: Platforms

    + +
    + - chips vs. platforms + - Telescoping abstractions + - Sensorboards +
    + +

    Lesson 11: TOSSIM

    + +
    Lesson 11 introduces TOSSIM, a TinyOS simulator. TOSSIM allows + you to compile your TinyOS applications into a simulation + framework, where you can perform reproducible tests and debug + your code with standard development tools. +
    + + + diff --git a/doc/html/tutorial/lesson-t.html b/doc/html/tutorial/lesson-t.html new file mode 100644 index 00000000..46b1998b --- /dev/null +++ b/doc/html/tutorial/lesson-t.html @@ -0,0 +1,1252 @@ + + + + Lesson T: Simulation with TOSSIM + + + + +$Id$ + +
    Lesson T: Simulation with TOSSIM
    +
    Last Modified: Feb 9, 2006
    + +

    This lesson introduces the TOSSIM simulator. You will become + familiar with how to compile TOSSIM and use some of its + functionality. You will learn how to:

    + +

    + +

      + +
    • Compile TOSSIM.
      • + +
    • Configure a simulation in Python and C++.
      • + +
    • Inspect variables.
      • + +
    • Inject packets.
      • +
    +

    + + +

    Introduction

    + + TOSSIM simulates entire TinyOS applications. It works by + replacing components with simulation implementations. The + level at which components are replaced is very flexible: for + example, there is a simulation implementation of millisecond + timers that replaces HilTimerMilliC, while there is also an + implementation for atmega128 platforms that replaces the HPL + components of the hardware clocks. The former is general and + can be used for any platform, but lacks the fidelity of + capturing an actual chips behavior, as the latter + does. Similarly, TOSSIM can replace a packet-level + communication component for packet-level simulation, or + replace a low-level radio chip component for a more precise + simulation of the code execution. + + TOSSIM is a discrete event simulator. When it runs, it pulls + events of the event queue (sorted by time) and executes them. + Depending on the level of simulation, simulation events can + represent hardware interrupts or high-level system events + (such as packet reception). Additionally, tasks are simulation + events, so that posting a task causes it to run a short time + (e.g., a few microseconds) in the future. + + TOSSIM is a library: you must write a program that configures + a simulation and runs it. TOSSIM supports two programming + interfaces, Python and C++. Python allows you to interact with + a running simulation dynamically, like a powerful + debugger. However, as the interpretation can be a performance + bottleneck when obtaining results, TOSSIM also has a C++ + interface. Usually, transforming code from one to the other is + very simple. + + TOSSIM currently does not support gathering power + measurements. + +

    Compiling TOSSIM

    + +

    TOSSIM is a TinyOS library. Its core code lives in tos/lib/tossim. Every TinyOS + source directory has an optional sim subdirectory, + which contains simulation implementations of that package. For + example, tos/chips/atm128/timer/sim + contains TOSSIM implementations of some of the Atmega128 timer + abstractions.

    + +

    To compile TOSSIM, you pass the sim option to make:

    + + 
    +          $ cd apps/Blink
+          $ make micaz sim
+
    + + + +

    Currently, the only platform TOSSIM supports is the + micaz. You should see output similar to this:

    + 
    +          mkdir -p build/micaz
+            placing object files in build/micaz
+            writing XML schema to app.xml
+            compiling BlinkAppC to object file sim.o 
+          ncc -c -fPIC -o build/micaz/sim.o -g -O0 -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)   -finline-limit=100000 -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=micaz -fnesc-cfile=build/micaz/app.c -board=micasb  -Wno-nesc-data-race BlinkAppC.nc   -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags -fnesc-dumpfile=app.xml
+            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+          copying Python script interface TOSSIM.py from lib/tossim to local directory
+
    + +

    Compiling TOSSIM has five basic steps. Let's go through + them one by one.

    + +

    Writing an XML schema

    + + 
    +          writing XML schema to app.xml
+
    + +

    The first thing the TOSSIM build process does is use + nesc-dump to produce an XML document that describes the + application. Among other things, this document descibes the + name and type of every variable.

    + +

    Compiling the TinyOS Application

    + +

    Besides introducing all of these new compilation steps, the + sim option changes the include paths of the + application. If the application has a series of includes

    + + 
    +          -Ia -Ib -Ic
+
    + +

    Then the sim option transforms the list to

    + + 
    +          -Ia/sim -Ib/sim -Ic/sim -I%T/lib/tossim -Ia -Ib -Ic
+
    + +

    This means that any system-specific simulation + implementations will be used first, followed by generic TOSSIM + implementations, followed by standard implementations. The + sim option also passes a bunch of arguments to the + compiler, so it knows to compile for simulation.

    + +

    The product of this step is an object file, sim.o, + which lives in the platform's build directory. This object + file has a set of C functions which configure the simulation + and control execution.

    + +

    Compiling the Programming Interface

    + + 
    +            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim \
+          -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+
    + +

    The next step compiles the support for the C++ and Python + programming interfaces. The Python interface is actually built + on top of the C++ interface. Calling a Python object calls a + C++ object, which then calls TOSSIM through the C + interface. tossim.o contains the C++ code, while + pytossim.o contains the Python support. These files + have to be compiled separately because C++ doesn't understand + nesC, and nesC doesn't understand C++.

    + +

    Building the shared object

    + + 
    +            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+
    + +

    The next to last step is to build a shared library that + contains the TOSSIM code, the C++ support, and the Python + support.

    + +

    Copying Python Support

    + + 
    +            copying Python script interface TOSSIM.py from lib/tossim to local directory
+
    + +

    Finally, there is the Python code that calls into the + shared object. This code exists in lib/tossim, and + the make process copies it into the local directory.

    + + +

    Running TOSSIM with Python

    + +

    Go into the RadioCountToLeds application and build + TOSSIM:

    + + 
    +$ cd tinyos-2.x/apps/RadioCountToLeds
+$ make micaz sim
+
    + +

    We'll start with running a simulation in Python. You can either + write a script and just tell Python to run it, or you can + use Python interactively. We'll start with the latter. Fire + up your Python interpreter:

    + + 
    +$ python
+
    + +

    You should see a prompt like this:

    + + 
    +Python 2.3.4 (#1, Nov  4 2004, 14:13:38)
+[GCC 3.4.2 20041017 (Red Hat 3.4.2-6.fc3)] on linux2
+Type "help", "copyright", "credits" or "license" for more information.
+>>>
+
    + +

    The first thing we need to do is import TOSSIM and create a + TOSSIM object. Type

    + + 
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+
    + +

    The square brackets are an optional argument that lets you + access variables in the simulation. We'll get to how to use + that later. In this case, we're telling TOSSIM that there are + no variables that we want to look at. The way you run a TOSSIM + simulation is with the runNextEvent function. For + example:

    + + 
    +>>> t.runNextEvent()
+0
+
    + +

    When you tell TOSSIM to run the next event, it returns + 0. This means that there was no next event to run. The reason + is simple: we haven't told any nodes to boot. This snippet of + code will tell mote 32 to boot at time 45654 and run its first + event (booting):

    + + 
    +>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+>>> t.runNextEVent()
+1
+
    + +

    Instead of using raw simulation ticks, you can also use the + call ticksPerSecond(). However, you want to be careful + to add some random bits into this number: having every node + perfectly synchronized and only different in phase in terms of + seconds can lead to strange results.

    + + 
    +>>> m = t.getNode(32);
+>>> m.bootAtTime(4 * t.ticksPerSecond() + 242119);
+>>> t.runNextEVent()
+1
+
    + +

    Now, runNextEvent returns 1, because there was an + event to run. But we have no way of knowing whether the node + has booted or not. We can find this out in one of two ways. + The first is that we can just ask it:

    + + 
    +>>> m.isOn()
+1
+>>> m.turnOff()
+>>> m.isOn()
+0
+>>> m.bootAtTime(560000)
+>>> t.runNextEvent()
+0
+>>> t.runNextEvent()
+1
+
    + +

    Note that the first runNextEvent returned 0. This + is because when we turned the mote off, there was still an + event in the queue, for its next timer tick. However, since + the mote was off when the event was handled in that call, + runNextEvent returned 0. The second call to + runNextEvent returned 1 for the second boot event, at + time 560000.

    + + +

    A Tossim object has several useful functions. In Python, + you can generally see the signature of an object with the + dir function. E.g.:

    + + 
    +>>> t = Tossim([])
+>>> dir(t)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__', '__getattr__',
+'__getattribute__', '__hash__', '__init__', '__module__', '__new__',
+'__reduce__', '__reduce_ex__', '__repr__', '__setattr__', '__str__',
+'__swig_getmethods__', '__swig_setmethods__', '__weakref__', 'addChannel',
+'currentNode', 'getNode', 'init', 'mac', 'newPacket', 'radio', 'removeChannel',
+'runNextEvent', 'setCurrentNode', 'setTime', 'this', 'thisown', 'time', 'timeStr']
+
    + +

    The most common utility functions are:

    + +
      +
    • currentNode(): returns the ID of the current node.
      • +
    • getNode(id): returns an object representing a specific mote
      • +
    • runNextEvent(): run a simulation event
      • +
    • time(): return the current time in simulation ticks as a large integer
      • +
    • timeStr(): return a string representation of the current time
      • +
    • init(): initialize TOSSIM
      • +
    • mac(): return the object representing the media access layer
      • +
    • radio(): return the object representing the radio model
      • +
    • addChannel(ch, output): add output as an output to channel ch
      • +
    • removeChannel(ch, output): remove output as an output to channel ch
      • +
    • ticksPerSecond(): return how many simulation ticks there are in a simulated second
      • +
    + +

    The next section discusses the last two.

    + +

    Debugging Statements

    + +

    The second approach to know whether a node is on is to tell + it to print something out when it boots. TOSSIM has a + debugging output system, called dbg. There are four + dbg calls:

    + +
      +
    • dbg: print a debugging statement preceded by the node ID.
      • +
    • dbg_clear: print a debugging statement which is not preceded by the node ID. This allows you to easily print out complex data types, such as packets, without interspersing node IDs through the output.
      • +
    • dbgerror: print an error statement preceded by the node ID
      • +
    • dbgerror_clear: print an error statement which is not preceded by the node ID
      • +
    + + +

    Go into RadioCountToLedsC and modify the Boot.booted event + to print out a debug message when it boots, such as this:

    + + 
    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot", "Application booted.\n");
+  call AMControl.start();
+}
+
    + +

    Calls to the debugging calls take two or more + parameters. The first parameter ("Boot" in the above example) + defines the output channel. An output channel is simply + a string. The second and subsequent parameters are the message + to output. They are identical to a printf statement. For example + RadioCountToLedsC has this call: + + 

    +event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) {
+  dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+  ...
+}
+
    + + which prints out the length of received packet as an 8-bit unsigned value (%hhu).

    + +

    Once you have added the debugging statement to the event, + recompile the application with make micaz sim and + start up your Python interpreter. Load the TOSSIM module and + schedule a mote to boot as before:

    + + 
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+
    + +

    This time, however, we want to see the debugging message + that the mote has booted. TOSSIM's debugging output can be + configured on a per-channel basis. So, for example, you can + tell TOSSIM to send the "Boot" channel to standard output, but + another channel, say "AM", to a file. Additionally, you can + configureBy default, a channel has no destination, and so + messages to it are discarded.

    + +

    In this case, we want to send the Boot channel to standard + output. To do this, we need to import the sys Python + package, which lets us refer to standard out. We can then tell + TOSSIM to send Boot messages to this destination: + + 

    +>>> import sys
+>>> t.addChannel("Boot", sys.stdout);
+1
+
    + + The return value shows that the channel was added successfully. Run the first + simulation event, and the mote boots: + + 
    +>>> t.runNextEvent()
+DEBUG (32): Application booted.
+1
+

    + +

    The only difference between debug and error functions is + the string output at the beginning of a message. Debug + statements print DEBUG (n), while error statements + print ERROR (n).

    + +

    A debugging statement can have multiple output + channels. Each channel name is delimited by commas: + + 

    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  call AMControl.start();
+}
+
    + + If a statement has multiple channels and those channels + share outputs, then TOSSIM only prints the message once. For + example, if both the Boot channel and RadioCountToLedsC + channel were connected to standard out, TOSSIM will only + print one message. For example, this series of debug statements + + + 
    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  dbg("RadioCountToLedsC", "Application booted again.\n");
+  dbg("Boot", "Application booted a third time.\n");
+  call AMControl.start();
+}
+
    + + when configured so + + 
    +>>> import sys
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+
    + + will print out this: + + 
    +DEBUG (32): Application booted.
+DEBUG (32): Application booted again.
+DEBUG (32): Application booted a third time.
+

    + + +

    A channel can have multiple outputs. For example, this + script will tell TOSSIM to write RadioCountToLedsC messages to + standard output, but to write Boot messages to both standard + output and a file named log.txt: + + 

    +>>> import sys
+>>> f = open("log.txt", "w")
+>>> t.addChannel("Boot", f)
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+
    +

    + +

    Configuring a Network

    + +

    When you start TOSSIM, no node can communicate with any + other. In order to be able to simulate network behavior, you + have to specify a network topology. Internally, TOSSIM + is structured so that you can easily change the underlying + radio simulation, but that's beyond the scope of this + tutorial. The default TOSSIM radio model is signal-strength + based. You provide a graph to the simulator that describes the + propagation strengths. You also specify noise floor, and + receiver sensitivity. There are some very early results that + describe current sensor platforms (e.g., the mica2) in these + terms. Because all of this is through a scripting interface, + rather than provide a specific radio model, TOSSIM tries to + provide a few low-level primitives that can express a wide + range of radios and behavior.

    + +

    You control the radio simulation through a Python Radio + object:

    + + + 
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> r = t.radio()
+>>> dir(r)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__',
+'__getattr__', '__getattribute__', '__hash__', '__init__',
+'__module__', '__new__', '__reduce__', '__reduce_ex__',
+'__repr__', '__setattr__', '__str__', '__swig_getmethods__',
+'__swig_setmethods__', '__weakref__', 'add', 'connected',
+'gain', 'remove', 'setNoise', 'this', 'thisown',
+]
+
    + +

    The first set of methods (with the double underscores) are + ones that you usually don't call. The important ones are at + the end. They are:

    + +
      +
    • add(src, dest, gain): Add a link from src + to dest with gain. When src transmits, dest + will receive a packet attenuated by the gain value.
      • + +
    • connected(src, dest): Return whether there is a + link from src to dest.
      • + + +
    • gain(src, dest): Return the gain value of the + link from src to dest.
      • + +
    • remove(src, dest): Remove the link from + src to dest.
      • + + +
    • setNoise(node, mean, variance): Set the noise + floor at node to be a gaussian distribution with + mean and variance.
      • + +
    • sensitivity(): Return the receive sensitivity of + the nodes.
      • + +
    • setSensitivity(val): Set the receive sensitivity + of nodes to be val. The sensitivity is how much + stronger a signal must be for it to be received + uncorrupted. E.g., a sensitivity of 3.0 (the default value) + means that a packet must be 3dBm greater than the sum of + noise and concurrent transmissions for it to be received + uncorrupted.
      • + +
    • threshold(): Return the CCA threshold.
      • + +
    • setThreshold(val): Set the CCA threshold value in + dBm.The default is -95.
      • + +
    + +

    The Radio object only deals with physical layer + propagation. The MAC object deals with the data link layer, + packet lengths, and radio bandwidth. The default TOSSIM MAC + object is for a CSMA protocol. You get a reference to the MAC + object by calling mac() on a Tossim object: + 

    +>>> mac = t.mac()
+
    + + The default MAC object has a large number of functions, for + controlling backoff behavior, packet preamble length, radio + bandwidth, etc. All time values are specified in terms of + radio symbols, and you can configure the number of symbols + per second and bits per symbol. By default, the MAC object + is configured to act like the standard TinyOS 2.0 CC2420 + stack: it has 4 bits per symbol and 64k symbols per second, + for 256kbps. This is a subset of the MAC functions that + could be useful for changing backoff behavior. Every + accessor function has a corresponding set function that + takes an integer as a parameter. E.g., there's int + initHigh() and void setInitHigh(int val). The + default value for each parameter is shown italicized in + parentheses.

    + +
      +
    • initHigh: The upper bound of the initial backoff range. (400)
      • +
    • initLow: The lower bound of the initial backoff range. (20)
      • +
    • high: The upper bound of the backoff range. This is multiplied by the + exponent base to the nth power, where n is the number of previous backoffs. So if the + node had its initial backoff, then the upper bound is high * base, while if it + is after the second backoff then the upper bound is high * base * base. (160)
      • +
    • low: The lower bound of the backoff range. This is multiplied by the + exponent base to the nth power, where n is the number of previous backoffs. So if the + node had its initial backoff, then the upper bound is low * base, while if it + is after the second backoff then the upper bound is low * base * base. (20)
      • +
    • symbolsPerSec: The number of symbols per second that the radio can + transmit. (65536)
      • +
    • bitsPerSymbol: The number of bits per radio symbol. Multiplying this by + the symbols per second gives the radio bandwidth. (4)
      • +
    • preambleLength: How long a packet preamble is. This is added to the duration + of transmission for every packet. (12)
      • +
    • exponentBase: The base of the exponent used to calculate backoff. Setting it to + 2 provides binary exponential backoff. (0).
      • +
    • maxIterations: The maximum number of times the radio will back off before + signaling failure, zero signifies forever. (0).
      • +
    • minFreeSamples: The number of times the radio must detect a clear channel + before it will transmit. This is important for protocols like 802.15.4, whose synchonrous + acknowledgments requires that this be greater than 1 (you could have sampled in the dead time + when the radios are changing between RX and TX mode). (2)
      • +
    • rxtxDelay: The time it takes to change the radio from RX to TX mode (or vice versa).(32)
      • +
    • ackTime: The time it takes to transmit a synchonrous acknowledgment, not including the + requisite RX/TX transition.(34)
      • +
    + +

    Any and all of these configuration constants can be changed + at compile time with #define directives. Look at + tos/lib/tossim/sim_csma.h.

    + +

    Because the radio connectivity graph can be scripted, you + can easily store topologies in files and then load the + file. Alternatively, you can store a topology as a script. + For example, this script will load a file which specifies each + link in the graph as a line with three values, the source, the + destination, and the gain, e.g.: + + 

    +1  2 -54.0
+
    + + means that when 1 transmits 2 hears it at -54 dBm. Create a file topo.txt + that looks like this:

    + + 
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+
    + +

    This script will read such a file: + + 

    +>>> f = open("topo.txt", "r")
+>>> lines = f.readlines()
+>>> for line in lines:
+...   s = line.split()
+...   if (len(s) > 0):
+...     print " ", s[0], " ", s[1], " ", s[2];
+...     r.add(int(s[0]), int(s[1]), float(s[2]))
+

    + + +

    Now, when a node transmits a packet, other nodes will hear it. + This is a complete script for simulating packet transmission with + RadioCountToLedsC. Save it as a file test.py:

    + 
    +from TOSSIM import *
+import sys
+
+t = Tossim([])
+r = t.radio()
+f = open("topo.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    print " ", s[0], " ", s[1], " ", s[2];
+    r.add(int(s[0]), int(s[1]), float(s[2]))
+
+t.addChannel("RadioCountToLedsC", sys.stdout)
+t.addChannel("Boot", sys.stdout)
+
+t.getNode(1).bootAtTime(100001);
+t.getNode(2).bootAtTime(800008);
+t.getNode(3).bootAtTime(1800009);
+
+r.setNoise(1, -100.0, 5.0)
+r.setNoise(2, -100.0, 5.0)
+r.setNoise(3, -100.0, 5.0)
+
+for i in range(0, 100):
+  t.runNextEvent()
+
    + +

    Run it by typing python test.py. You should see + output that looks like this:

    + + 
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+DEBUG (3): Received packet of length 2.
+DEBUG (2): Received packet of length 2.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+
    + +

    If you set the noise to be 30 plus or minus 5 dBm instead + of 80 plus or minus 5 dBm, then nodes will never transmit, as + the default CCA threshold is -95 dBm. You'll see something + like this:

    + 
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+
    + +

    Because the nodes backoff perpetually, they never transmit + the packet and so subsequent attempts to send fail. Although + it only takes a few simulation events to reach the first timer + firings, it takes many simulation events (approximately 4000) + to reach the second timer firings. This is because the nodes + have MAC backoff events. If you want to simulate in terms of + time, rather than events, you can always do something like + this, which simulates 5 seconds from the first node boot:

    + + 
    +t.runNextEvent();
+time = t.time()
+while (time + 50000000000 > t.time()):
+  t.runNextEvent()
+
    + +

    TOSSIM allows you to specify a network topology in terms of + gain. However, this raises the problem of coming up with a + topology. There are two approaches you can take. The first is + to take data from a real world network and input this into + TOSSIM. The second is to generate it from applying a + theoretical propagation model to a physical layout. TOSSIM has + an example of the first from the Mirage + testbed at Intel Research Berkeley. The network topology + is from data gathered from one hundred micaZ nodes over an + eight hour period in February 2006. It can be found in tos/lib/tossim/topologies/mirage-1.txt, and has the following format: + + 

    +noise n avg std
+gain src dest g
+
    + + where each statement is on a separate line. The noise + statement defines the noise observed at node n with + an average of avg and a standard deviation of + std. The gain statement defines a propagation + gain g when src transmits to dest. This + is a snippet of python code that will parse this file + format: + + 
    +f = open("mirage-1.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+

    + +

    TOSSIM has a tool for the second option of generating a + network topology using a theoretical propagation model. The + tool is written in Java and is + net.tinyos.sim.PropagationModel. The tool takes a + single command line parameter, the name of a configuration + file, e.g.:

    + + 
    +java net.tinyos.sim.PropagationModel config.txt
+
    + +

    The format of a configuration file is beyond the scope of + this document: the tool has its own documentation. TOSSIM has two sample configuration + files generated from the tool in + tos/lib/tossim/topologies. The first is grid.txt, which is a 10x10 grid of nodes + spaced roughly 40 feet apart. Each node is placed randomly + within a 40'x40' "cell." The cells follow a strict grid. The + second file is scatter.txt, which is + 100 nodes scattered randomly (with a uniform distribution) + over a 360'x360' area. Note that the tool uses random numbers, + these configuration files can generate multiple different + network topologies. Network topology files generated from the + tool follow the same format as mirage-1.txt.

    + +

    Variables

    + +

    TOSSIM allows you to inspect variables in a running TinyOS + program. Currently, you can only inspect basic types. For + example, you can't look at fields of structs, but you can look + at state variables.

    + +

    When you compile TOSSIM, the make system generates a large + XML file that contains a lot of information about the TinyOS + program, including every component variable and its type. If + you want to examine the state of your program, then you need + to give TOSSIM this information so it can parse all of the + variables properly. You do this by instantiating a Python + object that parses the XML file to extract all of the relevant + information. You have to import the Python support package for + TOSSIM to do this:

    + + 
    +from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+
    + +

    Instantiating a NescApp can take quite a while: + Python has to parse through megabytes of XML. So be patient + (you only have to do it once). NescApp has two optional + arguments. The first is the name of the application being + loaded. The second is the XML file to load. The default for + the latter is app.xml, which is the name of the file + that the make system generates. The default for the former is + "Unknown App." So this code behaves identically to that + above:

    + + 
    +from tinyos.tossim.TossimApp import *
+
+n = NescApp("Unknown App", "app.xml")
+
    + +

    You fetch a list of variables from a NescApp object by + calling the function variables on the field + variables:

    + + 
    +vars = n.variables.variables()
+
    + +

    To enable variable inspection, you pass this list to a + Tossim object when you instantiate it:

    + + 
    +t = Tossim(vars)
+
    + +

    The TOSSIM object now knows the names, sizes, and types of + all of the variables in the TinyOS application. This + information allows the TOSSIM support code to take C variables + and properly tranform them into Python variables. This + currently only works for simple types: if a component declares + a structure, you can't access its fields. But let's say we + want to read the counter in RadioCountToLedsC. Since each mote + in the network has its own instance of the variable, we need + to fetch it from a specific mote:

    + + 
    +m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+
    + +

    The name of a variable is usually C.V, where + C is the component name and V is the variable. + In the case of generic components, the name is C.N.V, + where N is an integer that describes which instance. + Unfortunately, there is currently no easy way to know what + N is from nesC source, so you have to root through + app.c in order to know.

    + +

    Once you have a variable object (v in the above + code), you can fetch its value with the getData() + function:

    + + 
    +counter = v.getData()
+
    + +

    Because getData() transforms the underlying C type + into a Python type, you can then use its return value in + Python expressions. For example, this script will start a + simulation of five nodes and run it until node 0's counter + reaches 10:

    + + 
    +from sys import *
+from random import *
+from TOSSIM import *
+from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+t = Tossim(n.variables.variables())
+r = t.radio()
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range (0, 9):
+  m = t.getNode(i)
+  m.bootAtTime(randint(1000, 2000) * 1000000)
+
+m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+
+while (v.getData() < 10):
+  t.runNextEvent()
+
+
    + +

    The TOSSIM examples + subdirectory also has an example script, named + variables.py.

    + +

    Injecting Packets

    + +

    TOSSIM allows you to dynamically inject packets into a + network. Packets can be scheduled to arrive at any time. If a + packet is scheduled to arrive in the past, then it arrives + immediately. Injected packets circumvent the radio stack: it is + possible for a node to receive an injected packet while it is in + the midst of receiving a packet from another node over its + radio.

    + +

    TinyOS 2.0 has support for building Python packet objects. + Just like the standard Java toolchain, you can build a packet + class based on a C structure. The packet class gives you a full + set of packet field mutators and accessors. If an application + has a packet format, you can generate a packet class for it, + instantiate packet objects, set their fields, and have nodes + receive them.

    + +

    The RadioCountToLeds application Makefile has an + example of how to do this. First, it adds the Python class as a + dependency for building the application. Whenever you compile + the app, if the Python class doesn't exist, make will build it + for you:

    + + 
    +BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+
    + +

    The Makefile also tells make how to generate RadioCountMsg.py:

    + + 
    +RadioCountMsg.py: RadioCountToLeds.h
+        mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h RadioCountMsg -o $@
+
    + +

    The rule says to generate RadioCountMsg.py by calling mig + with the python parameter. The Makefile also has rules on how + to build Java class, but that's not important for TOSSIM. Since + we've been using RadioCountToLeds so far, the Python class + should be there already.

    + +

    RadioCountMsg.py defines a packet format, but this packet is + contained in the data payload of another format. If a node is + sending a RadioCountMsg over AM, then the RadioCountMsg + structure is put into the AM payload, and might look something + like this:

    + +
    + + + + + + +
    AM HeaderRadioCountMsgAM Footer
    +
    + +

    If it is sending it over a routing protocol. the packet is + put in the routing payload, and might look something like this:

    + +
    + + + + + + + +
    AM HeaderRouting HeaderRadioCountMsgAM Footer
    +
    + +

    If you want to send a RadioCountMsg to a node, then you need + to decide how to deliver it. In the simple AM case, you place + the RadioCountMsg structure in a basic AM packet. In the routing + case, you put it in a routing packet, which you then put inside + an AM packet. We'll only deal with the simple AM case here.

    + +

    To get an AM packet which you can inject into TOSSIM, you + call the newPacket function on a Tossim object. The + returned object has the standard expected AM fields: + destination, length, type, and data, + as well as strength.

    + +

    To include support for a packet format, you must import + it. For example, to include RadioCountMsg, you have to import + it:

    + + 
    +from RadioCountMsg import *
+
    + +

    This snippet of code, for example, creates a RadioCountMsg, + sets its counter to 7, creates an AM packet, stores the + RadioCountMsg in the AM packet, and configures the AM packet so + it will be received properly (destination and type):

    + + 
    +from RadioCountMsg import *
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
    + + +

    The variable pkt is now an Active Message of the AM + type of RadioCountMsg with a destination of 0 that contains a + RadioCountMsg with a counter of 7. You can deliver this packet + to a node with the deliver function. The + deliver function takes two parameters, the destination + node and the time to deliver:

    + + 
    +pkt.deliver(0, t.time() + 3)
+
    + +

    This call delivers pkt to node 0 at the current simulation + time plus 3 ticks (e.g., 3ns). There is also a + deliverNow, which has no time parameter. Note that if + the destination of pkt had been set to 1, then the + TinyOS application would not receive the packet, as it was + delivered to node 0.

    + +

    Taken all together, the following script starts a simulation, + configures the topology based on topo.txt, and delivers a packet + to node 0. It can also be found as packets.py in the TOSSIM examples + subdirectory. + + + 

    +import sys
+from TOSSIM import *
+from RadioCountMsg import *
+
+t = Tossim([])
+m = t.mac();
+r = t.radio();
+
+t.addChannel("RadioCountToLedsC", sys.stdout);
+t.addChannel("LedsC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+  
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range(0, 60):
+  t.runNextEvent();
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
+print "Delivering " + msg.__str__() + " to 0 at " + str(t.time() + 3);
+pkt.deliver(0, t.time() + 3)
+
+
+for i in range(0, 20):
+  t.runNextEvent();
+
    + + +

    C++

    + +

    Python is very useful because it is succinct, easy to write, + and can be used interactively. Interpretation, however, has a + significant cost: a Python/C transition on every event is a + significant cost (around 100%, so it runs at half the + speed). Additionally, it's often useful to step through code + with a standard debugger. TOSSIM also has support for C++, so + that it can be useful in these circumstances. Because many of + the Python interfaces are merely wrappers around C++ objects, + much of the scripting stays the same. The two major exceptions + are inspecting variables and injecting packets.

    + +

    In a C++ TOSSIM, there is no variable inspection. While it is + possible to request memory regions and cast them to the expected + structures, currently there is no good and simple way to do + so. The Python support goes through several steps in order to + convert variables into Python types, and this gets in the way of + C++. However, as the purpose of C++ is usually to run high + performance simulations (in which inspecting variables is a big + cost) or debugging (when you have a debugger), this generally + isn't a big problem.

    + +

    There is a C++ Packet class, which the Python + version is a simple wrapper around. In order to inject packets + in C++, however, you must build C support for a packet type and + manually build the packet. There currently is no support in mig + with which to generate C/C++ packet structures, and since most + packets are nx_struct types, they cannot be parsed by + C/C++. Furthermore, as many of the fields are nx types, they are + big endian, while x86 processors are little endian. Still, if you + want to deliver a packet through C++, you can do so.

    + +

    Usually, the C++ and Python versions of a program look pretty + similar. For example:

    + + + + + + + + + +
    PythonC++
    + 
    +import TOSSIM
+import sys
+
+from RadioCountMsg import *
+
+t = TOSSIM.Tossim([])
+r = t.radio();
+
+for i in range(0, 999):
+  m = t.getNode(i);
+  m.bootAtTime(5000003 * i + 1);
+  r.setNoise(i, -99.0, 3.0);
+  for j in range (0, 2):
+    if (j != i):
+      r.add(i, j, -50.0);
+
+
+
+
+for i in range(0, 1000000):
+  t.runNextEvent();
+
    +     		+ 
    +#include <tossim.h>
+
+
+
+int main() {
+  Tossim* t = new Tossim(NULL);
+  Radio* r = t->radio();
+
+  for (int i = 0; i < 999; i++) {
+    Mote* m = t->getNode(i);
+    m->bootAtTime(5000003 * i + 1);
+    r->setNoise(i, -99.0, 3);
+    for (int j = 0; j < 2; j++) {
+      if (i != j) {
+        r->add(i, j, -50.0);
+      }
+    }
+  }
+
+  for (int i = 0; i < 1000000; i++) {
+    t->runNextEvent();
+  }
+}
+
    +
    + +

    To compile a C++ TOSSIM, you have to compile the top-level + driver program (e.g, the one shown above) and link it against + TOSSIM. Usually the easiest way to do this is to link it against + the TOSSIM objects rather than the shared library. Often, it's + useful to have a separate Makefile to do this with. E.g., + Makefile.Driver:

    + + 
    +all:
+        make micaz sim
+        g++ -g -c -o Driver.o Driver.c -I../../tos/lib/tossim/
+        g++ -o Driver Driver.o build/micaz/tossim.o build/micaz/sim.o
+
    + + + +

    Conclusions

    + +This lesson introduced the basics of the TOSSIM simulator. It showed +you how to configure a network, how to run a simulation, how to +inspect variables, how to inject packets, and how to compile with C++. + + +

    Next Lesson > |  Top + + + diff --git a/doc/html/tutorial/lesson1.html b/doc/html/tutorial/lesson1.html new file mode 100644 index 00000000..c1b0eb20 --- /dev/null +++ b/doc/html/tutorial/lesson1.html @@ -0,0 +1,900 @@ + + + + TinyOS Tutorial Lesson 1: TinyOS Component Model + + + + + +

    Lesson 1: Getting Started with TinyOS and nesC
    +
    Last updated June 24 2006
    + +

    Introduction

    + +

    This lesson shows you how to compile a TinyOS program and + install it on a mote, introduces the basic concepts and syntax of + the TinyOS component model, and shows you how to generate + and navigate TinyOS's source code documentation.

    + +

    Compiling and Installing

    + +

    As a first exercise, you'll compile and install a very simple + TinyOS application called Blink. If you don't have mote + hardware, you can compile it for TOSSIM, the TinyOS simulator.

    + +

    You compile TinyOS applications with the program + make. TinyOS uses a powerful and extensible make + system that allows you to easily add new platforms and + compilation options. The makefile system definitions are + located in tinyos-2.x/support/make.

    + +

    The first step is to check that your environment is set up + correctly. Run the tos-check-env command:

    + +
    +$ tos-check-env
+
    + +

    This script checks pretty much everything that the TinyOS + environment needs. Most of the warnings should be somewhat + self-explanatory, if you are at all accustomed to a UNIX + environment. If you are having trouble with warnings, your + best bet is to join and ask questions on the + tinyos-help email list. It's almost always the + case that if you've run into a problem, someone else has too. + Searching the help archives can therefore be + useful.

    + +

    If your system says some command is not available, then + chances are you need to install the TinyOS tools (tos-*). + Go to tinyos-2.x/tools/tinyos and type:

    + +
    +$ configure
+$ make 
+$ make install
+
    + +

    On Linux systems, you will either need superuser abilities or + access to sudo for the last command.

    + + +

    The second thing to check is that you have the TinyOS build system + enabled. This involves the MAKERULES environment variable. In a shell, + type

    + + 
    +  printenv MAKERULES
+
    + +

    You should see /opt/tinyos-2.x/support/make/Makerules. If + your TinyOS tree is installed somewhere besides the standard place, + you might not see /opt, but rather a different initial path. + If MAKERULES is not set (printenv prints nothing), you need to set it. + Depending on your shell, this involves using either export (bash) + or setenv (csh, tcsh). If you don't know about shell environment + variables, this + tutorial + should help.

    + +

    The make command to compile a TinyOS application is + make [platform], executed from the + application's directory. To compile Blink, go the apps/Blink + directory and depending on which hardware you have, type make micaz, + make mica2, make telosb, or, for simulation, type + make micaz sim.

    You should see output such as this: + + 
    +dark /root/src/tinyos-2.x/apps/Blink -4-> make telosb
+mkdir -p build/telosb
+    compiling BlinkAppC to a telosb binary
+ncc -o build/telosb/main.exe -Os -O -mdisable-hwmul -Wall -Wshadow
+-DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=telosb -fnesc-cfile=build/telosb/app.c
+-board=   BlinkAppC.nc -lm 
+    compiled BlinkAppC to build/telosb/main.exe
+            2782 bytes in ROM
+              61 bytes in RAM
+msp430-objcopy --output-target=ihex build/telosb/main.exe build/telosb/main.ihex
+    writing TOS image
+
    + +

    If you compile for TOSSIM, you will see a much longer message, + as building TOSSIM requires several steps, such as building shared + libraries and scripting support.

    + +

    Making sure you're invoking the right version of the nesC compiler

    + +

    If you see an error message along the lines of this:

    + +
    +BlinkAppC.nc:46: syntax error before `new'
+make: *** [exe0] Error 1
+
    + +

    Then you are invoking an older version of the nesc compiler. + Check by typing ncc --version. You should see:

    + +
    +ncc: 1.2.1
+nescc: 1.2.6
+
    + + +

    Followed by some information on what version of the C compiler + is being used. If you see different versions than those above, + your compilation problems are most probably due to the fact that + make is invoking the wrong version. This can easily happen if + you are upgrading from TinyOS 1.x. You might have passed the + tos-check-env because you have the right compiler on your system, + but for some reason make is invoking the wrong one.

    + +

    ncc is a script that invokes the full compiler, + nescc. It lives in tinyos-2.x/tools/tinyos/ncc. + If you've installed from an RPM, then the RPM put the new + version of ncc in /usr/bin. You can see which + version make is invoking by typing which ncc: + +

    +$ which ncc
+/usr/local/bin/ncc
+$ /usr/local/bin/ncc --version
+Unknown target mica
+Known targets for TinyOS directory /opt/tinyos-2.x/tos
+and the specified include directories are:
+none.
+
    + +

    In this case, the version of ncc is so old that it doesn't even + respond to the --version flag. In contrast,

    + +
    +$ /usr/bin/ncc --version
+ncc: 1.2.1
+nescc: 1.2.5
+
    + +

    The best solution to this problem is to move the old ncc to + a different name (keep in around in case you need to go back + to your old setup):

    + +
    +$ mv /usr/local/bin/ncc /usr/local/bin/ncc.old
+$ which ncc
+/usr/bin/ncc
+
    + +

    You can apply the same process for nescc:

    + +
    +$ nescc --version
+ncc: 1.1.2
+$ which nescc
+/usr/local/bin/nescc
+$ /usr/bin/nescc --version
+nescc: 1.2.5
+$ mv /usr/local/bin/nescc /usr/local/bin/nescc.old
+$ which nescc
+/usr/bin/nescc
+
    + +

    Now that we've compiled the application it's time to program the + mote and run it. The next step depends on what family of mote you + are programming.

    + + + +

    Installing on a mica-family mote (micaz, mica2, mica2dot)

    + +

    This example uses a Mica2 mote and the + serial-based programming board (mib510). Instructions on how to + use other programming boards are here. + To download your program onto the mote, place the mote board (or mote + and sensor stack) into the bay on the programming board, as shown + below. You can either supply a 3 or 5 volt supply to the connector on the + programming board or power the node directly. The green LED (labeled PWR) + on the programming board will be on when power is supplied. If you are + using batteries to power the mote, be sure the mote is switched on (the + power switch should be towards the connector). The ON/OFF switch on the + mib510 board should normally be left in the OFF position. Only switch it + to ON if you have problems programming the mote and when you are done + programming, switch it back to OFF (when the switch is ON the mote + cannot send data to the PC).

    + +

    Plug the 9-pin connector into the serial port of a computer + configured with the TinyOS tools, using a pass-through (not null-modem!) + DB9 serial cable. If your computer does not have a serial port, you can + easily obtain DB9-serial-to-USB cables.

    + +
    + + + + + + + + + + + +
    Mica2 mote next to the programming boardMica2 mote connected to the programming board
    +
    + +

    Type: +

    make mica2 reinstall mib510 MIB510=serialport
    +where serialport is the serial port device name. Under Windows, if +your serial port is COMn:, you must use +/dev/ttySn-1 as the device name. On Linux, the device name +is typically /dev/ttySn for a regular serial port and +/dev/ttyUSBn or /dev/usb/tts/n for a +USB-serial cable (the name depends on the Linux distribution). Additionally, +on Linux, you will typically need to make this serial port world writeable. +As superuser, execute the following command: +
    chmod 666 serialport
    +

    +If the installation is successful you should see something like the +following (if you don't, try repeating the make command):

    + + 
    +cp build/mica2/main.srec build/mica2/main.srec.out
+    installing mica2 binary using mib510
+uisp -dprog=mib510 -dserial=/dev/ttyUSB1 --wr_fuse_h=0xd9 -dpart=ATmega128 
+     --wr_fuse_e=ff  --erase --upload if=build/mica2/main.srec.out
+Firmware Version: 2.1
+Atmel AVR ATmega128 is found.
+Uploading: flash
+
+Fuse High Byte set to 0xd9
+
+Fuse Extended Byte set to 0xff
+rm -f build/mica2/main.exe.out build/mica2/main.srec.out
+
    + + +

    Installing on telos-family mote (telosa, telosb)

     +

    Telos motes are USB devices, and can be plugged into any USB port: +

    + + + + + + + + + + + +
    Telos moteTelos mote plugged into a USB port
    +
    + +

    Because Telos motes are USB devices, they register with + your OS when you plug them in. Typing motelist + will display which nodes are currently plugged in:

    +
    +$ motelist
+Reference  CommPort   Description
+---------- ---------- ----------------------------------------
+UCC89MXV   COM4       Telos (Rev B 2004-09-27)
+
    + +

    motelist tells you which ports have motes attached. Under +Windows, it displays the mote's COM port (in this case 4), under Linux it +displays just the USB serial port number (e.g., 2). Confusingly, the +Windows version of the code installer (tos-bsl) takes the COM port +number - 1 as it's argument (in this case 3); under Linux it takes the USB +device name (e.g., /dev/ttyUSB2 or /dev/tts/usb/2 if motelist reports that +the mote is device 2). On Linux, as with the mica programmers, you will +typically need to make the USB serial port world writeable. As superuser, +execute the following command: +

    chmod 666 usb-device-name
    + +Now you can install the application using one of:

    + +
    +  make telosb reinstall bsl,3            # Windows example
+  make telosb reinstall bsl,/dev/ttyUSB2 # Linux example
+
    + +

    This would compile an image suitable for the telosb platform and install +it with a mote ID of 2 on a mote connected to COM4 on Windows or +/dev/ttyUSB2 on Linux. If you have a single mote installed, you can skip +the bsl and device name/number arguments. Again, see the Getting Started +Guide for your chosen platform for the exact make parameters.

    + +

    You should see something like this scroll by:

    + +
    +    installing telosb binary using bsl
+tos-bsl --telosb -c 16 -r -e -I -p build/telosb/main.ihex.out
+MSP430 Bootstrap Loader Version: 1.39-telos-8
+Mass Erase...
+Transmit default password ...
+Invoking BSL...
+Transmit default password ...
+Current bootstrap loader version: 1.61 (Device ID: f16c)
+Changing baudrate to 38400 ...
+Program ...
+2782 bytes programmed.
+Reset device ...
+rm -f build/telosb/main.exe.out-2 build/telosb/main.ihex.out
+
    + + +

    Installing on a TinyNode mote

     +

    There are different ways to program a TinyNode mote depending on how +it is connected to your computer. The most common case is to connect +it to a serial port using either the standard extension board (SEB) or +the MamaBoard. (The other possible methods are to use a Mamaboard with a Digi +Connect ethernet adaptor and program a node over the network, or to +use a JTAG adaptor. These are not covered in this tutorial; please +refer to the Tinynode documentation for further details.) + +

    To install an application on a TinyNode mote using the +serial port, enter the following command, taking care to +replace /dev/ttyXXX with the file device corresponding to the +serial port that the tinynode is plugged into.

    + +
    +  make tinynode reinstall bsl,/dev/XXX
+
    + +As with the telos and eyesIFX platforms, this command will reprogram your +mote using the tos-bsl utility, and you will see similar +output on your screen as given above for telos. + +

    Installing on an eyesIFX-family mote

     + +

    The eyesIFX motes have a mini-B USB connector, allowing easy +programming and data exchange over the USB. The on-board serial-to-USB +chip exports two separate serial devices: a lower-numbered one used +exclusively for serial data communication, and a higher-numbered one +used for programming of the microcontroller.

    + +
    + + + + + + + + + + + +
    eyesIFXv2 moteeyesIFXv2 mote attached to a USB cable
    +
    + + + +

    The actual programming is performed by the msp430-bsl script, +conveniently invoked using the same make rules as for the telos +motes. In the most basic form:

    + +
    +  make eyesIFX install bsl
+
    + +

    the install script defaults to programming using the /dev/ttyUSB1 +device on Linux and COM1 on Windows, giving output similar to this:

    + +
    +    installing eyesIFXv2 binary using bsl
+msp430-bsl --invert-test --invert-reset --f1x -c /dev/ttyUSB1 -r -e -I -p build/eyesIFXv2/main.ihex.out
+MSP430 Bootstrap Loader Version: 2.0
+Mass Erase...
+Transmit default password ...
+Invoking BSL...
+Transmit default password ...
+Current bootstrap loader version: 1.61 (Device ID: f16c)
+Program ...
+2720 bytes programmed.
+Reset device ...
+rm -f build/eyesIFXv2/main.exe.out build/eyesIFXv2/main.ihex.out
+
    + +

    The programming device can also be explicitly set as a parameter +of the bsl command using shorthand or full notation:

    + +
    +  make eyesIFX install bsl,USB3
+  make eyesIFX install bsl,/dev/ttyUSB3
+
    + +

    The eyesIFX motes can be programmed over the provided JTAG interface +with the help of the msp430-jtag script:

    + +
    +  make eyesIFX install jtag
+
    + +

    producing output as in the following:

    + +
    +    installing eyesIFXv2 binary using the parallel port jtag adapter
+msp430-jtag  -Iepr build/eyesIFXv2/main.ihex.out
+MSP430 parallel JTAG programmer Version: 2.0
+Mass Erase...
+Program...
+2720 bytes programmed.
+Reset device...
+Reset and release device...
+
    + + +

    Installing on an IntelMote2

     + + +

    Installation options

    + +

    You can now test the program by unplugging the mote from the +programming board and turning on the power switch (if it's not already +on). With any luck the three LEDs should be displaying a counter +incrementing at 4Hz.

    + +

    The reinstall command told the make system to +install the currently compiled binary: it skips the +compilation process. Type make clean to clean up all +of the compiled binary files, then type, e.g., make telosb install +This will recompile Blink and install it on one action.

    + +

    Networking almost always requires motes to have unique identifiers. +When you compile a TinyOS application, it has a default unique +identifier of 1. To give a node a different identifier, you can specify +it at installation. For example, if you type make telosb install.5 +or make telosb reinstall.5, you will install the application +on a node and give it 5 as its identifier.

    + +

    Components and Interfaces

    + +

    Now that you've installed Blink, let's look at how + it works. Blink, like all TinyOS code, is written + in nesC, which is C with some additional language + features for components and concurrency.

    + +

    A nesC application consists of one or more components + assembled, or wired, to form an application executable. + Components define two scopes: one for their specification which + contains the names of their interfaces, and a second scope for their + implementation. A component provides and uses + interfaces. The provided interfaces are intended to represent + the functionality that the component provides to its user in its + specification; the used interfaces represent the functionality the + component needs to perform its job in its implementation.

    + +

    Interfaces are bidirectional: they specify a set of + commands, which are functions to be implemented by the + interface's provider, and a set of events, which are functions + to be implemented by the interface's user. For a component to call the + commands in an interface, it must implement the events of that + interface. A single component may use or provide multiple interfaces + and multiple instances of the same interface.

    + +

    The set of interfaces which a component provides together with the + set of interfaces that a component uses is considered that component's + signature.

    + +

    Configurations and Modules

    + +

    There are two types of components in nesC: modules and + configurations. Modules provide the implementations of one or more + interfaces. Configurations are used to assemble other components + together, connecting interfaces used by components to interfaces + provided by others. Every nesC + application is described by a top-level configuration that wires + together the components inside.

    + +

    Blink: An Example Application

    + +

    Let's look at a concrete example: + Blink in the TinyOS + tree. As you saw, this application displays a counter on the + three mote LEDs. In actuality, it simply causes the LED0 to to turn on and off at + .25Hz, LED1 to turn on and off at .5Hz, and LED2 to turn on and off at + 1Hz. The effect is as if the three + LEDs were displaying a binary count of one to seven every two + seconds.

    + +

    Blink is composed of two components: a module, called +"BlinkC.nc", and a configuration, called +"BlinkAppC.nc". Remember that all applications require a +top-level configuration file, which is typically named after the +application itself. In this case BlinkAppC.nc is the +configuration for the Blink application and the source file that the +nesC compiler uses to generate an executable file. BlinkC.nc, +on the other hand, actually provides the implementation of the +Blink application. As you might guess, BlinkAppC.nc is used +to wire the BlinkC.nc module to other components that the +Blink application requires.

    + +

    The reason for the distinction between modules and configurations +is to allow a system designer to build applications out of existing +implementations. For example, a designer could provide a configuration +that simply wires together one or more modules, none of which she +actually designed. Likewise, another developer can provide a new set +of library modules that can be used in a range of applications.

    + +

    Sometimes (as is the case with BlinkAppC and +BlinkC) you will have a configuration and a module that go +together. When this is the case, the convention used in the TinyOS +source tree is:

    + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    File Name File Type
    Foo.ncInterface
    Foo.hHeader File
    FooC.nc Public Module
    FooP.ncPrivate Module
    +
    + +

    While you could +name an application's implementation module and associated top-level +configuration anything, to keep things simple we suggest that you +adopt this convention in your own code. There are several other +conventions used in TinyOS; +TEP 3 +specifies the coding standards and best current practices. + +

    The BlinkAppC.nc Configuration

    + +

    The nesC compiler compiles a nesC application when given the file +containing the top-level configuration. Typical TinyOS applications +come with a standard Makefile that allows platform selection and +invokes ncc with appropriate options on the application's top-level +configuration. + +

    Let's look at BlinkAppC.nc, the configuration for this +application first: + +

    
+apps/Blink/BlinkAppC.nc:
+
    +configuration BlinkAppC {
+}
+implementation {  
+  components MainC, BlinkC, LedsC;
+  components new TimerMilliC() as Timer0;
+  components new TimerMilliC() as Timer1;
+  components new TimerMilliC() as Timer2;
+
+  BlinkC -> MainC.Boot;
+  MainC.SoftwareInit -> LedsC;
+  BlinkC.Timer0 -> Timer0;
+  BlinkC.Timer1 -> Timer1;
+  BlinkC.Timer2 -> Timer2;
+  BlinkC.Leds -> LedsC;
+}
+
    
+
+
    The first thing to notice is the key word configuration,
+which indicates that this is a configuration file. The first two
+lines,
+
+
    
+apps/Blink/BlinkAppC.nc:
+
    +configuration BlinkAppC {
+}
+
    
+
+simply state that this is a configuration called BlinkAppC.
+Within the empty braces here it is possible to specify uses
+and provides clauses, as with a module. This is important to
+keep in mind: a configuration can use and provide interfaces. Said
+another way, not all configurations are top-level applications.
+
+
    The actual configuration is implemented within the pair of curly
+brackets following the key word implementation . The
+components lines specify the set of components that this
+configuration references. In this case those components are
+Main, BlinkC,
+LedsC, and three instances of a timer component called
+TimerMilliC which will be referenced as Timer0, Timer1,
+and Timer2(1). This is accomplished
+via the as keyword which is simply an alias(2). 
+
+
    As we continue reviewing the BlinkAppC application, keep in mind that the
+BlinkAppC component is not the same as the BlinkC component. Rather,
+the BlinkAppC component is composed of the BlinkC component along with
+MainC, LedsC and the three timers.
+
+
    The remainder of the BlinkAppC configuration consists of connecting
+interfaces used by components to interfaces provided by others. The
+MainC.Boot and MainC.SoftwareInit interfaces are
+part of TinyOS's boot sequence and will be covered in detail in Lesson
+3. Suffice it to say that these wirings enable the LEDs and Timers to
+be initialized.
+
+
    The last four lines wire interfaces that the BlinkC component
+uses to interfaces that the TimerMilliC and LedsC
+components provide. To fully understand the semantics of these
+wirings, it is helpful to look at the BlinkC module's definition and
+implementation.
+
+
    The BlinkC.nc Module
    
+
+
    
+apps/Blink/BlinkC.nc:
+
    +module BlinkC {
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Timer<TMilli> as Timer1;
+  uses interface Timer<TMilli> as Timer2;
+  uses interface Leds;
+  users interface Boot;
+}
+implementation
+{
+  // implementation code omitted
+}
+
    
+
+
    The first part of the module code states that this is a module
+called BlinkCand declares the interfaces it provides and
+uses.  The BlinkC  module uses three
+instances of the interface Timer<TMilli> using the
+names Timer0, Timer1 and Timer2 (the <TMilli> syntax
+simply supplies the generic Timer interface with the required timer
+precision). Lastly, the BlinkC
+module also uses the Leds and Boot interfaces. This means that BlinkC
+may call any command declared in the interfaces it uses and must also
+implement any events declared in those interfaces.
+
+
    After reviewing the interfaces used by the BlinkC
+component, the semantics of the last four lines in
+BlinkAppC.nc should become clearer.  The line
+BlinkC.Timer0 -> Timer0 wires the three
+Timer<TMilli> interface used by BlinkC to the
+Timer<TMilli> interface provided the three
+TimerMilliC component. The BlinkC.Leds ->
+LedsC line wires the Leds interface used by the
+BlinkC component to the Leds interface provided by
+the LedsC component.
+
+
    nesC uses arrows to bind interfaces to one another.  The right arrow
+(A->B) as "A wires to B". The left side of the arrow (A)
+is a user of the interface, while the right side of the arrow (B) is
+the provider. A full wiring is A.a->B.b, which means
+"interface a of component A wires to interface b of component B."
+Naming the interface is important when a component uses or provides multiple
+instances of the same interface. For example, BlinkC uses three instances of
+Timer: Timer0, Timer1 and Timer2.
+
+When a component only has one instance
+of an interface, you can elide the interface name. For example, returning
+to BlinkAppC:
+
+
    
+apps/Blink/BlinkAppC.nc:
+
    +configuration BlinkAppC {
+}
+implementation {  
+  components MainC, BlinkC, LedsC;
+  components new TimerMilliC() as Timer0;
+  components new TimerMilliC() as Timer1;
+  components new TimerMilliC() as Timer2;
+
+  BlinkC -> MainC.Boot;
+  MainC.SoftwareInit -> LedsC;
+  BlinkC.Timer0 -> Timer0;
+  BlinkC.Timer1 -> Timer1;
+  BlinkC.Timer2 -> Timer2;
+  BlinkC.Leds -> LedsC;
+}
+
    
+
+
    The interface name Leds does not have to be included in LedsC:
    
+
+
    +  BlinkC.Leds -> LedsC; // Same as BlinkC.Leds -> LedsC.Leds
+
    
+
+
    Because BlinkC only uses one instance of the Leds interface, this
+line would also work:
    
+
+
    +  BlinkC -> LedsC.Leds; // Same as BlinkC.Leds -> LedsC.Leds
+
    
+
+
    As the TimerMilliC components each provide a single instance of Timer,
+it does not have to be included in the wirings:
    
+
+
    +  BlinkC.Timer0 -> Timer0;
+  BlinkC.Timer1 -> Timer1;
+  BlinkC.Timer2 -> Timer2;
+
    
+
+
    However, as BlinkC has three instances of Timer, eliding the name
+on the user side would be a compile-time error, as the compiler would
+not know which instance of Timer was being wired:
    
+
+
    +  BlinkC -> Timer0.Timer;  // Compile error!
+
    The direction of a wiring arrow is always from a user to a
+provider. If the provider is on the left side, you can also
+use a left arrow:
    
+
+
    +  Timer0 <- BlinkC.Timer0; // Same as BlinkC.Timer0 -> Timer0;
+
    
+
+
    For ease of reading, however, most wirings are left-to-right.
    
+
+
    Visualizing a Component Graph
    
+
+
    Carefully engineered TinyOS systems often have many layers of configurations,
+each of which refines the abstraction in simple way, building something robust
+with very little executable code. Getting to the modules underneath
+-- or just navigating the layers -- with a text editor can be laborious.
+To aid in this process, TinyOS and nesC have a documentation feature called
+nesdoc, which generates documentation automatically from source code. In
+addition to comments, nesdoc displays the structure and composition of
+configurations.
    
+
+
    To generate documentation for an application, type
    
+
+
    +  make platform docs
+
    
+
+
    You should see a long list of interfaces and components stream by. If you
+see the error message
    
+
+
    sh: dot: command not found
    
+
+
    then you need to install
+graphviz, which is the program that draws the component graphs.
    
+
+
    Once you've generated the documentation, go to tinyos-2.x/doc/nesdoc. You
+should see a directory for your platform: open its index.html, and
+you'll see a list of the components and interfaces for which you've
+generated documentation. For example, if you generated documentation
+for Blink on the telosb platform, you'll see documentation for interfaces
+such as Boot, Leds, and Timer, as well as some from the underlying hardware
+implementations, such as Msp430TimerEvent and HplMsp430GeneralIO.
    
+
+
    In the navigation panel on the left, components are below interfaces.
+Click on BlinkAppC, and you should a figure like this: 
    
+
+
    
+  
+
    
+
+
    In nesdoc diagrams, a single box is a module and a double box is a
+configuration. Dashed border lines denote that a component is a generic:
    
+
    
+
+  
+    
+    
+    
+  
+  
+    
+    
+    
+  
+  
+    
+    
+    
+  
+
    SingletonGeneric
    Module
    Configuration
    
+
    
+
    Lines denote wirings, and shaded ovals denote interfaces
+that a component provides or uses. You can click on the components
+in the graph to examine their internals. Click on MainC, which shows
+the wirings for the boot sequence:
    
+
+
    
+  
+
    
+
+
    Shaded ovals denote wireable interfaces.
+Because MainC provides the Boot interface and uses the Init (as
+SoftwareInit) interface, it has two shaded ovals. Note the direction
+of the arrows: because it uses SoftwareInit, the wire goes out from
+RealMainP to SoftwareInit, while because it provides Boot, the wire
+goes from Boot into RealMainP. The details of MainC aren't too important
+here, and we'll be looking at it in greater depth in
+lesson 3
+(you can also read TEP 107 for details),
+but looking at the components you can get a sense of what it does: it
+controls the scheduler, initializes the hardware platform, and
+initializes software components.
    
+
+
    Conclusion
    
+
+
    This lesson has introduced the concepts of the TinyOS component
+model: configurations, modules, interfaces and wiring.  It showed
+how applications are built by wiring components together. The next
+lesson continues with Blink, looking more closely at modules,
+including the TinyOS concurrency model and executable code.
+
+
    
+
+
    Related Documentation
    
+
+
+
+
    
+
    
+
+
    (1) The TimerMilliC component is a
+generic component which means that, unlike non-generic components,
+it can be instantiated more than once.  Generic components can take types
+and constants as arguments, though in this case TimerMilliC takes
+none. There are also generic interafces, which take type arguments
+only. The Timer interface provided by TimerMilliC is a generic interface;
+its type argument defines the timer's required precision (this prevents
+programmer from wiring, e.g., microsecond timer users to millisecond timer
+providers).  A full explanation of generic components is outside this
+document's scope, but you can read about them in the
+nesc generic component documentation.
+
+
    (2)
+Programming Hint 10: Use the as keyword liberally. From  
+TinyOS Programming
+
+
+
+
    
+
    
+
    
+
    < Top 
+ |  Next Lesson  >
+
    
+
+
+
diff --git a/doc/html/tutorial/lesson11.html b/doc/html/tutorial/lesson11.html
new file mode 100644
index 00000000..48ac8a93
--- /dev/null
+++ b/doc/html/tutorial/lesson11.html
@@ -0,0 +1,1364 @@
+
+
+
+  Lesson 11: Simulation with TOSSIM
+  
+
+
+
+
+
+
    Lesson 11: Simulation with TOSSIM
    
+
    Last Modified: 18 May 2006
    
+
+      
    This lesson introduces the TOSSIM simulator. You will become
+        familiar with how to compile TOSSIM and use some of its
+        functionality. You will learn how to:
    
+
+      
    
+        
+        
      
+          
+          
    • Compile TOSSIM.
      • 
+          
+          
    • Configure a simulation in Python and C++.
      • 
+            
+          
    • Inspect variables.
      • 
+              
+          
    • Inject packets.
      • 
+        
    
+      
    
+
+
+
    Introduction
    
+
+        TOSSIM simulates entire TinyOS applications. It works by
+        replacing components with simulation implementations. The
+        level at which components are replaced is very flexible: for
+        example, there is a simulation implementation of millisecond
+        timers that replaces HilTimerMilliC, while there is also an
+        implementation for atmega128 platforms that replaces the HPL
+        components of the hardware clocks. The former is general and
+        can be used for any platform, but lacks the fidelity of
+        capturing an actual chips behavior, as the latter
+        does. Similarly, TOSSIM can replace a packet-level
+        communication component for packet-level simulation, or
+        replace a low-level radio chip component for a more precise
+        simulation of the code execution.
+
+        TOSSIM is a discrete event simulator. When it runs, it pulls
+        events of the event queue (sorted by time) and executes them.
+        Depending on the level of simulation, simulation events can
+        represent hardware interrupts or high-level system events
+        (such as packet reception). Additionally, tasks are simulation
+        events, so that posting a task causes it to run a short time
+        (e.g., a few microseconds) in the future.
+
+        TOSSIM is a library: you must write a program that configures
+        a simulation and runs it. TOSSIM supports two programming
+        interfaces, Python and C++. Python allows you to interact with
+        a running simulation dynamically, like a powerful
+        debugger. However, as the interpretation can be a performance
+        bottleneck when obtaining results, TOSSIM also has a C++
+        interface. Usually, transforming code from one to the other is
+        very simple.
+
+        TOSSIM currently does not support gathering power
+        measurements.
+
+        
    Compiling TOSSIM
    
+
+        
    TOSSIM is a TinyOS library. Its core code lives in tos/lib/tossim. Every TinyOS
+        source directory has an optional sim subdirectory,
+        which contains simulation implementations of that package. For
+        example, tos/chips/atm128/timer/sim
+        contains TOSSIM implementations of some of the Atmega128 timer
+        abstractions.
    
+
+        
    To compile TOSSIM, you pass the sim option to make:
    
+
+        
    +          $ cd apps/Blink
+          $ make micaz sim
+        
    
+
+        
+        
+        
    Currently, the only platform TOSSIM supports is the
+        micaz. You should see output similar to this:
    
+        
    +          mkdir -p build/micaz
+            placing object files in build/micaz
+            writing XML schema to app.xml
+            compiling BlinkAppC to object file sim.o 
+          ncc -c -fPIC -o build/micaz/sim.o -g -O0 -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)   -finline-limit=100000 -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=micaz -fnesc-cfile=build/micaz/app.c -board=micasb  -Wno-nesc-data-race BlinkAppC.nc   -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags -fnesc-dumpfile=app.xml
+            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+          copying Python script interface TOSSIM.py from lib/tossim to local directory
+         
    
+
+        
    Compiling TOSSIM has five basic steps. Let's go through
+        them one by one.
    
+
+        
    Writing an XML schema
    
+
+        
    +          writing XML schema to app.xml
+        
    
+
+        
    The first thing the TOSSIM build process does is use
+        nesc-dump to produce an XML document that describes the
+        application. Among other things, this document descibes the
+        name and type of every variable.
    
+
+        
    Compiling the TinyOS Application
    
+
+        
    Besides introducing all of these new compilation steps, the
+        sim option changes the include paths of the
+        application. If the application has a series of includes
    
+
+        
    +          -Ia -Ib -Ic
+        
    
+
+        
    Then the sim option transforms the list to
    
+
+        
    +          -Ia/sim -Ib/sim -Ic/sim -I%T/lib/tossim -Ia -Ib -Ic
+        
    
+          
+        
    This means that any system-specific simulation
+        implementations will be used first, followed by generic TOSSIM
+        implementations, followed by standard implementations. The
+        sim option also passes a bunch of arguments to the
+        compiler, so it knows to compile for simulation.
    
+
+        
    The product of this step is an object file, sim.o,
+        which lives in the platform's build directory. This object
+        file has a set of C functions which configure the simulation
+        and control execution.
    
+
+        
    Compiling the Programming Interface
    
+
+        
    +            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim \
+          -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+        
    
+        
+        
    The next step compiles the support for the C++ and Python
+        programming interfaces. The Python interface is actually built
+        on top of the C++ interface. Calling a Python object calls a
+        C++ object, which then calls TOSSIM through the C
+        interface. tossim.o contains the C++ code, while
+        pytossim.o contains the Python support. These files
+        have to be compiled separately because C++ doesn't understand
+        nesC, and nesC doesn't understand C++.
    
+
+        
    Building the shared object
    
+        
+        
    +            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+        
    
+
+        
    The next to last step is to build a shared library that
+        contains the TOSSIM code, the C++ support, and the Python
+        support.
    
+
+        
    Copying Python Support
    
+        
+        
    +            copying Python script interface TOSSIM.py from lib/tossim to local directory
+        
    
+
+        
    Finally, there is the Python code that calls into the
+        shared object. This code exists in lib/tossim, and
+        the make process copies it into the local directory.
    
+
+        
+        
    Running TOSSIM with Python
    
+        
+        
    Go into the RadioCountToLeds application and build
+          TOSSIM:
    
+
+        
    +$ cd tinyos-2.x/apps/RadioCountToLeds
+$ make micaz sim
+        
    
+
+        
    We'll start with running a simulation in Python. You can either
+          write a script and just tell Python to run it, or you can
+          use Python interactively. We'll start with the latter. Fire
+          up your Python interpreter:
    
+
+        
    +$ python
+        
    
+
+        
    You should see a prompt like this:
    
+
+        
    +Python 2.3.4 (#1, Nov  4 2004, 14:13:38)
+[GCC 3.4.2 20041017 (Red Hat 3.4.2-6.fc3)] on linux2
+Type "help", "copyright", "credits" or "license" for more information.
+>>>
+        
    
+
+        
    The first thing we need to do is import TOSSIM and create a
+        TOSSIM object. Type
    
+
+        
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+        
    
+        
+        
    The square brackets are an optional argument that lets you
+        access variables in the simulation. We'll get to how to use
+        that later. In this case, we're telling TOSSIM that there are
+        no variables that we want to look at. The way you run a TOSSIM
+        simulation is with the runNextEvent function. For
+        example:
    
+
+        
    +>>> t.runNextEvent()
+0
+        
    
+
+        
    When you tell TOSSIM to run the next event, it returns
+        0. This means that there was no next event to run. The reason
+        is simple: we haven't told any nodes to boot. This snippet of
+        code will tell mote 32 to boot at time 45654 and run its first
+        event (booting):
    
+
+        
    +>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+>>> t.runNextEVent()
+1
+        
    
+
+      
    Instead of using raw simulation ticks, you can also use the
+      call ticksPerSecond(). However, you want to be careful
+      to add some random bits into this number: having every node
+      perfectly synchronized and only different in phase in terms of
+          seconds can lead to strange results.
    
+
+      
    +>>> m = t.getNode(32);
+>>> m.bootAtTime(4 * t.ticksPerSecond() + 242119);
+>>> t.runNextEVent()
+1
+      
    
+
+        
    Now, runNextEvent returns 1, because there was an
+        event to run. But we have no way of knowing whether the node
+        has booted or not. We can find this out in one of two ways.
+        The first is that we can just ask it:
    
+
+        
    +>>> m.isOn()
+1
+>>> m.turnOff()
+>>> m.isOn()
+0
+>>> m.bootAtTime(560000)
+>>> t.runNextEvent()
+0
+>>> t.runNextEvent()
+1
+        
            
+
+        
    Note that the first runNextEvent returned 0. This
+        is because when we turned the mote off, there was still an
+        event in the queue, for its next timer tick. However, since
+        the mote was off when the event was handled in that call,
+        runNextEvent returned 0. The second call to
+        runNextEvent returned 1 for the second boot event, at
+        time 560000.
    
+
+
+        
    A Tossim object has several useful functions. In Python,
+        you can generally see the signature of an object with the
+        dir function. E.g.:
    
+
+        
    +>>> t = Tossim([])
+>>> dir(t)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__', '__getattr__',
+'__getattribute__', '__hash__', '__init__', '__module__', '__new__',
+'__reduce__', '__reduce_ex__', '__repr__', '__setattr__', '__str__',
+'__swig_getmethods__', '__swig_setmethods__', '__weakref__', 'addChannel',
+'currentNode', 'getNode', 'init', 'mac', 'newPacket', 'radio', 'removeChannel',
+'runNextEvent', 'setCurrentNode', 'setTime', 'this', 'thisown', 'time', 'timeStr']
+        
    
+
+        
    The most common utility functions are:
    
+
+        
      
+          
    • currentNode(): returns the ID of the current node.
      • 
+          
    • getNode(id): returns an object representing a specific mote
      • 
+          
    • runNextEvent(): run a simulation event
      • 
+          
    • time(): return the current time in simulation ticks as a large integer 
      • 
+          
    • timeStr(): return a string representation of the current time
      • 
+          
    • init(): initialize TOSSIM
      • 
+          
    • mac(): return the object representing the media access layer
      • 
+          
    • radio(): return the object representing the radio model
      • 
+          
    • addChannel(ch, output): add output as an output to channel ch 
      • 
+          
    • removeChannel(ch, output): remove output as an output to channel ch 
      • 
+          
    • ticksPerSecond(): return how many simulation ticks there are in a simulated second 
      • 
+        
    
+
+        
    The next section discusses the last two.
    
+
+          
    Debugging Statements
    
+        
+        
    The second approach to know whether a node is on is to tell
+        it to print something out when it boots. TOSSIM has a
+        debugging output system, called dbg. There are four
+        dbg calls:
    
+
+          
      
+            
    • dbg: print a debugging statement preceded by the node ID.
      • 
+            
    • dbg_clear: print a debugging statement which is not preceded by the node ID. This allows you to easily print out complex data types, such as packets, without interspersing node IDs through the output.
      • 
+            
    • dbgerror: print an error statement preceded by the node ID
      • 
+            
    • dbgerror_clear: print an error statement which is not preceded by the node ID
      • 
+          
    
+
+          
+        
    Go into RadioCountToLedsC and modify the Boot.booted event
+          to print out a debug message when it boots, such as this:
    
+
+        
    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot", "Application booted.\n");
+  call AMControl.start();
+}
+        
    
+
+        
    Calls to the debugging calls take two or more
+        parameters. The first parameter ("Boot" in the above example)
+        defines the output channel. An output channel is simply
+        a string. The second and subsequent parameters are the message
+        to output. They are identical to a printf statement. For example
+          RadioCountToLedsC has this call:
+
+        
    +event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) {
+  dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+  ...
+}
+        
    
+
+        which prints out the length of received packet as an 8-bit unsigned value (%hhu).
    
+
+        
    Once you have added the debugging statement to the event,
+        recompile the application with make micaz sim and
+        start up your Python interpreter. Load the TOSSIM module and
+        schedule a mote to boot as before:
    
+        
+        
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+        
    
+
+        
    This time, however, we want to see the debugging message
+        that the mote has booted. TOSSIM's debugging output can be
+        configured on a per-channel basis. So, for example, you can
+        tell TOSSIM to send the "Boot" channel to standard output, but
+        another channel, say "AM", to a file. Additionally, you can
+        configureBy default, a channel has no destination, and so
+        messages to it are discarded.
    
+
+        
    In this case, we want to send the Boot channel to standard
+        output. To do this, we need to import the sys Python
+        package, which lets us refer to standard out. We can then tell
+        TOSSIM to send Boot messages to this destination:
+          
+        
    +>>> import sys
+>>> t.addChannel("Boot", sys.stdout);
+1
+        
    
+
+          The return value shows that the channel was added successfully. Run the first
+          simulation event, and the mote boots:
+
+        
    +>>> t.runNextEvent()
+DEBUG (32): Application booted.
+1
+        
              
    
+
+        
    The only difference between debug and error functions is
+        the string output at the beginning of a message. Debug
+        statements print DEBUG (n), while error statements
+        print ERROR (n).
    
+
+        
    A debugging statement can have multiple output
+          channels. Each channel name is delimited by commas:
+
+          
    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  call AMControl.start();
+}
+          
    
+
+          If a statement has multiple channels and those channels
+          share outputs, then TOSSIM only prints the message once. For
+          example, if both the Boot channel and RadioCountToLedsC
+          channel were connected to standard out, TOSSIM will only
+          print one message. For example, this series of debug statements
+
+          
+          
    +event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  dbg("RadioCountToLedsC", "Application booted again.\n");
+  dbg("Boot", "Application booted a third time.\n");
+  call AMControl.start();
+}
+          
    
+
+          when configured so
+
+          
    +>>> import sys
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+          
    
+
+          will print out this:
+
+          
    +DEBUG (32): Application booted.
+DEBUG (32): Application booted again.
+DEBUG (32): Application booted a third time.
+          
    
+
+
+        
    A channel can have multiple outputs. For example, this
+        script will tell TOSSIM to write RadioCountToLedsC messages to
+        standard output, but to write Boot messages to both standard
+        output and a file named log.txt:
+
+          
    +>>> import sys
+>>> f = open("log.txt", "w")
+>>> t.addChannel("Boot", f)
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+          
    
+        
    
+
+        
    Configuring a Network
    
+
+        
    When you start TOSSIM, no node can communicate with any
+        other.  In order to be able to simulate network behavior, you
+        have to specify a network topology. Internally, TOSSIM
+        is structured so that you can easily change the underlying
+        radio simulation, but that's beyond the scope of this
+        tutorial. The default TOSSIM radio model is signal-strength
+        based. You provide a graph to the simulator that describes the
+        propagation strengths. You also specify noise floor, and
+        receiver sensitivity. There are some very early results that
+        describe current sensor platforms (e.g., the mica2) in these
+        terms. Because all of this is through a scripting interface,
+        rather than provide a specific radio model, TOSSIM tries to
+        provide a few low-level primitives that can express a wide
+        range of radios and behavior.
    
+
+        
    You control the radio simulation through a Python Radio
+        object:
    
+
+        
+        
    +>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> r = t.radio()
+>>> dir(r)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__',
+'__getattr__', '__getattribute__', '__hash__', '__init__',
+'__module__', '__new__', '__reduce__', '__reduce_ex__',
+'__repr__', '__setattr__', '__str__', '__swig_getmethods__',
+'__swig_setmethods__', '__weakref__', 'add', 'connected',
+'gain', 'remove', 'setNoise', 'this', 'thisown',
+]
+        
              
+
+        
    The first set of methods (with the double underscores) are
+        ones that you usually don't call. The important ones are at
+        the end. They are:
    
+
+        
      
+          
    • add(src, dest, gain): Add a link from src
+          to dest with gain. When src transmits, dest
+          will receive a packet attenuated by the gain value.
      • 
+
+          
    • connected(src, dest): Return whether there is a
+          link from src to dest.
      • 
+
+
+          
    • gain(src, dest): Return the gain value of the
+          link from src to dest.
      • 
+          
+          
    • remove(src, dest): Remove the link from
+          src to dest.
      • 
+
+
+          
    • setNoise(node, mean, variance): Set the noise
+          floor at node to be a gaussian distribution with
+          mean and variance.
      • 
+
+          
    • sensitivity(): Return the receive sensitivity of
+            the nodes.
      • 
+
+          
    • setSensitivity(val): Set the receive sensitivity
+          of nodes to be val. The sensitivity is how much
+          stronger a signal must be for it to be received
+          uncorrupted. E.g., a sensitivity of 3.0 (the default value)
+          means that a packet must be 3dBm greater than the sum of
+          noise and concurrent transmissions for it to be received
+          uncorrupted.
      • 
+
+          
    • threshold(): Return the CCA threshold.
      • 
+
+          
    • setThreshold(val): Set the CCA threshold value in
+            dBm.The default is -95.
      • 
+          
+        
    
+
+        
    The Radio object only deals with physical layer
+        propagation. The MAC object deals with the data link layer,
+        packet lengths, and radio bandwidth. The default TOSSIM MAC
+        object is for a CSMA protocol. You get a reference to the MAC
+        object by calling mac() on a Tossim object:
+          
    +>>> mac = t.mac()
+          
    
+
+          The default MAC object has a large number of functions, for
+          controlling backoff behavior, packet preamble length, radio
+          bandwidth, etc. All time values are specified in terms of
+          radio symbols, and you can configure the number of symbols
+          per second and bits per symbol. By default, the MAC object
+          is configured to act like the standard TinyOS 2.0 CC2420
+          stack: it has 4 bits per symbol and 64k symbols per second,
+          for 256kbps. This is a subset of the MAC functions that
+          could be useful for changing backoff behavior. Every
+          accessor function has a corresponding set function that
+          takes an integer as a parameter. E.g., there's int
+          initHigh() and void setInitHigh(int val). The
+          default value for each parameter is shown italicized in
+          parentheses.  
    
+
+        
      
+          
    • initHigh: The upper bound of the initial backoff range. (400)
      • 
+          
    • initLow: The lower bound of the initial backoff range. (20)
      • 
+          
    • high: The upper bound of the backoff range. This is multiplied by the
+          exponent base to the nth power, where n is the number of previous backoffs. So if the
+          node had its initial backoff, then the upper bound is high * base, while if it
+          is after the second backoff then the upper bound is high * base * base. (160)
      • 
+          
    • low: The lower bound of the backoff range. This is multiplied by the
+          exponent base to the nth power, where n is the number of previous backoffs. So if the
+          node had its initial backoff, then the upper bound is low * base, while if it
+          is after the second backoff then the upper bound is low * base * base. (20)
      • 
+          
    • symbolsPerSec: The number of symbols per second that the radio can
+          transmit. (65536)
      • 
+          
    • bitsPerSymbol: The number of bits per radio symbol. Multiplying this by
+          the symbols per second gives the radio bandwidth. (4)
      • 
+          
    • preambleLength: How long a packet preamble is. This is added to the duration
+          of transmission for every packet. (12)
      • 
+          
    • exponentBase: The base of the exponent used to calculate backoff. Setting it to
+          2 provides binary exponential backoff. (0).
      • 
+          
    • maxIterations: The maximum number of times the radio will back off before
+          signaling failure, zero signifies forever. (0).
      • 
+          
    • minFreeSamples: The number of times the radio must detect a clear channel
+          before it will transmit. This is important for protocols like 802.15.4, whose synchonrous
+          acknowledgments requires that this be greater than 1 (you could have sampled in the dead time
+          when the radios are changing between RX and TX mode). (2)
      • 
+          
    • rxtxDelay: The time it takes to change the radio from RX to TX mode (or vice versa).(32)
      • 
+          
    • ackTime: The time it takes to transmit a synchonrous acknowledgment, not including the
+          requisite RX/TX transition.(34)
      • 
+        
    
+
+        
    Any and all of these configuration constants can be changed
+        at compile time with #define directives. Look at
+        tos/lib/tossim/sim_csma.h.
    
+
+        
    Because the radio connectivity graph can be scripted, you
+        can easily store topologies in files and then load the
+        file. Alternatively, you can store a topology as a script.
+        For example, this script will load a file which specifies each
+          link in the graph as a line with three values, the source, the
+          destination, and the gain, e.g.:
+
+          
    +1  2 -54.0
+          
    
+
+          means that when 1 transmits 2 hears it at -54 dBm. Create a file topo.txt
+          that looks like this:
    
+
+        
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+        
    
+
+        
    This script will read such a file:
+
+          
    +>>> f = open("topo.txt", "r")
+>>> lines = f.readlines()
+>>> for line in lines:
+...   s = line.split()
+...   if (len(s) > 0):
+...     print " ", s[0], " ", s[1], " ", s[2];
+...     r.add(int(s[0]), int(s[1]), float(s[2]))
+          
    
+        
+        
+        
    Now, when a node transmits a packet, other nodes will hear it.
+        This is a complete script for simulating packet transmission with
+          RadioCountToLedsC. Save it as a file test.py:
    
+        
    +from TOSSIM import *
+import sys
+
+t = Tossim([])
+r = t.radio()
+f = open("topo.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    print " ", s[0], " ", s[1], " ", s[2];
+    r.add(int(s[0]), int(s[1]), float(s[2]))
+
+t.addChannel("RadioCountToLedsC", sys.stdout)
+t.addChannel("Boot", sys.stdout)
+
+t.getNode(1).bootAtTime(100001);
+t.getNode(2).bootAtTime(800008);
+t.getNode(3).bootAtTime(1800009);
+
+r.setNoise(1, -100.0, 5.0)
+r.setNoise(2, -100.0, 5.0)
+r.setNoise(3, -100.0, 5.0)
+
+for i in range(0, 100):
+  t.runNextEvent()
+        
              
+
+        
    Run it by typing python test.py. You should see
+          output that looks like this:
    
+
+        
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+DEBUG (3): Received packet of length 2.
+DEBUG (2): Received packet of length 2.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+        
    
+
+        
    If you set the noise to be 30 plus or minus 5 dBm instead
+        of 80 plus or minus 5 dBm, then nodes will never transmit, as
+        the default CCA threshold is -95 dBm. You'll see something
+        like this:
    
+             
    +1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+        
    
+
+        
    Because the nodes backoff perpetually, they never transmit
+        the packet and so subsequent attempts to send fail. Although
+        it only takes a few simulation events to reach the first timer
+        firings, it takes many simulation events (approximately 4000)
+        to reach the second timer firings. This is because the nodes
+        have MAC backoff events. If you want to simulate in terms of
+        time, rather than events, you can always do something like
+        this, which simulates 5 seconds from the first node boot:
    
+
+        
    +t.runNextEvent();
+time = t.time()
+while (time + 50000000000 > t.time()):
+  t.runNextEvent()
+
    
+
+        
    TOSSIM allows you to specify a network topology in terms of
+        gain. However, this raises the problem of coming up with a
+        topology. There are two approaches you can take. The first is
+        to take data from a real world network and input this into
+        TOSSIM. The second is to generate it from applying a
+        theoretical propagation model to a physical layout. TOSSIM has
+        an example of the first from the Mirage
+        testbed at Intel Research Berkeley. The network topology
+        is from data gathered from one hundred micaZ nodes over an
+        eight hour period in February 2006. It can be found in tos/lib/tossim/topologies/mirage-1.txt, and has the following format:
+
+          
    +noise n avg std
+gain src dest g
+          
    
+
+          where each statement is on a separate line. The noise
+          statement defines the noise observed at node n with
+          an average of avg and a standard deviation of
+          std.  The gain statement defines a propagation
+          gain g when src transmits to dest. This
+          is a snippet of python code that will parse this file
+          format:
+
+          
    +f = open("mirage-1.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+          
    
+
+        
    TOSSIM has a tool for the second option of generating a
+        network topology using a theoretical propagation model. The
+        tool is written in Java and is
+        net.tinyos.sim.PropagationModel. The tool takes a
+        single command line parameter, the name of a configuration
+        file, e.g.:
    
+
+        
    +java net.tinyos.sim.PropagationModel config.txt
+        
    
+
+        
    The format of a configuration file is beyond the scope of
+        this document: the tool has its own documentation. TOSSIM has two sample configuration
+        files generated from the tool in
+        tos/lib/tossim/topologies. The first is grid.txt, which is a 10x10 grid of nodes
+        spaced roughly 40 feet apart. Each node is placed randomly
+        within a 40'x40' "cell." The cells follow a strict grid. The
+        second file is scatter.txt, which is
+        100 nodes scattered randomly (with a uniform distribution)
+        over a 360'x360' area. Note that the tool uses random numbers,
+        these configuration files can generate multiple different
+        network topologies. Network topology files generated from the
+        tool follow the same format as mirage-1.txt.
    
+
+        
    Variables
    
+
+        
    TOSSIM allows you to inspect variables in a running TinyOS
+        program. Currently, you can only inspect basic types. For
+        example, you can't look at fields of structs, but you can look
+        at state variables.
    
+
+        
    When you compile TOSSIM, the make system generates a large
+        XML file that contains a lot of information about the TinyOS
+        program, including every component variable and its type. If
+        you want to examine the state of your program, then you need
+        to give TOSSIM this information so it can parse all of the
+        variables properly. You do this by instantiating a Python
+        object that parses the XML file to extract all of the relevant
+        information. You have to import the Python support package for
+        TOSSIM to do this:
    
+
+        
    +from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+        
    
+
+        
    Instantiating a NescApp can take quite a while:
+        Python has to parse through megabytes of XML. So be patient
+        (you only have to do it once). NescApp has two optional
+        arguments. The first is the name of the application being
+        loaded. The second is the XML file to load. The default for
+        the latter is app.xml, which is the name of the file
+        that the make system generates. The default for the former is
+        "Unknown App."  So this code behaves identically to that
+        above:
    
+
+        
    +from tinyos.tossim.TossimApp import *
+
+n = NescApp("Unknown App", "app.xml")
+        
    
+
+        
    You fetch a list of variables from a NescApp object by
+        calling the function variables on the field
+        variables:
    
+
+        
    +vars = n.variables.variables()
+        
    
+
+        
    To enable variable inspection, you pass this list to a
+        Tossim object when you instantiate it:
    
+
+        
    +t = Tossim(vars)
+        
    
+
+        
    The TOSSIM object now knows the names, sizes, and types of
+        all of the variables in the TinyOS application. This
+        information allows the TOSSIM support code to take C variables
+        and properly tranform them into Python variables. This
+        currently only works for simple types: if a component declares
+        a structure, you can't access its fields. But let's say we
+        want to read the counter in RadioCountToLedsC. Since each mote
+        in the network has its own instance of the variable, we need
+        to fetch it from a specific mote:
    
+
+        
    +m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+        
    
+
+        
    The name of a variable is usually C.V, where
+        C is the component name and V is the variable.
+        In the case of generic components, the name is C.N.V,
+        where N is an integer that describes which instance.
+        Unfortunately, there is currently no easy way to know what
+        N is from nesC source, so you have to root through
+        app.c in order to know.
    
+
+        
    Once you have a variable object (v in the above
+        code), you can fetch its value with the getData()
+        function:
    
+
+        
    +counter = v.getData()
+        
    
+
+        
    Because getData() transforms the underlying C type
+        into a Python type, you can then use its return value in
+        Python expressions. For example, this script will start a
+        simulation of five nodes and run it until node 0's counter
+        reaches 10:
    
+
+        
    +from sys import *
+from random import *
+from TOSSIM import *
+from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+t = Tossim(n.variables.variables())
+r = t.radio()
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range (0, 9):
+  m = t.getNode(i)
+  m.bootAtTime(randint(1000, 2000) * 1000000)
+
+m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+
+while (v.getData() < 10):
+  t.runNextEvent()
+
+        
    
+
+      
    The TOSSIM examples
+      subdirectory also has an example script, named
+      variables.py.
    
+
+      
    Injecting Packets
    
+
+      
    TOSSIM allows you to dynamically inject packets into a
+      network.  Packets can be scheduled to arrive at any time. If a
+      packet is scheduled to arrive in the past, then it arrives
+      immediately. Injected packets circumvent the radio stack: it is
+      possible for a node to receive an injected packet while it is in
+      the midst of receiving a packet from another node over its
+      radio.
    
+
+      
    TinyOS 2.0 has support for building Python packet objects.
+      Just like the standard Java toolchain, you can build a packet
+      class based on a C structure. The packet class gives you a full
+      set of packet field mutators and accessors. If an application
+      has a packet format, you can generate a packet class for it,
+      instantiate packet objects, set their fields, and have nodes
+      receive them.
    
+
+      
    The RadioCountToLeds application Makefile has an
+      example of how to do this. First, it adds the Python class as a
+      dependency for building the application. Whenever you compile
+      the app, if the Python class doesn't exist, make will build it
+      for you:
    
+
+      
    +BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+      
    
+
+      
    The Makefile also tells make how to generate RadioCountMsg.py:
    
+
+      
    +RadioCountMsg.py: RadioCountToLeds.h
+        mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h RadioCountMsg -o $@
+      
    
+
+      
    The rule says to generate RadioCountMsg.py by calling mig
+      with the python parameter.  The Makefile also has rules on how
+      to build Java class, but that's not important for TOSSIM. Since
+      we've been using RadioCountToLeds so far, the Python class
+      should be there already.
    
+
+      
    RadioCountMsg.py defines a packet format, but this packet is
+      contained in the data payload of another format. If a node is
+      sending a RadioCountMsg over AM, then the RadioCountMsg
+      structure is put into the AM payload, and might look something
+      like this:
    
+
+      
    
+        
+          
+            
+            
+            
+          
+        
    AM HeaderRadioCountMsgAM Footer
    
+      
    
+      
+      
    If it is sending it over a routing protocol. the packet is
+      put in the routing payload, and might look something like this:
    
+
+      
    
+        
+          
+            
+            
+            
+            
+          
+        
    AM HeaderRouting HeaderRadioCountMsgAM Footer
    
+      
    
+
+      
    If you want to send a RadioCountMsg to a node, then you need
+      to decide how to deliver it. In the simple AM case, you place
+      the RadioCountMsg structure in a basic AM packet. In the routing
+      case, you put it in a routing packet, which you then put inside
+      an AM packet. We'll only deal with the simple AM case here.
    
+
+      
    To get an AM packet which you can inject into TOSSIM, you
+      call the newPacket function on a Tossim object. The
+      returned object has the standard expected AM fields:
+      destination, length, type, and data,
+      as well as strength.
    
+
+      
    To include support for a packet format, you must import
+      it. For example, to include RadioCountMsg, you have to import
+      it:
    
+
+      
    +from RadioCountMsg import *
+      
    
+      
+      
    This snippet of code, for example, creates a RadioCountMsg,
+      sets its counter to 7, creates an AM packet, stores the
+      RadioCountMsg in the AM packet, and configures the AM packet so
+      it will be received properly (destination and type):
    
+
+      
    +from RadioCountMsg import *
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+      
    
+
+
+      
    The variable pkt is now an Active Message of the AM
+      type of RadioCountMsg with a destination of 0 that contains a
+      RadioCountMsg with a counter of 7. You can deliver this packet
+      to a node with the deliver function. The
+      deliver function takes two parameters, the destination
+      node and the time to deliver:
    
+
+      
    +pkt.deliver(0, t.time() + 3)
+      
    
+
+      
    This call delivers pkt to node 0 at the current simulation
+      time plus 3 ticks (e.g., 3ns). There is also a
+      deliverNow, which has no time parameter. Note that if
+      the destination of pkt had been set to 1, then the
+      TinyOS application would not receive the packet, as it was
+      delivered to node 0.
    
+
+      
    Taken all together, the following script starts a simulation,
+      configures the topology based on topo.txt, and delivers a packet
+      to node 0. It can also be found as packets.py in the TOSSIM examples
+      subdirectory.
+
+      
    +import sys
+from TOSSIM import *
+from RadioCountMsg import *
+
+t = Tossim([])
+m = t.mac();
+r = t.radio();
+
+t.addChannel("RadioCountToLedsC", sys.stdout);
+t.addChannel("LedsC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+  
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range(0, 60):
+  t.runNextEvent();
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
+print "Delivering " + msg.__str__() + " to 0 at " + str(t.time() + 3);
+pkt.deliver(0, t.time() + 3)
+
+
+for i in range(0, 20):
+  t.runNextEvent();
+      
    
+
+      
+      
    C++
    
+
+      
    Python is very useful because it is succinct, easy to write,
+      and can be used interactively. Interpretation, however, has a
+      significant cost: a Python/C transition on every event is a
+      significant cost (around 100%, so it runs at half the
+      speed). Additionally, it's often useful to step through code
+      with a standard debugger. TOSSIM also has support for C++, so
+      that it can be useful in these circumstances.  Because many of
+      the Python interfaces are merely wrappers around C++ objects,
+      much of the scripting stays the same. The two major exceptions
+      are inspecting variables and injecting packets.
    
+
+      
    In a C++ TOSSIM, there is no variable inspection. While it is
+      possible to request memory regions and cast them to the expected
+      structures, currently there is no good and simple way to do
+      so. The Python support goes through several steps in order to
+      convert variables into Python types, and this gets in the way of
+      C++. However, as the purpose of C++ is usually to run high
+      performance simulations (in which inspecting variables is a big
+      cost) or debugging (when you have a debugger), this generally
+      isn't a big problem.
    
+
+      
    There is a C++ Packet class, which the Python
+      version is a simple wrapper around. In order to inject packets
+      in C++, however, you must build C support for a packet type and
+      manually build the packet. There currently is no support in mig
+      with which to generate C/C++ packet structures, and since most
+      packets are nx_struct types, they cannot be parsed by
+      C/C++. Furthermore, as many of the fields are nx types, they are
+      big endian, while x86 processors are little endian. Still, if you
+      want to deliver a packet through C++, you can do so.
    
+
+      
    Usually, the C++ and Python versions of a program look pretty
+      similar. For example:
    
+
+      
+
+        
+        
+        
+          
+          
+        
+      
    PythonC++
    
+            
    +import TOSSIM
+import sys
+
+from RadioCountMsg import *
+
+t = TOSSIM.Tossim([])
+r = t.radio();
+
+for i in range(0, 999):
+  m = t.getNode(i);
+  m.bootAtTime(5000003 * i + 1);
+  r.setNoise(i, -99.0, 3.0);
+  for j in range (0, 2):
+    if (j != i):
+      r.add(i, j, -50.0);
+
+
+
+
+for i in range(0, 1000000):
+  t.runNextEvent();
+           
    
+              		
+            
    +#include <tossim.h>
+
+
+
+int main() {
+  Tossim* t = new Tossim(NULL);
+  Radio* r = t->radio();
+
+  for (int i = 0; i < 999; i++) {
+    Mote* m = t->getNode(i);
+    m->bootAtTime(5000003 * i + 1);
+    r->setNoise(i, -99.0, 3);
+    for (int j = 0; j < 2; j++) {
+      if (i != j) {
+        r->add(i, j, -50.0);
+      }
+    }
+  }
+
+  for (int i = 0; i < 1000000; i++) {
+    t->runNextEvent();
+  }
+}
+            
    
+          
    
+
+      
    To compile a C++ TOSSIM, you have to compile the top-level
+      driver program (e.g, the one shown above) and link it against
+      TOSSIM. Usually the easiest way to do this is to link it against
+      the TOSSIM objects rather than the shared library. Often, it's
+      useful to have a separate Makefile to do this with. E.g.,
+      Makefile.Driver:
    
+
+      
    +all:
+        make micaz sim
+        g++ -g -c -o Driver.o Driver.c -I../../tos/lib/tossim/
+        g++ -o Driver Driver.o build/micaz/tossim.o build/micaz/sim.o
+      
    
+        
+
+     
    Using gdb
    
+
+     
    Since Driver is a C++ program, you can use gdb on it to
+     step through your TinyOS code, inspect variables, set 
+     breakpoints, and do everything else you can normally do.
+     Unfortunately, as gdb is designed for C and not nesC, the
+     component model of nesC means that a single command can have multiple
+providers; referring to a specific command requires specifying the component,
+interface, and command. For example, to break on entry to the redOff
+command of the Leds interface of LedsC, one must type:
+
+
    +$ gdb Driver
+GNU gdb Red Hat Linux (6.0post-0.20040223.19rh)
+Copyright 2004 Free Software Foundation, Inc.
+GDB is free software, covered by the GNU General Public License, and you are
+welcome to change it and/or distribute copies of it under certain conditions.
+Type "show copying" to see the conditions.
+There is absolutely no warranty for GDB.  Type "show warranty" for details.
+This GDB was configured as "i386-redhat-linux-gnu"...Using host libthread_db library "/lib/tls/libthread_db.so.1".
+
+(gdb) break *LedsP$Leds$led0Toggle
+Breakpoint 1 at 0x804f184: file LedsP.nc, line 73.
+
    
+
+
    nesC translates component names to C names using
+$. $ is a legal but almost-never-used character in some versions
+of C, so nesC prohibits it and uses it internally. The leading
+* is necessary so dbg can parse the $s. With the above
+breakpoint set, gdb will break whenever a mote toggles led0.
    
+
+
    Variables have similar names. For example, to inspect the packet
+of RadioCountToLedsC in the RadioCountToLeds application,
    
+
+
    +(gdb) print RadioCountToLedsC$packet
+$1 = {{header = {{data = ""}, {data = ""}, {data = ""}, {data = ""}, {
+        data = ""}}, data = {{data = ""} }, footer = {{
+        data = ""}, {data = ""}}, metadata = {{data = ""}, {data = ""}, {
+        data = ""}, {data = ""}, {data = ""}}} }
+
    
+
+
    For those who know gdb very well, you'll recognize this as a print
+of an array, rather than a single variable: there are more than 1000
+instances of the message_t struct. This is because TOSSIM simulates
+many motes; rather than there being a single RadioCountToLedsC$packet,
+there is one for every node. To print the packet of a specific node, you
+have to index into the array. This, for example, will print the variable
+for node 6:
    
+
+
    +(gdb) print RadioCountToLedsC$packet[6]
+$2 = {header = {{data = ""}, {data = ""}, {data = ""}, {data = ""}, {
+      data = ""}}, data = {{data = ""} }, footer = {{
+      data = ""}, {data = ""}}, metadata = {{data = ""}, {data = ""}, {
+      data = ""}, {data = ""}, {data = ""}}}
+
    
+
+
    If you want to print out the variable for the node TOSSIM is currently
+simulating, you can do this:
    
+
+
    +(gdb) print RadioCountToLedsC$counter[sim_node()]
+$4 = 0
+
    
+
+
    You can also set watchpoints (although, as to be expected, they are
+slow:
    
+
+
    +(gdb) watch UscGainInterferenceModelC$receiving[23]
+Hardware watchpoint 2: UscGainInterferenceModelC$receiving[23]
+
    
+
+
    This variable happens to be an internal variable in the 
+packet-level network simulation, which keeps track of whether
+the radio thinks it is receiving a packet. So setting the
+above watchpoint will cause gdb to break whenever 
+node 23 starts receiving a packet or returns to searching
+for packet preambles.
    
+
+
    Generic components add another wrinkle. Since they use
+a code-copying approach, each instance of a generic has its
+own separate functions and variables (this is mostly due to the
+fact that you can pass types to them). Take, for example,
+AMQueueImplP, which is used in both the radio
+AM stack and the serial AM stack. If you use gdb on an
+application that uses both serial and radio communication and
+try to break on its Send.send, you'll see an error:
    
+
+
    +(gdb) break *AMQueueImplP$Send$send
+No symbol "AMQueueImplP$Send$send" in current context.
+
    
+
+
    nesC gives each generic a unique number. So if you
+have an application in which there is a single copy
+of AMQueueImplP, its name will actually be AMQueueImplP$0.
+For example, in RadioCountToLeds, this will work:
    
+
+
    +(gdb) break *AMQueueImplP$0$Send$send
+Breakpoint 5 at 0x8051b29: file AMQueueImplP.nc, line 79.
+
    
+
+
    If you have multiple instances of a generic in a 
+program, there is unfortunately no easy way to figure out each one's
+name besides looking at the source code or stepping into them.
+E.g., if you application uses serial and radio communication,
+knowing which stack has AMQueueImpl$0 and which has AMQueueImplP$1
+requires either stepping through their send operation or looking
+at their app.c files.
+
    
+
+
    Conclusions
    
+
+This lesson introduced the basics of the TOSSIM simulator. It showed
+you how to configure a network, how to run a simulation, how to
+inspect variables, how to inject packets, and how to compile with C++.
+
+
+
    < Previous Lesson  |  Top
+
+
+
diff --git a/doc/html/tutorial/lesson2.html b/doc/html/tutorial/lesson2.html
new file mode 100644
index 00000000..f4182098
--- /dev/null
+++ b/doc/html/tutorial/lesson2.html
@@ -0,0 +1,779 @@
+
+    
+      TinyOS Tutorial Lesson 2: Modules and the TinyOS Execution Model
+      
+  
+  
+    
+    
    Lesson 2: Modules and the TinyOS Execution Model
    
+    
    Last updated June 27 2006
    
+    
+    
    This lesson introduces nesC modules, commands, events, and
+      tasks. It explains the TinyOS execution model.
    
+    
+    
    Modules and State
    
+    
+    
    Compiling TinyOS applications produces a single binary image that assumes
+      it has complete control of the hardware. Therefore, a mote only
+      runs one TinyOS image at a time. An image consists of the
+      components needed for a single application. As most more platforms
+      do not have hardware-based memory protection, there is
+      no seperation between a "user" address space and a "system"
+      address space; there is only one address space that all
+      components share. This is why many TinyOS components try to keep
+      their state private and avoid passing pointers: since there is
+      no hardware protection, the best way to keep memory uncorrupted
+      is to share it as little as possible.
    
+    
+    
    Recall from lesson 1 that the set of interfaces a component uses
+      and provides
+      define its signature. Both kinds of components -- configurations and
+      modules -- provide and use interfaces. The difference between the
+      two lies in their implementation: configurations are implemented
+      in terms of other components, which they wire, while modules
+      are executable code. After unwrapping all of the layers of abstraction
+      that configurations introduce, modules always lie within. Module
+      implementations are for the most part written in C, with
+      some extra constructions for nesC abstractions.
    
+
+    
    Modules can declare state variables. Any state a component declares
+      is private: no
+      other component can name it or directly access it. The only
+      way two components can directly interact is through interfaces.
+      Let's revisit the Blink application.
+      Here is the Blink module BlinkC's implementation in
+      its entirety:
    
+
+
    
+apps/Blink/BlinkC.nc:
+
    +module BlinkC {
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Timer<TMilli> as Timer1;
+  uses interface Timer<TMilli> as Timer2;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+
+  event void Timer0.fired()
+  {
+    call Leds.led0Toggle();
+  }
+  
+  event void Timer1.fired()
+  {
+    call Leds.led1Toggle();
+  }
+  
+  event void Timer2.fired()
+  {
+    call Leds.led2Toggle();
+  }
+}
+
    
+
+    
    BlinkC does not allocate any state. Let's change it so that its
+      logic is a little different: rather than blink the LEDs from three
+      different timers, we'll blink them with a single timer and keep
+      some state to know which ones to toggle. Make a copy of the Blink
+      application, BlinkSingle, and go into its directory.
    
+
+    
    +$ cd tinyos-2.x/apps
+$ cp -R Blink BlinkSingle
+$ cd BlinkSingle
+    
    
+
+    
    Open the BlinkC module in an editor.
+      The first step is to comment out the LED toggles in Timer1 and
+      Timer2:
    
+
+    
    +  event void Timer1.fired()
+  {
+    // call Leds.led1Toggle();
+  }
+  
+  event void Timer2.fired()
+  {
+    // call Leds.led2Toggle();
+  }
+    
    
+
+    
    The next step is to add some state to BlinkC, a single byte. Just
+      like in C, variables and functions must be declared before they are
+      used, so put it at the beginning of the implementation:
    
+
+    
    +implementation
+{
+
+  uint8_t counter = 0;
+
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+    
    
+
+    
    Rather than the standard C names of int, long,
+      or char, TinyOS code uses more explicit types, which
+      declare their size. In reality, these map to the basic C types, but
+      do so differently for different platforms. TinyOS code avoids using
+      int, for example, because it is platform-specific. For example,
+      on mica and Telos motes, int is 16 bits, while on the
+      IntelMote2, it is 32 bits. Additionally, TinyOS code often
+      uses unsigned values heavily, as wrap-arounds to negative numbers
+      can often lead to very unintended consequences. The commonly used
+      types are:
    
+
+    
    
+      
+	
+	  
+	
+	
+	  
+	
+	
+	  
+	
+      
    8 bits16 bits32 bits64 bits
    signedint8_tint16_tint32_tint64_t
    unsigneduint8_tuint16_tuint32_tuint64_t
    
+    
    
+      
    There is also a bool type. You can use the standard C
+	types, but doing so might raise cross-platform issues. Also,
+	uint32_t is often easier to write than unsigned
+	  long. Most platforms support floating point numbers
+      (float almost always, double sometimes),
+	although their arithmetic is in software rather than hardware.
    
+
+      
    Returning to our modified BlinkC, we've allocated a single unsigned
+	byte, counter. When the mote boots, the counter
+	will be	initialized to zero. The next step is to make it that
+	when Timer0 fires, it increments counter and displays the
+	result:
    
+
+      
    +  event void Timer0.fired()
+  {
+    counter++;
+    if (counter & 0x1) {
+      call Leds.led0On();
+    }
+    else {
+      call Leds.led0Off();
+    }
+    if (counter & 0x2) {
+      call Leds.led2On();
+    }
+    else {
+      call Leds.led2Off();
+    }
+    if (counter & 0x4) {
+      call Leds.led2On();
+    }
+    else {
+      call Leds.led2Off();
+    }
+  }
+      
    
+
+      
    Another, more succinct way to do it is to use the set
+	command:
    
+
+      
    +  event void Timer0.fired()
+  {
+    counter++;
+    call Leds.set(counter);
+  }
+      
    
+
+      
    Compile your program and install it on a mote. You'll see
+	that it behaves just as before, except that now the LEDs
+	are being driven by a single, rather than three, timers.
    
+
+      
    As only one timer is being used, this means that you don't need
+	Timer1 and Timer2: they waste CPU resources and memory. Open
+	BlinkC again and remove them from its signature and implementation.
+	You should have something that looks like this:
    
+
+      
    +module BlinkC {
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Leds;
+  users interface Boot;
+}
+implementation
+{
+  uint8_t counter = 0;
+
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+  }
+
+  event void Timer0.fired()
+  {
+    counter++;
+    call Leds.set(counter);
+  }
+  
+}
+      
    
+	
+      
    Try to compile the application: nesC will throw an error, because
+	the configuration BlinkAppC is wiring to interfaces on BlinkC
+	that no longer exist (Timer1 and Timer2):
    
+
+      
    +dark /root/src/tinyos-2.x/apps/BlinkSingle -5-> make micaz
+mkdir -p build/micaz
+    compiling BlinkAppC to a micaz binary
+ncc -o build/micaz/main.exe -Os -finline-limit=100000 -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=micaz -fnesc-cfile=build/micaz/app.c -board=micasb  -fnesc-dump=wiring -fnesc-dump='interfaces(!abstract())' -fnesc-dump='referenced(interfacedefs, components)' -fnesc-dumpfile=build/micaz/wiring-check.xml BlinkAppC.nc -lm 
+In component `BlinkAppC':
+BlinkAppC.nc:54: cannot find `Timer1'
+BlinkAppC.nc:55: cannot find `Timer2'
+make: *** [exe0] Error 1
+      
    
+
+      
    Open BlinkAppC and remove the two Timers and their wirings. Compile
+	the application:
    
+
+      
    +mkdir -p build/micaz
+    compiling BlinkAppC to a micaz binary
+ncc -o build/micaz/main.exe -Os -finline-limit=100000 -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=micaz -fnesc-cfile=build/micaz/app.c -board=micasb  -fnesc-dump=wiring -fnesc-dump='interfaces(!abstract())' -fnesc-dump='referenced(interfacedefs, components)' -fnesc-dumpfile=build/micaz/wiring-check.xml BlinkAppC.nc -lm 
+    compiled BlinkAppC to build/micaz/main.exe
+            2428 bytes in ROM
+              39 bytes in RAM
+avr-objcopy --output-target=srec build/micaz/main.exe build/micaz/main.srec
+avr-objcopy --output-target=ihex build/micaz/main.exe build/micaz/main.ihex
+    writing TOS image
+      
    
+
+      
    If you compare the ROM and RAM sizes with the unmodified Blink
+	application, you should see that they are a bit smaller: TinyOS
+	is only allocating state for a single timer, and there is
+	event code for only one timer.
    
+
+      
    Interfaces, Commands, and Events
    
+      
+      
    Go back to tinyos-2.x/apps/Blink.
+      In lesson 1 we learned that if a component uses an interface, it can
+	call the interface's commands and must implement handlers for its
+	events.  We also saw that the BlinkC component uses the Timer, Leds,
+	and Boot interfaces. 
+	Let's take a look at those interfaces:
    
+
+
    
+tos/interfaces/Boot.nc:
+
    +interface Boot {
+  event void booted();
+}
+
    
+
+tos/interfaces/Leds.nc:
+
    +interface Leds {
+
+  /**
+   * Turn LED n on, off, or toggle its present state.
+   */
+  async command void led0On();
+  async command void led0Off();
+  async command void led0Toggle();
+
+  async command void led1On();
+  async command void led1Off();
+  async command void led1Toggle();
+
+  async command void led2On();
+  async command void led2Off();
+  async command void led2Toggle();
+
+  /**
+   * Get/Set the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. 
+   */
+  async command uint8_t get();
+  async command void set(uint8_t val);
+  
+}
+
    
+
+tos/interfaces/Timer.nc:
+
    +interface Timer
+{
+  // basic interface
+  command void startPeriodic( uint32_t dt );
+  command void startOneShot( uint32_t dt );
+  command void stop();
+  event void fired();
+
+  // extended interface omitted (all commands)
+}
+
    
+
+    
    Looking over the interfaces for Boot,
+      Leds, and
+      Timer, we can see that since BlinkC uses
+      those interfaces it must implement handlers for the
+      Boot.booted() event, and the Timer.fired()
+      event. The Leds interface signature does not include any
+      events, so BlinkC need not implement any in order
+      to call the Leds commands. Here, again, is BlinkC's
+      implementation of Boot.booted():
    
+    
+
    
+apps/Blink/BlinkC.nc:
+
    +  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+
    
+
+    
    BlinkC uses 3 instances of the TimerMilliC component,
+      wired to the interfaces Timer0, Timer1, and
+      Timer2. The Boot.booted() event handler
+      starts each instance. The parameter to
+      startPeriodic() specifies the period in milliseconds after 
+      which the timer will fire (it's millseconds because of the
+      <TMilli> in the interface).
+      Because the timer is started using
+      the startPeriodic() 
+      command, the timer will be reset after firing such that the
+      fired() event is 
+      triggered every n milliseconds.
    
+
+    
    Invoking an interface command requires the call keyword,
+      and invoking an interface event requires the signal keyword.
+      BlinkC does not provide any interfaces, so its code
+      does not have any signal statements: in a later lesson,
+      we'll look at the boot sequence, which signals the Boot.booted()
+      event.
    
+    
+    
    Next, look at the implementation of the Timer.fired():
    
+
+
    
+apps/Blink/BlinkC.nc:
+
    +  event void Timer0.fired()
+  {
+    call Leds.led0Toggle();
+  }
+  
+  event void Timer1.fired()
+  {
+    call Leds.led1Toggle();
+  }
+  
+  event void Timer2.fired()
+  {
+    call Leds.led2Toggle();
+  }
+}
+
    
+	
+    
    Because it uses three instances of the Timer interface,
+      BlinkC 
+      must implement three instances of Timer.fired()
+      event. When implementing or invoking an interface function, the
+      function name is always interface.function. As
+      BlinkC's three Timer instances are named Timer0,
+      Timer1, and Timer2, it implements the three
+      functions Timer0.fired, Timer1.fired, and
+      Timer2.fired.
    
+    
+    
+    
+    
    TinyOS Execution Model: Tasks
    
+    
+    
    All of the code we've looked at so far is synchronous.
+      It runs in a single execution context and does not have
+      any kind of pre-emption. That is, when synchronous (sync) code
+      starts running, it does not relinquish the CPU to other
+      sync code until it completes. This simple mechanism allows
+      the TinyOS scheduler to minimize its RAM consumption and
+      keeps sync code very simple. However, it means that if one
+      piece of sync code runs for a long time, it prevents other
+      sync code from running, which can adversely affect system
+      responsiveness. For example, a long-running piece of code
+      can increase the time it takes for a mote to respond to a
+      packet.
    
+    
+    
    So far, all of the examples we've looked at have been
+      direct function calls. System components, such as the
+	  boot sequence or timers, signal events to a component,
+	  which takes some action (perhaps calling a command) and
+	  returns. In most cases, this programming approach works
+	  well. Because sync code is non-preemptive, however,
+	  this approach does not work well for large computations.
+	  A component needs to be able to split a large computation
+	  into smaller parts, which can be executed one at a time.
+	  Also, there are times when a component needs to do something,
+	  but it's fine to do it a little later. Giving TinyOS the
+	  ability to defer the computation until later can let it
+	  deal with everything else that's waiting first.
    
+
+	
    Tasks enable components to perform general-purpose
+	  "background" processing in an application. A task is a function
+	  which a component tells TinyOS to run later, rather than now.
+	  The closest analogies in traditonal operating systems are
+	  interrupt
+	    bottom halves and deferred
+	    procedure calls.
    
+
+	
    Make a copy of the Blink application, and call it BlinkTask:
    
+
+	
    +$ cd tinyos-2.x/apps
+$ cp -R Blink BlinkTask
+$ cd BlinkTask
+	
    
+
+	
    Open BlinkC.nc. Currently, the event handler
+	  for Timer0.fired() is:
    
+
+	
    +event void Timer0.fired() {
+  dbg("BlinkC", "Timer 0 fired @ %s\n", sim_time_string());
+  call Leds.led0Toggle();
+}
+	
    
+
+	
    Let's change it so that it does a bit of work, enough that
+	  we'll be able to see how long it runs. In terms of a mote,
+	  the rate at which we can see things (about 24 Hz, or 40 ms)
+	  is slow: the micaZ and Telos can send about 20 packets
+	  in that time. So this example is really exaggerated, but it's
+	  also simple enough that you can observe it with the naked eye.
+	  Change the handler to be this:
    
+
+	
    +event void Timer0.fired() {
+  uint32_t i;
+  dbg("BlinkC", "Timer 0 fired @ %s\n", sim_time_string());
+  for (i = 0; i < 400001; i++) {
+    call Leds.led0Toggle();
+  }
+}
+	
    
+	 
+    
    This will cause the timer to toggle 400,001 times, rather
+      than once. Because the number is odd, it will have the end
+      result of a single toggle, with a bit of flickering in-between.
+      Compile and install the program. You'll see that
+      Led 0 introduces so much latency in the Led 1 and Led 2
+      toggles that you never see a situation where only one is on.
+      On TelosB motes, this long running task can cause the Timer stack
+      to completely skip events (try setting the count to 200,001 or 100,001).
+    
    
+
+    
    The problem is that this computation is interfering with the timer's
+      operation. What we'd like to do is tell TinyOS to execute the computation
+      later. We can accomplish this with a task.
    
+
+    
    A task is declared in your implementation module using the syntax
+    
      task void taskname() { ... }
     where
+    taskname() is whatever symbolic name you want to assign to the
+    task. Tasks must return void and may not take any
+    arguments. To dispatch a task for (later) execution, use the syntax
+    
      post taskname();
     A component can post a task in a
+    command, an event, or a task.  Because they are the root of a call
+    graph, a tasks can safely both call commands and signal events. We will
+    see later that, by convention, commands do not signal events to avoid
+    creating recursive loops across component boundaries (e.g., if command
+    X in component 1 signals event Y in component 2, which itself calls
+    command X in component 1). These loops would be hard for the programmer to
+    detect (as they depend on how the application is wired) and would lead to
+    large stack usage.
    
+
+
+    
    Modify BlinkC to perform the loop in a task:
    
+
+    
    +task void computeTask() {
+  uint32_t i;
+  for (i = 0; i < 400001; i++) {}
+}
+
+event void Timer0.fired() {
+  call Leds.led0Toggle();
+  post computeTask();
+}
+    
    
+
+    
    Telos platforms will still struggle, but mica platforms will
+      operate OK.
    
+
+    
+    
    The post operation places the task on an internal
+      task queue which is processed in FIFO order. When a
+      task is executed, it runs to completion
+      before the next task is run. Therefore, and as the above examples
+      showed, a task should not run for long periods of time.
+      Tasks do not preempt each
+      other, but a task can  be preempted by a hardware interrupts (which
+      we haven't seen yet).
+      If you need to run a series of long operations,
+      you should dispatch a separate task for each operation, rather
+      than using one big task. The post operation returns
+      an error_t, whose value is either SUCCESS
+      or FAIL. A post fails if and only if the task is
+      already pending to run (it has been posted successfully and has not been invoked yet).(1)
    
+
+    
    For example, try this:
    
+
+    
    +uint32_t i;
+
+task void computeTask() {
+  uint32_t start = i;
+  for (;i < start + 10000 && i < 400001; i++) {}
+  if (i >= 400000) {
+    i = 0;
+  }
+  else {
+    post computeTask();
+  }
+}
+    
    
+
+    
    This code breaks the compute task up into many smaller tasks.
+      Each invocation of computeTask runs through 10,000 iterations of
+      the  loop. If it hasn't completed all 400,001 iterations, it reposts
+      itself. Compile this code and run it; it will run fine on both
+      Telos and mica-family motes.
    
+
+    
    Note that using a task in this way required including another
+      variable (i) in the component. Because computeTask()
+      returns after 10,000 iterations, it needs somewhere to store
+      its state for the next invocation. In this situation, i
+      is acting as a static function variable often does in C. However,
+      as nesC component state is completely private, using the
+      static keyword to limit naming scope is not as useful.
+      This code, for example, is equivalent:
    
+    
    +task void computeTask() {
+  static uint32_t i;
+  uint32_t start = i;
+  for (;i < start + 10000 && i < 400001; i++) {}
+  if (i >= 400000) {
+    i = 0;
+  }
+  else {
+    post computeTask();
+  }
+}
+    
    
+
+    
    Internal Functions
    
+
+    
    Commands and events are the only way that a function in a component
+      can be made callable by another component. There are situations
+      when a component wants private functions for its own internal
+      use. A component can define standard C functions, which other
+      components cannot name and therefore cannot invoke directly. 
+      While these functions do not have the command or event
+      modifier, they can freely call commands or signal events. For example,
+      this is perfectly reasonable nesC code:
    
+
+    
    +module BlinkC {
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Timer<TMilli> as Timer1;
+  uses interface Timer<TMilli> as Timer2;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+
+  void startTimers() {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+
+  event void Boot.booted()
+  {
+    startTimers();
+  }
+
+  event void Timer0.fired()
+  {
+    call Leds.led0Toggle();
+  }
+  
+  event void Timer1.fired()
+  {
+    call Leds.led1Toggle();
+  }
+  
+  event void Timer2.fired()
+  {
+    call Leds.led2Toggle();
+  }
+}
+    
    
+    
+    
    Internal functions act just like C functions: they don't need the 
+	call or signal keywords.
    
+
+    
    Split-Phase Operations
    
+
+    
    Because nesC interfaces are wired at compile time,
+      callbacks (events) in TinyOS are very efficient. In most
+      C-like languages, callbacks have to be registered at run-time
+      with a function pointer. This can prevent the compiler from
+      being able to optimize code across callback call paths. Since
+      they are wired statically in nesC, the compiler knows exactly
+      what functions are called where and can optimize heavily.
    
+
+    
    The ability to optimize across component boundaries is
+      very important in TinyOS, because it has no blocking operations.
+      Instead, every long-running operation is split-phase.
+      In a blocking system, when a program calls a long-running operation,
+      the call does not return until the operation is complete: the program
+      blocks. In a split-phase system, when a program calls a long-running
+      operation, the call returns immediately, and the called abstraction
+      issues a callback when it completes. This approach is called
+      split-phase because it splits invocation and completion into two
+      separate phases of execution. Here is a simple example of the
+      difference between the two:
    
+
+
    
+    
+      
+      
+        
+        
+      
+    
    Blocking Split-Phase
    
+
    +if (send() == SUCCESS) {
+  sendCount++;
+}
+
    
+    		
+
    +// start phase
+send(); 
+
+//completion phase
+void sendDone(error_t err) {
+  if (err == SUCCESS) {
+    sendCount++;
+  }
+}
+
    
+
    
+
    
+
+    
    Split-phase code is often a bit more verbose and complex than
+     sequential code. But it has several advantages. First, split-phase
+     calls do not tie up stack memory while they are executing. Second,
+     they keep the system reponsive: there is never a situation when
+     an application needs to take an action but all of its threads are
+     tied up in blocking calls. Third, it tends to reduce stack
+     utilization, as creating large variables on the stack is rarely
+     necessary.
    
+
+    
    Split-phase interfaces enable a TinyOS component to easily start
+      several operations at once and have them execute in parallel.
+      Also, split-phase operations can save memory. This is because
+      when a program calls a blocking operation, all of the state it
+      has stored on the call stack (e.g., variables declared in functions)
+      have to be saved. As determining the exact size of the stack is
+      difficult, operating systems often choose a very conservative
+      and therefore large size.  Of course, if there is data that 
+      has to be kept across the 
+      call, split-phase operations still need to save it.
    
+
+    
    The command Timer.startOneShot is an example of
+     a split-phase call. The user of the Timer inteface calls the command,
+     which returns immediately. Some time later (specified by the
+     argument), the component providing Timer signals Timer.fired.
+     In a system with blocking calls, a program might use sleep():
+
+     
    
+       
+         
+           
+         
+         
+           
+           
+         
+       
    BlockingSplit-phase
    
+             
    +state = WAITING;
+op1();
+sleep(500);
+op2();
+state = RUNNING
+             
    
+               		
+             
    +state = WAITING;
+op1();
+call Timer.startOneShot(500);
+
+command void Timer.fired() {
+  op2();
+  state = RUNNING;
+}
+             
    
+           
    
+     
     
+
+
    In the next lesson, we'll look at one of the most basic
+split-phase operations: sending packets.
    
+
+
+
    Related Documentation
    
+    
+
+
+
    
+
    
+
+
    (1) The task semantics have changed
+significantly from tinyos-2.x. In 1.x, a task could be posted more
+than once and a post could fail if the task queue were full. In 2.x, a
+basic post will only fail if that task has already been posted and has
+not started execution. So a task can always run, but can only have one
+outstanding post at any time. If a component needs to post task
+several times, then the end of the task logic can repost itself as
+need be.
+
+
+
+
    
+
    
+
    
+
    < Previous Lesson |  Top  |  Next Lesson  >
+
    
+
+
+
diff --git a/doc/html/tutorial/lesson3.html b/doc/html/tutorial/lesson3.html
new file mode 100644
index 00000000..09637e0a
--- /dev/null
+++ b/doc/html/tutorial/lesson3.html
@@ -0,0 +1,974 @@
+
+
+
+  Lesson 3: Mote-mote radio communication
+  
+
+
+
+
    Lesson 3: Mote-mote radio communication
    
+
    Last Modified: June 27 2006
    
+
+
    This lesson introduces radio communications in TinyOS.  You will
+become familar with TinyOS interfaces and components that support
+communications and you will learn how to:
+
+
    
+
+
      
+
+
    • Use message_t, the TinyOS 2.0 message buffer.
+
+
    • Send a message buffer to the radio.
+
+
    • Receive a message buffer from the radio.
+
+
    
+
+
+
    Introduction
    
+
+TinyOS provides a number of interfaces to abstract the
+underlying communications services and a number of components
+that provide (implement) these interfaces.  All of these
+interfaces and components use a common message buffer abstraction,
+called message_t, which is implemented as a nesC struct
+(similar to a C struct).  The message_t abstraction replaces
+the TinyOS 1.x TOS_Msg abstraction.  Unlike TinyOS 1.x, the
+members of message_t are opaque, and therefore not accessed
+directly.  Rather, message_t is an
+abstract data type, whose members are read and written using
+accessor and mutator functions(1).
+
+
    Basic Communications Interfaces
    
+
+
    There are a number of interfaces and components that use
+message_t as the underlying data structure.  Let's take a
+look at some of the interfaces that are in the tos/interfaces
+directory to familiarize ourselves with the general functionality of
+the communications system:
+
+
    
+
      
+
+
    • Packet -
+Provides the basic accessors for the message_t abstract data
+type.  This interface provides commands for clearing a message's
+contents, getting its payload length, and getting a pointer to its
+payload area.
+
+
    • Send -
+Provides the basic address-free message sending interface.
+This interface provides commands for sending a message and canceling a
+pending message send.  The interface provides an event to indicate
+whether a message was sent successfully or not.  It also provides
+convenience functions for getting the message's maximum payload as
+well as a pointer to a message's payload area.
+
+
    • Receive
+- Provides the basic message reception interface.  This interface
+provides an event for receiving messages.  It also provides, for
+convenience, commands for getting a message's payload length and
+getting a pointer to a message's payload area.
+
+
    • PacketAcknowledgements
+- Provides a mechanism for requesting acknowledgements on a per-packet
+basis.
+
+
    • RadioTimeStamping
+- Provides time stamping information for radio transmission and
+reception.
+
+
    
+
+
    Active Message Interfaces
    
+
+
    Since it is very common to have multiple services using the same
+radio to communicate, TinyOS provides the Active Message (AM) layer to
+multiplex access to the radio.  The term "AM type" refers to the
+field used for multiplexing.  AM types are similar in function to the
+Ethernet frame type field, IP protocol field, and the UDP port in that
+all of them are used to multiplex access to a communication service.
+AM packets also includes a destination field, which stores an
+"AM address"  to address packets to particular motes. Additional 
+interfaces, also located in the tos/interfaces directory, 
+were introduced to support the AM services:
+
+
    
+
      
+
+
    • AMPacket - Similar
+to Packet, provides the basic AM accessors for the
+message_t abstract data type.  This interface provides
+commands for getting a node's AM address, an AM packet's destination,
+and an AM packet's type.  Commands are also provides for setting an AM
+packet's destination and type, and checking whether the destination is
+the local node.
+
+
    • AMSend -
+Similar to Send, provides the basic Active Message sending
+interface.  The key difference between AMSend and
+Send is that AMSend takes a destination AM address in its
+send command.
+
+
    
+
+
    
+The AM address of a node can be set at installation time, using the
+make install.n or make reinstall.n
+commands. It can be changed at runtime using the
+ActiveMessageAddressC component (see below).  
+
+
    Components
    
+
+
    A number of components implement the basic communications and
+active message interfaces.  Let's take a look at some of the
+components in the /tos/system directory.  You should be
+familiar with these components because your code needs to specify both
+the interfaces your application
+uses as well as the components which provide
+(implement) those interfaces:
+
+
    
+
      
+
+
    • AMReceiverC -
+Provides the following interfaces: Receive, Packet,
+and AMPacket.
+
+
    • AMSenderC
+- Provides AMSend, Packet, AMPacket, and
+PacketAcknowledgements as Acks.
+
+
    • AMSnooperC
+- Provides Receive, Packet, and AMPacket.
+
+
    • AMSnoopingReceiverC
+- Provides Receive, Packet, and AMPacket.
+
+
    • ActiveMessageAddressC
+- Provides commands to get and set the node's active message address.
+This interface is not for general use and changing the a node's active
+message address can break the network stack, so avoid using it unless
+you know what you are doing.
+
+
    
+
+
    Naming Wrappers
    
+
+
    Since TinyOS supports multiple platforms, each of which might have
+their own implementation of the radio drivers, an additional,
+platform-specific, naming wrapper called ActiveMessageC is
+used to bridge these interfaces to their underlying, platform-specific
+implementations.  ActiveMessageC provides most of the
+communication interfaces presented above.  Platform-specific versions
+of ActiveMessageC, as well the underlying implementations
+which may be shared by multiple platforms (e.g. Telos and MicaZ)
+include:
+
+
    
+
+
    
+
+
    The TinyOS 2.0 Message Buffer
    
+
+
    TinyOS 2.0 introduces a new message buffer abstraction called
+message_t.  If you are familiar with earlier versions of
+TinyOS, you need to know that message_t replaces 
+TOS_Msg.  The message_t structure is defined in
+tos/types/message.h.
+
+
    +typedef nx_struct message_t {
+  nx_uint8_t header[sizeof(message_header_t)];
+  nx_uint8_t data[TOSH_DATA_LENGTH];
+  nx_uint8_t footer[sizeof(message_header_t)];
+  nx_uint8_t metadata[sizeof(message_metadata_t)];
+} message_t;
+
    
+
+
    Note: The header, footer, and metadata fields are all opaque and
+must not be accessed directly.  It is important to access the
+message_t fields only through Packet,
+AMPacket, and other such interfaces, as will be demonstrated
+in this tutorial. The rationale for this approach is that it allows
+the data (payload) to be kept at a fixed offset, avoiding a copy when
+a message is passed between two link layers. See
+Section 3 in TEP 111  for more details.
+
+
    Sending a Message over the Radio
    
+
+We will now create a simple application that increments a counter, displays
+the counter's three least significant bits on the three LEDs, and sends a
+message with the counter value over the radio.  Our implementation will use
+a single timer and a counter, in a way similar to the
+BlinkSingle example from lesson 2.
+
+
    Reimplementing Blink
    
+
+As a first step, we can reimplement Blink using a single
+timer and counter.  Create a new directory in apps named
+BlinkToRadio:
+
+
    +$ cd tinyos-2.x/apps
+$ mkdir BlinkToRadio
+
    
+
+Inside this directory, create a file BlinkToRadioC.nc, which
+has this code: 
+
+
    +#include <Timer.h>
+#include "BlinkToRadio.h"
+
+module BlinkToRadioC {
+  uses interface Boot;
+  uses interface Leds;
+  uses interface Timer<TMilli> as Timer0;
+}
+implementation {
+  uint16_t counter = 0;
+
+  event void Boot.booted() {
+    call Timer0.startPeriodic(TIMER_PERIOD_MILLI);
+  }
+
+  event void Timer0.fired() {
+    counter++;
+    call Leds.set(counter);
+  }
+}
+
+
    
+
+
    Let's look at a few specific lines in this program.  First, notice
+the C preprocessor include directive on the first line.  This
+directive tells the compiler to simply replace the directive with the
+entire contents of Timer.h.  The compiler looks for
+Timer.h in the standard places.  In this case,
+standard means the TinyOS system directories that are located in
+tos or its subdirectories.  It is possible to tell the
+compiler to look beyond these standard directories by using the
+-I flag in the Makefile, for example, as is common when
+including contributed libraries located in contrib directory
+tree.
+
+
    The second line of this program is also an include
+directive, but note that it uses quotes around the filename rather
+than angle brackets.  The quotes tell the preprocessor to look in the
+current directory before searching through the standard directories
+for the particular file.  In this case, the BlinkToRadio.h
+file is located in the same directory and defines some constants that
+are used in this program.  We will take a look at
+BlinkToRadio.h in just a bit.
+
+
    Next, the call to Leds.set directly sets the three LEDs to 
+the three low-order bits of the counter.
+
+
    Finally, note the call
+Timer0.startPeriodic(TIMER_PERIOD_MILLI) line in the
+Boot.booted function.  The value of
+TIMER_PERIOD_MILLI is defined in the BlinkToRadio.h
+header file:
+
+
    +#ifndef BLINKTORADIO_H
+#define BLINKTORADIO_H
+
+enum {
+  TIMER_PERIOD_MILLI = 250
+};
+
+#endif
+
    
+
+
    BlinkToRadio.h is a pretty standard header file but there
+are two things to note here.  First, notice the use of the
+ifndef, define, and endif directives.
+These directives are used to ensure that the definitions in each
+header file is not included multiple times because the compiler would
+complain about multiply-defined objects.  By convention, the literal
+used for these directives is an all-caps version of the filename with
+any periods converted to underscores.  The other important thing to
+note is the use of an enum declaration for defining the
+constant TIMER_PERIOD_MILLI.  Using enum for
+defining constants is preferred over using define because
+enum does not indiscriminantly replace every occurence of the
+defined literal, regardless of where it appears in the
+source.  As a result, enums provide better scoping as well.
+
+
    BlinkToRadioC.nc provides the implementation logic
+of the program and BlinkToRadio.h defines constants and/or
+data structures.  A third file is needed to wire the interfaces
+that the implementation uses to the actual components which
+provide these interfaces.  The BlinkToRadioAppC.nc
+provides the needed wiring:
+
+
    +#include <Timer.h>
+#include "BlinkToRadio.h"
+
+configuration BlinkToRadioAppC {
+}
+implementation {
+  components MainC;
+  components LedsC;
+  components BlinkToRadioC as App;
+  components new TimerMilliC() as Timer0;
+
+  App.Boot -> MainC;
+  App.Leds -> LedsC;
+  App.Timer0 -> Timer0;
+}
+
    
+
+
    The BlinkToRadioAppC should look familiar to you since it is
+essentially a subset of the Blink application/configuration
+from an earlier lesson.
    
+
+
    These three files constitute all of the application code: the only other
+thing it needs is a Makefile. Create a file named Makefile. For
+an application as simple as this one, the Makefile is very short:
    
+
+
    +COMPONENT=BlinkToRadioAppC
+include $(MAKERULES)
+
+
    
+
+
    The first line tells the TinyOS make system that the top-level
+application component is BlinkToRadioAppC. The second line 
+loads in the TinyOS build system, which has all of the rules
+for building and installing on different platforms.
    
+
+
    Defining a Message Structure
    
+
+
    Now that Blink has been reimplemented using a single timer
+and counter, we can now turn our attention to defining a message
+format to send data over the radio.  Our message will send both the
+node id and the counter value over the radio.  Rather than directly
+writing and reading the payload area of the message_t with
+this data, we will use a structure to hold them and then use structure
+assignment to copy the data into the message payload area.  Using a
+structure allows reading and writing the message payload more
+conveniently when your message has multiple fields or multi-byte fields
+(like uint16_t or uint32_t) because you can avoid reading and writing
+bytes from/to the payload using indices and then shifting and adding
+(e.g. uint16_t x = data[0] << 8 + data[1]).  Even for a
+message with a single field, you should get used to using a structure
+because if you ever add more fields to your message or move any of the
+fields around, you will need to manually update all of the payload
+position indices if you read and write the payload at a byte level.
+Using structures is straightforward.  To define a message structure
+with a uint16_t node id and a uint16_t counter in
+the payload, we add the following lines to BlinkToRadio.h,
+just before the endif directive:
+
+
    +typedef nx_struct BlinkToRadioMsg {
+  nx_uint16_t nodeid;
+  nx_uint16_t counter;
+} BlinkToRadioMsg;
+
    
+
+
    If this code doesn't look even vaguely familiar, you should spend a
+few minutes reading up on C structures. If you are familiar with C
+structures, this syntax should look familar but the nx_
+prefix on the keywords struct and uint16_t should
+stand out.  The nx_ prefix is specific to the nesC language
+and signifies that the struct and uint16_t are
+external types(3)(4).
+External types have the same representation on all platforms.
+ The nesC compiler generates code that transparently reorders access to 
+ nx_ data types and eliminates the need to manually address 
+endianness and alignment (extra padding in structs present on some
+platforms) issues. So what is endianness?  Read on...
+
+
    Different processors represent numbers in different ways in their
+memory: some processors use a "big endian" representation which
+means that the most significant byte of a multi-byte (e.g. 16- or
+32-bit) number is located at a lower memory address than the least
+significant byte, while "little endian" stores data in exactly the
+opposite order.  A problem arises when data is serialized and sent
+over the network because different processors will decode the same set
+of bytes in different ways, depending on their "endianness."  The
+main difficulty endiannes presents is that it requires operations to
+rearrange byte orders to match the network protocol specification or
+the processor architecture -- an annoying and error-prone process.
+The htons, htonl, ntohs, and ntohl
+calls used with the sockets API are an example of platform-specific
+calls that convert between network and host byte orders, but you have
+to remember to use them.  The nesC programming language takes a
+different approach to the problem and defines
+external types which allow the programmer to avoid dealing with byte
+reordering.
+
+
+
    Sending a Message
    
+
+
    Now that we have defined a message type for our application,
+BlinkToRadioMsg, we will next see how to send the message
+over the radio.  Before beginning, let's review the purpose of the
+application.  We want a timer-driven system in which every firing of
+the timer results in (i) incrementing a counter, (ii) displaying the
+three lowest bits of the counter on the LEDs, and (iii) transmitting
+the node's id and counter value over the radio.  To implement this
+program, we follow a number of simple steps, as described in the next
+paragraph.
+
+
    First, we need to identify the interfaces (and components) that
+provide access to the radio and allow us to manipulate the
+message_t type.  Second, we must update the module
+block in the BlinkToRadioC.nc by adding uses
+statements for the interfaces we need.  Third, we need to declare 
+new variables and add any initialization and start/stop code that is
+needed by the interfaces and components.  Fourth, we must add any
+calls to the component interfaces we need for our application.  Fifth,
+we need to implmement any events specified in the interfaces we plan
+on using.  Sixth, the implementation block of the application
+configuration file, BlinkToRadioApp.c, must be updated by
+adding a components statement for each component we use that
+provides one of the interfaces we chose earlier.  Finally, we need to
+wire the the interfaces used by the application to the components
+which provide those interfaces.
+
+
    Let's walk through the steps, one-by-one: 
+
+
      
+
+
    1. Identify the interfaces (and components) that provide access
+to the radio and allow us to manipulate the message_t
+type. 
+
+
      We will use the AMSend interface to send packets as
+well as the Packet and AMPacket interfaces to access
+the message_t abstract data type.  Although it is possible to
+wire directly to the ActiveMessageC component, we will
+instead use the AMSenderC component.  However, we still need
+to start the radio using the ActiveMessageC.SplitControl
+interface.
+
+
      The reason for using AMSenderC is because it provides a
+virtualized abstraction.  Earlier versions of TinyOS did not
+virtualize access to the radio, so it was possible for two components
+that were sharing the radio to interfere with each other.  It was not
+at all uncommon for one component to discover the radio was busy
+because some other component, unknown to the first component, was
+accessing the active message layer.  Radio virtualization was
+introduced in TinyOS 2.0 to address this interference and
+AMSenderC was written to provide this virtualization.  Every
+user of AMSenderC is provided with a 1-deep queue and
+the queues of all users are serviced in a fair manner.
+
+
    2. Update the module block in the
+BlinkToRadioC.nc by adding uses statements for the
+interfaces we need:
+
+
      +module BlinkToRadioC {
+  ...
+  uses interface Packet;
+  uses interface AMPacket;
+  uses interface AMSend;
+  uses interface SplitControl as AMControl;
+}
+
      
+
+Note that SplitControl has been renamed to AMControl
+using the as keyword.  nesC allows interfaces to be renamed
+in this way for several reasons.  First, it often happens
+that two or more components that are needed in the same module provide the
+same interface.  The as keyword allows one or more such names
+to be changed to distinct names so that they can each be addressed
+individually.  Second, interfaces are sometimes renamed to something
+more meaningful.  In our case, SplitControl is a general
+interface used for starting and stopping components, but the name
+AMControl is a mnemonic to remind us that the particular
+instance of SplitControl is used to control the
+ActiveMessageC component.
+
+
+
    3. Declare any new variables and add any needed initialization
+code.
+
+
      First, we need to declare some new module-scope variables.  We need a
+message_t to hold our data for transmission.  We also need a
+flag to keep track of when the radio is busy sending.  These
+declarations need to be added in the implementation block of
+BlinkToRadioC.nc:
+
+
      +implementation {
+  bool busy = FALSE;
+  message_t packet;
+  ...
+}
+
      
+
+
      Next, we need to handle the initialization of the radio.  The radio
+needs to be started when the system is booted so we must call
+AMControl.start inside Boot.booted.  The only
+complication is that in our current implementation, we start a timer
+inside Boot.booted and we are planning to use this timer to
+send messages over the radio but the radio can't be used until it has
+completed starting up.  The radio signals that it has completed
+starting through the AMControl.startDone event.  To ensure
+that we do not start using the radio before it is ready, we need to
+postpone starting the timer until after the radio has completed
+starting.  We can accomplish this by moving the call to start the
+timer, which is now inside Boot.booted, to
+AMControl.startDone, giving us a new Boot.booted with
+the following body:
+
+
      +  event void Boot.booted() {
+    call AMControl.start();
+  }
+
      
+
+
      We also need to implement the AMControl.startDone event
+handler, which has the following body:
+
+
      +  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call Timer0.startPeriodic(TIMER_PERIOD_MILLI);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
      
+
+
      If the radio is started successfully, AMControl.startDone
+will be called with the error_t parameter set to a value of
+SUCCESS.  If the radio starts successfully, then it is
+appropriate to start the timer.  If, however, the radio does not start
+successfully, then it obviously cannot be used so we try again to
+start it.  This process continues until the radio starts, and ensures
+that the node software doesn't run until the key components have
+started successfully.  If the radio doesn't start at all, a human
+operator might notice that the LEDs are not blinking as they are
+supposed to, and might try to debug the problem.
+
+
+
    4. Add any program logic and calls to the used interfaces we
+need for our application. 
+
+
      Since we want to transmit the node's id and counter value every
+time the timer fires, we need to add some code to the
+Timer0.fired event handler:
+
+
      +event void Timer0.fired() {
+  ...
+  if (!busy) {
+    BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)(call Packet.getPayload(&pkt, NULL));
+    btrpkt->nodeid = TOS_NODE_ID;
+    btrpkt->counter = counter;
+    if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) {
+      busy = TRUE;
+    }
+  }
+}
+
      
+
+This code performs several operations.  First, it ensures that a message
+transmission is not in progress by checking the busy flag. Then it
+gets the packet's payload portion and casts it to a pointer to the
+previously declared BlinkToRadioMsg external type. It can
+now use this pointer to initialise the packet's fields, and then send
+the packet by calling AMSend.send. The packet is sent to all 
+nodes in radio range by specyfing AM_BROADCAST_ADDR as the
+destination address. Finally, the test against SUCCESS verifies that the
+AM layer accepted the message for transmission. If so, the busy flag is set 
+to true. For the duration of the send attempt, the packet is owned by the
+radio, and user code must not access it.
+
+
      Note that we could have avoided using the Packet interface,
+as it's getPayload command is repeated within AMSend.
+
+
+
    5. Implmement any (non-initialization) events specified in the
+interfaces we plan on using. 
+
+
      Looking through the Packet,
+AMPacket, and AMSend interfaces, we see that there
+is only one event we need to worry about,
+AMSend.sendDone:
+
+
      +  /** 
+   * Signaled in response to an accepted send request. msg is
+   * the message buffer sent, and error indicates whether
+   * the send was successful.
+   *
+   * @param  msg   the packet which was submitted as a send request
+   * @param  error SUCCESS if it was sent successfully, FAIL if it was not,
+   *               ECANCEL if it was cancelled
+   * @see send
+   * @see cancel
+   */ 
+  event void sendDone(message_t* msg, error_t error);
+
      
+
+This event is signaled after a message transmission attempt.  In
+addition to signaling whether the message was transmitted successfully
+or not, the event also returns ownership of msg from
+AMSend back to the component that originally called the
+AMSend.send command.  Therefore sendDone handler
+needs to clear the busy flag to indicate that the message
+buffer can be reused:
+
+
      +  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (&pkt == msg) {
+      busy = FALSE;
+    }
+  }
+
      
+
+Note the check to ensure the message buffer that was signaled is the
+same as the local message buffer.  This test is needed because if two
+components wire to the same AMSend, both will receive
+a sendDone event after either component issues a
+send command.  Since a component writer has no way to enforce
+that her component will not be used in this manner, a defensive style
+of programming that verifies that the sent message is the same one
+that is being signaled is required.
+
+
+
    6. Update the implementation block of the application
+configuration file by adding a components statement for each
+component used that provides one of the interfaces chosen earlier.
+
+
      The following lines can be added just below the existing
+components declarations in the implementation block
+of BlinkToRadioAppC.nc:
+
+
      +implementation {
+  ...
+  components ActiveMessageC;
+  components new AMSenderC(AM_BLINKTORADIO);
+  ...
+}
+
      
+
+These statements indicate that two components, ActiveMessageC
+and AMSenderC, will provide the needed interfaces.  However,
+note the slight difference in their syntax.  ActiveMessageC
+is a singleton component that is defined once for each type of
+hardware platform.  AMSenderC is a generic, parameterized
+component.  The new keyword indicates that a new instance of
+AMSenderC will be created.  The AM_BLINKTORADIO
+parameter indicates the AM type of the AMSenderC.  We can
+extend the enum in the BlinkToRadio.h header file to
+incorporate the value of AM_BLINKTORADIO:
+
+
      +...
+enum {
+  AM_BLINKTORADIO = 6,
+  TIMER_PERIOD_MILLI = 250
+};
+...
+
      
+
+
+
    7. Wire the the interfaces used by the application to the
+components which provide those interfaces. 
+
+
      The following lines
+will wire the used interfaces to the providing components.  These
+lines should be added to the bottom of the implementation
+block of BlinkToRadioAppC.nc:
+
+
      +implementation {
+  ...
+  App.Packet -> AMSenderC;
+  App.AMPacket -> AMSenderC;
+  App.AMSend -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+}
+
      
+
+
+
    
+
+
+
    Receiving a Message over the Radio
    
+
+
    Now that we have an application that is transmitting messages, we
+can add some code to receive and process the messages.  Let's write
+code that, upon receiving a message, sets the LEDs to the three least
+significant bits of the counter in the message.  To make this
+application interesting, we will want to remove the line
+call Leds.set(counter); from the
+Timer0.fired event handler.  Otherwise, both the timer events
+and packet receptions will update the LEDs and the resulting effect
+will be bizarre.
+
+
    If two motes are programmed with our modified application, then
+each will display the other mote's counter value.  If the motes go out
+of radio range, then the LEDs will stop changing.  You can even
+investigate link asymmetry by trying to get one mote's LEDs to keep
+blinking while the other mote's LEDs stop blinking.  This would
+indicate that the link from the non-blinking mote to blinking mote was
+available but that the reverse channel was no longer available.
+
+
      
+
+
    1. Identify the interfaces (and components) that provide access
+to the radio and allow us to manipulate the message_t
+type. 
      We will use the Receive interface to receive
+packets.
+
+
    2. Update the module block in the BlinkToRadioC.nc by adding
+uses statements for the interfaces we need:
+
+
      +module BlinkToRadioC {
+  ...
+  uses interface Receive;
+}
+
      
+
+
    3. Declare any new variables and add any needed initialization
+code. 
       We will not require any new variables to receive and process
+messages from the radio.
+
+
    4. Add any program logic and calls to the used interfaces we
+need for our application. 
       Message reception is an event-driven
+process so we do not need to call cny commands on the
+Receive.
+
+
    5. Implemement any (non-initialization) events specified in the
+interfaces we plan on using. 
      We need to implement the
+Receive.receive event handler:
+
+
      +event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  if (len == sizeof(BlinkToRadioMsg)) {
+    BlinkToRadioMsg* btrmsg = (BlinkToRadioMsg*)payload;
+    call Leds.set(btrpkt->counter);
+  }
+  return msg;
+}
+
      
+
+
      The receive event handler performs some simple operations.
+First, we need to ensure that the length of the message is what is
+expected.  Then, the message payload is cast to a structure pointer of
+type BlinkToRadioMsg* and assigned to a local variable.
+Then, the counter value in the message is used to set the states of
+the three LEDs.
+
+
      Note that we can safely manipulate the counter variable
+outside of an atomic section.  The reason is that receive
+event executes in task context rather than interrupt context (events
+that have the async keyword can execute in interrupt
+context).  Since the TinyOS execution model allows only one task to
+execute at a time, if all accesses to a variable occur in task
+context, then no race conditions will occur for that variable.  Since
+all accesses to counter occur in task context, no critical
+sections are needed when accessing it.
+
+
    6. Update the implementation block of the application
+configuration file by adding a components statement for each component
+used that provides one of the interfaces chosen earlier. 
      The
+following lines can be added just below the existing
+components declarations in the implementation block of
+BlinkToRadioAppsC.nc:
+
+
      +implementation {
+  ...
+  components new AMReceiverC(AM_BLINKTORADIO);
+  ...
+}
+
      
+
+This statement means that a new instance of AMReceiverC will
+be created.  AMReceiver is a generic, parameterized
+component. The new keyword indicates that a new instance of
+AMReceiverC will be created. The AM_BLINKTORADIO
+parameter indicates the AM type of the AMReceiverC and is
+chosen to be the same as that used for the AMSenderC used
+earlier, which ensures that the same AM type is being used for both
+transmissions and receptions.  AM_BLINKTORADIO is defined in
+the BlinkToRadio.h header file.
+
+
    7. Wire the the interfaces used by the application to the
+components which provide those interfaces. 
      Update the wiring by
+insert the following line just before the closing brace of the
+implementation block in BlinkToRadioAppC:
+
+
      +implementation {
+  ...
+  App.Receive -> AMReceiverC;
+}
+
      
+
+
    8. Test your application!
       Testing your application is easy.
+Get two motes.  They can be mica2, micaz, telosa, telosb, or tmote.
+For this exercise, let's assume that the motes are telosb (if not,
+skip past the motelist part and program the mote using whatever the
+appropriate programmer parameters are for your hardware).  Assuming
+you are using a telosb, first open a Cygwin or Linux shell and cd to
+the apps/tutorials/BlinkToRadio directory.  Then, insert the
+first telosb mote into an available USB port on the PC and type
+motelist the at the Cygwin or Linux prompt ($).  You should
+see exactly one mote listed.  For example:
+
+
      +$ motelist
+Reference  CommPort   Description
+---------- ---------- ----------------------------------------
+UCC89MXV   COM17      Telos (Rev B 2004-09-27)
+
      
+
+
      Now, assuming you are in the apps/tutorials/BlinkToRadio
+directory, type make telosb install,1.  You should see a lot
+text scroll by that looks something like:
+
+
      +$ make telosb install,1
+mkdir -p build/telosb
+    compiling BlinkToRadioAppC to a telosb binary
+ncc -o build/telosb/main.exe -Os -O -mdisable-hwmul -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=telosb -fnesc-cfile=build/telosb/app.c -board=   BlinkToRadioAppC.nc -lm 
+    compiled BlinkToRadioAppC to build/telosb/main.exe
+            9040 bytes in ROM
+             246 bytes in RAM
+msp430-objcopy --output-target=ihex build/telosb/main.exe build/telosb/main.ihex
+    writing TOS image
+tos-set-symbols --objcopy msp430-objcopy --objdump msp430-objdump --target ihex build/telosb/main.ihex build/telosb/main.ihex.out-1 TOS_NODE_ID=1 ActiveMessageAddressC$addr=1
+    found mote on COM17 (using bsl,auto)
+    installing telosb binary using bsl
+tos-bsl --telosb -c 16 -r -e -I -p build/telosb/main.ihex.out-1
+MSP430 Bootstrap Loader Version: 1.39-telos-8
+Mass Erase...
+Transmit default password ...
+Invoking BSL...
+Transmit default password ...
+Current bootstrap loader version: 1.61 (Device ID: f16c)
+Changing baudrate to 38400 ...
+Program ...
+9072 bytes programmed.
+Reset device ...
+rm -f build/telosb/main.exe.out-1 build/telosb/main.ihex.out-1 
+
      
+
+
      Now, remove the first telosb from the USB port, insert the
+batteries, and set it aside.  Insert the second telos into the USB
+port and once again type motelist.  You should again see
+something like:
+
+
      +$ motelist
+Reference  CommPort   Description
+---------- ---------- ----------------------------------------
+UC9VN03I   COM14      Telos (Rev B 2004-09-27)
+
      
+
+
      Finally, type make telosb reinstall,2 and you should once
+again see something like the following scroll by:
+
+
      +$ make telosb reinstall,2
+tos-set-symbols --objcopy msp430-objcopy --objdump msp430-objdump --target ihex build/telosb/main.ihex build/telosb/main.ihex.out-2 TOS_NODE_ID=2 ActiveMessageAddressC$addr=2
+    found mote on COM14 (using bsl,auto)
+    installing telosb binary using bsl
+tos-bsl --telosb -c 13 -r -e -I -p build/telosb/main.ihex.out-2
+MSP430 Bootstrap Loader Version: 1.39-telos-8
+Mass Erase...
+Transmit default password ...
+Invoking BSL...
+Transmit default password ...
+Current bootstrap loader version: 1.61 (Device ID: f16c)
+Changing baudrate to 38400 ...
+Program ...
+9072 bytes programmed.
+Reset device ...
+rm -f build/telosb/main.exe.out-2 build/telosb/main.ihex.out-2 
+
      
+
+At this point, both motes should be blinking
+their LEDs. If you press the RESET button on either telosb,
+then the LEDs on the other telosb will pause on whatever was
+being displayed at the moment you pressed RESET.  When you release the
+RESET the button, the paused mote will be reset and then resume
+counting from one.
+
+
    
+
+
+
+
    Conclusions
    
+
+This lesson has introduced radio communications TinyOS 2.x.
+
+
+
    Related Documentation
    
+
+    
+
+
    (3)Programming Hint 15:Always use platform
+independent types when defining message formats. 
+From Phil Levis' 
+TinyOS Programming
+
+
    (4)Programming Hint 16:If you have to perform 
+significant computation on a platform independent type or access it many (hundreds or 
+more) times, then temporarily copying it to a native type can be a good idea.
+From Phil Levis' 
+TinyOS Programming
+
+
+
    
+
    
+
    
+
    < Previous Lesson |  Top  |  Next Lesson  >
+
    
+
+
+
diff --git a/doc/html/tutorial/lesson4.html b/doc/html/tutorial/lesson4.html
new file mode 100644
index 00000000..977b9a1a
--- /dev/null
+++ b/doc/html/tutorial/lesson4.html
@@ -0,0 +1,715 @@
+
+
+
+  Lesson 4: Mote-PC serial communication and SerialForwarder
+  
+
+
+    
    Lesson 4: Mote-PC serial communication and SerialForwarder
    
+    
    Last updated June 27 2006
    
+
+
    To goal of this lesson is to show you how to communicate with a
+mote from a PC. This will allow you to collect data from the network,
+send commands to motes, and monitor network traffic.
    
+
+
    This tutorial presents the Java-based infrastructure for communicating
+with motes. There is also a C-based infrastructure, found in support/sdk/c.
+Please see the documentation found there, and the mig and 
+ncg man pages for more details.
+
+
+
    Packet sources and TestSerial
    
+
+
    The first step is to check that you are able to get your PC to 
+communicate with a mote. Most motes have a serial port or similar
+interface. For example, the mica family can directly control a serial
+port: programming boards basically connect the mote's serial port
+pins to the actual serial port on the board. Telos motes also have
+a serial interface, but it talks to their USB hardware, which
+is similar in functionality but very different in terms of cables and
+connectors.
    
+
+
    The basic abstraction for mote-PC communication is a packet
+source. A packet source is exactly that: a communication medium
+over which an application can receive packets from and send packets to
+a mote. Examples of packet sources include serial ports, TCP sockets,
+and the SerialForwarder tool. Most TinyOS communication tools take
+an optional -comm parameter, which allows you to 
+specify the packet source as a string. For example:
    
+
+
    +$ java net.tinyos.tools.Listen -comm serial@COM1:telos
+
    
+
+
    tells the Listen tool to use the COM1 serial port (on a Windows
+machine) at the correct speed for a telos mote, while
    
+
+
    +$ java net.tinyos.tools.Listen -comm serial@/dev/ttyS0:micaz
+
    
+
+
    tells Listen to use the serial port /dev/ttyS0 (on
+a UNIX machine) at the correct speed for a micaz mote.
    
+
+
    The first step to testing your serial port is to install
+the apps/tests/TestSerial application on a mote. This 
+application sends a packet to the serial port every second,
+and when it receives a packet over the serial port it displays
+the packet's sequence number on the LEDs.
    
+
+
    Once you have installed TestSerial, you need
+to run the corresponding Java application that communicates with
+it over the serial port. This is built when you build the TinyOS
+application. From in the application directory, type:
    
+
+
    +$ java TestSerial
+
    
+
+If you get a message like
+
    +The java class is not found:  TestSerial
+
    
+it means that you either haven't compiled the Java code (try running 
+make platform again) or you don't have . (the
+current directory) in your Java CLASSPATH.
+
+
    Because you haven't specified a packet source, TestSerial
+will fall back to a default, which is a SerialForwarder. Since
+you don't have a SerialForwarder running, TestSerial will
+exit, complaining that it can't connect to one. So let's specify
+the serial port as the source. The syntax for a serial port 
+source is as follows:
    
+
+
    +   serial@<PORT>:<SPEED>
+
    
+
+
    PORT depends on your platform and where you have plugged the mote in.
+For Windows/Cygwin platforms, it is COMN, where N is the port
+number. For Linux/UNIX machines, it is /dev/ttySN for a
+built-in serial port, or one of /dev/ttyUSBN or
+/dev/usb/tts/N for a serial-over-USB port. Additionally
+as we saw in lesson 1, on Linux you will
+typically need to make this serial port world writeable.  As superuser,
+execute the following command:
+
    chmod 666 serialport
    
+
    
+
+
    The SPEED
+can either be a numeric value, or the name of a platform. Specifying a
+platform name tells the serial packet source to use the default speed for
+the platform. Valid platforms are:
    
+
+
    
+
+
+
+
+
+
+
+
+
+
+
+
    PlatformSpeed (baud)
    telos115200
    telosb115200
    tmote115200
    micaz57600
    mica257600
    mica2dot19200
    eyes115200
    intelmote2115200
    
+
    
+
    
+
+
    The Java file support/sdk/java/net/tinyos/packet/BaudRate.java
+determines these mappings. Unlike in TinyOS 1.x, all platforms have a common
+serial packet format. Following the table, these two serial 
+specfications are identical:
    
+
+
    +serial@COM1:micaz
+serial@COM1:57600
+
    
+
+
    If you run TestSerial with the proper PORT and SPEED
+settings, you should see output like this:
    
+
+
    +Sending packet 1
+Received packet sequence number 4
+Sending packet 2
+Received packet sequence number 5
+Sending packet 3
+Received packet sequence number 6
+Sending packet 4
+Received packet sequence number 7
+Received packet sequence number 8
+Sending packet 5
+Received packet sequence number 9
+Sending packet 6
+
    
+
+
    and the mote LEDs will blink.
    
+
+
    Cannot find JNI error
    
+
+
    If you try to run TestSerial and receive an error that Java cannot find
+TOSComm JNI support, this means the Java Native Interface (JNI) files that
+control the serial port haven't been correctly installed. Run the command
+tos-install-jni (on Linux, do this as the superuser). If this
+command does not exist, go to tinyos-2.x/tools/tinyos/java. If
+the directory has a Makefile in it, type make
+and (again, on Linux, as superuser) make
+install.  If the directory does not have a Makefile, go
+to tinyos-2.x/tools and type:
    
+
+
    +$ ./Bootstrap
+$ ./configure
+$ ./make
+$ ./make install
+
    
+
+
    Then type tos-install-jni. This should install
+serial support in your system.
    
+
+
    MOTECOM
    
+
+
    If you do not pass a
+-comm parameter, then tools will check the 
+MOTECOM environment variable for a packet source,
+and if there is no MOTECOM, they default to a
+SerialForwarder. This means that if you're always communicating
+with a mote over your serial port, you can just set MOTECOM
+and no longer have to specify the -comm parameter.
+For example:
    
+
+
    +export MOTECOM=serial@COM1:19200 # mica baud rate
+export MOTECOM=serial@COM1:mica  # mica baud rate, again
+export MOTECOM=serial@COM2:mica2 # the mica2 baud rate, on a different serial port
+export MOTECOM=serial@COM3:57600 # explicit mica2 baud rate
+
    
+
+
    Try setting your MOTECOM variable and running TestSerial without
+a -comm parameter.
    
+
+
+
    BaseStation and net.tinyos.tools.Listen
    
+
+
    BaseStation is a basic TinyOS utility application.
+It acts as a bridge between the serial port and radio network.
+When it receives a packet from the serial port,
+it transmits it on the radio; when it receives a packets over
+the radio, it transmits it to the serial port. Because TinyOS
+has a toolchain for generating and sending packets to a mote
+over a serial port, using a BaseStation allows PC tools to
+communicate directly with mote networks.
    
+
+
    Take one of the two nodes that had BlinkToRadio (from lesson 3) installed
+and install BaseStation on it. If you turn on the node that still
+has BlinkToRadio installed, you should see LED 1 on the BaseStation
+blinking. BaseStation toggles LED 0 whenever it sends a packet 
+to the radio and LED 1 whenever it sends a packet to the 
+serial port. It toggles LED 2 whenever it has to drop a packet:
+this can happen when one of the two receives packets faster
+than the other can send them (e.g., receiving micaZ radio packets
+at 256kbps but sending serial packets at 57.6kbps).
    
+
+
    BaseStation is receiving your BlinkToRadio packets and sending
+them to the serial port, so if it is plugged into a PC we can
+view these packets. The Java tool Listen is a basic packet
+sniffer: it prints out the binary contents of any packet it hears.
+Run Listen, using either MOTECOM or a -comm parameter:
    
+
+
    +$ java net.tinyos.tools.Listen
+
    
+
+
    Listen creates a packet source and just prints out every
+packet it sees. Your output should look something like this:
    
+
+
    +00 FF FF 04 22 06 00 02 00 01
+00 FF FF 04 22 06 00 02 00 02
+00 FF FF 04 22 06 00 02 00 03
+00 FF FF 04 22 06 00 02 00 04
+00 FF FF 04 22 06 00 02 00 05
+00 FF FF 04 22 06 00 02 00 06
+00 FF FF 04 22 06 00 02 00 07
+00 FF FF 04 22 06 00 02 00 08
+00 FF FF 04 22 06 00 02 00 09
+00 FF FF 04 22 06 00 02 00 0A
+00 FF FF 04 22 06 00 02 00 0B
+
    
+
+
+
    Listen is simply printing out the packets that are coming from the
+mote. Each data packet that comes out of the mote contains several fields
+of data. The first byte (00) indicates that this is packet is an AM
+packet. The next fields are the generic Active Message fields, defined in
+tinyos-2.x/tos/serial/Serial.h.  Finally, the remaining fields are
+the data payload of the message, which was defined in BlinkToRadio.h as:
    
+
+
    +typedef nx_struct BlinkToRadioMsg {
+  nx_uint16_t nodeid;
+  nx_uint16_t counter;
+} BlinkToRadioMsg;
+
    
+
+The overall message format for the BlinkToRadioC application is
+therefore (ignoring the first 00 byte): 
    
+
      
+  
    •  Destination address (2 bytes)
      • 
+  
    •  Message length (1 byte)
      • 
+  
    •  Group ID (1 byte)
      • 
+  
    •  Active Message handler type (1 byte)
      • 
+  
    •  Payload (up to 28 bytes):
      • 
+  
        
+    
      •  source mote ID (2 bytes)
        • 
+    
      •  sample counter (2 bytes)
        • 
+  
      
+
    
+So we can interpret the data packet as follows:
+
+  
+    
+      
+      
+      
+      
+      
+      
+    
+      
+      
+      
+      
+      
+      
+    
+  
+
    dest addrmsg lengroupIDhandlerIDsource addrcounter
        
    ff ff04220600 0200 0B
    
+
+
    The source address depends on what mote ID you installed your
+BlinkToRadio application with. The default (if you do not specify
+and ID) is 00 01.
+Note that the data is sent by the mote in big-endian
+format;  for example, 01 02 means 258 (256*1 + 2).
+This format is independent of the endian-ness of the processor,
+because the packet format is an nx_struct, which is
+a network format, that is, big-endian and byte-aligned. Using
+nx_struct (rather than a standard C struct)
+for a message payload ensures that it will work across platforms.
    
+
+
    As you watch the packets scroll by, you should see the counter
+field increase as the BlinkToRadio app increments its counter.
    
+
+
    MIG: generating packet objects
    
+
+
    The Listen program is the most basic way of communicating
+with the mote; it just prints binary packets to the screen. Obviously 
+it is not easy to visualize the sensor data
+using this program. What we'd really like is a better way of retrieving
+and observing data coming from the sensor network. Of course, exactly
+what data to display and how to visualize it can be very application 
+specific. For this reason, TinyOS only 
+has a few applications for visualizing simple
+sensor data (in the next lesson, you'll use the Oscilloscope application), 
+but it provides support for building new visualization or logging systems.
+
     
+
+
    One problem with Listen is that it just dumps binary data: a user has
+to be able to read the bytes and parse them into a given packet format.
+The TinyOS toolchain makes this process easier by providing tools for
+automatically generating message objects from packet descriptions.
+Rather than parse packet formats manually, you can use the mig
+(Message Interface Generator) tool to build a Java, Python, or C interface
+to the message structure. Given a sequence of bytes, the MIG-generated
+code will automatically parse each of the fields in the packet, and it
+provides a set of standard accessors and mutators for printing out 
+received packets or generating new ones.
    
+
+
    The mig tool takes three basic arguments: what programming language
+to generate code for (Java, Python, or C), which file in which to find
+the structure, and the name of the structure. The tool also takes standard
+C options, such as -I for includes and -D for defines. The TestSerial
+application, for example, uses mig so that it can easily create
+and parse the packets over the serial port. If you go back to TestSerial
+and type make clean;make, you should see this:
    
+
+
    +rm -rf build *.class TestSerialMsg.java
+rm -rf _TOSSIMmodule.so TOSSIM.pyc TOSSIM.py
+mkdir -p build/telosb
+mig java -target=telosb -I%T/lib/oski -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o TestSerialMsg.java
+javac *.java
+    compiling TestSerialAppC to a telosb binary
+ncc -o build/telosb/main.exe -Os -O -mdisable-hwmul -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x66 -Wnesc-all -DCC2420_DEF_CHANNEL=19 -target=telosb -fnesc-cfile=build/telosb/app.c -board= -I%T/lib/oski  TestSerialAppC.nc -lm 
+    compiled TestSerialAppC to build/telosb/main.exe
+            6300 bytes in ROM
+             281 bytes in RAM
+msp430-objcopy --output-target=ihex build/telosb/main.exe build/telosb/main.ihex
+    writing TOS image
+
    
+
+
    Before building the TinyOS application, the Makefile has a rule
+for generating TestSerialMsg.java. It then compiles
+TestSerialMsg.java as well as TestSerial.java, and finally
+compiles the TinyOS application. Looking at the Makefile, we can see
+that it has a few more rules than the one for BlinkToRadio:
    
+
+
    +COMPONENT=TestSerialAppC
+BUILD_EXTRA_DEPS += TestSerial.class
+CLEAN_EXTRA = *.class TestSerialMsg.java
+
+TestSerial.class: $(wildcard *.java) TestSerialMsg.java
+        javac *.java
+
+TestSerialMsg.java:
+        mig java -target=null -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o $@
+
+include $(MAKERULES)
+
    
+
+
    The BUILD_EXTRA_DEPS line tells the TinyOS make system
+that the TinyOS application has additional dependencies that must
+be satisfied before it can be built. The Makefile tells the make system
+that TestSerial.class, the Java application that we ran
+to test serial communication. The CLEAN_EXTRA line tells
+the make system extra things that need to be done when a user types
+make clean to clean up.
    
+
+
    The BUILD_EXTRA_DEPS line tells make to compile 
+TestSerial.class before the application; the line
    
+
+
    +TestSerial.class: $(wildcard *.java) TestSerialMsg.java
+        javac *.java
+
    
+
+
    tells it that TestSerial.class depends on all of the .java files 
+in the directory as well as TestSerialMsg.java. Once all of these
+dependencies are resolved, the make system will call javac
+*.java, which creates TestSerial.class. The final line,
    
+
+
    +TestSerialMsg.java:
+        mig java -target=null -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o $@
+
    
+
+
    tells the make system how to create TestSerialMsg.java, the
+Java class representing the packet sent between the mote and PC.
+Because TestSerialMsg.java is a dependency for TestSerial.class,
+make will create it if it is needed. To create TestSerialMsg.java,
+the Makefile invokes the mig tool. Let's step through the parameters
+one by one:
    
+
+
+
+
+
+
+
+
+
+
      mig                  Invoke mig 
      java                          Build a Java class 
      -target=null           	      For the nullplatform
      -java-classname=TestSerialMsg Name the Java class TestSerialMsg 
      TestSerial.h                  The structure is in TestSerial.h 
      TestSerialMsg                 The structure is named TestSerialMsg
      -o $@                         Write the file to $@, which is TestSerialMsg.java
    
+
+
    The null platform is a special platform which is convenient to use
+as the target when using mig. It includes all the standard
+system components, but with dummy do-nothing implementations. Building an
+application for the null platform is useless, but it allows
+mig to extract the layout of packets.
+
+
    Let's build a Java packet object for BlinkToRadio.  Open the Makefile for 
+BlinkToRadio and add a dependency:
    
+
+
    +BUILD_EXTRA_DEPS=BlinkToRadioMsg.class
+
    
+
+
    Then add a step which explains how to compile a .java to a .class:
    
+
+
    +BlinkToRadioMsg.class: BlinkToRadioMsg.java
+        javac BlinkToRadioMsg.java
+
    
+
+
    Note that there must be a tab before javac, and not just spaces.
+Finally, add the line which explains how to create BlinkToRadioMsg.java:
    
+
+
    +BlinkToRadioMsg.java:
+        mig java -target=null -java-classname=BlinkToRadioMsg BlinkToRadio.h BlinkToRadioMsg -o $@
+
    
+
+
    As with javac, there must be a tab (not spaces) before mig. 
+Now, when you type make in BlinkToRadio/, 
+the make system will compile BlinkToRadioMsg.class, a Java class
+that parses a binary packet into message fields that can be accessed
+through methods.
    
+
+
    There is one more step, however. When you compiled, you probably saw this warning:
+
+
    +warning: Cannot determine AM type for BlinkToRadioMsg
+         (Looking for definition of AM_BLINKTORADIOMSG)
+
    
+
+
    One part of the TinyOS communication toolchain requires being able to
+figure out which AM types correspond to what kinds of packets.
+To determine this, for a packet type named X, mig looks for a constant
+of the form AM_X. The warning is because we defined our
+AM type as AM_BLINKTORADIO, but mig wants AM_BLINKTORADIOMSG. Modify
+BlinkToRadio.h so that it defines the latter. You'll also need to
+update BlinkToRadioAppC.nc so that the arguments to AMSenderC
+and AMReceiverC use it. Recompile the application, and you should
+see no warning. Install it on a mote.
    
+
+
    Now that we have a Java message class, we can use it to
+print out the messages we see from the BaseStation. With 
+BaseStation plugged into the serial port and BlinkToRadio
+running on another mote, from the BlinkToRadio directory
+type
    
+
+
    +java net.tinyos.tools.MsgReader BlinkToRadioMsg
+
    
+
+
    Now, when the BaseStation sends a packet to the serial
+port, MsgReader reads it, looks at its AM type, and if
+it matches the AM type of one of the Java message classes
+passed at the command line, it prints out the packet. You
+should see output like this:
    
+
+
    
+
+
    SerialForwarder and other packet sources
    
+
+
    One problem with directly using the serial port is that
+only one PC program can interact with the mote. Additionally,
+it requires you to run the application on the PC which is
+physically connected to the mote. The SerialForwarder tool
+is a simple way to remove both of these limitations.
    
+
+
    Most generally, the SerialForwarder program 
+opens a packet source and lets many applications connect
+to it over a TCP/IP stream in order to use that source. 
+For example, you can run a SerialForwarder whose packet
+source is the serial port; instead of connecting to the
+serial port directly, applications connect to the 
+SerialForwarder, which acts as a proxy to read and write
+packets. Since applications connect to SerialForwarder
+over TCP/IP, applications can connect over the Internet.
    
+
+
    SerialForwarder is the second kind of packet source.
+A SerialForwarder source has this syntax:
    
+
+
    +sf@HOST:PORT
+
    
+
+
    HOST and PORT are optional: they default to localhost (the
+local machine) and 9002. For example,
    
+
+
    +sf@dark.cs.berkeley.edu:1948
+
     
+
+
    will connect to a SerialForwarder running on the computer
+dark.cs.berkeley.edu and port 1948.
    
+
+
    The first step is to run a SerialForwarder; since it
+takes one packet source and exports it as an sf source,
+it takes a packet source parameter just like the other
+tools we've used so far: you can pass a -comm parameter,
+use MOTECOM, or just rely on the default. Close your
+MsgReader application so that it no longer uses
+the serial port, and run a SerialForwarder:
    
+
+
    +java net.tinyos.sf.SerialForwarder
+
    
+
+
    You should see a window like this pop up:
+
+
    
+
    
+
    
+
+
    Since SerialForwarder takes any packet source as its source, you
+can even string SerialForwaders along:
    
+
+
    +java net.tinyos.sf.SerialForwarder -port 9003 -comm sf@localhost:9002
+
    
+
+
    This command opens a second SerialForwarder, whose source is the first
+SerialForwarder. You'll see that the client count of the first one has
+increased to one. It's rare that you'd ever want to do this, but it
+demonstrates that in the message support libraries you can 
+use a variety of packet sources.
    
+
+
    Close the second SerialForwarder (the one listening on port 9003).
+Run MsgReader again, but this time tell it to connect to your
+SerialForwarder:
    
+
+
    +java net.tinyos.tools.MsgReader -comm sf@localhost:9002 BlinkToRadioMsg
+
    
+
+
    You will see the client count increment, and MsgReader will start
+printing out packets.
    
+
+
    Packet Sources
    
+
+
    In addition to serial ports and SerialForwarders, the TinyOS
+messaging library supports a third packet source, motes which
+are connected to an ethernet port through a Crossbow MIB 600 
+ethernet board. This is the full
+set of packet sources:
+
+
    
+
    
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
    SyntaxSource
    serial@PORT:SPEEDSerial ports
    sf@HOST:PORTSerialForwarder, TMote Connect
    network@HOST:PORTMIB 600
    
+
    
+
+
    In the network packet source, the default MIB 600 port
+is 10002. The Moteiv TMote Connect appliance is a SerialForwarder
+packet source.
    
+
+
    The tool side
    
+
+
    Code for the Java messaging toolchain lives in two java packages:
+net.tinyos.message and net.tinyos.packet.
+The packet package contains all of the code for 
+packet sources and their protocols: it is what reads and writes
+bytes. The message package is what turns streams of
+bytes into meaningful messages and provides packet source independent
+classes for communicating with motes.
    
+
+
    The key class for sending and receiving packets is MoteIF.
+It has methods for registering packet listeners (callbacks when a packet
+arrives) and sending packets. The tools MsgReader,
+Listen, and Send are good places to start
+to learn how to get Java applications to communicate with motes.
    
+
+
    There is also support for python and C.
    
+
+
    Sending a packet to the serial port in TinyOS
    
+
+
    Sending an AM packet to the serial port in TinyOS is very
+much like sending it to the radio. A component uses the AMSend
+interface, calls AMSend.send, and handles
+AMSend.sendDone. The serial stack will send
+it over the serial port regardless of the AM address specified.
    
+
+
    The TinyOS serial stack follows the same programming model as the radio
+stack. There is a SerialActiveMessageC for turning
+the stack on and off (mote processors often cannot enter their
+lowest power state while the serial stack is on), and generic
+components for sending and receiving packets. As the serial
+stack is a dedicated link, however, it does not provide a
+snooping interface, and it does not filter based on the destination
+address of the packet. These are the serial communication components
+and their radio analogues:
    
+
+
    
+
+  
+  
+    
+    
+    
+  
+  
+    
+    
+    
+  
+  
+    
+    
+    
+  
+
    SerialRadio
    SerialActiveMessageCActiveMessageC
    SerialAMSenderCAMSenderC
    SerialAMReceiverCAMReceiverC
    
+
    
+
+
    Because serial AM communication has the same interfaces as radio
+AM communication, you can in most situations use them interchangably.
+For example, to make BlinkToRadio send packets to the serial port
+rather than the radio, all you have to do is change the
+BlinkToRadioAppC configuration:
    
+
+
    
+
+ 
+ 
+
+
+
+
    RadioSerial
    
+
    +  components ActiveMessageC;
+  components new AMSenderC(AM_BLINKTORADIOMSG);
+
+  BlinkToRadioC.AMSend -> AMSenderC;
+  BlinkToRadioC.AMControl -> ActiveMessageC;
+
    
+    		
+
    +  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_BLINKTORADIOMSG);
+
+  BlinkToRadioC.AMSend -> SerialAMSenderC;
+  BlinkToRadioC.AMControl -> SerialActiveMessageC;
+
    
+
    
+
    
+
+
    
+
    
+
+
    Now, rather than have BlinkToRadio send packets which a BaseStation
+recieves and forwards to the serial port, the application will
+send them directly to a serial port. Connect a MsgReader to test
+that this is happening. Note that the binary code and data size
+has changed significantly, as nesC has included the serial stack
+rather than the radio stack.
    
+
+
    Related Documentation
    
+
+
      
+
    •  TEP 113: Serial Communication
+
    •  mig man page
+
    •  ncg man page
+
    •  javadoc documentation for the net.tinyos.packet and net.tinyos.message packages
+
    
+
+
    
+
    < Previous Lesson |  Top  |  Next Lesson  >
+
    
+
+
+
+
diff --git a/doc/html/tutorial/lesson5.html b/doc/html/tutorial/lesson5.html
new file mode 100644
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--- /dev/null
+++ b/doc/html/tutorial/lesson5.html
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+
+
+
+  Lesson 5: Sensing
+  
+
+
+
+
+
+
    Lesson 5: Sensing
    
+
    Last Modified: 16 June 2006
    
+
+
     This lesson introduces sensor data acquisition in TinyOS. It demonstrates
+two sensor applications: a simple application called Sense
+that periodically takes sensor readings and displays the values on the LEDs.
+And a more sophisticated application called Oscilloscope where nodes periodically broadcast their
+sensor readings to a basestation node. Using the Mote-PC serial communication
+described in the previous lesson the basestation
+forwards the sensor readings to the PC, where they are visualized with a
+dedicated graphical user interface.  
+
+
    Introduction
    
+
+
     Sensing is an integral part of sensor network applications. In TinyOS 1.x
+sensing was syntactically connected with analog-to-digital converters (ADCs):
+TinyOS 1.x applications such as Oscilloscope or Sense
+used the ADC and ADCControl interfaces to collect
+sensor data. When new platforms appeared with sensors that were read out via
+the serial interface, not only additional interfaces like ADCError
+had to be introduced, but it became clear that equating a sensor with an ADC is
+difficult.
+
+
     Usually sensing involves two tasks: configuring a sensor (and/or the
+hardware module it is attached to, for example an ADC or SPI) and reading the
+sensor data.  The first task is tricky, because a sensing application like, for
+example, Sense is meant to run on any TinyOS platform. How can
+Sense know the configuration details (e.g. input channel, the
+required reference voltage, etc.) of an attached sensor ? It can't, because the
+configuration details of, for example, the light sensor on the tmote
+platform will be different from the eyes platform.  Unless
+Sense knows about all sensors on all platforms it can't perform
+the configuration task, since the interfaces for the configuration of a sensor
+will differ from platform to platform (and potentially from sensor to sensor).
+However, the second task - reading the sensor data - can be solved so that the
+Sense application can collect sensor data even though it is
+agnostic to the platform it is running on. 
+
+
     In TinyOS 2.0 platform independent sensing applications such as
+Oscilloscope, Sense or RadioSenseToLeds
+are not using configuration interfaces like ADCControl anymore;
+instead they are only using the standard data acquisition interfaces
+Read, ReadStream or ReadNow for
+collecting sensor data. All configuration details are hidden from the
+application and this is why you can compile Sense and display
+sensor data on the telosb or the micaz platform, even though the
+actual sensors and their connection to the rest of the system may be completely
+different.
+
+
     This raises questions like the following:
+
+
      
+
+
    •  Since the Sense application component only uses standard
+data acquisition interfaces who defines what sensor it samples ?
+
+
    •  If the Sense application component is not configuring the
+sensor, who is responsible for that ?
+
+
    •  How can an application like Sense display sensor data when it
+does not know the details about sensor configuration ? This includes questions
+like "what is the value range of the sensor data" or "is a temperature reading
+to be interpreted in degree Celsius or Fahrenheit" ?
+
+
    •  Let's assume there are several sensors on a platform: what steps have to
+be done to let the Sense or Oscilloscope application
+display data of a different sensor ?
+
+
     
+
+
     After reading this tutorial you should be able to answer these questions.
+Using the Sense and Oscilloscope application as an
+example, the following sections explain how the data acquisition interfaces are
+used, how the configuration procedure works and, as an example, how
+Sense can be hooked up to a different than the default sensor on
+the telosb platform.
+
+
    The Sense application
    
+
+Sense is a simple sensing demo application. It periodically
+samples the default sensor and displays the bottom bits of the readings on the
+LEDs. The Sense application can be found in
+tinyos-2.x/apps/Sense.  Let's first look at the SenseAppC.nc configuration:
+
+
    +configuration SenseAppC 
+{ 
+} 
+implementation { 
+  components SenseC, MainC, LedsC, new TimerMilliC();
+  components new DemoSensorC() as Sensor;
+
+  SenseC.Boot -> MainC;
+  SenseC.Leds -> LedsC;
+  SenseC.Timer -> TimerMilliC;
+  SenseC.Read -> Sensor;
+}
+
    
+
+The SenseAppC configuration looks similar to the
+BlinkAppC configuration described in lesson
+1 (if you have not done so, read the sections on the Blink application in
+lesson 1). To understand the wiring let's look at the signature of the SenseC.nc module:
+
+
    +module SenseC
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+  }
+} 
+
    
+
+Like the BlinkC.nc module the SenseC.nc module uses
+the interfaces Boot, Leds and
+Timer<TMilli>. Additionally, it uses the
+Read<uint16_t> interface. The 	sequence of actions in the
+SenseC.nc implementation is as follows: SenseC.nc
+uses the Boot interface to start a periodic timer after the system
+has been initialized. Every time the timer expires SenseC.nc is
+signalled a timer event and reads data via the
+Read<uint16_t> interface. Reading data is a split-phase
+operation, it is divided in a command Read.read() and an event
+Read.readDone(). Thus every time the timer expires
+SenseC.nc calls Read.read() and waits for the
+Read.readDone() event. When data is signalled in the
+Read.readDone() event SenseC.nc displays it on the
+leds: the least significant bit is displayed on LED 0 (0 = off, 1 = on), the
+second least significant bit is displayed on LED 1 and so on. 
     The Read interface (in
+tinyos-2.x/tos/interfaces) can be used to read a single piece of
+sensor data, let's look at it in detail:
+
+
    +interface Read<val_t> {
+  /**
+   * Initiates a read of the value.
+   *
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read();
+
+  /**
+   * Signals the completion of the read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val the value that has been read
+   */
+  event void readDone( error_t result, val_t val );
+}
+
    
+
+If you are not familiar with generic interfaces you will wonder what the
+meaning of <val_t> (in the first line) is and why the
+signature of SenseC.nc is using Read<uint16_t>.
+What you see above is a generic interface definition, because the
+Read interface takes a type parameter. Generic interfaces are
+explained in the nesC Language Reference Manual (version 1.2 and above).
+Here it is enough to know that generic interfaces have at least one type
+parameter and two components can be wired together only if they provide/use the
+interface with the same types (note that the readDone event passes
+a parameter of the <val_t> parameter, which is a placeholder
+for the actual data type). This means that since SenseC.nc is
+using the uint16_t variant of the Read interface, it
+can only be wired to a component that provides the
+Read<uint16_t> interface and thus SenseC.nc
+expects to read 16 bit unsigned integer sensor data.  If you tried to wire
+SenseC.nc to a component that provides, for example, a
+Read<uint8_t> interface you would get an error from the
+nesC compiler. 
+
+
    Recall that the wiring is defined in the SenseAppC.nc
+configuration. Let's again take a look, which component SenseC.nc
+is wired to with the Read<uint16_t> interface in the
+SenseAppC configuration. The interesting lines are
+
+
    +  components new DemoSensorC() as Sensor;
+
    
+and
+
    +  SenseC.Read -> Sensor;
+
    
+
+This means that the generic DemoSensorC component provides
+the Read<uint16_t> interface to SenseC.nc (a
+generic component is a component that can be instantiated more than once
+and can take constant and type arguments; each instantiation is a
+different component).
+
+
     It is important to understand that the SenseC.nc module has no
+way of telling which sensor it is connected to; in fact it cannot even tell
+whether it is getting data from a sensor at all, because it can be wired to any
+component that provides a Read<uint16_t> interface. On a
+platform without any built-in sensors (like micaz) and no attached
+sensorboard the DemoSensorC component could simply return constant
+values. The last sentence hints that the DemoSensorC component is
+different for every platform: therefore you will not find
+DemoSensorC.nc in the TinyOS libraries. Instead
+DemoSensorC.nc has to be written for every platform, because, for
+example, on the telosb platform DemoSensorC needs to be
+implemented differently than on the the micaz platform. This is the
+answer to the first question asked in the introduction: the platform dependent
+DemoSensorC component defines which sensor the Sense
+or Oscilloscope application is sampling and every platform that
+wants to run sensing applications such as Oscilloscope,
+Sense or RadioSenseToLeds has to provide its own
+version of DemoSensorC. Additionally, sensor boards may come
+with their own version of DemoSensorC (e.g., the 
+basicsb sensorboard for the mica-family of motes is defined to
+be that board's light sensor).
+
+
    The DemoSensorC component
    
+
+
     Let's take a closer look at the DemoSensorC component. Every
+DemoSensorC component has the following signature:
+
+
    +generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+
    
+
+In its implementation section, however, DemoSensorC may differ
+from platform to platform. For example, on the telosb platform
+DemoSensorC instantiates a component called VoltageC,
+which reads data from the internal voltage sensor. Because the micaz
+doesn't have any built-in sensors, on the micaz platform
+DemoSensorC instantiates a component called
+ConstantSensorC, which returns a constant. Thus
+DemoSensorC is a means of indirecting sensor data acquisition from
+a platform-specific sensor component (like VoltageC) to
+platform-independent applications like Sense or
+Oscilloscope. Usually the configuration of a sensor is done in the
+component that DemoSensorC instantiates.
+
+
     How can Sense be changed to sample another than the platform's
+default sensor? Usually this requires changing only a single line of code in
+DemoSensorC; for example, if you wanted to replace the
+VoltageC component on telosb by the constant sensor
+component ConstantSensorC you could change (in
+DemoSensorC)
+
+
    +components new VoltageC() as DemoSensor;
+
    
+to something like
+
    +components new ConstantSensorC(uint16_t, 0xbeef) as DemoSensor;
+
    
+
+Which sensors are available depends on the platform. Sensor components are
+usually located in the respective platform subdirectory
+(tinyos-2.x/tos/platforms), in the respective sensorboard
+subdirectory (tinyos-2.x/tos/sensorboards) or, in case of
+microprocessor-internal sensors, in the respective chips subdirectory
+(tinyos-2.x/tos/chips). ConstantSensorC can be found
+in tinyos-2.x/tos/system.
+
+
+
    Running the Sense application
    
+
+To compile the Sense application, go to the
+apps/Sense directory and depending on which hardware you have,
+type e.g. make telosb install.  If you get errors like the
+following
+
+
    +SenseAppC.nc:50: component DemoSensorC not found
+SenseAppC.nc:50: component `DemoSensorC' is not generic
+SenseAppC.nc:55: no match
+
    
+
+your platform has not implemented the DemoSensorC component. For a
+quick solution you can copy DemoSensorC.nc from
+tinyos-2.x/tos/platforms/micaz to your platform directory; then
+you will see constant "sensor" readings (a good starting point on how to create
+sensor components is probably TEP 101 and TEP 114). 
+
+
    If you have a mica-family mote and a "basic" (mda100) sensor board, you
+can get a more interesting test by compiling with
+
    +SENSORBOARD=basicsb make platform install
+
    
+to run Sense using the mda100's light sensor.
+
+
     Once you have installed the application the three most significant bits of
+the sensor readings are displayed on the node's LEDs (0 = off, 1 = on). If your
+DemoSensorC represents a sensor whose readings are fluctuating
+greatly you may see the LEDs toggle, otherwise Sense is not so
+impressive.  Let's have a look at a more interesting application:
+Oscilloscope.
+
+
    The Oscilloscope application
    
+
+Oscilloscope is an application that let's you visualize sensor
+readings on the PC. Every node that has Oscilloscope installed
+periodically samples the default sensor (via
+DemoSensorC) and broadcasts a message with 10 accumulated
+readings over the radio. A node running the BaseStation
+application will forward these messages to the PC using the serial
+communication. To run Oscilloscope you therefore need at least two
+nodes: one node attached to your PC running the BaseStation
+application (BaseStation can be found at
+tinyos-2.x/apps/BaseStation and was introduced in the previous lesson) and one or more nodes running the
+Oscilloscope application. 
+
+
     Let's take a look at the OscilloscopeAppC.nc
+configuration:
+
+
    +configuration OscilloscopeAppC 
+{ 
+}
+implementation
+{
+  components OscilloscopeC, MainC, ActiveMessageC, LedsC,
+    new TimerMilliC(), new DemoSensorC() as Sensor,
+    new AMSenderC(AM_OSCILLOSCOPE), new AMReceiverC(AM_OSCILLOSCOPE);
+
+  OscilloscopeC.Boot -> MainC;
+  OscilloscopeC.RadioControl -> ActiveMessageC;
+  OscilloscopeC.AMSend -> AMSenderC;
+  OscilloscopeC.Receive -> AMReceiverC;
+  OscilloscopeC.Timer -> TimerMilliC;
+  OscilloscopeC.Read -> Sensor;
+  OscilloscopeC.Leds -> LedsC;
+}
+
    
+
+The actual implementation of the application is in OscilloscopeC.nc.
+This is the signature of OscilloscopeC.nc:
+
+
    +module OscilloscopeC
+{
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface AMSend;
+    interface Receive;
+    interface Timer;
+    interface Read;
+    interface Leds;
+  }
+}
+
    
+
+Oscilloscope is a combination of different building blocks
+introduced in previous parts of the tutorial. Like Sense Oscilloscope uses
+DemoSensorC and a timer to periodically sample the default sensor
+of a platform. When it has gathered 10 sensor readings
+OscilloscopeC puts them into a message and broadcasts the message
+via the AMSend interface.  OscilloscopeC uses the
+Receive interface for synchronization purposes (see below) and the
+RadioControl interface, which is a actually a
+SplitControl interface, to switch the radio on. If you want to
+know more about mote-mote radio communication read lesson 3.
+
+
    Running the Oscilloscope application
    
+
+To install the Oscilloscope application go to
+tinyos-2.x/apps/Oscilloscope and depending on which hardware you
+have, type e.g. make telosb install,1. Note the ",1"
+after the install option, which assigns ID 1 to the node.
+Assigning IDs to nodes is helpful to differentiate them later on in the GUI, so
+make sure you assign different IDs to all nodes on which
+Oscilloscope is installed (e.g. install Oscilloscope
+on a second node with make telosb install,2 and so on). A node
+running Oscilloscope will togle its second LED for every message
+it has sent and it will toggle its third LED when it has received an
+Oscilloscope message from another node: incoming messages are used
+for sequence number synchronization to let nodes catch up when they are
+switched on later than the others; they are also used for changing the sample
+rate that defines how often sensor values are read. In case of a problem with
+the radio connection the first LED will toggle. 
+
+
     Install BaseStation on another node and connect it to your PC.
+As usual, on the BaseStation node you should see the second LED
+toggle for every message bridged from radio to serial.
+
+
+
    Running the Java GUI
    
+
+To visualize the sensor readings on your PC first go to
+tinyos-2.x/apps/Oscilloscope/java and type make. This
+compiles the necessary message classes and the Oscilloscope Java
+GUI. Now start a SerialForwarder and make sure it connects to the node on which
+you have installed the BaseStation application (how this is done
+is explained in the previous lesson). In case you
+have problems with the Java compilation or the serial connection work through
+the previous lesson. 
+
+
    When you have at least one node running Oscilloscope on it you
+should see SerialForwarder increasing the number of packets it has read from
+the BaseStation (once every 2.5 seconds, at least). Now start the
+GUI by typing ./run (in
+tinyos-2.x/apps/Oscilloscope/java). You should see a window
+similar to the one below:
+
+
    
+
    
+  
+
    
+
    
+
+Each node is represented by a graph of different color (you can change the
+color by clicking on it in the mote table). The x-axis is the packet counter
+number and the y-axis is the sensor reading. To change the sample rate, edit
+the number in the "sample rate" input box. When you press enter, a message
+containing the new rate is created and broadcast via the
+BaseStation node to all nodes in the network. You can clear all
+received data on the graphical display by clicking on the "clear data" button.
+
+
     The Oscilloscope (or Sense) application displays
+the raw data as signalled by the Read.readDone() event. They do
+not perform semantic processing and cannot decide questions like "is a reading
+to be interpreted in degree Celsius or Fahrenheit". This decision is forwarded
+to the user and therefore the GUI let's you adapt the visible portion of the
+y-axis to a plausible range (at the bottom right).
+
+
    
+
+
    Related Documentation
    
+
+
    
+
+
+
+
    
+
    
+
    
+
    < Previous Lesson |  Top  |  Next Lesson  >
+
    
+
+
+
diff --git a/doc/html/tutorial/lesson6.html b/doc/html/tutorial/lesson6.html
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+
+
+
+  TinyOS Tutorial Lesson 6: TinyOS Boot and System Initialization
+  
+
+
+
+
    Lesson 6: TinyOS Boot and System Initialization
    
+
    Last updated 18 May 2006
    
+
+One of the frequently asked questions regarding TinyOS is, "Where is
+main()?".  In previous lessons, we deferred detailed discussion of the
+TinyOS boot sequence in favor of grasping the general idea. We will
+now revisit the boot sequence indetail. Understanding how TinyOS
+initializes will help solidify understanding of the execution model
+and answer the question "Where is main()?".
+ 
+The TinyOS boot sequence is comprised of three steps:
+
       
+
    •  Scheduler initialization
+
    •  Component initialization
+
    •  Signal that the boot process has completed 
+
    
+
+
    Scheduler initialization. The scheduler is initialized
+before any components are initialized. If the scheduler were not
+initialized before the components, component initialization
+routines would not be able to post tasks. While not all components
+require tasks to be posted, this gives the flexibility required for those compoenents that do. 
+
+
    The Scheduler interface defines a scheduling
+component's signature in
+tos/interfaces/Scheduler.nc.  TinyOS developers can
+define their own scheduler to meet their application's needs.
     An
+implementation of the Scheduler interface is provided in
+tos/system/TinySchedulerC.nc.
    
+
+
    Component initialization. After the scheduler is initialized, 
+components are initialized. The Init interface implements only
+the single command init(). 
    
+
+
    
+tos/interfaces/Init.nc:
+
    +
+interface Init {
+  command error_t init();
+}
+
    
+
+
    To provide the initialization flexibility required by sensor
+network components, the TinyOS's boot sequence breaks down the component
+initialization into a platform initialization phase (run first) and a software 
+initialization phase. This is accomplished by making the TinyOS component that
+executes the boot sequence use two Init interfaces:
+one called PlatformInit and one called SoftwareInit:
+
+
    
+tos/system/RealMainP.nc:
+
    +module RealMainP {
+  provides interface Boot;
+  uses interface Scheduler;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  // implementation covered below
+}
+
    
+
+
    The platform initialization phase is the responsability of the platform
+implementer. Thus, PlatformInit is wired to the
+platform-specific initialization component, PlatformC. No
+other component should be wired to PlatformInit.  Any
+component that requires initialization can implement the Init
+interface and wire itself to MainC's SoftwareInit
+interface:
+
+
    
+tos/system/MainC.nc:
+
    +configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+
+  RealMainP.Scheduler -> TinySchedulerC;
+  RealMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = RealMainP;
+}
+
    
+
+A common issue in initialization code is dependencies between different
+parts of the system. These are handled in three ways in TinyOS:
+
      
+
    •  Hardware-specific initialization issues are handled directly by
+each platform's PlatformC component.
+
+
    •  System services (e.g., the timer, the radio) are typically written to
+be independently initialisable. For instance, a radio that uses a timer
+does not setup the timer at radio initialisation time, rather it defers
+that action until the radio is started. In other words, initialisation
+is used to setup software state, and hardware state wholly owned by
+the service.
+
+
    •  When a service is split into several components, the Init
+interface for one of these components may well call Init
+(and other) interfaces of the other components forming the service.
+
    
+
+
    Signal that the boot process has completed. Once all
+initialization has completed, MainC's
+Boot.booted() event is signaled. Components are now free to
+call start() and other commands on any components they are
+using. Recall that in the Blink application, the timers were
+started from the booted() event. This booted
+event is TinyOS's analogue of main in a Unix application.
+
+
    But if you're curious, main is actually found inside
+RealMainP. It executes the steps outlined above, i.e.,
+initialises the scheduler, calls the initialization interfaces, signals the
+booted event and then starts the main TinyOS scheduling loop:
+
+
    
+tos/system/RealMainP.nc:
+
    +module RealMainP {
+  // signature
+}
+implementation {
+  int main() __attribute__ ((C, spontaneous)) {
+    atomic 
+      {    
+	call Scheduler.init(); 
+    
+	call PlatformInit.init();    
+	while (call Scheduler.runNextTask());
+
+	call SoftwareInit.init(); 
+	while (call Scheduler.runNextTask());
+      }
+
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    signal Boot.booted();
+
+    /* Spin in the Scheduler */       
+    call Scheduler.taskLoop();
+  }
+
+
    
+
+
    
+
+
    Related Documentation
    
+
+
+
+
    Programming Hint 8: In the top-level 
+configuration of a software abstraction, auto-wire Init to MainC. This removes the
+burden of wiring Init from the programmer, which removes unnecessary work from the
+boot sequence and removes the possibility of bugs from forgetting to wire.
+From Phil Levis' 
+TinyOS Programming
+
+
+
    
+
    
+
    
+
    < Previous Lesson |  Top  |  Next Lesson  >
+
    
+
+
+
diff --git a/doc/html/tutorial/lesson8.html b/doc/html/tutorial/lesson8.html
new file mode 100644
index 00000000..b964947b
--- /dev/null
+++ b/doc/html/tutorial/lesson8.html
@@ -0,0 +1,28 @@
+
+
+
+
+  TinyOS Tutorial Lesson 8: Concurrency in TinyOS
+  
+
+
+
+
    Lesson 2: 
    
+
    Last updated 29 January 2006
    
+
+
    Commands and events that are executed as part
+of a hardware event handler must be declared with the async
+keyword (more about the async keyword in Lesson 8). 
    
+
+
    Because tasks and hardware event handlers may be preempted by other
+asynchronous code, nesC programs are susceptible to certain race
+conditions. Races are avoided either by accessing shared data
+exclusively  within tasks, or by having all accesses within atomic
+statements. The nesC compiler reports potential data races to the
+programmer at compile-time. It is possible the compiler may report a
+false positive. In this case a variable can be declared with the norace
+keyword. The norace keyword should be used with extreme caution. 
    
+
+
    Please see the nesC Language
+Reference Manual for more information on programming in nesC. 
    
+ 
\ No newline at end of file
diff --git a/doc/html/tutorial/outline.txt b/doc/html/tutorial/outline.txt
new file mode 100644
index 00000000..d7a4a553
--- /dev/null
+++ b/doc/html/tutorial/outline.txt
@@ -0,0 +1,70 @@
+On Mon, 2005-12-05 at 12:18 -0700, Kristin Wright wrote:
+> On 11/30/05, Philip Levis  wrote:
+> > I am on the hook for writing a short book on nesC programming for
+> > xbow, focusing on wiring. I think I could come up with a basic
+> > tutorial outline, but can't do more than that.
+> 
+> Is the tutorial outline something you can commit to? If so, what
+> timeframe are you thinking?
+> -kw
+
+but it's a high level one. Each bullet point should have an exercise to
+demonstate it. This is pretty exhaustive. We could do something
+simpler/shorter. I'm sure I must have missed something, so everyone feel
+free to chip in.
+
+Tutorial I: Interfaces and Configurations (Kristin)
+  - Components interact through well-defined interfaces.
+  - Component signatures, provides and uses
+  - Interface descriptions
+  - Wiring two components together
+  - Exporting a wiring
+
+Tutorial II: Modules (Kristin)
+  - Executable logic.
+  - Events vs. commands.
+  - Defaults.
+  - Storage and ownership.
+   
+Tutorial III: An Application (Kristin)
+  - Boot.booted()
+  - Init()
+  - Twiddling the LEDs.
+  - Starting services/components
+  - Timers.
+  - Tasks to defer processing.
+
+Tutorial IV: Acquiring Data (Kristin)
+  - Sampling a sensor.
+  - Periodically sampling the sensors and twiddling the LEDs.
+  - Handling error conditions.
+
+Tutorial V: Communication (Prabal)
+  - Message buffers.
+  - Sending a buffer.
+  - Receiving a buffer: swapping vs. copying.
+  - Making a send queue.
+  - Getting packet metadata (Packet, AMPacket interfaces).
+
+Tutorial VI: Storage (Kristin)
+  - Storing small things: nodeID.
+  - Storing a big chunk of things: data from another node (generated,
+e.g., with Random), reliable protocol.xa
+  - Storing a stream: logging.
+
+Tutorial VII: Power management (Vlado)
+  - Turning components on/off.
+  - Resource managers and power policies.
+
+Tutorial VIII: Concurrency (Kristin)
+  - Tasks, revisited.
+  - Async code vs. sync code (until now all has been sync)
+  - Scheduler.
+
+Tutorial IX: Platforms (PhilB)
+  - chips vs. platforms
+  - Telescoping abstractions
+  - Sensorboards
+
+Tutorial X: TOSSIM (PhilL)
+
diff --git a/doc/html/tutorial/programmers.html b/doc/html/tutorial/programmers.html
new file mode 100644
index 00000000..3817782c
--- /dev/null
+++ b/doc/html/tutorial/programmers.html
@@ -0,0 +1,110 @@
+
+
+    Mica-family Programming
+  
+
+
+
+
+
+
    Device Programming
    
+
    Last updated 03 Sep 2003
    
+
+    
    
+    The TinyOS development environment includes features to ease programming 
+    devices. The mica family of motes has a diverse set of boards
+    which connect a mote to a PC for programming.  TinyOS 2.0 supports
+    the following mica family programming boards
+    
    
+
+
+
+    
    
+      
+        
+        
+          
+          
+          
+        
+        
+          
+          
+          
+        
+        
+           
+          
+          
+        
+        
+          
+          
+          
+      
+     
    NamePicture
    Parallel port programming board (e.g., Crossbow MIB500)
    Serial port programming board (e.g., Crossbow MIB510)
    USB serial programming board (e.g., Crossbow MIB520)
    Ethernet programming board (e.g., Crossbow MIB600) 
    
+    
    
+    
    
+    The second key feature permits programming each device with a unique address 
+    attribute without having to compile the application each time. 
    
+
+    
    
+    This document describes how to use these features in TinyOS 2.0.
    
+
+    
    
+
+
    Using Programmers
    
+
+    
    
+    The standard programming software used in TinyOS is the
+    µ In-System Programmer or 'uisp'.  This 
+    program, which comes as a part of the TinyOS release, takes various 
+    arguments according to the programmer hardware and the particular 
+    programming action desired (erase, verify, program, etc..).  To 
+    simplify using this tool, the TinyOS environment invokes uisp for you with 
+    the correct arguments whenever you issue an 'install' or 'reinstall'.  
+    You only need specify the type of device you are using and how to 
+    communicate with it.  This is done using environment variables.
    
+
+    
    MIB500/Parallel Port Programmers
    
+
+    
    
+
+    
    
+    This is the default programmer device.  No additional command line 
+    parameters need to be specified when using this programmer.
    
+
+    
    
+
+    
    Serial Programming (MIB510 and MIB520)
    
+
+    
    
+
+    
    
+    Add mib510,<dev>  where <dev> is the name of the serial port where the device is attached (i.e. /dev/ttyS0).
    
+
+    
    
+    example: 
    
+make micaz install mib510,/dev/ttyS1
    
+
+    
    
+
+ 
    Ethernet Programming (MIB600)
    
+    
    
+
+    
    Add eprb,<addr> where <addr> is the IP address of the ethernet device (e.g., 10.0.0.12).
    
+
+    
    
+    example:
    
+make micaz install eprb,192.168.2.23
    
+
+    
    
+
+    
    
+     
    
+
+
+
+
    
+ Tutorial Index 
+
diff --git a/doc/html/tutorial/usc-topologies.html b/doc/html/tutorial/usc-topologies.html
new file mode 100644
index 00000000..715d77ad
--- /dev/null
+++ b/doc/html/tutorial/usc-topologies.html
@@ -0,0 +1,426 @@
+
+
+
+   
+   
+   
+   Building a Network Topology for TOSSIM
+
+
+
    Building a Network Topology for TOSSIM
    
+
    Marco Zuniga, <mzunigaz@gmail.com>
    
+
+
     
+
+
+
+
+
    Introduction
    
+
+
    The specific behavior of the wireless link depends on two 
+elements: the radio, and the environment (channel) where they are placed.
+Hence, in order to obtain better simulations, the characteristics of
+both elements should be provided. The model presented in this tutorial is part of a more 
+general link-layer model proposed by the 
+ANRG group at USC, 
+and it is valid for static and low-dynamic environments. 
+
+
     
+
+
+
+
+
    Configuration File
    
+
+
    The configuration file contains various channel, radio and topology 
+parameters that can be modified. Any line starting with the percentage 
+symbol (%) is treated as a comment. The format of the configuration file is as follows: 
+
+
    
+
+  
+    
+		%%%%%%%%%%%%%%%%%%%%%%
+		
    % Channel Parameters 			     
+		
    %%%%%%%%%%%%%%%%%%%%%%
+		
    
+		
    PATH_LOSS_EXPONENT = 3.0;
+		
    SHADOWING_STANDARD_DEVIATION = 4.0;
+		
    D0 = 1.0;
+		
    PL_D0 = 55.0;
+		
    
+		
    %%%%%%%%%%%%%%%%%%%%%%
+		
    % Radio Parameters 			     
+		
    %%%%%%%%%%%%%%%%%%%%%%
+		
    
+		
    NOISE_FLOOR = -105.0;
+		
    
+		
    S11 = 3.7;
+		
    S12 = -3.3;
+		
    S21 = -3.3;
+		
    S22 = 6.0;
+		
    
+		
    WHITE_GAUSSIAN_NOISE = 4;
+		
    
+		
    %%%%%%%%%%%%%%%%%%%%%%
+		
    % Topology Parameters 			     
+		
    %%%%%%%%%%%%%%%%%%%%%%
+		
    % available topologies :
+		
    %	- GRID		(1)
+		
    %	- UNIFORM	(2)
+		
    %	- RANDOM	(3)
+		
    %	- FILE		(4)
+		
    
+		
    TOPOLOGY = 1;
+		
    GRID_UNIT = 1.0;
+		
    TOPOLOGY_FILE = topologyFile;
+		
    
+		
    NUMBER_OF_NODES = 9;
+		
    
+		
    TERRAIN_DIMENSIONS_X = 20.0;
+		
    TERRAIN_DIMENSIONS_Y = 20.0;
+    
+  
+
    
+
+
     A sample file (configurationFile) is provided as the default configuration file. 
+The next sections explain the different channel, radio and deployment parameters.
+
+
     
+
+
+
+
+
    
+Channel Parameters
    
+
+
    When a radio signal propagates it may be diffracted, reflected and scattered. These 
+events have two important consequences on 
+the signal strength. First, the signal strength decays exponentially with respect to 
+distance. And second, for a given distance the signal strength is random and 
+log-normally distributed.
+
+
    The channel is modeled using the log-normal path loss model. This model has the 
+following parameters:
+
    
+
  • 
+PATH_LOSS_EXPONENT : rate at which signal decays.
+
  • 
+SHADOWING_STANDARD_DEVIATION : randomness of received signal due to multipath.
+
  • 
+D0 : reference distance (usually 1 meter). D0 also determines the minimum distance
+allowed between any pair of nodes.
+
  • 
+PL_D0 : power decay in dB for the reference distance D0. 
+
+
+
    
+Channel parameters for some scenarios with D0 = 1m are presented in the following table:
+
+
    
+
    
+
+  
+    
+	
+    
+  
+
    PL_D0 (dB) PATH_LOSS_EXPONENTSHADOWING_STANDARD_DEVIATION (dB)
    Football Field 55.4  4.7  3.2 
    Aisle of Building 52.1  3.3  5.5 
    
+
    
+
+
     In 
+"Near-ground wideband channel measurements", the authors present channel parameters for several scenarios.
+Usually, the PATH_LOSS_EXPONENT and the SHADOWING_STANDARD_DEVIATION take values between 2 and 6 for scenarios
+with LOS (line-of-sight) conditions.
+
+
     
+
+
+
+
+
    
+Radio Parameters
    
+
+
    Another important effect to be considered is link asymmetry. Link
+asymmetry have a static and a dynamic component. The dynamic component
+is due to thermal noise, which leads to a dynamic variation of a 
+node's noise floor readings at runtime.  This dynamic variation 
+is usually modeled as a gaussian random variable with mean 0 and 
+a standard deviation given by the parameter:
+
+
    
+
  • 
+WHITE_GAUSSIAN_NOISE : standard deviation of additive white gaussian noise.
+
+
    The static component is caused by hardware variance (variance in the 
+output power and baseline noise floor across nodes). 
+When a user sets the output power of a node to a value P, the actual output 
+power can be below or above P; similarly, the baseline noise floor of the radio
+is not fixed and has some variance around its mean value. Also, there
+might be some correlation between the variances of the output power and noise 
+floor, for example, mica2 motes show that nodes with an output power higher than
+the set value ("better transmitters") usually have a lower noise floor ("better
+receivers"), and viceversa.
+
+
    Hardware variance can be modeled as a multidimensional Gaussian process, where
+a covariance matrix captures the variances of the output power, the noise floor,
+and their correlation. In this process, the baseline (average) noise floor in dBm is given by:
+
+
    
+
  • 
+NOISE_FLOOR : radio noise floor in dBm.
+
+
+
    And the variances of the output power and noise floor on a per node basis are given by
+the covariance matrix S = [S11 S12; S21 S22] :
+
+
    
+
  • 
+S11 : variance of noise floor
+
  • 
+S12 : covariance between noise floor and output power (captures correlation)
+
  • 
+S21 : equal to S12
+
  • 
+S22 : variance of output power
+
+
    
+All the variances (elements of S) should be in dB. The values of the covariance 
+matrix are hardware dependent (default values are given for MICA2 motes), but 
+in general the smaller S11 and S22, the lower the impact on link asymmetry. 
+S12 and S21 are usually negative, and it is important to recall the properties
+of a covariance matrix (linear algebra), where the absolute values of S21 
+(and S12) should be less than sqrt(S11xS22), 
+i.e. |S21| < sqrt(S11xS22). In case symmetric links are desired, the user 
+should set S11 and S22 to 0.
+
+
    
+Finally, it is important to mention that hardware measurements are required to obtain the
+radio parameters described above. 
+However, the user can modify some of these parameters to study their impact on different protocols. As 
+a general guideline we suggest not to increase the hardware variance too much (mica2 motes have been 
+observed to have the highest levels of asymmetry). The next table presents some suggested 
+values for radio parameters:
+
+
    
+
    
+
+  
+    
+    
+    
+														
    [0 x; x 0] for symmetric links (x represents any number)
+    
+  
+
    SUGGESTED VALUES
    NOISE_FLOOR between -110 dBm and -104 dBm 
    S = [S11 S12; S21 S22] [3.7 -3.3; -3.3 6.0] for high asymmetry levels
+														
    [0.9 -0.7; -0.7 1.2] for low asymmetry levels
    WHITE_GAUSSIAN_NOISE between 4 dB and 5 dB 
    
+
    
+
+
     
+
+
+
+
+
    
+Topology Parameters
    
+
+
    
+The TOPOLOGY parameter allows to test different deployments (described below). Each 
+one of these deployments have a number identifying it, which should be assigned to the
+variable TOPOLOGY. The available type of deployments are:
+
+
    
+
  • 
+GRID (1): nodes are placed on a square grid topology. The number of nodes has to be a square of an integer.
+
  •   
+UNIFORM (2): based on the number of nodes (square of an integer), the physical 
+terrain is divided into a number of cells. Within each cell, a node is placed randomly. This topology
+can be observed as a GRID with variations.
+
  • 
+RANDOM (3): nodes are placed randomly within the physical terrain.
+
  •  
+FILE (4): position of nodes is read from a user-defined topology file. 
+
+
     For example, if a RANDOM deployment is desired, the parameter TOPOLOGY should be set to 3 
+(TOPOLOGY = 3;). When a user desires to specify the topology, TOPOLOGY should be set to 4, and
+the format of the deployment file provided by the user should be:
+
+
    
+
+nodeid Xcoordinate Ycoordinate
+
+
+
    
+Where the X and Y coordinates should be in meters, and the nodeid should start with 0.
+A topology file looks like:
+
+
    
+
    
+
+  
+    
+	0  1.0 2.7
+	
     1  3.0 5.6
+	
     2  5.2 7.8
+    
+  
+
    
+
    
+
+
+
    
+A sample topology file is provided in topologyFile. Other topology parameters are:
+
+
    
+
  • 
+NUMBER_OF_NODES : for grid and uniform topologies should be a perfect square, 
+and it is not required when the topology is given by user (TOPOLOGY = 4;).
+
  • 
+TERRAIN_DIMENSIONS_X : required only for uniform and random topologies.
+
  • 
+TERRAIN_DIMENSIONS_Y : required only for uniform and random topologies. Also, for uniform topologies 
+TERRAIN_DIMENSIONS_Y should be equal to TERRAIN_DIMENSIONS_X.
+
  • 
+GRID_UNIT : internode distance of the grid, required only for grid topologies.
+
  • 
+TOPOLOGY_FILE : name of topology file provided by user, required only for FILE topologies (TOPOLOGY = 4;).
+
+
    
+Please recall that no pair of nodes can be closer than D0. Hence,
+GRID_UNIT should be greater equal than D0 when GRID topologies are chosen (TOPOLOGY = 1;)
+, and the TOPOLOGY_FILE provided 
+by the user should not violate this constraint either. For UNIFORM and RANDOM
+topologies the node density (NUMBER_OF_NODES / area) is not allowed 
+to be higher than 0.5 nodes / D0^2.
+
+
     
+
+
+
+
+
    
+Sample Configuration Files
    
+
+Now, we provide some sample configuration files.
+
+
    Example 1: A chain topology defined by the user on file chainTopo, placed in
+the aisle of a building (channel parameters), with nodes having an average noise floor
+of -106 dBm, a standard deviation of 4.5 dB for the white gaussian noise and a high level
+of asymmetry. The resulting configuration file is:
+
+
    
+
+  
+    
+		PATH_LOSS_EXPONENT = 3.3;
+		
    SHADOWING_STANDARD_DEVIATION = 5.5;
+		
    D0 = 1.0;
+		
    PL_D0 = 52.1;
+		
    
+		
    NOISE_FLOOR = -106.0;
+		
    S11 = 3.7;
+		
    S12 = -3.3;
+		
    S21 = -3.3;
+		
    S22 = 6.0;
+		
    WHITE_GAUSSIAN_NOISE = 4;
+		
    
+		
    TOPOLOGY = 4;
+		
    TOPOLOGY_FILE = chainTopo;
+    
+  
+
    
+
+
    Example 2: A uniform topology with 49 nodes in a 100m by 100m terrain, placed in
+a football field (channel parameters), with nodes having an average noise floor
+of -105 dBm, a standard deviation of 4.0 dB for the white gaussian noise and a low level
+of asymmetry. The resulting configuration file is:
+
+
    
+
+  
+    
+		PATH_LOSS_EXPONENT = 4.7;
+		
    SHADOWING_STANDARD_DEVIATION = 3.2;
+		
    D0 = 1.0;
+		
    PL_D0 = 55.4;
+		
    
+		
    NOISE_FLOOR = -105.0;
+		
    S11 = 0.9;
+		
    S12 = -0.7;
+		
    S21 = -0.7;
+		
    S22 = 1.2;
+		
    WHITE_GAUSSIAN_NOISE = 4;
+		
    
+		
    TOPOLOGY = 2;
+		
    NUMBER_OF_NODES = 49;
+		
    TERRAIN_DIMENSIONS_X = 100.0;
+		
    TERRAIN_DIMENSIONS_Y = 100.0;
+    
+  
+
    
+
+
    Example 3: similar to example 2, however in this case a 64 node grid topology is deployed
+with an internode distance of 2m and symmetric links are assumed. The resulting configuration file is:
+
+
    
+
+  
+    
+		PATH_LOSS_EXPONENT = 4.7;
+		
    SHADOWING_STANDARD_DEVIATION = 3.2;
+		
    D0 = 1.0;
+		
    PL_D0 = 55.4;
+		
    
+		
    NOISE_FLOOR = -105.0;
+		
    S11 = 0;
+		
    S22 = 0;
+		
    WHITE_GAUSSIAN_NOISE = 4;
+		
    
+		
    TOPOLOGY = 1;
+		
    GRID_UNIT = 2.0;
+		
    NUMBER_OF_NODES = 64;
+    
+  
+
    
+
+
     
+
+
+
+
+
    
+Usage
    
+
+
+
    To use the model just provide the following commands
+
    $ javac LinkLayerModel.java
+
    $ java LinkLayerModel configurationFileName
+
    The link gains will be written in a file called linkgain.out, which contains
+the gain for each link and the noise floor for each node 
+(format:   "gain"   src   dest   linkgain |   "noise"   nid   nf   awgn), for example:
+
+
    
+
    
+
+  
+    
+	gain 1  2 -58.3
+	
    gain 2  1 -60.5
+	
    gain 1  3 -72.8
+	
    gain 3  1 -75.3
+	
    gain 2  3 -77.9
+	
    gain 3  2 -75.4
+	
    noise 1 -107.3 5
+	
    noise 2 -105.2 5
+	
    noise 3 -103.1 5
+    
+  
+
    
+
    
+
+
+and the topology will be written in the file topology.out (format:   nodeid   xcoor   ycoor).
+
+
+
+
diff --git a/doc/html/upgrade-tinyos.html b/doc/html/upgrade-tinyos.html
new file mode 100644
index 00000000..e87b07b5
--- /dev/null
+++ b/doc/html/upgrade-tinyos.html
@@ -0,0 +1,339 @@
+
+
+
    
+
+
+
    Upgrading from TinyOS 1.x to TinyOS 2.x
    
+
    
+This document describes how to upgrade your TinyOS 1.x environment to
+a TinyOS 2.x environment. This requires that you not only install the 
+TinyOS 2.x rpm, but also that you upgrade your tools from the toolset
+distributed with TinyOS 1.1.0 and used with all 1.x
+TinyOS versions up through and including TinyOS 1.1.14. The new
+toolset was created for use with TinyOS 1.x beyond 1.1.14 as well
+as TinyOS 2.x. We call this new tooset version the '1.2' toolset.
+
    
+Because we expect many developers to maintain a 1.x and 2.x tree
+simultaneously, we will also explain what parts of your environment
+need to be reconfigured if you switch from TinyOS 2.x to TinyOS
+1.x. The 1.2 toolset is backwards compatible with the 1.x TinyOS tree,
+so switching back and forth requires only a few variable changes. You
+can find those directions at the bottom of the page.
+
    
+There are 3 steps to upgrading from 1.x to 2.x:
+
      
+  
    1.  Upgrade your external tools (compilers). 
+  
    2.  Upgrade your Tinyos-specific tools. 
+  
    3.  Install the Tinyos 2.x source tree. 
+
    
+
+
    
+
+
     1. Upgrade your external tools. 
    
+The 1.2 toolset uses the same Java JDK and ATT Graphviz versions, so 
+those do not need to be upgraded. What does need to be upgraded are
+your compiler tools. Install the appropriate version of the following 
+(Windows or Linux) with the rpm command 'rpm -Uvh '.
+
    
+At this time, we have available compiler toolsets for Atmel AVR and 
+TI MSP430 platforms. 
+
    
+All of the tools are in the http://www.tinyos.net/dist-1.2.0/
+and the http://www.tinyos.net/dist-2.0.0
+distribution trees, but are linked below for convenience.
+
+
+
    Atmel AVR Tools
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
    ToolWindows/CygwinLinux
    avr-binutils†avr-binutils-2.15tinyos-3.cygwin.i386.rpmavr-binutils-2.15tinyos-3.i386.rpm
    avr-gccavr-gcc-3.4.3-1.cygwin.i386.rpm avr-gcc-3.4.3-1.i386.rpm
    avr-libcavr-libc-1.2.3-1.cygwin.i386.rpmavr-libc-1.2.3-1.i386.rpm
    avariceavarice-2.4-1.cygwin.i386.rpmavarice-2.4-1.i386.rpm
    insight (avr-gdb)avr-insight-6.3-1.cygwin.i386.rpmavr-insight-6.3-1.i386.rpm
    
+†If you receive an rpm error that indicates that you have a newer version already installed, try rpm -Uvh --force
+
+
+
    TI MSP430 Tools
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
+  
+
+  
+  
+
+
+
    ToolWindows/CygwinLinux
    basemsp430tools-base-0.1-20050607.cygwin.i386.rpmmsp430tools-base-0.1-20050607.i386.rpm
    python toolsmsp430tools-python-tools-1.0-1.cygwin.noarch.rpmmsp430tools-python-tools-1.0-1.noarch.rpm
    binutils msp430tools-binutils-2.16-20050607.cygwin.i386.rpmmsp430tools-binutils-2.16-20050607.i386.rpm
    gccmsp430tools-gcc-3.2.3-20050607.cygwin.i386.rpmmsp430tools-gcc-3.2.3-20050607.i386.rpm
    libcmsp430tools-libc-20050308cvs-20050608.cygwin.i386.rpmmsp430tools-libc-20050308cvs-20050608.i386.rpm
    jtagNot yet availablemsp430tools-jtag-lib-20031101cvs-20050610.i386.rpm
    gdbNot yet availablemsp430tools-gdb-6.0-20050609.i386.rpm
    
+
+
    
+
     2. Upgrade your TInyOS-specific tools. 
    
+
+The TinyOS-specific tools are the NesC compiler and a set of tools
+developed in the tinyos-2.x/tools source code repository. They are
+also installed using rpms. Due to file conflicts between the new version
+of the tinyos-tools and older NesC installations, you must upgrade
+your NesC installation before you upgrade tinyos-tools. 
+Also, if you plan on maintaining a tinyos-1.x tree 
+simultaneously with a tinyos-2.x tree, the tinyos-tools installed for the
+1.x versions must remain installed so use rpm -ivh. If you are 
+only installing a 2.x tree, you can use rpm -Uvh.
+
    
+
+
+
    TinyOS-specific Tools
+
+
+  
+  
+  
+  
+
+
+
+  
+  
+  
+  
+
+
+
+  
+  
+  
+  
+
+
+
    ToolWindows/CygwinLinuxCommand
    NesCnesc-1.2.7a-1.cygwin.i386.rpmnesc-1.2.7a-1.i386.rpm rpm -Uvh
    tinyos-toolstinyos-tools-1.2.2-1.cygwin.i386.rpmtinyos-tools-1.2.2-1.i386.rpmrpm -ivh --force (1.x tree)
    rpm -Uvh (no 1.x tree)
    
+
+
    
+
     3. Install the TinyOS 2.x source tree. 
    
+
+Now that the tools are installed, you need only install the tinyos 2.x 
+source tree and then set your environment variables.
+
+
      
+
    •  Install tinyos-2.x
+
      
+
+To preserve your old tinyos-1.x tree, we strongly recommend that you use
+the install (-i) rpm argument when installing the tinyos-2.x rpm rather 
+than the upgrade (-U) argument. The difference is that the -U will 
+first remove the tinyos-1.x tree while -i will not remove previously installed
+files. Said another way, we recommend using rpm -ivh.
+
+
      TinyOS 2.x
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+
+
      Windows/CygwinLinux
      TinyOStinyos-2.0.0beta2-3.cygwin.noarch.rpmtinyos-2.0.0beta2-3.noarch.rpm
      
+
    •  Configure your environment
+
      
+In TinyOS 1.x, much of your environment was set by the rpm installation process
+by copying a tinyos.sh file into /etc/profile.d which was subsequently run anytime
+a shell was started. Because this was deemed unnecessarily invasive, the 2.x rpm
+does not do this. Rather, you need to set these variables yourself. Ideally, you'll
+put them in a shell script that will run when your shell starts, but you needn't 
+put such a script under /etc/profile.d. 
+
      
+Please take note of the current settings since you'll need those if you want
+to work in your current 1.x tree sometime in the future. 
+
      
+The example
+settings below assume that the tinyos-2.x installation is in /opt/tinyos-2.x.
+Change the settings to be correct for where you've put your tinyos-2.x tree. Note
+that the windows CLASSPATH must be a windows-style path, not a cygwin path. You can 
+generate a windows style path from a cygwin-style path using 'cygpath -w'. For example:
+
      export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java/tinyos.jar`
+export CLASSPATH="$CLASSPATH;."
+
      
+
+
      TinyOS 2.x
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+  
+  
+  
+
+  
+  
+  
+
+  
+  
+  
+
+  
+  
+  
+
      Environment VariableWindowsLinux
      TOSROOT/opt/tinyos-2.xsame as in Cygwin
+
+
      TOSDIR$TOSROOT/tossame as in Cygwin
+
+
      CLASSPATHC:\tinyos\cygwin\opt\tinyos-2.x\support\sdk\java\tinyos.jar;.$TOSROOT/support/sdk/java/tinyos.jar:.
+
+
      MAKERULES$TOSROOT/support/make/Makerulessame as in Cygwin
+
+
      PATH†/opt/msp430/bin:$PATHsame as in Cygwin
+
+
      
+
+†Only necessary if you're using the MSP430 platform/tools.
+
+
      
+In addition to the above environment variables, do the following on Linux machines:
+
        
+
      1.  Change the ownership on your /opt/tinyos-2.x files: chown -R <your uid> /opt/tinyos-2.x
+
      2.  Change the permissions on any serial (/dev/ttyS<N>), usb
+(/dev/tts/usb<N>, /dev/ttyUSB<N>), or parallel (/dev/parport) devices you
+are going to use: chmod 666 /dev/<devicename>
+
+
      
+
+
    
+
    
+
    Switching back to a TinyOS 1.x tree
    
+Since the tools are backwardly compatible, you need only change
+your environment variables to point to the 1.x settings. Assuming 
+that your old tree was in /opt/tinyos-1.x, you would use the following 
+values:
+
    TinyOS 1.x
+
+
+  
+  
+  
+
+
+
+  
+  
+  
+
+  
+  
+  
+
+  
+  
+  
+
+  
+  
+  
+
    Environment VariableWindowsLinux
    TOSROOT/opt/tinyos-1.xsame as in Cygwin
+
+
    TOSDIR$TOSROOT/tossame as in Cygwin
+
+
    CLASSPATH`$TOSROOT/tools/java/javapath`same as in Cygwin
+
+
    MAKERULES$TOSROOT/tools/make/Makerulessame as in Cygwin
+
+
    
+
    
diff --git a/doc/index.html b/doc/index.html
new file mode 100644
index 00000000..dca149c7
--- /dev/null
+++ b/doc/index.html
@@ -0,0 +1,120 @@
+
+
+  
+    TinyOS 2.0 Documentation
+    
+  
+
+  
+   
     
+      
+	
+	  
+	
+	
+	  
+	
+
+	
+	  
+	
+	
+	  
+	
+
+
+	
+	  
+	
+	
+	  
+	
+
+
+	
+	  
+	
+	
+	  
+	
+	
+	  
+	
+      
    
+	    TinyOS 2.0 Documentation
    
+	    
    Last Modified: Oct 31 2005
    
+	  
    
+	    
    There are three classes of TinyOS 2.0 documentation. The
+	    first class includes release notes and high-level
+	    overviews of the system. The second is a series of
+	    tutorials. The third is a set of TEPs (TinyOS Enhancement
+	    Proposals), which document and describe major OS
+	    abstractions and subsystems and source code documentation
+            from the javadoc and nesdoc tools
    
+
+	  
    Release Notes
    
+	    
+	  
    Tutorials
    TinyOS 2.0 has a few tutorials to get a new user started with programming
+              the system. These tutorials introduce nesC programming and some major
+              TinyOS abstractions, such as timers and communication.
    
+
+              
    TinyOS 2.0 Tutorials
    TEPs and Source Code Documentation
    
+
+	    TEPs are written in ReStructured Text, and so can be read
+	    either as HTML or as a text document. TEP 1 describes the
+	    different kinds of TEPs and their roles. TEPs 1-100 are
+	    BCP (Best Current Practice) TEPs, while TEPS 101+ are
+	    Informational, Documentary, or Experimental. Currently,
+	    all TEPs are still Drafts: comments and feedback to the
+	    authors or the associated working group is welcome.
+
+	    

    
+	    
+	    
      
+	      
    • TEP 1: TEP Structure and Key Words        [HTML]   [TXT]
      • 
+	      
    • TEP 2: Hardware Abstraction Architecture  [HTML]   [TXT]
      • 
+	      
    • TEP 3: Coding Standards                   [HTML]   [TXT]
      • 
+	      
    • TEP 101: ADC                              [HTML] [TXT]
      • 
+	      
    • TEP 102: Timers                           [HTML] [TXT]
      • 
+	      
    • TEP 103: Storage                          [HTML] [TXT]
      • 
+	      
    • TEP 106: Schedulers and Tasks             [HTML] [TXT]
      • 
+	      
    • TEP 107: Boot Sequence                    [HTML] [TXT]
      • 
+	      
    • TEP 108: Resource Arbitration             [HTML] [TXT]
      • 
+	      
    • TEP 109: Sensorboards                     [HTML] [TXT]
      • 
+	      
    • TEP 110: Service Distributions            [HTML] [TXT]
      • 
+	      
    • TEP 111: message_t                        [HTML] [TXT]
      • 
+	      
    • TEP 112: Microcontroller Power Management [HTML] [TXT]
      • 
+	      
    • TEP 113: Serial Communication             [HTML] [TXT]
      • 
+	      
    • TEP 114: SIDs: Source and Sink Independent Drivers [HTML] [TXT]
      • 
+	      
    • TEP 115: Power Management of Non-Virtualized Devices [HTML] [TXT]
      • 
+	      
    • TEP 116: Packet Protocols                 [HTML] [TXT]
      • 
+	    
    
+
+          
    In addition to TEPs, which document the organization and design
+             behind important parts of TinyOS, there is also source code
+             documentation. TinyOS (nesC) code has nesdoc annotations,
+             which can be found here (note that this link is external):

    
+
+             
+             
    TinyOS 2.0 nesdoc documentation
    
+             
+          
    
+
+          
    There is similar javadoc documentation for the Java toolchain, 
+             which can be found here:

    
+ 
+             
+             
    TinyOS 2.0 javadoc documentation
    
+
+          
    
+              
+
    
+	  
    
+    
    
+  
+
+
diff --git a/doc/policy/owners.txt b/doc/policy/owners.txt
new file mode 100644
index 00000000..88464826
--- /dev/null
+++ b/doc/policy/owners.txt
@@ -0,0 +1,51 @@
+Owners by directory
+===================
+[For stuff which cleanly fits in a directory]
+
+tos/chips
+---------
+ad5200: Kevin Klues  [eyes?]
+at45db: David Gay [mica family storage]
+atm128: Martin Turon (Xbow), David Gay [mica family microcontroller]
+cc1000: David Gay [mica2 radio]
+cc2420: Phil Levis, Jonathan Hui [802.15.4 radio]
+msp430: Arched Rock, TU Berlin [microcontroller]
+pxa27x: Phil Buonadonna [imote2 microcontroller]
+stm25p: Jonathan Hui [telosb storage]
+tda5250: TU Berlin (who?) [eyes radio]
+
+tos/lib
+-------
+adc: Jan Hauer, David Gay [adc support components]
+gpio: Martin Turon [polling-based interrupt emulation]
+oski: Phil Levis [a service distribution]
+serial: Ben Greenstein, Phil Levis [serial port protocol]
+timer: Cory Sharp [timer support components]
+tossim: Phil Levis [simulation environment]
+
+tos/oski [is it tos/oski or tos/lib/oski??]
+
+tos/platforms
+-------------
+eyesIFX: TU Berlin
+intelmote2: Phil Buonadonna
+mica: Martin Turon, David Gay [mica family support]
+mica2: Martin Turon, David Gay
+micaz: Martin Turon, Phil Levis
+telosa: Arched Rock
+telosb: Arched Rock
+
+tos/sensorboards
+----------------
+mts300: Martin Turon [mica family sensor board]
+
+Owners by subsystem
+===================
+[For things without their own well-defined directory, or which don't
+have a directory yet]
+
+Arbiters: Kevin Klues
+Power management: Phil Levis, Vlado Handziski, Kevin Klues
+Security: Phil Levis, David Gay
+Scheduler, booting: Phil Levis
+Random numbers: Phil Levis
diff --git a/doc/policy/policy.txt b/doc/policy/policy.txt
new file mode 100644
index 00000000..119b08c6
--- /dev/null
+++ b/doc/policy/policy.txt
@@ -0,0 +1,51 @@
+TinyOS 2.x collaboration policy
+-------------------------------
+
+In the interest of furthering effective collaboration on the TinyOS 2.x
+project, we will manage development of TinyOS using the following policies.
+
+1) TinyOS 2.x is composed of a number of independent subsystems (radios,
+sensors, booting, etc) whose design is reflected in TEPs (see TEP 1 for
+more details on TEP structure). Individual TEPs are generally written by a
+subset of the TinyOS 2.x working group members, based on a consensus of the
+whole working group and more detailed discussions by the subset.
+
+2) Changes to TEPs should be proposed to the group as a whole, for
+discussion. If consensus is reached, the TEP can be changed.
+
+3) Code development is divided into a number of subsystems, which often,
+but not always, reflect TEP and platform boundaries (e.g., "storage for the
+mica2", "the scheduler", etc). A subsystem has an owner (one or more
+members or company represented in the working group) and a target
+completion date.
+
+4) To avoid the introduction of bugs, and except as discussed below, a
+subsystem's code should only be committed to the TinyOS 2.x CVS repository
+by its owners. [Thought for discussion: allow people to create arbitrary
+branches and commit on those?]
+
+5) If you find a trivial bug (e.g., an extra character that prevents
+compilation) you can commit a change to any subsystem. Please email
+me the subsystem's owner or the mailing list when you do this.
+
+6) If you find the need to make a substantial change, fix a non-trivial
+bug, or make a trivial API change to a subsystem (e.g., it's missing an
+Init interface that is present on another platform), email the TinyOS 2.x
+mailing list with your proposed change (diffs are helpful). You can commit
+this change on agreement from the subsystem's owner, or after 48 hours if
+no response is received. Disagreements about the change should be resolved
+with the subsystem's owner or the mailing list as a whole.
+
+7) If you find that a subsystem needs API changes, you should present these
+to the TinyOS 2.x mailing list. Once consensus is reached, the code can
+be changed and any related TEPs updated.
+
+8) If progress on a subsystem has stalled, its completion target date has
+passed, or its completion target date is holding up progress of the
+rest of TinyOS 2.x (and dependent projects), you can propose reassigning
+the subsystem to a new owner. You should have a new owner lined up who
+can meet the necessary target dates. This reassignment proposal must
+be made to the TinyOS 2.x list. Once consensus is reached, or if no
+response is received from the subsystem's owners after a week, the
+subsystem will be reassigned.
+
diff --git a/doc/stylesheets/doc.css b/doc/stylesheets/doc.css
new file mode 100644
index 00000000..d054b042
--- /dev/null
+++ b/doc/stylesheets/doc.css
@@ -0,0 +1,270 @@
+/*
+:Author: David Goodger
+:Contact: goodger@users.sourceforge.net
+:date: $Date$
+:version: $Revision$
+:copyright: This stylesheet has been placed in the public domain.
+
+Default cascading style sheet for the HTML output of Docutils.
+*/
+body {
+  font-family: Times;
+  font-size: 16px;
+}
+
+.first {
+  margin-top: 0 ! important }
+
+.last {
+  margin-bottom: 0 ! important }
+
+.hidden {
+  display: none }
+
+a.toc-backref {
+  text-decoration: none ;
+  color: black }
+
+blockquote.epigraph {
+  margin: 2em 5em ; }
+
+dd {
+  margin-bottom: 0.5em }
+
+/* Uncomment (& remove this text!) to get bold-faced definition list terms
+dt {
+  font-weight: bold }
+*/
+
+div.abstract {
+  margin: 2em 5em }
+
+div.abstract p.topic-title {
+  font-weight: bold ;
+  text-align: center }
+
+div.attention, div.caution, div.danger, div.error, div.hint,
+div.important, div.note, div.tip, div.warning, div.admonition {
+  margin: 2em ;
+  border: medium outset ;
+  padding: 1em }
+
+div.attention p.admonition-title, div.caution p.admonition-title,
+div.danger p.admonition-title, div.error p.admonition-title,
+div.warning p.admonition-title {
+  color: red ;
+  font-weight: bold ;
+  font-family: sans-serif }
+
+div.hint p.admonition-title, div.important p.admonition-title,
+div.note p.admonition-title, div.tip p.admonition-title,
+div.admonition p.admonition-title {
+  font-weight: bold ;
+  font-family: sans-serif }
+
+div.dedication {
+  margin: 2em 5em ;
+  text-align: center ;
+  font-style: italic }
+
+div.dedication p.topic-title {
+  font-weight: bold ;
+  font-style: normal }
+
+div.figure {
+  margin-left: 2em }
+
+div.footer, div.header {
+  font-size: smaller }
+
+div.line-block {
+  display: block ;
+  margin-top: 1em ;
+  margin-bottom: 1em }
+
+div.line-block div.line-block {
+  margin-top: 0 ;
+  margin-bottom: 0 ;
+  margin-left: 1.5em }
+
+div.sidebar {
+  margin-left: 1em ;
+  border: medium outset ;
+  padding: 0em 1em ;
+  background-color: #ffffee ;
+  width: 40% ;
+  float: right ;
+  clear: right }
+
+div.sidebar p.rubric {
+  font-family: sans-serif ;
+  font-size: medium }
+
+div.system-messages {
+  margin: 5em }
+
+div.system-messages h1 {
+  color: red }
+
+div.system-message {
+  border: medium outset ;
+  padding: 1em }
+
+div.system-message p.system-message-title {
+  color: red ;
+  font-weight: bold }
+
+div.topic {
+  margin: 2em }
+
+h1 {
+  font-family: Arial, sans-serif;
+  font-size: 20px;
+}
+
+h1.title {
+ text-align: center;
+ font-size: 32px;
+}
+
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new file mode 100644
index 00000000..2bc99168
--- /dev/null
+++ b/doc/stylesheets/tep.css
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new file mode 100644
index 00000000..0937e6b8
--- /dev/null
+++ b/doc/stylesheets/tinyos.css
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diff --git a/doc/stylesheets/tutorial.css b/doc/stylesheets/tutorial.css
new file mode 100644
index 00000000..a19bac28
--- /dev/null
+++ b/doc/stylesheets/tutorial.css
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diff --git a/doc/txt/overview.txt b/doc/txt/overview.txt
new file mode 100644
index 00000000..73e5dcc7
--- /dev/null
+++ b/doc/txt/overview.txt
@@ -0,0 +1,410 @@
+============================
+TinyOS 2.0 Overview
+============================
+
+:Author: Philip Levis
+:Date: Feb 8 2006
+
+.. Note::
+ 
+   This document gives a brief overview of TinyOS 2.0, highlighting how
+   and where it departs from 1.1 and 1.0. Further detail on these changes
+   is detailed in TEP (TinyOS Enhancement Proposal) documents. 
+
+1. Introduction
+====================================================================
+
+TinyOS 2.0 is a clean slate redesign and re-implementation of TinyOS.
+Its development was motivated by our belief that many aspects of 1.x
+strain to meet requirements and uses that were not foreseen
+when it was designed and implemented. The structure and interfaces 1.x
+defines have several fundamental limitations. While these limitations
+can be worked around, this practice has led to tightly coupled
+components, hard to find interactions, and a very steep learning curve
+for a newcomer to sensor network programming.
+
+TinyOS 2.0 is not backwards compatible with 1.x: code written for the
+latter will not compile for the former. However, one important aspect
+of 2.0's design is to minimize the difficulty of upgrading
+code. Therefore, while porting a 1.x application to 2.0 will require
+some work, it should not be very much. 
+
+This document provides a high-level overview of 2.0 and describes some
+of the ways in which it departs from 1.x. It covers the basic TinyOS
+abstractions, such as hardware abstractions, communication, timers,
+the scheduler, booting and initialization. Further detail on each of
+these can be found in TEPs (TinyOS Enhancement Proposals), which
+document and describe these abstractions.
+
+2. Platforms/Hardware Abstraction
+====================================================================
+
+Platforms exist in the ``tos/platforms`` subdirectory. In TinyOS 2.0, a
+*platform* is a collection of *chips* and some glue code that connects
+them together. For example, the mica2 platform is the CC1000 radio
+chip and the ATmega128 microcontroller, while the micaZ platform is
+the CC2420 radio and the ATmega128 microcontroller, and the Teloi
+platforms are the CC2420 radio and the MSP430 microcontroller. Chip
+code exists in ``tos/chips``. A platform directory generally has a
+``.platform`` file, which has options to pass to the nesC compiler. For
+example, the mica2 .platform file tells ncc to look in ``chips/cc1000``
+and ``chips/atm128`` directories, as well as to use avr-gcc to compile a
+mote binary (Teloi platforms tell it to use msp430-gcc). 
+
+Hardware abstractions in TinyOS 2.0 generally follow a three-level
+abstaction heirarchy, called the HAA (Hardware Abstraction
+Architecture).
+
+At the bottom of the HAA is the HPL (Hardware Presentation Layer). The
+HPL is a thin software layer on top of the raw hardware, presenting
+hardare such as IO pins or registers as nesC interfaces. The HPL
+generally has no state besides the hardware itself (it has no
+variables). HPL components usually have the prefix ``Hpl``, followed by
+the name of the chip. For example, the HPL components of the CC1000
+begin with ``HplCC1000``.
+
+The middle of the HAA is the HAL (Hardware Abstraction Layer). The HAL
+builds on top of the HPL and provides higher-level abstractions that
+are easier to use than the HPL but still provide the full
+functionality of the underlying hardware. The HAL components usually have
+a prefix of the chip name. For example, the HAL components of the CC1000
+begin with ``CC1000``.
+
+The top of the HAA is the HIL (Hardware Independent Layer). The HIL
+builds on top of the HAL and provides abstractions that are hardware
+independent. This generalization means that the HIL usually does not
+provide all of the functionality that the HAL can. HIL components have
+no naming prefix, as they represent abstractions that applications can
+use and safely compile on multiple platforms. For example, the HIL
+component of the CC1000 on the mica2 is ``ActiveMessageC``, representing
+a full active message communication layer.
+
+The HAA is described in TEP 2: Hardware Abstraction Architecture[TEP2_].
+
+Currently (as of the 2.0 beta2 release in July 2006), TinyOS 2.0 supports
+the following platforms:
+
+ * eyesIFXv2
+ * intelmote2
+ * mica2
+ * mica2dot
+ * micaZ
+ * telosb
+ * tinynode
+ * btnode3
+
+
+The btnode3 platform is not included in the beta2 RPM.
+
+3. Scheduler
+====================================================================
+
+As with TinyOS 1.x, TinyOS 2.0 scheduler has a non-preemptive FIFO
+policy. However, tasks in 2.0 operate slightly differently than in
+1.x.
+
+In TinyOS 1.x, there is a shared task queue for all tasks, and a
+component can post a task multiple times. If the task queue is full,
+the post operation fails. Experience with networking stacks showed
+this to be problematic, as the task might signal completion of a
+split-phase operation: if the post fails, the component above might
+block forever, waiting for the completion event.
+
+In TinyOS 2.x, every task has its own reserved slot in the task queue,
+and a task can only be posted once. A post fails if and only if the
+task has already been posted. If a component needs to post a task
+multiple times, it can set an internal state variable so that when
+the task executes, it reposts itself.
+
+This slight change in semantics greatly simplifies a lot of component
+code. Rather than test to see if a task is posted already before
+posting it, a component can just post the task. Components do not have
+to try to recover from failed posts and retry. The cost is one byte of
+state per task. Even in large systems such as TinyDB, this cost is
+under one hundred bytes (in TinyDB is is approximately 50).
+
+Applications can also replace the scheduler, if they wish. This allows
+programmers to try new scheduling policies, such as priority- or
+deadline-based. It is important to maintain non-preemptiveness,
+however, or the scheduler will break all nesC's static concurrency
+analysis. Details on the new scheduler and how to extend it can be found
+in TEP 106: Schedulers and Tasks[TEP106_].
+
+4. Booting/Initialization
+====================================================================
+
+TinyOS 2.0 has a different boot sequence than 1.x. The 1.x interface
+``StdControl`` has been split into two interfaces: ``Init`` and
+``StdControl``. The latter only has two commands: ``start`` and ``stop``.
+In TinyOS 1.x, wiring components to the boot sequence would cause them
+to be powered up and started at boot. That is no longer the case: the
+boot sequence only initializes components. When it has completed
+initializing the scheduler, hardware, and software, the boot sequence
+signals the ``Boot.booted`` event. The top-level application component
+handles this event and start services accordingly. Details on
+the new boot sequence can be found in TEP 107: TinyOS 2.x Boot
+Sequence[TEP107_].
+
+5. Virtualization
+====================================================================
+
+TinyOS 2.0 is written with nesC 1.2, which introduces the concept
+of a 'generic' or instantiable component. Generic modules allow
+TinyOS to have reusable data structures, such as bit vectors and
+queues, which simplify development. More importantly, generic
+configurations allow services to encapsulate complex wiring 
+relationships for clients that need them.
+
+In practice, this means that many basic TinyOS services are now
+*virtualized.* Rather than wire to a component with a parameterized
+interface (e.g., GenericComm or TimerC in 1.x), a program instantiates
+a service component that provides the needed interface. This
+service component does all of the wiring underneath (e.g., in the
+case of timers, to a unique) automatically, reducing wiring
+mistakes and simplifying use of the abstraction.
+
+6. Timers
+====================================================================
+
+TinyOS 2.0 provides a much richer set of timer interfaces than
+1.x. Experience has shown that timers are one of the most critical
+abstractions a mote OS can provide, and so 2.0 expands the fidelity
+and form that timers take. Depending on the hardware resources of a
+platform, a component can use 32KHz as well as millisecond granularity
+timers, and the timer system may provide one or two high-precision
+timers that fire asynchronously (they have the async
+keyword). Components can query their timers for how much time
+remainins before they fire, and can start timers in the future (e.g.,
+'start firing a timer at 1Hz starting 31ms from now'). TEP 102: 
+Timers[TEP102_] defines what HIL components a platform must provide
+in order to support standard TinyOS timers. Platforms are
+required to provide millisecond granularity timers, and can provide
+finer granularity timers (e.g., 32kHz) if needed.
+
+Timers present a good example of virtualization in 2.0. In 1.x,
+a program instantiates a timer by wiring to TimerC::
+
+  components App, TimerC;
+  App.Timer -> TimerC.Timer[unique("Timer")];
+
+In 2.0, a program instantiates a timer::
+
+  components App, new TimerMilliC();
+  App.Timer -> TimerMilliC;
+
+
+
+7. Communication
+====================================================================
+
+In TinyOS 2.0, the message buffer type is ``message_t``, and it is a
+buffer that is large enough to hold a packet from any of a node's
+communication interfaces. The structure itself is completely opaque:
+components cannot reference its fields. Instead, all buffer accesses
+go through interfaces. For example, to get the destination address of
+an AM packet named ``msg``, a component calls ``AMPacket.destination(msg)``.
+
+Send interfaces distinguish the addressing mode of communication
+abstractions. For example, active message communication has the
+``AMSend`` interface, as sending a packet require an AM destination
+address. In contrast, broadcasting and collection tree abstractions
+have the address-free ``Send`` interface.
+
+Active messages are the network HIL. A platform's ``ActiveMessageC``
+component defines which network interface is the standard
+communication medium. For example, a mica2 defines the CC1000 active
+message layer as ActiveMessageC, while the TMote defines the CC2420
+active message layer as ActiveMessageC.
+
+There is no longer a TOS_UART_ADDRESS for active message
+communication.  Instead, a component should wire to
+SerialActiveMessageC, which provides active message communication over
+the serial port.
+
+Active message communication is virtualized through four generic 
+components, which take the AM type as a parameter: AMSenderC, 
+AMReceiverC, AMSnooperC, and AMSnoopingReceiverC. AMSenderC is
+virtualized in that the call to send() does not fail if some
+other component is sending (as it does with GenericComm in 1.x). Instead,
+it fails only if that particular AMSenderC already has a packet
+outstanding or if the radio is not in a sending state. Underneath,
+the active message system queues and sends these outstanding packets.
+This is different than the QueuedSendC approach of 1.x, in which there
+is an N-deep queue that is shared among all senders. With N AMSenderC 
+components, there is an N-deep queue where each sender has a single
+reserved entry. This means that each AMSenderC receives 
+1/n of the available post-MAC transmission opportunities,  where
+n is the number of AMSenderC components with outstanding packets.
+In the worst case, n is the number of components; even when every
+protocol and component that sends packets is trying to send a packet,
+each one will receive its fair share of transmission opportunities.
+
+Further information on message_t can be found in TEP 111:
+message_t[TEP111_], while further information on AM can be
+found in TEP 116: Packet Protocoks[TEP116_].
+
+8. Sensors
+====================================================================
+
+In TinyOS 2.0, named sensor components comprise the HIL of a
+platform's sensors. TEP 114 describes a set of HIL data acquisition
+interfaces, such as Read, ReadStream, and Get, which sensors
+provide according to their acquisition capabilities.
+
+If a component needs
+high-frequency or very accurate sampling, it must use the HAL, which
+gives it the full power of the underlying platform (highly accurate
+platform-independent sampling is not really feasible, due to the
+particulars of individual platforms). ``Read`` assumes that the
+request can tolerate some latencies (for example, it might schedule
+competing requests using a FIFO policy). 
+
+Details on the ADC subsystem can be found in
+TEP 101: Analog-to-Digital Converters[TEP101_]; details on
+the organization of sensor boards can be found in TEP 109:
+Sensorboards[TEP109_], and the details of the HIL sensor interfaces
+can be found in TEP 114: Source and Sink Independent Drivers[TEP114_].
+
+
+9. Error Codes
+====================================================================
+
+The standard TinyOS 1.x return code is ``result_t``, whose value is
+either SUCCESS (a non-zero value) or FAIL (a zero value). While this
+makes conditionals on calls very easy to write (e.g., ``if (call
+A.b())``), it does not allow the callee to distinguish causes of error
+to the caller. In TinyOS 2.0, ``result_t`` is replaced by ``error_t``,
+whose values include SUCCESS, FAIL, EBUSY, and ECANCEL. Interface
+commands and events define which error codes they may return and why.
+
+From the perspective of porting code, this is the most significant
+different in 2.0. Calls that were once::
+
+  if (call X.y()) {
+    busy = TRUE;  
+  }
+
+
+now have their meanings reversed. In 1.x, the busy statement will execute
+if the call succeeds, while in 2.0 it will execute if the call fails.
+This encourages a more portable, upgradable, and readable approach::
+
+  if (call X.y() == SUCCESS) {
+    busy = TRUE;
+  }
+
+10. Arbitration
+====================================================================
+
+While basic abstractions, such as packet communication and timers,
+can be virtualized, experiences with 1.x showed that some cannot 
+without either adding significant complexity or limiting the system.
+The most pressing example of this is a shared bus on a microcontroller.
+Many different systems -- sensors, storage, the radio -- might need
+to use the bus at the same time, so some way of arbitrating access
+is needed. 
+
+To support these kinds of abstractions, TinyOS 2.0 introduces 
+the Resource interface, which components use to request and
+acquire shared resources, and arbiters, which provide a policy for 
+arbitrating access between multiple clients. For some abstractions,
+the arbiter also provides a power management policy, as it can tell
+when the system is no longer needed and can be safely turned off.
+
+TEP 108: Resource Arbitration[TEP108_] describes the Resource interface
+and how arbiters work.
+
+11. Power Management
+====================================================================
+
+Power management in 2.0 is divided into two parts: the power state
+of the microcontroller and the power state of devices. The former,
+discussed in TEP 112: Microcontroller Power Management[TEP112_],
+is computed in a chip-specific manner by examining which devices 
+and interrupt souces are active. The latter, discussed in
+TEP 115: Power Management of Non-Virtualised Devices{TEP115_], is handled
+through resource abiters. Fully virtualized services have their
+own, individual power management policies.
+
+12. Network Protocols
+====================================================================
+
+TinyOS 2.0 provides simple reference implementations of two of 
+the most basic protocols used in mote networks: dissemination
+and collection. Dissemination reliably delivers small (fewer 
+than 20 byte) data items to every node in a network, while
+collection builds a routing tree rooted at a sink node. Together,
+these two protocols enable a wide range of data collection
+applications. 
+
+12. Conclusion
+====================================================================
+
+TinyOS 2.0 represents the next step of TinyOS development. Building on
+user experiences over the past few years, it has taken the basic
+TinyOS architecture and pushed it forward in several directions,
+hopefully leading to simpler and easier application development. It is
+still under active development: future prereleases will include
+non-volatile storage, basic multihop protocols (collection routing,
+dissemination), and further power management abstractions.
+
+13. Acknowledgments
+====================================================================
+
+TinyOS 2.0 is the result of a lot of hard work from a lot of people,
+including (but not limited to) David Gay, Philip Levis, Cory Sharp, 
+Vlado Handziski, Jan Hauer, Kevin Klues, Joe Polastre, Jonathan Hui, 
+Prabal Dutta, 
+Gilman Tolle, Martin Turon, Phil Buonodonna, Ben Greenstein, David Culler, 
+Kristin Wright, Ion Yannopoulos, Henri Dubois-Ferriere, Jan Beutel, 
+Robert Szewczyk, Rodrigo Fonseca, Kyle Jamieson, Omprakash Gnawali,
+and Kristin Wright.
+
+
+14. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates
+| Computer Systems Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+
+15. Citations
+====================================================================
+
+.. [TEP1] TEP 1: TEP Structure and Keywords. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep1.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep2.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP3] TEP 3: Coding Standard. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep3.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP101] TEP 101: Analog-to-Digital Converters. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep101.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP102] TEP 102: Timers. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep102.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP106] TEP 106: Schedulers and Tasks. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep106.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP107] TEP 107: Boot Sequence. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep107.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP108] TEP 108: message_t. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep108.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP109] TEP 109: Sensorboards. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep109.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP110] TEP 110: Service Distributions. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep110.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP111] TEP 111: message_t. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep111.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP112] TEP 112: Microcontroller Power Management. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep112.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP113] TEP 113: Serial Communication. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep113.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP114] TEP 114: SIDs: Source and Sink Independent Drivers. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep114.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP115] TEP 115: Power Management of Non-Virtualised Devices. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep115.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP116] TEP 116: Packet Protocols. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep116.html?pathrev=tinyos-2_0_devel-BRANCH
diff --git a/doc/txt/tep1.txt b/doc/txt/tep1.txt
new file mode 100644
index 00000000..ea35a2b0
--- /dev/null
+++ b/doc/txt/tep1.txt
@@ -0,0 +1,236 @@
+============================
+TEP Structure and Keywords 
+============================
+
+:TEP: 1
+:Group: Core Working Group 
+:Type: Best Current Practice
+:Status: Draft
+:TinyOS-Version: All
+:Author: Philip Levis
+
+:Draft-Created: 18-Oct-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.
+
+Abstract
+====================================================================
+
+This memo describes the structure all TinyOS Extension Proposal (TEP)
+documents follow, and defines the meaning of several key words in
+those documents.
+
+1. Introduction
+====================================================================
+
+In order to simplify management, reading, and tracking development,
+all TinyOS Extension Proposals (TEPs) MUST have a particular
+structure. Additionally, to simplify development and improve
+implementation interoperability, all TEPs MUST observe the meaning of
+several key words that specify levels of compliance. This document
+describes and follows both.
+
+2. Keywords
+====================================================================
+
+The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT",
+"SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this
+document are to be interpreted as described in TEP 1.
+
+Note that the force of these words is modified by the requirement
+level of the document in which they are used.
+
+2.1 MUST
+--------------------------------------------------------------------
+
+MUST: This word, or the terms "REQUIRED" or "SHALL", mean that the
+definition is an absolute requirement of the specification.
+
+2.2 MUST NOT
+--------------------------------------------------------------------
+
+MUST NOT: This phrase, or the phrase "SHALL NOT", mean that the
+definition is an absolute prohibition of the specification.
+
+2.3 SHOULD
+--------------------------------------------------------------------
+
+SHOULD: This word, or the adjective "RECOMMENDED", mean that there
+may exist valid reasons in particular circumstances to ignore a
+particular item, but the full implications must be understood and
+carefully weighed before choosing a different course.
+
+2.4 SHOULD NOT
+--------------------------------------------------------------------
+
+SHOULD NOT: This phrase, or the phrase "NOT RECOMMENDED" mean that
+there may exist valid reasons in particular circumstances when the
+particular behavior is acceptable or even useful, but the full
+implications should be understood and the case carefully weighed
+before implementing any behavior described with this label.
+
+2.5 MAY
+--------------------------------------------------------------------
+
+MAY: This word, or the adjective "OPTIONAL", mean that an item is
+truly optional.  One implementer may choose to include the item
+because a particular application requires it or because the
+implementer feels that it enhances the system while another
+implementer may omit the same item.  An implementation which does not
+include a particular option MUST be prepared to interoperate with
+another implementation which does include the option, though perhaps
+with reduced functionality. In the same vein an implementation which
+does include a particular option MUST be prepared to interoperate with
+another implementation which does not include the option (except, of
+course, for the feature the option provides.)
+
+2.6 Guidance in the use of these Imperatives
+--------------------------------------------------------------------
+
+Imperatives of the type defined in this memo must be used with care
+and sparingly.  In particular, they MUST only be used where it is
+actually required for interoperation or to limit behavior which has
+potential for causing harm (e.g., limiting retransmissions)  For
+example, they must not be used to try to impose a particular method
+on implementors where the method is not required for
+interoperability.
+
+
+3. TEP Structure
+====================================================================
+
+TEPs have two major parts, a header and a body. The header states
+document metadata, for management and status. The body contains the 
+content of the proposal.
+
+All TEPs MUST follow the TEP docutils template, and conform to 
+reStructuredText standards [1]_, to enable translation from 
+reStructuredText to HTML and Latex.
+
+3.1 TEP Header
+--------------------------------------------------------------------
+
+The TEP header has several fields which MUST be included, as well as
+others which MAY be included. The first six header fields MUST be
+included in all TEPs, in the order stated here.
+
+The first field is "TEP," and specifies the TEP number of the
+document. A TEP's number is unique.. This document is TEP 1. The 
+TEP type (discussed below)
+determines how a number is assigned to it. Generally, when a document
+is ready to be a TEP, it is assigned the smallest available number.
+BCP TEPs start at 1 and all other TEPs (Documentary, Experimental,
+and Informational) start at 101.
+
+The second field states the name of the working group that produced
+the document. This document was produced by the Core Working Group.
+
+The third field is "Type," and specifies the type of TEP the document
+is. There are four types of TEP: Best Current Practice (BCP),
+Documentary, Informational, and Experimental. This document is Best
+Current Practice.
+
+Best Current Practice is the closest thing TEPs have to a standard: it
+represents conclusions from significant experience and work by its
+authors. Developers desiring to add code (or TEPs) to TinyOS SHOULD
+follow all current BCPs. 
+
+Documentary TEPs describe a system or protocol that exists; a
+documentary TEP MUST reference an implementation that a reader can
+easily obtain.  Documentary TEPs simplify interoperability when 
+needed, and document TinyOS service implementations.
+
+Informational TEPs provide information that is of interest to the
+community. Informational TEPs include data gathered on radio behavior,
+hardware characteristics, other aspects of TinyOS software/hardware,
+organizational and logistic information,
+or experiences which could help the community achieve its goals.  
+
+Experimental TEPs describe a completely experimental approach to a
+problem, which are outside the TinyOS core and will not necessarily
+become part of it.  Unlike Documentary TEPs, Experimental TEPs may 
+describe systems that do not have a reference implementation.
+
+The fourth field is "Status," which specifies the status of the TEP.
+A TEP status can either be "Draft," which means it is a work in
+progress, "Final," which means it is complete and will not change, or
+"Obsolete," which means it should no longer be considered. If a TEP is
+"Obsolete" because it has been replaced by another TEP, then the new
+TEP number should follow "Obsolete," such as "Obsolete by TEP 1231."
+
+If a TEP is Best Current Practices or Documentary, then it MUST
+include an additional field, "TinyOS-Version:," which states what
+version(s) of TinyOS the document pertains to. This document pertains
+to all versions of TinyOS, until made obsolete by a future TEP. This
+field MUST appear after the Status field and before the Author field.
+
+The final required field is Author, which states the names of the
+authors of the document. Full contact information should not be listed
+here (see Section 3.2).
+
+If a TEP is a Draft, then four additional fields MUST be included:
+Draft-Created, Draft-Modified, Draft-Version, and Draft-Discuss.
+Draft-Created states the date the document was created, Draft-Modified
+states when it was last modified. Draft-Version specifies the version
+of the draft, which MUST increase every time a modification is
+made. Draft-Discuss specifies the email address of a mailing list
+where the draft is being discussed. Final and Obsolete TEPs MUST NOT
+have these fields, which are for Drafts only.
+
+3.2 TEP Body
+--------------------------------------------------------------------
+
+The first element of the TEP body MUST be the title of the document. A
+TEP SHOULD follow the title with an Abstract, which gives a brief
+overview of the content of the TEP. Longer TEPs MAY, after the
+Abstract, have a Table of Contents. After the Abstract and Table of
+Contents there SHOULD be an Introduction, stating the problem the TEP
+seeks to solve and providing needed background information.
+
+If a TEP is Documentary, it MUST have a section entitled
+"Implementation," which instructs the reader how to obtain the
+implementation documented.
+
+If a TEP is Best Current Practices, it MUST have a section entitled
+"Reference," which points the reader to one or more reference uses of
+the practices.
+
+The last section of a TEP (but before citations, if there are any),
+entitled "Author's Address" or "Author's Addresses" MUST contain
+detailed author contact information.
+
+4. Reference
+====================================================================
+
+The reference use of this document is TEP 1 (itself).
+
+5. Acknowledgments
+====================================================================
+
+The definitions of the compliance terms are a direct copy of
+definitions taken from IETF RFC 2119.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 290 5283
+|
+| email - pal@cs.berkeley.edu
+
+7. Citations
+====================================================================
+
+.. [1] reStructuredText Markup Specification. 
+ 
diff --git a/doc/txt/tep101.txt b/doc/txt/tep101.txt
new file mode 100644
index 00000000..eb78fa0b
--- /dev/null
+++ b/doc/txt/tep101.txt
@@ -0,0 +1,517 @@
+===================================
+Analog-to-Digital Converters (ADCs)
+===================================
+
+:TEP: 101
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay
+
+:Draft-Created: 20-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   [TEP1]_.
+
+
+Abstract
+====================================================================
+
+This TEP proposes a hardware abstraction for TinyOS 2.x analog-to-digital
+converters (ADCs). It focuses on aligning the ADC abstraction with the
+three-layer Hardware Abstraction Architecture (HAA) described in [TEP2]_, but
+addresses only the HPL and HAL, because the highest level abstraction of an
+ADC is platform-dependent.
+
+1. Introduction
+====================================================================
+
+Analog-to-digital converters (ADCs) are devices that convert analog input
+signals to discrete digital output signals, typically voltage to a digital
+number.  The interested reader can refer to Appendix A for a brief overview of
+the ADC hardware on some current TinyOS platforms.  In earlier versions of
+TinyOS, the distinction between a sensor and an ADC were blurred: this led
+components that had nothing to do with an ADC to still resemble one
+programatically, even though the semantics and forms of operation were
+completely different.  To compensate for the difference non-ADC sensors
+introduced additional interfaces, such as ADCError, that were tightly bound to
+sensor acquisition but separate in wiring. The separation between the ADC and
+ADCError interface is bug prone and problematic, as is the equation of a
+sensor and an ADC. TinyOS 2.x separates the structure and interfaces of an ADC
+from those of sensors (which may be on top of an ADC, but this fact is hidden
+from higher level components). This TEP presents how TinyOS 2.x decomposes and
+structures ADC software. TEP 109 (Sensor Boards) shows how a platform can
+present actual named sensors [TEP109]_.
+
+As can be seen in Appendix A the ADC hardware used on TinyOS platforms differ
+in many respects, which makes it difficult to find a chip independent
+representation for an ADC. Even if there were such a representation, the
+configuration details of an ADC would still depend on the actual device
+producing the input signal (sensor).  Neither a platform independent
+application nor the ADC hardware stack itself has access to this information,
+as it can only be determined on a platform or sensorboard level. For example,
+determining which ADC port a sensor is attached to and how a conversion result
+is to be interpreted is a platform-specific determination. 
+
+In spite of their hardware differences, one aspect represents a common
+denominator of all ADCs: they produce conversion results. In order to
+facilitate sensor software development this capability can be made available
+via chip-independent interfaces for every ADC. However, conversion results
+depend on and have to be interpreted with respect to the platform-specific
+configuration settings (the ADC channel, the applied reference voltage, etc.).
+Therefore the highest level of ADC abstraction consists of
+platform-independent interfaces for ADC data collection and chip-specific
+interfaces for ADC hardware configuration.  The top layer of the ADC stack
+thus remains platform-dependent and consequently the ADC abstraction does not
+include an HIL, but ends with the HAL. Following the principles of the
+HAA [TEP2]_ the HAL of an ADC should also expose the chip-specific capabilities
+for ADC data collection. For example, the ADC12 on the MSP430 MCU supports a
+complex repeat conversion mode for a set of different input channels, which is
+too specific to be represented by a platform-independent data collection
+interface.  Therefore the HAL of an ADC abstraction is broken into two
+sublayers: The bottom HAL layer, called HAL1, exposes the full capabilities of
+the respective ADC in a chip-specific way. It realizes the standard HAL in the
+HAA [TEP2]_ and the HPL lies below it.  On top of the HAL1 sits the HAL2 which
+maps the interfaces it uses from HAL1 to a set of platform-independent
+interfaces for data collection and chip-specific configuration interfaces.
+
+The rest of this TEP specifies:
+
+* the set of platform-independent interfaces for the collection of ADC
+  conversion results (`2. Interfaces`_)
+* guidelines on how an ADC's HAL SHOULD should be split into HAL1 and HAL2 and
+  how the HAL1 SHOULD expose chip-specific interfaces (`3. HAL1 guidelines`_)
+* what components an ADC's HAL2 MUST implement (`4. HAL2 requirements`_)
+* guidelines on how the HAL2 may be structured (`5. HAL2 implementation guidelines`_)
+
+This TEP ends with appendices documenting, as an example, the ADC
+implementation for the TI MSP430 MCU.
+
+
+2. Interfaces
+====================================================================
+
+This TEP proposes to adopt the following three generic, source-independent
+data collection interfaces from [TEP114]_ for the collection of ADC conversion
+results::
+
+  interface Read< size_type >
+  interface ReadNow< size_type >
+  interface ReadStream< size_type >
+
+Every data collection interface is associated with certain chip-specific
+configuration data (e.g. input channel, sample-hold-time, etc.).  How this
+association can be realized is explained in Section `4.  HAL2 requirements`_.
+As the resolution of conversion results is chip-specific, the 'size_type'
+parameter reflects an upper bound for the chip-specific resolution of the
+conversion results - the actual resolution may be smaller, depending on the
+ADC and/or data source (e.g.  uint16_t for a 12-bit ADC). The above interfaces
+are specified in [TEP114]_, in the following their usage is explained with
+respect to ADCs.
+
+Read
+--------------------------------------------------------------------
+
+The Read interface can be used to sample an ADC channel and return a single
+conversion result. It provides no guarantees about when exactly the sampling
+occurs (the request may be buffered). 
+
+ReadNow
+--------------------------------------------------------------------
+
+The ReadNow interface provides more precise control over the time of the
+sampling: If a call to ReadNow.read() succeeds, the ADC starts to sample the
+channel immediately (the request is not buffered). Due to its timing
+constraints the ReadNow interface is always provided in conjunction with an
+instance of the Resource interface. A client MUST request access to the ADC
+via the Resource interface before it can call ReadNow.read() and it MUST
+release access via the Resource interface when it is finished (see [TEP108]_).
+
+ReadStream
+--------------------------------------------------------------------
+
+The ReadStream interface can be used to sample an ADC channel multiple times
+with a specified sampling period. It provides no guarantees about when exactly
+the first sampling occurs, but all subsequent samplings occur with the
+specified sampling period.
+
+
+3. HAL1 guidelines
+====================================================================
+
+As explained in `1. Introduction`_ the HAL of an ADC abstraction consists of
+two sublayers, HAL1 and HAL2. In the ADC component stack the HAL1 resides
+below HAL2 and above the HPL. It exposes the full capabilities of the ADC in a
+chip-specific way and has the same function as the 'traditional' HAL in the
+HAA [TEP2]_. Therefore only chip- and platform-dependent clients MAY wire to
+the HAL1. Although the HAL1 is chip-specific, both, in terms of implementation
+and representation, its design SHOULD follow the guidelines described below to
+facilitate the mapping to platform-independent interfaces on the level of
+HAL2. Appendix B shows the HAL1 specification for the TI MSP430 MCU.
+
+Resource reservation
+--------------------------------------------------------------------
+
+As the ADC hardware is a shared resource that is multiplexed between several
+clients, it requires access arbitration. Therefore the HAL1 configuration
+component SHOULD provide a parameterized 'Resource' interface, instantiate a
+generic arbiter component and connect the 'Resource' interface to the arbiter
+as described in [TEP108]_. To provide a uniform arbitration service for all
+platforms on the level of HAL2 (see `4. HAL2 requirements`_), all ADCs should
+be arbitrated in round robin fashion, i.e. the HAL1 SHOULD instantiate the
+standard round robin arbiter. On the level of HAL1 a client MUST have
+successfully requested access to the ADC via the 'Resource' interface before
+it can configure / sample a channel. After use it MUST release the ADC via the
+'Resource' interface (see [TEP108]_).
+
+Configuration and sampling
+--------------------------------------------------------------------
+
+As the ADC hardware is a shared resource the HAL1 SHOULD support hardware
+configuration and sampling on a per-client basis (although per-port
+configuration is possible, it is not recommended, because it forces all
+clients to use the same settings for a given port). Therefore an HAL1 SHOULD
+provide "sampling interfaces" parameterized by a client identifier. An HAL1
+client can use its instance of the sampling interface to configure the ADC
+hardware, start the sampling process and get conversion results. It wires to a
+sampling interface using a unique client identifier. All commands and events
+in the sampling interface SHOULD be 'async' to reflect the potential timing
+requirements of clients. An HAL1 MAY provide multiple different parameterized
+sampling interfaces, depending on the hardware capabilities.  This allows to
+differentiate/group ADC functionality, for example single vs.  repeated
+sampling, single channel vs. multiple channels or low-frequency vs.
+high-frequency sampling.  Every sampling interface SHOULD allow the client to
+individually configure the ADC hardware, for example by including the
+configuration data as parameters in the sampling commands.  However, if
+configuration data is passed as a pointer, the HAL1 component MUST NOT
+reference it after the return of the respective command. Appendix B shows the
+HAL1 interfaces for the TI MSP430 MCU.
+
+HAL1 virtualization
+--------------------------------------------------------------------
+
+In order to hide wiring complexities and/or export only a subset of all ADC
+functions generic ADC wrapper components MAY be provided on the level of HAL1
+to be instantiated by chip- and platform-dependent clients.
+
+
+4. HAL2 requirements
+====================================================================
+
+The following components MUST be provided on all platforms that have an ADC::
+
+  AdcReadClient 
+  AdcReadNowClient 
+  AdcReadStreamClient 
+
+These generic components are instantiated and provide access to the ADC  on a
+per-client basis via a platform-independent interface for data collection and
+a chip-specific ADC configuration interface. This section describes the
+representation of the HAL2. Guidelines on how the HAL2 can be implemented are
+discussed in Section `5. HAL2 implementation guidelines`_.  Appendix C shows
+the AdcReadClient for the TI MSP430 MCU.  
+
+The fact that the components use chip-specific ADC configuration interfaces
+(see below) and the fact that the provided interfaces for data-collection must
+be interpreted with respect to the configuration data - for example the
+reference voltage - makes the HAL2 representation chip dependent. Therefore
+the ADC abstraction does not include an HIL.
+
+AdcReadClient
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadClient() {
+    provides {
+      interface Read< size_type >;
+    }
+    uses {
+      // chip-dependent configuration interface
+    }
+  }
+
+The AdcReadClient provides platform-independent access for data collection via
+the 'Read' interface. The actual ADC channel (port) and further configuration
+details are determined by a chip-dependent configuration interface. It is the
+task of the client to wire this interface to a component that provides its ADC
+configuration.  The HAL2 implementation will use this interface to "pull" the
+client's ADC settings when it translates the 'Read.read()' command to a
+chip-specific sampling command. The resolution of the conversion result is
+chip-specific, the 'size_type' parameter represents an upper bound for the
+resolution of the conversion results.
+
+AdcReadNowClient
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadNowClient() {
+    provides {
+      interface Resource;
+      interface ReadNow< size_type >;
+    }
+    uses {
+       // chip-dependent configuration interface
+    }
+  }
+
+The AdcReadNowClient provides platform-independent access for data collection
+via the 'ReadNow' and 'Resource' interface. The actual ADC channel (port) and
+further configuration details are determined by a chip-dependent configuration
+interface. It is the task of the client to wire this interface to a component
+that provides its ADC configuration.  The HAL2 implementation will use this
+interface to "pull" the client's ADC settings when it translates the
+'ReadNow.read()' command to a chip-specific sampling command. A client MUST
+use the 'Resource' interface to request access to the ADC as described in
+[TEP108]_ (the HAL2 implementation SHOULD return the error code 'ERESERVE' if
+the client has not reserved access). The resolution of the conversion result
+is chip-specific, the 'size_type' parameter represents an upper bound for the
+resolution of the conversion result.
+
+AdcReadStreamClient
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadStreamClient() {
+    provides {
+      interface ReadStream< size_type >;
+    }
+    uses {
+       // chip-dependent configuration interface
+    }
+  }
+
+The AdcReadStreamClient provides platform-independent access for data
+collection via the 'ReadStream' interface. The actual ADC channel (port) and
+further configuration details are determined by a chip-dependent configuration
+interface. It is the task of the client to wire this interface to a component
+that provides its ADC configuration.  The HAL2 implementation will use this
+interface to "pull" the client's ADC settings when it translates the
+'ReadStream.read()' command to a chip-specific sampling command. The
+resolution of the conversion results is chip-specific, the 'size_type'
+parameter represents an upper bound for the resolution of the conversion
+results.
+
+5. HAL2 implementation guidelines
+====================================================================
+
+The HAL2 implementation of an ADC stack has two main tasks: It translates a
+platform-independent HAL2 request (from the 'Read', 'ReadNow' or 'ReadStream'
+interface) to a chip-specific HAL1 sampling command and it abstracts from the
+'Resource' interface. The first task cannot be solved in a chip-independent
+way, because it involves chip-specific configuration data. The second task MAY
+be performed by the following library components: ArbitratedReadC, and
+ArbitratedReadStreamC (in tinyos-2.x/tos/system) - refer to the Atmel Atmega
+128 HAL2 implementation (in tinyos-2.x/tos/chips/atm128/adc), for an example.
+Note that since the 'ReadNow' interface is always provided in conjunction with
+a 'Resource' interface the HAL2 implementation does not have to perform the
+ADC resource reservation in this case, but can simply forward an instance of
+the 'Resource' interface from the HAL1 (to AdcReadNowClient).
+
+To support multiple ADC clients the HAL2 implementation should provide
+parameterized 'Read', 'ReadNow' and 'ReadStream' interfaces as well as a
+parameterized chip-specific configuration interface. It should also use an
+instance of the 'Resource' interface (provided by the HAL1) per provided
+'Read' and 'ReadStream' interface to perform automatic resource reservation.
+The HAL2 representation ('AdcReadClient', 'AdcReadNowClient' and
+'AdcReadStreamClient') should ensure the correct wiring between the HAL1 and
+HAL2.
+
+From the perspective of the HAL2 the typical sequence of events is as follows:
+After a client has requested data via the 'Read' or 'ReadStream' interface the
+HAL2 will request access to the HAL1 via the 'Resource' interface, e.g. using
+the library components mentioned above.  When it is signalled the 'granted'
+event, the HAL2 will 'pull' the client's ADC settings and translate the
+client's command to a chip-specific HAL1 sampling command. Once it is
+signalled the conversion result(s) it releases the ADC via the 'Resource'
+interface and forwards the conversion result(s) to the client. When a client
+has requested data via the 'ReadNow' interface the HAL2 translates the
+client's command to the chip-specific HAL1 sampling command without using the
+'Resource' interface (it may check ownership of the client via the
+'ArbiterInfo' interface). In order to reduce state in the HAL2 and facilitate
+the mapping between used and provided interfaces the 'AdcReadClient',
+'AdcReadNowClient' and 'AdcReadStreamClient' should use the same interface
+identifier when it connects the HAL2 to HAL1 (see, for example, the MSP430
+ADC12 implementation in Appendix C).
+
+6. Implementation
+====================================================================
+
+The implementation of the ADC12 stack on the MSP430 can be found in
+``tinyos-2.x/tos/chips/msp430/adc12``:
+
+  * ``HplAdc12P.nc`` is the HPL implementation
+  * ``Msp430Adc12P.nc`` is the HAL1 implementation
+  * ``AdcC.nc`` is the HAL2 implementation
+  * ``AdcReadClientC.nc``, ``AdcReadNowClientC.nc`` and
+    ``AdcReadStreamClientC.nc`` provide access to the ADC on a per-client
+    basis via the interfaces 'Read', 'ReadNow' and 'ReadStream', 
+    respectively, and the msp430-specific ADC configuration 
+    interface ``Msp430Adc12Config.nc``
+
+The Atmel Atmega 128 ADC implementation can be found in
+``tinyos-2.x/tos/chips/atm128/adc``:
+
+  * ``HplAtm128AdcC.nc`` is the HPL implementation
+  * ``Atm128AdcP.nc`` is the HAL1 implementation
+  * ``WireAdcP.nc`` and the library components for arbitrating 'Read', 
+    'ReadNow' and 'ReadStream', ``ArbitratedReadC`` and
+    ``ArbitratedReadStreamC`` (in ``tinyos-2.x/tos/system``), realize
+    the HAL2
+  * ``AdcReadClientC.nc``, ``AdcReadNowClientC.nc`` and
+    ``AdcReadStreamClientC.nc`` provide access to the ADC on a per-client
+    basis via the platform-independent interfaces 'Read', 'ReadNow' and
+    'ReadStream', respectively, and the atmega-specific ADC configuration 
+    interface ``Atm128AdcConfig.nc``
+
+
+Appendix A: Hardware differences between platforms
+====================================================================
+
+The following table compares the characteristics of two microcontrollers
+commonly used in TinyOS platforms:
+
++----------------------+----------------------+---------------------+
+|                      | Atmel Atmega 128     | TI MSP430 ADC12     |
++======================+======================+=====================+
+|Resolution            | 10-bit               | 12-bit              |
++----------------------+----------------------+---------------------+
+|channels              |- 8 multiplexed       |- 8 individually     |
+|                      |  external channels   |  configurable       |
+|                      |- 16 differential     |  external channels  |
+|                      |  voltage input       |- internal channels  |
+|                      |  combinations        |  (AVcc, temperature,|
+|                      |- 2 differential      |  reference voltages)|
+|                      |  inputs with gain    |                     |
+|                      |  amplification       |                     |
++----------------------+----------------------+---------------------+
+|internal reference    | 2.56V                | 1.5V or 2.5V        |
+|voltage               |                      |                     |
++----------------------+----------------------+---------------------+
+|conversion reference  |- positive terminal:  | individually        |
+|                      |  AVcc or 2.56V  or   | selectable per      |
+|                      |  AREF (external)     | channel:            |
+|                      |- negative terminal:  |                     |
+|                      |  GND                 |- AVcc and AVss      |
+|                      |                      |- Vref+ and AVss     |
+|                      |                      |- Veref+ and AVss    |
+|                      |                      |- AVcc and (Vref- or |
+|                      |                      |  Veref-)            |
+|                      |                      |- AVref+ and (Vref-  |
+|                      |                      |  or Veref-)         |
+|                      |                      |- Veref+ and (Vref-  |
+|                      |                      |  or Veref-)         |
++----------------------+----------------------+---------------------+
+|conversion modes      |- single channel      |- single conversion  |
+|                      |  conversion mode     |  mode               |
+|                      |- free running mode   |- repeat single      |
+|                      |  (channels and       |  conversion mode    |
+|                      |  reference voltages  |- sequence mode      |
+|                      |  can be switched     |  (sequence <= 16    |
+|                      |  between samples)    |  channels)          |
+|                      |                      |- repeat sequence    |
+|                      |                      |  mode               |
++----------------------+----------------------+---------------------+
+|conversion clock      |clkADC with prescaler |ACLK, MCLK, SMCLK or |
+|source                |                      |ADC-oscillator (5MHz)|
+|                      |                      |with prescaler       |
+|                      |                      |respectively         |
++----------------------+----------------------+---------------------+
+|sample-hold-time      |1.5 clock cycles      |selectable values    |
+|                      |(fixed)               |from 4 to 1024 clock |
+|                      |                      |cycles               |
++----------------------+----------------------+---------------------+
+|conversion triggering |by software           |by software or timers|
++----------------------+----------------------+---------------------+
+|conversion during     |yes                   |yes                  |
+|sleep mode possible   |                      |                     |
++----------------------+----------------------+---------------------+
+|interrupts            |after each conversion |after single or      |
+|                      |                      |sequence conversion  |
++----------------------+----------------------+---------------------+
+
+
+Appendix B: an HAL1 representation: MSP430 ADC12
+====================================================================
+
+The following shows the HAL1 representation for the ADC12 of the TI MSP430
+MCU. It reflects the four MSP430 ADC12 conversion modes as it lets a client
+sample an ADC channel once ("Single-channel-single-conversion") or repeatedly
+("Repeat-single-channel"), multiple times ("Sequence-of-channels") or multiple
+times repeatedly ("Repeat-sequence-of-channels"). In contrast to the single
+channel conversion modes the sequence conversion modes trigger a single
+interrupt after multiple samples and thus enable high-frequency sampling (a
+sequence conversion mode for multiple different channels is not (yet)
+implemented).::
+
+  configuration Msp430Adc12C 
+  { 
+    provides interface Resource[uint8_t id]; 
+    provides interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; 
+  }  
+
+  interface Msp430Adc12SingleChannel 
+  {   
+    async command error_t getSingleData(const msp430adc12_channel_config_t *config);
+    async command error_t getSingleDataRepeat(const msp430adc12_channel_config_t *config, 
+      uint16_t jiffies);
+    async command error_t getMultipleData( const msp430adc12_channel_config_t *config,
+      uint16_t *buffer, uint16_t numSamples, uint16_t jiffies);
+    async command error_t getMultipleDataRepeat(const msp430adc12_channel_config_t *config, 
+      uint16_t *buffer, uint8_t numSamples, uint16_t jiffies);
+    async event error_t singleDataReady(uint16_t data);
+    async event uint16_t* multipleDataReady(uint16_t *buffer, uint16_t
+      numSamples); 
+  }
+
+There exist two wrapper components, Msp430Adc12ClientC and
+Msp430Adc12RefVoltAutoClientC, which SHOULD be used to eliminate wiring
+errors.
+
+Appendix C: an HAL2 representation: MSP430 ADC12
+====================================================================
+
+The AdcReadClientC component for the MSP430 ADC12 is implemented as follows:
+::
+
+  generic configuration AdcReadClientC() {
+    provides interface Read;
+    uses interface Msp430Adc12Config;
+  } implementation {
+    components AdcC;
+  #ifdef REF_VOLT_AUTO_CONFIGURE     
+    components new Msp430Adc12RefVoltAutoClientC() as Msp430AdcClient;
+  #else
+    components new Msp430Adc12ClientC() as Msp430AdcClient;
+  #endif
+
+    enum {
+      CLIENT = unique(ADCC_SERVICE),
+    };
+
+    Read = AdcC.Read[CLIENT];
+    Msp430Adc12Config = AdcC.Config[CLIENT];
+    AdcC.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+    AdcC.Resource[CLIENT] -> Msp430AdcClient.Resource;
+  #ifdef REF_VOLT_AUTO_CONFIGURE
+    Msp430Adc12Config = Msp430AdcClient.Msp430Adc12Config;
+  #endif 
+  }
+
+Note that the same CLIENT identifier is used for all involved interfaces to
+facilitate the mapping between the HAL2 and HAL1 interfaces. The conditional
+compile directive REF_VOLT_AUTO_CONFIGURE can be used to automatically enable
+the internal reference voltage generator during the sampling process.
+
+.. [TEP1] TEP 1: TEP Structure and Keywords. 
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. 
+.. [TEP108] TEP 108: Resource Arbitration. 
+.. [TEP109] TEP 109: Sensor Boards. 
+.. [TEP114] TEP 114: SIDs: Source and Sink Independent Drivers. 
diff --git a/doc/txt/tep102.txt b/doc/txt/tep102.txt
new file mode 100644
index 00000000..7abc9a0b
--- /dev/null
+++ b/doc/txt/tep102.txt
@@ -0,0 +1,770 @@
+============================
+Timers
+============================
+
+:TEP: 102
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Cory Sharp, Martin Turon, David Gay
+
+:Draft-Created: 22-Sep-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited.  This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+This TEP proposes a Timer design that supports common timing
+requirements both in precision and width across common hardware
+configurations.  This TEP focuses on aligning the Timer abstraction
+with the three-layer Hardware Abstraction Architecture (HAA).
+
+1. Introduction
+====================================================================
+
+Most microcontrollers offer a rich timer system, with features like:
+
+* several counters, possibly of different widths, with multiple clocking options
+* one or more compare registers for each counter, which can trigger
+  interrupts, changes to output pins and changes to the counter value
+* capture of the time of input pin changes
+
+The interested reader can refer to Appendix A for a brief overview of
+the timer hardware on some current TinyOS platforms.
+
+TinyOS does not attempt to capture all this diversity in a
+platform-independent fashion. Instead, following the principles of the
+HAA[_tep2], each microcontroller should expose all this functionality
+via components and interfaces at the HPL and, where appropriate, HAL levels.
+However, two aspects of timers are sufficiently common and important 
+that they should be made available in a well-defined way: measuring time,
+and triggering (possibly repeating) events at specific times. The rest
+of this TEP specifies:
+
+* a set of platform-independent interfaces for counting time and triggering
+  events (`2. Interfaces`_)
+* guidelines on how each microcontroller's HAL SHOULD expose its timer hardware
+  in terms of the above interfaces (`3. HAL guidelines`_)
+* what components a microcontroller's timer HIL MUST implement 
+  (`4. HIL requirements`_)
+* a set of utility components whose use simplifies building the components
+  specified by the HAL guidelines and HIL requirements (`5. Utility components`_)
+
+This TEP ends with appendices documenting, as an example, the mica2
+timer subsystem implementation.
+
+2. Interfaces
+====================================================================
+
+Before presenting the interfaces (2.2), we start with a general
+discussion of the issues of precision, width and accuracy in
+timer interfaces (2.1).
+
+2.1 Precision, Width and Accuracy.
+--------------------------------------------------------------------
+
+Three fundamental properties of timers are *precision*, *width* and
+*accuracy*.
+
+Examples of precision are millisecond, a cycle of a 32kHz clock, and
+microseconds.  All precisions are in "binary" units with respect to
+one second.  That is, one second contains 1024 binary milliseconds,
+32768 32kHz ticks, or 1048576 microseconds.  This TEP emphasizes
+millisecond and 32kHz tick precisions while reasonably accommodating
+other precisions.
+
+Examples of widths are 8-bit, 16-bit, 32-bit, and 64-bit.  The width
+for timer interfaces and components SHOULD be 32-bits.  That is, for
+lack of a good reason, timer interfaces should expose a 32-bit
+interface.  In a number of circumstances there are good reasons not
+to expose a 32-bit interface.  This TEP emphasizes 32-bit widths
+while reasonably accommodating other widths.
+
+Accuracy reflects how closely a component conforms to the precision it
+claims to provide. Accuracy is affected by issues such as clock drift (much
+higher for internal vs crystal oscillators) and hardware limitations. As an
+example of hardware limitations, a mica2 clocked at 7.37MHz cannot offer an
+exact microsecond timer -- the closest it can come is 7.37MHz/8. Rather
+than introduce a plethora of precisions, we believe it is often best to
+pick the existing precision closest to what can be provided, along with
+appropriate documentation. However, the accuracy MUST remain reasonable:
+for instance, it would be inappropriate to claim that a millisecond timer
+is a 32kHz timer.
+
+This TEP parameterizes all interfaces by precision and some
+interfaces by width.  This intentionally makes similar timer
+interfaces with different precision or width mutually incompatible.
+It also allows user code to clearly express and understand the
+precision and width for a given timer interface. Accuracy is not
+reflected in the interface type.
+
+Precision is expressed as an empty type -- TMilli, T32khz, and
+TMicro -- written in the standard Timer.h header like this::
+
+  typedef struct { } TMilli;
+  typedef struct { } T32khz;
+  typedef struct { } TMicro;
+
+Note that the precision names are expressed as either frequency or
+period, whichever is convenient.
+
+2.2 Timer interfaces
+--------------------------------------------------------------------
+
+This TEP proposes these timer interfaces::
+
+  interface Counter< precision_tag, size_type >
+  interface Alarm< precision_tag, size_type >
+  interface BusyWait< precision_tag, size_type >
+  interface LocalTime< precision_tag >
+  interface Timer< precision_tag >
+
+The LocalTime and Timer interfaces are used primarily by user
+applications and use a fixed width of 32-bits.  The Alarm, BusyWait,
+and Counter interfaces are used by the TinyOS timer system and
+advanced user components.
+
+Counter
+--------------------------------------------------------------------
+
+A Counter component will increase the width of a low-level hardware timer 
+by wrapping the overflow event and incrementing its higher order bits.
+These higher order bits are considered extra state over the HPL register
+layer, and therefore qualify all Counters as HAL components.
+The Counter interface returns the current time and provides commands
+and an event for managing overflow conditions.  These overflow
+commands and events are necessary for properly deriving larger width
+Counters from smaller widths.  ::
+
+  interface Counter
+  {
+    async command size_type get();
+    async command bool isOverflowPending();
+    async command void clearOverflow();
+    async event void overflow();
+  }
+
+get() 
+  return the current time.
+
+isOverflowPending() 
+  return TRUE if an overflow interrupt will occur after the outermost
+  atomic block is exits.  FALSE otherwise.
+
+clearOverflow() 
+  cancel the pending overflow interrupt.
+
+overflow() 
+  signals that an overflow in the current time.  That is, the current
+  time has wrapped around from its maximum value to zero.
+
+
+Alarm
+--------------------------------------------------------------------
+
+Alarm components are extensions of Counters that signal an event
+when their Compare register detects the alarm time has been hit.
+All commands and events of the Alarm interface are asynchronous (or
+in "interrupt context").  The Alarm interface provides a set of
+"basic" commands for common usage and provides a set of "extended"
+commands for advanced use.  ::
+
+  interface Alarm
+  {
+    // basic interface
+    async command void start( size_type dt );
+    async command void stop();
+    async event void fired();
+
+    // extended interface
+    async command bool isRunning();
+    async command void startAt( size_type t0, size_type dt );
+    async command size_type getNow();
+    async command size_type getAlarm();
+  }
+
+start(dt) 
+  cancel any previously running alarm and set to fire in dt time units
+  from the time of invocation.  The alarm will only fire once then
+  stop.
+
+stop() 
+  cancel any previously running alarm.
+
+fired() 
+  signals that the alarm has occurred.
+
+isRunning() 
+  return TRUE if the alarm has been started and has not been cancelled
+  or has not yet fired.  FALSE is returned otherwise.
+
+startAt(t0,dt) 
+  cancel any previously running alarm and set to fire at time t1 =
+  t0+dt.  This form allows a delay to be anchored to some time t0
+  taken before the invocation of start.  This is also the form used
+  internally in the timer subsystem to allow the use of the full width
+  of an alarm while being able to detect if the alarm time for a short
+  alarm prematurely elapsed.
+
+getNow() 
+  return the current time in the precision and width of the alarm.
+
+getAlarm() 
+  return the time the currently running alarm will fire or the time
+  that the previously running alarm was set to fire.
+
+
+BusyWait
+--------------------------------------------------------------------
+
+The BusyWait interface replaces the TOSH_uwait macro from TinyOS
+1.x.  ::
+
+  interface BusyWait
+  {
+    async command void wait( size_type dt );
+  }
+
+wait(dt)
+  block for no less than the specified amount of time.
+
+LocalTime
+--------------------------------------------------------------------
+
+The LocalTime interface exposes a 32-bit counter without overflow
+utilities.  This is primarily for application code that does not
+care about overflow conditions.  ::
+
+  interface LocalTime
+  {
+    async command uint32_t get();
+  }
+
+get() 
+  return the current time.
+
+
+Timer
+--------------------------------------------------------------------
+
+All commands and events of the Timer interface are synchronous (or
+in "task context").  The Timer interface provides a set of "basic"
+commands for common usage and provides a set of "extended" commands
+for advanced use.  The Timer interface allows for periodic events.
+::
+
+  interface Timer
+  {
+    // basic interface
+    command void startPeriodic( uint32_t dt );
+    command void startOneShot( uint32_t dt );
+    command void stop();
+    event void fired();
+
+    // extended interface
+    command bool isRunning();
+    command bool isOneShot();
+    command void startPeriodicAt( uint32_t t0, uint32_t dt );
+    command void startOneShotAt( uint32_t t0, uint32_t dt );
+    command uint32_t getNow();
+    command uint32_t gett0();
+    command uint32_t getdt();
+  }
+
+startPeriodic(dt) 
+  cancel any previously running timer and set to fire in dt time units
+  from the time of invocation.  The timer will fire periodically every
+  dt time units until stopped.
+
+startOneShot(dt) 
+  cancel any previously running timer and set to fire in dt time units
+  from the time of invocation.  The timer will only fire once then
+  stop.
+
+stop() 
+  cancel any previously running timer.
+
+fired()
+  signals that the timer has occurred.
+
+isRunning() 
+  return TRUE if the timer has been started and has not been cancelled
+  and has not fired for the case of one-shot timers.  One a periodic
+  timer is started, isRunning will return TRUE until it is cancelled.
+
+isOneShot() 
+  return TRUE if the timer is a one-shot timer.  Return FALSE
+  otherwise if the timer is a periodic timer.
+
+startPeriodicAt(t0,dt) 
+  cancel any previously running timer and set to fire at time t1 =
+  t0+dt.  The timer will fire periodically every dt time units until
+  stopped.
+
+startOneShotAt(t0,dt) 
+  cancel any previously running timer and set to fire at time t1 =
+  t0+dt.  The timer will fire once then stop.
+
+getNow() 
+  return the current time in the precision and width of the timer.
+
+gett0() 
+  return the time anchor for the previously started timer or the time
+  of the previous event for periodic timers.
+
+getdt() 
+  return the delay or period for the previously started timer.
+
+
+3. HAL guidelines
+====================================================================
+
+Platforms typically select a clocking option for each of their
+hardware counters, based on their hardware design (e.g., the mica
+family of motes all run their hardware timer 0 at 32kHz, and the micaz
+mote runs its timer 1 at cpu frequency/256). Platforms SHOULD expose
+the timing functionality of these timers using the Alarm and Counter
+interfaces, in the fashion described below. Platforms MAY expose the
+same hardware timer with different frequencies - use of conflicting
+frequences in the same program SHOULD produce compile-time
+errors.
+
+
+A hardware timer with precision *P* and width *W* SHOULD be exposed as a
+several components::
+
+  configuration CounterPWC {
+    provides interface Counter;
+  } ... 
+  generic configuration AlarmPWC {
+    provides interface Alarm;
+  } ...
+
+and, except if *W* is 32::
+
+  configuration CounterP32C {
+    provides interface Counter;
+  } ... 
+  generic configuration AlarmP32C {
+    provides interface Alarm;
+  } ...
+
+Instantiating the Alarm... components provides a new Alarm independent
+of all prior instantiations. Instantiating such a component "consumes"
+a compare register from the corresponding hardware timer; when no more
+compare registers are available, instantiation SHOULD produce a
+compile-time error (see Appendix B for an example of how to achieve
+this).
+
+For example, the micaz platform includes an AlarmMilli8C and
+AlarmMilli32C components for timer 0 (one instantiation allowed), and
+Alarm32kHz16C and Alarm32kHz32C for timer 1 (three instantiations
+allowed).
+
+4. HIL requirements
+====================================================================
+
+The following component MUST be provided on all platforms::
+  TimerMilliC
+  BusyWaitMicroC
+
+TimerMilliC
+--------------------------------------------------------------------
+
+::
+
+  #define TIMERMILLIC_SERVICE ...
+  configuration TimerMilliC
+  {
+    provides interface Init;
+    provides interface Timer[uint8_t num];
+    provides interface LocalTime;
+  }
+
+A timer is allocated using unique(TIMERMILLIC_SERVICE) to obtain a new
+unique timer number. This timer number is used to index the TimerMilli
+parameterised interface.
+
+BusyWaitMicroC
+--------------------------------------------------------------------
+
+::
+
+  configuration BusyWaitMicroC
+  {
+    provides interface BusyWait;
+  }
+
+BusyWaitMicroC allows applications to busy-wait for a number of
+microseconds. It's use should be restricted to situations where the
+delay is small and setting a timer or alarm would be impractical,
+inefficient or insufficiently precise.
+
+5. Utility components
+====================================================================
+
+A number of platform independent generic components are provided to
+help implementers and advanced users of the TinyOS timer system:
+
+* AlarmToTimerC
+* BusyWaitCounterC
+* CounterToLocalTimeC
+* TransformAlarmC
+* TransformCounterC
+* VirtualizeTimerC
+
+Appendices B and C show how these can be used to help implement
+the timer HAL and HIL.
+
+AlarmToTimerC
+--------------------------------------------------------------------
+
+AlarmToTimerC converts a 32-bit Alarm to a Timer.  ::
+
+  generic component AlarmToTimerC( typedef precision_tag )
+  {
+    provides interface Timer;
+    uses interface Alarm;
+  }
+
+
+BusyWaitCounterC
+--------------------------------------------------------------------
+
+BusyWaitCounterC uses a Counter to block until a specified amount of
+time elapses.  ::
+
+  generic component BusyWaitC( typedef precision_tag,
+    typedef size_type @integer() )
+  {
+    provides interface BusyWait;
+    uses interface Counter;
+  }
+
+
+CounterToLocalTimeC
+--------------------------------------------------------------------
+
+CounterToLocalTimeC converts from a 32-bit Counter to LocalTime.  ::
+
+  generic component CounterToLocalTimeC( precision_tag )
+  {
+    provides interface LocalTime;
+    uses interface Counter;
+  }
+
+
+TransformAlarmC
+--------------------------------------------------------------------
+
+TransformAlarmC decreases precision and/or widens an Alarm.  An
+already widened Counter component is used to help.  ::
+
+  generic component TransformAlarmC( 
+    typedef to_precision_tag,
+    typedef to_size_type @integer(),
+    typedef from_precision_tag,
+    typedef from_size_type @integer(),
+    uint8_t bit_shift_right )
+  {
+    provides interface Alarm as Alarm;
+    uses interface Counter as Counter;
+    uses interface Alarm as AlarmFrom;
+  }
+
+to_precision_tag and to_size_type describe the final precision and
+final width for the provided Alarm.  from_precision_tag and
+from_size_type describe the precision and width for the source
+AlarmFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.
+
+For instance to convert from an Alarm to an
+Alarm, the following TransformAlarmC would be
+created::
+
+  new TransformAlarmC( TMilli, uint32_t, T32khz, uint16_t, 5 )
+
+
+TransformCounterC
+--------------------------------------------------------------------
+
+TransformCounterC decreases precision and/or widens a Counter.  ::
+
+  generic component TransformCounterC(
+    typedef to_precision_tag,
+    typedef to_size_type @integer(),
+    typedef from_precision_tag,
+    typedef from_size_type @integer(),
+    uint8_t bit_shift_right,
+    typedef upper_count_type @integer() )
+  {
+    provides interface Counter as Counter;
+    uses interface Counter as CounterFrom;
+  }
+
+to_precision_tag and to_size_type describe the final precision and
+final width for the provided Counter.  from_precision_tag and
+from_size_type describe the precision and width for the source
+AlarmFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.
+upper_count_type describes the numeric type used to store the
+additional counter bits.  upper_count_type MUST be a type with width
+greater than or equal to the additional bits in to_size_type plus
+bit_shift_right.
+
+For instance to convert from a Counter to a
+Counter, the following TransformCounterC would be
+created::
+
+  new TransformCounterC( TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t )
+
+
+VirtualizeTimerC
+--------------------------------------------------------------------
+
+VirtualizeTimerC uses a single Timer to create up to 255 virtual
+timers.  ::
+
+  generic component VirtualizeTimerC( typedef precision_tag, int max_timers )
+  {
+    provides interface Init;
+    provides interface Timer as Timer[ uint8_t num ];
+    uses interface Timer as TimerFrom;
+  }
+
+Appendix A: Timer hardware on various microcontrollers
+====================================================================
+
+  a. Atmega128
+
+    i. Two 8-bit timers, each allowing
+
+      * 7 prescaler values (division by different powers of 2)
+      * Timer 0 can use an external 32768Hz crystal 
+      * One compare register, with many compare actions (change
+        output pin, clear counter, generate interrupt, etc)
+      
+
+    ii. Two 16-bit timers, each with
+
+      * 5 prescaler values
+      * External and software clocking options
+      * Three compare registers (again with many actions)
+      * Input capture
+
+  b. MSP430
+
+    i. Two 16-bit timers with
+
+      * One with three compare registers
+      * One with eight compare registers
+      * Each from distinct clock source
+      * Each with limited prescalers
+
+  c. Intel PXA27x
+
+    i. One fixed rate (3.25MHz) 32-bit timer with
+
+      * 4 compare registers
+      * Watchdog functionality
+
+    ii. 8 variable rate 32-bit timers with
+
+      * 1 associated compare register each
+      * Individually selectable rates: 1/32768s, 1ms, 1s, 1us
+      * Individually selectable sources: (32.768 external osc,
+        13 Mhz internal clock)
+
+    iii. Periodic & one-shot capability
+
+    iv. Two external sync events
+
+Appendix B: a microcontroller: Atmega 128 timer subsystem
+====================================================================
+
+The Atmega128 exposes its four timers through a common set of interfaces:
+
+  * HplTimer   - get/set current time, overflow event, control, init
+  * HplCompare - get/set compare time, fired event,    control
+  * HplCapture - get/set capture time, captured event, control, config
+
+Parameterising these interfaces by width allows reusing the same interfaces
+for the 8 and 16-bit timers. This simplifies building reusable higher level
+components which are independent of timer width. ::
+
+  interface HplAtm128Timer
+  {
+    /// Timer value register: Direct access
+    async command timer_size get();
+    async command void       set( timer_size t );
+
+    /// Interrupt signals
+    async event void overflow();        //
+  {
+    /// Compare value register: Direct access
+    async command size_type get();
+    async command void      set(size_type t);
+
+    /// Interrupt signals
+    async event void fired();           //
+  {
+    /// Capture value register: Direct access
+    async command size_type get();
+    async command void      set(size_type t);
+
+    /// Interrupt signals
+    async event void captured(size_type t);  // as Alarm;
+    uses interface HplTimer;
+    uses interface HplCompare;
+  } ...
+
+  generic module Atm128CounterC(typedef frequency_tag,
+				typedef timer_size @integer())
+  {
+    provides interface Counter as Counter;
+    uses interface HplTimer as Timer;
+  } ...
+
+Appendix C: a mote: Mica family timer subsystem
+====================================================================
+
+Members of the mica family (mica2, mica2dot, micaz) use the Atmega128
+microprocessor and have external crystals at 4 or 7.37MHz. Additionally,
+they can be run from an internal oscillator at 1, 2, 4, or 8 MHz. The
+internal oscillator is less precise, but allows for much faster startup
+from power-down and power-save modes (6 clocks vs 16000 clocks). Finally,
+power consumption is lower at the lower frequencies. 
+
+The mica family members support operation at all these frequencies via
+a ``MHZ`` preprocessor symbol, which can be defined to 1, 2, 4, or 8.
+If undefined, it defaults to a platform-dependent value (4 for mica2dot,
+8 for mica2 and micaz).
+
+The mica family configures its four timers in part based on the value
+of this MHZ symbol:
+
+* Timer 0: divides the external 32768Hz crystal by 32 to build AlarmMilli8C
+  and AlarmMilli32C (see Section 3). As timer 0 has a single compare
+  register, these can only be instantiated once.
+  Timing accuracy is as good as the external crystal.
+* Timer 1: the 16-bit hardware timer 1 is set to run at 1MHz if possible.
+  However, the set of dividers for timer 1 is limited to 1, 8,
+  64, 256 and 1024. So, when clocked at 2 or 4MHz, a divider of 1 is
+  selected and timer 1 runs at 2 or 4MHz. To reflect this fact, the 
+  HAL components exposing timer 1 are named ``CounterOne16C`` and
+  ``AlarmOne16C`` (rather than the ``CounterMicro16C`` ``AlarmMicro16C``
+  as suggested in Section 3).
+
+  When building the 32-bit counter and 32-bit alarms, the rate of
+  timer 1 is adjusted in software to 1MHz. Thus the 32-bit HAL components
+  for timer *are* named ``CounterMicro32C`` and ``AlarmMicro32C``.
+
+  Three compare registers are available on timer1, so up to three instances
+  of ``AlarmOne16C`` and/or ``AlarmMicro32C`` can be created. The timing
+  accuracy depends on how the mote is clocked:
+
+  - internal clock: depends on how well the clock is calibrated
+  - external 7.37MHz crystal: times will be off by ~8.6%
+  - external 4MHz crystal: times will be as accurate as the crystal
+* Timer 2: this timer is not currently exposed by the HAL.
+
+* Timer 3: the 16-bit hardware timer 3 is set to run at a rate close to
+  32768Hz, if possible. As with timer 1, the limited set of dividers makes
+  this impossible at some clock frequencies, so the 16-bit timer 3 HAL
+  components are named ``CounterThree16C`` and ``AlarmThree16C``. As 
+  with timer 1, the rate of timer 3 is adjusted in software when
+  building the 32-bit counter and 32-bit alarms, giving components
+  ``Counter32khz32C`` and ``Alarm32khz32C``. As with timer 1, three compare
+  registers, hence up to three instances of ``Alarm32khz32C`` and/or
+  ``AlarmThree16C`` are available.
+
+  At 1, 2, 4 and 8MHz, ``Counter32khz32C`` and ``Alarm32khz32C`` run
+  at 31.25kHz (plus clock rate inaccuracy). At 7.37MHz, they run at
+  ~28.8kHz.
+
+When an Atmega128 is in any power-saving mode, hardware timers 1, 2 and 3
+stop counting. The default Atmega128 power management *will* enter these
+power-saving modes even when timers 1 and 3 are enabled, so time as
+measured by timers 1 and 3 does *not* represent real time.  However, if any
+alarms built on timers 1 or 3 are active, the Atmega128 power management
+will not enter power-saving modes.
+
+The mica family HIL components are built as follows:
+
+* TimerMilliC: built using AlarmMilli32C (consuming its single compare
+  register)
+* BusyWaitMicroC: implemented using a simple software busy-wait loop which
+  waits for ``MHZ`` cycles per requested microsecond. Accuracy is the same as
+  Timer 1.
+
+Finally, the mica family motes measure their clock rate at boot time, based
+on the external 32768Hz crystal. The results of this clock rate measurement
+are made available via the ``cyclesPerJiffy`` command of the
+``Atm128Calibrate`` interface of the ``MeasureClockC`` component. This
+command reports the number of cycles per 1/32768s. Please see this interface
+definition for other useful commands for more accurate timing.
+
diff --git a/doc/txt/tep103.txt b/doc/txt/tep103.txt
new file mode 100644
index 00000000..dac83c91
--- /dev/null
+++ b/doc/txt/tep103.txt
@@ -0,0 +1,557 @@
+==============================================
+Permanent Data Storage (Flash)
+==============================================
+
+:TEP: 103
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: David Gay, Jonathan Hui
+
+:Draft-Created: 27-Sep-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents a set of hardware-independent interfaces to non-volatile
+storage for TinyOS 2.x. It describes some design principles for the HPL and
+HAL layers of various flash chips.
+
+1. Introduction
+====================================================================
+
+Flash chips are a form of EEPROM (electrically-eraseable, programmable
+read-only memory), distinguished by a fast erase capability. However,
+erases can only be done in large units (from 256B to 128kB depending on the
+flash chip). Erases are the only way to switch bits from 0 to 1, and
+programming operations can only switch 1's to 0's. Additionally, some
+chips require that programming only happen once between each erase,
+or that it be in relatively large units (e.g., 256B). 
+
+In the table below, we summarise these differences by categorising
+flash chips by their underlying technology (NOR vs NAND). We also
+include a column for Atmel's AT45DB flash chip family, as it has
+significantly different tradeoffs than other flash chips: ::
+
+
+		   NOR                AT45DB         NAND
+
+  Erase	       :  Slow (seconds)      Fast (ms)	     Fast (ms)
+  Erase unit   :  Large (64KB-128KB)  Small (256B)   Medium (8K-32KB)
+  Writes       :  Slow (100s kB/s)    Slow (60kB/s)  Fast (MBs/s)
+  Write unit   :  1 bit               256B           100's of bytes
+  Bit-errors   :  Low                 Low            High (requires ECC, 
+                                                     bad-block mapping)
+  Read	       :  Fast*               Slow+I/O bus   Fast (but limited by 
+                                                     I/O bus)
+  Erase cycles :  10^4 - 10^5         10^4 **        10^5 - 10^7
+  Intended use :  Code storage        Data storage   Data storage
+  Energy/byte  :  1uJ                 1uJ            .01uJ
+
+  *  Intel Mote2 NOR flash is memory mapped (reads are very fast and can
+     directly execute code)
+  ** Or infinite? Data sheet just says that every page within a sector
+     must be written every 10^4 writes within that sector
+
+The energy/byte is the per-byte cost of erasing plus programming. It is
+derived from the timing and power consumption of erase and write operations
+(for NOR flash, values are for the STMicroelectronics M25P family, for NAND
+flash, values are from a Samsung datasheet). Energy/byte for reads appears
+to depend mostly on how long the read takes (the power consumptions are
+comparable), i.e., on the efficiency of the bus + processor.
+
+Early TinyOS platforms all used a flash chip from the AT45DB
+family. In TinyOS 1.x, this chip could be accessed through three
+different components:
+
+- Using a low-level interface (``PageEEPROMC``) which gave direct
+  access to per-page read, write and erase operations.
+- Using a high-level memory-like interface (``ByteEEPROMC``) with
+  read, write and logging operations.
+- Using a simple file system (``Matchbox``) with sequential-only
+  files [1_].
+
+Some more recent platforms use different flash chips: the ST M25P family (Telos
+rev. B, eyes) and the Intel Strataflash (Intel Mote2). None of the
+three components listed above are supported on these chips:
+
+- The ``PageEEPROMC`` component is (and was intended to be) AT45DB-specific
+- ``ByteEEPROMC`` allows arbitrary rewrites of sections of the flash.
+  This is not readily implementable on a flash chip with large erase units.
+- The ``Matchbox`` implementation was AT45DB-specific. It was not
+  reimplemented for these other chips, in part because it does not 
+  support some applications (e.g., network reprogramming) very well.
+  
+One approach to hiding the differences between different flash chips is to
+provide a disk-like, block interface (with, e.g., 512B blocks). This is the
+approach taken by compact flash cards. However, in the context of TinyOS,
+this approach has several drawbacks:
+
+- This approach is protected by patents, making it difficult to provide
+  in a free, open-source operating system.
+- To support arbitrary block writes where blocks are smaller than the
+  erase unit, and to deal with the limited number of erase cycles/block
+  requires remapping blocks. We believe that maintaining this remapping 
+  table is too expensive on many mote-class devices.
+
+Another approach to supporting multiple flash chips is to build a
+file system (like Matchbox) which can be implemented for multiple
+flash chips. However, TinyOS is currently targeted at running a 
+single application, and many applications know their storage needs
+in advance: for instance, a little space for configuration data, and
+everything else for a log of all sampled data. In such cases, the
+flexibility offered by a filing system (e.g., arbitrary numbers of
+files) is overkill, and may come at the expense of implementation
+and runtime complexity.
+
+Instead, TinyOS 2.x, divides flash chips into separate volumes (with
+sizes fixed at compile-time). Each volume provides a single storage
+abstraction (the abstraction defines the format). So far there are three
+such abstractions: large objects written in a single session,
+small objects with arbitrary reads and writes, and logs. This approach
+has two advantages:
+
+- Each abstraction is relatively easy to implement on a new flash chip, and
+  has relatively little overhead.
+- The problem of dealing with the limited number of erase cycles/block
+  is simplified: it is unlikely that user applications will need to
+  rewrite the same small object 100'000 times, or cycle 100'000 times
+  through their log. Thus the abstractions can mostly ignore the need for
+  "wear levelling" (ensuring that each block of the flash is erased
+  the same number of time, to maximise flash chip lifetime).
+
+New abstractions (including a filing system) can easily be added to this
+framework, or can be built on top of these abstractions.
+
+The rest of this TEP covers some principles for the organisation of
+flash chips (Section 2), then describes the flash volumes and
+storage abstractions in detail (Section 3).
+
+
+2. HPL/HAL/HIL Architecture
+====================================================================
+
+The flash chip architecture dollows the three-layer Hardware
+Abstraction Architecture (HAA), with each chip providing a presentation
+layer (HPL, Section 2.1), adaptation layer (HAL, Section 2.2) and
+platform-independent interface layer (the storage abstractions described in
+Section 3) [2_]. The implementation of these layers SHOULD be found in the
+``tos/chips/CHIPNAME`` directory. If a flash chip is part of a larger
+family with a similar interface, the HAA SHOULD support all family members
+by relying, e.g., on platform-provided configuration information.
+
+Appendix A shows example HPL and HAL specifications for the AT45DB
+and ST M25P chip families.
+
+
+2.1 Hardware Presentation Layer (HPL)
+--------------------------------------------------------------------
+
+The flash HPL has a chip-dependent, system-independent interface. The
+implementation of this HPL is system-dependent. The flash HPL SHOULD be
+stateless. 
+
+To remain platform independent, a flash chip's HPL SHOULD connect to
+platform-specific components
+providing access to the flash chip; these components
+SHOULD be placed in the ``tos/platforms/PLATFORM/chips/CHIPNAME``
+directory. If the flash chip implementation supports a family of 
+flash chips, this directory MAY also contain a file describing the
+particular flash chip found on the platform.
+
+2.2 Hardware Adaptation Layer (HAL)
+--------------------------------------------------------------------
+
+The flash HAL has a chip-dependent, system-independent interface and
+implementation. Flash families with a common HPL SHOULD have a common
+HAL. Flash HAL's SHOULD expose a ``Resource`` interface and automatically
+power-manage the underlying flash chip. Finally, the flash HAL MUST
+provide a way to access the volume information specified by the
+programmer (see Section 3). This allows users to build new flash
+abstractions that interact cleanly with the rest of the flash system.
+
+
+3. Non-Volatile Storage Abstracitons in TinyOS 2.x 
+===================================================================
+
+The HIL implementations are system-independent, but chip (family)
+dependent. They implement the three storage abstractions and
+volume structure discussed in the introduction.
+
+3.1. Volumes
+-------------------------------------------------------------------
+
+The division of the flash chip into fixed-size volumes is specified by
+an XML file that is placed in the application's directory (where one
+types 'make'). The XML file specifies the allocation as follows: ::
+
+  
+    
+    
+    
+    
+  
+
+The name and size parameters are required, while base is optional. The name
+is a string containing one or more characters in [a-zA-Z0-9\_], while size
+and base are in bytes. Each storage chip MUST provide a compile-time tool
+that translates the allocation specification to chip-specific nesC
+code. There is no constraint on how this is done or what code is produced,
+except that the specification to physical allocation MUST be one-to-one
+(i.e. a given specification should always have the same resulting physical
+allocation on a given chip) and the result MUST be placed in the build
+directory. When not specified, the tool may give any suitable physical
+location to a volume. If there is any reason that the physical allocation
+cannot be satisfied, an error should be given at compile time. The tool
+SHOULD be named ``tos-storage-CHIPNAME`` and be distributed with the other
+tools supporting a platform.
+
+The compile-time tool MUST prepend 'VOLUME\_' to each volume name in
+the XML file and '#define' each resulting name to map to a unique
+integer. 
+
+The storage abstractions are accessed by instantiating generic
+components that take the volume macro as argument: ::
+
+  components new BlockStorageC(VOLUME_DELUGE0);
+
+If the named volume is not in the specification, nesC will give a
+compile-time error since the symbol will be undefined.
+
+A volume MUST NOT be used with more than one storage abstraction instance.
+
+
+3.2 Large objects
+------------------------------------------------------------------
+
+The motivating example for large objects is the transmission or long-term
+storage of large pieces of data. For instance, programs in a network-reprogramming
+system, or large data-packets in a reliable data-transmission system. Such
+objects have two interesting characteristics: each byte in the object is
+written at most once, and a full object is written in a single "session"
+(i.e., without the mote rebooting).
+
+This leads to the definition of the ``BlockStorageC`` abstraction for storing
+large objects:
+
+- A large object ranges from a few kilobytes upwards.
+- A large object must be erased before use.
+- A large object must be committed to ensure it survives a reboot or crash;
+  after a commit no more writes may be performed.
+- Random reads are allowed.
+- Random writes are allowed are allowed between erase and commit; data
+  cannot be overwritten.
+
+Large objects are accessed by instantiating a BlockStorageC component
+which takes a volume id argument: ::
+
+  generic configuration BlockStorageC(volume_id_t volid) {
+    provides {
+	interface BlockWrite;
+	interface BlockRead;
+    }
+  } ...
+
+The ``BlockRead`` and ``BlockWrite`` interfaces contain the following
+operations (all split-phase, except ``BlockRead.getSize``):
+
+- ``BlockWrite.erase``: erase the volume. After a reboot or a commit, a
+  volume must be erased before it can be written to.
+
+- ``BlockWrite.write``: write some bytes starting at a given offset. Each
+  byte can only be written once between an erase and the subsequent commit.
+
+- ``BlockWrite.commit``: commit all writes to a given volume. No writes can
+  be performed after a commit until a subsequent erase.
+
+- ``BlockRead.verify``: verify that the volume contains the results of a
+  successful commit.
+
+- ``BlockRead.read``: read some bytes starting at a given offset.
+
+- ``BlockRead.computeCrc``: compute the CRC of some bytes starting at a
+  given offset.
+
+- ``BlockRead.getSize``: return bytes available for large object storage in
+  volume.
+
+For full details on arguments and other considerations, see the comments in
+the interface definitions.
+
+
+3.3 Logging
+------------------------------------------------------------------
+
+Event and reuslt logging is a common requirement in sensor
+networks. Such logging should be reliable (a mote crash should not
+lose data). It should also be easy to extract data from the log,
+either partially or fully. Some logs are *linear* (stop logging when
+the volume is full), others are *circular* (the oldest data is
+overwritten when the volume is full).
+
+The ``LogStorageC`` abstraction supports these requirements.  The log is record
+based: each call to ``LogWrite.append`` (see below) creates a new
+record. On failure (crash or reboot), the log is guaranteed to only lose
+whole records from the end of the log. Additionally, once a circular log
+wraps around, calls to ``LogWrite.append`` only lose whole records from the
+beginning of the log. These guarantees mean that applications do not to
+have worry about incomplete or inconsistent log entries.
+
+Logs are accessed by instantiating a LogStorageC component which takes a
+volume id and a boolean argument: ::
+
+  generic configuration LogStorageC(volume_id_t volid, bool circular) {
+    provides {
+	interface LogWrite;
+	interface LogRead;
+    }
+  } ...
+
+If the ``circular`` argument is TRUE, the log is circular; otherwise
+it is linear.
+
+The ``LogRead`` and ``LogWrite`` interfaces contain the following
+operations (all split-phase except ``LogWrite.currentOffset``,
+``LogRead.currentOffset`` and ``LogRead.getSize``):
+
+- ``LogWrite.erase``: erase the log.
+
+- ``LogWrite.append``: append some bytes to the log. In a circular log,
+  this may overwrite the current read position. In this case, the 
+  read position is implicitly advanced to the log's current beginning
+  (i.e., as if ``LogRead.seek`` had been called with ``SEEK_BEGINNING``).
+
+  Each append creates a separate record. Log implementations may have a
+  maximum record size; all implementations MUST support records of up
+  to 255 bytes.
+
+- ``LogWrite.sync``: guarantee that data written so far will not be lost to
+  a crash or reboot (it can still be overwritten when a circular log wraps
+  around). Using ``sync`` may waste some space in the log.
+
+- ``LogWrite.currentOffset``: return cookie representing current
+  append position (for use with ``LogRead.seek``).
+
+- ``LogRead.read``: read some bytes from the current read position in
+  the log and advance the read position.
+
+- ``LogRead.currentOffset``: return cookie representing current
+  read position (for use with ``LogRead.seek``).
+
+- ``LogRead.seek``: set the read position to a value returned by
+  a prior call to ``LogWrite.currentOffset`` or ``LogRead.currentOffset``,
+  or to the special ``SEEK_BEGINNING`` value. In a circular log, if
+  the specified position has been overwritten, behave as if 
+  ``SEEK_BEGINNING`` was requested.
+
+  ``SEEK_BEGINNING`` positions the read position at the beginning of
+  the oldest record still present in the log.
+
+- ``LogRead.getSize``: return an approximation of the log's capacity.
+  Uses of ``sync`` and other overhead may reduce this number.
+
+For full details on arguments, etc, see the comments in the interface
+definitions.
+
+
+
+3.4 Small objects:
+------------------------------------------------------------------
+
+Sensor network applications may need to store configuration data, e.g.,
+mote id, radio frequency, sample rates, etc. Such data is not large, but
+losing it may lead to a mote misbehaving or losing contact with the
+network.
+
+The ``ConfigStorageC`` abstraction stores a single small object in a volume. It:
+
+- Assumes that configuration data is relatively small (a few
+  hundred bytes).
+- Allows random reads and writes.
+- Has simple transactional behaviour: each read is a separate transaction,
+  all writes up to a commit form a single transaction.
+- At reboot, the volume contains the data as of the most recent successful
+  commit.
+
+Small objects are accessed by instantiating a ConfigStorageC component
+which takes a volume id argument: ::
+
+  generic configuration ConfigStorageC(volume_id_t volid) {
+    provides {
+	interface Mount;
+	interface ConfigStorage;
+    }
+  } ...
+
+A small object MUST be mounted (via the ``Mount`` interface) before 
+the first use.
+
+The ``Mount`` and ``ConfigStorage`` interfaces contain the following
+operations (all split-phase except ``ConfigStorage.getSize`` and
+``ConfigStorage.valid``):
+
+- ``Mount.mount``: mount the volume.
+
+- ``ConfigStorage.valid``: return TRUE if the volume contains a
+  valid small object.
+
+- ``ConfigStorage.read``: read some bytes starting at a given offset.
+  Fails if the small object is not valid. Note that this reads the
+  data as of the last successful commit.
+
+- ``ConfigStorage.write``: write some bytes to a given offset.
+
+- ``ConfigStorage.commit``: make the small object contents reflect all the
+  writes since the last commit.
+
+- ``ConfigStorage.getSize``: return the number of bytes that can be stored
+  in the small object.
+
+For full details on arguments, etc, see the comments in the interface
+definitions.
+
+4. Implementations
+====================================================================
+
+An AT45DB implementation can be found in tinyos-2.x/tos/chips/at45db.
+
+An ST M25P implementation can be found in tinyos-2.x/tos/chips/stm25p.
+
+
+5. Authors' Addresses
+====================================================================
+
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+|
+| Jonathan Hui
+| 657 Mission St. Ste. 600
+| Arched Rock Corporation
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692 0828
+| email - jhui@archedrock.com
+
+6. Citations
+====================================================================
+
+.. [1] David Gay. "Design of Matchbox, the simple filing system for
+   motes. (version 1.0)."
+
+.. [2] TEP 2: Hardware Abstraction Architecture.
+
+
+Appendix A. HAA for some existing flash chips
+====================================================================
+
+A.1 AT45DB
+------------------------------------------------------------------
+ 
+The Atmel AT45DB family HPL is: ::
+
+  configuration HplAt45dbC {
+    provides interface HplAt45db;
+  } ...
+
+The ``HplAt45db`` interface has flash->buffer, buffer->flash, compare
+buffer to flash, erase page, read, compute CRC, and write operations.  Most
+of these operations are asynchronous, i.e., their completion is signaled
+before the flash chip has completed the operation. The HPL also includes 
+operations to wait for asynchronous operations to complete.
+
+A generic, system-independent implementation of the HPL
+(``HplAt45dbByteC``) is included allowing platforms to just provide SPI and
+chip selection interfaces.
+
+Different members of the AT45DB family are supported by specifying a few
+constants (number of pages, page size).
+
+The AT45DB HAL has two components, one for chip access and the other
+providing volume information: ::
+
+  component At45dbC
+  {
+    provides {
+      interface At45db;
+      interface Resource[uint8_t client];
+      interface ResourceController;
+      interface ArbiterInfo;
+    }
+  } ...
+
+  configuration At45dbStorageManagerC {
+    provides interface At45dbVolume[volume_id_t volid];
+  } ...
+
+
+Note that the AT45DB HAL resource management is independent of the
+underlying HPL's power management. The motivation for this is that
+individual flash operations may take a long time, so it may be desirable to
+release the flash's bus during long-running operations. 
+
+The ``At45db`` interface abstracts from the low-level HPL operations by:
+
+- using the flash's 2 RAM buffers as a cache to allow faster reads and
+  writes
+- hiding the asynchronous nature of the HPL operations
+- verifying that all writes were successful
+
+It provides cached read, write and CRC computation, and page erase and
+copy. It also includes flush and sync operations to manage the cache.
+
+The ``At45dbVolume`` interface has operations to report volume size and
+map volume-relative pages to absolute pages.
+
+A.2 ST M25P
+------------------------------------------------------------------
+ 
+The ST M25P family HPL is: ::
+
+  configuration Stm25pSpiC {
+    provides interface Init;
+    provides interface Resource;
+    provides interface Stm25pSpi;
+  }
+
+The ``Stm25pSpi`` interface has read, write, compute CRC, sector erase
+and block erase operations. The implementation of this HPL is
+system-independent, built over a few system-dependent components
+providing SPI and chip selection interfaces.
+
+Note that these two examples have different resource management policies:
+the AT45DB encapsulates resource acquisition and release within each
+operation, while the M25P family requires that HPL users acquire and
+release the resource itself.
+
+The ST M25P HAL is: ::
+
+  configuration Stm25pSectorC {
+    provides interface Resource as ClientResource[storage_volume_t volume];
+    provides interface Stm25pSector as Sector[storage_volume_t volume];
+    provides interface Stm25pVolume as Volume[storage_volume_t volume];
+  }
+
+The ``Stm25pSector`` interface provides volume-relative operations similar
+to those from the HPL interface: read, write, compute CRC and
+erase. Additionally, it has operations to report volume size and remap
+volume-relative addresses. Clients of the ST M25P HAL must implement the
+``getVolumeId`` event of the ``Stm25pVolume`` interface so that the HAL can
+obtain the volume id of each of its clients.
diff --git a/doc/txt/tep106.txt b/doc/txt/tep106.txt
new file mode 100644
index 00000000..11df5a8c
--- /dev/null
+++ b/doc/txt/tep106.txt
@@ -0,0 +1,519 @@
+============================
+Schedulers and Tasks
+============================
+
+:TEP: 106
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis and Cory Sharp
+
+:Draft-Created: 10-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the structure and implementation of tasks
+and task schedulers in TinyOS 2.x.
+
+
+1. Introduction
+====================================================================
+
+TinyOS has two basic computational abstractions: asynchronous events
+and tasks. Early versions of TinyOS provided a single type of task --
+parameter free -- and only a FIFO scheduling policy. While changing
+the latter was possible, the incorporation of tasks into the nesC
+language made it very difficult. Presenting task schedulers as a
+TinyOS component enables much easier customization, and allowing tasks
+to be presented as an interface enables extending the classes of tasks
+available. TinyOS 2.0 takes both approaches, and this memo documents
+the structure of how it does so as well as a simple mechanism that
+greatly increases system dependability.
+
+2. Tasks and the Scheduler in TinyOS 1.x
+====================================================================
+
+Tasks in TinyOS are a form of deferred procedure call (DPC) [1]_, which
+enable a program to defer a computation or operation until a later
+time. TinyOS tasks run to completion and do not pre-empt one
+another.  These two constraints mean that code called from tasks
+runs synchonously with respect to other tasks. Put another way, tasks
+are atomic with respect to other tasks [2]_.
+
+In TinyOS 1.x, the nesC language supports tasks through two
+mechanisms, ``task`` declarations and ``post`` expressions::
+
+  task void computeTask() {
+    // Code here  
+  }  
+
+and::
+
+  result_t rval = post computeTask();
+
+
+TinyOS 1.x provides a single kind of task, a parameter-free function,
+and a single scheduling policy, FIFO. ``post`` expressions can return
+FAIL, to denote that TinyOS was unable to post the task.  Tasks can be
+posted multiple times. For example, if a task is posted twice in quick
+succession and the first succeeds while the second fails, then the
+task will be run once in the future; for this reason, even if a ``post``
+fails, the task may run.
+
+The TinyOS 1.x scheduler is implemented as a set of C functions in the
+file ``sched.c``. Modifying the scheduler requires replacing or
+changing this file. Additionally, as tasks are supported solely through
+nesC ``task`` declarations and ``post`` expressions, which assume
+a parameter-free function, modifying the syntax or capabilities of
+tasks is not possible.
+
+The task queue in TinyOS 1.x is implemented as a fixed size circular
+buffer of function pointers. Posting a task puts the task's function
+pointer in the next free element of the buffer; if there are no free
+elements, the ``post`` returns fail. This model has several issues:
+
+  1) Some components do not have a reasonable response to a failed   post  
+  2) As a given task can be posted multiple times, it can consume more than one element in the buffer
+  3) All tasks from all components share a single resource: one misbehaving component can cause other's posts to fail
+
+Fundamentally, in order for a component A to repost a task after post
+failure, another component B must call a function on it (either a
+command or event). E.g., component A must schedule a timer, or expect
+a retry from its client. However, as many of these systems might
+depend on tasks as well (e.g., timers), it is possible that an
+overflowing task queue can cause the entire system to fail.
+
+The combination of the above three issues mean that one misbehaving
+component can cause TinyOS to hang. Consider, for example, this
+scenario (a real and encountered problem on the Telos platform):
+
+  * A packet-based hardware radio, which issues an interrupt only when it finishes sending a packet
+  * A networking component that handles the interrupt to post a task to signal ``SendMsg.sendDone``.
+  * A sensing component that posts a task when it handles an ``ADC.dataReady`` event
+  * An application component that sends a packet and then sets its ADC sampling rate too high
+
+In this scenario, the sensing component will start handling events at
+a faster rate than it can process them. It will start posting tasks to
+handle the data it receives, until it fills the task queue. At some
+point later, the radio finishes sending a packet and signals its
+interrupt. The networking component, however, is unable to post its
+task that signals ``SendMsg.sendDone()``, losing the event. The
+application component does not try to send another packet until it
+knows the one it is sending completes (so it can re-use the
+buffer). As the ``sendDone()`` event was lost, this does not occur,
+and the application stops sending network traffic.
+
+The solution to this particular problem in TinyOS 1.x is to signal 
+sendDone() in the radio send complete interrupt if the post fails: 
+this violates the sync/async boundary, but the justification is that 
+a *possible* rare race condition is better than *certain* failure. 
+Another solution would be to use an interrupt source to periodically
+retry posting the task; while this does not break the sync/async
+boundary, until the post succeeds the system cannot send packets.  
+The TinyOS 1.x model prevents it from doing any better.
+
+3. Tasks in TinyOS 2.x
+====================================================================
+
+The semantics of tasks in TinyOS 2.x are different than those in 1.x.
+This change is based on experiences with the limitations and run time
+errors that the 1.x model introduces. **In TinyOS 2.x, a basic post will
+only fail if and only if the task has already been posted and has not 
+started execution.** A task can always run, but can only have one 
+outstanding post at any time. 
+
+2.x achieves these semantics by allocating one
+byte of state per task (the assumption is that there will be fewer than 255
+tasks in the system). While a very large number of tasks could make 
+this overhead noticable, it is not significant in practice.
+If a component needs to post a task several times, then the end of 
+the task logic can repost itself as need be.
+
+For example, one can do this::
+
+  post processTask();
+  ...
+  task void processTask() {
+    // do work
+    if (moreToProcess) {
+      post processTask();
+    } 
+  }
+
+
+These semantics prevent several problems, such as the inability to
+signal completion of split-phase events because the task queue is
+full, task queue overflow at initialization, and unfair task
+allocation by components that post a task many times.
+
+TinyOS 2.x takes the position that the basic use case of tasks should
+remain simple and easy to use, but that it should be possible to
+introduce new kinds of tasks beyond the basic use case. TinyOS
+achieves this by keeping ``post`` and ``task`` for the basic case,
+and introducing task interfaces for additional ones. 
+
+Task interfaces allow users to extend the syntax and semantics of
+tasks. Generally, a task interface has an ``async`` command,   post  ,
+and an event, ``run``. The exact signature of these functions are
+up to the interface. For example, a task interface that allows a task
+to take an integer parameter could look like this::
+
+  interface TaskParameter {  
+    async error_t command postTask(uint16_t param);  
+    event void runTask(uint16_t param);  
+  }  
+
+Using this task interface, a component could post a task with a
+``uint16_t`` parameter. When the scheduler runs the task, it will
+signal the ``runTask`` event with the passed parameter, which contains
+the task's logic. Note, however, that this does not save any RAM: if
+anything, it will cost RAM as space must be allocated in the scheduler
+and may then also be allocated in the component. Furthermore, as
+there can only be one copy of a task outstanding at any time, it
+is just as simple to store the variable in the component. E.g.,
+rather than::
+
+  call TaskParameter.postTask(34);
+  ...
+  event void TaskParameter.runTask(uint16_t param) {
+    ...
+  }
+
+one can::
+
+  uint16_t param;
+  ...
+    param = 34;
+    post parameterTask();
+  ...
+  task void parameterTask() {
+    // use param 
+  }
+
+The principal difference between the simplest code for these
+two models is that if the component posts the task twice, it
+will use the older parameter in the TaskParameter example,
+while it will use the newer parameter in the basic task example.
+If a component wants to use the oldest parameter, then it can do
+this::
+
+  if (post myTask() == SUCCESS) {
+    param = 34;
+  }
+
+4. The Scheduler in TinyOS 2.x
+====================================================================
+
+In TinyOS 2.x, the scheduler is a TinyOS component. Every scheduler
+MUST support nesC tasks. It MAY also support any number of
+additional task interfaces. The scheduler component is resonsible for
+the policy of reconciling different task types (e.g., earliest
+deadline first tasks vs. priority tasks).
+
+The basic task in TinyOS 2.x is parameterless and FIFO. Tasks continue
+to follow the nesC semantics of task and post, which are linguistic
+shortcuts for declaring an  interface and wiring it to the
+scheduler component. Appendix A describes how these shortcuts can be
+configured. A scheduler provides a task interface as a parameterized
+interface. Every task that wires to the interface uses the unique()
+function to obtain a unique identifier, which the scheduler uses to
+dispatch tasks.
+
+For example, the standard TinyOS scheduler has this signature::
+
+  module SchedulerBasicP {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    uses interface McuSleep;  
+  }  
+
+A scheduler MUST provide a parameterized TaskBasic interface.
+If a call to TaskBasic.postTask() returns SUCCESS, the scheduler MUST run it
+eventually. The scheduler MUST return SUCCESS to a TaskBasic.postTask()
+operation unless it is not the first call to TaskBasic.postTask() since
+that task's TaskBasic.runTask() event has been signaled. The 
+McuSleep interface is used for microcontroller power management;
+its workings are explained in TEP 112 [3]_.
+
+A scheduler MUST provide the Scheduler interface. 
+The Scheduler interface has commands for initialization and running
+tasks, and is used by TinyOS to execute tasks::
+
+  interface Scheduler {  
+    command void init();  
+    command bool runNextTask(bool sleep);  
+    command void taskLoop();  
+  }  
+
+The init() command initializes the task queue and scheduler data
+structures. runNextTask() MUST run to completion whatever task the
+scheduler's policy decides is the next one: the return value indicates
+whether it ran a task. The bool parameter sleep indicates what the
+scheduler should do if there are no tasks to execute. If sleep is
+FALSE, then the command will return immediately with FALSE as a return
+value. If sleep is TRUE, then the command MUST NOT return until a task
+is executed, and SHOULD put the CPU to sleep until a new task arrives.
+Calls of runNextTask(FALSE) may return TRUE or FALSE; calls of
+runNextTask(TRUE) always return TRUE.   The taskLoop() command tells
+the scheduler to enter an infinite task-running loop, putting the MCU
+into a low power state when the processor is idle: it never returns.
+
+This is the TaskBasic interface::
+
+  interface TaskBasic {  
+    async command error_t postTask();  
+    void event runTask();  
+  }  
+
+When a component declares a task with the   task   keyword in nesC, it
+is implicitly declaring that it uses an instance of the TaskBasic
+interface: the task body is the runTask event. When a component uses the
+``post`` keyword, it calls the postTask command. Each TaskBasic MUST be
+wired to the scheduler with a unique identifier as its parameter. 
+The parameter MUST be obtained with the ``unique`` function in nesC, 
+with a key of ``"TinySchedulerC.TaskBasic"``. The nesC compiler
+automatically does this wiring when the ``task`` and ``post``
+keywords are used.
+
+The SchedulerBasicP implementation uses these identifiers as its queue
+entries. When TinyOS tells the scheduler to run a task, it pulls the
+next identifier off the queue and uses it to dispatch on the
+parameterized TaskBasic interface.
+
+
+5. Replacing the Scheduler
+====================================================================
+
+The TinyOS scheduler is presented as a component named TinySchedulerC.
+The default TinyOS scheduler implementation is a module named
+SchedulerBasicP; the default scheduler component is a configuration
+that provides wire-through of SchedulerBasicP.
+
+To replace the scheduler for a particular application, a developer
+SHOULD put a configuration named TinySchedulerC in the application
+directory: this will replace the default. The scheduler component
+provides a wire-through of the desired scheduler implementation. All
+scheduler implementations SHOULD provide a parameterize TaskBasic
+interface, as SchedulerBasicP does; this supports nesC post statements
+and task declarations. If a scheduler does not provide the TaskBasic
+interface, compiling applications requires modifying the standard
+ncc scheduler parameters (as described in Appendix A). All scheduler 
+implementations MUST provide the Scheduler interface.
+
+For example, imagine a hypothetical scheduler that provides earliest
+deadline first tasks, which are provided through the TaskEdf
+interface::
+
+  interface TaskEdf {  
+    async command error_t postTask(uint16_t deadlineMs);  
+    event void runTask();  
+  }  
+
+The scheduler implementation is named SchedulerEdfP, and provides both
+TaskBasic and TaskEdf interfaces::
+
+  module SchedulerEdfP {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskEdf[uint8_t taskID];  
+  }  
+
+An application that wants to use SchedulerEdfP instead of
+SchedulerBasicP includes a configuration named TinySchedulerC, which
+exports all of SchedulerEdfP's interfaces::
+
+  configuration TinySchedulerC {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskEdf[uint8_t taskID];  
+  }  
+  implementation {  
+    components SchedulerEdfP;  
+    Scheduler = SchedulerEdf;  
+    TaskBasic = SchedulerEdfP;  
+    TaskEDF   = SchedulerEdfP;  
+  }  
+
+For a module to have an earliest deadline first task, it uses the
+TaskEdf interface. Its configuration SHOULD wire it to TinySchedulerC.
+The key used for task unique identifiers MUST be "TinySchedulerC.TaskInterface",
+where *TaskInterface* is the name of the new task interface as presented
+by the scheduler.  For example, the module SomethingP requires two EDF
+tasks::
+
+  configuration SomethingC {  
+    ...  
+  }  
+  implementation {  
+    components SomethingP, TinySchedulerC;  
+    SomethingP.SendTask -> TinySchedulerC.TaskEdf["TinySchedulerC.TaskEdf"];  
+    SomethingP.SenseTask -> TinySchedulerC.TaskEdf["TinySchedulerC.TaskEdf"];  
+  }  
+
+The module SomethingP also has a basic task. The nesC compiler
+automatically transforms task keywords into BasicTask interfaces and
+wires them appropriately. Therefore, for basic tasks, a component
+author can either use the ``task`` and ``post`` keywords or use a TaskBasic
+interface. A component SHOULD use the keywords whenever possible, and it
+MUST NOT mix the two syntaxes for a given task.  This is an example
+implementation of SomethingP that uses keywords for basic tasks::
+
+  module SomethingP {  
+    uses interface TaskEdf as SendTask  
+    uses interface TaskEdf as SenseTask  
+  }  
+  implementation {  
+    // The TaskBasic, written with keywords  
+    task void cleanupTask() { ... some logic ... }  
+    event void SendTask.runTask() { ... some logic ... }  
+    event void SenseTask.runTask() { ... some logic ... }  
+
+    void internal_function() {  
+      call SenseTask.postTask(20);  
+      call SendTask.postTask(100);  
+      post cleanupTask();  
+    }  
+  }  
+
+If the scheduler provides two instances of the same task interface,
+their unique keys are based on the name of the interface as the 
+scheduler presents it (the "as" keyword). For example, imagine
+a scheduler which provides two instances of TaskBasic: standard
+tasks and high-priority tasks. The scheduler always selects a task
+for the high priority queue before the standard queue::
+
+  configuration TinySchedulerC {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskBasic[uint8_t taskID] as TaskHighPriority;  
+  }  
+
+A component that uses a high priority task would then wire to
+TaskHighPriority with the key "TinySchedulerC.TaskHighPriority"::
+
+  configuration SomethingElseC {}  
+  implementation {  
+    components TinySchedulerC as Sched, SomethingElseP;  
+    SomethingElseP.RetransmitTask -> Sched.TaskHighPriority[unique("TinySchedulerC.TaskHighPriority")];  
+  }  
+
+6. Implementation
+====================================================================
+
+The following files in ``tinyos-2.x/tos/system`` contain the reference
+implementations of the scheduler:
+ 
+  * ``SchedulerBasicP.nc`` is the basic TinyOS scheduler, providing
+    a parameterized TaskBasic interface. 
+  * ``TinySchedulerC.nc`` is the default scheduler configuration
+    that wires SchedulerBasicP to McuSleepC [3]_.
+
+
+A prototype of a scheduler that supports EDF tasks can be obtained
+at the URL ``http://csl.stanford.edu/~pal/tinyos/edf-sched.tgz.``
+
+7. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046 
+| email - pal@cs.stanford.edu
+|
+| Cory Sharp
+| 410 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| email - cssharp@eecs.berkeley.edu
+
+8. Citations
+====================================================================
+
+.. [1] Erik Cota-Robles and James P. Held.  "A Comparison of Windows 
+   Driver Model Latency Performance on Windows NT and Windows 98." In
+   *Proceedings of the Third Symposium on Operating System Design
+   and Implementation (OSDI).*
+
+.. [2] David Gay, Philip Levis, Rob von Behren, Matt Welsh, Eric Brewer
+   and David Culler. "The *nesC* Language: A Holistic Approach to Networked
+   Embedded Systems." In *Proceedings of the ACM SIGPLAN 2003 Conference on
+   Programming Language Design and Implementation (PLDI).* 
+
+.. [3] TEP 112: Microcontroller Power Management.
+
+ 
+Appendix A: Changing the Scheduler
+====================================================================
+
+The nesC compiler transforms the   post   and   task   keywords into
+nesC interfaces, wirings, and calls. By default, the statement::
+
+  module a {
+    ...
+  }
+  implementation {
+    task x() {
+      ...
+      post x();
+    } 
+  
+  }
+
+
+is effectively::
+
+  module a {
+    ...
+    provides interface TaskBasic as x;
+  }
+  implementation {
+    event void x.runTask() {
+      ...
+      call x.postTask();
+    }
+  }
+
+Specifically, TinyOS maps a task with name *T* to a TaskBasic
+interface with name *T*. Posting *T* is a call to T.postTask(), and
+the task body is T.runTask(). Finally, *T* is automatically wired to
+TinySchedulerC with a unique() call.
+
+While the fact that tasks are transformed into interfaces is built in
+to the nesC compiler, the exact names can be configured. Each
+platform's   .platform   file passes the   -fnesc-scheduler   option
+to the compiler. The standard option is::
+
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+There are 6 strings passed. They are:
+
+  1) The name of the scheduler component to wire the interface
+     to (TinySchedulerC).
+  2) The unique string used when wiring to the scheduler component's
+     parameterized interface (TinySchedulerC.TaskBasic).
+  3) The name of the interface on the scheduler component (TaskBasic).
+  4) The name of the interface type (TaskBasic).
+  5) The name of the event for running the task (runTask).
+  6) The name of the command for posting the task (postTask).
+
+
+The nescc man page has further details.
+
+
+
diff --git a/doc/txt/tep107.txt b/doc/txt/tep107.txt
new file mode 100644
index 00000000..495d5aaf
--- /dev/null
+++ b/doc/txt/tep107.txt
@@ -0,0 +1,344 @@
+============================
+TinyOS 2.x Boot Sequence
+============================
+
+:TEP: 107
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis 
+
+:Draft-Created: 10-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the structure and implementation of the mote
+boot sequence in TinyOS 2.x.
+
+
+1. Introduction
+====================================================================
+
+TinyOS has a set of calling conventions and semantics in its boot
+sequence. Earlier versions of TinyOS used an interface named
+"StdControl" to take care of system initialization and starting
+required software systems. Experience with several hardware platforms
+showed StdControl to be insufficient, as it provided only a
+synchronous interface. Additionally, StdControl bundled the notion of
+initialization, which happens only at boot, with power management and
+service control. TinyOS 2.x solves these problems by separating what
+was once StdControl into three separate interfaces: one for
+initialization, one for starting and stopping components, and one for
+notification that the mote has booted. This memo describes the TinyOS
+boot sequence and reasons for its semantics.
+
+2. TinyOS 1.x Boot Sequence
+====================================================================
+
+The TinyOS 1.x boot sequence is uniform across most mote platforms
+(TOSSIM has a very different boot sequence, as it is a PC
+program). The module RealMain implements main(), and has the following
+signature::
+
+  module RealMain {
+    uses {
+      command result_t hardwareInit();
+      interface StdControl;
+      interface Pot;
+    }
+  }
+
+
+The mote main() function uses a mix of nesC and C::
+
+  int main() __attribute__ ((C, spontaneous)) {
+    call hardwareInit();
+    call Pot.init(10);
+    TOSH_sched_init();
+         
+    call StdControl.init();
+    call StdControl.start();
+    __nesc_enable_interrupt();
+     
+    while(1) {
+      TOSH_run_task();
+    }
+  }
+
+
+Several problems exist. Some of these calls are artifacts of old
+platforms: the Pot component refers to the mica variable potentiometer
+for controlling radio transmission power, and for other platforms is a
+stub component Some of the calls -- TOSH_sched_init and TOSH_run_task
+-- are C functions that are implemented in other, automatically
+included files. Separation from the nesC component model makes
+changing what lies behind these functions more difficult than normal
+in TinyOS.
+
+More importantly, the initialization sequence has several
+limitations. The component HPLInit implements the hardwareInit command
+(wired by the component Main): hardware initialization may not be part
+of a pure HPL layer. The scheduler is initialized after hardware,
+which means that no hardware initialization can post a task if it
+needs one. The StdControl interface combines component initialization
+(init()) and activation (start()/stop()); if a component needs to be
+initialized by RealMain, it must also be started. Separating these two
+leads to more flexible power management, and distinguishes required
+low-level components that must always be running (such as a Timer)
+from high level components that can be power managed (such as an
+application). Finally, some components that need to often need to be
+started by main, such as a radio, do not follow a synchronous
+start/stop model. In this case, some components can't operate properly
+until the radio starts, but main has no mechanism for waiting for the
+radio start completion event.
+
+
+3. TinyOS 2.x Boot Interfaces
+====================================================================
+
+The TinyOS 2.x boot sequence uses three interfaces:
+
+  * Init, for initializing component/hardware state
+  * Scheduler, for initializing and running tasks
+  * Boot, for signalling that the system has successfully booted
+
+The Init interface has a single command, init()::
+
+  interface Init {
+    command error_t init();
+  }
+
+Init provides a synchronous interface, enabling initialization
+ordering. Unlike normal execution, in which operations from a wide
+range of components need to be interleaved effectively, initialization
+is a sequential, synchronous operation: no component can be started
+until initialization is complete. If a particular component's
+initialization requires waiting for interrupts or other asynchronous
+events, then it must explicitly wait for them (e.g., 
+with a spin loop), MUST NOT return until complete. Otherwise the system
+may start before initialization is complete.
+
+The Scheduler interface is for initializing and controlling task
+execution. It is detailed in TEP 106 [1]_.
+
+The Boot interface has a single event, booted(), which the boot
+sequence signals when it has completed::
+
+  interface Boot {
+    event void booted();
+  }
+
+
+4. TinyOS 2.x Boot Sequence
+====================================================================
+
+The module RealMainP implements the standard TinyOS 2.x boot sequence.
+The configuration MainC wires some of RealMainP's interfaces to
+components that implement standard abstractions and exports the others
+that are application specific. Code above the Hardware Independent
+Layer (TEP 2) SHOULD wire to MainC and not RealMainP::
+
+ 
+  module RealMainP {
+    provides interface Booted;
+    uses {
+      interface Scheduler;
+      interface Init as PlatformInit;
+      interface Init as SoftwareInit;
+    }
+  }
+  implementation {
+    int main() __attribute__ ((C, spontaneous)) {
+      atomic {
+        call Scheduler.init();
+        call PlatformInit.init();
+        while (call Scheduler.runNextTask());
+        call SoftwareInit.init();
+        while (call Scheduler.runNextTask());
+      }
+      __nesc_enable_interrupt();
+      signal Boot.booted();
+      call Scheduler.taskLoop();
+      return -1;
+    }
+    default command error_t PlatformInit.init() { return SUCCESS; }
+    default command error_t SoftwareInit.init() { return SUCCESS; }
+    default event void Boot.booted() { }
+  }
+
+4.1 Initialization
+--------------------------------------------------------------------
+
+The first step in the boot sequence is initializing the system::
+
+  atomic {
+    call Scheduler.init();
+    call PlatformInit.init();
+    while (call Scheduler.runNextTask());
+    call SoftwareInit.init();
+    while (call Scheduler.runNextTask());
+  }
+
+
+The boot sequence has three separate initializations: Scheduler,
+PlatformInit, and SoftwareInit. The boot configuration (MainC) wires
+the first two automatically, to TinySchedulerC (discussed in TEP 106)
+and to PlatformC::
+
+  configuration MainC {
+    provides interface Boot;
+    uses interface Init as SoftwareInit;
+  }
+  implementation {
+    components PlatformC, RealMainP, TinySchedulerC;  
+  
+    RealMainP.Scheduler -> TinySchedulerC;
+    RealMainP.PlatformInit -> PlatformC;
+  
+    // Export the SoftwareInit and Booted for applications
+    SoftwareInit = RealMainP.SoftwareInit;
+    Boot = RealMainP;
+  }
+
+
+MainC exports the Boot and SoftwareInit interfaces for applications to
+wire to. TinySchedulerC is the standard name for the TinyOS
+scheduler. As the initialization sequence requires being able to run
+tasks, the boot sequence initializes it first. The second step of
+initialization is to call PlatformInit.init(), which MainC wires to a
+component named PlatformC. PlatformInit is for initializations which
+must follow a very specific order due to hidden dependencies, e.g., as
+part of making the overall hardware platform operable. One example of
+this sort of initialization is clock calibration. Because PlatformInit
+calls the component PlatformC, each platform can specify the required
+initialization order. As these hidden dependencies must be due to
+hardware, the sequence is platform-specific. A port of TinyOS to a
+new plaform MUST include a component PlatformC which provides
+one and only one instance of the Init interface.
+
+Components whose initialization does not directly depend on hardware
+resources SHOULD wire to MainC.SoftwareInit. If a component requires a
+specific initialization ordering, then it is responsible for
+establishing that ordering. Due to the semantics of Init, this is
+usually quite rare; a component SHOULD NOT introduce initialization
+dependencies unless they are required.
+
+One common approach is for a configuration to "auto-wire" the
+initialization routines of its internal components. The configuration
+does not provide an Init interface. Virtualized services (TEP 108)
+often take this approach, as the service, rather than the clients, is
+what needs to be initialized. For example, the standard Timer
+virtualization (TEP 102), TimerMilliC, wires to TimerMilliP, which is
+a very simple configuration that takes the underlying implementation
+(HilTimerMilliC) and wires it to MainC::
+
+  configuration TimerMilliP {
+    provides interface Timer as TimerMilli[uint8_t id];
+  }
+  implementation {
+    components HilTimerMilliC, MainC;
+    MainC.SoftwareInit -> HilTimerMilliC;
+    TimerMilli = HilTimerMilliC; 
+  }
+
+Rather than require an application to wire HilTimerMilliC to MainC,
+TimerMilliP does it automatically. When a component instantiates a
+TimerMilliC, that names TimerMilliP, which will automatically make
+sure that the timer system is initialized when TinyOS boots.
+
+
+4.2 Interrupts in Initialization
+--------------------------------------------------------------------
+
+Interrupts are not enabled until all calls to Init.init have returned.
+If a component's initialization needs to handle interrupts, it can
+do one of three things:
+
+  1) If a status flag for the interrupt exists, the Init.init()
+     implementations SHOULD use a spin loop to test for when
+     an interrupt has been issued.
+  2) If no such flag exists, the Init.init() implementation MAY
+     temporarily enable interrupts, if doing so will not cause any other
+     components to handle an interrupt. That is, if a component enables
+     an interrupt, it MUST NOT enable interrupts whose handlers would
+     invoke any other component. Furthermore, when Init.init() exits,
+     the interrupts must be disabled.
+  3) If no such flag exists and there is no way to isolate which
+     interrupt handlers are called, then the component MUST rely
+     on mechanisms outside the Init sequence, such as SplitControl.
+
+The boot sequence assumes that 1) is by far the dominant case. There
+are, however, possible situations where a component might need to
+handle an interrupt because of, e.g., hardware limitations (no pending
+flag) or to catch a brief edge transition. In these cases, a component
+can handle an interrupt in the boot sequence only if doing so will not
+cause any other component to handle an interrupt. As they have all
+been written assuming that interrupts are not enabled until after Init
+completes, making one of them handle an interrupt could cause it to 
+fail.
+
+Depending on what capabilities the hardware provides, there are
+several ways to meet these requirements. The simplest is to push these
+initialization edge cases out of the main boot sequence, e.g., into
+SplitControl. A second possibility is to redirect the interrupt table,
+if the MCU supports doing so. Whichever mechanism is chosen, extreme
+care needs to be used in order to not disrupt the operation of other
+components.
+
+Unless part of a hardware abstraction architecture (HAA) [2]_, the
+Init.init() command MUST NOT assume that other components have been
+initialized unless it has initialized them, and MUST NOT call any
+functional interfaces on any components that might be shared. An HAA
+component MAY make other calls to initialize hardware state. A
+component that is not part of an HAA SHOULD NOT call Init.init() on
+other components unless it needs to enforce a temporal ordering on
+initialization.
+
+If a component A depends on another component, B, 
+which needs to be initialized, then A SHOULD wire B's Init directly 
+to the boot sequence, unless there is a temporal ordering requirement to
+the initialization. The purpose of this convention is to simplify
+component initialization and the initialization sequence.
+
+5. Implementation
+====================================================================
+
+The following files in ``tinyos-2.x/tos/system`` contain the reference
+implementations of the TinyOS boot sequence:
+
+  * ``RealMainP.nc`` is the module containing the function ``main``.
+  * ``MainC.nc`` is the configuration that wires RealMainP to
+    PlatformC and TinySchedulerC [1]_.
+
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 290 5283
+|
+| email - pal@cs.berkeley.edu
+
+7. Citations
+====================================================================
+
+.. [1] TEP 106: Schedulers and Tasks.
+
+.. [2] TEP 2: Hardware Abstraction Architecture. 
+ 
diff --git a/doc/txt/tep108.txt b/doc/txt/tep108.txt
new file mode 100644
index 00000000..eff6a559
--- /dev/null
+++ b/doc/txt/tep108.txt
@@ -0,0 +1,540 @@
+============================
+Resource Arbitration
+============================
+
+:TEP: 108
+:Group: Core Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Authors: Kevin Klues, Philip Levis, David Gay, David Culler, Vlado Handziski
+
+:Draft-Created: 28-Mar-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+    This memo documents a part of TinyOS for the TinyOS Community, and
+    requests discussion and suggestions for improvements.  Distribution
+    of this memo is unlimited. This memo is in full compliance with
+    TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the general resource sharing mechanisms for TinyOS
+2.x. These mechanisms are used to allow multiple software components to
+arbitrate access to shared abstractions.
+
+
+1. Introduction
+====================================================================
+
+TinyOS 1.x has two mechanisms for managing shared resources:
+virtualization and completion events. A virtualized resource appears
+as an independent instance of an abstraction, such as the Timer
+interface is TimerC. A client of a Timer instance can use it
+independently of the others: TimerC virtualizes the underlying
+hardware clock into N separate timers.
+
+Some abstractions, however, are not well suited to virtualization:
+programs need the control provided by a physical abstraction. For
+example, components in 1.x share a single communication stack,
+GenericComm.  GenericComm can only handle one outgoing packet at a
+time. If a component tries to send a packet when GenericComm is
+already busy, then the call returns FAIL. Therefore, shared use of
+GenericComm follows a first-come, first-served arbitration policy. If
+a component sends a packet but GenericComm is busy, the component
+needs a way to tell when GenericComm is free so it can retry. TinyOS
+1.x provides the mechanism of a global completion event which is
+signalled whenever a packet send completes. Interested components can
+handle this event and retry.
+
+The approach to physical (rather than virtualized) abstractions 
+has several drawbacks:
+
+- If you need to make several requests, you have to handle the
+  possibility of a request returning FAIL at any point. This complicates  
+  implementations by adding internal states.
+
+- You have no control over the timing of a sequence of operations. One
+  example of when this can be a problem is timing-sensitive use of an 
+  A/D converter.
+
+- If a hardware resource supports reservation, you cannot express this
+  via this software interface. For instance, I2C buses have a  
+  concept of "repeated start" when doing multiple bus transactions, 
+  but it is not clear how to use this in TinyOS 1.x's I2C abstraction.
+
+- Most TinyOS 1.x services do not provide a very convenient way of
+  monitoring an abstractions's availability for the purpose of retries, 
+  nor very clear documentation of which requests could happen simultaneously.
+
+A single approach to resource sharing is not appropriate for all
+circumstances. For instance, requiring resource reservation allows  
+programs to have better timing guarantees for access to an A/D converter. 
+But if a program does not need precise timing guarantees (e.g., when measuring
+temperature in a biological monitoring application), this extra resource
+reservation step unnecessarily complicates code.
+
+2. Resource Classes
+====================================================================
+
+TinyOS 2.x distinguishes between three kinds of abstractions: 
+*dedicated*, *shared*, and *virtualized*.
+Components offer resource sharing mechanisms appropriate to their
+goals and level of abstraction. As discussed in Section 2.1, access
+control to dedicated abstractions is generally handled
+through nesC interfaces. As discussed in Section 2.2, access control
+to virtualized abstractions is handled through software design
+patterns such as the Service Instance [3]_ and/or
+queueing. Section 2.3 addresses with the most complex class of
+abstraction, shared, while Section 3 describes the
+components and interfaces used to arbitrate access to this class.
+
+Hardware Presentation Layer (HPL) components of the HAA [1]_ are not
+virtual, as virtualization inevitably requires state. Depending on their
+expected use, HPL abstractions are either dedicated or
+shared. For example, while hardware timers are rarely
+multiplexed between multiple components, buses almost always are.
+For example, on the MSP430 microcontroller, compare and counter registers are 
+dedicated, while the USARTs are shared.
+
+2.1 Dedicated
+-------------------------------
+
+An abstraction is *dedicated* if it is a resource
+which a subsystem needs exclusive access to at all times. Examples of
+dedicated abstractions include interrupts and counters.
+Generally, a physical and dedicated abstraction is just an interface 
+which its user wires to. For example, on the Atmega128, Timer 2 is
+presented by the component HplAtm128Timer2C::
+
+  module HplAtm128Timer2C {
+    provides {
+      interface HplTimer   as Timer2;
+      interface HplTimerCtrl8       as Timer2Ctrl;
+      interface HplCompare as Compare2;
+    }
+  }
+
+Dedicated abstractions MAY be annotated with the nesC attribute 
+@atmostonce or @exactlyonce is to provide compile-time checks that
+their usage assumptions are not violated.
+
+2.2 Virtual 
+-------------------------------
+
+*Virtual* abstractions hide multiple clients from each other
+through software virtualization. Every client of the resource thinks it
+has its own independent instance of the resource, but these virtualized
+instances are multiplexed on top of a single underlying resource. Because
+the virtualization is in software, there is no upper bound on the number
+of clients of the abstraction, barring memory or efficiency constraints.
+For example, the TimerMilliC component provides a virtual and shared
+abstraction of millisecond precision timers to application 
+components [2]_. As virtualization usually requires keeping state
+that scales with the number of virtualized instances,
+virtualized resources often use the Service Instance pattern [3]_,
+which is based on a parameterized interface. For example, HilTimerMilliC
+provides multiple virtualized timer clients and auto-wires the
+chip timer implementation (HilTimerMilliC [2]_) to the boot initialization
+sequence::
+
+  configuration TimerMilliP {
+    provides interface Timer as TimerMilli[uint8_t num];
+  }
+  implementation {
+    components HilTimerMilliC, MainC;
+    MainC.SoftwareInit -> HilTimerMilliC;
+    TimerMilli = HilTimerMilliC;
+  }
+
+while TimerMilliC encapsulates this in a generic configuration::
+
+  generic configuration TimerMilliC {
+    provides interface Timer;
+  }
+  implementation {
+    components HilTimerMilliC;
+    Timer = HilTimerMilliC.Timer[unique(UQ_TIMER_MILLI)];
+  }
+
+Virtualization generally allows a client to use a very simple interface.
+This simplicity comes at a cost of reduced efficiency and an inability to
+precisely control the underlying resource. For example, TimerMilli32C
+introduces CPU overhead from dispatching and maintaining all of the 
+virtual timers as well as jitter from when two timers want to fire at
+the same time.
+
+2.3 Shared
+-------------------------------
+
+Dedicated abstractions are useful when a resource is
+always controlled by a single component. Virtualized abstractions are
+useful when clients are willing to pay a bit of overhead and sacrifice
+control in order to share a resource in a simple way. There are
+situations, however, when many clients need precise control of a
+resource. Clearly, they can't all have such control at the same time:
+some degree of multiplexing is needed.
+
+In TinyOS 2.x, a resource *arbiter* is responsible for this
+multiplexing. The arbiter determines which client has access to the
+resource. While a client holds a resource, it has complete and
+unfettered control. Arbiters assume that clients are cooperative, only
+acquiring the resource when needed and holding on to it no longer than
+necessary. Clients explicitly release resources: there is no way for
+an arbiter to forcibly reclaim it.
+
+A motivating example of a shared resource is a bus.
+The bus may have multiple peripherals on it, corresponding to 
+different subsystems. For example, on the Telos platform the flash
+chip (storage) and the radio (network) share a bus. The storage and
+network stacks need exclusive access to the bus when using it,
+but they also need to share it with the other subsystem. In this
+case, virtualization is problematic, as the radio stack needs to be
+able to perform a series of operations in quick succession without
+having to reacquire the bus in each case. Having the bus be a
+physical but shared resource allows the radio stack to 
+send a series of operations atomically across to the radio without
+having to buffer them all up in memory beforehand (which would 
+introduce memory pressure).
+
+3. Resource Arbiters
+====================================================================
+
+Every shared resource has an arbiter to manage which client
+can use the resource at any given time. Because an arbiter is a
+centralized place that knows whether the resource is in use, it also
+provides information useful for a variety of other services, such as
+power management. An arbiter MUST provide a parameterized Resource
+interface as well as an instance of the ArbiterInfo interface. An
+arbiter SHOULD also provide an instance of ResourceController and
+ResourceConfigure interfaces. An arbiter MAY provide additional
+interfaces or instance of interfaces in order to provide a particular
+arbitration policy.
+
+3.1 Resource
+-------------------------------
+
+Clients of a shared resource arbiter request access 
+with the Resource interface::
+
+  interface Resource {
+    async command error_t request();
+    async command error_t immediateRequest();
+    event void granted();
+    async command void release();
+  }
+
+A client lets an arbiter know it needs access to the resource with
+a call to request(). The arbiter signals the granted() event to a
+client when it gains exclusive access to the resource. A client
+can also acquire the resource with immediateRequest(). The 
+return value of this call determines whether the client was able
+to acquire the resource. If immmediateRequest() does not successfully
+acquire the resource (does not return SUCCESS), then it can try to do 
+so in the standard,
+split-phase way with request(). If the call to immediateRequest()
+returns SUCCESS, then the arbiter MUST NOT issue a granted() event.
+
+An arbiter MUST provide a parameterized Resource interface,
+where the parameter is a client ID, following the Service
+Instance pattern [3]_. An arbitrated component SomeNameC MUST 
+#define SOME_NAME_RESOURCE to a string which can be passed to unique() 
+to obtain a client id. For instance, an I2C bus might look like this::
+
+  includes I2CPacketC;
+  configuration I2CPacketC {
+    provides {
+      interface Resource[uint8_t id];
+      interface I2CPacket[uint8_t busId];
+    }
+  } ...
+
+
+where I2CPacketC.h contains the #define for the resource::
+
+
+  #ifndef I2CPACKETC_H
+  #define I2CPACKETC_H
+  #define I2CPACKET_RESOURCE "I2CPacket.Resource"
+  #endif
+
+
+The #define for the unique string must be placed in a separate file
+because of the way nesC files are preprocessed: referring to I2CPacketC
+isn't enough to ensure that macros #define'd in I2CPacketC are visible
+in the referring component.
+
+For example, clients of the I2C service might use it as follows::
+
+  module I2CUserM {
+    uses interface Resource as I2CResource;
+    uses interface I2CPacket;
+  } ...
+
+  #include 
+  configuration I2CUserC { }
+  implementation {
+    components I2CUserM, I2CPacketC;
+
+    I2CUserM.I2CResource -> I2CPacketC.Resource[unique(I2C_RESOURCE)];
+    I2CUserM.I2CPacket -> I2CPacket.I2CPacket[0x73]; // using I2C device 0x73
+  }
+
+3.2 ResourceController
+-------------------------------
+
+An arbiter SHOULD provide one instance of the ResourceController
+interface and MAY provide more than one. The Resource interface is for
+simple and basic use cases, where clients are peers that share the
+resource in some equal fashion. ResourceController is for clients that
+require additional information due to the policies of the arbiter and
+how they use the resource.  The ResourceController interface is based
+on Resource, but introduces two additional events, idle() and
+requested()::
+
+  interface ResourceController {
+    async command error_t request();
+    async command error_t immediateRequest();
+    event void granted();
+    async command void release();
+    async event void requested(); 
+    async event void idle(); 
+  }
+
+
+An arbiter signals the requested event if the client currently has the resource
+and some other client has requested it. It signals the idle() event when 
+no client holds the resource.
+
+ResourceController allows an arbiter to provide a much richer set of
+policies than simple sharing. For example, arbiters that want to
+incorporate a power management policy can provide ResourceController
+for a power management component. The power management component can
+detect when nobody is using the resource with idle(), acquire it
+atomically with immediateRequest(), and power it down. When another
+client requests the resource, the power manager will handle the
+requested() event. It can then power up the resource and release it
+when the power up completes. Note that if power up is a split-phase
+operation (takes a while), then calls by clients to immediateRequest()
+when in powered down state will not return SUCCESS. See TEP 115 for
+details. The default arbiters in TinyOS 2.x (see Section 4) all provide a
+single instance of ResourceController, in order to enable power
+management as described above.
+
+ResourceController can also be used for special case clients: the
+algorithm used to determine when its requests are handled in
+comparison to instances of Resource is arbiter specific. Therefore,
+arbiters MAY provide one or more instances of ResourceController.  For
+example, the FcfsPriorityArbiter has a single high-priority client who
+is always granted access to the resource before any other client.
+Other clients only obtain the resource if the high-priority client has
+not requested it or when the high-priority client releases it.
+
+3.3 ArbiterInfo
+-------------------------------
+
+Arbiters MUST provide an instance of the ArbiterInfo interface.
+The ArbiterInfo interface allows a component to query the current 
+status of an arbiter::
+
+  interface ArbiterInfo {
+    async command bool inUse();
+    async command uint8_t userId();
+  }
+
+
+The ArbiterInfo interface has a variety of uses. For example, the resource 
+implementation can use it to refuse requests from clients that do not
+currently have access. In this case, the abstraction would need to provide
+a parameterized interface for its operations so it could distinguish separate
+clients, and the client ID for its operations would need to be the same
+as the client ID for the arbiter. 
+
+
+3.4 ResourceConfigure
+-------------------------------
+
+The ResourceConfigure interface provides a mechanism for clients that need
+to use a resource with different configurations. Rather than forcing a 
+client to reconfigure the resource itself, the component representing a
+client can wire to an arbiter's ResourceConfigure interface, which is called
+before the client is granted the resource.
+
+For example, the MSP430 USART0 bus can operate in three modes: SPI, I2C, and
+UART. Using all three concurrently is problematic: only one should be enabled
+at a time. However, different clients of the bus might need different bus
+protocols. For example, Telos sensors use an I2C, while the radio and flash
+chip use SPI. 
+
+Arbiters MAY use a parameterized ResourceConfigure interface::
+
+  interface ResourceConfigure {
+    async command void configure();
+    async command void unconfigure();
+  }
+
+
+The parameter is the client ID, and corresponds directly to an instance of
+the Resource interface. For example::
+
+  generic component RoundRobinArbiterC {
+    provides {
+      interface Resource[uint8_t id];
+      interface ResourceController;
+      interface ArbiterInfo;
+    }
+    uses {
+      interface ResourceConfigure[uint8_t id];
+    }
+  }
+
+
+If an arbiter uses the ResourceConfigure interface, before it signals the
+Resource.granted() event and before it returns SUCCESS from a call to
+Resource.immediateRequest(), it MUST call ResourceConfigure.configure() on
+the granted client ID. Similarly, after a valid call to Resource.release(),
+it MUST call ResourceConfigure.unconfigure() on the releasing client ID.
+
+Using a parameterized interface that calls out rather than a decorator
+on the Resource interface simplifies code reuse. Using a decorator
+could lead to a large number of clients all including redundant
+configuration code, while the call out will only have one instance
+of the code. For example, an SPI client might look like this::
+
+  generic component Msp430Spi0ClientC {
+    provides {
+      interface Resource;
+      interface SPIByte;
+      interface SPIPacket;
+    }
+  }
+  implementation {
+    enum {MSP430_SPI0_CLIENT = unique(MSP430_USART_RESOURCE);
+    components Msp430Usart0C, Msp430Spi0Configure as Configure;
+    
+    Resource = Msp430Usart0C.Resource[MSP430_SPI0_CLIENT];
+    Msp430Usart0C.ResourceConfigure[MSP430_SPI0_CLIENT] -> Configure;
+  }
+
+
+Arbiters SHOULD provide a parameterized ResourceConfigure interface.
+
+3.5 Cross-component reservation
+-------------------------------
+
+In some cases, it is desirable to share reservation of resources
+across components. For example, on the TI MSP430, the same pins can
+be used as an I2C bus, a UART, or an SPI connection. Clearly, on this
+chip, a reservation of the I2C bus implicitly reserves the
+corresponding UART and SPI.  This can be accomplished in the framework
+described above by:
+
+1) using the same unique string for all three resources
+
+2) wiring the three parameterised Resource interfaces to the same  
+arbiter
+
+
+The common way to do this is as follows (the UART and SPI components
+are omitted, they are similar to I2CC,  low-level I2C component)::
+
+  #define I2C_RESOURCE MSP_BUS_RESOURCE
+  configuration I2CC {
+    provides interface Resource[uint8_t clientId];
+    provides interface I2C;
+  }
+  implementation {
+    components MspBusC, I2CM;
+
+    Resource = MspBusC.Resource;
+    I2C = I2CM.I2C;
+  }
+
+MspBusC (the arbiter for the MSP bus)::
+
+  #define MSP_BUS_RESOURCE "MspBus.Resource"
+  configuration {
+    provides interface Resource[uint8_t clientId];
+  } ...
+
+
+4. Implementation 
+====================================================================
+
+Because most components use one of a small number of arbitration
+policies, TinyOS includes a number of default resource arbiters. These
+arbiters can be found in ``tinyos-2.x/tos/system`` and are all
+generic components that include this signature::
+
+  generic module ArbiterC {
+    provides interface Resource[uint8_t id];
+    provides interface ResourceController;
+    provides interface ArbiterInfo;
+    uses interface ResourceConfigure[uint8_t id];
+  }
+
+
+For example, ``RoundRobinArbiterC`` provides round-robin arbitration. This
+arbiter assigns a fixed order to all clients and grants outstanding
+requests in that order, which is based on client ID. ``FcfsArbiterC``
+provides a FIFO order, where requests are serviced in the order they
+are received. ``FcfsPriorityArbiterC`` is similar to FcfsArbiterC, but
+provides an additional ResourceController interface for the
+high-priority client.
+
+5. Author's Address
+====================================================================
+
+| Kevin Klues
+| 503 Bryan Hall
+| Washington University
+| St. Louis, MO 63130
+|
+| phone - +1-314-935-6355
+| email - klueska@cs.wustl.edu
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+| David Culler
+| 627 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 643 7572
+| email - culler@cs.berkeley.edu
+|
+|
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| email - handzisk@tkn.tu-berlin.de
+
+6. Citations
+====================================================================
+
+.. [1] TEP 2: Hardware Abstraction Architecture. 
+.. [2] TEP 102: Timers. 
+.. [3] Service Instance Pattern. In *Software Design Patterns for TinyOS.* David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
+
diff --git a/doc/txt/tep109.txt b/doc/txt/tep109.txt
new file mode 100644
index 00000000..f655bc2a
--- /dev/null
+++ b/doc/txt/tep109.txt
@@ -0,0 +1,305 @@
+============================
+Sensor Boards
+============================
+
+:TEP: 109
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: David Gay, Phil Levis, Wei Hong, and Joe Polastre
+
+:Draft-Created: 19-Apr-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents how sensor boards are organized in TinyOS, and the
+general principles followed by the components that provide access to
+its sensors.
+
+1. Introduction
+====================================================================
+
+This document defines the default organization of a sensor board in
+TinyOS. There likely will be sensor boards that cannot conform 
+to this specification, but following as closely to its spirit as possible 
+will simplify generic applications that use a range of sensor boards.
+
+This document assumes that sensors return uninterpreted 16-bit values, and,
+optionally uninterpreted, arbitrary-size calibration data. Conversion of
+sensor values to something with actual physical meaning is beyond the
+scope of this document.
+
+2. Directory Organization
+====================================================================
+
+- A sensor board MUST have a unique name, composed of letters, numbers
+  and underscores. Case is significant, but two sensor boards MUST
+  differ in more than case. This is necessary to support platforms where
+  filename case differences are not significant. We will use SBOARD to
+  denote the sensor board name in the rest of this document.
+
+- Each sensor board MUST have its own directory named SBOARD; default TinyOS
+  sensor boards are placed in tinyos-2.x/tos/sensorboards, but
+  sensor board directories can be placed anywhere as long as the nesC compiler
+  receives a `-I` directive pointing to the sensor board's directory.
+
+- Each sensor board directory MUST contain a `.sensor` file. This file
+  is a perl script which contains any additional compiler settings needed for
+  this sensor board (this file will be empty in many cases). 
+
+- If the sensor board wishes to define any C types or constants, it SHOULD
+  place these in a file named SBOARD.h in the sensor board's directory.
+
+- The sensor board directory SHOULD contain sensor board components
+  for accessing each sensor on the sensor board. The conventions for these
+  components are detailed in Section 3.
+
+- A sensor board MAY include additional components providing alternative or
+  higher-level interfaces to the sensors (e.g., for TinyDB). These components
+  are beyond the scope of this document. 
+
+- Finally, the sensor board MAY contain any number of components,
+  interfaces, C files, etc for internal use. To avoid name collisions, all
+  externally visible names (interface types, components, C constants and
+  types) used for internal purposes SHOULD be prefixed with SBOARD. All such
+  components should end in P.
+
+A simple example: the basic sensor board is named `basicsb`, it's directory
+is `tinyos-2.x/tos/sensorboards/basicsb`. It has no `basicsb.h` file and
+its `.sensor` file is empty. It has two components, `PhotoC` and `TempC`
+representing its light and temperature sensors.
+
+
+
+3. Sensor Board Components
+====================================================================
+
+We have not yet selected any naming conventions for sensor board
+components. Please select reasonable names\ldots
+
+A sensor board component MUST provide:
+
+- An `Init` interface.
+
+- A `StdControl` or `SplitControl` interface for power management.
+
+- A non-empty set of `AcquireData` interfaces for sampling.
+
+A sensor board component MAY provide:
+
+- Some `CalibrationData` interfaces for obtaining calibration data.
+  A calibration interface for a sensor accessed via interface X should
+  be called XCalibration.
+
+- Some `AcquireDataNow` and `AcquireDataBuffered` interfaces, for high-speed 
+  or low-latency data acquisition.
+
+- Any other appropriate interface.
+
+The `CalibrationData` interface is shown below, while `AcquireData`,
+`AcquireDataNow` and `AcquireDataBuffered` are in TEP 101. The
+`AcquireData` interface returns uinterpreted 16-bit data. This might
+represent an A/D conversion result, a counter, etc. The optional
+calibration interface returns uninterpreted, arbitrary-size data.
+
+A sensor board component SHOULD be as lightweight as possible - it should
+just provide basic access to the physical sensors and SHOULD NOT attempt to do
+calibration, signal processing, etc. If such functionality is desired, it
+SHOULD be provided in separate components.
+
+|  ``interface CalibrationData {``
+|    ``/* Collect uninterpreted calibration data from a sensor */``
+|
+|    ``/** Request calibration data``
+|     ``*  @return SUCCESS if request accepted, FAIL if it is refused``
+|     ``*    data error will be signaled if SUCCESS is returned``
+|     ``*/``
+|    ``command result_t get();``
+|
+|   ``/** Returns calibration data``
+|    ``* @param x Pointer to (uinterpreted) calibration data. This data``
+|    ``*   must not be modified.``
+|    ``* @param len Length of calibration data``
+|    ``* @return Ignored.``
+|    ``*/``
+|   ``event result_t data(const void *x, uint8_t len);``
+| ``}``
+
+Some common setups for sensor board components are:
+
+- A single `AcquireData` interface. This is probably the most common case,
+  where a single component corresponds to a single physical sensor, e.g., for
+  light, temperature, pressure and there is no expectation of high sample
+  rates.
+
+- Multiple `AcquireData` interfaces. Some sensors might be strongly
+  related, e.g., the axes of an accelerometer.  A single component could then
+  provide a sensor interface for each axis. For instance, a 2-axis
+  accelerometer which can be sampled at high speed, and which has some
+  calibration data might be declared with:
+
+|  ``configuration Accelerometer2D {``
+|    ``provides {``
+|      ``interface StdControl``
+|      ``interface AcquireData as AccelX;``
+|      ``interface AcquireDataNow as AccelXSingle;``
+|      ``interface AcquireDataBuffered as AccelXMultiple;``
+|      ``interface CalibrationData as AccelXCalibration;``
+|
+|      ``interface AcquireData as AccelY;``
+|      ``interface AcquireDataNow as AccelYSingle;``
+|      ``interface AcquireDataBuffered as AccelYMultiple;``
+|      ``interface CalibrationData as AccelYCalibration;``
+|    ``}``
+|  ``}``
+
+- A parameterised `AcquireData` interface. If a sensor board has multiple
+  similar sensors, it may make sense to provide a single component to access
+  all of these, using a parameterised `AcquireData` interface. For instance,
+  a general purpose sensor board with multiple A/D channels might provide an
+  `AcquireData` interface parameterised by the A/D channel id.
+
+- In all of these examples, if high-speed sampling makes sensor for the
+  sensor (e.g., a microphone), and the sensor is connected in a way that
+  supports high-frequency and/or low-latency access (e.g., via an 
+  on-microcontroller A/D converter), the component should offer 
+  `AcquireDataNow` and `AcquireDataBuffered` interfaces.
+
+Sensor board components MUST respect the following conventions
+on the use of the `Init`, `StdControl`,  and `SplitControl` 
+interfaces.  These are given assuming `StdControl` is used, but the
+behaviour with `SplitControl` is identical except that `start` and `stop`
+are not considered complete until the `startDone` and `stopDone` events are
+signaled. The conventions are:
+
+1) `Init.init`: must be called at mote boot time.
+
+2) `StdControl.start`: ensure the sensor corresponding to this component is
+    ready for use. For instance, this should power-up the sensor if
+    necessary. The application can call `getData` once `StdControl.start`
+    completes.
+
+    If a sensor takes a while to power-up, the sensor board implementer can
+    either use a `SplitControl` interface and signal `startDone`
+    when the sensor is ready for use, or delay `dataReady` events
+    until the sensor is ready. The former choice is preferable.
+
+3) `StdControl.stop`: put the sensor in a low-power mode. 
+   `StdControl.start` must be called before any further readings 
+   are taken. The behaviour of calls to `StdControl.stop` during
+   sampling (i.e., when an `dataReady` event is going to be
+   signaled) is undefined.
+
+`.sensor` File
+====================================================================
+
+This file is a perl script which gets executed as part of the `ncc`
+nesC compiler frontend. It can add or modify any compile-time options 
+necessary for a particular sensor board. It MAY modify the following perl
+variables, and MUST NOT modify any others:
+
+- @new_args: This is the array of arguments which will be
+  passed to nescc. For instance, you might add an include directive
+  to @new_args with push @new_args, `-Isomedir`
+
+- @commonboards: This can be set to a list of sensor board names which
+  should be added to the include path list. These sensor boards must be
+  in tinyos-2.x/tos/sensorboards.
+
+Example: mts3x0
+====================================================================
+
+The mica sensor board (mts300/mts310) has five sensors (and one actuator,
+the sounder) -- the accelerometer and magnetometer are only present on 
+the mts310:
+
++------------------------------------------------------------------+
+
+| Name          | Component | Sensor Interfaces | Other Interfaces |
+
++===============+===========+===================+==================+
+
+| Accelerometer | AccelC    | AccelX            |                  |
+
+|               |           | AccelY            |                  |
+
+| Magnetometer  | MagC      | MagX              | MagSetting       |
+
+|               |           | MagY              |                  |
+
+| Microphone    | MicC      | MicADC            | Mic              |
+
+|               |           |                   | MicInterrupt     |
+
+| Light         | PhotoC    | PhotoADC          |                  |
+
+| Temperature   | TempC     | TempADC           |                  |
+
++------------------------------------------------------------------+
+
+Each physical sensor is represented by a separate component. Specific
+sensors that have more than one axis of measurement (AccelC and MagC)
+provide more than one `AcquireData` interface on a single component. Some
+sensors, such as the magnetometer and microphone, have additional
+functionality provided through sensor-specific interfaces.
+
+Although light and temperature are represented by separate components, in
+reality they share a single microcontroller pin. The two components PhotoC
+and TempC sit on top of the PhotoTempP component, which controls access to
+the shared pin, and orchestrates which sensor is currently connected to
+it. From a programmer's perspective, they appear as individual sensors,
+even though their underlying implementation is a bit more complex.
+
+The board's mts3x0.h file contains private configuration data
+(pin usage, ADC ports, etc).
+
+The mica sensor board has an empty .sensor file.
+
+6. Author's Address
+====================================================================
+
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+|
+| email - david.e.gay@intel.com
+|
+| Wei Hong
+| Arched Rock
+| Berkeley, CA 94704
+|
+| email - wei.hong@gmail.com
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Department
+| 353 Serra Mall
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+| 
+| Joe Polastre
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| email - polastre@cs.berkeley.edu
+
+
diff --git a/doc/txt/tep110.txt b/doc/txt/tep110.txt
new file mode 100644
index 00000000..053fd004
--- /dev/null
+++ b/doc/txt/tep110.txt
@@ -0,0 +1,524 @@
+============================
+Virtualization
+============================
+
+:TEP: 110
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis
+
+:Draft-Created: 20-Jun-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo desribes how TinyOS 2.0 virtualizes common abstractions through
+a combination of static allocation and runtime arbitration. It describes
+the benefits and tradeoffs of this approach and how it is used in several
+major abstractions.
+
+1. Introduction
+====================================================================
+
+The TinyOS component model allows flexible composition, but that
+flexibility is often limited by reasons which are not explicitly
+stated in components. These implicit assumptions can manifest as buggy
+behavior. In TinyOS 1.x, on the Telos platform, if a program
+simultaneously initializes non-volatile storage and the radio, one of
+them will fail: a program has to initialize them serially. They can
+also manifest as compile-time errors: if two separate communication
+services happen to receive packets of the same AM type, the nesC
+compiler will issue a warning due to the buffer swap semantics.
+
+On one hand, the flexbility components provide allows expert users to
+build complex and intricate applications. On the other, it can make
+managing complexity and intricacy very difficult when building very
+simple and basic applications. To promote this latter class of
+development, TinyOS 2.x has the notion of "distributions," which are
+collections of system abstractions that are designed to be used
+together. As long as a user implements an application in terms of the
+distribution, the underlying components will operate correctly and
+there will be no unforseen failures.
+
+This memo documents an example distribution, named OSKI (Operating
+System Key Interfaces). It describes the services OSKI provides and
+how their implementations are structured to simplify application
+writing.
+
+
+2. Distributions
+====================================================================
+
+A distribution presents *services* to the programmer. A service is a
+set of generic (instantiable) components that represent API
+abstractions. To use an abstraction, a programmer instantiates the
+generic. For example, OSKI has the ``AMSenderC`` abstraction for
+sending active messages. The AMSender generic component takes a single
+parameter, the AM type. For example, if a programmer wants a component
+named AppM to send active messages of type 32, the configuration would
+look something like this:
+
+| configuration AppC {}
+| implementation {
+|   components AppM, new AMSenderC(32);
+|   AppM.AMSend -> AMSenderC;
+| }
+
+Services often present abstractions at a fine grain. For example, the
+active message service has AMSender, AMReceiver, and AMSnooper, each
+of which is a separate abstraction.
+
+2.1 Controlling a Service
+--------------------------------------------------------------------
+
+Every service has two abstractions: ``ServiceC``, for powering it on
+and off, and ``ServiceNotifierC``, for learning when the service's
+power state has changed. For example, active messages have the
+``AMServiceC`` and ``AMServiceNotifierC`` abstractions. A service
+abstraction provides the ``Service`` interface
+
+| interface Service {
+|   command void start();
+|   command void stop();
+|   command bool isRunning();
+| }
+
+while a notifier abstraction provides the ``ServiceNotify`` interface
+
+| interface ServiceNotify {
+|   event void started();
+|   event void stopped();
+| }
+
+For example, if a routing layer wants to be able to turn the active
+message layer on and off, then it needs to instantiate an AMServiceC.
+However, many components may be using active messages and have their
+own instances of AMServiceC; while routing might consider it
+acceptable to turn off active messages, other components might
+not. Therefore, a service abstraction does not necessarily represent
+explicit control; instead, each service has a *policy* for how it
+deals with control requests. When a service changes its activity
+state, it MUST signal all instances of its ServiceNotifierC.
+
+For example, the active messages service has an "OR" policy; the
+service remains active if *any* of its ServiceC instances are in the
+on state, and goes inactive if and only if *all* of its ServiceC
+instances are in the off state. This is an example timeline for
+active messages being used by two components, RouterA and RouterB:
+
+1. System boots: active messages are off.
+2. RouterA calls ``Service.start()``. The AM layer is turned on.
+3. All AMServiceNotifierC abstractions signal ``ServiceNotify.started().``
+4. RouterB calls ``Service.start()``.
+5. RouterA calls ``Service.stop()``. RouterB is still using active messages, so the layer stays on.
+6. RouterB calls ``Service.stop()``. The AM layer is turned off.
+7. All AMServiceNotifierC abstractions signal ``ServiceNotify.stopped().``
+
+By default, a service that has a control interface MUST be off. For an
+application to use the service, at least one component has to call
+``Service.start()``.
+
+2.2 Service Initialization
+--------------------------------------------------------------------
+
+Because distributions are collections of services that are designed to
+work together, they can avoid many of the common issues that arise
+when composing TinyOS programs. For example, user code does not have
+to initialize a service; this is done automatically by the
+distribution.  If a user component instantiates a service abstraction,
+the distribution MUST make sure that the service is properly
+initialized. Section 4 goes into an example implementation of how a
+distribution can achieve this.
+
+
+3. OSKI Services
+====================================================================
+
+This section briefly describes the services that OSKI, an example
+distribution provides. It is intended to give a feel for how a
+distribution presents its abstractions. 
+
+3.1 Timers
+--------------------------------------------------------------------
+
+OSKI provides timers at one fidelity: milliseconds. Timers do not have
+a Service abstraction, as their use implicitly defines whether the
+service is active or not (the timer service is off if there are no
+pending timers).  The ``OSKITimerMsC`` component provides the
+abstraction: it provides a single interface, ``Timer``.
+
+This is an example code snippet for instantiating a timer in a
+configuration:
+
+| configuration ExampleC {
+|   uses interface Timer;
+| }
+|
+| configuration TimerExample {}
+| implementation {
+|   components ExampleC, new OSKITimerMsC() as T;
+|   ExampleC.Timer -> T;
+| }
+
+
+3.2 Active Messages
+--------------------------------------------------------------------
+
+OSKI provides four functional active messaging abstractions:
+``AMSender``, ``AMReceiver``, ``AMSnooper``, and
+``AMSnoopingReceiver``. Each one takes an ``am_id_t`` as a parameter,
+indicating the AM type. Following the general TinyOS 2.x approach to
+networking, all active message abstractions provide the ``Packet`` and
+``AMPacket`` interfaces.
+
+AMSender
+  This abstraction is for sending active messages. In addition to Packet
+  and AMPacket, it provides the AMSend interface.
+AMReceiver
+  This abstraction is for receiving active messages addressed to the
+  node or to the broadcast address. In addition to Packet and AMPacket,
+  it provides the Receive interface.
+AMSnooper
+  This abstraction is for receiving active messages addressed to other
+  nodes ("snooping" on traffic). In addition to Packet and AMPacket,
+  it provides the Receive interface.
+AMSnoopingReceiver
+  A union of the functionality of AMReceiver and AMSnooper, this
+  abstraction allows a component to receive *all* active messages
+  that it hears. The AMPacket interface allows a component to determine
+  whether such a message is destined for it. In addition to
+  Packet and AMPacket, this component provides the Receive interface.
+
+This snippet of code is an example of a configuration that composes a
+routing layer with needed active message abstractions. This
+implementation snoops on data packets sent by other nodes to improve
+its topology formation:
+
+| configuration RouterC {
+|   uses interface AMSend as DataSend;
+|   uses interface AMSend as ControlSend;
+|   uses interface Receive as DataReceive;
+|   uses interface Receive as BeaconReceive;
+| }
+|
+| configuration RoutingExample {
+|   components RouterC;
+|   components new AMSender(5) as CSender;
+|   components new AMSender(6) as DSender;
+|   components new AMReceiver(5) as CReceiver;
+|   components new AMSnoopingReceiver(6) as DReceiver;
+|
+|   RouterC.DataSend -> DSender;
+|   RouterC.ControlSend -> CSender;
+|   RouterC.DataReceive -> DReceiver;
+|   RouterC.ControlReceive -> CReceiver;
+| }
+
+The active messages layer has control abstractions, named ``AMServiceC``
+and ``AMServiceNotifierC``. Active messages follow an OR policy.
+
+
+3.3 Broadcasts
+--------------------------------------------------------------------
+
+In addition to active messages, OSKI provides a broadcasting service.
+Unlike active messages, which are addressed in terms of AM addresses,
+broadcasts are address-free. Broadcast communication has two
+abstractions: ``BroadcastSenderC`` and ``BroadcastReceiverC``, both of
+which take a parameter, a broadcast message type. This parameter is
+similar to the AM type in active messages. Both abstractions provide
+the Packet interface. The broadcast service has control abstractions,
+named ``BroadcastServiceC`` and ``BroadcastServiceNotifierC``, which
+follow an OR policy.
+
+3.4 Tree Collection/Convergecast
+--------------------------------------------------------------------
+
+**NOTE: These services are not supported as of the 2.x prerelease. 
+They will be supported by the first full release.**
+
+OSKI's third communication service is tree-based collection routing.
+This service has four abstractions:
+
+CollectionSenderC
+  This abstraction is for sending packets up the collection tree,
+  to the collection root. It provides the Send and Packet interfaces. 
+
+CollectionReceiverC
+  This abstraction is for a collection end-point (a tree root). It
+  provides the Receive, Packet, and CollectionPacket interfaces.
+
+CollectionInterceptorC
+  This abstraction represents a node's ability to view and possibly
+  suppress packets it has received for forwarding. It provides
+  the Intercept, CollectionPacket, and Packet interfaces.
+
+CollectionSnooperC
+  This abstraction allows a node to overhear routing packets
+  sent to other nodes to forward. It provides the Receive,
+  CollectionPacket, and Packet interfaces.
+
+All of the collection routing communication abstractions take a
+parameter, similar to active messages and broadcasts, so multiple
+components can independelty use collection routing. In addition to
+communication, collection routing has an additional abstraction:
+
+CollectionControlC
+  This abstraction controls whether a node is a collection root
+  or not.
+
+Finally, collection routing has ``CollectionServiceC`` and
+``CollectionServiceNotifierC`` abstractions, which follow an OR
+policy.
+
+
+3.5 UART
+--------------------------------------------------------------------
+
+**NOTE: These services are not supported as of the 2.x prerelease. 
+They will be supported by the first full release. 
+They will be fully defined pending discussion/codification of 
+UART interfaces.** 
+
+4. OSKI Service Structure and Design
+====================================================================
+
+Presenting services through abstractions hides the underlying wiring
+details and gives a distribution a great deal of implementation
+freedom. One issue that arises, however, is initialization. If a user
+component instantiates a service, then a distribution MUST make sure
+the service is initialized properly. OSKI achieves this by
+encapsulating a complete service as a working component; abstractions
+export the service's interfaces.
+
+4.1 Example: Timers
+--------------------------------------------------------------------
+
+For example, the timer service provides a single abstraction,
+OskiTimerMilliC, which is a generic component. OskiTimerMilliC provides a
+single instance of the Timer interface. It is implemented as a
+wrapper around the underlying timer service, a component named
+``TimerMilliImplP``, which provides a parameterized interface and
+follows the Service Instance design pattern[sipattern]_:
+
+| generic configuration OskiTimerMilliC() {
+|   provides interface Timer;
+| }
+| implementation {
+|   components TimerMilliImplP;
+|   Timer = TimerMilliImplP.TimerMilli[unique("TimerMilliC.TimerMilli")];
+| }
+
+TimerMilliImplP is a fully composed and working service. It takes
+a platform's timer implementation and makes sure it is initialized through
+the TinyOS boot sequence[boot]_:
+
+| configuration TimerMilliImplP {
+|   provides interface Timer as TimerMilli[uint8_t id];
+| }
+| implementation {
+|   components TimerMilliC, Main;
+|   Main.SoftwareInit -> TimerMilliC;
+|   TimerMilli = TimerMilliC;
+| }
+
+This composition means that if any component instantiates a timer,
+then TimerMilliImplP will be included in the component graph. If
+TimerMilliImplP is included, the TimerMilliP (the actual platform HIL
+implementation) will be properly initialized at system boot time. In
+this case, the order of initialization isn't important; in cases where
+there are services that have to be initialized in a particular
+sequence to ensure proper ordering, the Impl components can
+orchestrate that order. For example, a distribution can wire
+Main.SoftwareInit to a DistributionInit component, which calls
+sub-Inits in a certain order; when a service is included, it wires
+itself to one of the sub-Inits.
+
+The user does not have to worry about unique strings to manage the
+underlying Service Instance pattern: the abstractions take care of
+that.
+
+
+4.2 Example: Active Messages
+--------------------------------------------------------------------
+
+Active messaging reprsent a slightly more complex service, as it has
+several abstractions and a control interface. However, it follows the
+same basic pattern: abstractions are generics that export wirings to
+the underlying service, named ``ActiveMessageImplP``:
+
+| configuration ActiveMessageImplP {
+|   provides {
+|     interface SplitControl;      
+|     interface AMSend[am_id_t id];
+|     interface Receive[am_id_t id];
+|     interface Receive as Snoop[am_id_t id];
+|     interface Packet;
+|     interface AMPacket;
+|   }
+| }
+| 
+| implementation {
+|   components ActiveMessageC, Main;
+| 
+|   Main.SoftwareInit -> ActiveMessageC;
+| 
+|   SplitControl = ActiveMessageC;
+|   AMSend = ActiveMessageC;
+|   Receive = ActiveMessageC.Receive;
+|   Snoop = ActiveMessageC.Snoop;
+|   Packet = ActiveMessageC;
+|   AMPacket = ActiveMessageC;
+| }
+
+For example, this is the AMSender abstraction:
+
+| generic configuration AMSenderC(am_id_t AMId) {
+|   provides {
+|     interface AMSend;
+|     interface Packet;
+|     interface AMPacket;
+|   }
+| }
+| 
+| implementation {
+|   components ActiveMessageImplP as Impl;
+| 
+|   AMSend = Impl.AMSend[AMId];
+|   Packet = Impl;
+|   AMPacket = Impl;
+| }
+
+AMReceiver is similar, except that it wires to the Receive interface,
+while AMSnooper wires to the Snoop interface, and AMSnoopingReceiver
+provides a single Receive that exports both Snoop and Receive (the
+unidirectional nature of the Receive interface makes this simple to
+achieve, as it represents only fan-in and no fan-out).
+
+ActiveMessageImplP does not provide a Service interface; it provides
+the SplitControl interface of the underlying active message
+layer. OSKI layers a *ServiceController* on top of SplitControl. As
+the active message service follows an OR policy, OSKI uses a
+``ServiceOrControllerM``, which is a generic component with the
+following signature:
+
+| generic module ServiceOrControllerM(char strID[]) {
+|   provides {
+|     interface Service[uint8_t id];
+|     interface ServiceNotify;
+|   }
+|   uses {
+|     interface SplitControl;
+|   }
+| }
+
+ServiceOrControllerM follows the Service Instance pattern[sipattern];
+it calls its underlying SplitControl based on the state of each of its
+instances of the Service interface. The parameter denotes the string
+used to generate the unique service IDs. The active messages service
+controller implementation, AMServiceImplP, instantiates a
+ServiceOrControllerM, wires it to ActiveMessageImplP:
+
+| configuration AMServiceImplP {
+|   provides interface Service[uint8_t id];
+|   provides interface ServiceNotify;
+| }
+| implementation {
+|   components ActiveMessageImplP;
+|   components new ServiceOrControllerM("AMServiceImplP.Service");
+|   
+|   Service = ServiceOrControllerM;
+|   ServiceOrControllerM.SplitControl -> ActiveMessageImplP;
+|   ServiceNotify = ServiceOrControllerM;
+| }
+
+AMServiceC then provides an instance of AMServiceImplP.Service:
+
+| generic configuration AMServiceC() {
+|   provides interface Service;
+| }
+|
+| implementation {
+|   components AMServiceImplP;
+| 
+|   Service = AMServiceImplP.Service[unique("AMServiceImplP.Service")];
+| }
+
+Note that the two strings are the same, so that the uniqueCount() in
+the ServiceOrControllerM is correct based on the number of instances
+of AMServiceC. As with timers, encapsulating the service instance
+pattern in generic components relieves the programmer of having to
+deal with unique strings, a common source of bugs in TinyOS 1.x code.
+
+
+4.3 OSKI Requirements
+--------------------------------------------------------------------
+
+OSKI is a layer on top of system components: it presents a more
+usable, less error-prone, and simpler interface to common TinyOS
+functionality. For OSKI to work properly, a platform MUST be compliant
+with the following TEPs:
+
+  o TEP 102: Timers
+  o TEP 106: Schedulers and Tasks
+  o TEP 107: TinyOS 2.x Boot Sequence
+  o TEP 1XX: Active Messages
+  o TEP 1XX: Collection Routing
+
+Not following some of these TEPS MAY lead to OSKI services being
+inoperable, exhibit strange behavior, or being uncompilable.
+
+5. Distribution Interfaces
+====================================================================
+
+The basic notion of a distribution is that it provides a self-contained,
+tested, and complete (for an application domain) programming interface 
+to TinyOS. Layers can be added on top of a distribution, but as a 
+distribution is a self-contained set of abstractions, adding new
+services can lead to failures. A distribution represents a hard line
+above which all other code operates. One SHOULD NOT add new services,
+as they can disrupt the underlying organization. Of course, one MAY
+create a new distribution that extends an existing one, but this is
+in and of itself a new distribution.
+
+Generally, as distributions are intended to be higher-level abstractions,
+they SHOULD NOT provide any asynchronous (async) events. They can, 
+of course, provide async commands. The idea is that no code written on
+top of a distribution should be asynchronous, due to the complexity
+introduced by having to manage concurrency. Distributions are usually
+platform independent; if an application needs async events, then
+chances are it is operating close to the hardware, and so is not
+platform independent.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 290 5283
+|
+| email - pal@cs.berkeley.edu
+
+7. Citations
+====================================================================
+
+.. [rst] reStructuredText Markup Specification. 
+ 
+.. [sipattern] The Service Instance Pattern. In *Software Design Patterns for TinyOS.* David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
+
+.. [boot] TEP 107: TinyOS 2.x Boot Sequence.
diff --git a/doc/txt/tep111.txt b/doc/txt/tep111.txt
new file mode 100644
index 00000000..0dc1ca44
--- /dev/null
+++ b/doc/txt/tep111.txt
@@ -0,0 +1,413 @@
+============================
+message_t
+============================
+
+:TEP: 111
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis
+
+:Draft-Created: 11-Jul-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo covers the TinyOS 2.x message buffer abstraction, ``message_t``.
+It describes the message buffer design considerations, how and where 
+``message_t`` is specified, and how data link layers should access it. 
+
+1. Introduction
+====================================================================
+
+In TinyOS 1.x, a message buffer is a ``TOS_Msg``. A buffer contains an
+active message (AM) packet as well as packet metadata, such as timestamps,
+acknowledgement bits, and signal strength if the packet was received.
+``TOS_Msg`` is a fixed size structure whose size is defined by the maximum
+AM payload length (the default is 29 bytes). Fixed sized buffers allows
+TinyOS 1.x to have zero-copy semantics: when a component receives a
+buffer, rather than copy out the contents it can return a pointer
+to a new buffer for the underlying layer to use for the next received 
+packet.
+
+One issue that arises is what defines the ``TOS_Msg`` structure, as different
+link layers may require different layouts. For example, 802.15.4 radio 
+hardware (such as the CC2420, used in the Telos and micaZ platforms) 
+may require 802.15.4 headers, while a software stack built on top of
+byte radios (such as the CC1000, used in the mica2 platform) can specify 
+its own packet format. This means that ``TOS_Msg`` may be different on
+different platforms.
+
+The solution to this problem in TinyOS 1.x is for there to be a standard
+definition of ``TOS_Msg``, which a platform (e.g., the micaZ) can
+redefine to match its radio. For example, a mica2 mote uses the standard 
+definition, which is::
+
+  typedef struct TOS_Msg {
+    // The following fields are transmitted/received on the radio.
+    uint16_t addr;
+    uint8_t type;
+    uint8_t group;
+    uint8_t length;
+    int8_t data[TOSH_DATA_LENGTH];
+    uint16_t crc;
+
+    // The following fields are not actually transmitted or received
+    // on the radio! They are used for internal accounting only.
+    // The reason they are in this structure is that the AM interface
+    // requires them to be part of the TOS_Msg that is passed to
+    // send/receive operations.
+    uint16_t strength;
+    uint8_t ack;
+    uint16_t time;
+    uint8_t sendSecurityMode;
+    uint8_t receiveSecurityMode;
+  } TOS_Msg;
+
+while on a mote with a CC420 radio (e.g., micaZ), ``TOS_Msg`` is defined as::
+
+  typedef struct TOS_Msg {
+    // The following fields are transmitted/received on the radio.
+    uint8_t length;
+    uint8_t fcfhi;
+    uint8_t fcflo;
+    uint8_t dsn;
+    uint16_t destpan;
+    uint16_t addr;
+    uint8_t type;
+    uint8_t group;
+    int8_t data[TOSH_DATA_LENGTH];
+    
+    // The following fields are not actually transmitted or received
+    // on the radio! They are used for internal accounting only.
+    // The reason they are in this structure is that the AM interface
+    // requires them to be part of the TOS_Msg that is passed to
+    // send/receive operations.
+    
+    uint8_t strength;
+    uint8_t lqi;
+    bool crc;
+    uint8_t ack;
+    uint16_t time;
+   } TOS_Msg;
+
+There are two basic problems with this approach. First, exposing all of
+the link layer fields leads components to directly access the packet
+structure. This introduces dependencies between higher level components
+and the structure layout. For example, many network services built on
+top of data link layers care whether sent packets are acknowledged. They
+therefore check the ``ack`` field of ``TOS_Msg``. If a link layer does not 
+provide acknowledgements, it must still include the ``ack`` field
+and always set it to 0, wasting a byte of RAM per buffer.
+
+Second, this model does not easily support multiple data link layers.
+Radio chip implementations assume that the fields they require are 
+defined in the structure and directly access them. If a platform
+has two different link layers (e.g., a CC1000 *and* a CC2420 radio),
+then a ``TOS_Msg`` needs to allocate the right amount of space for both
+of their headers while allowing implementations to directly access
+header fields. This is very difficult to do in C.
+
+The ``data`` payload is especially problematic. Many
+components refer to this field, so it must be at a fixed offset.
+Depending on the underlying link layer, the header fields 
+preceding it might have different lengths, and packet-level radios
+often require packets to be contiguous memory regions. Overall, these 
+complexities make specifying the format of ``TOS_Msg`` very difficult.
+
+2. message_t
+====================================================================
+
+In TinyOS 2.x, the standard message buffer is ``message_t``. The
+message_t structure is defined in ``tos/types/message.h``::
+
+  typedef nx_struct message_t {
+    nx_uint8_t header[sizeof(message_header_t)];
+    nx_uint8_t data[TOSH_DATA_LENGTH];
+    nx_uint8_t footer[sizeof(message_footer_t)];
+    nx_uint8_t metadata[sizeof(message_metadata_t)];
+  } message_t;
+
+This format keeps data at a fixed offset, which is important when
+passing a message buffer between two different link layers. If the
+data payload were at different offsets for different link layers, then
+passing a packet between two link layers would require a ``memmove(3)``
+operation (essentially, a copy).
+
+The header, footer, and metadata formats are all opaque. Source code
+cannot access fields directly. Instead, data-link layers provide access
+to fields through nesC interfaces.  Section 3 discusses this in 
+greater depth.
+
+Every link layer defines its header, footer, and metadata
+structures. These structures MUST be external structs (``nx_struct``), 
+and all of their fields MUST be external types (``nx_*``), for two 
+reasons. First, external types ensure cross-platform compatibility. 
+Second, it forces structures to be aligned on byte boundaries, 
+circumventing issues with the 
+alignment of packet buffers and field offsets within them.
+For example, the CC1000 radio implementation defines
+its structures in ``CC1000Msg.h``::
+
+  typedef nx_struct cc1000_header {
+    nx_am_addr_t addr;
+    nx_uint8_t length;
+    nx_am_group_t group;
+    nx_am_id_t type;
+  } cc1000_header_t;
+
+  typedef nx_struct cc1000_footer {
+    nxle_uint16_t crc;
+  } cc1000_footer_t;
+
+  typedef nx_struct cc1000_metadata {
+    nx_uint16_t strength;
+    nx_uint8_t ack;
+    nx_uint16_t time;
+    nx_uint8_t sendSecurityMode;
+    nx_uint8_t receiveSecurityMode;
+  } cc1000_metadata_t;
+
+Each link layer defines its structures, but a **platform** is
+responsible for defining ``message_header_t``, ``message_footer_t``,
+and ``message_metadata_t``. This is because a platform may have
+multiple link layers, and so only it can resolve which structures are
+needed. These definitions MUST be in a file in a platform directory
+named ``platform_message.h``. The mica2 platform, for example, has
+two data link layers: the CC1000 radio and the TinyOS serial
+stack [1]_. The serial packet format does not have a footer
+or metadata section. The ``platform_message.h`` of the mica2
+looks like this::
+
+  typedef union message_header {
+    cc1000_header_t cc1k; 
+    serial_header_t serial;
+  } message_header_t;
+
+  typedef union message_footer {
+    cc1000_footer_t cc1k;
+  } message_footer_t;
+  
+  typedef union message_metadata {
+    cc1000_metadata cc1k;
+  } message_metadata_t;
+
+For a more complex example, consider a fictional platform named
+'megamica' that has both a CC1000 and a CC2420 radio. Its
+``platform_message.h`` would look like this::
+
+  typedef union mega_mica_header {
+    cc1000_header_t cc1k;
+    cc2420_header_t cc2420;
+    serial_header_t serial;
+  } message_header_t;
+
+  typedef union mega_mica_footer {
+    cc1000_footer_t cc1k;
+    cc2420_footer_t cc2420;
+  } message_footer_t;
+
+  typedef union mega_mica_metadata {
+    cc1000_metadata_t cc1k;
+    cc2420_metadata_t cc2420;
+  } message__metadata_t;
+ 
+If a platform has more than one link layer, it SHOULD define each of the
+message_t fields to be a union of the underlying link layer structures.
+This ensures that enough space is allocated for all underlying link layers.
+
+3. The message_t fields
+====================================================================
+
+TinyOS 2.x components treat packets as abstract data types (ADTs),
+rather than C structures, obtaining all of the traditional benefits
+of this approach. First and foremost, clients of a packet layer
+do not depend on particular field names or locations, allowing the
+implementations to choose packet formats and make a variety of
+optimizations.
+
+Components above the basic data-link layer MUST always access 
+packet fields through interfaces.  A component that introduces 
+new packet fields SHOULD provide an interface to those that 
+are of interest to other components.  
+For example, active messages have an interface named ``AMPacket`` 
+which provides access commands to AM fields. In TinyOS 1.x, a 
+component would directly access ``TOS_Msg.addr``; in TinyOS 2.x, 
+a component calls ``AMPacket.getAddress(msg)``.
+The most basic of these interfaces is Packet, which provides
+access to a packet payload. TEP 116 describes common TinyOS 
+packet ADT interfaces [2]_. 
+
+Link layer components MAY access packet fields differently than other 
+components, as they are aware of the actual packet format. They can
+therefore implement the interfaces that provide access to the fields
+for other components. 
+
+3.1 Headers
+----------------------------------------------------------------
+
+The message_t header field is an array of bytes whose size is 
+the size of a platform's union of data-link headers.
+Because packets are stored contiguously, the layout of a packet
+in memory is not the same as the layout of its nesC structure.
+
+A packet header does not necessarily start at the beginning of
+the message_t. For example, consider the Telos platform::
+
+  typedef union message_header {
+    cc2420_header_t cc2420;
+    serial_header_t serial;
+  } message_header_t;
+
+The CC2420 header is 11 bytes long, while the serial header is
+5 bytes long. The serial header ends at the beginning of the
+data payload, and so six padding bytes precede it. This figure
+shows the layout of message_t, a 12-byte CC2420 packet, and
+a 12-byte serial packet on the Telos platform::
+
+              11 bytes         TOSH_DATA_LENGTH        7 bytes
+            +-----------+-----------------------------+-------+
+  message_t |  header   |          data               | meta  |
+            +-----------+-----------------------------+-------+
+              
+            +-----------+------------+                +-------+
+  CC2420    |  header   |   data     |                | meta  |
+            +-----------+------------+                +-------+
+  
+                  +-----+------------+                   
+  Serial          | hdr |   data     |   
+                  +-----+------------+                 
+
+Neither the CC2420 nor the serial stack has packet footers, and
+the serial stack does not have any metadata. 
+
+The packet for a link layer does not necessarily start at the beginning
+of the message_t. Instead, it starts at a negative offset from the
+data field.  When a link layer component needs to read or write protocol 
+header fields, it MUST compute the location of the header as a negative 
+offset from the data field.  For example, the serial stack header has
+active message fields, such as the AM type. The command that returns
+the AM type, ``AMPacket.type()``, looks like this::
+
+  serial_header_t* getHeader(message_t* msg) {
+    return (serial_header_t*)(msg->data - sizeof(serial_header_t));
+  } 
+  command am_id_t AMPacket.type(message_t* msg) {
+    serial_header_t* hdr = getheader(msg); 
+    return hdr->type;
+  }
+
+
+Because calculating the negative offset is a little bit unwieldy, the
+serial stack uses the internal helper function getHeader(). Many
+single-hop stacks follow this approach, as it is very likely
+that nesC will inline the function, eliminating the possible overhead.
+In most cases, the C compiler also compiles the call into a simple
+memory offset load.
+
+The following code is incorrect, as it directly casts the header field.
+It is an example of what components MUST NOT do::
+
+  serial_header_t* getHeader(message_t* msg) {
+    return (serial_header_t*)(msg->header);
+  } 
+
+
+In the case of Telos, for example, this would result in a packet 
+layout that looks like this::
+
+              11 bytes         TOSH_DATA_LENGTH           7 bytes
+            +-----------+-----------------------------+-------+
+  message_t |  header   |          data               | meta  |
+            +-----------+-----------------------------+-------+
+  
+            +-----+     +------------+                   
+  Serial    | hdr |     |   data     |   
+            +-----+     +------------+                 
+
+3.2 Data
+----------------------------------------------------------------
+
+The data field of message_t stores the single-hop packet payload.
+It is TOSH_DATA_LENGTH bytes long. The default size is 28 bytes.
+A TinyOS application can redefine TOSH_DATA_LENGTH at compile time
+with a command-line option to ncc: ``-DTOSH_DATA_LENGTH=x``.
+Because this value can be reconfigured, it is possible that two
+different versions of an application can have different MTU sizes.
+If a packet layer receives a packet whose payload size is 
+longer than TOSH_DATA_LENGTH, it MUST discard the packet. 
+
+3.3 Footer
+----------------------------------------------------------------
+
+The message_footer_t field ensures that message_t has enough space to
+store the footers for all underlying link layers when there are
+MTU-sized packets. Like headers, footers are not necessarily stored
+where the C structs indicate they are: instead, their placement is
+implementation dependent. A single-hop layer MAY store the footer
+contiguously with the data region. For short packets, this can mean
+that the footer will actually be stored in the data field.
+
+3.4 Metadata
+----------------------------------------------------------------
+
+The metadata field of message_t stores data that 
+a single-hop stack uses or collects does not transmit. 
+This mechanism allows packet layers to store per-packet 
+information such as RSSI or timestamps. For example, this is
+the CC2420 metadata structure::
+
+  typedef nx_struct cc2420_metadata_t {
+    nx_uint8_t tx_power;
+    nx_uint8_t rssi;
+    nx_uint8_t lqi;
+    nx_bool crc;
+    nx_bool ack;
+    nx_uint16_t time;
+  } cc2420_metadata_t;
+
+5. Implementation
+====================================================================
+
+The definition of message_t can be found in 
+``tinyos-2.x/tos/types/message.h``. The definition of the CC2420
+message format can be found in ``tinyos-2.x/tos/chips/cc2420/CC2420.h``.
+The defintion of the CC1000 message format can be found in 
+``tinyos-2.x/tos/chips/cc1000/CC1000Msg.h``. The definition
+of the standard serial stack packet format can be found in
+``tinyos-2.x/tos/lib/serial/Serial.h''. The definition of
+the telosb packet format can be found in 
+``tinyos-2.x/tos/platform/telosa/platform_message.h`` and the micaz format can be found in
+``tinyos-2.x/tos/platforms/micaz/platform_message.h``.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+
+6. Citations
+====================================================================
+
+.. [1] TEP 113: Serial Communication.
+
+.. [2] TEP 116: Packet Protocols.
+
+
diff --git a/doc/txt/tep112.txt b/doc/txt/tep112.txt
new file mode 100644
index 00000000..c4ca981b
--- /dev/null
+++ b/doc/txt/tep112.txt
@@ -0,0 +1,348 @@
+====================================================================
+Microcontroller Power Management
+====================================================================
+
+:TEP: 112
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman, Philip Buonadonna, Vlado Handziski
+
+:Draft-Created: 19-Sep-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents how TinyOS manages the lower power state of a
+microcontroller.
+
+
+1. Introduction
+====================================================================
+
+Microcontrollers often have several power states, with varying power
+draws, wakeup latencies, and peripheral support. The microcontroller
+should always be in the lowest possible power state that can satisfy
+application requirements. Determining this state accurately requires
+knowing a great deal about the power state of many subsystems and
+their peripherals. Additionally, state transitions are common. Every
+time a microcontroller handles an interrupt, it moves from a low power
+state to an active state, and whenever the TinyOS scheduler finds the
+task queue empty it returns the microcontroller to a low power state.
+TinyOS 2.x uses three mechanisms to decide what low power state it
+puts a microcontroller into: status and control registers, a dirty
+bit, and a power state override. This memo documents these mechanisms
+and how they work, as well as the basics of subsystem power
+management.
+
+
+2. Background
+====================================================================
+
+The TinyOS scheduler[_tep106] puts a processor into a sleep state when
+the task queue is empty. However, processors can have a spectrum of
+power states. For example, the MSP430 has one active mode (issuing
+instructions) and five low-power modes. The low power modes range from
+LPM0, which disables only the CPU and main system clock, to LPM4,
+which disables the CPU, all clocks, and the oscillator, expecting to
+be woken by an external interrupt source. The power draws of these low
+power modes can differ by a factor of 350 or more (75 uA for LPM0 at
+3V, 0.2 uA for LPM4). Correctly choosing the right microcontroller low
+power state can greatly increase system lifetime.
+
+TinyOS 1.x platforms manage MCU power in several different ways, but
+there are commonalities in the approaches. The mica platforms, for
+example, have a component named HPLPowerManagement, which has a
+commands for enabling and disabling low power modes, as well as a
+command (adjustPower()) to tell it to compute the low power state
+based on the configuration of its various control and status
+registers, storing the result in the Atmega128's MCU control
+register. When TinyOS tells the microcontroller to go to sleep, it
+uses the control register to decide exactly which power state to go
+into. In contrast, MSP430 based platforms such as Telos and eyes
+compute the low power state every time the scheduler tells the system
+to go to sleep.
+
+Each of the two approaches has benefits and drawbacks. The 1.x mica
+approach is efficient, in that it only calculates the low power state
+when told to. However, this leaves the decision of when to calculate
+the low power state to other components, which is an easy way to
+introduce bugs. The lack of a well-defined hardware abstraction
+architecture in 1.x exacerbates this problem. In contrast, the MSP430
+approach is simpler, in that the system will always enter the right
+power state without any external prompting. However, it is
+correspondingly costly, introducing 40-60 cycles of overhead to every
+interrupt that wakes the system up, which can be a bottleneck on the rate
+at which the system can handle interrupts.
+
+Both of these approaches assume that TinyOS can determine the correct
+low power state by examining control and status registers. For
+example, the MSP430 defaults to low power mode 3 (LPM3) unless it
+detects that Timer A, the USARTs, or the ADC is active, in which case
+it uses low power mode 1 (LPM1). From the perspective of what
+peripherals and subsystems might wake the node up or must continue
+operating while the MCU sleeps, this is true. However, power modes
+introduce wakeup latency, a factor which could be of interest to
+higher-level components. While wakeup latency is not a significant
+issue on very low power microcontrollers, such as the Atmega128 and
+MSP430, more powerful processors, such as the Xscale family (the basis
+of platforms such as the imote2) can power states with wakeup
+latencies as large as 5ms. For some application domains, this latency
+could be a serious issue. Higher level components therefore need a way
+to give the TinyOS microcontroller power manager information on their
+requirements, which it considers when calculating the right low power
+state.
+
+3. Microcontroller Power Management
+====================================================================
+
+TinyOS 2.x uses three basic mechanisms to manage and control
+microcontroller power states: a dirty bit, a chip-specific low power
+state calculation function, and a power state override function.  The
+dirty bit tells TinyOS when it needs to calculate a new low power
+state, the function performs the calculation, and the override allows
+higher level components to introduce additional requirements, if
+needed.
+
+These three mechanisms all operate in the TinyOS core scheduling loop,
+described in TEP 106: Schedulers and Tasks[_tep106]. This loop is
+called from the boot sequence, which is described in TEP 107: Boot
+Sequence[_tep107]. The command in question is
+``Scheduler.runNextTask()``, when its sleep parameter is TRUE (i.e.,
+``call Scheduler.runNextTask(TRUE)``).
+
+If this command is called when the task queue is empty, the TinyOS
+scheduler puts the microcontroller to sleep. It does so through
+the ``McuSleep`` interface:
+
+|  ``interface McuSleep {``
+|    ``async command void sleep();``
+|  ``}``
+
+``McuSleep.sleep()`` puts the microcontroller into a low power sleep
+state, to be woken by an interrupt. This command deprecates the
+``__nesc_atomic_sleep()`` call of TinyOS 1.x. Note that, as the 1.x
+call suggests, putting the microcontroller to sleep MUST have certain
+atomicity properties. The command is called from within an atomic
+section, and MUST atomically re-enable interrupts and go to sleep. An
+issue arises if the system handles an interrupt after it re-enables
+interrupts but before it sleeps: the interrupt may post a task, but
+the task will not be run until the microcontroller wakes up from sleep.
+
+Microcontrollers generally have hardware mechanisms to support this
+requirement. For example, on the Atmega128, the ``sei`` instruction
+does not re-enable interrupts until two cycles after it is issued (so
+the sequence ``sei sleep`` runs atomically).
+
+A component named ``McuSleepC`` provides the McuSleep interface, and
+``TinySchedulerC`` MUST automatically wire it to the scheduler
+implementation. McuSleepC is a chip- or platform-specific component,
+whose signature MUST include the following interfaces:
+
+|  ``component McuSleepC {``
+|    ``provides interface McuSleep;``
+|    ``provides interface PowerState;``
+|    ``uses interface PowerOverride;``
+|  ``}``
+|
+|  ``interface McuPowerState {``
+|    ``async command void update();``
+|  ``}``
+|
+|  ``interface McuPowerOverride {``
+|    ``async command mcu_power_t lowestState();``
+|  ``}``
+
+
+McuSleepC MAY have additional interfaces.
+
+3.1 The Dirty Bit
+====================================================================
+
+Whenever a Hardware Presentation Layer (HPL, see TEP 2: Hardware
+Abstraction Architecture[_tep2]) component changes an aspect of
+hardware configuration that might change the possible low power state
+of the microcontroller, it MUST call McuPowerState.update(). This is
+the first power management mechanism, a *dirty bit*. If
+McuPowerState.update() is called, then McuSleepC MUST recompute the
+low power state before the next time it goes to sleep as a result of
+McuSleep.sleep() being called.
+
+
+3.2 Low Power State Calculation
+====================================================================
+
+McuSleepC is responsible for calculating the lowest power state that
+it can safely put the microcontroller into without disrupting the
+operation of TinyOS subsystems. McuSleepC SHOULD minimize how often it
+must perform this calculation: it is an inherently atomic calculation,
+and so if performed very often (e.g., on every interrupt) can
+introduce significant overhead and jitter.
+
+MCU power states MUST be represented as an enum in the standard chip
+implementation header file. This file MUST also define a type
+``mcu_power_t`` and a combine function that given two power state
+values returns one that provides the union of their functionality.
+
+For example, consider a hypothetical microcontroller with three low
+power states, (LPM0, LPM1, LPM2) and two hardware resources such as
+clocks (HR0, HR1). In LPM0, both HR0 and HR1 are active. In LPM1, HR0
+is inactive but HR1 is active. In LPM2, both HR0 and HR1 are inactive.
+The following table describes the results of a proper combine function
+(essentially a MAX):
+
++------+------+------+------+
+|      | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+| LPM0 | LPM0 | LPM0 | LPM0 | 
++------+------+------+------+
+| LPM1 | LPM0 | LPM1 | LPM1 |
++------+------+------+------+
+| LPM2 | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+
+In contrast, if in LPM2, HR0 is active but HR1 is inactive, the
+combine function would look like this:
+
++------+------+------+------+
+|      | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+| LPM0 | LPM0 | LPM0 | LPM0 | 
++------+------+------+------+
+| LPM1 | LPM0 | LPM1 | LPM0 |
++------+------+------+------+
+| LPM2 | LPM0 | LPM0 | LPM2 |
++------+------+------+------+
+
+3.3 Power State Override
+====================================================================
+
+When McuSleepC computes the best low power state, it MUST call
+``PowerOverride.lowestState().`` McuSleepC SHOULD have a default
+implementation of this command, which returns the lowest power state
+the MCU is capable of. The return value of this command is a
+``mcu_power_t.`` McuSleepC MUST respect the requirements of the return
+of this call and combine it properly with the low power state it
+computes.
+
+The PowerOverride functionality exists in case higher-level components
+have some knowledge or requirements that cannot be captured in
+hardware status and configuration registers, such as a maximum
+tolerable wakeup latency. Because it can overrides all of the MCU
+power conservation mechanisms, it SHOULD be used sparingly, if at
+all. Because it is called in an atomic section during the core
+scheduling loop, implementations of PowerOverride.lowestState() SHOULD
+be an efficient function, and SHOULD NOT be longer than twenty or
+thirty cycles; implementations SHOULD be a simple return of a cached
+variable. Wiring arbitrarily to this command is an easy way to cause
+TinyOS to behave badly. The presence of a combine function for
+mcu_power_t means that this command can have fan-out calls.
+
+4. Peripherals and Subsystems
+====================================================================
+
+At the HIL level, TinyOS subsystems generally have a simple,
+imperative power management interface. Depending on the latencies
+involved, this interface is either ``StdControl`` or ``SplitControl``.
+These interfaces are imperative in that when any component calls
+``StdControl.stop`` on another component, it causes the subsystem that
+component represents to enter an inactive, low-power state.
+
+From the perspective of MCU power management, this transition causes a
+change in status and control registers (e.g., a clock is
+disabled). Following the requirements in 3.1, the MCU power management
+subsystem will be notified of a significant change and act
+appropriately when the system next goes to sleep.
+
+These imperative appraoches are flexible and powerful, but are also
+very error prone, partially due to their deep semantics. For example,
+depending on the circumstances, an application calling StdControl.stop
+on a routing layer may or may not also want to turn off the underlying
+radio. StdControl and SplitControl provide a *mechanism* to control
+subsystem power states, but no real *policy* for arbitrating
+conflicting requirements from components built on top of them.
+
+Service distributions (described in TEP 110[_tep110]) are responsible
+for providing policies on top of these low-level mechanisms. OSKI, for
+example, the sample distribution described in TEP 110, uses an
+OR-policy: a subsystem is active if any of its clients want it active,
+and inactive iff all of its clients want it inactive. Other
+distributions can provide alternative power management policies in top
+of the basic HIL mechanisms.
+
+5. Author's Address
+====================================================================
+
+| Robert Szewczyk
+| Moteiv Corporation
+| 2168 Shattuck Ave, Floor 2
+| Berkeley, CA 94704
+|
+| email - rob@moteiv.com
+|
+|
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Martin Turon
+| PO Box 8525
+| Berkeley, CA 94707
+|
+| phone - +1 408 965 3355
+| email - mturon@xbow.com
+|
+|
+| Lama Nachman
+| 3600 Juliette Lane, SC12-319
+| Intel Research
+| Santa Clara, CA 95052
+|
+| email - lama.nachman@intel.com
+|
+|
+| Phil Buonadonna
+| Arched Rock Corp.
+| 2168 Shattuck Ave. 2nd Floor
+| Berkeley, CA 94704
+|
+| phone - +1 510 981 8714
+| email - pbuonadonna@archedrock.com
+|
+|
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| email - handzisk@tkn.tu-berlin.de
+|
+
+6. Citations
+====================================================================
+
+.. [tep106] TEP 106: Schedulers and Tasks.
+
+.. [tep107] TEP 107: TinyOS 2.x Boot Sequence.
+
+.. [tep110] TEP 110: Service Distributions.
+
+.. [tep2] TEP 2: Hardware Abstraction Architecture.
diff --git a/doc/txt/tep113.txt b/doc/txt/tep113.txt
new file mode 100644
index 00000000..6eb0e586
--- /dev/null
+++ b/doc/txt/tep113.txt
@@ -0,0 +1,460 @@
+============================
+Serial Communication
+============================
+
+:TEP: 113
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Ben Greenstein and Philip Levis
+
+:Draft-Created: 11-Jul-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo describes the structure and standard implementation of the
+TinyOS 2.x serial communication system for mote-to-PC data
+exchange. The system is broken into three levels (encoding, framing,
+and dispatch) to allow easy experimentation and replacement. It can
+also handle multiple packet formats: unlike 1.x, 2.x serial packets
+are not bound to the mote's radio packet format. Additionally, one of
+the supported packet formats is platform independent, so PC-side
+applications can communicate with arbitrary motes.
+
+
+1. Introduction
+====================================================================
+
+Users need to read data out of a TinyOS network. The most common
+approach is to attach a mote to a PC or latop with a wired
+connection. While the interface on the PC side can vary from a serial
+cable to a USB device to IP, the mote generally talks to a serial port
+(UART). In TinyOS 1.x, the UART packet format is platform-specific,
+pushing a good deal of complexity into the protocol and PC-side tools
+in order to discover and properly handle platform diversity. TinyOS
+2.0 introduces the notion of packet format dispatch, so a mote can
+support multiple UART packet formats simultaneously.  This allows
+transparent bridging (e.g., an 802.15.4 base station) to exist in
+parallel with platform-independent communication, which allows
+simplifies the PC toolchain. This memo documents the protocols and
+structure of the TinyOS 2.x serial communication stack.
+
+2. Serial Stack Structure
+====================================================================
+
+The TinyOS 2.x serial communication stack is broken up into four
+functional components. From bottom to top, they are
+
+  o the raw UART,
+
+  o the encoder/framer,
+
+  o the protocol,
+
+  o and the dispatcher.
+
+Structurally, they look like this:
+
+::
+
+         _____________________     
+        |                     |    
+        |     Dispatcher      |       Packet formatting.
+        |_____________________|    
+         _____________________     
+        |                     |    
+        |      Protocol       |       Acknowledgements, CRC computation,
+        |_____________________|       windowing.
+         _____________________     
+        |                     |    
+        |    Encoder/Framer   |       Translating raw bytes into frame
+        |_____________________|       delimiters, escape bytes.
+         _____________________     
+        |                     |    
+        |      Raw UART       |       Platform code for reading/writing
+        |_____________________|       bytes over the serial connection.
+                                        
+
+The bottom three provide a byte-level interface: only the Dispatcher
+provides a packet-level interface. The top three are all
+platform-independent: only the UART is platform-specific code.
+
+The lowest level of the stack is the raw UART. This HIL component
+provides functionality for configuring the UART (speed, stop bytes,
+etc.) as well as sending/receiving bytes.
+
+The Encoder/Framer sits above the raw UART. This component translates
+raw data bytes into packet bytes using a serial protocol's
+encoding. The Encoder/Framer assumes that a protocol's encoding has
+two kinds of bytes: delimiters and data bytes, and signals each in
+separate events to the component above.
+
+The Protocol component handles data and delimiter byte events. It is
+responsible for reading in and sending all protocol control
+packets. If the Protocol component starts receiving a data packet, it
+signals to the Dispatcher that a packet has started and signals the
+data bytes. When the data packet completes, the Protocol signals to
+the Dispatcher that the packet is complete and whether it passed the
+protocol-level CRC.
+
+The Dispatcher component handles data packet bytes and delimiters. It
+is responsible for reading data bytes into a message_t and signaling
+packet reception to components above it. The dispatcher can support
+multiple packet formats. Based on how message_t works (see TEP
+111[tep111_]), this boils down to knowing where in a message_t a
+particular packet format begins (based on its header size). Section
+3.4 describes how the default TinyOS 2.x implementation,
+``SerialDispatcherC`` does this.
+
+
+3. The 2.x Serial Stack Implementation
+====================================================================
+
+Section 2 describes the basic structure of the TinyOS 2.x serial
+stack structure. This section describes its actual implementation,
+including SerialActiveMessageC, which sits on top of the Dispatcher.
+All of the components except for UartC are part of the serial
+library that lives in ``tos/lib/serial``.
+
+3.1 Raw UART: UartC
+--------------------------------------------------------------------
+
+The UART HIL[TEP2_] is ``UartC``, which provides a byte-level
+interface to the underlying serial communication. It provides the
+``SerialByteComm`` interface:
+
+::
+
+  interface SerialByteComm {
+    async command error_t put(uint8_t data);
+    async event void get(uint8_t data);
+    async event void putDone();
+  }
+
+It also provides interfaces for configuring the serial port. *NOTE:
+These are not codified yet, and so working out the UART HIL seems like
+a good idea.*
+
+
+3.2 Encoder/Framer: HdlcTranslateC
+--------------------------------------------------------------------
+
+HdlcTranslateC is the serial encoder/framer. It uses the
+``SerialByteComm`` interface and provides the ``SerialFrameComm``
+interface:
+
+::
+
+  interface SerialFrameComm {
+    async command error_t putDelimiter();
+    async command error_t putData(uint8_t data);
+    async command void resetSend();
+    async command void resetReceive();
+    async event void delimiterReceived();
+    async event void dataReceived(uint8_t data);
+    async event void putDone();
+  }
+
+As its name suggests, it uses the same encoding as the HDLC[HDLC_]
+protocol. ``0x7e`` is reserved as a frame delimiter byte, and ``0x7d``
+is reserved as an escape byte. HdlcTranslateC maintains ten bits of
+state. The receive and send paths each have one bit to store whether
+they are using an escape byte, and the transmit path has a byte for
+when it sends an escaped byte.
+
+When HdlcTranslateC receives a delimiter byte, it signals
+delimiterReceived(). When HdlcTranslateC receives an escape byte, it
+sets the receiveEscape flag to true. When it receives any other byte,
+it tests to see if the receiveEscape flag is set; if so, it XORs the
+data byte with ``0x20`` and clears the flag. It signals dataReceived()
+with the byte. The most common use of escape byte is to transmit data
+bytes corresponding to the delimiter byte or escape byte. For example,
+``0x7e`` becomes ``0x7d 0x5e``.
+
+HdlcTranslateC performs similar actions on the transmit side. When
+told to transmit the delimiter or escape byte as a data byte, it sets
+the transmitEscape flag to true, stores the data byte XOR ``0x20``,
+and sends an escape byte. When the escape byte is sent, it sends the
+stored data byte.
+
+3.3 Protocol: SerialP
+--------------------------------------------------------------------
+
+The SerialP component implements the serial protocol using PPP/HDLC-
+like framing (See RFC 1662[RFC1662_]). Type dispatch and buffer
+management are left to higher layers in the serial stack. The protocol
+is currently stop-and-wait in the host-to-mote direction and best
+effort in the mote-to-host direction. The first performance upgrade of
+this module will be to implement sliding window reliability in both
+directions.
+
+SerialP provides two byte-level interfaces to the upper layer for
+sending and receiving packets, respectively called SendBytePacket and
+ReceiveBytePacket.
+
+On the sending side, SerialP is responsible for encapsulation of upper
+layer packets. An upper layer component such as SerialDispatcherC
+initiates the sending of a packet by calling startSend, passing the
+first byte to send. SerialP collects subsequent bytes by signalling
+nextByte. Within the nextByte handler or between calls to nextByte,
+the upper layer should indicate the end-of-packet by calling
+completeSend. If completeSend is called from within a nextByte
+handler, SerialP will ignore the return of the call to nextByte.
+
+::
+
+  interface SendBytePacket {
+    async command error_t startSend(uint8_t first_byte);
+    async command error_t completeSend();
+    async event uint8_t nextByte();
+    async event void sendCompleted(error_t error);
+  }
+
+SerialP maintains a small window of bytes that have been received by
+the upper layer and not yet sent to the UART. Depending on the timing
+requirements of the underlying UART, the size of this window can be
+changed.  SerialP uses repeated calls to nextByte to keep this window
+filled.
+
+SerialP uses SerialFrameComm to send a delimiter between frames, 
+a serial-level type field, the bytes of the packet, and a two-byte
+frame CRC. For mote-to-host gap detection and link reliability, a
+sequence number may also be sent (not currently activated).
+
+After sending an entire frame and receiving the last putDone event
+from below, SerialP signals sendCompleted to indicate the success or
+failure of a requested transmission.
+
+Packet reception is also managed by SerialP and the interface
+provided to the upper layer is ReceiveBytePacket:
+
+::
+
+  interface ReceiveBytePacket {
+    async event error_t startPacket();
+    async event void byteReceived(uint8_t b);
+    async event void endPacket(error_t result);
+  }
+
+Upon receiving an interframe delimiter and a new frame's header,
+SerialP signals the upper layer indicating that a packet is
+arriving. For each byte received, SerialP signals byteReceived. (Note:
+SerialP signals on byte k-2 when byte k arrives, because the
+implementation precludes it from knowing when it has encountered the
+2-byte CRC in the frame footer until after it has received it. Lagging
+behind by two bytes makes it possible to hide all frame details from
+the upper layer.) Once SerialP receives the complete frame it signals
+endPacket with a value of SUCCESS. If instead it loses sync during
+reception it signals endPacket with FAIL.
+
+SerialP acknowledges frames it receives. Acknowledgements have a
+higher priority than data transmissions and consequently, data frames
+may be slightly delayed. However, acknowledgement information is
+stored in a queue separate from the data buffer, so a data packet to
+be transmitted may begin spooling into SerialP while SerialP is
+actively sending an acknowledgement.
+
+
+3.4 Dispatcher: SerialDispatcherC
+--------------------------------------------------------------------
+
+SerialDispatcherC handles the data packets that the Protocol component
+receives. It uses the SendBytePacket and ReceiveBytePacket interfaces,
+and provides parameterized Send and Receive interfaces. The parameter
+in the Send and Receive interfaces (``uart_id_t``) determines the
+packet format contained in the message_t.
+
+SerialDispatcherC places a one-byte header, the packet format
+identifier, on the packets sent and received through SerialP.
+SerialDispatcherC uses a parameterized SerialPacketInfo interface to
+be able to handle various packet formats:
+
+::
+
+  interface SerialPacketInfo {
+    async command uint8_t offset();
+    async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+    async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+  }
+
+When SerialDispatcherC receives the first data byte of a packet from
+SerialP, it stores it as the packet type and calls
+SerialPacketInfo.offset() to determine where in a message_t that
+packet format begins. It then spools data bytes in, filling them into
+its message_t buffer. Similarly, on the send side, it first sends the
+type byte and spools out data bytes starting from the index denoted by
+the call to offset(). SerialDispatcherC uses the two length commands,
+dataLinkLength and upperLength, to translate between the two notions
+of packet length: above, length refers to the payload excluding
+header, while below it refers to the payload plus header.
+
+A component that provides communication over the serial port with
+uart_id_t *U* MUST wire a component implementing SerialPacketInfo to
+SerialDispatcherC with uart_id_t *U*. The file ``Serial.h`` contains
+reserved uart_id_t's for supported packet formats. Currently, only
+platform independent active messages
+(``TOS_SERIAL_ACTIVE_MESSAGE_ID``, described in Section 3.5), 802.15.4
+active messages (``TOS_SERIAL_802_15_4_ID``), mica2 CC1000 packets
+(``TOS_SERIAL_CC1000_ID``) and the error code
+``TOS_SERIAL_UNKNOWN_ID`` are reserved. New packet formats MUST NOT
+reuse any reserved identifiers.
+
+3.5 SerialActiveMessageC
+--------------------------------------------------------------------
+
+SerialActiveMessageC is a platform-independent active message layer
+that operates on top of the serial communication
+stack. SerialActiveMessageC is a configuration that wires
+SerialActiveMessageP to SerialDispatcherC with uart_id_t
+TOS_SERIAL_ACTIVE_MESSAGE_ID and wires SerialPacketInfoActiveMessageP
+to SerialDispatcherC with uart_id_t TOS_SERIAL_ACTIVE_MESSAGE_ID:
+
+::
+
+  includes Serial;``
+  configuration SerialActiveMessageC {
+    provides {
+      interface Init;
+      interface AMSend[am_id_t id];
+      interface Receive[am_id_t id];
+      interface Packet;
+      interface AMPacket;
+    }
+    uses interface Leds;
+  }
+  implementation {
+    components new SerialActiveMessageP() as AM, SerialDispatcherC;
+    components SerialPacketInfoActiveMessageP as Info;
+   
+    Init = SerialDispatcherC;
+    Leds = SerialDispatcherC;
+   
+    AMSend = AM;
+    Receive = AM;
+    Packet = AM;
+    AMPacket = AM;
+    
+    AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+    AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+    
+    SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+  }
+
+
+SerialActiveMessageP is a generic component so that it can be used to
+sit on top of any packet-level communication layer. It does not filter
+packets based on destination address or group. It assumes that if the
+packet was received over the serial port, it was destined to the
+node. This saves PC-side tools from having to discover or consider the
+ID and group of a mote.
+
+Platform-independent active messages do not have a CRC (they assumes
+the serial stack CRC is sufficient), and have the following header:
+
+::
+
+  typedef nx_struct SerialAMHeader {
+    nx_am_addr_t addr;
+    nx_uint8_t length;
+    nx_am_group_t group;
+    nx_am_id_t type;
+  } SerialAMHeader;
+
+
+
+3.6 Packet Format
+--------------------------------------------------------------------
+
+A data packet in the TinyOS 2.x serial stack has the following format
+over the wire. Each protocol field is associated with a specific component:
+
+::
+
+     ____________________________________________
+    | | | | |                               |  | |
+    | | | | |                               |  | | 
+    |_|_|_|_|_______________________________|__|_|
+     F P S D         Payload                 CR F
+   
+  F       = Framing byte, denoting start of packet: HdlcTranslateC
+  P       = Protocol byte: SerialP
+  S       = Sequence number byte: SerialP
+  D       = Packet format dispatch byte: SerialDispatcherC
+  Payload = Data payload (stored in SerialDispatcherC): SerialDispatcherC
+  CR      = Two-byte CRC over S to end of Payload: SerialP
+  F       = Framing byte denoting end of packet: HdlcTranslateC
+
+Payload is a contiguous packet that SerialDispatcherC reads in.  Note
+that any data bytes (P - CR) equal to 0x7e or 0x7d will be escaped to
+0x7d 0x5e or 0x7d 0x5d accordingly. For example, a platform
+independent AM packet of type 6, group 0x7d, and length 5 to
+destination 0xbeef with a payload of 1 2 3 4 5 would look like this:
+
+``7e 40 09 00 be ef 05 7d 5d 06 01 02 03 04 05 7e``
+
+Note that the group 0x7d is escaped to 0x7d 0x5d. The protocol field
+(P) is 0x40 (64), corresponding to ``SERIAL_PROTO_ACK`` (in Serial.h).
+
+
+4. Access Abstractions
+====================================================================
+
+Two generic components: SerialAMSenderC and SerialAMReceiverC connect
+to SerialActiveMessageC to provide virtualized access to the serial
+stack. Each instantiation of SerialAMSenderC has its own queue of
+depth one. Therefore, it does not have to contend with other
+SerialAMSender instantiations for queue space. The underlying
+implementation schedulers the packets in these queues using some form
+of fair-share queueing. SerialAMReceiverC provides the virtualized
+abstraction for reception. These abstraction are very similar to
+TinyOS's radio abstractions, namely, AMSenderC and AMReceiverC. See
+Section 4 of TEP 116[TEP116_] for more information. Unlike the
+services in the TEP 116, the serial component virtualizations provide
+no snooping capabilities.
+
+
+5. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Ben Greenstein
+| Center for Embedded Networked Sensing
+| UCLA 3563 Boelter Hall
+| Los Angeles, CA 90095-1596
+|
+| phone -  +1 310 206 3925
+| email - ben@cs.ucla.edu
+
+6. Citations
+====================================================================
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep2.txt?view=markup
+
+.. [TEP111] TEP 111: message_t. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep111.txt?view=markup
+
+.. [TEP116] TEP 116: Packet Protocols. http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/beta/teps/txt/tep116.txt?view=markup
+ 
+.. [HDLC] International Organization For Standardization, ISO Standard 3309-1979, "Data communication - High-level data link control procedures - Frame structure", 1979.
+
+.. [RFC1662] PPP in HDLC-like Framing, Internet Engineering Task Force (IETF), 1994
diff --git a/doc/txt/tep114.txt b/doc/txt/tep114.txt
new file mode 100644
index 00000000..da4e68c7
--- /dev/null
+++ b/doc/txt/tep114.txt
@@ -0,0 +1,393 @@
+=====================================================
+SIDs: Source and Sink Independent Drivers
+===================================================== 
+
+:TEP: 114
+:Group: Core Working Group
+:Type: Documentary 
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Gilman Tolle, Philip Levis, and David Gay
+
+:Draft-Created: 30-Oct-2005
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents a set of hardware- and sensor-independent interfaces 
+for data sources and sinks in TinyOS 2.x.
+
+1. Introduction
+====================================================================
+
+Sensing is an integral part of any sensor network application.  Having
+a wide variety of sensor interfaces usually does not impose a large
+burden on an application developer, as any given application uses a
+small and static set. However, applications often build on top of more
+general systems, such as management or database layers, which may need
+to sample sensors. Since these are general and sensor-independent
+systems, they require a sensor-independent interface. TinyOS 2.0
+therefore has telescoping sensor abstractions, providing both simple
+and sensor-independent as well as sensor-specific interfaces.
+
+2. Sensors in TinyOS 1.x
+====================================================================
+
+Early TinyOS sensors were generally analog. To sample one of these
+sensors, an application makes an analog-to-digital conversion using
+the MCU ADC.  Because all early sensors required ADC conversions, the
+ADC interface has become the de-facto 1.x sensor interface. However,
+the ADC interface was originally designed for inexpensive,
+interrupt-driven sampling.  All of its commands and events are async
+and sensor values are always 16 bits, although only some subset of the
+bits may be significant (e.g., a 12-bit value).
+
+Because sensing can be a part of high-level application logic,
+the asynchronicity of these events means that high-level components
+must deal with atomic sections and possible race conditions, even
+if the sampling rate is very low (e.g., every five minutes)
+and so could be easily placed in a task.
+
+Additionally, not all sensors require ADC conversions from the MCU.
+Many sensors today are digital. To sample these sensors, the MCU sends
+a sample command and receives the corresponding data over a bus (e.g.,
+SPI, I2C). The latency involved, combined with possible Resource
+arbitration [_tep108], means that these bus operations are often
+synchronous code. In the command direction, this can force a task
+allocation to convert async to sync; in the event direction, the
+application has to deal with async code even though the event is, in
+practice, in a task.
+
+Finallly, the simplicity of the ADC interface has led many sensors to
+introduce several new ones for calibration and control, such as
+``Mic`` and ``MagSetting``. Because ADCs generally do not have error
+conditions, the ADC interface has no way to signal that a sample
+failed. This turns out to be important for sensors where the sampling
+request is split-phase, such as sensors over a bus. In these cases, it
+is possible that the driver accepts the request to sample, but once
+acquiring the bus discovers something is wrong with the sensor. This
+property has led bus-based sensors to also have a separate
+``ADCError`` interface; this interface breaks the basic TinyOS pattern
+of a tight coupling between split-phase commands and their completion
+events, as the command is in ADC but the completion event is in
+ADCError.
+
+All of these complications can make it difficult to write high-level
+code that is sensor independent, unless the sensor is a simple ADC
+reading. Sensors, when possible, should follow an approach similar to
+the HAA[_haa], where they have sensor- or sensor-class-specific
+interfaces for high performance or special case use, but also simple
+and common interfaces for basic and portable use. Providing a
+telescoping sensor abstraction allows both classes of use.
+
+3. Sensors in TinyOS 2.x
+====================================================================
+
+TinyOS 2.x has several sensor-independent interfaces, which cover a
+range of common use cases. These interfaces can be used to write a
+Source- or Sink-Independent Driver (SID). A SID is source/sink
+independent because its interfaces do not themselves contain
+information on the sort of sensor or device they sit on top of.  A SID
+SHOULD provide one or more of the interfaces described in this
+section, depending on its expected uses and underlying data model.
+
+3.1 Split-Phase Small Scalar I/O
+--------------------------------------------------------------------
+
+The first set of interfaces can be used for low-rate scalar I/O::
+
+  interface Read {
+    command error_t read();
+    event void readDone( error_t result, val_t val );
+  }
+
+  interface Write {
+    command error_t write( val_t val );
+    event void writeDone( error_t result );
+  }
+
+A component that provides both read and write functionality might want
+to use a combined version of the interface, to reduce the amount of
+wiring required by the client application::
+
+  interface ReadWrite {
+    command error_t read();
+    event void readDone( error_t result, val_t val );
+
+    command error_t write( val_t val );
+    event void writeDone( error_t result );
+  }
+
+A component that can support concurrent reads and writes SHOULD
+provide separate Read/Write interfaces. A component whose internal
+logic will cause a read to fail while a write is pending or a write to
+fail while a read is pending MUST provide a ReadWrite interface.
+
+If the ``result`` parameter of the ``Read.readDone`` and
+``ReadWrite.readDone`` events is not SUCCESS, then the memory of the
+``val`` parameter MUST be filled with zeroes.
+
+Examples of sensors that would be suited to this class of interface
+include many basic sensors, such as photo, temp, voltage, and ADC
+readings.
+
+3.2 Split-Phase Large Scalar I/O 
+--------------------------------------------------------------------
+
+If the SID's data object is too big to be passed efficienctly on the
+stack, it can provide read/write interfaces that pass parameters by
+pointer rather than value::
+
+  interface ReadRef {
+    command error_t read( val_t* val );
+    event void readDone( error_t result, val_t* val );
+  }
+
+  interface WriteRef {
+    command error_t write( val_t* val );
+    event void writeDone( error_t result, val_t* val );
+  }
+
+  interface ReadWriteRef {
+    command error_t read( val_t* val );
+    event void readDone( error_t result, val_t* val );
+
+    command error_t write( val_t* val );
+    event void writeDone( error_t result, val_t* val );
+  }
+
+The caller is responsible for allocating storage pointed to by the val
+pointer which is passed to read() or write(). The SID MUST then
+take ownership of the storage, store a new value into it or copy a
+value out of it, and then relinquish it before signaling readDone() or
+writeDone(). If read or write() returns SUCCESS then the caller MUST
+NOT access or modify the storage pointed to by the val pointer until
+it handles the readDone() or writeDone() event.
+
+As is the case with the parameters by value, whether a component
+provides separate ReadRef and WriteRef or ReadWriteRef affects the
+concurrency it allows. If a component can allow the two to execute
+concurrently, then it SHOULD provide separate ReadRef and WriteRef
+interfaces. If the two cannot occur concurrently, then it MUST provide
+ReadWriteRef.
+
+If the ``result`` parameter of the ``ReadRef.readDone`` and
+``ReadWriteRef.readDone`` events is not SUCCESS, then the memory the
+``val`` parameter points to MUST be filled with zeroes. 
+
+Examples of sensors that are suited to this set of interfaces include
+those that generate multiple simultaneous readings for which
+passing by value is inefficient, such as a two-axis digital 
+accelerometer.
+
+3.3 Metadata and Shifting
+--------------------------------------------------------------------
+
+Generally, simple types are made up of octets. However, sensor values
+often have levels of precision besides a multiple of 8. Any value
+contained in a simple type MUST be left shifted so that it covers as
+much of the type's range as possible. For example, if a 12-bit ADC
+reading is presented as a 16-bit Read interface::
+
+  component DemoSensorC {
+    provides interface Read;
+  }
+
+then the 12-bit value MUST be shifted left so that its range is 0x0000
+- 0xfff0, rather than 0x0000 - 0x0fff. A device MAY specify the
+precision of one of its interfaces with the DeviceMetadata interface::
+
+  interface DeviceMetadata {
+    command uint8_t getSignificantBits();
+  }
+
+The name of the instance of DeviceMetadata SHOULD clearly indicate
+which interface it corresponds to.
+
+3.4 Single-Phase Scalar I/O
+--------------------------------------------------------------------
+
+Some devices may have their state cached or readily available. In
+these cases, the device can provide a single-phase instead of
+split-phase operation.  Examples include a node's MAC address (which
+the radio stack caches in memory), profiling information (e.g.,
+packets received), or a GPIO pin. These devices MAY use these
+single-phase interfaces::
+
+  interface Get {
+    command val_t get();
+  }
+
+  interface Set {
+    command void set( val_t val );
+  }
+
+  interface GetSet {
+    command val_t get();
+    command void set( val_t val );
+  }
+
+If a device's data object is readily available but still too large to
+be passed on the stack, then the device MAY use these interfaces::
+
+  interface GetRef {
+    command error_t get( val_t* val );
+  }
+
+  interface SetRef {
+    command error_t set( val_t* val );
+  }
+
+  interface GetSetRef {
+    command error_t get( val_t* val );
+    command error_t set( val_t* val );
+  }
+
+3.5 Notification-Based Scalar I/O
+--------------------------------------------------------------------
+
+Some sensor devices represent triggers, rather than request-driven
+data acquisition. Examples of such sensors include switches,
+passive-IR (PIR) motion sensors, tone detectors, and smoke
+detectors. This class of event-driven sensors can be presented with
+the Notify interface::
+
+  interface Notify {
+    command error_t enable();
+    command error_t disable();
+    event void notify( val_t val );
+  }
+
+The Notify interface is intended for relatively low-rate events (e.g.,
+that can easily tolerate task latencies). High-rate events may require
+more platform- or hardware-specific async interfaces.
+
+The enable() and disable() command enable and disable notification
+events for the interface instance used by a single particular
+client. They are distinct from the sensor's power state. For example,
+if an enabled sensor is powered down, then when powered up it MUST
+remain enabled.
+
+The val parameter is used as defined in the Read interface.
+
+3.7 Split-Phase Streaming I/O
+--------------------------------------------------------------------
+
+Some sensors can provide a continuous stream of readings, and some
+actuators can accept a continuous stream of new data. Depending on the
+rate needed and jitter bounds that higher level components can
+tolerate, it can be useful to be able to read or write readings in
+blocks instead of singly.  For example, a microphone or accelerometer
+may provide data at a high rate that cannot be processed quickly
+enough when each new reading must be transferred from asynchronous to
+synchronous context through the task queue.
+
+The ReadStreaming interface MAY be provided by a device that can
+provide a continuous stream of readings::
+
+  interface ReadStream {
+
+    command error_t postBuffer( val_t* buf, uint16_t count );
+
+    command error_t read( uint32_t usPeriod );
+
+    event void bufferDone( error_t result, 
+                           val_t* buf, uint16_t count );
+
+    event void readDone( error_t result );
+  }    
+
+The postBuffer command takes an array parameterized by the sample
+type, and the number of entries in that buffer. A driver can then
+enqueue the buffer for filling. The client can call postBuffer() more
+than once, to "pre-fill" the queue with any number of buffers. The
+size of the memory region pointed to by the buf parameter MUST be at
+least as large as the size of a pointer on the node architecture plus
+the size of the uint16_t count argument. This requirement supports
+drivers that may store the queue of buffers and count sizes by
+building a linked list.
+
+After posting at least one buffer, the client can call read() with a
+specified sample period in terms of microseconds. The driver then
+begins to fill the buffers in the queue, signalling the bufferDone()
+event when a buffer has been filled. The client MAY call postBuffer()
+after read() in order to provide the device with new storage for
+future reads.
+
+If the device ever takes a sample that it cannot store (e.g., no
+buffers are available), it MUST signal readDone(). If an error occurs
+during a read, then the device MUST signal readDone() with an
+appropriate failure code. Before a device signals readDone(), it MUST
+signal bufferDone() for all outstanding buffers. If a readDone() is
+pending, calls to postBuffer MUST return FAIL.
+
+The following interface can be used for bulk writes::
+
+  interface WriteStream {
+
+    command error_t postBuffer( val_t* buf, uint16_t count );
+
+    command error_t write( uint32_t period );
+
+    event void bufferDone( error_t result, 
+                           val_t* buf, uint16_t count );
+
+    event void writeDone( error_t result );
+  }
+
+postBuffer() and bufferDone() are matched in the same way described
+for the ReadStream interface, as are write() and writeDone().
+
+4. Summary
+====================================================================
+
+According to the design principles described in the HAA[_haa], authors
+should write device drivers that provide rich, device-specific
+interfaces that expose the full capabilities of each device. In
+addition, authors can use the interfaces described in this memo to
+provide a higher-level device-independent abstractions: SIDs. By
+providing such an abstraction, driver authors can support developers
+who only need simple interfaces, and can reduce the effort needed to
+connect a sensor into a more general system.
+
+5. Author's Address
+====================================================================
+
+| Gilman Tolle
+| 2168 Shattuck Ave.
+| Arched Rock Corporation
+| Berkeley, CA 94704
+|
+| phone - +1 510 981 8714
+| email - gtolle@archedrock.com
+|
+|
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+
diff --git a/doc/txt/tep115.txt b/doc/txt/tep115.txt
new file mode 100644
index 00000000..8c13ccbb
--- /dev/null
+++ b/doc/txt/tep115.txt
@@ -0,0 +1,559 @@
+======================================================================
+Power Management of Non-Virtualised Devices
+======================================================================
+
+:TEP: 115
+:Group: Core Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Vlado Handziski, Kevin Klues, Jan-Hinrich Hauer, Phil Levis
+
+:Draft-Created: 11-Jan-2006
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+                
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with TEP
+   1.
+
+Abstract
+======================================================================
+
+This memo documents how TinyOS 2.x manages the power state of physical
+(not virtualised) abstractions.
+
+1. Introduction
+======================================================================
+
+The energy resources on a typical TinyOS platform are limited, so
+every effort should be made to put all devices on a given platform
+into their lowest possible power-consumption states as often as
+possible. Depending on the device type, selecting the correct
+power-consumption state could be as simple as switching between on and
+off states, or could involve selecting the optimum state from among
+several.  Choosing the best power-consumption state requires making
+tradeoffs between various factors such as power consumption, fidelity,
+performance, and wake-up latency.
+
+Because of the large difference in the number of supported power-
+consumption states that could potentially be present on any given
+device, as well as the complexity in keeping track of the state
+information needed for safe execution of any sort of system wide
+power-control algorithm, a unified power management strategy for all
+devices on all possible platforms is simply infeasible.  Developing
+such a solution would most likely be overly complex and in some cases
+even suboptimal.  TinyOS 2.x, therefore, takes the approach of
+defining several different classes of devices for which several
+different power-management strategies have been optimized. [TEP112]_,
+for example, details how TinyOS 2.x manages the multiple power-
+consumption states for *microcontrollers.* This document, in turn,
+details the support for managing the *physical and dedicated* and
+*physical and shared* device classes as defined in [TEP108]_.  Devices
+belonging to these classes often have only two power consumption
+states (*on* and *off*), and can therefore be treated differently than
+devices that have multiple power consumption states. Additionally, it
+turns out that, in practice, TinyOS software often just uses the two
+most useful of the many power states in these cases.
+
+Various policies can be implemented on top of these two classes of
+devices that decide exactly when a device should be powered on or off.
+For *physical and shared* devices, for example, a power management
+policy could be written that explicitly powers a device on and off
+whenever the higher level component that uses it no longer requires
+it.  Another policy, however, might decide to defer the power down of
+the device for a a few milliseconds if its wake-up time is large
+enough and it is likely that the device will be needed again sometime
+in the near future.  A similar set of policies could be implemented
+for *physical and shared* devices, except that an attempt to power
+down such a device would not occur until *all* components using it had
+signalled that they no longer needed it.  Providing these sorts of
+policies cause devices belonging to one of these two classes to become
+virtualized in the sense that their power states are automatically
+handled.  Any higher level components connecting to one of these
+*virtual* devices need only signify when they require the use of the
+device and when they don't.  The time at which the device actually
+becomes powered on or off, is left up to the power managment policy
+being used.
+ 
+In order to provide the building blocks for implementing such power
+managment policies on top of *physical and dedicated* and *physical
+and shared* devices, TinyOS 2.x defines two different power management
+models that devices belonging to one of these two classes must adhere
+to: the *explicit power management* model and the *implicit power
+management* model.
+
+2. Power Management Models
+======================================================================
+
+The *explicit power management* model provides a means for explicitly
+controlling the power state of a physical device by some higher level
+component.  Whenever this higher level component tells the device to
+power up or down it does so without delay.  This model can be
+particularly useful when the control information driving the selection
+of the proper power state of a device is external to that device.
+
+The *implicit power management* model, on the other hand, provides a
+means for allowing the power state of a device to be controlled from
+within the device itself.  Devices following this model are never
+explicitly powered up or down by some external component, but rather
+*require* some policy to be defined that decides exactly when their
+power states should be changed.  This policy could exist natively on
+the hardware of the physical device itself, or be implemented on top
+of some lower level abstraction of the physical device which adheres
+to the *explicit power management* model.
+
+Just like in TinyOS 1.x, StdControl and SplitControl interfaces have
+been defined by TinyOS 2.x (along with a third interface,
+AsyncStdControl) in order to control the on and off states of devices
+that follow the *explicit power management* model.  One of these three
+interfaces SHOULD be provided by any component wrapping a hardware
+device that supports switching between an on and off state. The
+selection of the right interface depends on the latencies involved in
+changing between these two power states as well as the nature of the
+code (sync or async) executing any of the interfaces commands.
+
+Devices implemented according to the *implicit power management*
+model, on the other hand, MAY expose one of these three interfaces,
+but they are not required to do so.  Virtual abstractions of *physical
+and dedicated* devices that implement power management policies
+according to this model, will indeed provide one of the three
+derivatives of the StdControl interface.  The interface provided will
+no longer be used to explicitly power the device on and off, but
+rather allow the power management policy to determine whether the
+dedicated user of the device requires the device to be powered or not.
+It will then make its own decision as to which state to put the device
+in.
+
+For *physical and shared* devices, the information required to
+determine if one of its many users require it to be powered or not can
+be inferred through information provided by the Resource interface
+they provide.  Because of this, no StdControl-like interface needs to
+be provided, and the power management policy can act accordingly
+whenever users request of release the device.
+
+
+2.1 Explicit Power Management using StdControl
+----------------------------------------------------------------------
+
+When a devices powerup and powerdown times are negligible, they SHOULD
+provide the StdControl interface as defined below::
+
+   interface StdControl {
+     command error_t start();
+     command error_t stop();
+   }
+   
+
+An external component MUST call ``StdControl.start()`` to power a
+device on and ``StdControl.stop()`` to power a device off.  Calls to
+either command return SUCCESS or FAIL. 
+
+Upon the successful return of a call to ``StdControl.start()``, a
+device MUST be completely powered, and calls to commands of other
+interfaces implemented by the device abstraction CAN succeed.
+
+Upon the successful return of a call to ``StdControl.stop()``, a
+device MUST be completely powered down, and any subsequent operation
+requests through calls to commands of other interfaces implemented by
+that device abstraction MUST return FAIL or EOFF.
+
+If a device is not able to complete the ``StdControl.start()`` or
+``StdControl.stop()`` requests for any reason, they MUST return FAIL.
+
+Based on these specifications, this matrix describes the valid return
+values of calls based on the compoenent's power state:
+
++---------------------+-----------------+-----------------+
+| Call                | On              | Off             |
++=====================+=================+=================+
+| StdControl.start()  | SUCCESS         | SUCCESS or FAIL |
++---------------------+-----------------+-----------------+
+| StdControl.stop()   | SUCCESS or FAIL | SUCCESS         |
++---------------------+-----------------+-----------------+
+| operation           | depends         | FAIL or EOFF    |
++---------------------+-----------------+-----------------+
+
+Devices adhereing to this power management model would provide this
+interface as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface StdControl;  //For Power Management
+       ....
+     }
+   }
+
+
+2.2 Power Management with SplitControl
+----------------------------------------------------------------------
+
+When a devices powerup and powerdown times are non-negligible, the
+*SplitControl* interface MUST be used in place of the *StdControl*
+interface.  The definition of this interface can be seen below::
+
+   interface SplitControl {
+     command error_t start();
+     event void startDone(error_t error);
+     command error_t stop();
+     event void stopDone(error_t error);
+   }
+   
+
+An external component MUST call ``SplitControl.start()`` to power a
+device on and ``SplitControl.stop()`` to power a device off.  Calls to
+either command return one of SUCCESS, FAIL, or EBUSY.
+
+Successful calls to ``SplitControl.startDone()`` MUST signal one of
+``SplitControl.startDone(SUCCESS)`` or
+``SplitControl.startDone(FAIL)``.
+
+Successful calls to ``SplitControl.stopDone()`` MUST signal one of
+``SplitControl.stopDone(SUCCESS)`` or ``SplitControl.stopDone(FAIL)``.
+
+Upon signalling either a ``SplitControl.startDone(SUCCESS)`` or a
+``SplitControl.stopDone(FAIL)`` event, a device MUST be completely
+powered, and operation requests through calls to commands of other
+interfaces implemented by the device abstraction SHOULD succeed.
+
+Upon signalling either a ``SplitControl.stopDone(SUCCESS)`` or a
+``SplitControl.startDone(FAIL)`` event, a device MUST be completely
+powered down, and any subsequent calls to commands of other interfaces
+implemented by the device abstraction MUST return EOFF or FAIL.
+
+If a device is not able to complete the ``SplitControl.start()`` or
+``SplitControl.stop()`` requests for any reason, they MUST return
+FAIL.
+
+Calls to either ``StdControl.start()`` or ``StdControl.stop()`` while
+a start or top operattion is pending MUST return an EBUSY.
+
++----------------------+---------+---------+----------+----------+ 
+| Call                 | On      | Off     | Starting | Stopping |
++======================+=========+=========+==========+==========+
+| SplitControl.start() | SUCCESS | SUCCESS | EBUSY    | EBUSY    |
+|                      |         | FAIL    |          |          |
++----------------------+---------+---------+----------+----------+
+| SplitControl.stop()  | SUCCESS | SUCCESS | EBUSY    | EBUSY    |
+|                      | FAIL    |         |          |          |
++----------------------+---------+---------+----------+----------+
+| operation            | depends | FAIL    | FAIL     | FAIL     |
+|                      |         | EOFF    | EOFF     | EOFF     |
+|                      |         | EOFF    | SUCCESS  |          |
++----------------------+---------+---------+----------+----------+
+
+Devices adhereing to this power management model would provide this
+interface as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface SplitControl; \\ For Power Management
+       ....
+     }
+   }
+
+
+2.3 Power Management with AsyncStdControl 
+----------------------------------------------------------------------
+
+The commands and the events of the *StdControl* and the *SplitControl*
+interfaces are synchronous and can not be called from within
+asynchronous code (such as interrupt service routines, etc.). For the
+cases when the power state of the device needs to be controlled from
+within asynchronous code, the *AsyncStdControl* interface MUST be used
+in place of the *StdControl* interface.  The definition of this
+interface can be seen below::
+
+   interface AsyncStdControl {
+     async command error_t start();
+     async command error_t stop();
+   }
+   
+
+All of the semantics that held true for devices providing the
+StdControl interface also hold for this interface.
+   
+Devices adhereing to this power management model would provide this
+interface as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface AsyncStdControl; \\ For Power Management
+       ....
+     }
+   }
+   
+   
+   .. Note::
+      
+   Determining exactly when to use the AsyncStdControl interface
+   instead of simply posting a task and using the StdControl interface
+   can be tricky.  One must consider the advantages and disadvantages
+   of using one interface over the other.  How complex is the code
+   being I am trying to execute?  Do I really want to execute all of
+   my startup code in async context?  Do I gain some performance in
+   terms of startup latency or code size if I run my startup code in
+   async context?  These are just a few of the factors that need to be
+   considered when making this decision, and unfortunately there just
+   is no easy answer. Note that a component with an AsyncStdControl
+   cannot call SplitControl or StdControl. In practice, AsyncStdControl
+   is used for low-level hardware resources.
+
+
+3. Power management policies
+======================================================================
+
+While the *explicit power management* model provides the basic means
+for controlling the power state of the device, it is void of any
+*policy* about who, when, or how the power of the device should be
+managed. This does not represent a large problem for the simple case
+of *physical and dedicated* devices, but can become crucial for
+non-trivial cases involving complex interdependencies between devices
+being controlled by multiple users.
+
+For example, if component *A* is *using* two devices, *B* and *C*,
+what happens with *B* and *C* when one calls ``StdControl.stop()`` on
+the top component *A*? The above problem has its dual in the case of
+shared devices. Assuming that device *A* is shared by components *B*
+and *C*, the question exists as to when device *A* can be powered
+down?
+
+The complex nature of the problem is evident from the number of
+unexpected behaviors in TinyOS 1.x involving StdControl. On several
+platforms, one of the SPI buses is shared between the radio and the
+flash device. On some of them, issuing ``StdControl.stop()`` on the
+radio results in a cascaded SPI bus becoming disabled, rendering the
+communication with the flash impossible. Of course, the right policy
+would involve tracking the users of the SPI bus and powering it off
+only once both the radio and the flash devices wer no longer using
+it. Conversely, the SPI bus should be powered on whenever there is at
+least one active user.
+
+The selection of the right policy is a complex task that depends on
+the nature of the devices, their interdependency, as well as on the
+application requirements. For the cases when some of these features
+are known a-priori or are restricted in some sense, it is preferable
+that the system provide architectural support for enforcing a
+meaningful *default* power-management policy instead of simply passing
+the task to the application programmer to be solved on a case-by-case
+basis.
+
+TinyOS 2.x provides two contexts of restricted resource
+interdependency where such a default power-management policy can be
+offered. For *physical and shared* resources (defined in [TEP108]_)
+(and covered by the Hardware Abstraction Architecture [TEP2]_), TinyOS
+2.x provides a flexible *implicit power management* model that is
+tightly coupled with the *arbiter* concept and uses the basic
+mechanisms offered by the *explicit power management* scheme.
+
+
+4. Implicit Power Management for Physical and Shared Resources
+----------------------------------------------------------------------------
+
+The *physical and shared* resource class defined in Section 2.3 of
+[TEP108], provides a well defined component interdependency, where a
+single resource is shared among multiple clients. This relationship
+enables definition of a simple default power-management policy that
+powers the resource off when no potential users are waiting for access
+to the resource. Conversely, the resource is powered on whenever a
+client requests its use.  When the resource being controlled happens
+to be an actual physical device, the *implicit power management* model
+for physical devices as described in section two applies.
+
+The realization of a specific power-control policy for shared reources
+does not need to be resource specific.  Just as generic arbiters are
+offered in TinyOS 2.x to provide the arbitration functionality
+required by shared resources, generic power management policies are
+also offered to allow the power management of devices to be automated.
+
+The *PowerManager* component implementing one of these polices acts as
+the *lowest-priority user* of the shared resource. In contrast to
+"normal" clients, the *PowerManager* interacts with the resource
+arbiter using the richer *ResourceController* interface::
+
+    interface ResourceController {
+        async command error_t request();
+        async command error_t immediateRequest();
+        event void granted();
+        async command void release();
+        async event void requested(); 
+        async event void idle(); 
+    }
+    
+    
+Acting as a lowest priority client, the *Power Manager* waits for the
+``ResourceController.idle()`` event to be signalled before trying to
+gain ownership over the resource.  It does so using the
+``ResourceController.immediateRequest()`` command in order to gain
+control of the resource as quickly as possible.
+
+Once it owns the resource, the *PowerManager* is free to execute its
+power-management policy using the mechanisms provided by the resource
+via the *explicit power-management* model. Different managers can
+implement different policies. In the simplest case, this would involve
+an immediate power-down via one of the ``.stop()`` commands. When the
+power-state transition involves non-negligible costs in terms of
+wake-up latency or power consumption, the *PowerManager* might revert
+to a more intelligent strategy that tries to reduce these effects.
+One strategy might involve using a delayed power-down timer to defer
+the powers-down of a resource to some later point in time unless some
+normal-priority client requests the device in the meantime.
+
+Regardless of the power-off policy, the *PowerManager* remains owner
+of the resource as long as the resource is not requested by a normal
+user.  When one of these "normal" users finally makes a request, the
+*PowerManager* component will receive a
+``ResourceController.requested()`` from the arbiter it is associated
+with. Upon receiving this event, the *PowerManager* MUST power the
+resource back on (in case it was powered-off) through one of the
+*explicit power-management* interfaces provided by the lower level
+abstraction of the physical device. The *PowerManager* can release the
+ownership of the resource (using the ``ResourceController.release()``
+command) ONLY after the resource has been fully powered-on.
+
+Modeling devices as shared resources and allowing them to be
+controlled in the way described here, solves the problems outlined in
+section 3 regarding how to keep track of who, when, and how the
+powerdown of nested resources should proceed.  The *PowerManager*
+component answers the question of who, the combination of the power
+management policy being used and the reception of the
+``ResourceController.idle()`` and ``ResourceController.requested()``
+events answers the question of when, and through one of the *explicit
+power-management* interfaces provided by the lower level abstraction
+of the physical device answers how.  As long as the device resource at
+the bottom of a large set of nested resource users is released at the
+proper time, the power mananger will ba ble to power down its device
+appropriately.
+
+Using the model described above, a device resource that follows the
+*implicitly powere management* model could be built as shown below::
+
+     module MyFlashP {
+       provides {
+	 interface Init;
+	 interface SplitControl;
+	 interface Resource;
+	 ...
+       }
+     }
+     implementation {
+     ...
+     }     
+
+     generic module PowerManagerC(uint8_t POWERDOWN_DELAY) {
+       provides {
+	 interface Init;
+       }
+       uses {
+	 interface SplitControl;
+	 interface ResourceController;
+       }
+     }
+     implementation {
+     ...
+     }
+
+     #define MYFLASH_RESOURCE "MyFlash.resource"
+     configuration MyFlashC {
+       provides {
+	 interface Init;
+	 interface Resource;
+       }
+     }
+     implementation {
+       components new PowerManagerC(MYFLASH_POWERDOWN_DELAY)
+		, FcfsArbiter(MYFLASH_RESOURCE)
+		, MyFlashP;
+
+       Init = MyFlashP;
+       Resource = FcfsArbiter; 
+
+       PowerManagerC.ResourceController -> FcfsArbiter;
+       PowerManagerC.SplitControl -> MyFlashP;
+     }
+     
+
+This example implementation is built out of three components.  The
+first component (MyFlashP) follows the *explicit power management*
+model for defining the interfaces to the physical flash device.  The
+second component (PowerManagerC) is the generic *powermanager*
+component that will be used to implement the specific power management
+policy for this device.  The third component (MyFlashC) is the
+configuration file that wires together all of the components required
+by the implementation of device adhereing to the *implicit power
+management* model.  It includes the MyflashP and PowerManagerC
+components, as well as an arbiter component for managing shared users
+of the device.  Notice how the *powermanager* is wired to both the
+resourcecontroller interface provided by the arbiter, and the
+SplitControl interface provided by the flash.  All normal users of the
+resource are directly connected to the resource interface provided by
+the arbiter.  As outlined above, the PowerManagerC component will use
+the events signalled through the ResourceController interface from the
+arbiter to determine when to make calls to the commands provided by
+the SplitControl interface coming from the FlashP component in order
+to power it up and power it down.
+
+
+5. Sample Power Managers: PowerManagerC and DeferredPowerManagerC
+====================================================================
+
+TinyOS 2.x currently has two sample power management policies in
+lib/power. Each policy has three implementations: StdControl,
+SplitControl, and AsyncStdControl. The two policies are *immediate*
+and *deferred*. T
+
+
+
+
+6. Author's Address
+====================================================================
+
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| phone - +49 30 314 23831
+| email - handzisk@tkn.tu-berlin.de
+|
+| Kevin Klues
+| 503 Bryan Hall
+| Washington University
+| St. Louis, MO 63130
+|
+| phone - +1-314-935-6355
+| email - klueska@cs.wustl.edu
+|
+| Jan-Hinrich Hauer
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| phone - +49 30 314 23813
+| email - hauer@tkn.tu-berlin.de
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu 
+
+6. Citations
+====================================================================
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture.
+.. [TEP108] TEP 108: Resource Arbitration.
+.. [TEP112] TEP 112: Microcontroller Power Management.
+
diff --git a/doc/txt/tep116.txt b/doc/txt/tep116.txt
new file mode 100644
index 00000000..86c0b880
--- /dev/null
+++ b/doc/txt/tep116.txt
@@ -0,0 +1,631 @@
+============================
+Packet Protocols
+============================
+
+:TEP: 116 
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis
+
+:Draft-Created: 10-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+============================================================================
+
+The memo documents the interfaces used by packet protocol components in  
+TinyOS 2.x as well as the structure and implementation of ActiveMessageC, 
+the basic data-link HIL component. It also documents the virtualized
+active message interfaces AMSender and AMReceiver.
+
+1. Introduction
+============================================================================
+
+Sensor nodes are network-centric devices. Much of their software
+complexity comes from network protocols and their interactions.
+In TinyOS, the basic network abstraction is an *active message*,
+a single-hop, unreliable packet. Active messages have a destination
+address, provide synchronous acknowledgements, and can be of
+variable length up to a fixed maximum size. They also have a 
+type field, which is essentially a protocol identifier for
+components built on top of this abstraction.
+
+In TinyOS 1.x, the component GenericComm provides interfaces for
+transmitting and receiving active messages::
+
+  configuration GenericComm {
+    provides {
+      interface StdControl as Control;
+      interface SendMsg[uint8_t id];
+      interface ReceiveMsg[uint8_t id];
+      command uint16_t activity();
+    }
+    uses {
+      event result_t sendDone();
+    }
+  }
+
+This component, while simple, has several issues. First, it has the
+activity() commmand, which does not have a single caller in the entire
+TinyOS tree. This command requires GenericComm to allocate a 
+timer, wasting CPU cycles and RAM. 
+
+Second, it does not allow a node to receive packets besides
+those destined to it.  Several network
+protocols (e.g., MintRoute [1]_, TAG [2]_) take advantage 
+of snooping on these packets for a variety of improvements in efficiency or
+performance. This has led to the creation of GenericCommPromiscuous,
+whose Receive interface does not distinguish
+between packets received that were addressed to the node and
+packets received that were addressed to other nodes. Choosing
+one of the two implementations is a global decision across
+an application. There is a way to enable both reception
+semantics at the same time for a different protocols, 
+but they require a creative use of default event handlers.
+
+Third, it assumes that components will directly access the packet
+structure, the accepted approach in TinyOS 1.x. However, directly
+accessing packet structures introduces unforseen dependencies:
+a component that names a header field, for example, binds itself
+to data link layers that have a field with that name. Similarly,
+components on top of GenericComm directly access the data payload
+of a packet.
+
+TEP 111 documents the structure of a TinyOS 2.x packet buffer [3]_.
+This TEP documents the interfaces used to access packet buffers,
+as well as ActiveMessageC, the basic data-link packet communication
+HIL.
+
+2. Communication interfaces
+============================================================================
+
+Packet-level communication has three basic classes of interfaces.
+*Packet* interfaces are for accessing message fields and payloads. 
+*Send* interfaces are for transmitting packets, and are
+distinguished by their addressing scheme. 
+Finally, the *Receive* interface is for handling packet reception events.
+
+2.1 Packet interfaces
+--------------------------------------------------------------------
+
+The basic TinyOS 2.x message buffer type is message_t, which is 
+described in TEP 111. message_t right-justifies data-link
+headers to the data payload so that higher-level components can 
+pass buffers between different data link layers without having
+to move data payloads. This means that the data payload of a 
+data link frame is always at a fixed offset of a message_t.
+
+Once protocols layer on top of each other, the data
+payload for components on top of the data link layer are
+no longer at a fixed offset. Where a component can put its 
+header or data depends on what headers underlying components
+introduce. Therefore, in order to be able to find out where
+it can put its data, it must query the components below it.
+The Packet interface defines this mechanism::
+
+  interface Packet {
+    command void clear(message_t* msg);
+    command uint8_t payloadLength(message_t* msg);
+    command void setPayLoadLength(message_t* msg, uint8_t len);
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t* len);
+  }
+
+A component can obtain a pointer to its data region within a packet by
+calling ``getPayload()`` the optional ``len`` argument is for also
+obtaining the size of the data region. A provider of a Packet
+interface MUST check if ``len`` is NULL and ignore it if it is. A
+component can also obtain the size of the data region with a call to
+``payloadLength``. 
+
+A component can set the payload length with
+``setPayLoadLength.`` As Send interfaces always include a length
+parameter in their send call, this command is not required for
+sending, and so is never called in common use cases. Instead, 
+it is a way for queues and other packet buffering components
+to store the full state of a packet without requiring additional
+memory allocation.
+
+The distinction between ``payloadLength`` and ``maxPayloadLength``
+comes from whether the packet is being received or sent. In the receive
+case, determining the size of the existing data payload is needed;
+in the send case, a component needs to know how much data it can put
+in the packet. 
+
+The Packet interface assumes that headers have a fixed size. 
+It is difficult to return a pointer into the data region when its 
+position will only be known once the header values are bound.
+
+Generally, an incoming call to the Packet interface of a protocol
+has an accompanying outgoing call to the Packet interface of the 
+component below it. The one exception to this is the data link
+layer. For example, if there is a network that introduces
+16-bit sequence numbers to packets, it might look like this::
+
+  generic module SequenceNumber {
+    provides interface Packet;
+    uses interface Packet as SubPacket;
+  }
+  implementation {
+    typedef nx_struct seq_header {
+      nx_uint16_t seqNo;
+    } seq_header_t;
+
+    enum {
+      SEQNO_OFFSET = sizeof(seq_header_t),
+    };
+ 
+    command void Packet.clear(message_t* msg) {
+      uint8_t len;
+      void* payload = call SubPacket.getPayload(msg, &len);
+      memset(payload, len, 0);
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg) {
+      return SubPacket.payloadLength(msg) - SEQNO_OFFSET;
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+      SubPacket.setPayloadLength(msg, len + SEQNO_OFFSET);
+    }
+
+    command uint8_t Packet.maxPayloadLength() {
+      return SubPacket.maxPayloadLength(msg) - SEQNO_OFFSET;
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+      uint8_t* payload = call SubPacket.getPayload(msg, len);
+      if (len != NULL) {
+        *len -= SEQNO_OFFSET;
+      }
+      return payload + SEQNO_OFFSET; 
+    } 
+  }
+
+
+The above example is incomplete: it does not include the code for
+the send path that increments sequence numbers. 
+
+In practice, calls to Packet are very efficient even if they 
+pass through many components before reaching the data link
+layer. nesC's inlining means that in almost all cases
+there will not actually be any function calls, and since payload
+position and length calculations all use constant offsets,
+the compiler generally uses constant folding to generate a 
+fixed offset. 
+
+The Packet interface provides access to the one field all packet
+layers have, the data payload. Communication layers can add additional
+header and footer fields, and may need to provide access to these
+fields. If a packet communication component provides access to header
+and/or footer fields, it MUST do so through an interface. The interface 
+SHOULD have a name of the form *XPacket*, where *X* is a name that
+describes the communication layer. For example, active message components
+provide both the Packet interface and the AMPacket interface. The latter
+has this signature::
+
+  interface AMPacket {
+    command am_addr_t address();
+    command am_addr_t destination(message_t* amsg);
+    command void setDestination(message_t* amsg, am_addr_t addr);
+    command bool isForMe(message_t* amsg);
+    command am_id_t type(message_t* amsg);
+    command void setType(message_t* amsg, am_id_t t);
+  }
+
+
+The command address() returns the local AM address of the
+node. AMPacket provides accessors for its two fields, destination and
+type. It does not provide commands to set these fields, as they are
+set in the sending call path (see Section 2.3). The ``setDestination``
+and ``setType`` commands fulfill a similar purpose to
+``Packet.setLength``.
+
+2.2 Sending interfaces
+--------------------------------------------------------------------
+
+There are multiple sending interfaces, corresponding to different
+addressing modes. For example, address-free protocols, such as
+collection routing, provide the basic ``Send`` interface. Active
+message communication has a destination of an AM address, so
+it provides the ``AMSend`` interface.  This, for example, is the 
+basic, address-free Send interface::
+
+  interface Send {
+    command error_t send(message_t* msg, uint8_t len);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);  
+
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg);
+  }
+
+while this is the AMSend interface::
+
+  interface AMSend {
+    command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);
+
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg); 
+  }
+
+Sending interfaces MUST include these four commands and one event.
+The duplication of some of the commands in Packet is solely for ease
+of use: ``maxPayloadLength`` and ``getPayload`` MUST behave
+identically as ``Packet.maxPayloadLength`` and ``Packet.getPayload``,
+with the exception that the latter has no length parameter (it should
+behave as if the length parameter of the ``Packet`` call were
+NULL). Their inclusion is so that components do not have to wire to
+both Packet and the sending interface for basic use cases.
+
+2.3 Receive interface
+--------------------------------------------------------------------
+
+Receive is the interface for receiving packets. It has this signature::
+
+  interface Receive {
+    event message_t* receive(message_t* msg, void* payload, uint8_t len);
+    command void* getPayload(message_t* msg, uint8_t* len);
+    command uint8_t payloadLength(message_t* msg);
+  }
+
+A call to ``Receive.getPayload()`` MUST behave identically to a call
+to ``Packet.getPayload()``. The ``receive()`` event's ``payload``
+parameter MUST be identical to what a call to ``getPayload()`` would
+return, and the ``len`` parameter MUST be identical to the length that
+a call to ``getPayload`` would return. These parameters are for
+convenience, as they are commonly used by receive handlers, and their
+presence removes the need for a call to ``getPayload()``, while
+``getPayload()`` is a convenience so a component does not have to wire
+to ``Packet.`` The command ``payloadLength`` has a similar motivation
+and the same semantics as its twin in ``Packet``.
+
+Receive has a *buffer-swap* policy. The handler of the event MUST return
+a pointer to a valid message buffer for the signaler to use. This
+approach enforces an equilibrium between upper and lower packet 
+layers. If an upper layer cannot handle packets as quickly as they
+are arriving, it still has to return a valid buffer to the lower
+layer. This buffer could be the ``msg`` parameter passed to it: it
+just returns the buffer it was given without looking at it. Following
+this policy means that a data-rate mismatch in an upper-level component 
+will be isolated to that component. It will drop packets, but it will
+not prevent other components from receiving packets. If an upper
+layer did not have to return a buffer immediately, then when an
+upper layer cannot handle packets quickly enough it will end up
+holding all of them, starving lower layers and possibly preventing
+packet reception.
+
+A *user* of the Receive interface has three basic options when it
+handles a receive event:
+
+1) Return ``msg`` without touching it.
+2) Copy some data out of ``payload`` and return ``msg``.
+3) Store ``msg`` in its local frame and return a different ``message_t*`` for the lower layer to use.
+
+These are simple code examples of the three cases::
+
+  // Case 1
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    return msg; 
+  }  
+
+  // Case 2
+  uint16_t value;
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (len >= sizeof(uint16_t)) {
+      nx_uint16_t* nval = (nx_uint16_t*)payload;
+      value = *nval;
+    }
+    return msg;
+  }
+
+  //Case 3
+  message_t* ptr;
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    message_t* tmp = ptr;
+    ptr = msg;
+    post processTask();
+    return tmp;
+  }
+
+
+Because of case 3), a lower layer MUST respect the buffer swap semantics
+and use the pointer returned from ``receive``. The pointer passed as
+a parameter to ``receive`` MUST NOT be touched, used, or stored after
+the signaling of ``receive.``
+
+2.4 Dispatch
+--------------------------------------------------------------------
+
+A packet protocol MAY have a dispatch identifier. This generally manifests
+as the protocol component provided parameterized interfaces (rather than
+a single interface instances). A dispatch identifier allows multiple 
+services to use a protocol independently. If a protocol provides a
+dispatch mechanism, then each dispatch identifier SHOULD correspond to
+a single packet format: if an identifier corresponds to multiple packet
+formats, then there is no way to disambiguate them. Packets whose internal 
+structure depends on their fields (for example,
+a packet that has a control field which indicates which optional fields
+are present) do not pose such problems.
+
+3. HIL: ActiveMessageC
+============================================================================
+
+A platform MUST provide ActiveMessageC as a basic HIL to 
+packet-level communication.  ActiveMessageC provides a best-effort, 
+single-hop communication abstraction.  Every active message has a 
+16-bit destination address and an 8-bit type. There is one reserved 
+destination address, ``AM_BROADCAST_ADDR``, which has the value 
+of ``0xffff``. ActiveMessageC has the following signature::
+
+  configuration ActiveMessageC {
+    provides {
+      interface Init;
+      interface SplitControl;  
+
+      interface AMSend[uint8_t id];
+      interface Receive[uint8_t id];
+      interface Receive as Snoop[uint8_t id];
+ 
+      interface Packet;
+      interface AMPacket;
+      interface PacketAcknowledgements;
+    }
+  }
+
+The Receive interface is for packets destined to the node, while 
+the Snoop interface is for packets destined to other nodes. A 
+packet is destined for a node if its destination AM address is 
+either the AM broadcast address or an address associated with 
+the AM stack. Different link layers have different snooping 
+capabilities. The Snoop interface does not assume always-on 
+listening, for example, in the case of a TDMA or RTS/CTS data 
+link layer. By separating out these two interfaces, ActiveMessageC
+avoids the complications encountered in 1.x with regards to
+GenericComm vs. GenericCommPromiscuous.
+
+ActiveMessageC is usually just a configuration that has
+pass-through wiring to a chip-specific HAL active message
+implementation. The definition of ActiveMessageC is left
+to the platform for when a node has more than one
+radio. In this case, the platform decides how to map the
+basic packet abstraction to the hardware underneath. Approaches 
+include choosing one radio or having some form of address-based
+dispatch.
+
+
+4. AM Services: AMSenderC, AMReceiverC, AMSnooperC, AMSnoopingReceiverC
+============================================================================
+
+TinyOS 2.x provides four component single-hop communication
+virtualizations to applications:
+AMReceiverC, AMSnooperC, AMSnoopingReceiverC, and AMSenderC. Each is a
+generic component that takes an active message ID as a
+parameter. These components assume the existence of ActiveMessageC.
+
+4.1 Dispatch: ``am_id_t``
+--------------------------------------------------------------------
+
+Active messages have an 8-bit type field, which allows multiple
+protocols to all use AM communication without conflicting. Following
+the guidelines for protocol dispatch identifiers, each
+am_id_t used in a network SHOULD have a single packet format, so
+that the am_id_t, combined with the packet contents, are sufficient
+to determine the exact packet format.
+
+4.2 AMReceiverC
+--------------------------------------------------------------------
+
+AMReceiverC has the following signature::
+
+  generic configuration AMReceiverC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMReceiver.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is the local address or the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMReceivers with the same am_id_t and MUST NOT
+instantiate an AMReceiver and an AMSnoopingReceiver with the same
+am_id_t.
+
+4.3 AMSnooperC
+--------------------------------------------------------------------
+
+AMSnooper has an identical signature to AMReceiver::
+
+  generic configuration AMSnooperC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMSnooper.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is neither to the local address nor the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMSnoopers with the same am_id_t and MUST NOT
+instantiate an AMSnooper and an AMSnoopingReceiver with the same
+am_id_t.
+
+4.4 AMSnoopingReceiverC
+--------------------------------------------------------------------
+
+AMSnoopingReceiverC has an identical signature to AMReceiverC::
+
+  generic configuration AMSnoopingReceiverC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMSnoopingReceiverC.Receive.receive is signalled whenever the packet
+layer receives an active message of the corresponding AM type,
+regardless of destination address. Note that since Receive.receive
+swaps buffers, a program that instantiates an AMSnoopingReceiverC with
+a certain am_id_t MUST NOT instantiate another AMSnoopingReceiverC,
+AMSnooperC, or AMReceiverC with the same am_id_t.
+
+4.5 AMSender 
+--------------------------------------------------------------------
+
+AMSenderC has the following signature::
+
+  generic configuration AMSenderC(am_id_t AMId) {
+    provides {
+      interface AMSend;
+      interface Packet;
+      interface AMPacket;
+      interface PacketAcknowledgements as Acks;
+    }
+  }
+
+Because this is a send virtualization, AMSenderC.AMSend.send returns
+EBUSY only if there is a send request outstanding on this particular
+AMSenderC. That is, each AMSenderC has a queue of depth one. The exact
+order in which pending AMSenderC requests are serviced is undefined,
+but it MUST be fair, where fair means that each client with outstanding
+packets receives a reasonable approximation of an equal share of the 
+available transmission bandwidth.
+
+4.6 Power Management
+--------------------------------------------------------------------
+
+The communication virtualizations do not support power management.
+ActiveMessageC provides SplitControl for explicit power control.
+For packet communication to operate properly, a component in an 
+application has to call ActiveMessageC.SplitControl.start().
+The HAL underneath ActiveMessageC  MAY employ power management 
+techniques, such as TDMA scheduling or low power listening, when
+"on."
+
+5. HAL Requirements
+============================================================================
+
+A radio chip *X* MUST have a packet abstraction with the following
+signature::
+
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface AMSend[am_id_t type];
+  provides interface Receive[am_id_t type];
+  provides interface Receive as Snoop[am_id_t type];
+  provides interface Packet;
+  provides interface AMPacket;
+  provides interface PacketAcknowledgments;
+
+
+The component SHOULD be named *XActiveMessageC*, where *X* is 
+the name of the radio chip. The component MAY have additional interfaces. 
+These interfaces can either be chip-specific or chip-independent. 
+
+6. message_t
+============================================================================
+
+Active messages are a basic single-hop packet abstraction. Therefore,
+following TEP 111 [3]_, all data link and active message headers
+MUST be in the ``message_header_t`` structure of message_t. This ensures
+that an active message received from one data link layer (e.g., the radio)
+can be passed to another data link layer (e.g., the UART) without
+shifting the data payload. This means that the ``message_header_t`` must
+include all data needed for AM fields, which might introduce headers
+in addition to those of the data link. For example, this is the 
+structure of the CC2420 header::
+
+  typedef nx_struct cc2420_header_t {
+    nx_uint8_t length;
+    nx_uint16_t fcf;
+    nx_uint8_t dsn;
+    nx_uint16_t destpan;
+    nx_uint16_t dest;
+    nx_uint16_t src;
+    nx_uint8_t type;
+  } cc2420_header_t;
+
+
+The first six fields (length through src) are all 802.15.4 headers. The
+type field, however, has been added to the header structure in order
+to support AM dispatch.
+
+7. Implementation
+============================================================================
+
+The following files in ``tinyos-2.x/tos/system`` provide reference 
+implementations of the abstractions described in this TEP.
+
+  * ``AMSenderC.nc``, ``AMReceiverC.nc``, ``AMSnooperC.nc``,
+    and ``AMSnoopingReceiverC.nc`` are implementations of 
+    virtualized AM services.
+  * ``AMQueueP`` provides a send queue of *n* entries for *n*
+    AMSenderC clients, such that each client has a dedicated entry.
+  * ``AMQueueImplP`` is the underlying queue implementation,
+    which is reusable for different clients (it is also used
+    in the serial stack [4]_).
+  * ``AMQueueEntryP`` sits on top of ``AMQueueP`` and stores
+    the parameters to ``AMSend.send`` in an outstanding
+    packet with the ``AMPacket`` interface.
+
+The following files in ``tinyos-2.x/tos/interfaces`` contain
+example implementations of packet protocol interfaces:
+
+  * ``Packet.nc`` is the basic interface that almost all
+    packet protocols provide.
+  * ``Send.nc`` is the transmission interface for address-free 
+     protocols.
+  * ``AMSend.nc`` is the transmission interface for AM address
+     send protocols.
+  * ``AMPacket.nc`` is the packet interface for AM-specific
+    fields.
+
+An active messaging implementation for the CC2420 radio chip
+can be found in ``tos/chips/CC2420/CC2420ActiveMessageC.nc``.
+The micaz platform and telos family have an ``ActiveMessageC.nc``
+which exports the interfaces of ``CC2420ActiveMessageC``.
+
+8. Author's Address
+============================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+
+9. Citations
+============================================================================
+
+.. [1] The MintRoute protocol. ``tinyos-1.x/tos/lib/MintRoute``. Also, A. Woo, T. Tong, and D. Culler. "Taming the Underlying Challenges of Reliable Multihop Routing in Sensor Networks." SenSys 2003.
+
+.. [2] Tiny AGgregation, one protocol of the TinyDB system.  ``tinyos-1.x/tos/lib/TinyDB``. Also, S. Madden and M. Franklin and J. Hellerstein and W. Hong. "TinyDB: An Acquisitional Query Processing System for Sensor Networks." Transactions on Database Systems (TODS) 2005.
+
+.. [3] TEP 111: message_t.
+
+.. [4] TEP 113: Serial Communication.
+
+
+
+ 
diff --git a/doc/txt/tep117.txt b/doc/txt/tep117.txt
new file mode 100644
index 00000000..635fde13
--- /dev/null
+++ b/doc/txt/tep117.txt
@@ -0,0 +1,228 @@
+============================
+Pins and Buses
+============================
+
+:TEP: 117
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Phil Buonadonna
+
+:Draft-Created: 23-Jan-2006
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the TinyOS 2.x interfaces used for controlling
+digital IO functionality and digital interfaces other than serial
+communication covered in [tep113].
+
+
+1. Introduction
+====================================================================
+
+The canonical TinyOS device is likely to have a variety of digital
+interfaces. These interfaces may be divided into two broad
+categories. The first are general purpose digital I/O lines (pins)
+for individual digital signals at physical pins on a chip or
+platform. The second are digital I/O interfaces that have predefined
+communication protocol formats. The two buses covered in this
+document are the Serial Peripheral Interface (SPI) and the
+Inter-Integrated Circuit (I2c) or Two-Wire interface. While there are
+likely other bus formats, we presume SPI and I2C to have the largest
+coverage. While the UART interface is also in this category, it is
+covered separately in [tep113].
+
+This memo documents the interfaces used for pins and the two buses.
+
+2. Pins
+====================================================================
+
+General Purpose I/O (GPIO) pins are single, versatile digital I/O signals
+individually controllable on a particular chip or platform. Each GPIO
+can be placed into either an input mode or an output mode. On
+some platforms a third 'tri-state' mode may exist, but this
+functionality is platform specific and will not be covered in this
+document.  
+
+On many platforms, a physical pin may function as either a digital GPIO
+or another special function I/O such. Examples include ADC I/O or a bus
+I/O. Interfaces to configure the specific function of a pin are
+platform specific.  
+
+The objective of the interfaces described here is not to attempt to
+cover all possibilities of GPIO functionality and features, but to
+distill down to a basis that may be expected on most platforms.
+
+In input mode, we assume the following capabilities:
+ * The ability to arbitrarily sample the pin
+ * The ability to generate an interrupt/event from either a rising edge or falling edge digital signal.
+ 
+In output mode, we assume the following capabilities:
+ * An I/O may be individually cleared (low) or set (hi)
+ 
+Platform that provide GPIO capabilities MUST provide the following HIL
+interfaces:
+
+ * GeneralIO
+ * GpioInterrupt
+
+Platforms MAY provide the following capture interface.
+
+ * GpioCapture
+
+2.1 GeneralIO 
+--------------------------------------------------------------------
+
+The GeneralIO HIL interface is the fundamental mechanism for controlling a
+GPIO pin. The interface provides a mechanism for setting the pin mode
+and reading/setting the pin value. The toggle function switches the
+output state to the opposite of what it currently is.
+ 
+Platforms with GPIO functionality MUST provide this interface. It
+SHOULD be provided in a component named GeneralIOC, but MAY be
+provided in other components as needed. ::
+
+ interface GeneralIO
+ {
+   async command void set();
+   async command void clr();
+   async command void toggle();
+   async command bool get();
+   async command void makeInput();
+   async command void makeOutput();
+ }
+
+
+
+2.2 GpioInterrupt
+--------------------------------------------------------------------
+
+The GPIO Interrupt HIL interface provides baseline event control for a 
+GPIO pin. It provides a mechanism to detect a rising edge OR a falling
+edge. Note that calls to enableRisingEdge and enableFallingEdge are
+NOT cumulative and only one edge may be detected at a time. There may
+be other edge events supported by the platform which MAY be exported
+through a platform specific HAL interface. ::
+ 
+ interface GpioInterrupt {
+ 
+   async command error_t enableRisingEdge();
+   async command error_t enableFallingEdge();
+   async command error_t disable();
+   async event void fired();
+ 
+ }
+
+
+2.3 GpioCapture
+--------------------------------------------------------------------
+
+The GpioCapture interface provides a means of associating a timestamp
+with a GPIO event. Platforms MAY provide this interface.
+
+Some platforms may have hardware support for such a feature. Other
+platforms may emulate this capability using the SoftCaptureC
+component. The interface makes not declaration of the precision or
+accuracy of the timestamp with respect to the associated GPIO event. ::
+
+ interface GpioCapture {
+ 
+   async command error_t captureRisingEdge();
+   async command error_t captureFallingEdge();
+   async event void captured(uint16_t time);
+   async command void disable();
+ 
+ }
+
+
+3. Buses
+====================================================================
+
+Bus operations may be divided into two categories: data and
+control. The control operations of a particular bus controller are
+platform specific and not covered here. Instead, we focus on the data
+interfaces at the HIL level that are expected to be provided.
+
+3.1 Serial Peripheral Interface
+--------------------------------------------------------------------
+
+The Serial Peripheral Interface (SPI) is part of a larger class of
+Synchronous Serial Protocols.  The term SPI typically refers to the
+Motorola SPI protocols. Other protocols include the National
+Semiconductor Microwire, the TI Synchronous Serial Protocol and the
+Programmable Serial Protocol. The dataside interfaces here were
+developed for the Motorola SPI format, but may work for others.
+
+Platforms supporting SPI MUST provide these interfaces.
+
+Of note, the interfaces DO NOT define the behavior of any chip select
+or framing signals. These SHOULD determined by platform specific HAL
+interfaces and implementations.
+
+
+The interface is split into a synchronous byte level and an
+asynchronous packet level interface. The byte level interface is
+intended for short transactions (3-4 bytes) on the SPI bus. ::
+
+ interface SPIByte {
+   async command error_t write( uint8_t tx, uint8_t* rx );
+ }
+
+The packet level interface is for larger bus transactions. The
+pointer/length interface permits use of hardware assist such as DMA. ::
+
+ interface SPIPacket {
+ 
+   async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+   async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, 
+ 			     error_t error );
+ }
+
+3.2 I2C
+--------------------------------------------------------------------
+
+The Inter-Integrated Circuit (I2C) interface is another type of
+digital bus that is often used for chip-to-chip communication. It is
+also known as a two-wire interface. 
+
+The I2CPacket interface provides for asynchronous Master mode communication on an
+I2C with application framed packets.  It supports only single
+transfers with a start-stop condition around each transfer.
+
+Platforms providing I2C capability MUST provide this interface. ::
+
+ interface I2CPacket {
+   async command result_t readPacket(uint16_t _addr, uint8_t _length, uint8_t* _data);
+   async command result_t writePacket(uint16_t _addr, uint8_t _length, uint8_t* _data);
+   async event void readPacketDone(uint16_t addr, uint8_t length, uint8_t* data, result_t success);
+   async event void writePacketDone(uint16_t addr, uint8_t length, uint8_t* data, result_t success);
+ }
+
+
+
+4. Author's Address
+====================================================================
+
+| Phil Buonadonna
+| Arched Rock Corporation
+| 657 Mission St. Ste 600
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692-0828 x2833
+
+5. Citations
+====================================================================
+
+.. [tep113] TEP 113: Serial Communication.
diff --git a/doc/txt/tep118.txt b/doc/txt/tep118.txt
new file mode 100644
index 00000000..5ffb7ba3
--- /dev/null
+++ b/doc/txt/tep118.txt
@@ -0,0 +1,227 @@
+============================
+Dissemination
+============================
+
+:TEP: 118 
+:Group: Net2 Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis and Gilman Tolle
+
+:Draft-Created: 10-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the interfaces, components, and semantics for
+disseminating small (smaller than a single packet payload) pieces of
+data in TinyOS 2.x.  Dissemination is reliably delivering a piece of
+data to every node in a network.
+
+1. Introduction
+====================================================================
+
+Dissemination is a basic sensor network protocol. The ability to
+reliably deliver a piece of data to every node allows administrators
+to reconfigure, query, and reprogram a network.  Reliability is
+important because it makes the operation robust to temporary
+disconnections or high packet loss. Unlike flooding protocols, which
+are discrete efforts that terminate, possibly not delivering the data
+to some nodes, dissemination achieves reliability by using a
+continuous approach that can detect when a node is missing the data.
+
+Depending on the size of the data item, dissemination protocols can
+differ greatly: efficiently disseminating tens of kilobytes of a
+binary requires a different protocol than disseminating a two-byte
+configuration constant. Looking more deeply, however, there are
+similarities. Separating a dissemination protocol into two parts ---
+control traffic and data traffic --- shows that while the data traffic
+protocols are greatly dependent on the size of the data item, the
+control traffic tends to be the same or very similar.
+
+Being able to reliably disseminate small values into a network is a
+useful building block for sensornet applications. It allows an
+administrator to inject small programs or commands and configuration
+constants. Because TinyOS nodes have limited RAM, these dissemination
+services have the assumption that data values have some form of
+versioning. Dissemination propagates only the most recent version.
+This means that if a node is disconnected from a network and the
+network goes through eight versions of a disseminated value, when it
+rejoins the network it will only see the most recent. The rest of this
+document describes a set of components and interfaces for a
+dissemination service of this kind.
+
+2. Dissemination interfaces
+====================================================================
+
+Small-value dissemination has two interfaces: DisseminationValue and
+DisseminationUpdate. The former is for consumers of a disseminated
+value, the latter is for producers. They are as follows::
+
+  interface DisseminationValue {
+    command const t* get();
+    event void changed(); 
+  }
+
+  interface DisseminationUpdate {
+    command void change(t* newVal);
+  }
+
+
+These interfaces assume that the allocation for the disseminated data
+is within the dissemination service. A consumer can obtain a const
+pointer to the data through DissemnationValue.get(). It MUST NOT
+store this pointer, as it may not be constant across updates.
+Additionally, doing so wastes RAM, as it can be easily re-obtained.
+The service signals a changed() event whenever the dissemination value
+changes, in case the consumer needs to perform some computation on it.
+
+DisseminationUpdate has a single command, ``change``, which takes a
+pointer as an argument. This pointer is not stored: a provider of
+DisseminationUpdate MUST copy the data into its own allocated memory.
+
+A dissemination protocol MUST reach consensus on the newest value in a
+network (assuming the network is connected).  Calling change
+implicitly makes the data item "newer" so that it will be disseminated
+to every node in the network. This change is local, however. If a node
+that is out-of-date also calls change, the new value might not
+disseminate, as other nodes might already have a newer value. If two
+nodes call change at the same time but pass different values, then the
+network might reach consensus when nodes have different values. The
+dissemination protocol therefore MUST have a tie-breaking mechanism,
+so that eventually every node has the same data value.
+
+3 Dissemination Service
+====================================================================
+
+A dissemination service MUST provide one component, DisseminatorC,
+which has the following signature::
+
+  generic configuration DisseminatorC(typedef t, uint16_t key) {
+    provides interface DisseminationValue ;
+    provides interface DisseminationUpdate ;
+  }
+
+The t argument MUST be able to fit in a single message_t[tep111_]  after
+considering the headers that the dissemination protocol introduces.
+A dissemination implementation SHOULD have a compile error if a larger
+type than this is used.
+
+As each instantiation of DisseminatorC probably allocates storage
+and generates code, if more than one component wants to share
+a disseminated value then they SHOULD encapsulate the value in
+a non-generic component that can be shared. E.g.::
+
+  configuration DisseminateTxPowerC {
+    provides interface DisseminationValue;
+  }
+  implementation {
+    components new DisseminatorC(uint8_t, DIS_TX_POWER);
+    DisseminationValue = DisseminatorC;
+  }
+
+
+Two different instances of DisseminatorC MUST NOT share the same value
+for the ``key`` argument.
+
+4 Dissemination Keys
+====================================================================
+
+One issue that comes up when using this interfaces is the selection of
+a key for each value. On one hand, using unique() is easy, but this
+means that the keyspaces for two different compilations of the same
+program might be different and there's no way to support a network
+with more than one binary. On the other, having a component declare
+its own key internally means that you can run into key collisions that
+can't be resolved. In the middle, an application can select keys on
+behalf of other components.
+
+Ordinarily, dissemination keys can be generated by unique or selected
+by hand. However, these defined keys can be overridden by an
+application-specific header file. The unique namespace and the static
+namespace are separated by their most significant bit. A component
+author might write something like this::
+
+  #include 
+  configuration SomeComponentC { 
+    ...
+  }
+  implementation {
+  #ifndef DIS_SOME_COMPONENT_KEY
+    enum {
+      DIS_SOME_COMPONENT_KEY = unique(DISSEMINATE_KEY) + 1 << 15;
+    };
+  #endif
+    components SomeComponentP;
+    components new DisseminatorC(uint8_t, DIS_SOME_COMPONENT_KEY);
+    SomeComponentP.ConfigVal -> DisseminatorC; 
+  }
+
+To override, you can then make a disseminate_keys.h in your app
+directory::
+
+  #define DIS_SOME_COMPONENT_KEY 32
+
+Even with careful key selection, two incompatible binaries with
+keyspace collisions may end up in the same network. If this happens, a
+GUID that's unique to a particular binary MAY be included in the
+protocol. The GUID enables nodes to detect versions from other
+binaries and not store them. This GUID won't be part of the external
+interface, but will be used internally.
+
+5. More Complex Dissemination
+====================================================================
+
+An application can use this low-level networking primitive to build
+more complex dissemination systems. For example, if you want have a
+dissemination that only nodes which satisfy a predicate receive, you
+can do that by making the  a struct that stores a predicate and
+data value in it, and layering the predicate evaluation on top of the
+above interfaces.
+
+6. Implementation
+====================================================================
+
+An implementation of this TEP can be found in
+``tinyos-2.x/tos/lib/net``. This dissemination implementation uses
+network trickles [2]_. Each dissemination value has a separate
+trickle.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+|
+| Gilman Tolle
+| 2168 Shattuck Ave.
+| Arched Rock Corporation
+| Berkeley, CA 94704
+|
+| phone - +1 510 981 8714
+| email - gtolle@archedrock.com
+
+7. Citations
+====================================================================
+
+.. [1] TEP 111: message_t.
+
+.. [2] Philip Levis, Neil Patel, David Culler, and Scott Shenker. "Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks." In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).
+ 
diff --git a/doc/txt/tep119.txt b/doc/txt/tep119.txt
new file mode 100644
index 00000000..6c14d0ed
--- /dev/null
+++ b/doc/txt/tep119.txt
@@ -0,0 +1,391 @@
+============================
+Collection
+============================
+
+:TEP: 119
+:Group: Net2 Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis
+
+:Draft-Created: 09-Feb-2006
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the interfaces, components, and semantics used by
+collection protocol in TinyOS 2.x. Collection provides a best-effort,
+multihop delivery of packets to the root of a tree.
+
+1. Introduction
+====================================================================
+
+Collecting data at a base station is a common requirement of sensor
+network applications. The general approach used is to build one
+or more collection *trees*, each of which is rooted at a base
+station. When a node has data which needs to be collected, it 
+sends the data up the tree, and it forwards collection data that
+other nodes send to it. Sometimes, depending on the form of data
+collection, systems need to be able to inspect packets as they go
+by, either to gather statistics, compute aggregates, or suppress
+redundant transmissions.
+
+When a network has multiple base stations that act as *root* nodes,
+rather than one tree, it has a *forest* of trees. By picking a 
+parent node, a collection protocol implicitly joins one of these
+trees. Collection provides a best-effort,
+multihop delivery of packets to one of a network's tree roots:
+it is an *anycast* protocol.
+
+Given the limited state that nodes can store and a general need
+for distributed tree building algorithms, simple collection protocols
+encounter several challenges. These challenges are not unique to
+collection protocols. Instead, they represent a subset of common
+networking algorithmic edge cases that occur in this protocol
+family:
+
+  * Loop detection, detecting when a node selects one of its
+    descendants as a new parent.
+
+  * Duplicate suppression, detecting and dealing with when lost 
+    acknowledgments are causing packets to replicate in the 
+    network, wasting bandwidth.
+
+  * Link estimation, evaluating the link quality to single-hop
+    neighbors.
+
+  * Self-interference, preventing forwarding packets along the route
+    from introducing interference for subsequent packets.
+
+The rest of this document describes a set of components and interfaces
+for a collection service outlined above.
+
+2. Collection interfaces
+====================================================================
+
+A node can perform four different roles in collection: producer,
+consumer, snooper, and in-network processor. Depending on their role,
+the nodes use different interfaces to interact with the collection
+component.
+
+The nodes that generate data to be sent to the root are
+*producers*. The producers use the Send interface [1_] to send
+data to the root of the collection tree. The collection tree
+identifier is be specified as a parameter to Send during
+instantiation.
+
+Root nodes that receive data from the network are *consumers*. The
+consumers use the Receive interface [1_] to receive a message
+delivered by collection. The collection tree identifier is be
+specified as a parameter to Receive during instantiation.
+
+The nodes that overhear messages in transit are *snoopers*. The snoopers
+use the Receive interface [1_] to receive a snooped message. The
+collection tree identifier is be specified as a parameter to Receive
+during instantiation.
+
+The nodes can process a packet that are in transit. These in-network
+*processors* use the Intercept interface [1_] to receive and
+update a packet. The collection tree identifier is be specified as a
+parameter to Intercept during instantiation.
+
+A node is configured to become a root by using the RootControl
+interface. RootControl.setRoot() MUST make the current node a root of
+the tree specified during instantiation. RootControl.unsetRoot() MUST
+make the current root no longer a root in the tree specified during
+instantiation. RootControl.unsetRoot() MAY be called on a node that is
+not a root::
+
+  interface RootControl {
+    command error_t setRoot();
+    command error_t unsetRoot();
+    command bool isRoot();
+  }
+
+
+3 Collection Services
+====================================================================
+
+A collection service MUST provide one component, TreeCollectionC,
+which has the following signature::
+
+  configuration TreeCollectionC {
+    provides {
+      interface StdControl;
+      interface Send[uint8_t client];
+      interface Receive[collection_id_t id];
+      interface Receive as Snoop[collection_id_t];
+      interface Intercept[collection_id_t id];
+      interface RootControl;
+      interface Packet;
+      interface CollectionPacket;
+      interface TreeRoutingInspect;
+    }
+    uses {
+      interface CollectionId[uint8_t client];
+    }
+  }
+
+
+TreeCollectionC MAY have additional interfaces, but they MUST have
+default functions on all outgoing invocations (commands for uses,
+events for provides) of those interfaces so that it can operate
+properly if they are not wired.
+
+Components SHOULD NOT wire to TreeCollectionC.Send. The generic
+component CollectionSenderC (described in section 3.1) provides
+a virtualized sending interface.
+
+Receive, Snoop, and Intercept are all parameterized by
+collection_id_t. Each collection_id_t corresponds to a different
+protocol operating on top of collection, in the same way that
+different am_id_t values represent different protocols operating on
+top of active messages. All packets sent with a particular
+collection_id_t generally have the same payload format, so that
+snoopers, intercepters, and receivers can parse it properly.
+
+Receive.receive MUST NOT be signaled on non-root
+nodes. TreeCollectionC MAY signal Receive.receive on a root node when
+a data packet successfully arrives at that node. If a root node calls
+Send, TreeCollectionC MUST treat it as it if were a received packet.
+Note that the buffer swapping semantics of Receive.receive, when
+combined with the pass semantics of Send, require that TreeCollectionC
+make a copy of the buffer if it signals Receive.receive.
+
+If TreeCollectionC receives a data packet to forward and it is not a
+root node, it MAY signal Intercept.forward.
+
+If TreeCollectionC receives a data packet that a different node
+is supposed to forward, it MAY signal Snoop.receive.
+
+RootControl allows a node to be made a collection tree root.
+TreeCollectionC SHOULD NOT configure a node as a root by default.
+
+Packet and CollectionPacket allow components to access collection
+data packet fields [1_].
+
+TreeRoutingInspect provides information on the current position of
+the node in a routing tree::
+
+  interface TreeRoutingInspect {
+    command error_t getParent(am_addr_t* parent);
+    command error_t getHopcount(uint8_t* hopcount);
+    command error_t getMetric(uint16_t* metric);
+  }
+
+In each of these commands, if the return value is not SUCCESS, the
+value stored in the pointer argument is undefined. The getMetric
+command provides a measure of the quality of a node's route to the
+base station. This routing metric MUST be monotonically increasing
+across hops. In a collection tree, if node A is the parent of node B,
+then node B's metric value MUST be greater than node A's.
+
+3.1 CollectionSenderC
+--------------------------------------------------------------------
+
+Collection has a virtualized sending abstraction, the generic
+component CollectionSenderC::
+
+generic configuration CollectionSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+This abstraction follows a similar virtualization approach to
+AMSenderC [1_], except that it is parameterized by a collection_id_t
+rather than an am_id_t. As with am_id_t, every collection_id_t SHOULD
+have a single packet format, so that receivers can parse a packet
+based on its collection ID and contents.
+  
+4 Implementation
+====================================================================
+
+An implementation of this TEP can be found in
+``tinyos-2.x/tos/lib/net/collection``. The implementation consists of
+three major components, which are wired together to form a
+CollectionC: LinkEstimatorP, TreeRoutingEngineP, and ForwardingEngineP.
+
+This decomposition tries to encourage evolution of components and ease
+of use through modularization. Neighbor management and link estimation
+are are decoupled from the routing protocol. Furthermore, the routing
+protocol and route selection are decoupled from the forwarding policies,
+such as queueing and timing.
+
+4.1 LinkEstimatorP
+--------------------------------------------------------------------
+
+LinkEstimatorP estimates the quality of link to or from each
+neighbor. Link estimation can be done in a variety of ways, and we do
+not impose one here. It is decoupled from the establishment of
+routes. There is a narrow interface (LinkEstimator) between the link
+estimator and the routing engine. The one requirement is that the
+quality returned is standardized. A larger return value from
+LinkEstimator.getQuality(), LinkEstimator.getforwardQuality(),
+LinkEstimator.getreserveQuality() MUST imply that the link to the
+neighbor is estimated to be of a higher quality than the one that
+results in a smaller return value. The range of value SHOULD be
+[0,255] and the variation in link quality in that range SHOULD be
+linear. Radio provided values such as LQI or RSI, beacon based link
+estimation to compute ETX, or their combination are some possible
+approaches to estimating link qualities. LinkEstimatorP MAY have its
+own control messages to compute bi-directional link qualities::
+
+  typedef uint16_t neighbor_t
+
+  LinkEstimatorP {
+    provides {
+      interface LinkEstimator;
+      interface NeighborTable;
+    }
+  }
+
+  interface LinkEstimator {
+    command uint8_t getLinkQuality(neighbot_t neighbor);
+    command uint8_t getReverseQuality(neighbot_t neighbor);
+    command uint8_t getForwardQuality(neighbot_t neighbor);
+  }
+
+  interface NeighborTable {
+    event void evicted(neighbot_t neighbor)
+  }
+
+
+4.2 TreeRoutingEngineP
+--------------------------------------------------------------------
+
+TreeRoutingEngineP is responsible for computing routes to the roots of a
+tree. It uses NeighborTable and LinkEstimator interfaces to learn
+about the nodes in the neighbor table maintained by LinkEstimatorP and
+the quality of links to and from the neighbors. The routing protocol
+on which collection is implemented MUST be a tree-based routing
+protocol with a single or multiple roots. TreeRoutingEngineP 
+allows a node to be configured as a root or a non-root node
+dynamically. TreeRoutingEngineP maintains multiple candidate next hops::
+
+  generic module TreeRoutingEngineP(uint8_t routingTableSize) {
+    provides {
+        interface UnicastNameFreeRouting as Routing;
+        interface RootControl;
+        interface TreeRoutingInspect;
+        interface StdControl;
+        interface Init;
+    } 
+    uses {
+        interface AMSend as BeaconSend;
+        interface Receive as BeaconReceive;
+        interface LinkEstimator;
+        interface AMPacket;
+        interface LinkSrcPacket;
+        interface SplitControl as RadioControl;
+        interface Timer as BeaconTimer;
+        interface Random;
+        interface CollectionDebug;
+    }
+  }
+
+4.3 ForwardingEngineP
+--------------------------------------------------------------------
+
+The ForwardingEngineP component provides all the top level interfaces
+(except RootControl) which TreeCollectionC provides and an application 
+uses:: 
+
+  generic module ForwardingEngineP() {
+    provides {
+      interface Init;
+      interface StdControl;
+      interface Send[uint8_t client];
+      interface Receive[collection_id_t id];
+      interface Receive as Snoop[collection_id_t id];
+      interface Intercept[collection_id_t id];
+      interface Packet;
+      interface CollectionPacket;
+    }
+    uses {
+      interface AMSend as SubSend;
+      interface Receive as SubReceive;
+      interface Receive as SubSnoop;
+      interface Packet as SubPacket;
+      interface UnicastNameFreeRouting;
+      interface SplitControl as RadioControl;
+      interface Queue as SendQueue;
+      interface Pool as QEntryPool;
+      interface Pool as MessagePool;
+      interface Timer as RetxmitTimer;
+      interface Cache as SentCache;
+      interface TreeRoutingInspect;
+      interface PacketAcknowledgements;
+      interface Random;
+      interface RootControl;
+      interface CollectionId[uint8_t client];
+      interface AMPacket;
+      interface CollectionDebug;
+    }
+  }
+
+ForwardingEngineP uses a large number of interfaces, which can be
+broken up into a few groups of functionality:
+
+  * Single hop communication: SubSend, SubReceive, SubSnoop,
+    SubPacket, PacketAcknowledgments, AMPacket
+  * Routing: UnicastNameFreeRouting, TreeRoutingInspect, 
+    RootControl, CollectionId, SentCache
+  * Queue and buffer management: SendQueue, MessagePool,
+    QEntryPool
+  * Packet timing: Random, RetxmitTimer
+
+
+5. Author's Address
+====================================================================
+
+| Rodrigo Fonseca 
+| 473 Soda Hall
+| Berkeley, CA 94720-1776
+|
+| phone - +1 510 642-8919
+| email - rfonseca@cs.berkeley.edu
+|
+|
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+|
+|
+| Kyle Jamieson
+| The Stata Center
+| 32 Vassar St.
+| Cambridge, MA 02139 
+|
+| email - jamieson@csail.mit.edu
+|
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+
+
+6. Citations
+====================================================================
+
+.. [1] TEP 116: Packet Protocols
+ 
diff --git a/doc/txt/tep120.txt b/doc/txt/tep120.txt
new file mode 100644
index 00000000..2d6b60d4
--- /dev/null
+++ b/doc/txt/tep120.txt
@@ -0,0 +1,584 @@
+==============================================
+TinyOS Alliance Structure
+==============================================
+
+:TEP: 120
+:Group: Alliance Working Group 
+:Type: Informational
+:Status: Draft
+:TinyOS-Version: All
+:Authors: Philippe Bonnet, David Culler, Deborah Estrin, Ramesh Govindan, Mike Horton, Jeonghoon Kang, Philip Levis, Lama Nachman, Jack Stankovic, Rob Szewczyk, Matt Welsh, Adam Wolisz 
+:Draft-Created: 17-April-2006
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Alliance 
+
+
+.. Note::
+
+   This memo documents a blueprint for an open alliance aroung
+   TinyOS for the TinyOS Community and requests discussion and
+   suggestions for improvement.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo describes the goals and organization structure of the TinyOS Alliance.
+It covers membership, the working group forums for contribution, intellectual
+property, source licensing, and the TinyOS Steering Committee (TSC).
+
+1. Charter
+====================================================================
+
+.. TinyOS Alliance Charter::
+
+Formulate a legal and organizational framework for an alliance that
+can facilitate the continued advancement of the open embedded network
+ecosystem around TinyOS and support the activities, interactions, and
+development of the worldwide academic and industrial TinyOS community.
+
+2. Overview
+====================================================================
+
+This memo defines a blueprint and conceptual foundation for an open 
+alliance that fulfills the above charter. 
+It defines the following ten aspects of the alliance:
+
+   * Mission
+   * Legal structure
+   * Organizational structure
+   * Membership criteria
+   * Working group processes
+   * Election process
+   * Intellectual property
+   * Source licensing
+   * Funding
+   * Work products
+
+We (the Alliance) recognize that each of these aspects contributes to the 
+whole, is inter-related and needs to be consistent overall.  This document 
+attempts to address them sequentially, recognizing that each depends on the 
+others.  It draws on lessons from several related
+organizations, although each of these also has significantly
+different goals from those set out in the charter.
+
+1) IETF - Open protocols, technical documents 
+2) OSDL - Stable, Enterprise Linux
+3) Apache - Suite of open source tools
+4) Zigbee - Network layer and marketing for 15.4
+5) OSGI - Service layer
+6) FSF - Foundational software
+
+We (the Alliance) draw most strongly upon the IETF, even though that 
+organization was
+focused around creating and standardizing protocols, rather than
+developing a code base.  Its emphasis on rough consensus AND
+running code placed issues akin to those we face near the fore.  We
+share the view that technical excellence is a primary goal and that
+the organization should be structured to sustain and overall cohesive
+architecture.  In our case, it is represented by high quality
+reference implementations and standard APIs, as well as techical
+documents and protocols.  We share an emphasis on broad participation
+centered on the contributions of individual members.  
+
+We encourage industrial involvement, industrial development, and
+industrial support.  The organization is welcoming to
+companies, but it keeps financial support and marketing
+activities (while both important) at arms length from the technical
+process.  We share the concept that proper behavior of participants
+and member companies is most strongly shaped by code of ethics,
+captured in organization rules and social norms, rather than threats
+of legal reprocusions.  The broader marketplace is a more effective
+enforcement body than any technical organization.  Thus, we ask that
+participants declare relevant IP that they are aware of, rather than
+force a strict accounting of potentially relevant IP.  We encourage
+the development of open solutions that implemented without need
+particular proprietary IP.  In the IETF, this is addressed by the
+requirement of multiple interoperable implementations before
+standardization.  If such implementations can be developed without
+legal issues, it is likely that other non-infringing implementations
+are possible.  Like IETF, we seek a lean bureacracy adn mostly
+volunteer organization.
+
+From OSDL, we share the goal of developing a stable, high quality
+version of an open source system.  This suggests that the alliance
+have strong role in developing test suites and broadly accessible
+testbeds, as well as structures for sharing development resources.
+However, we avoid the OSDL structure of the scale of monetary
+contributions dictating technical oversite.  We are not constrained by
+a GPL license structure, as is the OSDL.
+
+From Apache, we draw the strong sense of a technical meritocracy
+centered on individual contributors.  We seek to permit a loose enough
+consortium that there can be a lot of individual innovation,
+especially in areas of tools, devices, and new platforms.  We also
+seek to retain the notion that credit should be given to authors.  In
+Apache the technical merit associated with the brand is exchanged to
+giving the copyright to the Apache organization.  For a broad alliance
+representing many universities and large companies, such a copyright
+scheme is likely to be an untennable barrier.  Instead, we seek to
+provide a simple source license regime with technical tools for giving
+credit and strong social pressure to comply.
+
+From Zigbee, we share the goal of providing marketing support for the
+accomplishments of the alliance and that we should see to define
+standardized services, not just protocols.  We recognize that the
+alliance and serve a useful function in being a point of allocation
+for various namespaces, but that this important function should not be
+a tool for extracting financial contributions.  We see the value of an
+IP pool to give confidence that the standard can be adopted without
+becoming entrapped later by IP terms, however, we also see that such a
+pool presents a very significant barrier.  Moreover, it does not
+prevent members from obtaining IP to use it to their advantage with
+other members of the alliance.  It also does not constrain non-members
+from obtaining blocking IP.  It does discourage contributions that
+might pull IP into the pool.  We prefer a process of declaration and
+multiple implementation.
+
+3. Mission
+====================================================================
+
+The mission of the TinyOS Alliance is to provide a forum to facilitate:
+
+  * the continued growth of a healthy TinyOS developer and user community
+    with support for innovation as well as industry advancement, 
+  * the development and maintenance of a stable, technically-sound base of
+    TinyOS technology and surrounding tools through the creation of
+    standard interfaces and protocols, vetted extensions, open reference
+    implementations, technical documents, testing and verification suites,
+    and educational materials, 
+  * the contribution of innovative technology from a world-wide research 
+    community and the maturation and dissemination of these
+    contributions, and
+  * the promotion of the technology, the community, and the impact of networked 
+    embedded systems.
+
+
+4. Organizational Structure
+====================================================================
+
+The Alliance has a technical advisory function: guide the evolution of
+the TinyOS architecture, formulate and track progress of working
+groups, and provide an open and impartial process for technical
+documentation.  It also has an organizational advisory function: manage 
+industry
+interaction, legal and IP issues, evolution of the organization
+itself, membership issues and so on.
+
+We follow an approach that starts small and grows the structure as
+needed. The focus should be on the working groups. Working groups are
+not limited to technical functions; they can be formed to promote
+developments, markets, etc. Beyond the working groups, the
+organization should remain lean, relying primarily on volunteers. We
+want to avoid creating a situation where the organization becomes
+focused on its own growth and pre-eminence at the expense of the
+larger community and technical agenda.
+
+Technical directions should be driven by merit and overall soundness,
+and built on consensus.
+
+The Alliance consists of a non-profit corporation with a Board of
+Directors, a small support staff (primarily volunteer or outsourced)
+and a Steering Committee. The Steering Committee oversees a collection
+of Working Groups, each with a Chair and Members.
+
+4.1 Steering Committee
+---------------------------------------------------------------
+
+In the steady state the Steering Committee will consist of the chairs
+of working groups plus a handful of elected members at large. Tenure
+of a position on the Steering Committee will consist of two years with
+opportunity for renewal. We want to see a vibrant, engaged, and
+constantly evolving leadership while allowing for long-term and
+committed members.
+
+Initially the steering committee would be formed from working group
+chairs plus some subset of the Alliance working group members.  This
+initial committee will be responsible for putting in place the
+membership and elections processes, which will then be utilized to
+form the regular Steering Committee.
+
+The primary role of the Steering Committee (SC) is to oversee the Working
+groups (WGs). This means establishing WG policy, providing appeals
+process, managing WG creation/extinction, arbitrating between WGs, and
+supervising activities to resolve conflicting directions and moving
+the process towards overall architectural coherence.
+
+The SC is also responsible for reviewing and approving all TEPs. WGs
+submit TEPs to the SC for review. The SC should appoint one
+contributing Alliance member not affiliated with the corresponding WG
+to review the TEP. This reviewer, who may or may not be a member of
+the SC, may solicit comments from the community at large, but must
+also thoroughly review the submitted TEP. WGs must address any
+issues/questions brought up either by the reviewer or by other
+community members. Once the reviewer approves the revisions, he/she
+presents the TEP to the SC for approval by rough consensus. Finally,
+TEPs that affect the organizational structure of the Alliance must
+also be approved by the Board.
+
+Finally, the Steering Commitee will be responsible for determining the
+procedural elements of the Alliance. This includes election
+procedures, membership criteria, selection of venues, oversight of
+access to code repositories and Alliance web sites, and regular
+Alliance meetings.
+
+4.2 Working Groups
+-------------------------------------------------------
+
+The working groups form the core of the alliance. Each working
+group will have a chair who will be responsible for WG processes,
+reporting, meetings, and membership. Working groups and their
+functions are discussed in more detail in a later section.
+
+4.3 Board of Directors
+------------------------------------------------------- 
+
+The non-profit will require a Board of Directors responsible for
+corporate matters. 
+
+5. Membership and Participation
+====================================================================
+
+We desire to continue the TinyOS tradition of promoting broad
+membership.  This means that we want to keep barriers to entry low in
+all respects: legal, financial, and organizational.  As with IETF and
+Apache, we want to shape the organization as a meritocracy that
+encourages, promotes, and credits the contributions of its members.  
+Companies have essential role, but merit, not finances should
+dictate direction.  Membership and influence should recognize the
+importance of adopters, not just developers.
+
+The fundamental membership is individual, as individuals create work products,
+serve on working groups and committees, and vote.  We have two forms:
+
+  * Member: Individual who joins the Alliance and participates at a
+     basic level, typically as consumer of technology.
+
+  * Contributing Member: Individual who aditionally joins working groups,
+    attends meetings, or contributes code or other assets to the
+    Alliance.   Contributing members are elected to various posts and
+    have voting rights.
+
+There is no individual membership fee, but members will be responsible for
+nominal registration fees at Alliance meetings.
+
+Corporations and organizational have institutional membership, which reflects 
+their degree of effort.
+
+  * Institutional Member: Corporation or institutional organization
+    that joins the Alliance, agrees to appear on the Alliance
+    web site and documents, and pays a nominal administrative fee.
+    (Min. Annual $500 for small companies and non-profits, $1000 for larger)
+
+  * Contributing Institutional Member: Corporation or institutional
+    organization that additionally provides financial support, resources,
+    facilities, technical contributions, intellectual property,
+    marketing support, or other meaningful contributions to the
+    Alliance. Such institutions are featured prominently in the Alliance and
+    have the opportunity to appoint individuals as contributing members.
+    (Min. Annual $2000 for small companies and non-profits, $5000 for larger)
+
+Rather than focusing on maximizing the financial contributions into
+the alliance, we are interested in maximizing the impact of the
+alliance in facilitating a healthy academic and industrial, research
+and production ecosystem around embedded network technology.
+
+The organization will be able to accept direct financial and
+intellectual property contributions.  The IP policy should encourage
+corporate participation while preserving focus on soundness, merit,
+and consensus building.  Ultimately, we seek to promote a meritocracy
+that recognizess the contributions of the individuals, whether they
+be members of corporations, academic institutions, govermental
+institutions, or unaffiliated.  We will provide a fee structure that encourages
+the participation of small companies and start-ups.
+
+6. Working Groups
+====================================================================
+
+There will be two forms of working groups. LONG-STANDING
+groups are chartered to develop important areas or subsystems.  For
+example, we expect longstanding groups on 
+routing, management, platforms, testing, programming tools, and
+education.  SHORT-TERM groups have a fixed mandate to tackle a
+particular topic.  For example, there may be groups to develop a
+particular protocol, establish a policy or licensing format, or
+address a particular application capability.
+
+There will be two means of Working Group formation: grass roots and
+charter. Grass roots groups are formed by individuals or groups
+who have a preliminary version of something important and want to make
+it part of TinyOS.  They assemble and make a request to the SC with a
+proposed charter statement and chair.  Chartered groups are
+formed by SC or Board of Directors to address a recognized need for an
+important area of development.  The SC solicits members and chair with
+a particular charter in mind.  WGs may be formed for organizational or
+marketing goals, as well as technical goals.
+
+The typical output of a working group is technical documentation AND
+working code, including interface definitions and standard proposals.
+We seek to promote the development of standardized interfaces,
+protocols, services, and tools with high quality, open reference
+implementations of each.  We seek to have these standards be
+implementable without relying on particular proprietary intellectual
+property.  We are not interested in discouraging development of
+implementations that have excel in various ways through proprietary
+IP, but standards should not require the use of such IP and should
+allow for multiple, interoperable implementations.
+The Steering committee will be engaged in ratification of standards.
+
+7. Intellectual Property
+====================================================================
+
+In general we want to promote the development, adoption and use of
+open technology.  We want to avoid having the advancement of embedded
+networks getting trapped into proprietary IP.  Accordingly, our IP
+policy builds heavily on the IETF mode.  We also want to avoid a high
+barrier to participation.  Thus, we want to avoid demanding membership
+requirements that require extensive legal analysis and assessing deep
+strategic analysis before joining.  In particular, IP pooling or broad
+IP assignment requirements are seen to too large a barrier and
+discourage the active participation of members.  At the same time, we
+recognize that without such measures only, members cannot expect
+guarantees of IP rights.  We also want to avoid sponging IP from
+others or worse, having members or non-members running ahead of the
+Alliance and creating blocking IP.  In essence, all participants must
+operate with eyes open.  The Alliance encourage an open process, open
+standards, and open source with a clear code of ethics, but leaves
+broader issues of enforcement to the outside market.  Like IETF, we
+rely on disclosure of known IP of relevance, an open process, and a
+code of conduct.  Working groups are encourage to create work products
+that do not rely on proprietary IP for implementation.
+
+We also want to avoid requiring a member institution from having to
+conduct a complete inventory of IP holdings for potential relevance.
+This is impractical for Universities and large corporations.  It is
+the responsibility of the members to disclose IP or relvance, whether
+it is their property or not, so that they Alliance members can make
+informed decisions and trade-offs.
+
+Following the IETF, to establish a culture of openness, meeting
+discussions, presentations, and technical documents are
+non-confidential.  This simple measure is a signficant step towards
+establishing the culture of openness and it avoids large legal and
+organizational hassles, as evident in OSDL.
+
+As with the IETF, there will be a mechanism for contributing IP to the
+Alliance.  This will be treated along with other forms of contribution
+in establishing member status.
+
+Working Groups will be tasked to avoid forming standards and creating
+work products that fundamentally depend on proprietary IP, i.e., where
+the proposal can only reasonably be implemented using such IP.
+Members recognize that in making proposals, they are required by
+Alliance rules to disclose what IP they know to be relevant.  In the
+rare cases where working group determine that IP dependent proposals
+are sufficiently critical that they be pursued, such IP must be
+available on reasonable and non-discriminatory (RAND) terms for the
+Steering Committee to be able to approve the action.
+
+Of course, Intellectual Property in the TinyOS alliance is closely
+tied to source licensing terms, as dicussed in greater detail in that
+section. As part of Alliance rules, members agree to only check in
+code that conforms to Alliance source license policy.  As part of
+keeping barriers to participation low, GPL and code based on
+potentially viral licensing terms must be carefully compartmentalized,
+explicit, and not present in core software.  It will typically involve
+development tools, such as the compilers and peripheral Linux-based
+devices. 
+
+8. Source Licensing
+====================================================================
+
+In general, we want to provide a mechanism where individuals and
+companies can easily contribute source, can utilize what is available,
+and can gain recognition for their efforts.  Following the TinyOS
+tradition, our source licensing policy will be most strongly aligned
+with BSD and its more modern variants.  We recognize several inherent
+tensions and trade-offs in formulating the source license.
+
+We want to give credit where credit is due.  Fundamentally, the
+community moves forward by contributing valuable technology and
+standing open each other's shoulders, not on their feet.  Credit and
+respect drive a virtuous cycle of technical advance.  We do have
+several examples where companies, or even resarch institutions, have
+gained substantial benefit from the work of others while presenting it
+as their own.  This concern is partially addressed by GPL, where if
+you build upon the work of others you are oblicated to put it back in
+the open.  Apache addresses this issue by requiring acreditation of
+the Apache foundation.  However, this is connected with a stiff
+membership requirement of signing the copyright to Apache.
+Participants make that sacrafice when they view the brand appeal
+associated with the Apache meritocracy as of sufficient value to
+warrant the arrangement.  Apache is also a losely affiliated
+consortium of realtively localized projects, typically in very well
+established technical areas.  Our situation is different because we
+have many contributors to a cohesive whole and many of these
+contributors are at leading research institutions where copyright must
+rest with the host institution.  Moreover, much of the work is at the
+leading edge of technology.
+
+We recognize that the TinyOS "brand" is of value and will be
+increasingly so as the Alliance becomes more formal.  We do not want
+it tainted with its use as a marketing tool on inferior technology.
+Thus, we want to connect the use of the term with membership,
+contribution, and conformance to Alliance rules and guidelines.
+
+We have the additional wrinkle that we are dealing primarily with
+embedded technology, which may have no visible user interface.  And,
+we have limited resources so carrying additional footprint for legal
+conformance is unattractive.
+
+Furthermore, many of our contributors are from organizations that have
+very precisely defined sets of acceptable source licensing terms.  As
+much as having a common license throughout the Alliance would make it
+easy for everyone to know the specific terms, getting diverse
+institutions to agree to common language is impractical.  We do,
+however, want to have as few distinct licenses with a little variation
+as possible.  Fortunately, we are seeing convergence in licenses,
+after several years of proliferation.
+
+To address these matters, the Alliance will have a
+preferred source license based on the BSD framework and a
+small set of accepted licenses, some of which have been gradfathered
+in with the existing code base.
+Contributions can be made using one of those accepted licenses, with
+the member organization name changed appropriately.  Organizations can
+submit additional proposed licenses to the Steering Committee.
+
+We will not require that the Alliance hold copyright of submitted
+source code, but that it conform to Alliance guidelines.  These
+include guidelines for adding copyrights to existing sources.
+
+We will utilize the available development tools to facilitate the
+generation of list of contributors associated with any particular
+instantiation of TinyOS components into an overall system,
+application, or distribution.  We will provide tools for registering
+contributors, copyrights, and applicable source licenses on line, for
+ease of reference.
+
+Alliance rules will set guidelines for giving credit to contributors
+in documentation, source, tools, web sites and so on.  We want to
+recognize the individuals and their host institutions, as well as the
+Alliance.  But we do not want to create a bureacratic nightmare that
+deters adoption, nor do we want to turn the Alliance into a policing
+organization.  Harsh and threatening legal terms that have no credible
+means of enforcement create a adversarial culture with little
+practical advantage.  Instead, the Alliance will utilize cultural
+norms and reputation as mechanisms for enforcing proper creditation.
+We will develop tools that make compliance relatively easy, reward
+those that do so, and provide a complaint mechanism to identify misuse.
+
+In taking this approach, we focus on needs of reference implementation
+of standardized interfaces and protocols.  Alliance is not the only
+vehicle for producing a hardened, tested, certified code base.
+To do so would require the Alliance host a large technical staff, as
+OSDL does.  
+Comapanies may do so, or produce implementations with enhanced
+performance, reliability, or efficiency using their own proprietary
+technology.  The Alliance encourages such innovation while promoting
+standardized interfaces that allows such technology to interoperate.
+
+9. Funding
+====================================================================
+
+As with the IETF, individuals are responsible for their own costs,
+which primarily involve meetings, travel, and generation of work
+products.  Membership participation will involve attendance at
+Alliance meetings.  Registration fees will be charged to cover costs
+associated with adminstration of the meetings.  
+
+Companies and institutions are encouraged to contribute financial and
+in-kind support.  It will be essential that companies provide initial
+funding to create the legal structure and to establish basic IT
+capabilities to host the web site and working groups.
+
+Initially, we expect that there are no full time employees in the
+Alliance and that funding needs are limited to such items as lawyer's
+fees, web site costs, and insurance. If the Alliance eventually
+requires full time support personnel, the funding structure will have
+to be re-visited.
+
+To maintain the focus on technical excellence and meritocracy, we want
+to avoid the heavy-handed quid-pro-quo seen in many industrial
+consortiums where funding determines influence.  The best use of funds
+and the best form of influence is direct contribution to the work
+products of the Alliance.  We will permit targeted contributions
+toward specific working groups or technical capabilities.
+
+We seek to keep overall structure lean, mostly volunteer.
+Focus on desired impact and recognition, rather than control.
+
+Institutional members
+will pay an annual membership fee. In some cases, a 
+contributing corporate member may provide in-kind services
+such as lawyers' time used to
+draw up or comment on by-laws.  
+Targeted contributions will be
+solicited and encouraged. In this case the donator need not 
+become a contributing corporate member, e.g., in those cases
+where such a membership may be prohibited or unwanted.
+The costs of meetings, such as the TinyOS
+technology exchange, will be covered through registration fees.
+
+Individuals are responsible
+for their own costs such as 
+for travel, meeting costs, or costs for contributing
+software or documentation to the Alliance. The Alliance
+is primarily a volunteer organization. 
+
+10. Work Products
+====================================================================
+
+Code base
+Stable, robust core release
+Rapidly evolving, innovative extensions
+Reference Implementations
+Tools
+Data
+Documentation
+Standard proposals
+Marketing and Promotion
+Testing and Compliance
+Assessments
+Applications and uses of technology
+Educational Materials
+
+11. Conclusions
+====================================================================
+
+The time has come to create an organizational structure to allow the effort to grow
+Beyond the Berkeley + Others
+It is a balancing act
+Stability vs Innovation
+Broad Participation vs Strong Requirements
+Uniform Licensing vs Institutional Differences
+Goal is to help to community to work together
+Not a forum for maneuvering and intrigue
+Focus on consensus building and technical soundness
+Minimal mechanism to resolve rare differences
+Focus on working groups and individual contributions
+with architectural and organization oversight
+Be pragmatic on participation
+Don’t have to make deep commitments to participate
+Can’t expect broad guarantees in return
+
+12. Author's Address
+====================================================================
+
+| Philippe Bonnet  
+| David Culler     
+| Deborah Estrin 	 
+| Ramesh Govindan  
+| Mike Horton 	 
+| Jeonghoon Kang 	 
+| Philip Levis    
+| Lama Nachman 	
+| Jack Stankovic 	
+| Rob Szewczyk 	 
+| Matt Welsh 	 
+| Adam Wolisz 	 
+
+| David Culler ,
+
diff --git a/doc/txt/tep121.txt b/doc/txt/tep121.txt
new file mode 100644
index 00000000..ff204338
--- /dev/null
+++ b/doc/txt/tep121.txt
@@ -0,0 +1,621 @@
+=============================
+Towards TinyOS for 8051
+=============================
+
+:TEP: 121
+:Group: TinyOS 8051 Working Group 
+:Type: Informational
+:Status: Draft 
+:TinyOS-Version: 1.x 
+:Author: Anders Egeskov Petersen, Sidsel Jensen, Martin Leopold
+
+:Draft-Created: 15-Dec-2005 
+:Draft-Version: 1 
+:Draft-Modified: 27-Mar-2006 
+:Draft-Discuss: TinyOS 8051 Working Group List 
+
+.. Note::
+   This memo is informational. It will hopefully be a basis for
+   discussions and suggestions for improvements.  Distribution of this
+   memo is unlimited.  This memo is in full compliance with TEP 1.
+
+Abstract
+====================================================================
+
+This TEP covers our effort of porting `TinyOS`_ to the nRF24E1
+platform. We ported the basic modules of TinyOS: Timer, UART, ADC and
+LEDS.
+
+
+1. Project Outline
+====================================================================
+
+The original 8 bit 8051 chip is a member of the `mcs51 family`_ and
+was developed in 1980 by Intel. It is still to this date one of the most
+widely used microcontrollers. Porting TinyOS to the 8051 System on chip
+architecture makes perfect sense - the mcs51 family has been thoroughly
+tested, it is relatively cheap and it has a reasonable small footprint -
+which makes it ideal for embedded solutions and sensor networks.
+
+For this work, we use a Nordic Semiconductor VLSI nRF24E1
+evaluation-board [NSC]. The board contains an Intel 8051 compatible MCU
+with 4KB program memory, a 16 MHz clock, 3 different Timers (one being
+8052 compatible), a 2.4 GHz wireless RF transceiver and 9 input 10 bit
+ADC, SPI and a RS232 Serial interface. The nRF24E1 board was chosen
+because the radio component matches the radio on the specially designed
+DIKU/DTU HogthrobV0 [HOG] boards used for research purposes at DIKU
+[PEH].
+
+We ported a subset of TinyOS for the 8051 platform consisting of the
+Timer, UART, ADC and LED modules. We did not port the radio module and
+the underlying SPI-bus code.
+
+This works attacks the two most immediate problems when porting TinyOS
+to 8051: the toolchain and the hardware abstraction components. The
+first problem when porting TinyOS to 8051-based platforms concerns the
+toolchain. The Gcc compiler does not support 8051. This is a major issue
+as the code generated by the NesC preprocessor is tailored for gcc.  The
+second problem concerns the hardware abstraction components that must be
+specialized to the 8051 idiosyncracies. In a perfect world, such a
+specialization should not require to modify any interface.
+Unfortunately, we needed to modify some of the interfaces to accomodate
+the 8051 features.
+
+This work was done under the supervision of Martin Leopold at University
+of Copenhagen.
+
+2. Project Approach
+====================================================================
+
+The approach to the porting project has been pragmatic. The focus has
+been on producing working code, so testing and debugging have been key
+elements of our work. The process has been to implement new
+functionality in small iterative steps and do testing simultaneously.
+
+To bootstrap the development without a JTAG module or alike, we built a
+small LED expansion board attachable to the port logic. The LEDs was an
+easy way to get instant low level test output. We also built a small
+stimulator based on a potentiometer (variable resistor) to get valid
+input from the ADC pins.
+
+The following TinyOS application programs have been written and tested:
+  * Empty - test of port logic and tool chain 
+  * mcsatomic - test of atomic and interrupts 
+  * mcsBlink - test of LEDs 
+  * mcsBlinkTimer - test of Timers using LEDs 
+  * mcsSerialTest - test of UART code, simple input/output one char 
+  * mcsSerialTest2 - test of multiple byte output 
+  * mcsTimerSerialTest - test of UART controlled by Timer interrupts 
+  * mcsADC - test of ADC code with Timer and LEDs
+
+
+3. Development Environment and Tool Chain
+====================================================================
+
+The following subsections describe the different development tools,
+their selection and interconnection. 
+
+3.1 Selection of Development Tools/Compilers
+--------------------------------------------------------------------
+
+A large number of 8051 compilers exist primarily for the DOS and Windows
+platforms. We have focused on two popular and regularly updated
+compilers: `KEIL`_ and the Small Device C Compiler (SDCC).
+
+`SDCC`_ is an open source project hosted on the Sourceforge website,
+whereas the KEIL C51 compiler is a commercial compiler and Integrated
+Development Environment (IDE). The debugger for SDCC (SDCDB) is still
+fairly experimental. The KEIL suite runs on the Windows platform, and
+has a good interactive debugger and simulator. KEIL and SDCC accepts
+roughly the same syntactical dialect, which eases the work of moving
+between the two compilers.
+
+During our work with SDCC and SDCDB we encountered numerous problems and
+bugs. SDCC 2.4.0 suddenly returned 'fatal compiler errors' with no
+apparent reason. After an update of SDCC from version 2.4.0 to 2.5.0
+(most recent release) the error disappeared, the code compiled, but it
+still did not work correctly on the board. We also discovered a serious
+problem regarding sign bits in SDCC 2.5.0. SDCC made a type error when
+reading a 32 bit signed value. Apparently SDCC did not interpret the
+sign bit correctly, so a very small negative number was interpreted as a
+very large positive number as if the value was unsigned. KEIL however
+interprets the value correctly. The bug was submitted by us and fixed by
+the SDCC development team in just two days, but the timer module still
+does not work using SDCC.
+
+Our attempts using SDCC's debugger/simulator (SDCDB) was equally
+troublesome. SDCDB simply stopped at address 0, and running or stepping
+through the code returned us to the UNIX prompt with no error message.
+Without SDCDB, we had no debug possibility and we were forced to rethink
+the tool chain. We decided to substitute SDCC with the KEIL development
+kit. This gave us a working debug environment - with minimal change to
+the already produced code. 
+
+3.1.1 Our Recommendation
+------------------------------------------------------------------- 
+
+In our experience the SDCC compiler and associated tools are not yet
+mature enough to support our development. We recommend pursuing other
+alternatives such as KEIL or other compiler suites.
+
+We continue to mention SDCC in the remaining text, because we encourage
+the use of open source software and cross-platform development. We hope
+SDCC will prove an reliable alternative in the future.
+
+3.2 Tool Chain Overview
+--------------------------------------------------------------------
+
+The following figure and sections are an overview of the current tool
+chain. The tool chain is based on TinyOS 1.x, NesC 1.1.3, avr-gcc 3.4.3,
+PERL v. 5.8.6 and SDCC 2.5.4 or KEIL C51 version 7.20.
+
+Each step in the tool chain will be explained in the section below. ::
+
+              Mangle-
+ TinyOS       script
+ -----> app.c -----> app_mangled.c --------> app.hex ------> nRF24E1 
+  NesC         PERL                SDCC/KEIL         nRFPROG
+
+
+3.3 Description of the Tool Chain
+--------------------------------------------------------------------
+
+The compilation of the TinyOS test program outputs two files, a
+'main.exe' file and an 'app.c' file. The 'app.c' file contains all the
+needed code to run the TinyOS application. However the C code produced
+by NesC cannot be compiled for the 8051 platform directly. 
+
+One solution could be to alter the syntax NesC produces for this
+specific platform, by modifying the source for NesC. However as a first
+step we chose not to make changes to NesC, but instead changed the
+content of the NesC output file 'app.c'. We inserted an extra step in
+the tool chain in the form of a mangle script. The mangle script works
+as the rope, tying the output from NesC to the input of SDCC or KEIL.
+
+After running the mangling script on the 'app.c' file we obtain an
+'app_mangled.c' file which can be compiled by either SDCC or KEIL. This
+produces a hex file that is transferred to the chip by the nRFPROG
+software.
+
+3.4 Description of the Mangling Script
+--------------------------------------------------------------------
+
+The mangling script is written in PERL, a commonly used general purpose
+scripting language with powerful pattern matching capabilities and
+extensive handling of regular expressions. The mangle script handles all
+currently known problems, and it can easily be expanded to handle
+additional alterations.
+
+To run the mangle script use the following syntax:
+
+"./sdccMangleAppC.pl -KEIL -file build/mcs51/app.c >
+  build/mcs51/app_mangled.c" 
+
+or 
+
+"./sdccMangleAppC.pl -SDCC -file build/mcs51/app.c > 
+  build/mcs51/app_mangled.c"
+
+The 'sdccMangleAppC.pl' script handles a number of needed alterations:
+
+  * it alters the SFR and SBIT declarations for SDCC and KEIL
+    respectively
+  * it convert 64 bit data types to 32 bit 
+  * it alters the reserved SDCC keyword data to _data 
+  * it removes inlining directives 
+  * it removes preprocessor line numbering 
+  * it alters $ in identifiers to underscore 
+  * it alters GCC interrupt declaration to SDCC syntax
+
+Each of these alterations will be explained in the sections below.
+
+3.4.1 SFR and SBIT Declarations
+--------------------------------------------------------------------
+
+In order to make TinyOS accept the 8051 special function registers (SFR)
+and special bit variables (SBIT), we have included them into the TinyOS
+8051 platform folder as a 8051.h file.
+
+SFRs are located on an address dividable by 8, whereas an SBIT addresses
+a specific bit within these SFR. 
+
+In order to make TinyOS accept the SFRs we have type defined them in the
+NesC code as:
+
+  typedef int sfr; 
+  sfr P0 __attribute((x80));
+
+which is altered to
+
+  //typedef int sfr;
+  sfr at 0x80 P0;
+
+for the SDCC compiler in the mangle script and
+
+  sfr P0 = 0x80;
+
+for the KEIL compiler and similar for the SBIT declarations.
+
+NOTE: The SDCC website refers to a PERL script (keil2sdcc.pl - last
+updated June 2003) for translating SFR and SBIT declarations from KEIL
+to SDCC, but it produces code with illegal syntax, so either do not use
+it, or alter it to produce code with the right syntax.
+
+3.4.2 SDCC/KEIL Data Types
+--------------------------------------------------------------------
+
+TinyOS and SDCC/KEIL do not support the same data types, so some
+alterations were needed to compile the code with SDCC and KEIL.
+
+SDCC/KEIL supports the following data types:
+  - char (8 bits, 1 byte)
+  - short (16 bits, 2 bytes)
+  - int (16 bits, 2 bytes)
+  - long (32 bit, 4 bytes)
+  - float (32 bit, 4 bytes).
+
+TinyOS supports an extra data type - 64 bit long long (u)int64_t. Since
+we are working with software that does not support this data type, on a
+very small hardware memory model, we decided to change the NesC 64 bit
+data types to 32 bit. This is done in the mangling script.
+
+3.4.3 Reserved Keywords in SDCC
+--------------------------------------------------------------------
+
+A number of keywords are reserved in SDCC. Half of them represent a
+directive to the compiler, defining which memory segment on the nRF24E1
+the specific lines of code refer to. To ensure that the developer does
+not break code by unintentionally and unaware of their effect use them
+fx. as a variable name in the NesC code, they need to be replaced or
+altered to something else, e.g. data to _data, before compiling for
+SDCC. Right now the mangle script only handles the reserved keyword
+data. None of the other keywords except SFR, SBIT and interrupt are
+currently in use in the code. This might pose as a problem to future
+work, but the mangle script can easily be expanded to handle misuse of
+the other keywords.
+
+However, if the code size increases significantly in the future, it
+might be nessecary to insert the keywords into the code, to support the
+architectures segmented memory model. Right now, everything is stored in
+the directly addressable memory segment, which is quite small.
+
+The reserved keywords are:
+  * data / near 
+  * xdata / far 
+  * idata / pdata 
+  * code 
+  * bit 
+  * SFR / SBIT 
+  * interrupt
+  * critical
+
+Variables declared with keyword storage class data/near will be
+allocated in the directly addressable portion of the internal RAM. This
+is the default option for the small memory model. Variables declared
+with storage class xdata/far will be placed in external RAM, which is
+default for the large memory model.
+
+Variables declared with keyword storage class idata will be allocated in
+the indirectly addressable portion of the internal RAM. The first 128
+byte of idata physically access the same RAM as the data memory. The
+original 8051 had 128 byte idata, but nowadays most devices have 256
+byte idata memory. Paged xdata access (pdata) is just as
+straightforward.
+
+The different memory segments that the keywords apply to, can be seen in
+the figure below.
+
+nRF24E1 Internal Data Memory Structure Overview::
+
+                        IRAM                  SFR
+                 +---------------------+---------------------+
+             FFh |                     |                     | FFh
+                 |   Accessible by     |   Accessible by     |
+ Upper 128 bytes |   indirect          |   direct            |
+                 |   addressing only   |   addressing only   |
+             80h |                     |                     | 80h
+                 +---------------------+---------------------+
+             7Fh |                     |
+                 | Addressable by      |
+ Lower 128 bytes | direct and          |
+                 | indirect addressing |
+             00h |                     |
+                 +---------------------+
+
+The prefered memory model can be defined in SDCC through CLI option
+--model-small or --model-large - the small memory model is default. In
+KEIL it can be changed through selecting it in the options pane for the
+target. 
+
+
+3.4.4 Removal of inlining
+--------------------------------------------------------------------
+
+NesC assumes that GCC is being used for the final compilation. GCC
+supports inline functions and can be made to optimize code quite
+aggressively, so the code generated by NesC does not need to be very
+efficient. Unfortunately SDCC does not support code inlining, so the
+inline statements have to be removed, when compiling for SDCC.
+ 
+Lines with the following format are affected:
+
+static inline void TOSH_sleep(void ); 
+static __inline void TOSH_SET_RED_LED_PIN(void);
+__inline void__nesc_enable_interrupt(void);
+
+Lines with the noinline attribute is substituted with the 
+#pragma NO_INLINE.
+
+3.4.5 Removal of Preprocessor Line Numbering
+--------------------------------------------------------------------
+
+Also NesC produce preprocessor line number meta data, to allow the
+compiler to report error messages referring to the original code. We do
+not really need them for anything, so we filter them out to minimize the
+code size. It also eases the code reading significantly. If needed for
+debug purposes the regular expression in the mangle script which remove
+them can be commented out.
+
+3.4.6 Change $ in Identifiers
+--------------------------------------------------------------------
+
+The SDCC compiler is very strict when it comes to valid symbols in
+identifiers. NesC produce GCC-code which inserts $ as a separator
+character in identifiers. We mangle the $ to two underscores in order to
+enable SDCC/KEIL to compile.
+
+3.4.7 Interrupt Vectors
+--------------------------------------------------------------------
+
+The syntax for declaration of interrupt vectors are different in GCC and
+SDCC/KEIL. So we mangle the interrupt declaration:
+
+From: void __attribute((interrupt)) __vector_5(void) 
+To:   void __vector_5(void) interrupt 5
+
+Additionally KEIL does not understand that the interrupt vector is
+defined previous to its use. So we remove the forward declaration of the
+vectors in the mangle script, when compiling for KEIL.
+
+
+4. TinyOS Modifications
+====================================================================
+
+TinyOS is based on modules with different levels of hardware
+abstraction. When porting TinyOS to a new platform, you change the
+underlying hardware dependencies in TinyOS, and you have to rebuild the
+modules bottom up. Hence, it has been necessary to modify a number of
+modules in TinyOS. The figure below shows the topological hierarchy of
+the TinyOS modules we have focused on. By far, most of the work has been
+done in the Hardware Presentation Layer (HPL), but certain changes also
+affected the higher abstractions, such as changes in interfaces and
+interrupt handling.
+
+Modified TinyOS modules overview::
+
+ +------------------------------------------------------------+ 
+ |                     TinyOS Application                     |  App
+ +------------------------------------------------------------+ 
+   \/    /\            \/    /\           \/   /\      \/  /\   -----
+ +----------+        +----------+       +---------+  +--------+ 
+ |  Timer   |        |   UART   |       |   ADC   |  |  LEDs  |  HAL
+ +----------+        +----------+       +---------+  +--------+
+   \/    /\            \/    /\           \/   /\               -----
+ +----------+  +---------------------+  +---------+ 
+ | HPLClock |  |       HPLUART       |  | HPLADC  |      \/      HPL 
+ +----------+  +---------------------+  +---------+
+   \/    /\        \/         \/  /\      \/   /\               ----- 
+ +----------+  +--------+   +--------+  +---------+  +--------+ 
+ |  Timer2  |  | Timer1 | > | Serial |  | Sensors |  |  Port  |  HW 
+ +----------+  +--------+   |  Port  |  +---------+  +--------+ 
+                           +--------+
+
+The following sections describe the changes to the four groups of modules.
+
+4.1 HPLClock and related modules
+--------------------------------------------------------------------
+
+The 8051 chip has three independent timer/counter circuits: Timer0,
+Timer1 and Timer2, which can run in various modes. Each timer/counter
+consists of a 16-bit register that is accessible to software as three
+SFRs (TL0/TH0, TL1/TH1 and TL2/TH2). Timer0 and Timer1 can be used as 13
+or 16 bit timer/counter or as 8 bit counters with auto-reload. Timer2 is
+only capable of running as a 16 bit timer/counter, but can remain as
+such even in auto-reload mode. Reload is desirable for loading the clock
+with a start value.
+
+We have chosen to use Timer2 for the clock module, since it gives our
+design a maximum clock interval of 49.15 ms at a 16 MHz system clock.
+Using a different timer circuit would limit the interval to 0.192 ms,
+which would result in a great deal of interrupts and consume processing
+power for administrational overhead.
+
+4.1.1 Timer
+--------------------------------------------------------------------
+
+The Timer module (HAL) uses the HPLClock module to handle the hardware
+timing.  These two modules communicate through the clock interface.
+However, the standard TinyOS clock interface is designed for an MCU with
+a more flexible prescaler, then the 8051 chip is equipped with. The 8051
+is limited to a prescaler with a factor of 1/4 or 1/12 of the CPU clock
+frequency, whereas the TinyOS clock interface currently uses an 8 bit
+prescaler and an 8 bit timer.  Because of the 8051s limited prescaler
+options, and the possibility to use a 16 bit timer/counter to compensate
+for the reduced prescaler options, we decided to widen the clock
+interface from 8 to 16 bit. We are using the factor 1/4 for the
+prescaler.
+
+The interface change has affected the following methods: 
+result_t setRate(uint16_t interval, char scale) 
+void     setInterval(uint16_t value) 
+void     setNextInterval(uint16_t value) 
+uint16_t getInterval()
+result_t setIntervalAndScale(uint16_t interval, uint8_t scale)
+uint16_t readCounter() 
+void     setCounter(uint16_t n)  
+
+See: 
+  Clock.h 
+  Clock.nc 
+  HPLClock.nc 
+  TimerM.nc 
+  TimerC.nc 
+  8051.h
+
+4.2 HPLUART
+--------------------------------------------------------------------
+
+The UART is depending on a timer to generate a baud rate for the serial
+port. The architecture only allows two of the three timers (Timer1 or
+Timer2), to act as such. Since Timer2 is already used by the clock
+module, this leaves only Timer1 available for the UART module. 
+
+When using Timer1 as the baud rate generator, 5 different baud rates can
+be obtained: 1.20 KiB/s, 2.4 KiB/s, 4.8 KiB/s, 9.6 KiB/s or 19.2 KiB/s.
+We chose to use a baud rate of 19.2 KiB/s with 8 data bits, no parity
+and one stop bit, since this speed is commonly used and the fastest
+speed possible using this timer.
+
+We have also expanded the HPLUART interface to include a put2 method.
+This method is able to send more than one byte, by taking two pointers
+as arguments. These pointers refer to the first and last bytes to be
+sent. The HPLUART interrupt handler was also modified to take the
+multiple byte data into account.
+
+See: 
+  8051.h 
+  HPLUART.nc 
+  HPLUARTC.nc 
+  HPLUARTM.nc
+
+4.3 HPLADC
+--------------------------------------------------------------------
+
+The TinyOS standard ADC interface was developed for the AVR which
+includes hardware functionality for repetitive sampling at a given
+interval.  Implementing this functionality on the 8051, which does not
+support this in hardware, would require use of the last timer. We chose
+not to implement repetitive sampling, therefore the setSampleRate method
+currently has no use. 
+
+See: 
+  8051.h 
+  ADCM.nc 
+  HPLADCC.nc 
+  HPLADCM.nc
+
+4.4 LEDS
+--------------------------------------------------------------------
+
+TinyOS features three standard LEDs (Red, Green and Yellow), but the
+nRF24E1 evaluation board is not equipped with programmable LEDs so we
+used the general purpose ports (GPIO).
+
+The standard 8051 platform features four 8 bit GPIO, however the nRF24E1
+evaluation board is only equipped with two ports: Port0 and Port1, where
+Port0 has eight bits and Port1 has only three bits. 
+
+Intuitively the best solution would have been to place the standard
+three TinyOS LED bits on Port1, but unfortunately we were unable to
+control the most significant bit on Port1, since it is hard-wired as
+input and controlled by external SPI_CTRL. The Yellow LED was moved to
+Port0.
+
+To visualize the status of the GPIO, including the three standard LEDs,
+we built a LED expansion board.
+
+The three LEDs are currently wired to: 
+  Red -> P1.0 
+  Green -> P1.1
+  Yellow -> P0.7.
+
+See: 
+  8051.h 
+  hardware.h 
+  mcs51hardware.h 
+  LedsC.nc
+
+4.5 Interrupts
+--------------------------------------------------------------------
+
+In TinyOS interrupts are not implemented as a single module, they are
+mainly facilitated in atomic blocks and in the init, start and stop
+methods of the various HPL modules. The init, start and stop methods
+only handle interrupts that are specific to the module, i.e. timer
+interrupt for the HPLClock module and serial interrupt for the HPLUART
+module. While the atomic block handle the enabling of global interrupts.
+This is used to avoid preempting code execution in critical blocks.
+
+
+5. Conclusion
+====================================================================
+
+The project have reached a plateau of development in porting TinyOS to
+the 8051 platform, on which future development can be based. The basic
+modules (Timer, UART, ADC and LEDS) have been implemented making 8051
+accessible for the TinyOS community. However a essential module for the
+field of sensor networks, the radio module, is still missing.
+
+The result of our work will be uploaded to the TinyOS 8051 Working Group
+website.
+
+
+6. Future Work
+====================================================================
+
+The work presented in this TEP is short of being a complete porting of
+TinyOS to the 8051 platform. Two obvious future tasks are implementing a
+Radio module involving the SPI interface and Power Management for duty
+cycling. The radio module is currently under development, in which the
+main hurdle is the three wire SPI interface.
+
+This work is done for TinyOS 1.x, but looking forward, the 8051 port
+should target TinyOS 2.0. This might be a challenge with the timer
+interface being so different from TinyOS 1.x.
+
+
+7. Authors
+====================================================================
+
+| Anders Egeskov Petersen 
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø 
+| Denmark 
+| 
+| Sidsel Jensen 
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø 
+| Denmark 
+|
+| email - purps@diku.dk
+| 
+| Martin Leoold
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø
+| Denmark 
+|
+| Phone +45 3532 1464
+|
+| email - leopold@diku.dk
+
+
+8. Citations
+====================================================================
+         
+.. [NSC] Nordic Semiconductor. nRF24E1 Evalutaion board.
+         http://www.nordicsemi.no/files/Product/development_tools/nRF24E1_EVBOARD_rev1_0.pdf
+
+.. [PEH] Martin Leopold. "Power Estimation using the Hogthrob Prototype Platform" *M.Sc. 
+         Thesis, DIKU, Copenhagen University, Denmark, December 2004* .
+
+.. [HOG] Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet.
+        "Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor
+        Nodes" *Eighth Euromicro Symposium on Digital Systems Design*, 2005.
+
+.. _TinyOS: http://www.tinyos.net 
+.. _SDCC: http://sdcc.sourceforge.net 
+.. _KEIL: http://www.keil.com
+.. _mcs51 family: http://www.intel.com/design/mcs51 
diff --git a/doc/txt/tep2.txt b/doc/txt/tep2.txt
new file mode 100644
index 00000000..480dd240
--- /dev/null
+++ b/doc/txt/tep2.txt
@@ -0,0 +1,571 @@
+=================================
+Hardware Abstraction Architecture
+=================================
+
+:TEP: 2
+:Group: Core Working Group 
+:Type: Best Current Practice
+:Status: Draft
+:TinyOS-Version: 2.0
+:Author: Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer, Cory Sharp, Adam Wolisz and David Culler
+
+:Draft-Created: 14-Sep-2004
+:Draft-Version: $revision$
+:Draft-Modified: $date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This document specifies a Best Current Practices for the TinyOS
+   Community, and requests discussion and suggestions for
+   improvements.  The distribution of the memo is unlimited, provided
+   that the header information and this note are preserved. Parts of
+   this document are taken verbatim from the [HAA2005]_ paper that is
+   under IEEE copyright. This memo is in full compliance with [TEP1]_.
+
+
+Abstract
+========
+
+
+This TEP documents the *Hardware Abstraction Architecture (HAA)* for TinyOS
+2.0 that balances conflicting requirements of WSN applications and the
+desire for increased portability and streamlined development of
+applications. The three-layer design gradually adapts the capabilities
+of the underlying hardware platforms to the selected
+platform-independent hardware interface between the operating system
+core and the application code. At the same time, it allows the
+applications to utilize a platform's full capabilities -- exported at
+the second layer, when the performance requirements outweigh the need
+for cross-platform compatibility.
+
+..  
+    We demonstrate the practical value of the approach by presenting
+    how it can be applied to the most important hardware modules that
+    are found in a typical WSN platform. We support the claims using
+    concrete examples from existing hardware abstractions in TinyOS
+    and the implementation of the MSP430 platform that follows the
+    architecture proposed in this paper.
+
+
+Table of Contents
+=================
+
+.. contents:: 
+.. sectnum::
+
+
+Introduction
+============
+
+
+The introduction of hardware abstraction in modern operating systems
+has proved valuable for increasing portability and simplifying
+application development by hiding the hardware intricacies from the
+rest of the system. Although enabling portability, hardware
+abstractions come into conflict with the performance and
+energy-efficiency requirements of WSN applications. 
+
+We need a *Hardware Abstraction Architecture (HAA)* that can strike a
+balance between the above conflicting goals. The component-based model
+of TinyOS has the functionality required for resolving this
+tension. The main challenge is to select an appropriate organization
+of abstraction functionality in form of components to support
+reusability while maintaining energy-efficiency through access to the
+full hardware capabilities when it is needed.
+
+Based on the experience in porting TinyOS to new platforms we believe
+that an effective organization is possible when the strengths of the
+component-based approach are combined with a flexible, three-tier
+organization of the hardware abstraction architecture.
+
+
+Architecture
+============
+
+In the proposed architecture (Fig.1_), the hardware abstraction
+functionality is organized in three distinct layers of components.
+Each layer has clearly defined responsibilities and is dependent on
+interfaces provided by lower layers.  The capabilities of the
+underlying hardware are gradually adapted to the established
+platform-independent interface between the operating system and the
+applications. As we move from the hardware towards this top interface,
+the components become less and less hardware dependent, giving the
+developer more freedom in the design and the implementation of
+reusable applications.
+
+.. _Fig.1:
+
+::
+
+                                 +-----------------------------+
+                                 |                             |
+                                 | Cross-platform applications |
+                                 |                             |
+                                 +--------------+--------------+
+ +-----------------+                            |                            +-----------------+
+ |Platform-specific|                            |                            |Platform-specific|
+ |  applications   |                            |                            |  applications   |
+ +--------+--------+       Platform-independent |  hardware interface        +--------+--------+
+          |          +-----------------+--------+--------+-----------------+          |
+          |          |                 |                 |                 |          |
+          |  +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+  |
+          |  |.------+------.| |.------+------.| |.------+------.| |.------+------.|  |
+          |  ||             || ||             || ||             || ||    HIL 4    ||  |
+          |  ||    HIL 1    || ||    HIL 2    || ||    HIL 3    || |`------+------'|  |
+          |  ||             || |`------+------'| |`------+------'| |       |       |  |
+          |  |`------+------'| |       |       | |       |       | |       |  +----+--+
+          +--+----+  |       | |.------+------.| |       |       | |       |  |    |
+             |    |  |       | ||             || |.------+------.| |.------+--+---.|
+             |.---+--+------.| ||             || ||             || ||             ||
+             ||             || ||    HAL 2    || ||             || ||             ||
+             ||             || ||             || ||    HAL 3    || ||    HAL 4    ||
+             ||    HAL 1    || |`------+------'| ||             || ||             ||
+             ||             || |       |       | ||             || ||             ||
+             ||             || |       |       | |`------+------'| |`------+------'|
+             |`------+------'| |.------+------.| |       |       | |       |       |
+             |       |       | ||             || |.------+------.| |       |       |
+             |.------+------.| ||    HPL 2    || ||             || |.------+------.|
+             ||    HPL 1    || ||             || ||    HPL 3    || ||    HPL 4    ||
+             |`------+------'| |`------+------'| |`------+------'| |`------+------'|
+             +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+  HW/SW
+                     |                 |                 |                 |          boundary
+        ************************************************************************************
+              +------+------+   +------+------+   +------+------+   +------+------+
+              |HW Platform 1|   |HW Platform 2|   |HW Platform 3|   |HW Platform 4|
+              +-------------+   +-------------+   +-------------+   +-------------+
+
+                    
+                       Fig.1: The proposed Hardware Abstraction Architecture
+
+
+
+Hardware Presentation Layer (HPL)
+---------------------------------
+
+The components belonging to the *HPL* are positioned directly over
+the HW/SW interface. As the name suggests, their major task is to
+"present" the capabilities of the hardware using the native concepts
+of the operating system.  They access the hardware in the usual way,
+either by memory or by port mapped I/O. In the reverse direction, the
+hardware can request servicing by signaling an interrupt. Using these
+communication channels internally, the *HPL* hides the hardware
+intricacies and exports a more usable interface (simple function
+calls) for the rest of the system.
+
+The *HPL* components SHOULD be stateless and expose an interface
+that is fully determined by the capabilities of the hardware module
+that is abstracted. This tight coupling with the hardware leaves
+little freedom in the design and the implementation of the components.
+Even though each *HPL* component will be as unique as the underlying
+hardware, all of them will have a similar general structure. For
+optimal integration with the rest of the architecture, each *HPL*
+component SHOULD have:
+
+- commands for initialization, starting, and stopping of the
+  hardware module that are necessary for effective power management
+  policy
+- "get" and "set" commands for the register(s) that control
+  the operation of the hardware
+- separate commands with descriptive names for the most
+  frequently used flag-setting/testing operations
+- commands for enabling and disabling of the interrupts generated by
+  the hardware module
+- service routines for the interrupts that are generated by the
+  hardware module
+
+The interrupt service routines in the *HPL* components perform only
+the most time critical operations (like copying a single value,
+clearing some flags, etc.), and delegate the rest of the processing to
+the higher level components that possess extended knowledge about the
+state of the system.
+
+The above *HPL* structure eases manipulation of the hardware.
+Instead of using cryptic macros and register names whose definitions
+are hidden deep in the header files of compiler libraries, the
+programmer can now access hardware through a familiar interface.
+
+This *HPL* does not provide any substantial abstraction over the
+hardware beyond automating frequently used command
+sequences. Nonetheless, it hides the most hardware-dependent code and
+opens the way for developing higher-level abstraction components.
+These higher abstractions can be used with different *HPL*
+hardware-modules of the same class.  For example, many of the
+microcontrollers used on the existing WSN platforms have two USART
+modules for serial communication.  They have the same functionality
+but are accessed using slightly different register names and generate
+different interrupt vectors. The *HPL* components can hide these
+small differences behind a consistent interface, making the
+higher-level abstractions resource independent.  The programmer can
+then switch between the different USART modules by simple rewiring
+(*not* rewriting) the *HPL* components, without any changes to the
+implementation code.
+
+  
+Hardware Adaptation Layer (HAL)
+-------------------------------
+
+The adaptation layer components represent the core of the
+architecture. They use the raw interfaces provided by the *HPL*
+components to build useful abstractions hiding the complexity
+naturally associated with the use of hardware resources. In contrast
+to the *HPL* components, they are allowed to maintain state that can
+be used for performing arbitration and resource control.
+
+Due to the efficiency requirements of WSN, abstractions at the *HAL*
+level are tailored to the concrete device class and platform. Instead
+of hiding the individual features of the hardware class behind generic
+models, *HAL* interfaces expose specific features and provide the
+"best" possible abstraction that streamlines application development
+while maintaining effective use of resources.
+
+For example, rather than using a single "file-like" abstraction for
+all devices, we propose domain specific models like *Alarm*, *ADC
+channel*, *EEPROM*. According to the model, *HAL* components SHOULD
+provide access to these abstractions via rich, customized interfaces,
+and not via standard narrow ones that hide all the functionality
+behind few overloaded commands.
+
+Hardware Interface Layer (HIL)
+------------------------------
+
+The final tier in the architecture is formed by the *HIL* components
+that take the platform-specific abstractions provided by the *HAL* and
+convert them to hardware-independent interfaces used by cross-platform
+applications.  These interfaces provide a platform independent
+abstraction over the hardware that simplifies the development of the
+application software by hiding the hardware differences.  To be
+successful, this API "contract" SHOULD reflect the *typical*
+hardware services that are required in a WSN application.
+
+The complexity of the *HIL* components mainly depends on how advanced
+the capabilities of the abstracted hardware are with respect to the
+platform-independent interface. When the capabilities of the hardware
+exceed the current API contract, the *HIL* "downgrades" the
+platform-specific abstractions provided by the *HAL* until they are
+leveled-off with the chosen standard interface. Consequently, when the
+underlying hardware is inferior, the *HIL* might have to resort to
+software simulation of the missing hardware capabilities.  As newer
+and more capable platforms are introduced in the system, the pressure
+to break the current API contract will increase. When the performance
+requirements outweigh the benefits of the stable interface, a discrete
+jump will be made that realigns the API with the abstractions provided
+in the newer *HAL*.  The evolution of the platform-independent interface
+will force a reimplementation of the affected *HIL* components. For
+newer platforms, the *HIL* will be much simpler because the API contract
+and their *HAL* abstractions are tightly related. On the other extreme,
+the cost of boosting up (in software) the capabilities of the old
+platforms will rise.
+
+Since we expect *HIL* interfaces to evolve as new platforms are
+designed, we must determine when the overhead of software emulation of
+hardware features can no longer be sustained.  At this point, we
+introduce *versioning* of *HIL* interfaces.  By assigning a version
+number to each iteration of an *HIL* interface, we can design
+applications using a legacy interface to be compatible with previously
+deployed devices.  This is important for WSNs since they execute
+long-running applications and may be deployed for years.  An *HIL* MAY
+also branch, providing multiple different *HIL* interfaces with
+increasing levels of functionality.
+
+
+Selecting the level of abstraction
+----------------------------------
+
+The platform-dependence of the *HAL* in the architecture leads to the
+more general question about why we have opted for a three-layered
+design. In other words, why we do not expose the platform-independent
+hardware interface directly from the *HAL* components. The main reason
+behind this decision is the increased *flexibility* that arises from
+separating the platform-specific abstractions and the adaptation
+wrappers that upgrade or downgrade them to the current
+platform-independent interface.  In this way, for maximum performance,
+the platform specific applications can circumvent the *HIL* components
+and directly tap to the *HAL* interfaces that provide access to the full
+capabilities of the hardware module.
+
+Selecting the "right" level--whether an application should use the *HIL*
+or directly access the *HAL*--can sometimes cause one hardware asset to
+be accessed using two levels of abstraction from different parts of
+the application or the OS libraries.
+
+Let us take an application similar to the standard OscilloscopeRF
+application in TinyOS as an example.  The application uses the ADC to
+sample several values from a temperature sensor and sends them in the
+form of a message over the radio.  If the observed phenomenon does not
+have a large signal bandwidth and the time between subsequent
+conversions is long, for the sake of cross-platform compatibility, the
+programmer might decide to use the standard ``ADCSingle``
+interface. This interface is exported by the *HIL* sensor wrapper
+(Fig.2_) using the services of the platform-specific *HAL*
+component. When enough samples are collected in the message buffer,
+the application passes the message to the networking stack.  The MAC
+protocol used for message exchange over the radio uses clear channel
+assessment to determine when it is safe to send the message. This
+usually requires taking several samples of the RSSI signal provided by
+the radio hardware. Since this is a very time critical operation in
+which the correlation between the consecutive samples has a
+significant influence, the programmer of the MAC might directly use
+the ``MSP430ADC12Multiple`` interface of the *HAL* component as it
+provides much finer control over the conversion process.
+
+.. _Fig.2:
+
+::
+
+
+     StdControl                        
+            | ADCSingle            
+            |    |  ADCMultiple                 
+            |    |    |                             
+     +------|----|----|------------------------------------------+
+     |      |    |    |                            Temperature   |
+     |      v    v    v                                          |  
+     | +--------------------+ MSP430ADC12Single   +------------+ |
+     | |   TemperatureM     |-------------------->|MSP430ADC12C| |
+     | |                    | MSP430ADC12Multiple |            | |
+     | |                    |-------------------->|            | |
+     | +--------------------+                     +------------+ |
+     +-----------------------------------------------------------+
+ 
+                Fig.2: The ADC HIL sensor wrapper
+
+
+As a result of this chain of decisions, we end up with a concurrent
+use of the ADC hardware module using two different levels of
+abstraction. To support this type of "vertical" flexibility we include
+more complex arbitration and resource control functionality in the *HAL*
+components so that a safe shared access to the *HPL* exported resources
+can be guaranteed.
+
+
+Reference
+=========
+
+The proposed HAA was applied for the first time during the
+implementation of the `MSP430 platform`_ that abstracts the
+capabilities of the TI MSP430 microcontroller in `TinyOS 1.1.7`_. The
+implementation is currently being used by four hardware platforms
+(TelosA, TelosB, eyesIFX and eyesIFXv2) and has quite successfully
+satisfied the requirements of a large range of applications.
+
+In the following we illustrate the properties of the proposed
+architecture using real-world examples from the planned hardware
+abstraction functionality in TinyOS 2.0.
+
+
+Processing unit
+---------------
+
+In TinyOS most of the variability between the processing units is
+hidden from the OS simply by using a nesC/C based programming language
+with a common compiler suite (GCC). For example, the standard library
+distributed with the compiler creates the necessary start-up code for
+initializing the global variables, the stack pointer and the interrupt
+vector table, shielding the OS from these MCU-specific tasks.
+
+To unify things further, TinyOS provides mechanisms for declaring
+reentrant and non-reentrant interrupt service routines and critical
+code-sections.  For the MCU's external pins, it provides macros that
+permit setting and clearing the pin, as well as changing its direction
+and function.  For example, the TI~MSP430's ADC pins may be used as
+either general I/O or as an analog input to the ADC hardware module.
+Macros are also provided for timed spin loops at microsecond
+resolution, independent of the microcontroller. These macros are
+defined in each platform's ``hardware.h`` descriptor file. Finally,
+the *HPL* components deal with the different ways of accessing
+registers (memory-mapped or port-mapped I/O) using the definitions in
+the standard library header files.
+
+The three-layer architecture is not intended to abstract the features
+of the different MCU cores. For the currently supported MCUs, the
+combination of the compiler suite support with the thin abstraction in
+the ``hardware.h`` files is sufficient. Nevertheless, if new cores
+with radically different architectures need to be supported by TinyOS
+in the future, this part of the hardware abstraction functionality
+will have to be explicitly addressed.
+
+
+Power management
+----------------
+
+On both the MSP430 and the Atmel, before entering a sleep mode, a
+component checks if any hardware modules require that the MCU core is
+active.  Additionally, all services including *HPL* and *HAL*
+components have a start and stop function.  When a service is no
+longer using a hardware module, it may call the stop function of the
+*HPL* or *HAL* component.  Doing so disables the module for power
+savings, but also removes the MCU's dependence on that hardware module
+to enter sleep mode.  For example, the ADC module may be clocked from
+a high speed oscillator.  When a sample is not in progress, the ADC
+module may be shut down and it will no longer use the high speed
+oscillator.  As a result, when the MCU is idle, it may enter low power
+mode.
+
+This rather efficient way of implementing the power management
+functionality is made possible by the fact that most of the hardware
+modules are on-chip, attached directly to the MCU system bus, and that
+there is no hardware memory protection hindering the access to their
+status registers. As TinyOS platforms add more external devices
+connected via the peripheral buses, this task will get increasingly
+complicated.  Ultimately, keeping some state in the form of device
+enumeration or reference counting mechanisms might be needed for
+proper power management.
+
+
+Clocks and timers
+-----------------
+
+The application of the HAA for abstracting the clock and timer
+modules is documented in [TEP102]_.
+
+
+Analog-to-digital converters
+----------------------------
+
+The application of the HAA for abstracting the analog-to-digital
+converter modules is documented in [TEP101]_.
+
+Data busses
+-----------
+
+The *HPL* functionality for the data busses includes two paths--one
+for data and a second for control. The control path allows the clock
+source, prescaler, and baud rate to be set. Interrupts may be enabled
+or disabled and various hardware flags may be read, set, or cleared,
+useful for polling or blocking implementations. Through the control
+path, the entire module may be started or stopped for power control.
+The data interface simply consists of sending and receiving a byte
+through the hardware's data registers, as well as interrupt based
+reporting of received data. Here is an example of the interfaces used
+in the MSP430 platform::
+
+  interface HPLUSARTControl {
+    async command void enableUART();
+    async command void disableUART();
+    async command void enableUARTTx();
+    async command void disableUARTTx();
+    async command void enableUARTRx();
+    async command void disableUARTRx();
+    async command void enableSPI();
+    async command void disableSPI();
+    async command void setModeSPI();
+    async command void setModeUART_TX();
+    async command void setModeUART_RX();
+    async command void setModeUART();
+    async command void setClockSource(
+          uint8_t source);
+    async command void setClockRate(
+          uint16_t baudrate, uint8_t mctl);
+    async command result_t disableRxIntr();
+    async command result_t disableTxIntr();
+    async command result_t enableRxIntr();
+    async command result_t enableTxIntr();
+    async command result_t isTxIntrPending();
+    async command result_t isRxIntrPending();
+    async command result_t isTxEmpty();
+    async command result_t tx(uint8_t data);
+    async command uint8_t rx();
+  }
+
+  interface HPLUSARTFeedback {
+    async event result_t txDone();
+    async event result_t rxDone(uint8_t data);
+  }
+
+Sometimes functionality for more than one bus protocol are supported
+through a single hardware module. In these cases, wrappers for each
+bus provide standard application interfaces for using the bus.
+Sharing the bus amongst different hardware devices or protocols may be
+done through a bus arbitration component. Bus arbitration allows
+higher level services to attain exclusive use of the bus, complete its
+operations, and then release the bus to the next service::
+
+  interface BusArbitration {
+    async command result_t getBus();
+    async command result_t releaseBus();
+    event result_t busFree();
+  }
+
+
+External storage
+----------------
+
+The application of the HAA for abstracting the external storage
+modules is documented in [TEP103]_.
+
+
+Radios
+------
+
+The application of the HAA for abstracting the radio modules is
+documented in [TEP104]_ and [TEP105]_.
+
+
+Conclusion
+==========
+
+The referenced TEPs in the previous section show that the three-layer
+design can be successfully used for exposing to the applications the
+functionality of the main hardware modules. The proposed architecture
+provides a set of core services that eliminate duplicated code and
+provide a coherent view of the system across different architectures
+and platforms. It supports the concurrent use of platform-independent
+and the platform-dependent interfaces in the same application. In this
+way, applications can localize their platform dependence to only the
+places where performance matters, while using standard cross-platform
+hardware interfaces for the remainder of the application.
+
+
+Author's Address
+================
+
+| Vlado Handziski (handzisk at tkn.tu-berlin.de) [1]_ 
+| Joseph Polastre (polastre at cs.berkeley.edu) [2]_ 
+| Jan-Hinrich Hauer (hauer at tkn.tu-berlin.de) [1]_
+| Cory Sharp (cssharp at eecs.berkeley.edu) [2]_
+| Adam Wolisz (awo at ieee.org) [1]_
+| David Culler (culler at eecs.berkeley.edu) [2]_
+
+
+.. [1] Technische Universitaet Berlin   
+       Telecommunication Networks Group                    
+       Sekr. FT 5, Einsteinufer 25                        
+       10587 Berlin, Germany           
+
+.. [2] University of California, Berkeley
+       Computer Science Department                
+       Berkeley, CA 94720 USA
+
+Citations
+=========
+
+.. [HAA2005] V. Handziski, J.Polastre, J.H.Hauer, C.Sharp,
+   A.Wolisz and D.Culler, "Flexible Hardware Abstraction for Wireless
+   Sensor Networks", in *Proceedings of the 2nd European Workshop on
+   Wireless Sensor Networks (EWSN 2005)*, Istanbul, Turkey, 2005.
+
+.. _MSP430 platform: http://cvs.sourceforge.net/viewcvs.py/tinyos/tinyos-1.x/tos/platform/msp430/
+
+.. _TinyOS 1.1.7: http://www.tinyos.net/scoop/section/Releases
+
+.. [TEP1] P. Levis, "TEP structure and key words" 
+   
+.. [TEP101] J.H. Hauer, V. Handziski, J. Polastre, L. Nachman, 
+   "Analog-to-digital Converter Abstraction"
+
+.. [TEP102] C. Sharp, "Clock and Timers Abstraction"
+
+.. [TEP103] D. Gay, J. Hui, "Non-volatile Storage Abstraction"
+
+.. [TEP104] K. Klues, "Radio Hardware Abstraction"
+
+.. [TEP105] J. Polastre, "Link Layer Primitives in TinyOS"
+
+..
+   Local Variables:
+   mode: indented-text
+   indent-tabs-mode: nil
+   sentence-end-double-space: t
+   fill-column: 70
+   End:
diff --git a/doc/txt/tep3.txt b/doc/txt/tep3.txt
new file mode 100644
index 00000000..818aa36c
--- /dev/null
+++ b/doc/txt/tep3.txt
@@ -0,0 +1,381 @@
+================================
+Coding Standard
+================================
+
+:TEP: 3
+:Group: TinyOS 2.0 Working Group 
+:Type: Best Current Practice
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Ion Yannopoulos, David Gay
+
+:Draft-Created: 31-Dec-2004
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List 
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.  This memo
+   is in full compliance with [TEP_1]_.
+
+.. contents::
+.. sectnum::
+
+
+Introduction
+========================================================================
+
+The purpose of a naming convention is twofold:
+  - To avoid collisions which prevent compilation or lead to errors.
+    In TinyOS the most important place to avoid such collisions is in
+    interface and component names.
+  - To enable readers of the code to identify which names are grouped
+    together and which packages they are defined in.
+
+Remember that code that is useful will end up being read far more often
+than it is written.  If you deviate from the suggestions or requirements
+below, be consistent in how you do so.  If you add any new conventions to
+your code, note it in a README.
+
+
+General Conventions
+========================================================================
+
+General
+-------
+
+  - Avoid the use of acronyms and abbreviations that are not well known.
+    Try not to abbreviate "just because".
+  - Acronyms should be capitalized (as in Java), i.e., Adc, not ADC.
+    Exception: 2-letter acronyms should be all caps (e.g., AM for active 
+    messages, not Am)
+  - If you need to abbreviate a word, do so consistently.  Try to be
+    consistent with code outside your own.
+  - All code should be documented using `nesdoc` [nesdoc]_, `Doxygen`
+    [Doxygen]_ or `Javadoc` [Javadoc]_.  Ideally each command, event and
+    function has documentation.  At a bare minimum the interface, component,
+    class or file needs a paragraph of description.
+  - If you write code for a file, add an `@author` tag to the toplevel
+    documentation block.
+
+
+Packages
+========================================================================
+ 
+For the purposes of this document a package is a collection of related
+source and other files, in whatever languages are needed.  A package is
+a logical grouping.  It may or may not correspond to a physical grouping
+such as a single directory.  In TinyOS a package is most often a
+directory with zero or more subdirectories.
+
+nesC and C do not currently provide any package support, thus names
+of types and components in different packages might accidentally 
+clash. To make this less likely, judiciously use prefixes on groups
+of related files (often, but not always, part of a single package). 
+See the examples below.
+
+In a package, we distinguish between public components (intended to
+be used and wired outside the package) and private components (only
+used and wired within the package). This distinction is not enforced
+by nesC.
+
+Directory structure
+-------------------
+
+  - Each package should have it's own directory.  It may have as many
+    subdirectories as are necessary.
+  - The package's directory should match the package's prefix (if it
+    uses one), but in lower-case.
+  - The default packages in a TinyOS distribution are:
+
+    - `tos/system/`.  Core TinyOS components.  This directory's
+       components are the ones necessary for TinyOS to actually run.
+    - `tos/interfaces/`.  Core TinyOS interfaces, including
+       hardware-independent abstractions.  Expected to be heavily
+       used not just by `tos/system` but throughout all other code.
+       `tos/interfaces` should only contain interfaces named in TEPs.
+    - `tos/platforms/`.  Contains code specific to mote platforms, but
+       chip-independent.
+    - `tos/chips/`.  Contains code specific to particular chips and to
+       chips on particular platforms.
+    - `tos/libs/`.  Contains interfaces and components which extend the
+       usefulness of TinyOS but which are not viewed as essential to its
+       operation.  Libraries will likely contain subdirectories.
+    - `apps/`, `apps/demos`, `apps/tests`, `apps/tutorials`.  Contain
+       applications with some division by purpose.  Applications may
+       contain subdirectories.
+  - It is not necessary that packages other than the core break up their
+    components and their interfaces.  The core should allow overrides of
+    components fairly easily however.
+  - Each directory should have a README describing its purpose.
+
+
+Language Conventions
+========================================================================
+
+nesC convention
+---------------
+
+Names
+.....
+
+  - All nesC files must have a `.nc` extension.  The nesC compiler requires
+    that the filename match the interface or component name.
+  - Directory names should be lowercase.
+  - Interface and component names should be mixed case, starting upper
+    case.
+  - All public components should be suffixed with 'C'.
+  - All private components should be suffixed with 'P'.
+  - Avoid interfaces ending in 'C' or 'P'.
+  - If an interface and component are related it is useful if they have
+    the same name except for the suffix of the component.
+  - Commands, events, tasks and functions should be mixed case, starting
+    lower case.
+  - Events which handle the second half of a split-phase operation begun
+    in a command should have names that are related to the commands.
+    Making the command past tense or appending `'Done'` are suggested.
+  - Constants should be all upper case, words separated by underscores.
+    - Use of `#define` for integer constants is discouraged: use `enum`.
+  - Type arguments to generic components and interfaces should use the
+    same case as C types: all lower-case separated by underscores, ending
+    in '_t'.
+  - Module (global) variables should be mixed case, starting lower case.
+
+Packages
+........
+
+  - Each package may use a prefix for its component, interface and
+    global C names. These prefixes may sometimes be common to multiple
+    packages. Examples:
+
+      - All hardware presentation layer names start with Hpl (this is
+        an example of a shared prefix).
+      - Chip-specific hardware abstraction layer components and interfaces
+        start with the chip name, e.g., Atm128 for ATmega128.
+      - The Maté virtual machine uses the Mate to prefix all its names.
+      - Core TinyOS names (e.g., the timer components, the Init interface) 
+        do not use a prefix.
+
+  - Some packages may use multiple prefixes. For instance, the ATmega128
+    chip package uses an Hpl prefix for hardware presentation layer
+    components and Atm128 for hardware abstraction layer components.
+
+Preprocessor
+............
+
+  - Don't use the nesC `includes` statement.  It does not handle macro
+    inclusion properly.  Use `#include` instead.
+  - Macros declared in an `.nc` file must be `#define`'d after the
+    `module` or `configuration` keyword to actually limit their scope to 
+    the module.
+  - Macros which are meant for use in multiple `.nc` files should be
+    `#define`'d in a `#include`'d C header file.
+  - Use of macros should be minimized:
+    `#define` should only be used where `enum` and `inline` do not suffice.
+
+    - Arguments to `unique()` should be `#define` string constants rather
+      than strings.  This minimizes nasty bugs from typos the compiler
+      can't catch.
+
+
+C Convention
+------------
+  - All C files have a .h (header) or (rarely) a .c (source) extension.
+
+    - Filenames associated with a component should have the same name as 
+      the component.
+    - Filenames of a package should have a name with the package
+      prefix (if any).
+
+    - Filenames which are not associated with a component should be lowercase.
+
+  - C does not protect names in any way. If a package uses a prefix, it
+    should also use it for all types, tags, functions, variables, 
+    constants and macros. This leads naturally to:
+
+    - Minimize C code outside of nesC files.  In particular: most uses of
+      hardware specific macros in TinyOS 1.x should be replaced with nesC
+      components in TinyOS 2.x.
+
+  - C type names (define with `typedef`) should be lower case, words
+    separated by underscores and ending in `'_t'`.
+  - C tag names (for `struct`, `union`, or `enum`) should be lower case,
+    words separated by underscores.  Types with tag names should provide
+    a typedef.
+  - C types which represent opaque pointers (for use in parameters) should
+    be named similar to other types but should end in `'_ptr_t'`.
+  - Functions should be lower case, words separated by underscores.
+  - Function macros (`#define` ) should be all upper case, words separated
+    by underscores.
+
+    - Using function macros is discouraged: use `inline` functions.
+
+  - Constants should be all upper case, words separated by underscores.
+    - Use of `#define` for integer constants is discouraged: use `enum`.
+  - Global variables should be mixed case, starting lower case.
+
+
+Java convention
+---------------
+
+  - The standard Java coding convention [Java_Coding_Convention]_
+    should be followed.
+  - All core TinyOS code is in the package `net.tinyos`.
+
+
+Other languages
+---------------
+
+  - No established conventions.
+
+TinyOS Conventions
+========================================================================
+
+TinyOS also follows a number of higher-level programming conventions,
+mostly designed to provide a consistent "look" to TinyOS interfaces and
+components, and to increase software reliability.
+
+Error returns
+-------------
+
+TinyOS defines a standard error return type, ``error_t``, similar to Unix's
+error returns, except that error codes are positive:
+
+::
+
+  enum {
+    SUCCESS        = 0,          
+    FAIL           = 1,
+    ESIZE          = 2, // Parameter passed in was too big.
+    ...
+  };
+
+``SUCCESS`` represents successful execution of an operation, and ``FAIL``
+represents some undescribed failure. Operations can also return more
+descriptive failure results using one of the Exxx constants, see the
+``tos/types/TinyError.h`` file for the current list of errors.
+
+The ``error_t`` type has a combining function to support multiple wiring
+of commands or events retuning ``error_t``, defined as follows:
+
+::
+
+  error_t ecombine(error_t r1, error_t r2) { return r1 == r2 ? r1 : FAIL; }
+
+This function returns ``SUCCESS`` if both error returns are ``SUCCESS``, an
+error code if they both return the same error, and ``FAIL`` otherwise.
+
+Commands that initiate a split-phase operation SHOULD return ``error_t`` if
+the operation may be refused (i.e., the split-phase event may not be
+signaled under some conditions). With such functions, the split-phase event
+will be signaled iff the split-phase command returns ``SUCCESS``.
+
+
+Passing pointers between components
+-----------------------------------
+
+Sharing data across components can easily lead to bugs such as data races,
+overwriting data, etc. To minimise the likelyhood of these occurrences,
+we discourage the use of pointers in TinyOS interfaces.
+
+However, there are circumstances where pointers are necessary for
+efficiency or convenience, for instance when receiving messages, reading
+data from a flash chip, returning multiple results, etc.  Thus we allow the
+use of pointers within interfaces as long as use of those pointers follows
+an "ownership" model: at any time, only one component may refer to the
+object referenced by the pointer. We distinguish two cases:
+
+* Ownership transferred for the duration of a call: in the following command:
+
+  ::
+
+    command void getSomething(uint16_t *value1, uint32_t *value2);
+
+  we are using pointers to return multiple results. The component
+  implementing getSomething MAY read/write ``*value1`` or ``*value2``
+  during the call and MUST NOT access these pointers after getSomething
+  returns.
+
+* Permanent ownership transfer: in the following split-phase interface:
+
+  ::
+
+    interface Send {
+      command void send(message_t *PASS msg);
+      event void sendDone(message_t *PASS msg);
+    }
+
+  components calling send or signaling ``sendDone`` relinquish ownership of
+  the message buffer. For example, take a program where component A uses
+  the ``Send`` interface and B provides it. If A calls ``send`` with a
+  pointer to ``message_t`` *x*, then ownership of *x* passes to B and A
+  MUST NOT access *x* while B MAY access *x*. Later, when B signals the
+  ``sendDone`` event with a pointer to *x* as parameter, ownership of *x*
+  returns to A and A MAY access *x*, while B MUST NOT access *x*.
+
+  If an interface with ``PASS`` parameters has a return type of
+  ``error_t``, then ownership is transferred iff the result is
+  ``SUCCESS``. For instance, in
+
+  ::
+
+    interface ESend {
+      command error_t esend(message_t *PASS msg);
+      event void esendDone(message_t *PASS msg, error_t sendResult);
+    }
+
+  ownership is transferred only if ``esend`` returns ``SUCCESS``, while
+  ownership is always transferred with ``esendDone``. This convention
+  matches the rule for signaling split-phase completion events discussed
+  above.
+
+  ``PASS`` is a do-nothing macro defined as follows:
+
+  ::
+
+    #define PASS
+  
+In the future, some tool may check that programs respect these ownership
+transfer rules.
+
+Usage of wiring annotations
+---------------------------
+
+TinyOS checks constraints on a program's wiring graph specified by
+annotations on a component's interfaces. Wiring constraints are specified
+by placing ``@atmostonce()``, ``@atleastonce()`` and ``@exactlyonce()``
+attributes on the relevant interfaces. For instance, writing
+
+::
+
+  module Fun {
+    provides interface Init @atleastonce();
+  ...
+
+ensures that programs using module ``Fun`` must wire its ``Init`` interface
+at least once.
+
+The ``@atleastonce()`` and ``@exactlyonce()`` annotations SHOULD be used
+sparingly, as they can easily prevent modularising subsystem
+implementations, which is undesirable. However, the ``@atleastonce()``
+annotation SHOULD be used on initialisation interfaces (typically, the
+``Init`` interface) in modules, to prevent the common bug of forgetting to
+wire initialisation code.
+
+
+Citations
+========================================================================
+
+.. [TEP_1] TEP 1
+   
+.. [TEP_2] TEP 2
+   
+.. [Doxygen] Doxygen 
+.. [Java_Coding_Convention] Java Coding Convention
+   
+.. [JavaDoc] JavaDoc 
+.. [nesdoc] nesdoc 
+
diff --git a/support/make/.cvsignore b/support/make/.cvsignore
new file mode 100644
index 00000000..4fee151f
--- /dev/null
+++ b/support/make/.cvsignore
@@ -0,0 +1 @@
+Makelocal
diff --git a/support/make/Makedefaults b/support/make/Makedefaults
new file mode 100644
index 00000000..bfb5ec08
--- /dev/null
+++ b/support/make/Makedefaults
@@ -0,0 +1,24 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+DEFAULT_LOCAL_GROUP ?= 0x7d
+OPTFLAGS ?= -Os
+NESC_FLAGS ?= -Wnesc-all
+GOALS += tos-ident-flags tos_image
+
+define DEFAULT_HELP
+
+ Welcome to the TinyOS make system!
+
+ You must specify one of the valid targets and possibly some combination of
+ the extra options.  Many targets have custom extras and extended help, so be
+ sure to try "make  help" to learn of all the available features.
+
+ Global extras:
+
+   docs    : compile additional nescdoc documentation
+   tinysec : compile with TinySec secure communication
+
+endef
+HELP += $(DEFAULT_HELP)
+
diff --git a/support/make/Makefile b/support/make/Makefile
new file mode 100644
index 00000000..9f6a61f2
--- /dev/null
+++ b/support/make/Makefile
@@ -0,0 +1 @@
+include Makerules
diff --git a/support/make/Makerules b/support/make/Makerules
new file mode 100644
index 00000000..8164f966
--- /dev/null
+++ b/support/make/Makerules
@@ -0,0 +1,188 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+# @author Cory Sharp 
+
+### --- This makefile requires GNU Make version 3.80 or newer.
+
+
+### ---
+### --- Prepare variables
+### ---
+
+#  Get TOSDIR from ncc if it isn't set already.
+ifndef TOSDIR
+TOSDIR := $(shell ncc -print-tosdir)
+endif
+
+#  Mung MAKERULES for Cygwin; see the warning below for more details.
+ifneq ($(findstring \,$(MAKERULES)),)
+MAKERULES := $(subst \,/,$(MAKERULES))
+define BACKSLASH_WARNING
+warning, MAKERULES contains backslashes.
+
+    The environment variable MAKERULES contains backslashes \'s.  This can
+    cause shell scripts including ones in this make system to fail in
+    strange ways.  I've changed those to forward slashes for you for this
+    build.  However, you are strongly encouraged to respecify MAKERULES as
+    either a standard unix-style path or as a mixed-style path where the
+    backslashes are replaced with forward slashes /'s.
+
+endef
+$(warning $(BACKSLASH_WARNING))
+endif
+
+#  Deduce TINYOS_MAKE_PATH, the path to this file, if it's not defined already.
+ifndef TINYOS_MAKE_PATH
+  ifdef MAKERULES
+    TINYOS_MAKE_PATH := $(dir $(MAKERULES))
+    TINYOS_MAKE_PATH := $(TINYOS_MAKE_PATH:%/=%)
+  else
+    TINYOS_MAKE_PATH := $(TOSDIR)/../support/make
+  endif
+endif
+
+#  Use a default Makelocal if it's not defined already.
+TINYOS_MAKELOCAL ?= $(TINYOS_MAKE_PATH)/Makelocal
+
+#  Use a default Makedefaults if it's not defined already.
+TINYOS_MAKEDEFAULTS ?= $(TINYOS_MAKE_PATH)/Makedefaults
+
+#  Allow users to specify additional directories to find TOSMake files.
+TOSMAKE_PATH += $(TINYOS_MAKE_PATH)
+
+#  Save makecmdgoals (a read only var) to goals so that we can modify it.
+GOALS += $(MAKECMDGOALS)
+
+#  Extract user options from goals of the form opt,arg, transform to opt=arg,
+#  and evaluate.  Then, reduce GOALS to have the args removed.
+OptRE := [,.]
+GoalOpts := $(shell perl -e 'print join " ", map {s{^(.*?)$(OptRE)}{\U$$1=};$$_} grep /$(OptRE)/, split /\s+/, "$(GOALS)";')
+GOALS := $(shell perl -e '$$_="$(GOALS)"; s{$(OptRE)\S*}{}g; print;')
+$(foreach opt,$(GoalOpts),$(eval $(opt)))
+
+
+### ---
+### --- Define make functions.
+### --- (Lord, this is ugly. I want a real scripting language so bad.)
+### ---
+### --- The functions a user will generally be interested in are
+### ---   TOSMake_include(file)
+### ---   TOSMake_include_platform(dir)
+### ---
+
+#  names(words)
+#    Produce option names, like junk from /path/to/junk.target.
+names = $(sort $(basename $(notdir $(1))))
+
+#  TOSMake_find(file_or_dir)
+#    Search for file_or_dir within TOSMAKE_PATH.  For the special case of
+#    initializing TOSMAKE_PATH itself, this function does not search 
+#    TOSMAKE_PATH if file_or_dir begins with +.
+sh_search = for a in $(TOSMAKE_PATH); do [ -e "$$a/$$n" ] && echo "$$a/$$n" && break; done
+TOSMake_find = $(if $(filter +%,$(1)),$(1:+%=%),$(shell n="$(1)"; $(sh_search)))
+
+#  TOSMake_makelist(dir,extension)
+#    Get a list of files with the given extension from a directory which MUST
+#    be a subdir under TOSMAKE_PATH.
+TOSMake_makelist = $(wildcard $(call TOSMake_find,$(1))/*.$(2))
+
+#  TOSMake_include(file)
+#    Include a makefile which MUST be in a dir or subdir under TOSMAKE_PATH.
+TOSMake_include = $(eval include $(call TOSMake_find,$(1)))
+
+#  TOSMake_extra_targets(name)
+#    Create a default make targets for a TOSMake extra full with its possible
+#    options afterward.
+define TOSMake_extra_targets
+$(subst :,%,$(1)): FORCE
+	@:
+endef
+
+#  TOSMake_include_dir(dir)
+#    Pull in .extras and .targets from a directory which MUST be a subdir
+#    under TOSMAKE_PATH.  Create default extra rules as necessary, etc.
+TOSMake_include_dir = $(eval $(call TOSMake_include_dir_define,$(1)))
+define TOSMake_include_dir_define
+$(eval NEW_EXTRAS := $(call TOSMake_makelist,$(1),extra))
+$(eval NEW_TARGETS := $(call TOSMake_makelist,$(1),target))
+$(eval VALID_EXTRAS += $(NEW_EXTRAS))
+$(eval VALID_TARGETS += $(NEW_TARGETS))
+$(eval EXTRAS = $(filter $(call names,$(VALID_EXTRAS)),$(GOALS)))
+$(eval TARGETS = $(filter $(call names,$(VALID_TARGETS)),$(GOALS)))
+$(eval OTHERS = $(filter-out $(EXTRAS) $(TARGETS),$(GOALS)))
+$(foreach file,$(NEW_EXTRAS) $(NEW_TARGETS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file))))
+endef
+
+#  TOSMake_include_platform(dir)
+#    Pull in a directory as a new TOSMake platform, which MUST be a subdir of
+#    TOSMAKE_PATH.  A platform directory must also have a .rules file, which
+#    is automatically evaluated.
+TOSMake_include_platform=$(eval $(call TOSMake_include_platform_define,$(1)))
+define TOSMake_include_platform_define
+$(call TOSMake_include_dir,$(1))
+$(call TOSMake_include,$(1)/$(1).rules)
+endef
+
+
+### ---
+### --- Include Makelocal and Makedefaults
+### ---
+
+#  Makelocal comes first to allow overriding Makedefaults.
+-include $(TINYOS_MAKELOCAL)
+-include $(TINYOS_MAKEDEFAULTS)
+
+#  Mark TOSMAKE_PATH with a + so that they're not searched for by TOSMake_find.
+$(foreach incdir,$(addprefix +,$(TOSMAKE_PATH)),$(call TOSMake_include_dir,$(incdir)))
+
+#  Make default rules for each extra with full argument
+$(foreach goal,$(MAKECMDGOALS),$(if $(filter-out $(TARGETS) help,$(goal)),$(eval $(call TOSMake_extra_targets,$(goal)))))
+
+
+### ---
+### --- Define USAGE, print help if necessary or requested, etc.
+### ---
+
+#  USAGE is printed out when help is requested.  Files other than this should
+#  add text to HELP, not USAGE.
+define USAGE
+
+
+Usage:  make  
+        make  help
+
+        Valid targets: $(call names,$(VALID_TARGETS))
+        Valid extras: $(call names,$(VALID_EXTRAS))
+$(HELP)
+
+endef
+
+#  If no target or an invalid target is specified, print usage.
+ifeq ($(TARGETS),)
+  ifeq ($(GOALS),)
+    $(error $(USAGE)Please specify a valid target)
+  else
+    $(error $(USAGE)ERROR, "$(GOALS)" does not specify a valid target)
+  endif
+endif
+
+#  If the user specifically had help on the command line, don't build any
+#  targets, instead display help information and exit with a nice error.
+ifeq ($(filter help,$(GOALS)),help)
+define USAGE
+
+
+Usage:  make $(TARGETS) 
+
+	Valid targets: $(call names,$(VALID_TARGETS))
+        Valid extras: $(call names,$(VALID_EXTRAS))
+$(HELP)
+
+endef
+$(error $(USAGE)Thank you)
+endif
+
+
+.PHONY: FORCE
+
diff --git a/support/make/README b/support/make/README
new file mode 100644
index 00000000..85a3990b
--- /dev/null
+++ b/support/make/README
@@ -0,0 +1,110 @@
+README for the TinyOS Make System
+created on 7 Jan 2004
+written by Cory Sharp 
+
+updated on 16 Apr 2004 by Cory Sharp
+To describe new TOSMAKE_INCLUDE variable for user make subdirectories.
+
+
+$Id$
+
+
+----------------------------------------------------------------------------
+Introduction
+----------------------------------------------------------------------------
+
+This is a new make system.  It's nicer than the old apps/Makerules,
+especially for adding new targets and platforms.  Basically, new features
+can be added without getting in the way of existing make platforms and
+rules.
+
+
+----------------------------------------------------------------------------
+Quick Start
+----------------------------------------------------------------------------
+
+To use this build system, GNU Make 3.80 or greater is required; check with
+"make --version".  Then, set MAKERULES, find an application, and try make
+
+export MAKERULES=`ncc -print-tosdir`/../tools/make/Makerules
+cd `ncc -print-tosdir`/../apps/Blink  #or any app dir
+make telos help
+
+The end of this document has a few notes on some issues that can arise with
+GNU Make 3.80.
+
+----------------------------------------------------------------------------
+Directory Structure and Naming Conventions
+----------------------------------------------------------------------------
+
+The root of the make system is the make/ directory in which this README is
+located.  You'll find two main types of files with the extensions .target
+and .extra.  Both types of files define valid make goals.  A target file
+must define a valid make target of the same name.  An extra file
+automatically has a dummy target created for it, making it useful for
+defining extra make variables given a particular goal on the command line.
+
+There are also subdirectories in make/, such as make/avr/ and make/hc08/.
+Files in these directories are not exposed to the current build unless
+imported from another goal.  For instance, the mica2 target imports the avr/
+directory with the command "$(call TOSMake_include_platform,avr)", which
+further exposes the target and extra files in the avr subdirectory as valid
+goals for the current build.  The TOSMake_include_platform function expects
+to find a .rules file of the same name as the directory, such as
+avr/avr.rules.
+
+It is expected that the primary build behavior occurs in a
+platform/platform.rules file (such as avr/avr.rules).  Further target and
+extra goals in that platform make directory should augment the behavior of
+the rules file.  Then, platform build targets are globally exposed by
+creating a simple .target file in the make/ root.  Overall, this structure
+gives a lot of opportunity to change the behavior of a build given goals on
+the command line with few or no ifdef's in the makefiles.  And, each make
+behavior is localized to a single file, which I think should be pretty nice.
+
+There's also a make/Makerules file.  Do not edit make/Makerules.  No new
+build features should ever be exposed via make/Makerules, but rather though
+the .rules, .target, and .extra files.  Let me repeat, do not edit
+make/Makerules, add new features elsewhere.  make/Makerules is the frontend
+that defines the structure and behavior on those special file extensions.
+
+
+----------------------------------------------------------------------------
+User make/ directories
+----------------------------------------------------------------------------
+
+I've added a new variable TOSMAKE_PATH that allows you to define additional
+root directories for the TinyOS Make System that behave just like the 
+primary make/ directory.  In one of your own make files, just add one or
+more directories to TOSMAKE_PATH sometime before make/Makerules is included:
+
+    TOSMAKE_PATH += $(TOSDIR)/../contrib/eyes/make
+
+That's all you need, and you're in business.  Enjoy.
+
+
+----------------------------------------------------------------------------
+make 3.80
+----------------------------------------------------------------------------
+
+The standard version of GNU Make 3.80 (based on October 2002 source) has
+a bug which this make system can trigger. If a make variable is longer than
+200 bytes (characters), then make will report that it has run out of
+virtual memory and exit. This can happen if, for example, your application
+depends on a lot of Java/mig message classes, which are BUILD_EXTRA_DEPS.
+
+The only way to fix this problem is to use a newer, patched version of
+make 3.80. All TinyOS releases after 1.1.8 should have a patched
+version, and will work properly. Pre-1.1.7 versions, however, may run
+into this problem; you can either upgrade to >= 1.1.8, or download the
+make source, apply the patch 'eval-crash.diff' in this directory, and
+compile then install the patched version.
+
+----------------------------------------------------------------------------
+Go go go
+----------------------------------------------------------------------------
+
+... okay, hopefully that's enough head's up that you can poke around this
+directory tree and add new targets, extras, and platforms.  Good luck, and
+holler if you want more documentation.
+
diff --git a/support/make/all.target b/support/make/all.target
new file mode 100644
index 00000000..f960c4a3
--- /dev/null
+++ b/support/make/all.target
@@ -0,0 +1,8 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORMS ?= mica mica2 mica2dot telos micaz pc
+
+all: FORCE
+	for target in $(filter-out $(INVALID_PLATFORMS),$(PLATFORMS)); do cmd="make $$target"; echo ".... $$cmd"; $$cmd; done
+
diff --git a/support/make/avr/avr.rules b/support/make/avr/avr.rules
new file mode 100644
index 00000000..581810ad
--- /dev/null
+++ b/support/make/avr/avr.rules
@@ -0,0 +1,108 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+define AVR_HELP
+
+ AVR extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+   xnp      : compile for network programming
+
+ Programmer options:
+
+   dapa         : (default) use parallel port programmer
+   mib510, : use MIB510 serial port programming board at port 
+   eprb,	: use EPRB at hostname 
+   avrisp, : use AVRISP serial programmer at port 
+
+   The dev or host parameter for the programmer option need not be specified,
+   in which case it is expected to be defined as in an environment variable of
+   the same name in all caps (such as MIB510, EPRB, or AVRISP).
+
+endef
+HELP += $(AVR_HELP)
+
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SET_ID = tos-set-symbols
+PROGRAMMER = uisp
+NCC = ncc
+LIBS = -lm
+
+AMADDR = ActiveMessageAddressC\$$addr
+BUILDDIR = build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_SREC = $(BUILDDIR)/main.srec
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),)
+VOLUMEFILE = volumes-at45db.xml
+
+PFLAGS += -Wall -Wshadow -DDEF_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+
+ifndef DEFAULT_PROGRAM
+DEFAULT_PROGRAM = dapa
+endif
+
+BUILDLESS_DEPS += bytes
+
+ifndef NOWIRING
+include $(TINYOS_MAKE_PATH)/wiring.extra
+endif
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,avr/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUMEFILE)), )
+exe0: $(BUILDDIR)/StorageVolumes.h
+
+$(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE)
+	tos-storage-at45db <$(VOLUMEFILE) >$@
+
+PFLAGS += -I$(BUILDDIR)
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_SREC) $(INSTALL_SREC); else cmd $(SET_ID) $(MAIN_SREC) $(INSTALL_SREC) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID) ; fi
+
+delsetid: FORCE
+	rm -f $(subst .srec.,.exe.,$(INSTALL_SREC)) $(INSTALL_SREC) 
+
+srec: exe FORCE
+	$(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC)
+
+tosimage: ihex build_tosimage FORCE
+	@:
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@objdump -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/avr/avrisp.extra b/support/make/avr/avrisp.extra
new file mode 100644
index 00000000..559ca060
--- /dev/null
+++ b/support/make/avr/avrisp.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+ifeq ($(AVRISP),)
+$(error AVRISP must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = avrisp
+PROGRAMMER_FLAGS=-dprog=stk500 -dserial=$(AVRISP) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS_AVRISP)
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using avrisp"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --erase --upload if=$(INSTALL_SREC)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using avrisp"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --upload if=$(BOOTLOADER)
\ No newline at end of file
diff --git a/support/make/avr/dapa.extra b/support/make/avr/dapa.extra
new file mode 100644
index 00000000..54b982b2
--- /dev/null
+++ b/support/make/avr/dapa.extra
@@ -0,0 +1,19 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PROGRAM = dapa
+PROGRAMMER_FLAGS = -dprog=dapa --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS)
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary with dapa"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --erase 
+	sleep 1	     
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --upload if=$(INSTALL_SREC)
+	sleep 1	     
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --verify if=$(INSTALL_SREC)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader with dapa"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --upload if=$(BOOTLOADER)
+	sleep 1	     
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --verify if=$(BOOTLOADER)
diff --git a/support/make/avr/debug.extra b/support/make/avr/debug.extra
new file mode 100644
index 00000000..ac835cc2
--- /dev/null
+++ b/support/make/avr/debug.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS += -O1 -g -fnesc-no-inline
+
diff --git a/support/make/avr/debugopt.extra b/support/make/avr/debugopt.extra
new file mode 100644
index 00000000..df0b6355
--- /dev/null
+++ b/support/make/avr/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS += -g
+
diff --git a/support/make/avr/eprb.extra b/support/make/avr/eprb.extra
new file mode 100644
index 00000000..3dcd4b7f
--- /dev/null
+++ b/support/make/avr/eprb.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+ifeq ($(EPRB),)
+$(error EPRB must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = eprb
+PROGRAMMER_FLAGS = -dprog=stk500 -dhost=$(EPRB) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS_STK)
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using eprb"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --erase --upload if=$(INSTALL_SREC)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using eprb"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --upload if=$(BOOTLOADER)
diff --git a/support/make/avr/install.extra b/support/make/avr/install.extra
new file mode 100644
index 00000000..c212cbea
--- /dev/null
+++ b/support/make/avr/install.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(INSTALL)
+BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) setid program delsetid
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    BUILD_DEPS += program_bl
+  endif
+endif
diff --git a/support/make/avr/mib510.extra b/support/make/avr/mib510.extra
new file mode 100644
index 00000000..6b818927
--- /dev/null
+++ b/support/make/avr/mib510.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+ifeq ($(MIB510),)
+$(error MIB510 must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = mib510
+PROGRAMMER_FLAGS = -dprog=mib510 -dserial=$(MIB510) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS_MIB)
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using mib510"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --erase --upload if=$(INSTALL_SREC)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using mib510"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) --upload if=$(BOOTLOADER)
\ No newline at end of file
diff --git a/support/make/avr/reinstall.extra b/support/make/avr/reinstall.extra
new file mode 100644
index 00000000..1c8748f1
--- /dev/null
+++ b/support/make/avr/reinstall.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program delsetid
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    BUILD_DEPS += program_bl
+  endif
+endif
diff --git a/support/make/avr/reset.target b/support/make/avr/reset.target
new file mode 100644
index 00000000..7a17f181
--- /dev/null
+++ b/support/make/avr/reset.target
@@ -0,0 +1,10 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+BUILD_DEPS = harmless
+
+reset: FORCE
+	@echo "    resetting $(PLATFORM)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS)
+
+harmless:
diff --git a/support/make/avr/xnp.extra b/support/make/avr/xnp.extra
new file mode 100644
index 00000000..f1543bc0
--- /dev/null
+++ b/support/make/avr/xnp.extra
@@ -0,0 +1,9 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+# This is for network reprogramming
+# If XNP is an extra, add the network reprogramming related files
+# to the search path and generate a timestamp to make each build unique.
+XNP_DIR := $(TOSDIR)/lib/Xnp
+PFLAGS := -I$(XNP_DIR) $(shell $(XNP_DIR)/ident.pl .ident_install_id $(COMPONENT)) $(PFLAGS)
+
diff --git a/support/make/btnode3.target b/support/make/btnode3.target
new file mode 100644
index 00000000..6908815e
--- /dev/null
+++ b/support/make/btnode3.target
@@ -0,0 +1,27 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM ?= btnode3
+SENSORBOARD ?= micasb
+PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+PFLAGS += -finline-limit=100000
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    PFLAGS += -I%T/lib/Deluge
+    PFLAGS += -I%T/lib/Deluge/TOSBoot/include
+    BOOTLOADER ?= $(TOSDIR)/lib/Deluge/TOSBoot/bl_mica2.srec
+    AVR_FUSE_H ?= 0xd8
+  endif
+  ifeq ($(TINYOS_NP),XNP)
+    BOOTLOADER ?= $(XNP_DIR)/inpispm2.srec
+  endif
+endif
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+btnode3: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/clean.target b/support/make/clean.target
new file mode 100644
index 00000000..9d6d9510
--- /dev/null
+++ b/support/make/clean.target
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+clean: FORCE
+	rm -rf build $(CLEAN_EXTRA)
+	rm -rf _TOSSIMmodule.so TOSSIM.pyc TOSSIM.py
diff --git a/support/make/docs.extra b/support/make/docs.extra
new file mode 100644
index 00000000..76738227
--- /dev/null
+++ b/support/make/docs.extra
@@ -0,0 +1,35 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+# configure the base for the app dirs.  This is used to generate more
+# useful package names in the documentation.
+ifeq ($(BASEDIR)_x, _x)
+BASEDIR := $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+endif
+
+# The output directory for generated documentation
+ifeq ($(DOCDIR)_x, _x)
+DOCDIR := $(BASEDIR)/doc/nesdoc
+endif
+
+COMMA=,
+DOCS := $(subst $(COMMA), ,$(subst ., ,$(DOCS)))
+
+ifeq ($(filter here,$(DOCS)),here)
+DOCDIR = doc
+endif
+
+ifeq ($(filter preserve,$(DOCS)),preserve)
+PFLAGS += -preserve
+endif
+
+BUILD_DEPS = docs_
+
+docs_: FORCE
+	@echo "    Making documentation for $(COMPONENT) on $(PLATFORM)"
+        # first generate the xml files
+	nesdoc -o $(DOCDIR) $(NESDOC_FLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc
+ifneq ($(filter nohtml,$(DOCS)),nohtml)
+        # generate html from the xml files
+	nesdoc -o $(DOCDIR) -html -target=$(PLATFORM) $(DOCS)
+endif
diff --git a/support/make/eval-crash.diff b/support/make/eval-crash.diff
new file mode 100644
index 00000000..3c18a0be
--- /dev/null
+++ b/support/make/eval-crash.diff
@@ -0,0 +1,77 @@
+Index: variable.h
+===================================================================
+RCS file: /cvsroot/make/make/variable.h,v
+retrieving revision 1.24
+diff -u -B -b -r1.24 variable.h
+--- variable.h	8 Aug 2002 00:11:19 -0000	1.24
++++ variable.h	25 Oct 2002 21:37:32 -0000
+@@ -107,6 +107,8 @@
+ extern char *expand_argument PARAMS ((char *str, char *end));
+ extern char *variable_expand_string PARAMS ((char *line, char *string,
+                                              long length));
++extern void install_variable_buffer PARAMS ((char **bufp, unsigned int *lenp));
++extern void restore_variable_buffer PARAMS ((char *buf, unsigned int len));
+ 
+ /* function.c */
+ extern int handle_function PARAMS ((char **op, char **stringp));
+Index: expand.c
+===================================================================
+RCS file: /cvsroot/make/make/expand.c,v
+retrieving revision 1.33
+diff -u -B -b -r1.33 expand.c
+--- expand.c	14 Oct 2002 21:54:04 -0000	1.33
++++ expand.c	25 Oct 2002 21:37:32 -0000
+@@ -545,3 +545,28 @@
+ 
+   return value;
+ }
++
++/* Install a new variable_buffer context, returning the current one for
++   safe-keeping.  */
++
++void
++install_variable_buffer (char **bufp, unsigned int *lenp)
++{
++  *bufp = variable_buffer;
++  *lenp = variable_buffer_length;
++
++  variable_buffer = 0;
++  initialize_variable_output ();
++}
++
++/* Restore a previously-saved variable_buffer setting (free the current one).
++ */
++
++void
++restore_variable_buffer (char *buf, unsigned int len)
++{
++  free (variable_buffer);
++
++  variable_buffer = buf;
++  variable_buffer_length = len;
++}
+Index: function.c
+===================================================================
+RCS file: /cvsroot/make/make/function.c,v
+retrieving revision 1.71
+diff -u -B -b -r1.71 function.c
+--- function.c	14 Oct 2002 21:54:04 -0000	1.71
++++ function.c	25 Oct 2002 21:37:32 -0000
+@@ -1196,7 +1196,17 @@
+ static char *
+ func_eval (char *o, char **argv, const char *funcname)
+ {
++  char *buf;
++  unsigned int len;
++
++  /* Eval the buffer.  Pop the current variable buffer setting so that the
++     eval'd code can use its own without conflicting.  */
++
++  install_variable_buffer (&buf, &len);
++
+   eval_buffer (argv[0]);
++
++  restore_variable_buffer (buf, len);
+ 
+   return o;
+ }
diff --git a/support/make/eyesIFX.target b/support/make/eyesIFX.target
new file mode 100644
index 00000000..6e33f8b6
--- /dev/null
+++ b/support/make/eyesIFX.target
@@ -0,0 +1,12 @@
+EYES_IFX_VER ?= v2
+
+ifeq ($(EYES_IFX_VER),v2)
+  EYES_IFX_TARGET = eyesIFXv2.target
+else
+  EYES_IFX_TARGET = eyesIFXv1.target
+endif
+
+$(call TOSMake_include,$(EYES_IFX_TARGET))
+
+eyesIFX: $(BUILD_DEPS)
+    @:
diff --git a/support/make/eyesIFXv1.target b/support/make/eyesIFXv1.target
new file mode 100644
index 00000000..60b72f5d
--- /dev/null
+++ b/support/make/eyesIFXv1.target
@@ -0,0 +1,21 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = eyesIFXv1
+
+MSP_MCU = msp430x149
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+ifndef DEFAULT_PROGRAM
+DEFAULT_PROGRAM = jtag
+endif
+
+NESC_FLAGS:=-Wnesc-all
+
+$(call TOSMake_include_platform,msp)
+
+eyesIFXv1: $(BUILD_DEPS)
+    @:
diff --git a/support/make/eyesIFXv2.target b/support/make/eyesIFXv2.target
new file mode 100644
index 00000000..c87abc3f
--- /dev/null
+++ b/support/make/eyesIFXv2.target
@@ -0,0 +1,29 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = eyesIFXv2
+
+MSP_MCU = msp430x1611
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+ifndef DEFAULT_PROGRAM
+DEFAULT_PROGRAM = bsl
+endif
+
+MSP_BSL_FLAGS ?= --invert-test --invert-reset --f1x
+BSL?=/dev/ttyUSB1
+ifeq (,$(findstring /dev/ttyUSB,$(BSL)))
+  ifneq (,$(findstring USB,$(BSL)))
+    BSL:=/dev/tty$(BSL)
+  endif
+endif
+
+NESC_FLAGS:=-Wnesc-all -mdisable-hwmul
+
+$(call TOSMake_include_platform,msp)
+
+eyesIFXv2: $(BUILD_DEPS)
+    @:
diff --git a/support/make/ident_flags.extra b/support/make/ident_flags.extra
new file mode 100644
index 00000000..17d9147f
--- /dev/null
+++ b/support/make/ident_flags.extra
@@ -0,0 +1,14 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+IDENT_PL ?= tos-ident-flags
+IDENT_PROGRAM_NAME ?= $(COMPONENT)
+IDENT_FLAGS := $(shell $(IDENT_PL) "$(IDENT_PROGRAM_NAME)")
+
+CFLAGS += $(IDENT_FLAGS)
+
+BUILD_EXTRA_DEPS += ident_cache
+
+ident_cache: FORCE
+	@echo '$(IDENT_FLAGS)' > $(BUILDDIR)/ident_flags.txt
+
diff --git a/support/make/intelmote2.target b/support/make/intelmote2.target
new file mode 100644
index 00000000..a5df1667
--- /dev/null
+++ b/support/make/intelmote2.target
@@ -0,0 +1,18 @@
+#-*-Makefile-*- vim:syntax=make
+
+PLATFORM = intelmote2
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+#ASSEMBLY_FILES += $(PLATFORM_DIR)/../imote2/flash.s $(PLATFORM_DIR)/../imote2/binarymover.s
+ASSEMBLY_FILES += $(TOSDIR)/platforms/intelmote2/toscrt0.s $(TOSDIR)/chips/pxa27x/pxa27x_util.s
+CFLAGS += -DPXA27X_13M -T$(TOSDIR)/platforms/intelmote2/tos.x 
+
+$(call TOSMake_include_platform,pxa27x)
+
+intelmote2: $(BUILD_DEPS)
+	@:
+
+
diff --git a/support/make/mica2.target b/support/make/mica2.target
new file mode 100644
index 00000000..a5e06f59
--- /dev/null
+++ b/support/make/mica2.target
@@ -0,0 +1,15 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = mica2
+SENSORBOARD ?= micasb
+PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+PFLAGS += -finline-limit=100000
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+mica2: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/mica2dot.target b/support/make/mica2dot.target
new file mode 100644
index 00000000..5b43738f
--- /dev/null
+++ b/support/make/mica2dot.target
@@ -0,0 +1,14 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = mica2dot
+PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+PFLAGS += -finline-limit=100000
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+mica2dot: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/micaz.target b/support/make/micaz.target
new file mode 100644
index 00000000..677f5118
--- /dev/null
+++ b/support/make/micaz.target
@@ -0,0 +1,15 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = micaz
+SENSORBOARD ?= micasb
+PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+PFLAGS += -finline-limit=100000
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+micaz: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/msp/bsl.extra b/support/make/msp/bsl.extra
new file mode 100644
index 00000000..747e15f3
--- /dev/null
+++ b/support/make/msp/bsl.extra
@@ -0,0 +1,58 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+# BSL arguments:
+#
+#   bsl,
+#     install onto the given port name
+#
+#   bsl,auto
+#     uses motelist to install onto the first listed mote
+#
+#   bsl,ref,
+#      uses motelist to install onto the mote with the given reference number
+
+PROGRAM = bsl
+
+MSP_BSL ?= msp430-bsl
+# BSL is the comm port, can be specified as "bsl,2" when making
+BSL ?= auto
+MSP_BSL_FLAGS ?= --telos
+
+ifeq ($(BSL),auto)
+BSLTEST = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+))/; print $$1;' )
+BSLTEST_COMMENT = "using bsl,auto"
+BSL = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+))/; ($$s,$$n)=($$1,$$2); if($$s=~/^com/i) { print $$n-1 } else { print $$s; };' )
+BSL_TARGETS += bsltest
+else
+ifeq ($(BSL:ref,%=ref),ref)
+BSLREF := $(BSL:ref,%=%)
+BSLTEST_COMMENT = "using bsl,ref,$(BSLREF)"
+BSLTEST := $(shell motelist -c | perl -e '$$r=shift; while(<>) { if(/^$$r,([^,]+)/) { print $$1; exit; } }' $(BSLREF))
+BSL = $(BSLTEST)
+BSL_TARGETS += bsltest
+endif
+endif
+
+# bsltest is a separate rule so that make doesn't resolve BSL along with
+# BSLTEST, which saves an invocation of motelist.  It also avoids the test
+# all together if bsl,auto was not specified (whew).
+bsltest: FORCE
+	@N=$(BSLTEST); [ x$$N = x ] && echo "    found no motes ($(BSLTEST_COMMENT))" && exit 1 || echo "    found mote on $$N ($(BSLTEST_COMMENT))"
+
+program: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) binary using bsl"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(INSTALL_IHEX)
+	rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) 
+
+program_no_e: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) binary using bsl (without mass erase)"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -I -p $(INSTALL_IHEX)
+	rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) 
+
+program_bl: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) bootloader using bsl"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(BOOTLOADER)
+
+program_input: ihex
+	@:
diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra
new file mode 100644
index 00000000..88fb87e9
--- /dev/null
+++ b/support/make/msp/debug.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS = -O1 -g -fnesc-no-inline
+
diff --git a/support/make/msp/debugopt.extra b/support/make/msp/debugopt.extra
new file mode 100644
index 00000000..df0b6355
--- /dev/null
+++ b/support/make/msp/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS += -g
+
diff --git a/support/make/msp/install.extra b/support/make/msp/install.extra
new file mode 100644
index 00000000..91ef45fc
--- /dev/null
+++ b/support/make/msp/install.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(INSTALL)
+BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) bytes setid program 
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) setid program_bl program_no_e 
+  endif
+endif
diff --git a/support/make/msp/jtag.extra b/support/make/msp/jtag.extra
new file mode 100644
index 00000000..35355ccd
--- /dev/null
+++ b/support/make/msp/jtag.extra
@@ -0,0 +1,24 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PROGRAM = jtag
+
+ifndef MSP_JTAG
+MSP_JTAG = msp430-jtag
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using the parallel port jtag adapter"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -Iepr $(INSTALL_IHEX)
+
+program_no_e: FORCE
+	@echo "    installing $(PLATFORM) binary using jtag (without mass erase)"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -I -p $(INSTALL_IHEX)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using jtag"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -e -I -p $(BOOTLOADER)
+
+program_input: ihex
+	@:
+
diff --git a/support/make/msp/msp.rules b/support/make/msp/msp.rules
new file mode 100644
index 00000000..b031e674
--- /dev/null
+++ b/support/make/msp/msp.rules
@@ -0,0 +1,97 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+define MSP_HELP
+
+ MSP extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+   xnp      : compile for network programming
+
+ Programmer options:
+
+   bsl,auto      : (default) use BSL programmer on the first mote found
+   bsl,    : use BSL programmer on  serial port
+   bsl,ref, : use BSL programmer on the mote with reference 
+
+   The dev or host parameter for the programmer option need not be specified,
+   in which case it is expected to be defined as in an environment variable of
+   the same name in all caps (such as BSL).
+
+endef
+HELP += $(MSP_HELP)
+
+#MSP_NESC_TARGET ?= msp430
+#MSP_GCC ?= msp430-gcc
+#MSP_MCU ?= msp430x149
+#PFLAGS += -fnesc-target=$(MSP_NESC_TARGET) -gcc=$(MSP_GCC) -mmcu=$(MSP_MCU)
+
+OBJCOPY = msp430-objcopy
+OBJDUMP = msp430-objdump
+SET_ID = tos-set-symbols
+NCC = ncc
+LIBS = -lm
+
+AMADDR = ActiveMessageAddressC\$$addr
+BUILDDIR = build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_IHEX = $(MAIN_IHEX).out$(if $(NODEID),-$(NODEID),)
+
+PFLAGS += -Wall -Wshadow -DDEF_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+
+DEFAULT_PROGRAM ?= bsl
+
+BUILDLESS_DEPS += bytes
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,msp/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUME_FILE)), )
+exe0: $(BUILDDIR)/StorageVolumes.h
+
+$(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE)
+	$(VOLUME_ALLOCATOR) <$(VOLUME_FILE) >$@
+
+PFLAGS += -I$(BUILDDIR)
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_IHEX) $(INSTALL_IHEX); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target ihex $(MAIN_IHEX) $(INSTALL_IHEX) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi
+
+tosimage: ihex build_tosimage FORCE
+	@:
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@objdump -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/msp/reinstall.extra b/support/make/msp/reinstall.extra
new file mode 100644
index 00000000..cf0d9d87
--- /dev/null
+++ b/support/make/msp/reinstall.extra
@@ -0,0 +1,14 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    BUILD_DEPS = setid program_bl program_no_e
+  endif
+endif
+
+check_bnp: FORCE
+	@perl -e 'exit 0 if (<> =~ /^\:103000/); print "\nERROR: Trying to install with BNP support.\n       main.ihex was not built properly, please recompile.\n\n"; exit 1;' $(INSTALL_IHEX)
diff --git a/support/make/nowiring.extra b/support/make/nowiring.extra
new file mode 100644
index 00000000..e229134f
--- /dev/null
+++ b/support/make/nowiring.extra
@@ -0,0 +1,3 @@
+#-*-Makefile-*- vim:syntax=make
+
+NOWIRING=1
diff --git a/support/make/null.target b/support/make/null.target
new file mode 100644
index 00000000..e63d374f
--- /dev/null
+++ b/support/make/null.target
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM = null
+PFLAGS += -finline-limit=100000
+
+$(call TOSMake_include_platform,null)
+
+null: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/null/debug.extra b/support/make/null/debug.extra
new file mode 100644
index 00000000..f7310527
--- /dev/null
+++ b/support/make/null/debug.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS += -O1 -g -fnesc-no-inline
diff --git a/support/make/null/null.rules b/support/make/null/null.rules
new file mode 100644
index 00000000..1fe3f3b7
--- /dev/null
+++ b/support/make/null/null.rules
@@ -0,0 +1,63 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+define NULL_HELP
+
+ NULL extras:
+
+   debug    : compile with minimal optimization and debug symbols
+
+endef
+HELP += $(NULL_HELP)
+
+OBJCOPY = objcopy
+OBJDUMP = objdump
+NCC = ncc
+LIBS = -lm
+
+BUILDDIR = build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_SREC = $(BUILDDIR)/main.srec
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),)
+VOLUMEFILE = volumes-at45db.xml
+
+PFLAGS += -Wall -Wshadow -DDEF_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+
+BUILDLESS_DEPS += bytes
+
+# Build storage file if volumes.xml present
+# We "steal" the at45db storage spec
+ifneq ($(wildcard $(VOLUMEFILE)), )
+exe0: $(BUILDDIR)/StorageVolumes.h
+
+$(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE)
+	tos-storage-at45db <$(VOLUMEFILE) >$@
+
+PFLAGS += -I$(BUILDDIR)
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = exe bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@objdump -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/pxa27x/debug.extra b/support/make/pxa27x/debug.extra
new file mode 100644
index 00000000..04c2d768
--- /dev/null
+++ b/support/make/pxa27x/debug.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+#OPTFLAGS = -O1 -g -fnesc-no-inline
+OPTFLAGS = -g -fnesc-no-inline
+
diff --git a/support/make/pxa27x/debugopt.extra b/support/make/pxa27x/debugopt.extra
new file mode 100644
index 00000000..650c3a68
--- /dev/null
+++ b/support/make/pxa27x/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+OPTFLAGS += -O3 -g
+
diff --git a/support/make/pxa27x/install.extra b/support/make/pxa27x/install.extra
new file mode 100644
index 00000000..dd887eaa
--- /dev/null
+++ b/support/make/pxa27x/install.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(INSTALL)
+BUILD_DEPS = bin bytes setid program
+
diff --git a/support/make/pxa27x/jflashmm.extra b/support/make/pxa27x/jflashmm.extra
new file mode 100644
index 00000000..dbe36885
--- /dev/null
+++ b/support/make/pxa27x/jflashmm.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PROGRAM = jflashmm
+
+PROGRAMMER ?= jflashmm.exe
+PROGRAMMER_FLAGS = ""
+PXA27X_JTAG_DEV ?= "JTAG CPU"
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(INSTALL_BIN)
+
+
+program_input: bin
+	@:
+
diff --git a/support/make/pxa27x/pxa27x.rules b/support/make/pxa27x/pxa27x.rules
new file mode 100644
index 00000000..11b08f1f
--- /dev/null
+++ b/support/make/pxa27x/pxa27x.rules
@@ -0,0 +1,86 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+define PXA27X_HELP
+
+ PXA27x extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+
+ Programmer extras:
+
+   jflashmm : (default) use the Intel JFLASHMM tool to install
+   xflash   : Use the Intel XFLASH tool to install
+
+endef
+HELP += $(PXA27X_HELP)
+
+GAS = xscale-elf-gcc -c # This ensures .c and .s compiled object are compatible
+OBJCOPY = xscale-elf-objcopy 
+OBJDUMP = xscale-elf-objdump
+SET_ID = tos-set-symbols
+XDB_SYMBOL_EXTRACT = dwarf2bd
+NCC = ncc
+LIBS = -lm
+
+AMADDR = ActiveMessageAddressC\$$addr
+BUILDDIR = build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_BIN = $(BUILDDIR)/main.bin
+INSTALL_BIN = $(MAIN_BIN).out$(if $(NODEID),-$(NODEID),)
+#PLATFORM_DIR = $(TOSDIR)/chips/pxa27x
+#ASSEMBLY_FILES += $(PLATFORM_DIR)/mmu_table.s $(PLATFORM_DIR)/util.s 
+ASSEMBLY_OBJS =  $(BUILDDIR)/asms.o
+#LIBRARY_OBJS  =  $(PLATFORM_DIR)/lib/profile.o $(PLATFORM_DIR)/lib/queue.o
+
+OPTFLAGS ?= -O3 -g
+PFLAGS += -Wall -Wshadow -DDEF_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP) $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+
+DEFAULT_PROGRAM ?= xflash
+
+BUILDLESS_DEPS += bytes
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,pxa27x/$(DEFAULT_PROGRAM).extra))
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = bin bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(INSTALL_BIN); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target binary $(MAIN_EXE) $(INSTALL_BIN) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi
+
+
+bin: exe FORCE
+	$(XDB_SYMBOL_EXTRACT) $(MAIN_EXE)
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir asms $(BUILD_EXTRA_DEPS) FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) $(ASSEMBLY_OBJS) $(LIBRARY_OBJS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@objdump -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
+asms: 
+	$(GAS) $(ASSEMBLY_FILES) -o $(BUILDDIR)/asms.o 
+
+library:
+	cd $(PLATFORM_DIR)/lib; make;
diff --git a/support/make/pxa27x/reinstall.extra b/support/make/pxa27x/reinstall.extra
new file mode 100644
index 00000000..09aa992f
--- /dev/null
+++ b/support/make/pxa27x/reinstall.extra
@@ -0,0 +1,7 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program
+
+
diff --git a/support/make/pxa27x/xflash.extra b/support/make/pxa27x/xflash.extra
new file mode 100644
index 00000000..8f003e79
--- /dev/null
+++ b/support/make/pxa27x/xflash.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PROGRAM = xflash
+
+PROGRAMMER ?= c:/nordheim/xflash/xflash.exe
+PROGRAMMER_FLAGS = -p imote2
+
+PXA27X_JTAG_DEV ?= "JTAG CPU"
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM) with the $(PXA27X_JTAG_DEV)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) -tt $(PXA27X_JTAG_DEV) $(INSTALL_BIN)
+
+program_input: bin
+	@:
+
diff --git a/support/make/sim-cygwin.extra b/support/make/sim-cygwin.extra
new file mode 100644
index 00000000..d4ef7813
--- /dev/null
+++ b/support/make/sim-cygwin.extra
@@ -0,0 +1,42 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O0
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)  
+WFLAGS = -Wno-nesc-data-race
+
+BUILDDIR   = simbuild/$(PLATFORM)
+CFILE    = $(BUILDDIR)/sim.c
+OBJFILE    = $(BUILDDIR)/sim.o
+CXXFILE    = $(TOSDIR)/lib/tossim/tossim.c
+CXXOBJFILE = $(BUILDDIR)/tossim.o
+PYFILE     = $(TOSDIR)/lib/tossim/tossim_wrap.cxx
+PYOBJFILE  = $(BUILDDIR)/pytossim.o
+PYDIR      =/usr/include/python2.3
+SIMDIR     =$(TOSDIR)/lib/tossim
+XML        = app.xml
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c -DUSE_DL_IMPORT -fpic -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support into pytossim.o and tossim.o"
+	$(GPP) -c -DUSE_DL_IMPORT -shared -fpic -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c -DUSE_DL_IMPORT -shared -fpic -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	@echo "  linking into shared object ./_TOSSIM.dll"
+	$(GPP) -fpic -shared -W1,--enable-auto-image-base  $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) -L/usr/lib/python2.3/config -lpython2.3 -lstdc++ -o _TOSSIM.dll
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(TOSDIR)/lib/tossim/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library. "
+
diff --git a/support/make/sim-fast.extra b/support/make/sim-fast.extra
new file mode 100644
index 00000000..5912fa51
--- /dev/null
+++ b/support/make/sim-fast.extra
@@ -0,0 +1,64 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O3
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)   -DTOSSIM_NO_DEBUG
+WFLAGS = -Wno-nesc-data-race
+PYTHON_VERSION=2.3
+
+BUILDDIR   = simbuild/$(PLATFORM)
+CFILE    = $(BUILDDIR)/sim.c
+OBJFILE    = $(BUILDDIR)/sim.o
+CXXFILE    = $(TOSDIR)/lib/tossim/tossim.c
+CXXOBJFILE = $(BUILDDIR)/tossim.o
+PYFILE     = $(TOSDIR)/lib/tossim/tossim_wrap.cxx
+PYOBJFILE  = $(BUILDDIR)/pytossim.o
+PYDIR      =/usr/include/python$(PYTHON_VERSION)
+SIMDIR     =$(TOSDIR)/lib/tossim
+XML        = app.xml
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+
+ifeq ($(OSTYPE), cygwin)
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(OSTYPE), darwin) 
+  PLATFORM_FLAGS=-fPIC
+  PLATFORM_CC_FLAGS=-bundle
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_BUILD_FLAGS=-flat_namespace -undefined supress 
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+else # linux
+  PLATFORM_FLAGS=-shared -fPIC
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+  PLATFORM_BUILD_FLAGS= -shared -fPIC
+endif
+endif
+ 
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support into pytossim.o and tossim.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	@echo "  linking into shared object ./$(SHARED_OBJECT)"
+	$(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT)
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(TOSDIR)/lib/tossim/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library. "
+
diff --git a/support/make/sim.extra b/support/make/sim.extra
new file mode 100644
index 00000000..050b2544
--- /dev/null
+++ b/support/make/sim.extra
@@ -0,0 +1,64 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O0
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)  
+WFLAGS = -Wno-nesc-data-race
+PYTHON_VERSION=2.3
+
+BUILDDIR   = simbuild/$(PLATFORM)
+CFILE    = $(BUILDDIR)/sim.c
+OBJFILE    = $(BUILDDIR)/sim.o
+CXXFILE    = $(TOSDIR)/lib/tossim/tossim.c
+CXXOBJFILE = $(BUILDDIR)/tossim.o
+PYFILE     = $(TOSDIR)/lib/tossim/tossim_wrap.cxx
+PYOBJFILE  = $(BUILDDIR)/pytossim.o
+PYDIR      =/usr/include/python$(PYTHON_VERSION)
+SIMDIR     =$(TOSDIR)/lib/tossim
+XML        = app.xml
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+
+ifeq ($(OSTYPE), cygwin)
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(OSTYPE), darwin) 
+  PLATFORM_FLAGS=-fPIC
+  PLATFORM_CC_FLAGS=-bundle
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_BUILD_FLAGS=-flat_namespace -undefined supress 
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+else # linux
+  PLATFORM_FLAGS=-shared -fPIC
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+  PLATFORM_BUILD_FLAGS= -shared -fPIC
+endif
+endif
+ 
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support into pytossim.o and tossim.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	@echo "  linking into shared object ./$(SHARED_OBJECT)"
+	$(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT)
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(TOSDIR)/lib/tossim/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library. "
+
diff --git a/support/make/telos.target b/support/make/telos.target
new file mode 100644
index 00000000..9f11ea0c
--- /dev/null
+++ b/support/make/telos.target
@@ -0,0 +1,13 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+TELOS_REV ?= A
+
+ifeq ($(TELOS_REV),A)
+  TELOS_TARGET = telosa.target
+else
+  TELOS_TARGET = telosb.target
+endif
+
+$(call TOSMake_include,$(TELOS_TARGET))
+
diff --git a/support/make/telosa.target b/support/make/telosa.target
new file mode 100644
index 00000000..d78daed1
--- /dev/null
+++ b/support/make/telosa.target
@@ -0,0 +1,25 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM ?= telosa
+
+MSP_MCU = msp430x149
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+telos: $(BUILD_DEPS)
+	@:
+
+telosa: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/telosb.target b/support/make/telosb.target
new file mode 100644
index 00000000..ecaa5712
--- /dev/null
+++ b/support/make/telosb.target
@@ -0,0 +1,28 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+PLATFORM ?= telosb
+
+#MSP_MCU = msp430x1611
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --telosb
+
+VOLUME_FILE = volumes-stm25p.xml
+VOLUME_ALLOCATOR = tos-storage-stm25p
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+telos: $(BUILD_DEPS)
+	@:
+
+telosb: $(BUILD_DEPS)
+	@:
diff --git a/support/make/tinynode.target b/support/make/tinynode.target
new file mode 100644
index 00000000..6253b3ab
--- /dev/null
+++ b/support/make/tinynode.target
@@ -0,0 +1,31 @@
+#-*-Makefile-*- 
+#$Id$
+
+PLATFORM = tinynode
+
+ifndef TOSDIR
+TOSDIR := $(shell ncc -print-tosdir)
+endif
+
+ifndef TOS_BETADIR
+TOS_BETADIR := $(TOSDIR)/../beta/tos
+endif
+
+MSP_BSL ?= tos-bsl
+
+OPTFLAGS += -Os
+#OPTFLAGS = 
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+PFLAGS += -mstrict-align
+
+PFLAGS += \
+-I$(TOS_BETADIR)/platforms/tinynode
+
+$(call TOSMake_include_platform,tinynode)
+$(call TOSMake_include_platform,msp)
+
+tinynode: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/tinynode/bsl.extra b/support/make/tinynode/bsl.extra
new file mode 100644
index 00000000..d2ff8b0b
--- /dev/null
+++ b/support/make/tinynode/bsl.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+MSP_BSL_FLAGS += --invert-reset
+
diff --git a/support/make/tinynode/digi.extra b/support/make/tinynode/digi.extra
new file mode 100644
index 00000000..f8cd17d9
--- /dev/null
+++ b/support/make/tinynode/digi.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+MSP_BSL_FLAGS = --slow --invert-test
+
diff --git a/support/make/tinynode/flash.gdb.in b/support/make/tinynode/flash.gdb.in
new file mode 100644
index 00000000..f1aadeeb
--- /dev/null
+++ b/support/make/tinynode/flash.gdb.in
@@ -0,0 +1,7 @@
+# Erase and program flash.
+monitor erase all
+load @EXE@
+
+# Reset the chip to get to a known state.
+monitor reset
+flushregs
diff --git a/support/make/tinynode/gdb.extra b/support/make/tinynode/gdb.extra
new file mode 100644
index 00000000..2f27b9c9
--- /dev/null
+++ b/support/make/tinynode/gdb.extra
@@ -0,0 +1,26 @@
+#-*-Makefile-*- 
+PROGRAM = gdb
+
+INIT_GDB = $(call TOSMake_find,tinynode/init.gdb.in)
+
+FLASH_GDB ?= $(call TOSMake_find,tinynode/flash.gdb.in)
+FLASH_GDB_NO_E ?= $(call TOSMake_find,tinynode/flashnoerase.gdb.in)
+
+PROXY_HOST ?= localhost
+ifdef BATCH
+	GDB_ARGS = -batch
+endif
+
+
+program:	FORCE
+	cat $(INIT_GDB) $(FLASH_GDB) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb;	\
+	msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE);				\
+ 
+program_no_e: FORCE
+	@echo "    ...done"
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using gdb"
+	@echo "    installing $(PLATFORM) binary using gdb (without mass erase)"
+	cat $(INIT_GDB) $(FLASH_GDB) $(FLASH_GDB_NO_E) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(BOOTLOADER)#g" -e "s#@MAIN@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb;	\
+	msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE);
\ No newline at end of file
diff --git a/support/make/tinynode/init.gdb.in b/support/make/tinynode/init.gdb.in
new file mode 100644
index 00000000..ffa51d1e
--- /dev/null
+++ b/support/make/tinynode/init.gdb.in
@@ -0,0 +1,27 @@
+set complaints 1
+#set output-radix 16
+#set input-radix 16
+
+dir .
+set prompt (@PROMPT@) 
+
+# Various personal settings
+display/i $pc
+
+# Connect to msp430-gdbproxy.
+set remoteaddresssize 16
+set remotetimeout 999999
+target remote @HOST@:3333
+
+# Increase the packet size to improve upload speed.
+set remote memory-read-packet-size 1024
+set remote memory-read-packet-size fixed
+set remote memory-write-packet-size 1024
+set remote memory-write-packet-size fixed
+
+b 'XE1205PhyP$xe1205error' 
+b 'XE1205SpiImplP$xe1205error' 
+b 'XE1205SendReceiveP$xe1205error' 
+b 'XE1205IrqConfP$xe1205error' 
+b 'XE1205PhyRssiConfP$xe1205error' 
+#b 'TestXE1205C$xe1205error'
diff --git a/support/make/tinynode/noflash.extra b/support/make/tinynode/noflash.extra
new file mode 100644
index 00000000..badbe5be
--- /dev/null
+++ b/support/make/tinynode/noflash.extra
@@ -0,0 +1 @@
+FLASH_GDB = $(call TOSMake_find,tinynode/noflash.gdb.in)
diff --git a/support/make/tinynode/noflash.gdb.in b/support/make/tinynode/noflash.gdb.in
new file mode 100644
index 00000000..19d8bdf2
--- /dev/null
+++ b/support/make/tinynode/noflash.gdb.in
@@ -0,0 +1,3 @@
+# Reset the chip to get to a known state.
+monitor reset
+flushregs
diff --git a/support/make/tinynode/tinynode.rules b/support/make/tinynode/tinynode.rules
new file mode 100644
index 00000000..6d11b769
--- /dev/null
+++ b/support/make/tinynode/tinynode.rules
@@ -0,0 +1,3 @@
+ifndef NOWIRING
+include $(TINYOS_MAKE_PATH)/wiring.extra
+endif
diff --git a/support/make/tinynode/xedebug.in b/support/make/tinynode/xedebug.in
new file mode 100644
index 00000000..4c697495
--- /dev/null
+++ b/support/make/tinynode/xedebug.in
@@ -0,0 +1,3 @@
+b 'XE1205PhyP$xe1205error' 
+b 'XE1205SpiImplP$xe1205error' 
+b 'XE1205IrqConfP$xe1205error' 
diff --git a/support/make/tmote.target b/support/make/tmote.target
new file mode 100644
index 00000000..f1002906
--- /dev/null
+++ b/support/make/tmote.target
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+TMOTE_REV ?= SKY
+
+# tmote sky == telosb
+ifeq ($(TMOTE_REV),SKY)
+  TMOTE_TARGET = telosb.target
+endif
+
+# if tmote rev is unknown, use telosb
+TMOTE_TARGET ?= telosb.target
+
+$(call TOSMake_include,$(TMOTE_TARGET))
+
+tmote: $(BUILD_DEPS)
+	@:
\ No newline at end of file
diff --git a/support/make/tos_image.extra b/support/make/tos_image.extra
new file mode 100644
index 00000000..b058ccff
--- /dev/null
+++ b/support/make/tos_image.extra
@@ -0,0 +1,9 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id$
+
+TOS_IMAGE_PL ?= tos-write-image
+IDENT_PROGRAM_NAME ?= $(COMPONENT)
+
+build_tosimage: FORCE
+	@echo "    writing TOS image"
+	@$(TOS_IMAGE_PL) $(IDENT_FLAGS) --ihex="$(MAIN_IHEX)" --exe="$(MAIN_EXE)" --objdump="$(OBJDUMP)" > $(BUILDDIR)/tos_image.xml
diff --git a/support/make/verbose.extra b/support/make/verbose.extra
new file mode 100644
index 00000000..bd86eccb
--- /dev/null
+++ b/support/make/verbose.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+# @file	verbose.extra
+# @author	Martin Turon
+# $Id$
+
+PFLAGS += -v
diff --git a/support/make/wiring.extra b/support/make/wiring.extra
new file mode 100644
index 00000000..c7c04661
--- /dev/null
+++ b/support/make/wiring.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+WIRING_CHECK_FLAGS = -fnesc-dump=wiring -fnesc-dump='interfaces(!abstract())' -fnesc-dump='referenced(interfacedefs, components)' -fnesc-dumpfile=$(WIRING_CHECK_FILE)
+WIRING_CHECK_FILE = $(BUILDDIR)/wiring-check.xml
diff --git a/support/sdk/c/.cvsignore b/support/sdk/c/.cvsignore
new file mode 100644
index 00000000..85a27283
--- /dev/null
+++ b/support/sdk/c/.cvsignore
@@ -0,0 +1,21 @@
+sf
+sflisten
+sfsend
+seriallisten
+libmote.a
+config-aux
+autom4te.cache
+configure
+autoconf.h.in
+autoconf.h
+.deps
+Makefile
+Makefile.in
+aclocal.m4
+config.log
+config.status
+stamp-h1
+serialprotocol.h
+serialpacket.c
+serialpacket.h
+prettylisten
diff --git a/support/sdk/c/Makefile.am b/support/sdk/c/Makefile.am
new file mode 100644
index 00000000..71beaf03
--- /dev/null
+++ b/support/sdk/c/Makefile.am
@@ -0,0 +1,37 @@
+AUTOMAKE_OPTIONS = foreign
+
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOS)/lib/serial/Serial.h
+
+BUILT_SOURCES = serialpacket.h serialprotocol.h
+
+bin_PROGRAMS=sf 
+noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten
+noinst_LIBRARIES=libmote.a
+
+sf_SOURCES = sf.c
+sf_LDADD = libmote.a
+
+prettylisten_SOURCES = prettylisten.c
+prettylisten_LDADD = libmote.a
+
+sflisten_SOURCES = sflisten.c
+sflisten_LDADD = libmote.a
+
+sfsend_SOURCES = sfsend.c
+sfsend_LDADD = libmote.a
+
+seriallisten_SOURCES = seriallisten.c
+seriallisten_LDADD = libmote.a
+
+libmote_a_SOURCES = \
+	message.c \
+	serialpacket.c \
+	serialsource.c \
+	sfsource.c
+
+serialpacket.c serialpacket.h: $(SERIAL_H)
+	mig -o serialpacket.h -c-prefix=spacket c $(SERIAL_H) serial_packet
+
+serialprotocol.h: $(SERIAL_H)
+	ncg -o $@ -c-prefix=SERIAL c $(SERIAL_H) Serial.h
diff --git a/support/sdk/c/README b/support/sdk/c/README
new file mode 100644
index 00000000..100865c2
--- /dev/null
+++ b/support/sdk/c/README
@@ -0,0 +1,51 @@
+Mini C-SDK for TinyOS
+=====================
+
+This directory contains a mini-SDK for C, for communicating with motes
+running TinyOS 2.0. To build this SDK, run 
+  ./bootstrap
+  ./configure --prefix=
+  make
+in the current directory and, if you wish, "make install" to install the
+C-based serial forwarder in /bin.
+
+This directory contains one utility:
+- sf: a C-based serial forwarder:
+    sf   
+  Starts a serial forwarder listening for TCP connections on port , and
+  sending and receiving packets on serial port  at the specified
+  .
+
+  This serial forwarder implements the standard TinyOS 2.0 serial forwarder
+  protocol (see comments in support/sdk/java/net/tinyos/packet/SFProtocol.java
+  for a brief overview).
+
+a library (libmote.a) supporting mote communication:
+- serialsource.h: send and receive packets over a serial port (supports
+  non-blocking I/O)
+- sfsource.h: send and receive packets using the serial forwarder
+  protocol
+- message.h: support functions for mig, to encode and decode bitfields of
+  arbitrary size and endianness
+- serialpacket.h: mig-generated code to encode and decode the header of
+  TinyOS serial active-message packets (the packets sent and received by the
+  BaseStation application)
+- serialprotocol.h: ncg-generated code containing the constants describing
+  TinyOS serial packets (from tos/lib/serial/Serial.h)
+
+and four example programs that use that library:
+- seriallisten: print packets received from a serial port
+- sflisten: print packets received from a serial forwarder
+- prettylisten: print packets received from a serial forwarder, using
+  mig-generated code to decode the standard serial-active-message header
+- sfsend: send a packet (specified on the command line) to a serial forwarder
+
+Note that sflisten prints, and sfsend sends, raw packets. In particular,
+the first byte indicates the packet type (e.g., 00 for the AM-over-serial
+packets). For more information on serial communication to and from motes,
+see TEP113.
+
+For more information on using ncg and mig with C, see the nescc-mig and
+nescc-ncg man pages.
+
+
diff --git a/support/sdk/c/autoconf.h b/support/sdk/c/autoconf.h
new file mode 100644
index 00000000..6c207b1f
--- /dev/null
+++ b/support/sdk/c/autoconf.h
@@ -0,0 +1,23 @@
+/* autoconf.h.  Generated by configure.  */
+/* autoconf.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Name of package */
+#define PACKAGE "cmotesdk"
+
+/* Define to the address where bug reports for this package should be sent. */
+#define PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define PACKAGE_NAME "cmotesdk"
+
+/* Define to the full name and version of this package. */
+#define PACKAGE_STRING "cmotesdk 1.0"
+
+/* Define to the one symbol short name of this package. */
+#define PACKAGE_TARNAME "cmotesdk"
+
+/* Define to the version of this package. */
+#define PACKAGE_VERSION "1.0"
+
+/* Version number of package */
+#define VERSION "1.0"
diff --git a/support/sdk/c/bootstrap b/support/sdk/c/bootstrap
new file mode 100755
index 00000000..f35ba820
--- /dev/null
+++ b/support/sdk/c/bootstrap
@@ -0,0 +1,5 @@
+mkdir config-aux
+aclocal
+autoheader
+autoconf
+automake -a -c
diff --git a/support/sdk/c/configure.ac b/support/sdk/c/configure.ac
new file mode 100644
index 00000000..c064fd6d
--- /dev/null
+++ b/support/sdk/c/configure.ac
@@ -0,0 +1,10 @@
+AC_INIT(cmotesdk, 1.0)
+AC_CONFIG_SRCDIR(sfsource.c)
+AM_CONFIG_HEADER(autoconf.h)
+AC_CONFIG_AUX_DIR(config-aux)
+AM_INIT_AUTOMAKE
+
+AC_PROG_CC
+AC_PROG_RANLIB
+
+AC_OUTPUT(Makefile)
diff --git a/support/sdk/c/message.c b/support/sdk/c/message.c
new file mode 100644
index 00000000..9739c15a
--- /dev/null
+++ b/support/sdk/c/message.c
@@ -0,0 +1,312 @@
+/* Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ */
+
+#include 
+#include "message.h"
+
+struct tmsg {
+  uint8_t *data;
+  size_t len;
+};
+
+tmsg_t *new_tmsg(void *packet, size_t len)
+{
+  tmsg_t *x = malloc(sizeof(tmsg_t));
+
+  if (x)
+    {
+      x->data = packet;
+      x->len = len;
+    }
+  return x;
+}
+
+void free_tmsg(tmsg_t *msg)
+{
+  if (msg)
+    free(msg);
+}
+
+void *tmsg_data(tmsg_t *msg)
+{
+  return msg->data;
+}
+
+size_t tmsg_length(tmsg_t *msg)
+{
+  return msg->len;
+}
+
+static void (*failfn)(void);
+
+void tmsg_fail(void)
+{
+  if (failfn)
+    failfn();
+}
+
+void (*tmsg_set_fail(void (*fn)(void)))(void)
+{
+  void (*oldfn)(void) = failfn;
+
+  failfn = fn;
+
+  return oldfn;
+}
+
+/* Check if a specified bit field is in range for a buffer, and invoke
+   tmsg_fail if not. Return TRUE if in range, FALSE otherwise */
+static int boundsp(tmsg_t *msg, size_t offset, size_t length)
+{
+  if (offset + length <= msg->len * 8)
+    return 1;
+
+  tmsg_fail();
+  return 0;
+}
+
+/* Convert 2's complement 'length' bit integer 'x' from unsigned to signed
+ */
+static int64_t u2s(uint64_t x, size_t length)
+{
+  if (x & 1ULL << (length - 1))
+    return (int64_t)x - (1LL << length);
+  else
+    return x;
+}
+
+uint64_t tmsg_read_ule(tmsg_t *msg, size_t offset, size_t length)
+{
+  uint64_t x = 0;
+
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+      size_t shift = 0;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8)
+	return (msg->data[byte_offset] >> bit_offset) & ((1 << length) - 1);
+
+      /* get some high order bits */
+      if (offset > 0)
+	{
+	  x = msg->data[byte_offset] >> bit_offset;
+	  byte_offset++;
+	  shift += 8 - bit_offset;
+	  length -= 8 - bit_offset;
+	}
+
+      while (length >= 8)
+	{
+	  x |= (uint64_t)msg->data[byte_offset++] << shift;
+	  shift += 8;
+	  length -= 8;
+	}
+
+      /* data from last byte */
+      if (length > 0)
+	x |= (uint64_t)(msg->data[byte_offset] & ((1 << length) - 1)) << shift;
+    }
+
+  return x;
+}
+
+int64_t tmsg_read_le(tmsg_t *msg, size_t offset, size_t length)
+{
+  return u2s(tmsg_read_ule(msg, offset, length), length);
+}
+
+void tmsg_write_ule(tmsg_t *msg, size_t offset, size_t length, uint64_t x)
+{
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+      size_t shift = 0;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8)
+	{
+	  msg->data[byte_offset] = 
+	    ((msg->data[byte_offset] & ~(((1 << length) - 1) << bit_offset))
+	     | x << bit_offset);
+	  return;
+	}
+
+      /* set some high order bits */
+      if (bit_offset > 0)
+	{
+	  msg->data[byte_offset] =
+	    ((msg->data[byte_offset] & ((1 << bit_offset) - 1)) | x << bit_offset);
+	  byte_offset++;
+	  shift += 8 - bit_offset;
+	  length -= 8 - bit_offset;
+	}
+
+      while (length >= 8)
+	{
+	  msg->data[byte_offset++] = x >> shift;
+	  shift += 8;
+	  length -= 8;
+	}
+
+      /* data for last byte */
+      if (length > 0)
+	msg->data[byte_offset] = 
+	  (msg->data[byte_offset] & ~((1 << length) - 1)) | x >> shift;
+    }
+}
+
+void tmsg_write_le(tmsg_t *msg, size_t offset, size_t length, int64_t value)
+{
+  tmsg_write_ule(msg, offset, length, value);
+}
+
+uint64_t tmsg_read_ube(tmsg_t *msg, size_t offset, size_t length)
+{
+  uint64_t x = 0;
+
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+
+      /* All in one byte case */
+      if (length + bit_offset <= 8)
+	return (msg->data[byte_offset] >> (8 - bit_offset - length)) &
+	  ((1 << length) - 1);
+
+      /* get some high order bits */
+      if (bit_offset > 0)
+	{
+	  length -= 8 - bit_offset;
+	  x = (uint64_t)(msg->data[byte_offset] & ((1 << (8 - bit_offset)) - 1)) << length;
+	  byte_offset++;
+	}
+
+      while (length >= 8)
+	{
+	  length -= 8;
+	  x |= (uint64_t)msg->data[byte_offset++] << length;
+	}
+
+      /* data from last byte */
+      if (length > 0)
+	x |= msg->data[byte_offset] >> (8 - length);
+
+      return x;
+    }
+
+  return x;
+}
+
+int64_t tmsg_read_be(tmsg_t *msg, size_t offset, size_t length)
+{
+  return u2s(tmsg_read_ube(msg, offset, length), length);
+}
+
+void tmsg_write_ube(tmsg_t *msg, size_t offset, size_t length, uint64_t x)
+{
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8) {
+	size_t mask = ((1 << length) - 1) << (8 - bit_offset - length);
+
+	msg->data[byte_offset] = 
+	  ((msg->data[byte_offset] & ~mask) | x << (8 - bit_offset - length));
+	return;
+      }
+
+      /* set some high order bits */
+      if (bit_offset > 0)
+	{
+	  size_t mask = (1 << (8 - bit_offset)) - 1;
+
+	  length -= 8 - bit_offset;
+	  msg->data[byte_offset] = 
+	    ((msg->data[byte_offset] & ~mask) | x >> length);
+	  byte_offset++;
+	}
+
+      while (length >= 8)
+	{
+	  length -= 8;
+	  msg->data[byte_offset++] = x >> length;
+	}
+
+      /* data for last byte */
+      if (length > 0)
+	{
+	  size_t mask = (1 << (8 - length)) - 1;
+
+	  msg->data[byte_offset] =
+	    ((msg->data[byte_offset] & mask) | x << (8 - length));
+	}
+    }
+}
+
+void tmsg_write_be(tmsg_t *msg, size_t offset, size_t length, int64_t value)
+{
+  tmsg_write_ube(msg, offset, length, value);
+}
+
+/* u2f and f2u convert raw 32-bit values to/from float. This code assumes
+   that the floating point rep in the uint32_t values:
+     bit 31: sign, bits 30-23: exponent, bits 22-0: mantissa
+   matches that of a floating point value when such a value is stored in
+   memory.
+*/
+
+/* Note that C99 wants us to use the union approach rather than the
+   cast-a-pointer approach... */
+union f_and_u {
+  uint32_t u;
+  float f;
+};
+
+static float u2f(uint32_t x)
+{
+  union f_and_u y = { .u = x};
+  return y.f;
+}
+
+static uint32_t f2u(float x)
+{
+  union f_and_u y = { .f = x};
+  return y.u;
+}
+
+float tmsg_read_float_le(tmsg_t *msg, size_t offset)
+{
+  return u2f(tmsg_read_ule(msg, offset, 32));
+}
+
+void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x)
+{
+  tmsg_write_ule(msg, offset, 32, f2u(x));
+}
+
+float tmsg_read_float_be(tmsg_t *msg, size_t offset)
+{
+  return u2f(tmsg_read_ube(msg, offset, 32));
+}
+
+void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x)
+{
+  tmsg_write_ube(msg, offset, 32, f2u(x));
+}
diff --git a/support/sdk/c/message.h b/support/sdk/c/message.h
new file mode 100644
index 00000000..0bceefef
--- /dev/null
+++ b/support/sdk/c/message.h
@@ -0,0 +1,148 @@
+/* Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ */
+#ifndef MESSAGE_H
+#define MESSAGE_H
+
+#include 
+#include 
+
+/** The type of message buffers */
+typedef struct tmsg tmsg_t;
+
+/** Invoke the function set by tmsg_set_fail.
+ *  tmsg_fail is called by the tmsg_read and tmsg_write functions when an
+ *  out-of-buffer access is attempted.
+*/
+void tmsg_fail(void);
+
+/** Set the function that tmsg_fail should call, and return the previous
+ *  function. If the function is NULL, tmsg_fail does nothing.
+*/
+void (*tmsg_set_fail(void (*fn)(void)))(void);
+
+/**
+ * Create a message buffer from array 'packet' of 'len' bytes
+ */
+tmsg_t *new_tmsg(void *packet, size_t len);
+
+/**
+ * Free a message buffer. This does NOT free the underlying array.
+ */
+void free_tmsg(tmsg_t *msg);
+
+/**
+ * Return underlying array of a message buffer
+ */
+void *tmsg_data(tmsg_t *msg);
+
+/**
+ * Return length of a message buffer
+ */
+size_t tmsg_length(tmsg_t *msg);
+
+/**
+ * Read an unsigned little-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+uint64_t tmsg_read_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Read a signed little-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+int64_t tmsg_read_le(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Write an unsigned little-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value);
+
+/**
+ * Write a signed little-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_le(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value);
+
+/**
+ * Read an unsigned big-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+uint64_t tmsg_read_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Read a signed big-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+int64_t tmsg_read_be(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Write an unsigned big-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value);
+
+/**
+ * Write a signed big-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_be(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value);
+
+/**
+ * Read a 32-bit IEEE float stored in little-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+float tmsg_read_float_le(tmsg_t *msg, size_t offset);
+
+/**
+ * Write a 32-bit IEEE float in little-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x);
+
+/**
+ * Read a 32-bit IEEE float stored in big-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+float tmsg_read_float_be(tmsg_t *msg, size_t offset);
+
+/**
+ * Write a 32-bit IEEE float in big-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x);
+
+#endif
diff --git a/support/sdk/c/prettylisten.c b/support/sdk/c/prettylisten.c
new file mode 100644
index 00000000..a3f5d67d
--- /dev/null
+++ b/support/sdk/c/prettylisten.c
@@ -0,0 +1,67 @@
+#include 
+#include 
+
+#include "sfsource.h"
+#include "serialpacket.h"
+#include "serialprotocol.h"
+
+void hexprint(uint8_t *packet, int len)
+{
+  int i;
+
+  for (i = 0; i < len; i++)
+    printf("%02x ", packet[i]);
+}
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s   - dump packets from a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      uint8_t *packet = read_sf_packet(fd, &len);
+
+      if (!packet)
+	exit(0);
+
+      if (len >= 1 + SPACKET_SIZE &&
+	  packet[0] == SERIAL_TOS_SERIAL_ACTIVE_MESSAGE_ID)
+	{
+	  tmsg_t *msg = new_tmsg(packet + 1, len - 1);
+
+	  if (!msg)
+	    exit(0);
+
+	  printf("addr %u, length %u, group %u, type %u\n  ",
+		 spacket_header_addr_get(msg),
+		 spacket_header_length_get(msg),
+		 spacket_header_group_get(msg),
+		 spacket_header_type_get(msg));
+	  hexprint((uint8_t *)tmsg_data(msg) + spacket_data_offset(0),
+		   tmsg_length(msg) - spacket_data_offset(0));
+
+	  free(msg);
+	}
+      else
+	{
+	  printf("non-AM packet: ");
+	  hexprint(packet, len);
+	}
+      putchar('\n');
+      fflush(stdout);
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/seriallisten.c b/support/sdk/c/seriallisten.c
new file mode 100644
index 00000000..f7d5aeb6
--- /dev/null
+++ b/support/sdk/c/seriallisten.c
@@ -0,0 +1,52 @@
+#include 
+#include 
+
+#include "serialsource.h"
+
+static char *msgs[] = {
+  "unknown_packet_type",
+  "ack_timeout"	,
+  "sync"	,
+  "too_long"	,
+  "too_short"	,
+  "bad_sync"	,
+  "bad_crc"	,
+  "closed"	,
+  "no_memory"	,
+  "unix_error"
+};
+
+void stderr_msg(serial_source_msg problem)
+{
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+int main(int argc, char **argv)
+{
+  serial_source src;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s   - dump packets from a serial port\n", argv[0]);
+      exit(2);
+    }
+  src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 0, stderr_msg);
+  if (!src)
+    {
+      fprintf(stderr, "Couldn't open serial port at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      const unsigned char *packet = read_serial_packet(src, &len);
+
+      if (!packet)
+	exit(0);
+      for (i = 0; i < len; i++)
+	printf("%02x ", packet[i]);
+      putchar('\n');
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/serialsource.c b/support/sdk/c/serialsource.c
new file mode 100644
index 00000000..5f777f30
--- /dev/null
+++ b/support/sdk/c/serialsource.c
@@ -0,0 +1,832 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifdef __CYGWIN__
+#include 
+#include 
+#else
+#include 
+#endif
+
+/* C implementation of the mote serial protocol. See
+   net.tinyos.packet.Packetizer for more details */
+
+#undef DEBUG
+
+#include "serialsource.h"
+#include "serialprotocol.h"
+
+typedef int bool;
+
+enum {
+#ifndef __CYGWIN__
+  FALSE = 0,
+  TRUE = 1,
+#endif
+  BUFSIZE = 256,
+  MTU = 256,
+  ACK_TIMEOUT = 1000000, /* in us */
+  SYNC_BYTE = SERIAL_HDLC_FLAG_BYTE,
+  ESCAPE_BYTE = SERIAL_HDLC_CTLESC_BYTE,
+
+  P_ACK = SERIAL_SERIAL_PROTO_ACK,
+  P_PACKET_ACK = SERIAL_SERIAL_PROTO_PACKET_ACK,
+  P_PACKET_NO_ACK = SERIAL_SERIAL_PROTO_PACKET_NOACK,
+  P_UNKNOWN = SERIAL_SERIAL_PROTO_PACKET_UNKNOWN
+};
+
+struct packet_list
+{
+  uint8_t *packet;
+  int len;
+  struct packet_list *next;
+};
+
+struct serial_source {
+  int fd;
+  bool non_blocking;
+  void (*message)(serial_source_msg problem);
+
+  /* Receive state */
+  struct {
+    uint8_t buffer[BUFSIZE];
+    int bufpos, bufused;
+    uint8_t packet[MTU];
+    bool in_sync, escaped;
+    int count;
+    struct packet_list *queue[256]; // indexed by protocol
+  } recv;
+  struct {
+    uint8_t seqno;
+    uint8_t *escaped;
+    int escapeptr;
+    uint16_t crc;
+  } send;
+};
+
+static tcflag_t parse_baudrate(int requested)
+{
+  int baudrate;
+
+  switch (requested)
+    {
+#ifdef B50
+    case 50: baudrate = B50; break;
+#endif
+#ifdef B75
+    case 75: baudrate = B75; break;
+#endif
+#ifdef B110
+    case 110: baudrate = B110; break;
+#endif
+#ifdef B134
+    case 134: baudrate = B134; break;
+#endif
+#ifdef B150
+    case 150: baudrate = B150; break;
+#endif
+#ifdef B200
+    case 200: baudrate = B200; break;
+#endif
+#ifdef B300
+    case 300: baudrate = B300; break;
+#endif
+#ifdef B600
+    case 600: baudrate = B600; break;
+#endif
+#ifdef B1200
+    case 1200: baudrate = B1200; break;
+#endif
+#ifdef B1800
+    case 1800: baudrate = B1800; break;
+#endif
+#ifdef B2400
+    case 2400: baudrate = B2400; break;
+#endif
+#ifdef B4800
+    case 4800: baudrate = B4800; break;
+#endif
+#ifdef B9600
+    case 9600: baudrate = B9600; break;
+#endif
+#ifdef B19200
+    case 19200: baudrate = B19200; break;
+#endif
+#ifdef B38400
+    case 38400: baudrate = B38400; break;
+#endif
+#ifdef B57600
+    case 57600: baudrate = B57600; break;
+#endif
+#ifdef B115200
+    case 115200: baudrate = B115200; break;
+#endif
+#ifdef B230400
+    case 230400: baudrate = B230400; break;
+#endif
+#ifdef B460800
+    case 460800: baudrate = B460800; break;
+#endif
+#ifdef B500000
+    case 500000: baudrate = B500000; break;
+#endif
+#ifdef B576000
+    case 576000: baudrate = B576000; break;
+#endif
+#ifdef B921600
+    case 921600: baudrate = B921600; break;
+#endif
+#ifdef B1000000
+    case 1000000: baudrate = B1000000; break;
+#endif
+#ifdef B1152000
+    case 1152000: baudrate = B1152000; break;
+#endif
+#ifdef B1500000
+    case 1500000: baudrate = B1500000; break;
+#endif
+#ifdef B2000000
+    case 2000000: baudrate = B2000000; break;
+#endif
+#ifdef B2500000
+    case 2500000: baudrate = B2500000; break;
+#endif
+#ifdef B3000000
+    case 3000000: baudrate = B3000000; break;
+#endif
+#ifdef B3500000
+    case 3500000: baudrate = B3500000; break;
+#endif
+#ifdef B4000000
+    case 4000000: baudrate = B4000000; break;
+#endif
+    default:
+      baudrate = 0;
+    }
+  return baudrate;
+}
+
+#ifdef DEBUG
+static void dump(const char *msg, unsigned char *packet, int len)
+{
+  int i;
+
+  printf("%s", msg);
+  for (i = 0; i < len; i++)
+    printf(" %02x", packet[i]);
+  putchar('\n');
+}
+#endif
+
+static void message(serial_source src, serial_source_msg msg)
+{
+  if (src->message)
+    src->message(msg);
+}
+
+/* Work around buggy usb serial driver (returns 0 when no data is
+   available, independent of the blocking/non-blocking mode) */
+static int buggyread(serial_source src, void *buffer, int n)
+{
+  fd_set fds;
+  int cnt;
+
+  if (src->non_blocking)
+    {
+      cnt = read(src->fd, buffer, n);
+      if (cnt == 0)
+	{
+	  cnt = -1;
+	  errno = EAGAIN;
+	  printf("foo\n");
+	}
+      return cnt;
+    }
+  else
+    for (;;)
+      {
+	FD_ZERO(&fds);
+	FD_SET(src->fd, &fds);
+	cnt = select(src->fd + 1, &fds, NULL, NULL, NULL);
+	if (cnt < 0)
+	  return -1;
+
+	cnt = read(src->fd, buffer, n);
+	if (cnt != 0)
+	  return cnt;
+      }
+}
+
+serial_source open_serial_source(const char *device, int baud_rate,
+				 int non_blocking,
+				 void (*message)(serial_source_msg problem))
+/* Effects: opens serial port device at specified baud_rate. If non_blocking
+     is true, read_serial_packet calls will be non-blocking (writes are
+     always blocking, for now at least)
+   Returns: descriptor for serial forwarder at host:port, or
+     NULL for failure (bad device or bad baud rate)
+ */
+{
+  struct termios newtio;
+  int fd;
+  tcflag_t baudflag = parse_baudrate(baud_rate);
+
+  if (!baudflag)
+    return NULL;
+
+  fd = open(device, O_RDWR | O_NOCTTY | O_NONBLOCK);
+  if (fd < 0)
+    return NULL;
+
+#ifdef __CYGWIN__
+  /* For some very mysterious reason, this incantation is necessary to make
+     the serial port work under some windows machines */
+  HANDLE handle = (HANDLE)get_osfhandle(fd);
+  DCB dcb;
+  if (!(GetCommState(handle, &dcb) && SetCommState(handle, &dcb)))
+    {
+      close(fd);
+      return NULL;
+    }
+#endif
+  /* Serial port setting */
+  memset(&newtio, 0, sizeof(newtio));
+  newtio.c_cflag = CS8 | CLOCAL | CREAD;
+  newtio.c_iflag = IGNPAR | IGNBRK;
+  cfsetispeed(&newtio, baudflag);
+  cfsetospeed(&newtio, baudflag);
+
+  /* Raw output_file */
+  newtio.c_oflag = 0;
+
+  if (tcflush(fd, TCIFLUSH) >= 0 &&
+      tcsetattr(fd, TCSANOW, &newtio) >= 0)
+    {
+      serial_source src = malloc(sizeof *src);
+
+      if (src)
+	{
+	  memset(src, 0, sizeof *src);
+	  src->fd = fd;
+	  src->non_blocking = non_blocking;
+	  src->message = message;
+	  src->send.seqno = 37;
+
+	  return src;
+	}
+    }
+  close(fd);
+
+  return NULL;
+}
+
+int serial_source_fd(serial_source src)
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+{
+  return src->fd;
+}
+
+int close_serial_source(serial_source src)
+/* Effects: closes serial source src
+   Returns: 0 if successful, -1 if some problem occured (but source is
+     considered closed anyway)
+ */
+{
+  int ok = close(src->fd);
+
+  free(src);
+
+  return ok;
+}
+
+static int source_wait(serial_source src, struct timeval *deadline)
+/* Effects: waits until deadline for some data on source. deadline
+     can be NULL for indefinite waiting.
+   Returns: 0 if data is available, -1 if the deadline expires
+*/
+{
+  struct timeval tv;
+  fd_set fds;
+  int cnt;
+
+  if (src->recv.bufpos < src->recv.bufused)
+    return 0;
+
+  for (;;)
+    {
+      if (deadline)
+	{
+	  gettimeofday(&tv, NULL);
+	  tv.tv_sec = deadline->tv_sec - tv.tv_sec;
+	  tv.tv_usec = deadline->tv_usec - tv.tv_usec;
+	  if (tv.tv_usec < 0)
+	    {
+	      tv.tv_usec += 1000000;
+	      tv.tv_sec--;
+	    }
+	  if (tv.tv_sec < 0)
+	    return -1;
+	}
+
+      FD_ZERO(&fds);
+      FD_SET(src->fd, &fds);
+      cnt = select(src->fd + 1, &fds, NULL, NULL, deadline ? &tv : NULL);
+      if (cnt < 0)
+	{
+	  if (errno == EINTR)
+	    continue;
+	  message(src, msg_unix_error);
+	  return -1;
+	}
+      if (cnt == 0)
+	return -1;
+      return 0;
+    }
+}
+
+static int source_write(serial_source src, const void *buffer, int count)
+{
+  int actual = 0;
+
+  if (fcntl(src->fd, F_SETFL, 0) < 0)
+    {
+      message(src, msg_unix_error);
+      return -1;
+    }
+  while (count > 0)
+    {
+      int n = write(src->fd, buffer, count);
+
+      if (n < 0 && errno == EINTR)
+	continue;
+      if (n < 0)
+	{
+	  message(src, msg_unix_error);
+	  actual = -1;
+	  break;
+	}
+
+      count -= n;
+      actual += n;
+      buffer += n;
+    }
+  if (fcntl(src->fd, F_SETFL, O_NONBLOCK) < 0)
+    {
+      message(src, msg_unix_error);
+      /* We're in trouble, but there's no obvious fix. */
+    }
+  return actual;
+}
+
+static void push_protocol_packet(serial_source src,
+				 uint8_t type, uint8_t *packet, uint8_t len)
+{
+  /* I'm assuming short queues */
+  struct packet_list *entry = malloc(sizeof *entry), **last;
+
+  if (!entry)
+    {
+      message(src, msg_no_memory);
+      free(packet);
+      return;
+    }
+
+  entry->packet = packet;
+  entry->len = len;
+  entry->next = NULL;
+
+  last = &src->recv.queue[type];
+  while (*last)
+    last = &(*last)->next;
+  *last = entry;
+}
+
+static struct packet_list *pop_protocol_packet(serial_source src, uint8_t type)
+{
+  struct packet_list *entry = src->recv.queue[type];
+
+  if (entry)
+    src->recv.queue[type] = entry->next;
+
+  return entry;
+}
+
+static bool packet_available(serial_source src, uint8_t type)
+{
+  return src->recv.queue[type] != NULL;
+}
+
+int serial_source_empty(serial_source src)
+/* Returns: true if serial source does not contain any pending data, i.e.,
+     if the result is true and there is no data available on the source's
+     file descriptor, then read_serial_packet will:
+       - return NULL if the source is non-blocking
+       - block if it is blocking
+
+    (Note: the presence of this calls allows the serial_source to do some
+    internal buffering)
+*/
+{
+  return src->recv.bufpos >= src->recv.bufused &&
+    !packet_available(src, P_PACKET_NO_ACK);
+}
+
+/* Slow implementation of crc function */
+static uint16_t crc_byte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+
+static uint16_t crc_packet(uint8_t *data, int len)
+{
+  uint16_t crc = 0;
+
+  while (len-- > 0)
+    crc = crc_byte(crc, *data++);
+
+  return crc;
+}
+
+static int read_byte(serial_source src)
+/* Returns: next byte (>= 0), or -1 if no data available and the source
+     is non-blocking.
+*/
+{
+  if (src->recv.bufpos >= src->recv.bufused)
+    {
+      for (;;)
+	{
+	  int n = buggyread(src, src->recv.buffer, sizeof src->recv.buffer);
+
+	  if (n == 0) /* Can't occur because of buggyread bug workaround */
+	    {
+	      message(src, msg_closed);
+	      return -1;
+	    }
+	  if (n > 0)
+	    {
+#ifdef DEBUG
+	      dump("raw", src->recv.buffer, n);
+#endif
+	      src->recv.bufpos = 0;
+	      src->recv.bufused = n;
+	      break;
+	    }
+	  if (errno == EAGAIN)
+	    return -1;
+	  if (errno != EINTR)
+	    message(src, msg_unix_error);
+	}
+    }
+  //printf("in %02x\n", src->recv.buffer[src->recv.bufpos]);
+  return src->recv.buffer[src->recv.bufpos++];
+}
+
+static void process_packet(serial_source src, uint8_t *packet, int len);
+static int write_framed_packet(serial_source src,
+			       uint8_t packet_type, uint8_t first_byte,
+			       const uint8_t *packet, int count);
+
+static void read_and_process(serial_source src)
+/* Effects: reads and processes up to one packet.
+*/
+{
+  uint8_t *packet = src->recv.packet;
+
+  for (;;)
+    {
+      int byte = read_byte(src);
+
+      if (byte < 0)
+	return;
+
+      if (!src->recv.in_sync)
+	{
+	  if (byte == SYNC_BYTE)
+	    {
+	      src->recv.in_sync = TRUE;
+	      message(src, msg_sync);
+	      src->recv.count = 0;
+	      src->recv.escaped = FALSE;
+	    }
+	  continue;
+	}
+      if (src->recv.count >= MTU)
+	{
+	  message(src, msg_too_long);
+	  src->recv.in_sync = FALSE;
+	  continue;
+	}
+      if (src->recv.escaped)
+	{
+	  if (byte == SYNC_BYTE)
+	    {
+	      /* sync byte following escape is an error, resync */
+	      message(src, msg_bad_sync);
+	      src->recv.in_sync = FALSE;
+	      continue;
+	    }
+	  byte ^= 0x20;
+	  src->recv.escaped = FALSE;
+	}
+      else if (byte == ESCAPE_BYTE)
+	{
+	  src->recv.escaped = TRUE;
+	  continue;
+	}
+      else if (byte == SYNC_BYTE)
+	{
+	  int count = src->recv.count;
+	  uint8_t *received;
+	  uint16_t read_crc, computed_crc;
+
+	  src->recv.count = 0; /* ready for next packet */
+
+	  if (count < 4)
+	    /* frames that are too small are ignored */
+	    continue;
+
+	  received = malloc(count - 2);
+	  if (!received)
+	    {
+	      message(src, msg_no_memory);
+	      continue;
+	    }
+	  memcpy(received, packet, count - 2);
+
+	  read_crc = packet[count - 2] | packet[count - 1] << 8;
+	  computed_crc = crc_packet(received, count - 2);
+
+#ifdef DEBUG
+	  dump("received", packet, count);
+	  printf("  crc %x comp %x\n", read_crc, computed_crc);
+#endif
+	  if (read_crc == computed_crc) 
+	    {
+	      process_packet(src, received, count - 2);
+	      return; /* give rest of world chance to do something */
+	    }
+	  else
+	    {
+	      message(src, msg_bad_crc);
+	      /* We don't lose sync here. If we did, garbage on the line
+		 at startup will cause loss of the first packet. */
+	      continue;
+	    }
+	}
+      packet[src->recv.count++] = byte;
+    }
+}
+
+static void process_packet(serial_source src, uint8_t *packet, int len)
+{
+  int packet_type = packet[0], offset = 1;
+
+  if (packet_type == P_PACKET_ACK)
+    {
+      /* send ack */
+      write_framed_packet(src, P_ACK, packet[1], NULL, 0);
+      /* And merge with un-acked packets */
+      packet_type = P_PACKET_NO_ACK;
+      offset = 2;
+    }
+  /* packet must remain a valid pointer to pass to free. So we move the
+     data rather than pass an internal pointer */
+  memmove(packet, packet + offset, len - offset);
+  push_protocol_packet(src, packet_type, packet, len - offset);
+}
+
+void *read_serial_packet(serial_source src, int *len)
+/* Effects: Read the serial source src. If a packet is available, return it.
+     If in blocking mode and no packet is available, wait for one.
+   Returns: the packet read (in newly allocated memory), with *len is
+     set to the packet length, or NULL if no packet is yet available and
+     the serial source is in non-blocking mode
+*/
+{
+  for (;;)
+    {
+      struct packet_list *entry;
+
+      read_and_process(src);
+      entry = pop_protocol_packet(src, P_PACKET_NO_ACK);
+      if (entry)
+	{
+	  uint8_t *packet = entry->packet;
+
+	  *len = entry->len;
+	  free(entry);
+
+	  return packet;
+	}
+      if (src->non_blocking && serial_source_empty(src))
+	return NULL;
+      source_wait(src, NULL);
+    }
+}
+
+/* The escaper does the sync bytes+escape-like encoding+crc of packets */
+
+static void escape_add(serial_source src, uint8_t b)
+{
+  src->send.escaped[src->send.escapeptr++] = b;
+}
+
+static int init_escaper(serial_source src, int count)
+{
+  src->send.escaped = malloc(count * 2 + 2);
+  if (!src->send.escaped)
+    {
+      message(src, msg_no_memory);
+      return -1;
+    }
+  src->send.escapeptr = 0;
+  src->send.crc = 0;
+
+  escape_add(src, SYNC_BYTE);
+
+  return 0;
+}
+
+static void terminate_escaper(serial_source src)
+{
+  escape_add(src, SYNC_BYTE);
+}
+
+static void escape_byte(serial_source src, uint8_t b)
+{
+  src->send.crc = crc_byte(src->send.crc, b);
+  if (b == SYNC_BYTE || b == ESCAPE_BYTE)
+    {
+      escape_add(src, ESCAPE_BYTE);
+      escape_add(src, b ^ 0x20);
+    }
+  else
+    escape_add(src, b);
+}
+
+static void free_escaper(serial_source src)
+{
+  free(src->send.escaped);
+}
+
+// Write a packet of type 'packetType', first byte 'firstByte'
+// and bytes 2..'count'+1 in 'packet'
+static int write_framed_packet(serial_source src,
+			       uint8_t packet_type, uint8_t first_byte,
+			       const uint8_t *packet, int count)
+{
+  int i, crc;
+
+#ifdef DEBUG
+  printf("writing %02x %02x", packet_type, first_byte);
+  dump("", packet, count);
+#endif
+
+  if (init_escaper(src, count + 4) < 0)
+    return -1;
+	
+  escape_byte(src, packet_type);
+  escape_byte(src, first_byte);
+  for (i = 0; i < count; i++)
+    escape_byte(src, packet[i]);
+
+  crc = src->send.crc;
+  escape_byte(src, crc & 0xff);
+  escape_byte(src, crc >> 8);
+  
+  terminate_escaper(src);
+
+#ifdef DEBUG
+  dump("encoded", src->send.escaped, src->send.escapeptr);
+#endif
+
+  if (source_write(src, src->send.escaped, src->send.escapeptr) < 0)
+    {
+      free_escaper(src);
+      return -1;
+    }
+  free_escaper(src);
+  return 0;
+}
+
+static void add_timeval(struct timeval *tv, long us)
+/* Specialised for this app */
+{
+  tv->tv_sec += us / 1000000;
+  tv->tv_usec += us % 1000000;
+  if (tv->tv_usec > 1000000)
+    {
+      tv->tv_usec -= 1000000;
+      tv->tv_sec++;
+    }
+}
+
+int write_serial_packet(serial_source src, const void *packet, int len)
+/* Effects: writes len byte packet to serial source src
+   Returns: 0 if packet successfully written, 1 if successfully written
+     but not acknowledged, -1 otherwise
+*/
+{
+  struct timeval deadline;
+
+  src->send.seqno++;
+  if (write_framed_packet(src, P_PACKET_ACK, src->send.seqno, packet, len) < 0)
+    return -1;
+
+  gettimeofday(&deadline, NULL);
+  add_timeval(&deadline, ACK_TIMEOUT);
+  for (;;) 
+    {
+      struct packet_list *entry;
+      
+      read_and_process(src);
+      entry = pop_protocol_packet(src, P_ACK);
+      if (entry)
+	{
+	  uint8_t acked = entry->packet[0];
+
+	  free(entry->packet);
+	  free(entry);
+	  if (acked == src->send.seqno)
+	    return 0;
+	}
+      else if (source_wait(src, &deadline) < 0)
+	return 1;
+    }
+}
+
+/* This somewhat convoluted code allows us to use a common baudrate table
+   with the Java code. This could be improved if we generated the Java
+   code from a common table.
+*/
+
+struct pargs {
+  char *name;
+  int rate;
+};
+
+static void padd(struct pargs *args, const char *name, int baudrate)
+{
+  if (!strcmp(args->name, name))
+    args->rate = baudrate;
+}
+
+static void init(void) { }
+
+int platform_baud_rate(char *platform_name)
+/* Returns: The baud rate of the specified platform, or -1 for unknown
+     platforms
+*/
+{
+  /* The Java code looks like Platform.add(Platform.x, "name", baudrate); 
+     Fake up some C stuff which will make that work right. */
+  struct pargs args;
+  struct {
+    void (*add)(struct pargs *args, const char *name, int baudrate);
+    struct pargs *x;
+  } Platform = { padd, &args };
+  static struct {
+    struct {
+      int packet;
+    } tinyos;
+  } net;
+
+  if (isdigit(platform_name[0]))
+    return atoi(platform_name);
+
+  args.name = platform_name;
+  args.rate = -1;
+
+#define class
+#define BaudRate
+#define static
+#define void
+#define throws ;
+#define Exception
+#define package
+#include "../java/net/tinyos/packet/BaudRate.java"
+
+  return args.rate;
+}
diff --git a/support/sdk/c/serialsource.h b/support/sdk/c/serialsource.h
new file mode 100644
index 00000000..c1448522
--- /dev/null
+++ b/support/sdk/c/serialsource.h
@@ -0,0 +1,73 @@
+#ifndef SERIALSOURCE_H
+#define SERIALSOURCE_H
+
+typedef struct serial_source *serial_source;
+
+typedef enum {
+  msg_unknown_packet_type,	/* packet of unknown type received */
+  msg_ack_timeout, 		/* ack not received within timeout */
+  msg_sync,			/* sync achieved */
+  msg_too_long,			/* greater than MTU (256 bytes) */
+  msg_too_short,		/* less than 4 bytes */
+  msg_bad_sync,			/* unexpected sync byte received */
+  msg_bad_crc,			/* received packet has bad crc */
+  msg_closed,			/* serial port closed itself */
+  msg_no_memory,		/* malloc failed */
+  msg_unix_error		/* check errno for details */
+} serial_source_msg;
+
+serial_source open_serial_source(const char *device, int baud_rate,
+				 int non_blocking,
+				 void (*message)(serial_source_msg problem));
+/* Effects: opens serial port device at specified baud_rate. If non_blocking
+     is true, read_serial_packet calls will be non-blocking (writes are
+     always blocking, for now at least)
+     If non-null, message will be called to signal various problems during
+     execution.
+   Returns: descriptor for serial forwarder at host:port, or
+     NULL for failure
+ */
+
+int serial_source_fd(serial_source src);
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+
+int serial_source_empty(serial_source src);
+/* Returns: true if serial source does not contain any pending data, i.e.,
+     if the result is true and there is no data available on the source's
+     file descriptor, then read_serial_packet will:
+       - return NULL if the source is non-blocking
+       - block if it is blocking
+
+    (Note: the presence of this calls allows the serial_source to do some
+    internal buffering)
+*/
+
+int close_serial_source(serial_source src);
+/* Effects: closes serial source src
+   Returns: 0 if successful, -1 if some problem occured (but source is
+     considered closed anyway)
+ */
+
+void *read_serial_packet(serial_source src, int *len);
+/* Effects: Read the serial source src. If a packet is available, return it.
+     If in blocking mode and no packet is available, wait for one.
+   Returns: the packet read (in newly allocated memory), with *len is
+     set to the packet length, or NULL if no packet is yet available and
+     the serial source is in non-blocking mode
+*/
+
+int write_serial_packet(serial_source src, const void *packet, int len);
+/* Effects: writes len byte packet to serial source src
+   Returns: 0 if packet successfully written, 1 if successfully written
+     but not acknowledged, -1 otherwise
+*/
+
+int platform_baud_rate(char *platform_name);
+/* Returns: The baud rate of the specified platform, or -1 for unknown
+     platforms. If platform_name starts with a digit, just return 
+     atoi(platform_name).
+*/
+
+#endif
diff --git a/support/sdk/c/sf.c b/support/sdk/c/sf.c
new file mode 100644
index 00000000..b104c7d6
--- /dev/null
+++ b/support/sdk/c/sf.c
@@ -0,0 +1,296 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "sfsource.h"
+#include "serialsource.h"
+
+serial_source src;
+int server_socket;
+int packets_read, packets_written, num_clients;
+
+struct client_list
+{
+  struct client_list *next;
+  int fd;
+} *clients;
+
+int unix_check(const char *msg, int result)
+{
+  if (result < 0)
+    {
+      perror(msg);
+      exit(2);
+    }
+
+  return result;
+}
+
+void *xmalloc(size_t s)
+{
+  void *p = malloc(s);
+
+  if (!p)
+    {
+      fprintf(stderr, "out of memory\n");
+      exit(2);
+    }
+  return p;
+}
+
+void fd_wait(fd_set *fds, int *maxfd, int fd)
+{
+  if (fd > *maxfd)
+    *maxfd = fd;
+  FD_SET(fd, fds);
+}
+
+void pstatus(void)
+{
+  printf("clients %d, read %d, wrote %d\n", num_clients, packets_read,
+	 packets_written);
+}
+
+void forward_packet(const void *packet, int len);
+
+
+void add_client(int fd)
+{
+  struct client_list *c = xmalloc(sizeof *c);
+
+  c->next = clients;
+  clients = c;
+  num_clients++;
+  pstatus();
+
+  c->fd = fd;
+}
+
+void rem_client(struct client_list **c)
+{
+  struct client_list *dead = *c;
+
+  *c = dead->next;
+  num_clients--;
+  pstatus();
+  close(dead->fd);
+  free(dead);
+}
+
+void new_client(int fd)
+{
+  if (init_sf_source(fd) < 0)
+    close(fd);
+  else
+    add_client(fd);
+}
+
+void check_clients(fd_set *fds)
+{
+  struct client_list **c;
+
+  for (c = &clients; *c; )
+    {
+      int next = 1;
+
+      if (FD_ISSET((*c)->fd, fds))
+	{
+	  int len;
+	  const void *packet = read_sf_packet((*c)->fd, &len);
+
+	  if (packet)
+	    {
+	      forward_packet(packet, len);
+	      free((void *)packet);
+	    }
+	  else
+	    {
+	      rem_client(c);
+	      next = 0;
+	    }
+	}
+      if (next)
+	c = &(*c)->next;
+    }
+}
+
+void wait_clients(fd_set *fds, int *maxfd)
+{
+  struct client_list *c;
+
+  for (c = clients; c; c = c->next)
+    fd_wait(fds, maxfd, c->fd);
+}
+
+void dispatch_packet(const void *packet, int len)
+{
+  struct client_list **c;
+
+  for (c = &clients; *c; )
+    if (write_sf_packet((*c)->fd, packet, len) >= 0)
+      c = &(*c)->next;
+    else
+      rem_client(c);
+}
+
+void open_server_socket(int port)
+{
+  struct sockaddr_in me;
+  int opt;
+
+  server_socket = unix_check("socket", socket(AF_INET, SOCK_STREAM, 0));
+  unix_check("socket", fcntl(server_socket, F_SETFL, O_NONBLOCK));
+  memset(&me, 0, sizeof me);
+  me.sin_family = AF_INET;
+  me.sin_port = htons(port);
+
+  opt = 1;
+  unix_check("setsockopt", setsockopt(server_socket, SOL_SOCKET, SO_REUSEADDR,
+				     (char *)&opt, sizeof(opt)));
+                                                                           
+  unix_check("bind", bind(server_socket, (struct sockaddr *)&me, sizeof me));
+  unix_check("listen", listen(server_socket, 5));
+}
+
+void check_new_client(void)
+{
+  int clientfd = accept(server_socket, NULL, NULL);
+
+  if (clientfd >= 0)
+    new_client(clientfd);
+}
+
+
+
+
+
+void stderr_msg(serial_source_msg problem)
+{
+  static char *msgs[] = {
+    "unknown_packet_type",
+    "ack_timeout"	,
+    "sync"	,
+    "too_long"	,
+    "too_short"	,
+    "bad_sync"	,
+    "bad_crc"	,
+    "closed"	,
+    "no_memory"	,
+    "unix_error"
+  };
+
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+void open_serial(const char *dev, int baud)
+{
+    char ldev[80]; 
+#ifdef __CYGWIN__
+    int portnum;
+    if (strncasecmp(dev, "COM", 3) == 0)
+      {
+	fprintf(stderr, "Warning: you're attempting to open a Windows rather that a Cygwin device.  Retrying with "); 
+	portnum=atoi(dev+3);
+	sprintf(ldev, "/dev/ttyS%d",portnum-1);
+	fprintf(stderr,ldev);
+	fprintf(stderr, "\n");
+      } 
+    else
+#endif
+    strcpy(ldev, dev); 
+
+  src = open_serial_source(ldev, baud, 1, stderr_msg);
+  if (!src)
+    {
+      fprintf(stderr, "Couldn't open serial port at %s:%d\n", dev, baud);
+      exit(1);
+    }
+}
+
+void check_serial(void)
+{
+  int len;
+  const unsigned char *packet = read_serial_packet(src, &len);
+
+  if (packet)
+    {
+      packets_read++;
+      dispatch_packet(packet, len);
+      free((void *)packet);
+    }
+}
+
+void forward_packet(const void *packet, int len)
+{
+  int ok = write_serial_packet(src, packet, len);
+
+  packets_written++;
+  if (ok < 0)
+    exit(2);
+  if (ok > 0)
+    fprintf(stderr, "Note: write failed\n");
+}
+
+int main(int argc, char **argv)
+{
+  int serfd;
+
+  if (argc != 4)
+    {
+      fprintf(stderr,
+	      "Usage: %s    - act as a serial forwarder on \n"
+	      "(listens to serial port  at baud rate )\n" ,
+	      argv[0]);
+      exit(2);
+    }
+
+  if (signal(SIGPIPE, SIG_IGN) == SIG_ERR)
+    fprintf(stderr, "Warning: failed to ignore SIGPIPE.\n");
+
+  open_serial(argv[2], platform_baud_rate(argv[3]));
+  serfd = serial_source_fd(src);
+  open_server_socket(atoi(argv[1]));
+
+  for (;;)
+    {
+      fd_set rfds;
+      int maxfd = -1;
+      struct timeval zero;
+      int serial_empty;
+      int ret;
+
+      zero.tv_sec = zero.tv_usec = 0;
+
+      FD_ZERO(&rfds);
+      fd_wait(&rfds, &maxfd, serfd);
+      fd_wait(&rfds, &maxfd, server_socket);
+      wait_clients(&rfds, &maxfd);
+
+      serial_empty = serial_source_empty(src);
+      if (serial_empty)
+	ret = select(maxfd + 1, &rfds, NULL, NULL, NULL);
+      else
+	{
+	  ret = select(maxfd + 1, &rfds, NULL, NULL, &zero);
+	  check_serial();
+	}
+      if (ret >= 0)
+	{
+	  if (FD_ISSET(serfd, &rfds))
+	    check_serial();
+
+	  if (FD_ISSET(server_socket, &rfds))
+	    check_new_client();
+
+	  check_clients(&rfds);
+	}
+    }
+}
diff --git a/support/sdk/c/sflisten.c b/support/sdk/c/sflisten.c
new file mode 100644
index 00000000..845780c6
--- /dev/null
+++ b/support/sdk/c/sflisten.c
@@ -0,0 +1,35 @@
+#include 
+#include 
+
+#include "sfsource.h"
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s   - dump packets from a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      const unsigned char *packet = read_sf_packet(fd, &len);
+
+      if (!packet)
+	exit(0);
+      for (i = 0; i < len; i++)
+	printf("%02x ", packet[i]);
+      putchar('\n');
+      fflush(stdout);
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/sfsend.c b/support/sdk/c/sfsend.c
new file mode 100644
index 00000000..73043152
--- /dev/null
+++ b/support/sdk/c/sfsend.c
@@ -0,0 +1,47 @@
+#include 
+#include 
+#include 
+
+#include "sfsource.h"
+
+void send_packet(int fd, char **bytes, int count)
+{
+  int i;
+  unsigned char *packet;
+
+  packet = malloc(count);
+  if (!packet)
+    exit(2);
+
+  for (i = 0; i < count; i++)
+    packet[i] = strtol(bytes[i], NULL, 0);
+      
+  fprintf(stderr,"Sending ");
+  for (i = 0; i < count; i++)
+    fprintf(stderr, " %02x", packet[i]);
+  fprintf(stderr, "\n");
+
+  write_sf_packet(fd, packet, count);
+}
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc < 4)
+    {
+      fprintf(stderr, "Usage: %s    - send a raw packet to a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+
+  send_packet(fd, argv + 3, argc - 3);
+
+  close(fd);
+}
diff --git a/support/sdk/c/sfsource.c b/support/sdk/c/sfsource.c
new file mode 100644
index 00000000..0ab01e3a
--- /dev/null
+++ b/support/sdk/c/sfsource.c
@@ -0,0 +1,161 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "sfsource.h"
+
+int saferead(int fd, void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = read(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+	continue;
+      if (n == -1)
+	return -1;
+      if (n == 0)
+	return actual;
+
+      count -= n;
+      actual += n;
+      buffer += n;
+    }
+  return actual;
+}
+
+int safewrite(int fd, const void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = write(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+	continue;
+      if (n == -1)
+	return -1;
+
+      count -= n;
+      actual += n;
+      buffer += n;
+    }
+  return actual;
+}
+
+int open_sf_source(const char *host, int port)
+/* Returns: file descriptor for serial forwarder at host:port
+ */
+{
+  int fd = socket(AF_INET, SOCK_STREAM, 0);
+  struct hostent *entry;
+  struct sockaddr_in addr;
+
+  if (fd < 0)
+    return fd;
+
+  entry = gethostbyname(host);
+  if (!entry)
+    {
+      close(fd);
+      return -1;
+    }      
+
+  addr.sin_family = entry->h_addrtype;
+  memcpy(&addr.sin_addr, entry->h_addr, entry->h_length);
+  addr.sin_port = htons(port);
+  if (connect(fd, (struct sockaddr *)&addr, sizeof addr) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  if (init_sf_source(fd) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  return fd;
+}
+
+int init_sf_source(int fd)
+/* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder 
+     protocol. Use this if you obtain your file descriptor from some other
+     source than open_sf_source (e.g., you're a server)
+   Returns: 0 if it is, -1 otherwise
+ */
+{
+  char check[2], us[2];
+  int version;
+
+  /* Indicate version and check if a TinyOS 2.0 serial forwarder on the
+     other end */
+  us[0] = 'U'; us[1] = ' ';
+  if (safewrite(fd, us, 2) != 2 ||
+      saferead(fd, check, 2) != 2 ||
+      check[0] != 'U')
+    return -1;
+
+  version = check[1];
+  if (us[1] < version)
+    version = us[1];
+
+  /* Add other cases here for later protocol versions */
+  switch (version)
+    {
+    case ' ': break;
+    default: return -1; /* not a valid version */
+    }
+
+  return 0;
+}
+
+void *read_sf_packet(int fd, int *len)
+/* Effects: reads packet from serial forwarder on file descriptor fd
+   Returns: the packet read (in newly allocated memory), and *len is
+     set to the packet length, or NULL for failure
+*/
+{
+  unsigned char l;
+  void *packet;
+
+  if (saferead(fd, &l, 1) != 1)
+    return NULL;
+
+  packet = malloc(l);
+  if (!packet)
+    return NULL;
+
+  if (saferead(fd, packet, l) != l)
+    {
+      free(packet);
+      return NULL;
+    }
+  *len = l;
+  
+  return packet;
+}
+
+int write_sf_packet(int fd, const void *packet, int len)
+/* Effects: writes len byte packet to serial forwarder on file descriptor
+     fd
+   Returns: 0 if packet successfully written, -1 otherwise
+*/
+{
+  unsigned char l = len;
+
+  if (safewrite(fd, &l, 1) != 1 ||
+      safewrite(fd, packet, l) != l)
+    return -1;
+
+  return 0;
+}
diff --git a/support/sdk/c/sfsource.h b/support/sdk/c/sfsource.h
new file mode 100644
index 00000000..98f7302e
--- /dev/null
+++ b/support/sdk/c/sfsource.h
@@ -0,0 +1,28 @@
+#ifndef SFSOURCE_H
+#define SFSOURCE_H
+
+int open_sf_source(const char *host, int port);
+/* Returns: file descriptor for TinyOS 2.0 serial forwarder at host:port, or
+     -1 for failure
+ */
+
+int init_sf_source(int fd);
+/* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder 
+     protocol. Use this if you obtain your file descriptor from some other
+     source than open_sf_source (e.g., you're a server)
+   Returns: 0 if it is, -1 otherwise
+ */
+
+void *read_sf_packet(int fd, int *len);
+/* Effects: reads packet from serial forwarder on file descriptor fd
+   Returns: the packet read (in newly allocated memory), and *len is
+     set to the packet length
+*/
+
+int write_sf_packet(int fd, const void *packet, int len);
+/* Effects: writes len byte packet to serial forwarder on file descriptor
+     fd
+   Returns: 0 if packet successfully written, -1 otherwise
+*/
+
+#endif
diff --git a/support/sdk/java/.cvsignore b/support/sdk/java/.cvsignore
new file mode 100644
index 00000000..e9538cef
--- /dev/null
+++ b/support/sdk/java/.cvsignore
@@ -0,0 +1 @@
+tinyos.jar
diff --git a/support/sdk/java/Makefile b/support/sdk/java/Makefile
new file mode 100644
index 00000000..cfa76449
--- /dev/null
+++ b/support/sdk/java/Makefile
@@ -0,0 +1,19 @@
+# Top-level Makefile for tools/java
+
+SUBDIRS = net
+
+JAVADOCDIR = ../../../doc/html/tos-javasdk-javadoc
+
+ROOT = .
+include $(ROOT)/Makefile.include
+
+tinyos.jar: all
+	rm -f tinyos.jar
+	@# create the jar, as update requires it to exist. we use a
+	@# .class file we assume always exists
+	find . -name '*.class' | xargs jar cf tinyos.jar
+
+javadoc: all
+	rm -rf $(JAVADOCDIR)
+	mkdir -p $(JAVADOCDIR)
+	javadoc -d $(JAVADOCDIR) `find -name *.java`
diff --git a/support/sdk/java/Makefile.include b/support/sdk/java/Makefile.include
new file mode 100644
index 00000000..f3f97633
--- /dev/null
+++ b/support/sdk/java/Makefile.include
@@ -0,0 +1,114 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Contains the shared make rules for the tools/java tree.
+#
+# In each directory, create a Makefile that includes the lines
+#    ROOT = 
+#    include $(ROOT)/Makefile.include
+#
+# By default the Makefile will compile all .java source code in the
+# current directory. You may also specify the following flags in 
+# your Makefile, *before* including Makefile.include:
+#
+#   SUBDIRS = dir1 dir2 ...
+#     Specify a list of subdirectories that 'make' should descend into
+#
+#   INITIAL_TARGETS = target1 target2 ...
+#     Specify build targets to be compiled before compiling Java classes
+#
+#   FINAL_TARGETS = target1 target2 ...
+#     Specify build targets to be compiled after compiling Java classes
+#
+#   OTHER_CLEAN = target1 target2 ...
+#     Specify other targets to be executed when 'make clean' is run
+#
+# NOTE: this Makefile requires GNU make, as well as a number of 
+#       standard UNIX shell tools.
+#
+######################################################################
+
+SRC = $(wildcard *.java)
+JAVA = $(SRC)
+CLASSES = $(JAVA:.java=.class)
+
+all: here subdirs $(FINAL_TARGETS)
+
+# figure out useful variables
+PWD = $(shell pwd)
+
+# set compiler command
+ifeq ($(JAVAC)_x, _x)
+JAVAC = javac
+endif
+
+# general rule for java files
+%.class: %.java
+	$(JAVAC) $<
+
+ifeq ($(SUBDIRS)_x, _x)
+
+subdirs: here
+
+subdirs-clean: here-clean
+
+else
+subdirs: here
+	@for i in $(SUBDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $(PWD)/$$i; \
+		fi; \
+	done
+
+subdirs-clean: here-clean
+	@for i in $(SUBDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i clean; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $$i; \
+		fi; \
+	done
+
+subdirs-install: 
+	@for i in $(INSTALLDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i install; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $$i; \
+		fi; \
+	done
+
+endif
+
+here: printdir $(INITIAL_TARGETS) $(JAVA) $(CLASSES) FORCE
+
+printdir:
+	@echo "... $(PWD)"; 
+
+here-clean: FORCE
+	@rm -f *.class *~ javacore*.txt
+	@echo "cleaning $(PWD)" 
+
+clean: here-clean subdirs-clean $(OTHER_CLEAN)
+
+install: subdirs-install
+# some phony targets - FORCE forces a command to be run on all dependencies,
+# and .PHONY prevents badness if a phony target coincides with a filename
+
+FORCE:
+
+.PHONY: all $(SUBDIRS) $(SUBDIRSCLEAN) clean
diff --git a/support/sdk/java/net/Makefile b/support/sdk/java/net/Makefile
new file mode 100644
index 00000000..676747ac
--- /dev/null
+++ b/support/sdk/java/net/Makefile
@@ -0,0 +1,6 @@
+# Top-level Makefile for tools/java 
+
+SUBDIRS = tinyos
+
+ROOT = ..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/Makefile b/support/sdk/java/net/tinyos/Makefile
new file mode 100644
index 00000000..9dd7b5e5
--- /dev/null
+++ b/support/sdk/java/net/tinyos/Makefile
@@ -0,0 +1,7 @@
+# Top-level Makefile for tools/java 
+
+# We do all subdirectories (to allow for optional package installation)
+SUBDIRS = packet message sf $(shell find . -maxdepth 1 -type d | tail -n +2 | grep -v /CVS | grep -v packet | grep -v message | grep -v sf)
+
+ROOT = ../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/comm/ByteQueue.java b/support/sdk/java/net/tinyos/comm/ByteQueue.java
new file mode 100644
index 00000000..3f875c8e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/ByteQueue.java
@@ -0,0 +1,122 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+public class ByteQueue
+{
+  byte buffer[];
+  int nbegin;
+  int nend;
+
+  int num_free_back()
+  {
+    return buffer.length - nend;
+  }
+
+  void left_justify_into( byte dest[] )
+  {
+    for( int i=nbegin,j=0; i 0 )
+      return ((int)buffer[nbegin++]) & 255;
+    return -1;
+  }
+
+  public int pop_front( byte b[] )
+  {
+    return pop_front( b, 0, b.length );
+  }
+
+  public int pop_front( byte b[], int off, int len )
+  {
+    int n = available();
+    if( n > len )
+      n = len;
+    int bend = off + len;
+    while( off < bend )
+      b[off++] = buffer[nbegin++];
+    return n;
+  }
+
+  public ByteQueue()
+  {
+    this(64);
+  }
+
+  public ByteQueue( int initial_buffer_length )
+  {
+    buffer = new byte[ initial_buffer_length ];
+    nbegin = 0;
+    nend = 0;
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/Makefile b/support/sdk/java/net/tinyos/comm/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/comm/NativeSerial.java b/support/sdk/java/net/tinyos/comm/NativeSerial.java
new file mode 100644
index 00000000..6b370c23
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/NativeSerial.java
@@ -0,0 +1,153 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version: 1.3.21
+ *
+ * Do not make changes to this file unless you know what you are doing--modify
+ * the SWIG interface file instead.
+ * ----------------------------------------------------------------------------- */
+
+package net.tinyos.comm;
+
+
+public class NativeSerial {
+  private long swigCPtr;
+  protected boolean swigCMemOwn;
+
+  protected NativeSerial(long cPtr, boolean cMemoryOwn) {
+    swigCMemOwn = cMemoryOwn;
+    swigCPtr = cPtr;
+  }
+
+  protected NativeSerial() {
+    this(0, false);
+  }
+
+  protected void finalize() {
+    delete();
+  }
+
+  public void delete() {
+    if(swigCPtr != 0 && swigCMemOwn) {
+      swigCMemOwn = false;
+      TOSCommJNI.delete_NativeSerial(swigCPtr);
+    }
+    swigCPtr = 0;
+  }
+
+  protected static long getCPtr(NativeSerial obj) {
+    return (obj == null) ? 0 : obj.swigCPtr;
+  }
+
+  public void setSerialPortParams(int baudrate, int databits, int stopbits, boolean parity) {
+    TOSCommJNI.NativeSerial_setSerialPortParams(swigCPtr, baudrate, databits, stopbits, parity);
+  }
+
+  public int getBaudRate() {
+    return TOSCommJNI.NativeSerial_getBaudRate(swigCPtr);
+  }
+
+  public int getDataBits() {
+    return TOSCommJNI.NativeSerial_getDataBits(swigCPtr);
+  }
+
+  public int getStopBits() {
+    return TOSCommJNI.NativeSerial_getStopBits(swigCPtr);
+  }
+
+  public boolean getParity() {
+    return TOSCommJNI.NativeSerial_getParity(swigCPtr);
+  }
+
+  public void notifyOn(int event, boolean enable) {
+    TOSCommJNI.NativeSerial_notifyOn(swigCPtr, event, enable);
+  }
+
+  public boolean isNotifyOn(int event) {
+    return TOSCommJNI.NativeSerial_isNotifyOn(swigCPtr, event);
+  }
+
+  public boolean waitForEvent() {
+    return TOSCommJNI.NativeSerial_waitForEvent(swigCPtr);
+  }
+
+  public boolean cancelWait() {
+    return TOSCommJNI.NativeSerial_cancelWait(swigCPtr);
+  }
+
+  public boolean didEventOccur(int event) {
+    return TOSCommJNI.NativeSerial_didEventOccur(swigCPtr, event);
+  }
+
+  public void setDTR(boolean high) {
+    TOSCommJNI.NativeSerial_setDTR(swigCPtr, high);
+  }
+
+  public void setRTS(boolean high) {
+    TOSCommJNI.NativeSerial_setRTS(swigCPtr, high);
+  }
+
+  public boolean isDTR() {
+    return TOSCommJNI.NativeSerial_isDTR(swigCPtr);
+  }
+
+  public boolean isRTS() {
+    return TOSCommJNI.NativeSerial_isRTS(swigCPtr);
+  }
+
+  public boolean isCTS() {
+    return TOSCommJNI.NativeSerial_isCTS(swigCPtr);
+  }
+
+  public boolean isDSR() {
+    return TOSCommJNI.NativeSerial_isDSR(swigCPtr);
+  }
+
+  public boolean isRI() {
+    return TOSCommJNI.NativeSerial_isRI(swigCPtr);
+  }
+
+  public boolean isCD() {
+    return TOSCommJNI.NativeSerial_isCD(swigCPtr);
+  }
+
+  public void sendBreak(int millis) {
+    TOSCommJNI.NativeSerial_sendBreak(swigCPtr, millis);
+  }
+
+  public NativeSerial(String portname) {
+    this(TOSCommJNI.new_NativeSerial(portname), true);
+  }
+
+  public void close() {
+    // We can come here with swigCptr == 0 from finalize if the C++
+    // constructor throws an exception. Ideally, we should guard all
+    // methods in the C++ code, but this is simpler.
+    if (swigCPtr != 0)
+      TOSCommJNI.NativeSerial_close(swigCPtr);
+  }
+
+  public int available() {
+    return TOSCommJNI.NativeSerial_available(swigCPtr);
+  }
+
+  public int read() {
+    return TOSCommJNI.NativeSerial_read__SWIG_0(swigCPtr);
+  }
+
+  public int read(byte[] buffer_out, int off, int len) {
+    return TOSCommJNI.NativeSerial_read__SWIG_1(swigCPtr, buffer_out, off, len);
+  }
+
+  public int write(int b) {
+    return TOSCommJNI.NativeSerial_write__SWIG_0(swigCPtr, b);
+  }
+
+  public int write(byte[] buffer_in, int off, int len) {
+    return TOSCommJNI.NativeSerial_write__SWIG_1(swigCPtr, buffer_in, off, len);
+  }
+
+  public static String getTOSCommMap() {
+    return TOSCommJNI.NativeSerial_getTOSCommMap();
+  }
+
+}
diff --git a/support/sdk/java/net/tinyos/comm/SerialPort.java b/support/sdk/java/net/tinyos/comm/SerialPort.java
new file mode 100644
index 00000000..995959c6
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPort.java
@@ -0,0 +1,77 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+import java.io.*;
+
+public interface SerialPort
+{
+  public static final int STOPBITS_1 = 1;
+  public static final int STOPBITS_2 = 2;
+  public static final int STOPBITS_1_5 = 3;
+
+  /*
+  public static final int FLOWCONTROL_NONE = 0;
+  public static final int FLOWCONTROL_RTSCTS_IN = 1;
+  public static final int FLOWCONTROL_RTSCTS_OUT = 2;
+  public static final int FLOWCONTROL_XONXOFF_IN = 4;
+  public static final int FLOWCONTROL_XONXOFF_OUT = 8;
+  */
+
+  public InputStream getInputStream() throws IOException;
+  public OutputStream getOutputStream() throws IOException;
+
+  public void close();
+
+  public void setSerialPortParams( 
+    int baudrate, int dataBits, int stopBits, boolean parity )
+    throws UnsupportedCommOperationException;
+  public int getBaudRate();
+  public int getDataBits();
+  public int getStopBits();
+  public boolean getParity();
+
+  public void sendBreak( int millis );
+
+  /*
+  public void setFlowControlMode( int flowcontrol )
+    throws UnsupportedCommOperationException;
+  public int getFlowControlMode();
+  */
+
+  public void setDTR( boolean dtr );
+  public void setRTS( boolean rts );
+  public boolean isDTR();
+  public boolean isRTS();
+  public boolean isCTS();
+  public boolean isDSR();
+  public boolean isRI();
+  public boolean isCD();
+
+  public void addListener( SerialPortListener l );
+  public void removeListener( SerialPortListener l );
+  public void notifyOn( int serialEvent, boolean enable );
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/SerialPortEvent.java b/support/sdk/java/net/tinyos/comm/SerialPortEvent.java
new file mode 100644
index 00000000..30b47b28
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPortEvent.java
@@ -0,0 +1,55 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+public class SerialPortEvent extends java.util.EventObject
+{
+  public final static int DATA_AVAILABLE = (1<<0);
+  public final static int OUTPUT_EMPTY = (1<<1);
+  public final static int CTS = (1<<2);
+  public final static int DSR = (1<<3);
+  public final static int RING_INDICATOR = (1<<4);
+  public final static int CARRIER_DETECT = (1<<5);
+  public final static int OVERRUN_ERROR = (1<<6);
+  public final static int PARITY_ERROR = (1<<7);
+  public final static int FRAMING_ERROR = (1<<8);
+  public final static int BREAK_INTERRUPT = (1<<9);
+
+  public SerialPort port;
+  int eventType;
+
+  public SerialPortEvent( SerialPort _port, int _eventType )
+  {
+    super(_port);
+    port = _port;
+    eventType = _eventType;
+  }
+
+  public int getEventType()
+  {
+    return eventType;
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/SerialPortListener.java b/support/sdk/java/net/tinyos/comm/SerialPortListener.java
new file mode 100644
index 00000000..39bd1550
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPortListener.java
@@ -0,0 +1,31 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+public interface SerialPortListener
+{
+  public void serialEvent( SerialPortEvent ev );
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/TOSCommJNI.java b/support/sdk/java/net/tinyos/comm/TOSCommJNI.java
new file mode 100644
index 00000000..efe9d61a
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/TOSCommJNI.java
@@ -0,0 +1,44 @@
+package net.tinyos.comm;
+
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version: 1.3.21
+ *
+ * Do not make changes to this file unless you know what you are doing--modify
+ * the SWIG interface file instead.
+ * ----------------------------------------------------------------------------- */
+
+
+class TOSCommJNI {
+
+  static { TOSCommLibraryLoader.load(); }
+
+  public final static native void NativeSerial_setSerialPortParams(long jarg1, int jarg2, int jarg3, int jarg4, boolean jarg5);
+  public final static native int NativeSerial_getBaudRate(long jarg1);
+  public final static native int NativeSerial_getDataBits(long jarg1);
+  public final static native int NativeSerial_getStopBits(long jarg1);
+  public final static native boolean NativeSerial_getParity(long jarg1);
+  public final static native void NativeSerial_notifyOn(long jarg1, int jarg2, boolean jarg3);
+  public final static native boolean NativeSerial_isNotifyOn(long jarg1, int jarg2);
+  public final static native boolean NativeSerial_waitForEvent(long jarg1);
+  public final static native boolean NativeSerial_cancelWait(long jarg1);
+  public final static native boolean NativeSerial_didEventOccur(long jarg1, int jarg2);
+  public final static native void NativeSerial_setDTR(long jarg1, boolean jarg2);
+  public final static native void NativeSerial_setRTS(long jarg1, boolean jarg2);
+  public final static native boolean NativeSerial_isDTR(long jarg1);
+  public final static native boolean NativeSerial_isRTS(long jarg1);
+  public final static native boolean NativeSerial_isCTS(long jarg1);
+  public final static native boolean NativeSerial_isDSR(long jarg1);
+  public final static native boolean NativeSerial_isRI(long jarg1);
+  public final static native boolean NativeSerial_isCD(long jarg1);
+  public final static native void NativeSerial_sendBreak(long jarg1, int jarg2);
+  public final static native long new_NativeSerial(String jarg1);
+  public final static native void delete_NativeSerial(long jarg1);
+  public final static native void NativeSerial_close(long jarg1);
+  public final static native int NativeSerial_available(long jarg1);
+  public final static native int NativeSerial_read__SWIG_0(long jarg1);
+  public final static native int NativeSerial_read__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4);
+  public final static native int NativeSerial_write__SWIG_0(long jarg1, int jarg2);
+  public final static native int NativeSerial_write__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4);
+  public final static native String NativeSerial_getTOSCommMap();
+}
diff --git a/support/sdk/java/net/tinyos/comm/TOSCommLibraryLoader.java b/support/sdk/java/net/tinyos/comm/TOSCommLibraryLoader.java
new file mode 100644
index 00000000..626e2c4a
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/TOSCommLibraryLoader.java
@@ -0,0 +1,46 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+public class TOSCommLibraryLoader
+{
+  static void load()
+  {
+    try
+    {
+      System.loadLibrary("toscomm");
+    }
+    catch( Throwable t )
+    {
+      System.err.println(
+        "The toscomm JNI library was not found.\n"+
+	"Check that your tinyos-tools package is installed and try\n"+
+	"rerunning tos-install-jni.\n"+
+	"Aborting.");
+      System.exit(1);
+    }
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/TOSSerial.java b/support/sdk/java/net/tinyos/comm/TOSSerial.java
new file mode 100644
index 00000000..ee292c52
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/TOSSerial.java
@@ -0,0 +1,292 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+import java.io.*;
+import java.util.*;
+import java.util.regex.*;
+
+public class TOSSerial extends NativeSerial implements SerialPort
+{
+  class EventDispatcher extends Thread
+  {
+    boolean m_run;
+
+    public EventDispatcher()
+    {
+      m_run = true;
+    }
+
+    void dispatch_event( int event )
+    {
+      if( didEventOccur(event) )
+      {
+	SerialPortEvent ev = new SerialPortEvent( TOSSerial.this, event );
+        synchronized(m_listeners) {
+          Iterator i = m_listeners.iterator();
+          while( i.hasNext() )
+            ((SerialPortListener)i.next()).serialEvent( ev );
+        }
+      }
+    }
+
+    public void run()
+    {
+      while( m_run )
+      {
+	if( waitForEvent() )
+	{
+	  if( m_run )
+	  {
+	    dispatch_event( SerialPortEvent.BREAK_INTERRUPT );
+	    dispatch_event( SerialPortEvent.CARRIER_DETECT );
+	    dispatch_event( SerialPortEvent.CTS );
+	    dispatch_event( SerialPortEvent.DATA_AVAILABLE );
+	    dispatch_event( SerialPortEvent.DSR );
+	    dispatch_event( SerialPortEvent.FRAMING_ERROR );
+	    dispatch_event( SerialPortEvent.OVERRUN_ERROR );
+	    dispatch_event( SerialPortEvent.OUTPUT_EMPTY );
+	    dispatch_event( SerialPortEvent.PARITY_ERROR );
+	    dispatch_event( SerialPortEvent.RING_INDICATOR );
+	  }
+	}
+      }
+    }
+
+    public void close()
+    {
+      m_run = false;
+      cancelWait();
+    }
+  }
+
+
+  class SerialInputStream extends InputStream
+  {
+    ByteQueue bq = new ByteQueue(128);
+
+    protected void gather()
+    {
+      int navail = TOSSerial.this.available();
+      if( navail > 0 )
+      {
+        byte buffer[] = new byte[navail];
+        bq.push_back( buffer, 0, TOSSerial.this.read( buffer, 0, navail ) );
+      }
+    }
+
+    public int read()
+    {
+      gather();
+      return bq.pop_front();
+    }
+
+    public int read( byte[] b )
+    {
+      gather();
+      return bq.pop_front(b);
+    }
+
+    public int read( byte[] b, int off, int len )
+    {
+      gather();
+      return bq.pop_front(b,off,len);
+    }
+
+    public int available()
+    {
+      gather();
+      return bq.available();
+    }
+  }
+
+
+  class SerialOutputStream extends OutputStream
+  {
+    public void write( int b )
+    {
+      TOSSerial.this.write(b);
+    }
+
+    public void write( byte[] b )
+    {
+      TOSSerial.this.write(b,0,b.length);
+    }
+
+    public void write( byte[] b, int off, int len )
+    {
+      int nwritten = 0;
+      while( nwritten < len )
+	nwritten += TOSSerial.this.write( b, nwritten, len-nwritten );
+    }
+  }
+
+
+  SerialInputStream m_in;
+  SerialOutputStream m_out;
+  Vector m_listeners = new Vector();
+  EventDispatcher m_dispatch;
+
+  static String map_portname( String mapstr, String portname )
+  {
+    // mapstr is of the form "from1=to1:from2=to2"
+
+    // If "from", "to", and "portname" all end port numbers, then the ports in
+    // "from" and "to" are used as a bias for the port in "portname", appended
+    // to the "to" string (without its original terminating digits).  If more
+    // than one port mapping matches, the one with the smallest non-negative
+    // port number wins.
+
+    // For instance, if
+    //   mapstr="com1=COM1:com10=\\.\COM10"
+    // then
+    //   com1 => COM1
+    //   com3 => COM3
+    //   com10 => \\.\COM10
+    //   com12 => \\.\COM12
+    // or if
+    //   mapstr="com1=/dev/ttyS0:usb1=/dev/ttyS100"
+    // then
+    //   com1 => /dev/ttyS0
+    //   com3 => /dev/ttyS2
+    //   usb1 => /dev/ttyS100
+    //   usb3 => /dev/ttyS102
+
+    String maps[] = mapstr.split(":");
+    Pattern pkv = Pattern.compile("(.*?)=(.*?)");
+    Pattern pnum = Pattern.compile("(.*\\D)(\\d+)");
+
+    Matcher mport = pnum.matcher(portname);
+    int match_distance = -1;
+    String str_port_to = null;
+
+    for( int i=0; i= 0) && ((ndist < match_distance) || (match_distance == -1)) )
+	  {
+	    match_distance = ndist;
+	    str_port_to = mto.group(1) + nport_to;
+	  }
+	}
+	else if( mkv.group(1).equalsIgnoreCase( portname ) )
+	{
+	  match_distance = 0;
+	  str_port_to = mkv.group(2);
+	}
+      }
+    }
+
+    return (str_port_to == null) ? portname : str_port_to;
+  }
+
+  public TOSSerial( String portname )
+  {
+    super( map_portname( NativeSerial.getTOSCommMap(), portname ) );
+    m_in = new SerialInputStream();
+    m_out = new SerialOutputStream();
+    m_dispatch = new EventDispatcher();
+    m_dispatch.start();
+  }
+
+  public void addListener( SerialPortListener l )
+  {
+    synchronized(m_listeners) {
+      if( !m_listeners.contains(l) )
+        m_listeners.add(l);
+    }
+  }
+
+  public void removeListener( SerialPortListener l )
+  {
+    synchronized(m_listeners) {
+      m_listeners.remove(l);
+    }
+  }
+
+  public InputStream getInputStream()
+  {
+    return m_in;
+  }
+
+  public OutputStream getOutputStream()
+  {
+    return m_out;
+  }
+
+  public void close()
+  {
+    if( m_dispatch != null )
+      m_dispatch.close();
+
+    try { if( m_dispatch != null ) m_dispatch.join(); }
+    catch( InterruptedException e ) { }
+
+    super.close();
+
+    try
+    {
+      if( m_in != null )
+	m_in.close();
+
+      if( m_out != null )
+	m_out.close();
+    }
+    catch( IOException e )
+    {
+    }
+
+    m_dispatch = null;
+    m_in = null;
+    m_out = null;
+  }
+
+  protected void finalize()
+  {
+    // Be careful what you call here. The object may never have been
+    // created, so the underlying C++ object may not exist, and there's
+    // insufficient guarding to avoid a core dump. If you call other
+    // methods than super.close() or super.finalize(), be sure to
+    // add an if (swigCptr != 0) guard in NativeSerial.java.
+    System.out.println("Java TOSSerial finalize");
+    close();
+    super.finalize();
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java b/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java
new file mode 100644
index 00000000..bc6cc64f
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java
@@ -0,0 +1,40 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.comm;
+
+public class UnsupportedCommOperationException
+  extends Exception
+{
+  public UnsupportedCommOperationException(String str)
+  {
+    super(str);
+  }
+
+  public UnsupportedCommOperationException()
+  {
+    super();
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/message/.cvsignore b/support/sdk/java/net/tinyos/message/.cvsignore
new file mode 100644
index 00000000..bdff3bca
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/.cvsignore
@@ -0,0 +1 @@
+SerialPacket.java
diff --git a/support/sdk/java/net/tinyos/message/Makefile b/support/sdk/java/net/tinyos/message/Makefile
new file mode 100644
index 00000000..567cd7a1
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Makefile
@@ -0,0 +1,12 @@
+# Top-level Makefile for tools/java 
+
+INITIAL_TARGETS = SerialPacket.class
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOSDIR)/lib/serial/Serial.h
+
+SerialPacket.java: $(SERIAL_H)
+	mig -o $@ -java-classname=net.tinyos.message.SerialPacket java $(SERIAL_H) serial_packet -I$(TOSDIR)/types
diff --git a/support/sdk/java/net/tinyos/message/Message.java b/support/sdk/java/net/tinyos/message/Message.java
new file mode 100644
index 00000000..f767f448
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Message.java
@@ -0,0 +1,588 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * Message class (encode/decode tinyos messages).
    
+ *
+ * The base class for encoding and decoding tinyos messages.  Provides
+ * methods to read and write bit fields at an offset for a particular bit
+ * length.  Intended for use by the Java code generated by mig.
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+package net.tinyos.message;
+
+public class Message implements Cloneable {
+
+    /**
+     * The maximum number of characters read from an 8-bit array field
+     * being converted into a Java String.
+     */
+    public static final int MAX_CONVERTED_STRING_LENGTH = 512;
+
+    /** 
+     * The underlying byte array storing the data for this message. 
+     * This is private to enforce access to the data through the accessor
+     * methods in this class, which do bounds checking and manage the
+     * base_offset for embedded messages.
+     */
+    private byte[] data;
+
+    /** 
+     * The base offset into the data. This allows the message data to
+     * exist at some non-zero offset into the actual data.
+     */
+    protected int base_offset;
+
+    /**
+     * The actual length of the message data. Must be less than or
+     * equal to (data.length - base_offset).
+     */
+    protected int data_length;
+
+    /**
+     * The AM type corresponding to this object. Set to -1 if no AM type
+     * is known.
+     */
+    protected int am_type;
+
+    /** Limit no-arg instantiation. */
+    protected Message() {
+    }
+
+    /**
+     * Construct a new message of the given size.
+     * @param data_length The size of the message to create.
+     */
+    protected Message(int data_length) {
+	init(data_length);
+    }
+    protected void init(int data_length) {
+	init(new byte[data_length]);
+    }
+
+    /**
+     * Construct a new message of the given size and base offset.
+     * Allocates a new byte array of size data_length+base_offset.
+     * @param data_length The size of the message to create.
+     * @param base_offset The base offset into the newly created message.
+     */
+    protected Message(int data_length, int base_offset) {
+      init(data_length, base_offset);
+    }
+    protected void init(int data_length, int base_offset) {
+      init(new byte[data_length+base_offset], base_offset);
+    }
+
+    /**
+     * Construct a message using data as the storage.
+     * The length of data determines the length of this message.
+     * @param data the storage for this message
+     */
+    protected Message(byte[] data) {
+	init(data);
+    }
+    protected void init(byte[] data) {
+	init(data, 0);
+    }
+
+    /**
+     * Construct a message using data as the storage.
+     * Use the given base_offset as the base offset into the 
+     * data array. The data length will be (data.length - base_offset).
+     * @param data the storage for this message
+     * @param base_offset the base offset into the data array
+     */
+    protected Message(byte[] data, int base_offset) {
+	init(data, base_offset);
+    }
+    protected void init(byte[] data, int base_offset) {
+	init(data, base_offset, data.length - base_offset);
+    }
+
+    /**
+     * Construct a message using data as the storage.
+     * Use the given base_offset as the base offset into the 
+     * data array, and the specified data length.
+     * @param data the storage for this message
+     * @param base_offset the base offset into the data array
+     * @param data_length the length of the message data
+     */
+    protected Message(byte[] data, int base_offset, int data_length) {
+	init(data, base_offset, data_length);
+    }
+    protected void init(byte[] data, int base_offset, int data_length) {
+	this.data = data;
+	this.base_offset = base_offset;
+	this.data_length = data_length;
+	if (base_offset + data_length > data.length) throw new ArrayIndexOutOfBoundsException("Cannot create Message with base_offset "+base_offset+", data_length "+data_length+" and data array size "+data.length);
+    }
+
+    /**
+     * Construct an embedded message within the given 'msg'.
+     * Use the given base_offset as the base offset into the 
+     * data array, and the specified data length.
+     * @param msg the message to embed this message into
+     * @param base_offset the base offset into the data array
+     * @param data_length the length of the message data
+     */
+    protected Message(Message msg, int base_offset, int data_length) {
+	init(msg, base_offset, data_length);
+    }
+    protected void init(Message msg, int base_offset, int data_length) {
+	init(msg.dataGet(), msg.base_offset+base_offset, data_length);
+    }
+
+    private Message cloneself() {
+	Message copy;
+
+	try {
+	    copy = (Message)super.clone();
+	}
+	catch (CloneNotSupportedException e) {
+	    System.err.println("Message: WARNING: CloneNotSupportedException in cloneself(): "+e);
+	    System.err.println("Message: This is a bug - please contact dgay@intel-research.net");
+	    copy = null;
+	    System.exit(2);
+	}
+	return copy;
+    }
+
+    /**
+     * Clone this Message, including making a copy of its data
+     */
+    public Object clone() {
+	Message copy = cloneself();
+	copy.init((byte[])data.clone(), base_offset, data_length);
+	copy.am_type = this.am_type;
+	return copy;
+    }
+
+    /**
+     * Clone this Message, but give it a new unitialised data array of size
+     * size
+     * @param size size of the new data array
+     */
+    public Message clone(int size) {
+	Message copy = cloneself();
+	copy.init(new byte[size], 0, size);
+	copy.am_type = this.am_type;
+	return copy;
+    }
+
+    /**
+     * Copy new data for this message from 'data'. 
+     * Copies min(data.length, this.data_length) bytes.
+     * @param data the array containing the data to be copied
+     * @exception ArrayIndexOutOfBoundsException if any of
+     * data[0..getData().length - 1] are invalid
+     */
+    public void dataSet(byte[] data) {
+	dataSet(data, 0, this.base_offset, Math.min(this.data_length, data.length));
+    }
+
+    /**
+     * Copy new data for this message from offsetFrom in data to
+     * offsetTo in this message. Copies a total of length bytes
+     * @param data the array containing the data to be copied
+     * @param offsetFrom the offset in data to start copying from
+     * @param offsetTo the offset at which to start copying data into
+     * this message.
+     * @param length bytes are copied.
+     * @exception ArrayIndexOutOfBoundsException if any of
+     * the source or target indices are invalid
+     */
+    public void dataSet(byte[] data, int offsetFrom, int offsetTo, int length) {
+      System.arraycopy(data, offsetFrom, this.data, offsetTo+base_offset, length);
+    }
+
+    /**
+     * Copy new data for this message from the raw data in msg to
+     * offsetTo in this message. Copies a total of msg.dataLength() bytes
+     * @param msg the message containing the data to be copied
+     * @param offsetTo the offset at which to start copying data into
+     * this message.
+     * @exception ArrayIndexOutOfBoundsException if any of
+     * the target indices are invalid
+     */
+    public void dataSet(Message msg, int offsetTo) {
+      System.arraycopy(msg.dataGet(), msg.baseOffset(),
+		       this.data, offsetTo+base_offset,
+		       msg.dataLength());
+    }
+
+    /**
+     * Return the raw byte array representing the data of this message.
+     * Note that only indices in the range
+     * (this.baseOffset(), this.baseOffset()+this.dataLength()) are
+     * valid. 
+     */
+    public byte[] dataGet() {
+	return data;
+    }
+
+    /**
+     * Return the base offset into the data array for this message.
+     */
+    public int baseOffset() {
+        return base_offset;
+    }
+
+    /**
+     * Return the length of the data (in bytes) contained in this message.
+     */
+    public int dataLength() {
+        return data_length;
+    }
+
+    /**
+     * Return the active message type of this message (-1 if unknown)
+     */
+    public int amType() {
+	return am_type;
+    }
+
+    /**
+     * Set the active message type of this message
+     */
+    public void amTypeSet(int type) {
+      this.am_type = type;
+    }
+
+    // Check that length bits from offset are in bounds
+    private void checkBounds(int offset, int length) {
+	if (offset < 0 || length <= 0 || offset + length > (data_length * 8))
+	  throw new ArrayIndexOutOfBoundsException("Message.checkBounds: bad offset ("+offset+") or length ("+length+"), for data_length "+data_length+ " in class " + this.getClass());
+    }
+
+    // Check that value is valid for a bitfield of length length
+    private void checkValue(int length, long value) {
+	if (length != 64 && (value < 0 || value >= 1L << length))
+	    throw new IllegalArgumentException("Message.checkValue: bad length ("+length+" or value ("+value+")");
+    }
+
+    // Unsigned byte read
+    private int ubyte(int offset) {
+	int val = data[base_offset+offset];
+
+	if (val < 0) return val + 256;
+	else return val;
+    }
+
+    // ASSUMES: little endian bits & bytes for the methods without BE, and
+    //   big endian bits & bytes for the methods with BE
+
+    /**
+     * Read the length bit unsigned little-endian int at offset
+     * @param offset bit offset where the unsigned int starts
+     * @param length bit length of the unsigned int
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     */
+    protected long getUIntElement(int offset, int length) {
+	checkBounds(offset, length);
+
+	int byteOffset = offset >> 3;
+	int bitOffset = offset & 7;
+	int shift = 0;
+	long val = 0;
+
+	// all in one byte case
+	if (length + bitOffset <= 8)
+	    return (ubyte(byteOffset) >> bitOffset) & ((1 << length) - 1);
+
+	// get some high order bits
+	if (bitOffset > 0) {
+	    val = ubyte(byteOffset) >> bitOffset;
+	    byteOffset++;
+	    shift += 8 - bitOffset;
+	    length -= 8 - bitOffset;
+	}
+
+	while (length >= 8) {
+	    val |= (long)ubyte(byteOffset++) << shift;
+	    shift += 8;
+	    length -= 8;
+	}
+
+	// data from last byte
+	if (length > 0)
+	    val |= (long)(ubyte(byteOffset) & ((1 << length) - 1)) << shift;
+
+	return val;
+    }
+
+    /**
+     * Set the length bit unsigned little-endian int at offset to val
+     * @param offset bit offset where the unsigned int starts
+     * @param length bit length of the unsigned int
+     * @param val value to set the bit field to
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     * @exception IllegalArgumentException if val is an out-of-range value
+     * for this bitfield
+     */
+    protected void setUIntElement(int offset, int length, long val) {
+	checkBounds(offset, length);
+	//checkValue(length, val);
+
+	int byteOffset = offset >> 3;
+	int bitOffset = offset & 7;
+	int shift = 0;
+
+	// all in one byte case
+	if (length + bitOffset <= 8) {
+	    data[base_offset+byteOffset] = (byte)
+		((ubyte(byteOffset) & ~(((1 << length) - 1) << bitOffset))
+		 | val << bitOffset);
+	    return;
+	}
+
+	// set some high order bits
+	if (bitOffset > 0) {
+	    data[base_offset+byteOffset] = (byte)
+		((ubyte(byteOffset) & ((1 << bitOffset) - 1)) | val << bitOffset);
+	    byteOffset++;
+	    shift += 8 - bitOffset;
+	    length -= 8 - bitOffset;
+	}
+
+	while (length >= 8) {
+	    data[base_offset+(byteOffset++)] = (byte)(val >> shift);
+	    shift += 8;
+	    length -= 8;
+	}
+
+	// data for last byte
+	if (length > 0)
+	    data[base_offset+byteOffset] = (byte)
+		((ubyte(byteOffset) & ~((1 << length) - 1)) | val >> shift);
+    }
+
+    /**
+     * Read the length bit signed little-endian int at offset
+     * @param offset bit offset where the signed int starts
+     * @param length bit length of the signed int
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     */
+    protected long getSIntElement(int offset, int length)
+	throws ArrayIndexOutOfBoundsException {
+	long val = getUIntElement(offset, length);
+
+	if (length == 64)
+	    return val;
+
+	if ((val & 1L << (length - 1)) != 0)
+	    return val - (1L << length);
+
+	return val;
+    }
+
+    /**
+     * Set the length bit signed little-endian int at offset to val
+     * @param offset bit offset where the signed int starts
+     * @param length bit length of the signed int
+     * @param value value to set the bit field to
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     * @exception IllegalArgumentException if val is an out-of-range value
+     * for this bitfield
+     */ 
+   protected void setSIntElement(int offset, int length, long value)
+	throws ArrayIndexOutOfBoundsException {
+	if (length != 64 && value >= 1L << (length - 1))
+	    throw new IllegalArgumentException();
+
+	if (length != 64 && value < 0)
+	    value += 1L << length;
+
+	setUIntElement(offset, length, value);
+    }
+
+    /**
+     * Read the length bit unsigned big-endian int at offset
+     * @param offset bit offset where the unsigned int starts. Note that
+     *   these are big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB.
+     * @param length bit length of the unsigned int
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     */
+    protected long getUIntBEElement(int offset, int length) {
+	checkBounds(offset, length);
+
+	int byteOffset = offset >> 3;
+	int bitOffset = offset & 7;
+	long val = 0;
+
+	// All in one byte case
+	if (length + bitOffset <= 8)
+	    return (ubyte(byteOffset) >> (8 - bitOffset - length)) &
+		((1 << length) - 1);
+
+	// get some high order bits
+	if (bitOffset > 0) {
+	    length -= 8 - bitOffset;
+	    val = (long)(ubyte(byteOffset) & ((1 << (8 - bitOffset)) - 1)) << length;
+	    byteOffset++;
+	}
+
+	while (length >= 8) {
+	    length -= 8;
+	    val |= (long)ubyte(byteOffset++) << length;
+	}
+
+	// data from last byte
+	if (length > 0)
+	    val |= ubyte(byteOffset) >> (8 - length);
+
+	return val;
+    }
+
+    /**
+     * Set the length bit unsigned big-endian int at offset to val
+     * @param offset bit offset where the unsigned int starts. Note that
+     *   these are big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB.
+     * @param length bit length of the unsigned int
+     * @param val value to set the bit field to
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     * @exception IllegalArgumentException if val is an out-of-range value
+     * for this bitfield
+     */
+    protected void setUIntBEElement(int offset, int length, long val) {
+	checkBounds(offset, length);
+	//checkValue(length, val);
+
+	int byteOffset = offset >> 3;
+	int bitOffset = offset & 7;
+	int shift = 0;
+
+	// all in one byte case
+	if (length + bitOffset <= 8) {
+	    int mask = ((1 << length) - 1) << (8 - bitOffset - length);
+
+	    data[base_offset+byteOffset] = (byte)
+		((ubyte(byteOffset) & ~mask)
+		 | val << (8 - bitOffset - length));
+	    return;
+	}
+
+	// set some high order bits
+	if (bitOffset > 0) {
+	    int mask = (1 << (8 - bitOffset)) - 1;
+
+	    length -= 8 - bitOffset;
+	    data[base_offset+byteOffset] = (byte)
+		(ubyte(byteOffset) & ~mask | val >> length);
+	    byteOffset++;
+	}
+
+	while (length >= 8) {
+	    length -= 8;
+	    data[base_offset+(byteOffset++)] = (byte)(val >> length);
+	}
+
+	// data for last byte
+	if (length > 0) {
+	    int mask = (1 << (8 - length)) - 1;
+
+	    data[base_offset+byteOffset] = (byte)
+		((ubyte(byteOffset) & mask) | val << (8 - length));
+	}
+    }
+
+    /**
+     * Read the length bit signed big-endian int at offset
+     * @param offset bit offset where the signed int starts
+     * @param length bit length of the signed int
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     */
+    protected long getSIntBEElement(int offset, int length)
+	throws ArrayIndexOutOfBoundsException {
+	long val = getUIntBEElement(offset, length);
+
+	if (length == 64)
+	    return val;
+
+	if ((val & 1L << (length - 1)) != 0)
+	    return val - (1L << length);
+
+	return val;
+    }
+
+    /**
+     * Set the length bit signed big-endian int at offset to val
+     * @param offset bit offset where the signed int starts
+     * @param length bit length of the signed int
+     * @param value value to set the bit field to
+     * @exception ArrayIndexOutOfBoundsException for invalid offset, length
+     * @exception IllegalArgumentException if val is an out-of-range value
+     * for this bitfield
+     */ 
+   protected void setSIntBEElement(int offset, int length, long value)
+	throws ArrayIndexOutOfBoundsException {
+	if (length != 64 && value >= 1L << (length - 1))
+	    throw new IllegalArgumentException();
+
+	if (length != 64 && value < 0)
+	    value += 1L << length;
+
+	setUIntBEElement(offset, length, value);
+    }
+
+    /**
+     * Read the 32 bit IEEE float at offset
+     * @param offset bit offset where the float starts
+     * @param length is ignored
+     * @exception ArrayIndexOutOfBoundsException for invalid offset
+     */
+    protected float getFloatElement(int offset, int length)
+	throws ArrayIndexOutOfBoundsException {
+
+	return Float.intBitsToFloat((int)getUIntElement(offset, 32));
+    }
+
+    /**
+     * Set the 32 bit IEEE float at offset to value
+     * @param offset bit offset where the float starts
+     * @param length is ignored
+     * @param value value to store in bitfield
+     * @exception ArrayIndexOutOfBoundsException for invalid offset
+     */
+    protected void setFloatElement(int offset, int length, float value)
+	throws ArrayIndexOutOfBoundsException {
+
+	// using SInt because floatToRawIntBits might return a negative value
+	setSIntElement(offset, 32, Float.floatToRawIntBits(value));
+    }
+}
diff --git a/support/sdk/java/net/tinyos/message/MessageListener.java b/support/sdk/java/net/tinyos/message/MessageListener.java
new file mode 100644
index 00000000..13c3f961
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/MessageListener.java
@@ -0,0 +1,61 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+/**
+ * MessageListener interface (listen to tinyos messages).
    
+ *
+ * An interface for listening to messages built from
+ * net.tinyos.message.Message
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ */
+public interface MessageListener {
+    /**
+     * This method is called to signal message reception. The destination of
+     * message m is to.
+     * @param to the destination of the message (Note: to is only valid
+     *   when using TOSBase base stations)
+     * @param m the received message
+     */
+    public void messageReceived(int to, Message m);
+}
diff --git a/support/sdk/java/net/tinyos/message/MoteIF.java b/support/sdk/java/net/tinyos/message/MoteIF.java
new file mode 100644
index 00000000..e9811612
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/MoteIF.java
@@ -0,0 +1,176 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+/**
+ * MoteIF provides an application-level Java interface for receiving 
+ * messages from, and sending messages to, a mote through a serial port, 
+ * TCP connection, or some other means of connectivity. Generally this
+ * is used to write Java programs that connect over a TCP or serial port
+ * to communicate with a TOSBase or GenericBase mote.
+ *
+ * The default way to use MoteIF is to create an instance of this class
+ * and then register one or more MessageListener objects that will 
+ * be invoked when messages arrive. For example:
+ * 
    + *   MoteIF mif = new MoteIF();
+ *   mif.registerListener(new FooMsg(), this);
+ *   
+ *   // Invoked when a message arrives
+ *   public void messageReceived(int toaddr, Message msg) { ... }
+ * 
    
+ * The default MoteIF constructor uses the MOTECOM environment
+ * variable to determine how the Java application connects to the mote.
+ * For example, a MOTECOM setting of "serial@COM1" connects to a base
+ * station using the serial port on COM1.
+ *
+ * You can also send messages through the base station mote using
+ * MoteIF.send().
+ * 
+ * @see net.tinyos.packet.BuildSource
+ * @author	David Gay
+ */
+public class MoteIF {
+    /** The destination address for a broadcast. */
+    public static final int TOS_BCAST_ADDR = 0xffff;
+
+    protected PhoenixSource source;
+    protected Sender sender;
+    protected Receiver receiver;
+
+    /**
+     * Create a new mote interface to packet source specified using the 
+     * MOTECOM environment variable. Status and error messages will
+     * be printed to System.err.
+     */
+    public MoteIF() {
+	init(BuildSource.makePhoenix(net.tinyos.util.PrintStreamMessenger.err));
+    }
+
+    /**
+     * Create a new mote interface to packet source specified using the 
+     * MOTECOM environment variable. Status and error messages will
+     * be printed to 'messages'.
+     *
+     * @param messages where to send status messages (null means no messages)
+     */
+    public MoteIF(Messenger messages) {
+	init(BuildSource.makePhoenix(messages));
+    }
+
+    /**
+     * Create a new mote interface to an arbitrary packet source. The
+     * packet source is started if necessary. 
+     *
+     * @param source packet source to use
+     */
+    public MoteIF(PhoenixSource source) {
+	init(source);
+    }
+
+    /**********************************************************************/
+
+    private void init(PhoenixSource source) {
+	this.source = source;
+	// Start source if it isn't started yet
+	try {
+	    source.start();
+	}
+	catch (IllegalThreadStateException e) { }
+	try {
+	    source.awaitStartup();
+	}
+	catch (IOException e) { 
+	    e.printStackTrace();
+	}
+	receiver = new Receiver(source);
+	sender = new Sender(source);
+    }
+
+    /**
+     * @return this MoteIF's source 
+     */
+    public PhoenixSource getSource() {
+	return source;
+    }
+
+    /**
+     * Send m to moteId via this mote interface
+     * @param moteId message destination
+     * @param m message
+     * @exception IOException thrown if message could not be sent
+     */
+    synchronized public void send(int moteId, Message m) throws IOException {
+	sender.send(moteId, m);
+    }
+
+    /**
+     * Register a listener for given messages type. The message m should be
+     * an instance of a subclass of Message (generated by mig). When a
+     * message of the corresponding type is received, a new instance of m's
+     * class is created with the received message as data. This message is
+     * then passed to the given MessageListener.
+     * 
+     * Note that multiple MessageListeners can be registered for the same
+     * message type, and in fact each listener can use a different template
+     * type if it wishes (the only requirement is that m.getType() matches
+     * the received message). 
+     *
+     * @param m message template specifying which message to receive
+     * @param l listener to which received messages are dispatched
+     */
+    synchronized public void registerListener(Message m, MessageListener l) {
+	receiver.registerListener(m, l);
+    }
+
+    /**
+     * Deregister a listener for a given message type.
+     * @param m message template specifying which message to receive
+     * @param l listener to which received messages are dispatched
+     */
+    synchronized public void deregisterListener(Message m, MessageListener l) {
+      receiver.deregisterListener(m, l);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/message/Receiver.java b/support/sdk/java/net/tinyos/message/Receiver.java
new file mode 100644
index 00000000..3554f02c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Receiver.java
@@ -0,0 +1,189 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.util.*;
+import java.io.*;
+
+/**
+ * Receiver class (receive tinyos messages).
+ *
+ * A receiver class provides a simple interface built on Message for
+ * receiving tinyos messages from a SerialForwarder
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ */
+public class Receiver implements PacketListenerIF {
+    public static final boolean DEBUG = false;
+    public static final boolean DISPLAY_ERROR_MSGS = true;
+
+    Hashtable templateTbl; // Mapping from AM type to msgTemplate
+    PhoenixSource source;
+    /**
+     * Inner class representing a single MessageListener and its
+     * associated Message template.
+     */
+    class msgTemplate {
+	Message template;
+	MessageListener listener;
+	msgTemplate(Message template, MessageListener listener) {
+	    this.template = template;
+	    this.listener = listener;
+	}
+
+	public boolean equals(Object o) {
+	    try {
+		msgTemplate mt = (msgTemplate)o;
+		if (mt.template.getClass().equals(this.template.getClass()) &&
+		    mt.listener.equals(this.listener)) {
+		    return true;
+		}
+	    } catch (Exception e) {
+		return false;
+	    }
+	    return false;
+	}
+
+	public int hashCode() {
+	    return listener.hashCode();
+	}
+    }
+
+    /**
+     * Create a receiver messages from forwarder of any group id and
+     * of active message type m.getType()
+     * When such a message is received, a new instance of m's class is
+     * created with the received data and send to listener.messageReceived
+     * @param forwarder packet source to listen to
+     */
+    public Receiver(PhoenixSource forwarder) {
+	this.templateTbl = new Hashtable();
+	this.source = forwarder;
+	forwarder.registerPacketListener(this);
+    }
+
+    /**
+     * Register a particular listener for a particular message type.
+     * More than one listener can be registered for each message type.
+     * @param template specify message type and template we're listening for
+     * @param listener destination for received messages
+     */
+    public void registerListener(Message template, MessageListener listener) {
+	Integer amType = new Integer(template.amType());
+	Vector vec = (Vector)templateTbl.get(amType);
+	if (vec == null) {
+	    vec = new Vector();
+	}
+	vec.addElement(new msgTemplate(template, listener));
+	templateTbl.put(amType, vec);
+    }
+
+    /**
+     * Stop listening for messages of the given type with the given listener.
+     * @param template specify message type and template we're listening for
+     * @param listener destination for received messages
+     */
+    public void deregisterListener(Message template, MessageListener listener) {
+	Integer amType = new Integer(template.amType());
+	Vector vec = (Vector)templateTbl.get(amType);
+	if (vec == null) {
+	    throw new IllegalArgumentException("No listeners registered for message type "+template.getClass().getName()+" (AM type "+template.amType()+")");
+	}
+	msgTemplate mt = new msgTemplate(template, listener);
+	// Remove all occurrences
+	while (vec.removeElement(mt)) ;
+	if (vec.size() == 0) templateTbl.remove(amType);
+    }
+
+    private void error(msgTemplate temp, String msg) {
+	System.err.println("receive error for " + temp.template.getClass().getName() +
+			   " (AM type " + temp.template.amType() +
+			   "): " + msg);
+    }
+
+    public void packetReceived(byte[] packet) {
+	if (DEBUG) Dump.dump("Received message", packet);
+
+	if (packet[0] != Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID)
+	    return; // not for us.
+
+	SerialPacket msg = new SerialPacket(packet, 1);
+	Integer type = new Integer(msg.get_header_type());
+	Vector vec = (Vector)templateTbl.get(type);
+	if (vec == null) {
+	    if (DEBUG) Dump.dump("Received packet with type " + type +
+				 ", but no listeners registered", packet);
+	    return;
+	}
+	int length = msg.get_header_length();
+
+	Enumeration en = vec.elements();
+	while (en.hasMoreElements()) {
+	    msgTemplate temp = (msgTemplate)en.nextElement();
+
+	    Message received;
+
+	    // Erk - end up cloning the message multiple times in case
+	    // different templates used for different listeners
+	    try {
+		received = temp.template.clone(length);
+		received.dataSet(msg.dataGet(), msg.offset_data(0) + msg.baseOffset(), 0, length);
+	    } catch (ArrayIndexOutOfBoundsException e) {
+		error(temp, "invalid length message received (too long)");
+		continue;
+	    } catch (Exception e) {
+		error(temp, "couldn't clone message!");
+		continue;
+	    }
+
+	    /* Messages that are longer than the template might have
+	       a variable-sized array at their end */
+	    if (temp.template.dataGet().length > length) {
+		error(temp, "invalid length message received (too short)");
+		continue;
+	    }
+	    temp.listener.messageReceived(msg.get_header_addr(), received);
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/message/Sender.java b/support/sdk/java/net/tinyos/message/Sender.java
new file mode 100644
index 00000000..0279c68c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Sender.java
@@ -0,0 +1,100 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+/**
+ * Sender class (send tinyos messages).
    
+ *
+ * A sender class provides a simple interface built on Message for
+ * sending tinyos messages to a SerialForwarder
+ *
+ * @version	2, 24 Jul 2003
+ * @author	David Gay
+ */
+public class Sender {
+    // If true, dump packet contents that are sent
+    private static final boolean VERBOSE = false;
+
+    PhoenixSource sender;
+
+    /**
+     * Create a sender talking to PhoenixSource forwarder. The group id of
+     * sent packets is not set.
+     * @param forwarder PhoenixSource with which we wish to send packets
+     */
+    public Sender(PhoenixSource forwarder) {
+	sender = forwarder;
+    }
+
+    /**
+     * Send m to moteId via this Sender's SerialForwarder
+     * @param moteId message destination
+     * @param m message
+     * @exception IOException thrown if message could not be sent
+     */
+    synchronized public void send(int moteId, Message m) throws IOException {
+	int amType = m.amType();
+	byte[] data = m.dataGet();
+
+	if (amType < 0) {
+	    throw new IOException("unknown AM type for message " +
+				  m.getClass().getName());
+	}
+
+	SerialPacket packet =
+	    new SerialPacket(SerialPacket.offset_data(0) + data.length);
+	packet.set_header_addr(moteId);
+	packet.set_header_type((short)amType);
+	packet.set_header_length((short)data.length);
+	packet.dataSet(data, 0, packet.offset_data(0), data.length);
+
+	byte[] packetData = packet.dataGet();
+	byte[] fullPacket = new byte[packetData.length + 1];
+	fullPacket[0] = Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID;
+	System.arraycopy(packetData, 0, fullPacket, 1, packetData.length);
+	sender.writePacket(fullPacket);
+	if (VERBOSE) Dump.dump("sent", fullPacket);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/.cvsignore b/support/sdk/java/net/tinyos/packet/.cvsignore
new file mode 100644
index 00000000..461c5ac3
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/.cvsignore
@@ -0,0 +1 @@
+Serial.java
diff --git a/support/sdk/java/net/tinyos/packet/AbstractSource.java b/support/sdk/java/net/tinyos/packet/AbstractSource.java
new file mode 100644
index 00000000..b94da91a
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/AbstractSource.java
@@ -0,0 +1,121 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+import java.util.*;
+import net.tinyos.util.*;
+//import net.tinyos.message.*;
+
+/**
+ * Provide a standard, generic implementation of PacketSource. Subclasses
+ * need only implement low-level open and close operations, and packet
+ * reading and writing. This class provides the automatic close-on-error
+ * functionality, general error checking, and standard messages.
+ */
+abstract public class AbstractSource implements PacketSource
+{
+    protected String name;
+    protected boolean opened = false;
+    protected Messenger messages;
+
+    protected void message(String s) {
+	if (messages != null)
+	    messages.message(s);
+    }
+
+    protected AbstractSource(String name) {
+	this.name = name;
+    }
+
+    public String getName() {
+	return name;
+    }
+
+    synchronized public void open(Messenger messages) throws IOException {
+	if (opened)
+	    throw new IOException("already open");
+	this.messages = messages;
+	openSource();
+	opened = true;
+    }
+
+    synchronized public void close() throws IOException {
+	if (opened) {
+	    opened = false;
+	    closeSource();
+	}
+    }
+
+    protected void failIfClosed() throws IOException {
+	if (!opened)
+	    throw new IOException("closed");
+    }
+
+    public byte[] readPacket() throws IOException {
+	failIfClosed();
+
+	try {
+	    return check(readSourcePacket());
+	}
+	catch (IOException e) {
+	    close();
+	    throw e;
+	}
+    }
+
+    synchronized public boolean writePacket(byte[] packet) throws IOException {
+	failIfClosed();
+
+	try {
+	    return writeSourcePacket(check(packet));
+	}
+	catch (IOException e) {
+	    close();
+	    throw e;
+	}
+    }
+
+    protected byte[] check(byte[] packet) throws IOException {
+	return packet;
+    }
+
+    // Implementation interfaces
+    abstract protected void openSource() throws IOException;
+    abstract protected void closeSource() throws IOException;
+    abstract protected byte[] readSourcePacket() throws IOException;
+    protected boolean writeSourcePacket(byte[] packet) throws IOException {
+	// Default writer swallows packets
+	return true;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/BaudRate.java b/support/sdk/java/net/tinyos/packet/BaudRate.java
new file mode 100644
index 00000000..38a6eafc
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/BaudRate.java
@@ -0,0 +1,23 @@
+/**
+ * This file contains the default baud rate for current TinyOS
+ * platforms. Don't add anything but platform entries, as this file is also
+ * #included in C code to get the table, with appropriate #define's to
+ * avoid problems...
+*/
+package net.tinyos.packet;
+
+class BaudRate {
+    static void init() throws Exception {
+	/* The Platform.x argument is there for when this code is #include'd
+	   into C */
+	Platform.add(Platform.x, "mica",       19200);
+	Platform.add(Platform.x, "mica2",      57600);
+	Platform.add(Platform.x, "mica2dot",   19200);
+	Platform.add(Platform.x, "telos",      115200);
+	Platform.add(Platform.x, "telosb",     115200);
+	Platform.add(Platform.x, "tmote",      115200);
+	Platform.add(Platform.x, "micaz",      57600);
+	Platform.add(Platform.x, "eyes",       115200);
+	Platform.add(Platform.x, "intelmote2", 115200);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/BuildSource.java b/support/sdk/java/net/tinyos/packet/BuildSource.java
new file mode 100644
index 00000000..4f8aca9f
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/BuildSource.java
@@ -0,0 +1,372 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+
+/**
+ * This class is where packet-sources are created. It also provides 
+ * convenient shortcuts for building PhoenixSources on packet-sources.
+ *
+ * See PacketSource and PhoenixSource for details on the source behaviours.
+ *
+ * Most applications will probably use net.tinyos.message.MoteIF with
+ * the default source, but those that don't must use BuildSource to obtain
+ * a PacketSource.
+ *
+ * The default source is specified by the MOTECOM environment variable
+ * (note that the JNI code for net.tinyos.util.Env must be installed for
+ * this to work - see net/tinyos/util/Env.INSTALL for details). When
+ * MOTECOM is undefined (or the JNI code for Env.java cannot be found), the
+ * packet source is "sf@localhost:9002" (new serial-forwarder, on localhost
+ * port 9002).
+ *
+ * Packet sources can either be specified by strings (when calling
+ * makePacketSource, or by calling a specific makeXXX method
+ * (e.g., makeSF, makeSerial). There are also
+ * makeArgsXXX methods which make a source from its source-args (see below).
+ *
+ * Packet source strings have the format: [@],
+ * where source-args have reasonable defaults for most sources.
+ * The sourceHelp method prints an up-to-date description
+ * of known sources and their arguments.
+ */
+public class BuildSource {
+    /**
+     * Make a new PhoenixSource over a specified PacketSource
+     * Note that a PhoenixSource must be started (start method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param source The packet-source to use (not null)
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource
+     */
+    public static PhoenixSource makePhoenix(PacketSource source, Messenger messages) {
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make a new PhoenixSource over a specified PacketSource
+     * Note that a PhoenixSource must be started (start method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param name The packet-source to use, specified with a packet-source
+     *   string
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource, or null if name is an invalid source
+     */
+    public static PhoenixSource makePhoenix(String name, Messenger messages) {
+	PacketSource source = makePacketSource(name);
+	if (source == null) {
+	    return null;
+	}
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make a new PhoenixSource over the default PacketSource
+     * Note that a PhoenixSource must be started (start method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource
+     * @return The new PhoenixSource, or null if the default packet source is
+     *   invalid (ie, the MOTECOM environment variable specifies an invalid packet
+     *   source)
+     */
+    public static PhoenixSource makePhoenix(Messenger messages) {
+	PacketSource source = makePacketSource();
+	if (source == null) {
+	    return null;
+	}
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make the default packet source
+     * @return The packet source, or null if it could not be made
+     */
+    public static PacketSource makePacketSource() {
+	return makePacketSource(Env.getenv("MOTECOM"));
+    }
+
+    /**
+     * Make the specified packet source
+     * @param name Name of the packet source, or null for "sf@localhost:9002"
+     * @return The packet source, or null if it could not be made
+     */
+    public static PacketSource makePacketSource(String name) {
+	if (name == null)
+	    name = "sf@localhost:9002"; // default source
+
+	ParseArgs parser = new ParseArgs(name, "@");
+	String source = parser.next();
+	String args = parser.next();
+	PacketSource retVal = null;
+	
+	if (source.equals("sf"))
+	    retVal =  makeArgsSF(args);
+	if (source.equals("serial"))
+	    retVal =  makeArgsSerial(args);
+	if (source.equals("network"))
+	    retVal =  makeArgsNetwork(args);
+	if (source.equals("tossim-serial"))
+	    retVal =  makeArgsTossimSerial(args);
+	if (source.equals("tossim-radio"))
+	    retVal =  makeArgsTossimRadio(args);
+
+	return retVal;
+    }
+
+    /**
+     * Return summary of source string specifications
+     */
+    public static String sourceHelp() {
+	return
+"  - sf@HOSTNAME:PORTNUMBER\n" +
+"    A serial forwarder.\n" +
+"  - serial@SERIALPORT:BAUDRATE\n" +
+"    A mote connected to a serial port using the TinyOS 2.0 serial protocol.\n" +
+"     BAUDRATE is either a number or a platform name (selects platform's\n" +
+"     default baud rate).\n" +
+"  - network@HOSTNAME:PORTNUMBER\n" +
+"    A mote whose serial port is accessed over the network.\n" +
+"  - tossim-serial[@HOSTNAME]\n" +
+"    The serial port of tossim node 0.\n" +
+"  - tossim-radio[@HOSTNAME]\n" +
+"    The radios of tossim nodes.\n" +
+"\n" +
+"Examples: serial@COM1:mica2, serial@/dev/ttyUSB2:19200, sf@localhost:9000";
+    }
+
+    /**
+     * Make a serial-forwarder source  (tcp/ip client) from an argument string
+     * @param args "hostname:port-number", or null for "localhost:9002"
+     * @return The new PacketSource or null for invalid arguments
+     */
+    public static PacketSource makeArgsSF(String args) {
+	if (args == null)
+	    args = "localhost:9002";
+
+	ParseArgs parser = new ParseArgs(args, ":");
+	String host = parser.next();
+	String portS = parser.next();
+	if (portS == null)
+	    return null;
+	int port = Integer.parseInt(portS);
+
+	return makeSF(host, port);
+    }
+
+    /**
+     * Make a serial-forwarder source (tcp/ip client)
+     * @param host hostname
+     * @param port port number
+     * @return The new PacketSource
+     */
+    public static PacketSource makeSF(String host, int port) {
+	return new SFSource(host, port);
+    }
+
+    private static int decodeBaudrate(String rateS) {
+	try {
+	    int rate = Platform.get(rateS);
+	    if (rate == -1)
+		rate = Integer.parseInt(rateS);
+	    if (rate > 0)
+		return rate;
+	}
+	catch (NumberFormatException e) { }
+	return -1;
+    }
+ 
+
+    /**
+     * Make a serial-port packet source. Serial packet sources report
+     * missing acknowledgements via a false result to writePacket.
+     * @param args "COMn[:baudrate]" ("COM1" if args is null)
+     *   baudrate is an integer or mote name
+     *   The default baudrate is 19200.
+     * @return The new packet source, or null if the arguments are invalid
+     */
+    public static PacketSource makeArgsSerial(String args) {
+	if (args == null)
+	    args = "COM1";
+
+	ParseArgs parser = new ParseArgs(args, ":");
+	String port = parser.next();
+	String platformOrBaud = parser.next();
+	int baudrate = decodeBaudrate(platformOrBaud);
+	if (baudrate < 0)
+	    return null;
+	return makeSerial(port, baudrate);
+    }
+
+    /**
+     * Make a serial-port packet source. Serial packet sources report
+     * missing acknowledgements via a false result to writePacket.
+     * @param port javax.comm serial port name ("COMn:")
+     * @param baudrate requested baudrate
+     * @return The new packet source
+     */ 
+    public static PacketSource makeSerial(String port, int baudrate) {
+	return new Packetizer("serial@" + port + ":" + baudrate,
+			      new SerialByteSource(port, baudrate));
+    }
+
+    /**
+     * Make a serial-port packet source for a network-accessible serial
+     * port. Serial packet sources report missing acknowledgements via a
+     * false result to writePacket.
+     * @param args "hostname:portnumber" (no default)
+     * @return The new packet source, or null if the arguments are invalid
+     */
+    public static PacketSource makeArgsNetwork(String args) {
+	if (args == null)
+	    return null;
+
+	ParseArgs parser = new ParseArgs(args, ":,");
+	String host = parser.next();
+	String portS = parser.next();
+	if (portS == null)
+	    return null;
+	int port = Integer.parseInt(portS);
+
+	return makeNetwork(host, port);
+    }
+
+    /**
+     * Make a serial-port packet source for a network-accessible serial
+     * port. Serial packet sources report missing acknowledgements via a
+     * false result to writePacket.
+     * @param host hostname of network-accessible serial port
+     * @param port tcp/ip port number
+     * @return The new packet source
+     */
+    public static PacketSource makeNetwork(String host, int port) {
+	return new Packetizer("network@" + host + ":" + port,
+			      new NetworkByteSource(host, port));
+    }
+
+    // We create tossim sources using reflection to avoid depending on
+    // tossim at compile-time
+
+    /**
+     * Make a tossim serial port (node 0) packet source
+     * @param args "hostname" ("localhost" for null) (on which tossim runs)
+     * @return The new packet source
+     */
+    public static PacketSource makeArgsTossimSerial(String args) {
+	if (args == null)
+	    args = "localhost";
+	return makeTossimSerial(args);
+    }
+
+    /**
+     * Make a tossim serial port (node 0) packet source
+     * @param host hostname on which tossim runs
+     * @return The new packet source
+     */
+    public static PacketSource makeTossimSerial(String host) {
+	return makeTossimSource("TossimSerialSource", host);
+    }
+
+    /**
+     * Make a tossim radio packet source
+     * @param args "hostname" ("localhost" for null) (on which tossim runs)
+     * @return The new packet source
+     */
+    public static PacketSource makeArgsTossimRadio(String args) {
+	if (args == null)
+	    args = "localhost";
+	return makeTossimRadio(args);
+    }
+
+    /**
+     * Make a tossim radio packet source
+     * @param host hostname on which tossim runs
+     * @return The new packet source
+     */
+    public static PacketSource makeTossimRadio(String host) {
+	return makeTossimSource("TossimRadioSource", host);
+    }
+
+    private static PacketSource makeTossimSource(String name, String host) {
+	try {
+	    Class[] oneStringArg = new Class[1];
+	    oneStringArg[0] = Class.forName("java.lang.String");
+	    Object[] args = new Object[1];
+	    args[0] = host;
+
+	    Class tossimSource = Class.forName("net.tinyos.sim.packet." + name);
+	    return (PacketSource)tossimSource.getConstructor(oneStringArg).newInstance(args);
+	}
+	catch (Exception e) {
+	    System.err.println("Couldn't instantiate tossim packet source");
+	    System.err.println("Did you compile tossim?");
+	    return null;
+	}
+    }
+
+//     static class ParseArgs {
+// 	String tokens[];
+// 	int tokenIndex;
+
+// 	ParseArgs(String s, String delimiterSequence) {
+// 	    int count = delimiterSequence.length();
+// 	    tokens = new String[count + 1];
+// 	    tokenIndex = 0;
+
+// 	    // Fill in the tokens
+// 	    int i = 0, lastMatch = 0;
+// 	    while (i < count) {
+// 		int pos = s.indexOf(delimiterSequence.charAt(i++));
+
+// 		if (pos >= 0) {
+// 		    // When we finally find a delimiter, we know where
+// 		    // the last token ended
+// 		    tokens[lastMatch] = s.substring(0, pos);
+// 		    lastMatch = i;
+// 		    s = s.substring(pos + 1);
+// 		}
+// 	    }
+// 	    tokens[lastMatch] = s;
+// 	}
+
+// 	String next() {
+// 	    return tokens[tokenIndex++];
+// 	}
+//     }
+
+    public static void main(String[] args) {
+	System.err.println(sourceHelp());
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/ByteSource.java b/support/sdk/java/net/tinyos/packet/ByteSource.java
new file mode 100644
index 00000000..36ade90d
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/ByteSource.java
@@ -0,0 +1,46 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** 
+ * Simple byte I/O interface for use with PacketSource packetizers
+ */
+package net.tinyos.packet;
+
+import java.io.*;
+
+public interface ByteSource
+{
+    public void open() throws IOException;
+    public void close();
+    public byte readByte() throws IOException;
+    public void writeBytes(byte[] bytes) throws IOException;
+}
diff --git a/support/sdk/java/net/tinyos/packet/Makefile b/support/sdk/java/net/tinyos/packet/Makefile
new file mode 100644
index 00000000..94348efe
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Makefile
@@ -0,0 +1,12 @@
+# Makefile for tools/java/net/tinyos/packet
+
+INITIAL_TARGETS = Serial.class
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOS)/lib/serial/Serial.h
+
+Serial.java: $(SERIAL_H)
+	ncg -o $@ -java-classname=net.tinyos.packet.Serial java $(SERIAL_H) Serial.h
diff --git a/support/sdk/java/net/tinyos/packet/NetworkByteSource.java b/support/sdk/java/net/tinyos/packet/NetworkByteSource.java
new file mode 100644
index 00000000..e6ce21c0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/NetworkByteSource.java
@@ -0,0 +1,61 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.util.*;
+import java.io.*;
+import java.net.*;
+
+/**
+ * A tcp/ip (client) byte-source
+ */
+public class NetworkByteSource extends StreamByteSource {
+    private Socket socket;
+    private String host;
+    private int port;
+
+    public NetworkByteSource(String host, int port) {
+	this.host = host;
+	this.port = port;
+    }
+
+    protected void openStreams() throws IOException {
+	socket = new Socket(host, port);
+	is = socket.getInputStream();
+	os = socket.getOutputStream();
+    }
+
+    protected void closeStreams() throws IOException {
+	socket.close();
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/PacketListenerIF.java b/support/sdk/java/net/tinyos/packet/PacketListenerIF.java
new file mode 100644
index 00000000..209d5751
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PacketListenerIF.java
@@ -0,0 +1,45 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+/**
+ * 
+ * The listener interface receives incoming packets.
+ *
+ * @author  Mike Chen 
+ * @since   1.1.6
+ */
+
+public interface PacketListenerIF extends java.util.EventListener {
+  public void packetReceived(byte[] packet);
+}
diff --git a/support/sdk/java/net/tinyos/packet/PacketSource.java b/support/sdk/java/net/tinyos/packet/PacketSource.java
new file mode 100644
index 00000000..c0aaf013
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PacketSource.java
@@ -0,0 +1,97 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** This interface specifies the generic behaviour of a packet mediator.
+    The read and write operations are blocking. 
+    Reads and writes may fail (e.g., for communications failure), which
+    implicitly closes the mediator. It is not possible to reopen a mediator
+    after it is closed (instead, a new mediator should be created).
+
+    The packet byte array must be at least 1 byte long - the first byte
+    indicates the type of packet and is used to dispatch to upper layers.
+
+    PacketSources are point-to-point and have "at most once" semantics.
+    writePacket should return true only if the packet has been received
+    Note that checking this is not possible with some of our broken,
+    legacy protocols, and that we will optimistically assume that packets
+    sent over reliable links (e.g., tcp/ip socket to a serial forwarder)
+    will be reliably delivered by tcp/ip.
+ */
+package net.tinyos.packet;
+
+import java.io.*;
+import net.tinyos.util.*;
+
+public interface PacketSource
+{
+    /**
+     * Get PacketSource name
+     * @return the name of this packet source, valid for use with
+     * BuildSource.makeSource.
+     */
+    public String getName();
+
+    /**
+     * Open a packet source
+     * @param messages A destination for informative messages from the
+     *   packet source, or null to discard these.
+     * @exception IOException If the source could not be opened
+     */
+    public void open(Messenger messages) throws IOException;
+
+    /**
+     * Close a packet source. Closing a source must force any 
+     * running readPacket and writePacket
+     * operations to terminate with an IOException
+     * @exception IOException Thrown if a problem occured during closing.
+     *   The source is considered closed even if thos occurs.
+     *   Closing a closed source does not cause this exception
+     */
+    public void close() throws IOException;
+
+    /**
+     * Read a packet
+     * @return The packet read (newly allocated). The format is described
+     *   above
+     * @exception IOException If the source detected a problem. The source
+     *   is automatically closed.
+     */
+    public byte[] readPacket() throws IOException;
+
+    /**
+     * Write a packet
+     * @param packet The packet to write. The format is decribed above.
+     * @return Some packet sources will return false if the packet
+     *   could not be written.
+     */
+    public boolean writePacket(byte[] packet) throws IOException;
+}
diff --git a/support/sdk/java/net/tinyos/packet/Packetizer.java b/support/sdk/java/net/tinyos/packet/Packetizer.java
new file mode 100644
index 00000000..33407293
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Packetizer.java
@@ -0,0 +1,369 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+import java.io.*;
+import java.util.*;
+import java.nio.*;
+
+/**
+ * The Packetizer class implements the new mote-PC protocol, using
+ * a ByteSource for low-level I/O
+ */
+public class Packetizer extends AbstractSource implements Runnable {
+    /* Protocol inspired by, but not identical to, RFC 1663.
+     * There is currently no protocol establishment phase, and a single
+     * byte ("packet type") to identify the kind/target/etc of each packet.
+     *
+     * The protocol is really, really not aiming for high performance.
+     * 
+     * There is however a hook for future extensions: implementations are
+     * required to answer all unknown packet types with a P_UNKNOWN packet.
+     *
+     * To summarise the protocol:
+     * - the two sides (A & B) are connected by a (potentially unreliable)
+     *   byte stream
+     * - the two sides exchange packets framed by 0x7e (SYNC_BYTE) bytes
+     * - each packet has the form
+     *       <16-bit crc>
+     *   where the crc (see net.tinyos.util.Crc) covers the packet type
+     *   and bytes 1..n
+     * - bytes can be escaped by preceding them with 0x7d and their
+     *   value xored with 0x20; 0x7d and 0x7e bytes must be escaped, 
+     *   0x00 - 0x1f and 0x80-0x9f may be optionally escaped
+     * - There are currently 5 packet types:
+     *   P_PACKET_NO_ACK: A user-packet, with no ack required
+     *   P_PACKET_ACK: A user-packet with a prefix byte, ack required. 
+     *     The receiver must send a P_ACK packet with the prefix byte
+     *     as its contents.
+     *   P_ACK: ack for a previous P_PACKET_ACK packet
+     *   P_UNKNOWN: unknown packet type received. On reception of an
+     *     unknown packet type, the receicer must send a P_UNKNOWN packet,
+     *     the first byte must be the unknown packet type.
+     * - Packets that are greater than a (private) MTU are silently dropped.
+     */
+    final static boolean DEBUG = false;
+
+    final static int SYNC_BYTE = Serial.HDLC_FLAG_BYTE;
+    final static int ESCAPE_BYTE = Serial.HDLC_CTLESC_BYTE;
+    final static int MTU = 256;
+    final static int ACK_TIMEOUT = 1000; // in milliseconds
+
+    final static int P_ACK = Serial.SERIAL_PROTO_ACK;
+    final static int P_PACKET_ACK = Serial.SERIAL_PROTO_PACKET_ACK;
+    final static int P_PACKET_NO_ACK = Serial.SERIAL_PROTO_PACKET_NOACK;
+    final static int P_UNKNOWN = Serial.SERIAL_PROTO_PACKET_UNKNOWN;
+
+    private ByteSource io;
+    private boolean inSync;
+    private byte[] receiveBuffer = new byte[MTU];
+    private int seqNo;
+
+    // Packets are received by a separate thread and placed in a
+    // per-packet-type queue. If received[x] is null, then x is an
+    // unknown protocol (but P_UNKNOWN and P_PACKET_ACK are handled
+    // specially)
+    private Thread reader;
+    private LinkedList[] received;
+
+    /**
+     * Packetizers are built using the makeXXX methods in BuildSource
+     */
+    Packetizer(String name, ByteSource io) {
+	super(name);
+	this.io = io;
+	inSync = false;
+	seqNo = 13;
+	reader = new Thread(this);
+	received = new LinkedList[256];
+	received[P_ACK] = new LinkedList();
+	received[P_PACKET_NO_ACK] = new LinkedList();
+    }
+
+    synchronized public void open(Messenger messages) throws IOException {
+	super.open(messages);
+	reader.start();
+    }
+
+    protected void openSource() throws IOException {
+	io.open();
+    }
+
+    protected void closeSource() {
+        io.close();
+    }
+
+    protected byte[] readProtocolPacket(int packetType, long deadline) throws IOException {
+	LinkedList inPackets = received[packetType];
+
+	// Wait for a packet on inPackets
+	synchronized (inPackets) {
+	    while (inPackets.isEmpty()) {
+		long now = System.currentTimeMillis();
+		if (deadline != 0 && now >= deadline) {
+		    return null;
+		}
+		try {
+		    inPackets.wait(deadline != 0 ? deadline - now : 0);
+		}
+		catch (InterruptedException e) {
+		    throw new IOException("interrupted");
+		}
+	    }
+	    return (byte [])inPackets.removeFirst();
+	}
+    }
+
+    // Place a packet in its packet queue, or reject unknown packet
+    // types (which don't have a queue)
+    protected void pushProtocolPacket(int packetType, byte[] packet) {
+	LinkedList inPackets = received[packetType];
+
+	if (inPackets != null) {
+	    synchronized (inPackets) {
+		inPackets.add(packet);
+		inPackets.notify();
+	    }
+	}
+	else if (packetType != P_UNKNOWN) {
+	    try {
+		writeFramedPacket(P_UNKNOWN, packetType, ackPacket, 0);
+	    }
+	    catch (IOException e) { }
+	    message(name + ": ignoring unknown packet type " +
+		    Integer.toHexString(packetType));
+	}
+    }
+
+    protected byte[] readSourcePacket() throws IOException {
+	// Packetizer packet format is identical to PacketSource's
+	for (;;) {
+	    byte[] packet = readProtocolPacket(P_PACKET_NO_ACK,0);
+	    if (packet.length >= 1) {
+		return packet;
+	    }
+	}
+    }
+
+  // Write an ack-ed packet
+  protected boolean writeSourcePacket(byte[] packet) throws IOException {
+      writeFramedPacket(P_PACKET_ACK, ++seqNo, packet, packet.length);
+
+      long deadline = System.currentTimeMillis() + ACK_TIMEOUT;
+      for (;;) {
+	  byte[] ack = readProtocolPacket(P_ACK, deadline);
+	  if (ack == null) {
+	      if (DEBUG) {
+		  message(name + ": ACK timed out");
+	      }
+	      return false;
+	  }
+	  if (ack[0] == (byte)seqNo) {
+	      if (DEBUG) {
+		  message(name + ": Rcvd ACK");
+	      }
+	      return true;
+	  }
+      }
+    
+  }
+
+    static private byte ackPacket[] = new byte[0];
+
+    public void run() {
+	try {
+	    for (;;) {
+		byte[] packet = readFramedPacket();
+		int packetType = packet[0] & 0xff;
+		int pdataOffset = 1;
+
+		if (packetType == P_PACKET_ACK) {
+		    // send ack
+		    writeFramedPacket(P_ACK, packet[1], ackPacket, 0);
+		    // And merge with un-acked packets
+		    packetType = P_PACKET_NO_ACK;
+		    pdataOffset = 2;
+		}
+		int dataLength = packet.length - pdataOffset;
+		byte[] dataPacket = new byte[dataLength];
+		System.arraycopy(packet, pdataOffset, dataPacket, 0, dataLength);
+		pushProtocolPacket(packetType, dataPacket);
+	    }
+	}
+	catch (IOException e) { }
+    }
+
+    // Read system-level packet. If inSync is false, we currently don't
+    // have sync
+    private byte[] readFramedPacket() throws IOException {
+	int count = 0;
+	boolean escaped = false;
+
+	for (;;) {
+	    if (!inSync) {
+		message(name + ": resynchronising");
+		// re-synchronise
+		while (io.readByte() != SYNC_BYTE)
+		    ;
+		inSync = true;
+		count = 0;
+		escaped = false;
+	    }
+
+	    if (count >= MTU) {
+		// Packet too long, give up and try to resync
+		message(name + ": packet too long");
+		inSync = false;
+		continue;
+	    }
+
+	    byte b = io.readByte();
+	    if (escaped) {
+		if (b == SYNC_BYTE) {
+		    // sync byte following escape is an error, resync
+		    message(name + ": unexpected sync byte");
+		    inSync = false;
+		    continue;
+		}
+		b ^= 0x20;
+		escaped = false;
+	    }
+	    else if (b == ESCAPE_BYTE) {
+		escaped = true;
+		continue;
+	    }
+	    else if (b == SYNC_BYTE) {
+		if (count < 4) {
+		    // too-small frames are ignored
+		    count = 0;
+		    continue;
+		}
+		byte[] packet = new byte[count - 2];
+		System.arraycopy(receiveBuffer, 0, packet, 0, count - 2);
+
+		int readCrc = (receiveBuffer[count - 2]  & 0xff) |
+		  (receiveBuffer[count - 1] & 0xff) << 8;
+		int computedCrc = Crc.calc(packet, packet.length);
+
+		if (DEBUG) {
+		    System.err.println("received: ");
+		    Dump.printPacket(System.err, packet);
+		    System.err.println(" rcrc: " + Integer.toHexString(readCrc) +
+				       " ccrc: " + Integer.toHexString(computedCrc));
+		}
+
+		if (readCrc == computedCrc) {
+		    return packet;
+		}
+		else {
+		    message(name + ": bad packet");
+		    /* We don't lose sync here. If we did, garbage on the line
+		       at startup will cause loss of the first packet. */
+		    count = 0;
+		    continue;
+		}
+	    }
+
+	    receiveBuffer[count++] = b;
+	}
+    }
+
+    // Class to build a framed, escaped and crced packet byte stream
+    static class Escaper {
+	byte[] escaped;
+	int escapePtr;
+	int crc;
+
+	// We're building a length-byte packet
+	Escaper(int length) {
+	    escaped = new byte[2 * length];
+	    escapePtr = 0;
+	    crc = 0;
+	    escaped[escapePtr++] = SYNC_BYTE;
+	}
+
+	static private boolean needsEscape(int b) {
+	    return b == SYNC_BYTE || b == ESCAPE_BYTE;
+	}
+
+	void nextByte(int b) {
+	    b = b & 0xff;
+	    crc = Crc.calcByte(crc, b);
+	    if (needsEscape(b)) {
+		escaped[escapePtr++] = ESCAPE_BYTE;
+		escaped[escapePtr++] = (byte)(b ^ 0x20);
+	    }
+	    else {
+		escaped[escapePtr++] = (byte)b;
+	    }
+	}
+
+	void terminate() {
+	    escaped[escapePtr++] = SYNC_BYTE;
+	}
+    }
+
+    // Write a packet of type 'packetType', first byte 'firstByte'
+    // and bytes 2..'count'+1 in 'packet'
+    private synchronized void writeFramedPacket(int packetType, int firstByte,
+						byte[] packet, int count) throws IOException {
+	if (DEBUG) {
+	    System.err.println("sending: ");
+	    Dump.printByte(System.err, packetType);
+	    Dump.printByte(System.err, firstByte);
+	    Dump.printPacket(System.err, packet);
+	    System.err.println();
+	}
+
+	Escaper buffer = new Escaper(count + 6);
+	
+	buffer.nextByte(packetType);
+	buffer.nextByte(firstByte);
+	for (int i = 0; i < count; i++) {
+	    buffer.nextByte(packet[i]);
+	}
+
+	int crc = buffer.crc;
+	buffer.nextByte(crc & 0xff);
+	buffer.nextByte(crc >> 8);
+
+	buffer.terminate();
+
+	byte[] realPacket = new byte[buffer.escapePtr];
+	System.arraycopy(buffer.escaped, 0, realPacket, 0, buffer.escapePtr);
+
+	if (DEBUG) {
+	    Dump.dump("encoded", realPacket);
+	}
+	io.writeBytes(realPacket);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/ParseArgs.java b/support/sdk/java/net/tinyos/packet/ParseArgs.java
new file mode 100644
index 00000000..5e9ed3ae
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/ParseArgs.java
@@ -0,0 +1,41 @@
+    /**
+     * Parse a string into tokens based on a sequence of delimiters
+     * Given delimiters (single characters) d1, d2, ..., dn, this
+     * class recognises strings of the form s0[d1s1][d2s2]...[dnsn],
+     * where s does not contain character di
+     * This is unambiguous if all di are distinct. If not, strings
+     * are attributed to the earliest possible si (so if the delimiters
+     * are : and :, and the input string is foo:bar, then s0 is foo,
+     * s1 is bar and s2 is null
+     */
+package net.tinyos.packet;
+
+class ParseArgs {
+	String tokens[];
+	int tokenIndex;
+
+	ParseArgs(String s, String delimiterSequence) {
+	    int count = delimiterSequence.length();
+	    tokens = new String[count + 1];
+	    tokenIndex = 0;
+
+	    // Fill in the tokens
+	    int i = 0, lastMatch = 0;
+	    while (i < count) {
+		int pos = s.indexOf(delimiterSequence.charAt(i++));
+
+		if (pos >= 0) {
+		    // When we finally find a delimiter, we know where
+		    // the last token ended
+		    tokens[lastMatch] = s.substring(0, pos);
+		    lastMatch = i;
+		    s = s.substring(pos + 1);
+		}
+	    }
+	    tokens[lastMatch] = s;
+	}
+
+	String next() {
+	    return tokens[tokenIndex++];
+	}
+}
diff --git a/support/sdk/java/net/tinyos/packet/PhoenixError.java b/support/sdk/java/net/tinyos/packet/PhoenixError.java
new file mode 100644
index 00000000..d4f57702
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PhoenixError.java
@@ -0,0 +1,55 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.packet;
+
+/**
+ * An interface for reporting packet source errors.
+ *
+ * @version	1, 1 Aug 2003
+ * @author	David Gay
+ */
+public interface PhoenixError {
+    /**
+     * This method is called to signal a problem with a packet source
+     * @param e The IOExcpetion that occured
+     */
+    public void error(java.io.IOException e);
+}
diff --git a/support/sdk/java/net/tinyos/packet/PhoenixSource.java b/support/sdk/java/net/tinyos/packet/PhoenixSource.java
new file mode 100644
index 00000000..c3ba0c83
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PhoenixSource.java
@@ -0,0 +1,223 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+import java.io.*;
+import java.util.*;
+
+/**
+ * A PhoenixSource builds upon a PacketSource to provide the following
+ * features:
+ * - automatic reading and dispatching of packets (registerPacketListener
+ *   and deregisterPacketListener)
+ * - automatic source restarting (via setResurrection), off by default
+ *
+ * PhoenixSources are threads and hence need to be started. PhoenixSources
+ * are not PacketSources (direct reads are no longer allowed, open and
+ * close is less meaningful with automatic restart). 
+ *
+ * net.tinyos.message.MoteIF builds upon a PhoenixSource, not a PacketSource.
+ *
+ * PhoenixSources are built using the makePhoenix methods in BuildSource
+ */
+public class PhoenixSource extends Thread implements PhoenixError {
+    private PacketSource source;
+    private Messenger messages;
+    private Vector listeners;
+    private boolean phoenixLike = true; // does it rise from the ashes?
+    private boolean started;
+    private PhoenixError errorHandler = this;
+
+    protected void message(String s) {
+	if (messages != null)
+	    messages.message(s);
+    }
+
+    // Wait for thread to start
+    public synchronized void awaitStartup() throws IOException {
+	while (!started) {
+	    try {
+		wait();
+	    }
+	    catch (InterruptedException e) {
+		throw new IOException("interrupted");
+	    }
+	}
+    }
+
+    private synchronized void started() {
+	started = true;
+	notify();
+    }
+
+    synchronized private void stopped() {
+	started = false;
+    }
+ 
+    /**
+     * Build PhoenixSources using makePhoenix in BuildSource
+     */
+    PhoenixSource(PacketSource source, Messenger messages) {
+	this.source = source;
+	this.messages = messages;
+	listeners = new Vector();
+    }
+
+    /**
+     * Shutdown a PhoenixSource (closes underlying packet source)
+     * close errors are NOT reported to the error handler, instead 
+     * a simple message is sent
+     */
+    synchronized public void shutdown() {
+	phoenixLike = false;
+	try {
+	    source.close();
+	    interrupt();
+	}
+	catch (IOException e) {
+	    message("close error " + e);
+	}
+    }
+
+    /**
+     * @return This PhoenixSource's PacketSource
+     */
+    public PacketSource getPacketSource() {
+	return source;
+    }
+
+    /**
+     * Write a packet. Waits for PhoenixSource thread to start
+     * @param packet Packet to write (same format as PacketSource)
+     * @return false if packet wasn't received (only the serial 
+     *   and network packet sources currently provide this indication)
+     *   Note that a true result does not guarantee reception
+     */
+    public boolean writePacket(byte[] packet) throws IOException {
+	awaitStartup();
+	return source.writePacket(packet);
+    }
+
+    /**
+     * Register a new packet listener
+     * @param listener listener.packetReceived will be invoked for
+     *   all packets received on this packet source (see PacketSource
+     *   for a description of the packet format). The listener will
+     *   be invoked in the context of the PhoenixSource thread.
+     */
+    public void registerPacketListener(PacketListenerIF listener) {
+	listeners.addElement(listener);
+    }
+
+    /**
+     * Remove a packet listener
+     * @param listener Listener to remove (if it was registered twice,
+     *   only one entry will be removed)
+     */
+    public void deregisterPacketListener(PacketListenerIF listener) {
+	listeners.remove(listener);
+    }
+
+    private void packetDipatchLoop() throws IOException {
+	for (;;) {
+	    dispatch(source.readPacket());
+	}
+    }
+
+    private void dispatch(byte[] packet) {
+	Enumeration e = listeners.elements();
+	while (e.hasMoreElements()) {
+	    PacketListenerIF listener = (PacketListenerIF)e.nextElement();
+	    listener.packetReceived(packet);
+	}
+    }
+
+    public void run() {
+	while (phoenixLike) {
+	    try {
+		source.open(messages);
+		started();
+		packetDipatchLoop();
+	    }
+	    catch (IOException e) {
+		stopped();
+		if (phoenixLike)
+		    errorHandler.error(e);
+	    }
+	}
+    }
+
+    /** 
+     * Set the error handler for this PhoenixSource. When an IOException e
+     * is thrown by this PhoenixSource's PacketSource (note that this
+     * implicitly closes the PacketSource), errorHandler.error is invoked
+     * with e as an argument. When the error handler returns, the
+     * PhoenixSource will restart (i.e., reopen the packet source and try
+     * to read messages), except if the shutdown method has
+     * been called.
+     * @param errorHandler The packet source error handler for this
+     *    PhoenixSource
+     */
+    synchronized public void setPacketErrorHandler(PhoenixError errorHandler) {
+	this.errorHandler = errorHandler;
+    }
+
+    /**
+     * Turn resurrection on. This changes the current packet error handler
+     * (see setPacketErrorHandler) to one that automatically
+     * restarts the packet source after a 2s delay
+     */
+    public void setResurrection() {
+	setPacketErrorHandler(new PhoenixError() {
+		public void error(IOException e) {
+		    message(source.getName() + " died - restarting");
+		    try {
+			sleep(2000);
+		    }
+		    catch (InterruptedException ie) { }
+		}
+	    });
+    }
+
+    // Default error handler
+    public void error(IOException e) {
+	String msg = source.getName() + " died - exiting (" + e + ")";
+	if (messages != null) {
+	    message(msg);
+	}
+	else {
+	    // We always try and print this message as we're about to exit.
+	    System.err.println(msg);
+	}
+	System.exit(2);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/Platform.java b/support/sdk/java/net/tinyos/packet/Platform.java
new file mode 100644
index 00000000..e325317e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Platform.java
@@ -0,0 +1,30 @@
+package net.tinyos.packet;
+
+import java.util.*;
+
+class Platform {
+    static int x;
+    static Hashtable platforms;
+
+    static void add(int dummy, String name, int baudrate) {
+	platforms.put(name, new Integer(baudrate));
+    }
+
+    static int get(String name) {
+	if (platforms == null) {
+	    platforms = new Hashtable();
+            try {
+	      BaudRate.init();
+            }
+            catch (Exception e) {
+              System.err.println("Failed to initialize baud rates for platforms. Serial communication may not work properly.");
+            }
+	}
+	Object val = platforms.get(name);
+
+	if (val != null)
+	    return ((Integer)val).intValue();
+	else
+	    return -1;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SFProtocol.java b/support/sdk/java/net/tinyos/packet/SFProtocol.java
new file mode 100644
index 00000000..65a8b8f7
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SFProtocol.java
@@ -0,0 +1,124 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+
+/**
+ * This is the TinyOS 2.x serial forwarder protocol. It is incompatible
+ * with the TinyOS 1.x serial forwarder protocol to avoid accidentally
+ * mixing TinyOS 1.x and 2.x serial forwarders, applications, etc.
+ */
+abstract public class SFProtocol extends AbstractSource
+{
+    // Protocol version, written at connection-open time
+    // 2 bytes: first byte is always 'U', second byte is
+    // protocol version
+    // The actual protocol used will be min(my-version, other-version)
+    // current protocols:
+    // ' ': initial protocol, no further connection data, packets are
+    //      1-byte length followed by n-bytes data. Length must be at least 1.
+    final static byte VERSION[] = {'U', ' '};
+    int version; // The protocol version we're running (negotiated)
+
+    protected InputStream is;
+    protected OutputStream os;
+
+    protected SFProtocol(String name) {
+	super(name);
+    }
+    
+    protected void openSource() throws IOException {
+	// Assumes streams are open
+	os.write(VERSION);
+	byte[] partner = readN(2);
+	
+	// Check that it's a valid header (min version is ' ')
+	if (partner[0] != VERSION[0])
+	    throw new IOException("protocol error");
+	// Actual version is min received vs our version
+	version = partner[1] & 0xff;
+	int ourversion = VERSION[1] & 0xff;
+	if (ourversion < version)
+	    version = ourversion;
+
+	// Handle the different protocol versions (currently only one)
+	// Any connection-time data-exchange goes here
+	switch (version) {
+	case ' ':
+	    break;
+	default:
+	    throw new IOException("bad protocol version");
+	}
+    }
+	
+    protected byte[] readSourcePacket() throws IOException {
+	// Protocol is straightforward: 1 size byte,  data bytes
+	byte[] size = readN(1);
+
+	if (size[0] == 0)
+	    throw new IOException("0-byte packet");
+	byte[] read = readN(size[0] & 0xff);
+	//Dump.dump("reading", read);
+	return read;
+    }
+
+    protected byte[] readN(int n) throws IOException {
+	byte[] data = new byte[n];
+	int offset = 0;
+
+	// A timeout would be nice, but there's no obvious way to
+	// write it before java 1.4 (probably some trickery with
+	// a thread and closing the stream would do the trick, but...)
+	while (offset < n) {
+	  int count = is.read(data, offset, n - offset);
+
+	  if (count == -1)
+	    throw new IOException("end-of-stream");
+	  offset += count;
+	}
+	return data;
+    }
+
+    protected boolean writeSourcePacket(byte[] packet) throws IOException {
+	if (packet.length > 255)
+	    throw new IOException("packet too long");
+	if (packet.length == 0)
+	    throw new IOException("packet too short");
+	//Dump.dump("writing", packet);
+	os.write((byte)packet.length);
+	os.write(packet);
+	os.flush();
+	return true;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SFSource.java b/support/sdk/java/net/tinyos/packet/SFSource.java
new file mode 100644
index 00000000..c4071245
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SFSource.java
@@ -0,0 +1,65 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+import java.net.*;
+
+/**
+ * Packet source (tcp/ip client) for the new serial forwarder protocol
+ */
+class SFSource extends SFProtocol {
+    private Socket socket;
+    private String host;
+    private int port;
+
+    /**
+     * Packetizers are built using the makeXXX methods in BuildSource
+     */
+    SFSource(String host, int port) {
+	super("sf@" + host + ":" + port);
+	this.host = host;
+	this.port = port;
+    }
+
+    protected void openSource() throws IOException {
+	socket = new Socket(host, port);
+	is = socket.getInputStream();
+	os = socket.getOutputStream();
+	super.openSource();
+    }
+
+    protected void closeSource() throws IOException {
+	socket.close();
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SerialByteSource.java b/support/sdk/java/net/tinyos/packet/SerialByteSource.java
new file mode 100644
index 00000000..32339f4f
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SerialByteSource.java
@@ -0,0 +1,139 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.util.*;
+import java.io.*;
+import net.tinyos.comm.*;
+
+/**
+ * A serial port byte source using net.tinyos.comm
+ */
+public class SerialByteSource extends StreamByteSource implements SerialPortListener
+{
+    private SerialPort serialPort;
+    private String portName;
+    private int baudRate;
+
+    public SerialByteSource(String portName, int baudRate) {
+	this.portName = portName;
+	this.baudRate = baudRate;
+    }
+
+    public void openStreams() throws IOException {
+	try {
+            serialPort = new TOSSerial(portName);
+	}
+	catch (Exception e) {
+	    throw new IOException("Could not open " + portName + ": " + e.getMessage());
+	}
+
+	try {
+	    //serialPort.setFlowControlMode(SerialPort.FLOWCONTROL_NONE);
+	    serialPort.setSerialPortParams(baudRate,
+					   8,
+					   SerialPort.STOPBITS_1,
+					   false );
+
+	    serialPort.addListener(this);
+	    serialPort.notifyOn( SerialPortEvent.DATA_AVAILABLE, true );
+	}
+	catch (Exception e) {
+	    serialPort.close();
+	    throw new IOException("Could not configure " + portName + ": " + e.getMessage() );
+	}
+
+	is = serialPort.getInputStream();
+	os = serialPort.getOutputStream();
+    }
+
+    public void closeStreams() throws IOException {
+	serialPort.close();
+    }
+
+    public String allPorts() {
+      /*
+	Enumeration ports = CommPortIdentifier.getPortIdentifiers();
+	if (ports == null)
+	    return "No comm ports found!";
+
+	boolean  noPorts = true;
+	String portList = "Known serial ports:\n";
+	while (ports.hasMoreElements()) {
+	    CommPortIdentifier port = (CommPortIdentifier)ports.nextElement();
+
+	    if (port.getPortType() == CommPortIdentifier.PORT_SERIAL) {
+		portList += "- " + port.getName() + "\n";
+		noPorts = false;
+	    }
+	}
+	if (noPorts)
+	    return "No comm ports found!";
+	else
+	    return portList;
+      */
+      return "Listing available comm ports is no longer supported.";
+    }
+
+    Object sync = new Object();
+
+    public byte readByte() throws IOException {
+	// On Linux at least, javax.comm input streams are not interruptible.
+	// Make them so, relying on the DATA_AVAILABLE serial event.
+	synchronized (sync) {
+	    while (is.available() == 0) {
+		try {
+		    sync.wait();
+		}
+		catch (InterruptedException e) {
+		    close();
+		    throw new IOException("interrupted");
+		}
+	    }
+	}
+
+	return super.readByte();
+    }
+
+    public void serialEvent(SerialPortEvent ev) {
+	synchronized (sync) {
+	    sync.notify();
+	}
+    }
+
+    protected void finalize() {
+      System.out.println("SerialByteSource finalize");
+      serialPort.close();
+    }
+
+}
diff --git a/support/sdk/java/net/tinyos/packet/StreamByteSource.java b/support/sdk/java/net/tinyos/packet/StreamByteSource.java
new file mode 100644
index 00000000..d06bfbe1
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/StreamByteSource.java
@@ -0,0 +1,101 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.util.*;
+import java.io.*;
+
+abstract public class StreamByteSource implements ByteSource
+{
+    protected InputStream is;
+    protected OutputStream os;
+    private boolean opened;
+
+    protected StreamByteSource() {
+    }
+
+    abstract protected void openStreams() throws IOException;
+    abstract protected void closeStreams() throws IOException;
+
+    public void open() throws IOException {
+	openStreams();
+	opened = true;
+    }
+
+    public void close() {
+	if (opened) {
+	    opened = false;
+	    try { 
+		os.close(); 
+		is.close();
+		closeStreams();
+	    }
+	    catch (Exception e) { }
+	}
+    }
+
+    public byte readByte() throws IOException {
+	int serialByte;
+
+	if (!opened)
+	    throw new IOException("not open");
+
+	try {
+	    serialByte = is.read();
+	}
+	catch (IOException e) {
+	    serialByte = -1;
+	}
+
+	if (serialByte == -1) {
+	    close();
+	    throw new IOException("read error");
+	}
+
+	return (byte)serialByte;
+    }
+
+    public void writeBytes(byte[] bytes) throws IOException {
+	if (!opened)
+	    throw new IOException("not open");
+
+	try {
+	    os.write(bytes);
+	    os.flush();
+	}
+	catch (IOException e) {
+	    close();
+	    throw new IOException("write error");
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sf/Makefile b/support/sdk/java/net/tinyos/sf/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/sf/README b/support/sdk/java/net/tinyos/sf/README
new file mode 100644
index 00000000..966ba581
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/README
@@ -0,0 +1,11 @@
+Package: net.tinyos.sf
+Description: provides serial port multiplexing
+Author: Bret Hull 
+	David Gay 
+
+This application instantiates a server which provides
+a bi-directional packet stream between a mote connected
+to the host PC and clients anywhere on the network.  For 
+more information, see "serialforwarder.pdf" in the "doc"
+directory.  
+
diff --git a/support/sdk/java/net/tinyos/sf/SFClient.java b/support/sdk/java/net/tinyos/sf/SFClient.java
new file mode 100644
index 00000000..62fad722
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFClient.java
@@ -0,0 +1,136 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ServerReceivingThread.java
+ *
+ * Description:
+ * The ServerReceivingThread listens for requests
+ * from a connected Aggregator Server.  If a data
+ * packet is received, it is sent on to the serial
+ * port.
+ *
+ * @author Bret Hull
+ * @author David Gay
+ *
+ */
+
+package net.tinyos.sf;
+
+import java.net.*;
+import java.io.*;
+import java.util.*;
+import net.tinyos.packet.*;
+
+public class SFClient extends SFProtocol implements Runnable, PacketListenerIF {
+    private Thread thread;
+    private Socket socket = null;
+    private SerialForwarder sf;
+    private SFListen listenServer;
+
+    public SFClient(Socket socket, SerialForwarder serialForward,
+		    SFListen listenSvr) {
+	super("");
+	thread = new Thread(this);
+        sf = serialForward;
+        listenServer = listenSvr;
+        this.socket = socket;
+        InetAddress addr = socket.getInetAddress();
+	name = "client at " + addr.getHostName() +
+	    " (" + addr.getHostAddress() + ")";
+        sf.debug.message("new " + name);
+    }
+
+    protected void openSource() throws IOException {
+        is = socket.getInputStream();
+        os = socket.getOutputStream();
+	super.openSource();
+    }
+ 
+    protected void closeSource() throws IOException {
+        socket.close();
+    }
+
+    private void init() throws IOException {
+	sf.incrementClients();
+	open(sf);
+	listenServer.source.registerPacketListener(this);
+    }
+
+    public void shutdown() {
+	try {
+	    close();
+	}
+	catch (IOException e) { }
+    }
+
+    public void start() {
+	thread.start();
+    }
+
+    public final void join(long millis) throws InterruptedException {
+	thread.join(millis);
+    }
+
+    public void run() {
+	try {
+	    init();
+	    readPackets();
+	}
+	catch (IOException e) { }
+	finally {
+	    listenServer.source.deregisterPacketListener(this);
+	    listenServer.removeSFClient(this);
+	    sf.decrementClients();
+	    shutdown();
+	}
+    }
+
+    private void readPackets() throws IOException {
+	for (;;) {
+	    byte[] packet = readPacket();
+
+	    sf.incrementPacketsWritten();
+	    if (!listenServer.source.writePacket(packet))
+		sf.verbose.message("write failed");
+        }
+    }
+
+    public void packetReceived(byte[] packet) {
+	try {
+	    writePacket(packet);
+	}
+	catch (IOException e) {
+	    shutdown();
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java b/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java
new file mode 100644
index 00000000..c4f29529
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java
@@ -0,0 +1,91 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.sf;
+
+public class SFConsoleRenderer implements SFRenderer
+{
+  boolean statusLine = false;
+  boolean listening = false;
+  int nclients = 0;
+  int nread = 0;
+  int nwritten = 0;
+
+  public void SFConsoleRenderer()
+  {
+  }
+
+  void clearStatus()
+  {
+    if( statusLine )
+    {
+      System.out.print("\r                                                                              \r");
+      statusLine = false;
+    }
+  }
+
+  void updateStatus()
+  {
+    clearStatus();
+    System.out.print( (listening?"SF enabled":"SF disabled") + ", "
+      + nclients + " " + (nclients==1?"client":"clients") + ", "
+      + nread + " " + (nread==1?"packet":"packets") + " read, "
+      + nwritten + " " + (nwritten==1?"packet":"packets") + " written"
+      + " "
+    );
+    statusLine = true;
+  }
+
+  public void message( String msg )
+  {
+    clearStatus();
+    System.out.println(msg);
+    updateStatus();
+  }
+
+  public void updatePacketsRead( int n )
+  {
+    nread = n;
+    updateStatus();
+  }
+
+  public void updatePacketsWritten( int n )
+  {
+    nwritten = n;
+    updateStatus();
+  }
+
+  public void updateNumClients( int n )
+  {
+    nclients = n;
+    updateStatus();
+  }
+
+  public void updateListenServerStatus( boolean b )
+  {
+    listening = b;
+    updateStatus();
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/sf/SFListen.java b/support/sdk/java/net/tinyos/sf/SFListen.java
new file mode 100644
index 00000000..817910ed
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFListen.java
@@ -0,0 +1,172 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ListenServer.java
+ *
+ * Description:
+ * The Listen Server is the heart of the serial forwarder.  Upon
+ * instantiation, this class spawns the SerialPortReader and the
+ * Multicast threads.  As clients connect, this class spawns
+ * ServerReceivingThreads as wells as registers the new connection
+ * SerialPortReader.  This class also provides the central
+ * point of contact for the GUI, allowing the server to easily
+ * be shut down
+ *
+ * @author Bret Hull
+ * @author David Gay
+ */
+package net.tinyos.sf;
+
+import java.net.*;
+import java.io.*;
+import java.util.*;
+import net.tinyos.packet.*;
+
+public class SFListen extends Thread implements PacketListenerIF, PhoenixError {
+    PhoenixSource source;
+    private ServerSocket serverSocket;
+    private Vector clients  = new Vector();
+    private SerialForwarder sf;
+
+    public SFListen(SerialForwarder sf) {
+        this.sf = sf;
+    }
+
+    // IO error on packet source, restart it
+    // This is essentially the same as the standard resurrection error
+    // handler, but sends the error message to a different location
+    // (sf.message vs sf.verbose.message)
+    public void error(IOException e) {
+	if (e.getMessage() != null) {
+	    sf.message(e.getMessage());
+	}
+	sf.message(source.getPacketSource().getName() +
+		   " died - restarting");
+	try {
+	    sleep(5000);
+	}
+	catch (InterruptedException ie) { }
+	
+    }
+
+    public void run() {
+	try {
+	    sf.verbose.message("Listening to " + sf.motecom);
+
+	    source = BuildSource.makePhoenix(sf.motecom, sf.verbose);
+	    if (source == null) {
+		sf.message("Invalid source " + sf.motecom + ", pick one of:");
+		sf.message(BuildSource.sourceHelp());
+		return;
+	    }
+	    source.setPacketErrorHandler(this);
+	    source.registerPacketListener(this);
+	    source.start();
+	
+	    // open up our server socket
+	    try {
+		serverSocket = new ServerSocket(sf.serverPort);
+	    }
+	    catch (Exception e) {
+		sf.message("Could not listen on port: " + sf.serverPort);
+		source.shutdown();
+		return;
+	    }
+
+	    sf.verbose.message("Listening for client connections on port " + sf.serverPort);
+	    try {
+		for (;;) {
+		    Socket currentSocket = serverSocket.accept();
+		    SFClient newServicer = new SFClient(currentSocket, sf, this);
+		    clients.add(newServicer);
+		    newServicer.start();
+		}
+	    }
+	    catch (IOException e) { }
+	}
+        finally {
+	    cleanup();
+            sf.verbose.message("--------------------------");
+        }
+    }
+
+    private void cleanup() {
+	shutdownAllSFClients();
+	sf.verbose.message("Closing source");
+	if (source != null) {
+	    source.shutdown();
+	}
+	sf.verbose.message("Closing socket");
+	if (serverSocket != null) {
+	    try {
+		serverSocket.close();
+	    }
+	    catch (IOException e) { }
+	}
+	sf.listenServerStopped();
+    }
+
+    private void shutdownAllSFClients() {
+        sf.verbose.message("Shutting down all client connections");
+        SFClient crrntServicer;
+        while (clients.size() != 0) {
+	    crrntServicer = (SFClient)clients.firstElement();
+	    crrntServicer.shutdown();
+	    try {
+		crrntServicer.join(1000);
+	    }
+	    catch (InterruptedException e) {
+		e.printStackTrace();
+	    }
+	}
+    }
+
+    public void removeSFClient(SFClient clientS) {
+        clients.remove(clientS);
+    }
+
+    public void packetReceived(byte[] packet) {
+	sf.incrementPacketsRead();
+    }
+
+    public void shutdown() {
+	try {
+	    if (serverSocket != null) {
+		serverSocket.close();
+	    }
+	}
+	catch (IOException e) {
+	    sf.debug.message("shutdown error " + e);
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sf/SFRenderer.java b/support/sdk/java/net/tinyos/sf/SFRenderer.java
new file mode 100644
index 00000000..e8510dc6
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFRenderer.java
@@ -0,0 +1,35 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+package net.tinyos.sf;
+
+public interface SFRenderer
+{
+  public void message( String msg );
+  public void updatePacketsRead( int n );
+  public void updatePacketsWritten( int n );
+  public void updateNumClients( int n );
+  public void updateListenServerStatus( boolean listening );
+}
+
diff --git a/support/sdk/java/net/tinyos/sf/SFWindow.java b/support/sdk/java/net/tinyos/sf/SFWindow.java
new file mode 100644
index 00000000..7533f8fa
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFWindow.java
@@ -0,0 +1,257 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ControlWindow.java
+ *
+ * Description:
+ * This class displays the GUI that allows the serial forwarder
+ * to be more easily configured
+ *
+ * @author Bret Hull
+ * @author David Gay
+ */
+
+package net.tinyos.sf;
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import net.tinyos.packet.*;
+
+public class SFWindow extends JPanel implements WindowListener, SFRenderer {
+    JScrollPane   mssgPanel             = new JScrollPane();
+    JTextArea     mssgArea              = new JTextArea();
+    BorderLayout  toplayout             = new BorderLayout();
+    JTabbedPane   pnlTabs               = new JTabbedPane();
+    JLabel        labelPacketsSent      = new JLabel();
+    JLabel        labelServerPort       = new JLabel();
+    JTextField    fieldServerPort       = new JTextField();
+    JLabel        labelMoteCom          = new JLabel();
+    JLabel        labelPacketsReceived  = new JLabel();
+    JTextField    fieldMoteCom          = new JTextField();
+    ButtonGroup   bttnGroup             = new ButtonGroup();
+    JPanel        pnlMain               = new JPanel();
+    GridLayout    gridLayout1           = new GridLayout();
+    JLabel        labelNumClients       = new JLabel();
+    JCheckBox     cbVerboseMode         = new JCheckBox();
+    JButton       bStopServer           = new JButton();
+    GridLayout    gridLayout2           = new GridLayout();
+    JButton       bHelp                 = new JButton();
+    JButton       bClear                 = new JButton();
+    JButton       bQuit                 = new JButton();
+    private SerialForwarder sf;
+
+    public SFWindow(SerialForwarder SF) {
+	sf = SF;
+	try {
+	    jbInit();
+	}
+	catch(Exception e) {
+	    e.printStackTrace();
+	    System.exit(2);
+	}
+    }
+
+    static public SFWindow createGui( SerialForwarder sf, String title )
+    {
+        JFrame mainFrame = new JFrame(title);
+        SFWindow cntrlWndw = new SFWindow(sf);
+        mainFrame.setSize(cntrlWndw.getPreferredSize());
+        mainFrame.getContentPane().add("Center", cntrlWndw);
+        mainFrame.show();
+        mainFrame.addWindowListener(cntrlWndw);
+        return cntrlWndw;
+    }
+
+    private void jbInit() throws Exception {
+	this.setLayout(toplayout);
+
+	mssgPanel.setVerticalScrollBarPolicy(JScrollPane.VERTICAL_SCROLLBAR_ALWAYS);
+	mssgPanel.setAutoscrolls(true);
+	this.setMinimumSize(new Dimension(500, 250));
+	this.setPreferredSize(new Dimension(500, 300));
+	labelPacketsSent.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelPacketsSent.setHorizontalTextPosition(SwingConstants.LEFT);
+	labelPacketsSent.setText("Pckts Read: 0");
+	labelServerPort.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelServerPort.setText("Server Port:");
+	fieldServerPort.setFont(new java.awt.Font("Dialog", 0, 10));
+	fieldServerPort.setText(Integer.toString (sf.serverPort));
+	labelMoteCom.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelMoteCom.setText("Mote Communications:");
+
+	labelPacketsReceived.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelPacketsReceived.setHorizontalTextPosition(SwingConstants.LEFT);
+	labelPacketsReceived.setText("Pckts Wrttn: 0");
+	fieldMoteCom.setFont(new java.awt.Font("Dialog", 0, 10));
+	fieldMoteCom.setText(sf.motecom);
+
+	// Input CheckBoxes
+	ActionListener cbal = new ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    updateGlobals();
+		}
+	    };
+
+	bQuit.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    shutdown();
+		}
+	    });
+        bQuit.setText("Quit");
+        bQuit.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	bClear.addActionListener(new java.awt.event.ActionListener() {
+		public synchronized void actionPerformed(ActionEvent e) {
+		    mssgArea.setText("");
+		    sf.clearCounts();
+		}
+	    });
+        bClear.setText("Clear");
+        bClear.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	bHelp.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    sf.message("The Mote communications field must");
+		    sf.message("specify a known packet source, one of:");
+		    sf.message(BuildSource.sourceHelp());
+		}
+	    });
+        bHelp.setText("Help");
+        bHelp.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	pnlMain.setLayout(gridLayout1);
+	pnlMain.setMinimumSize(new Dimension(150, 75));
+	pnlMain.setPreferredSize(new Dimension(150, 75));
+	gridLayout1.setRows(13);
+	labelNumClients.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelNumClients.setText("Num Clients: 0");
+	cbVerboseMode.setSelected(sf.verbose.on);
+	cbVerboseMode.setText("Verbose Mode");
+	cbVerboseMode.setFont(new java.awt.Font("Dialog", 1, 10));
+	cbVerboseMode.addActionListener(cbal);
+
+	bStopServer.setFont(new java.awt.Font("Dialog", 1, 10));
+	bStopServer.setText("Stop Server");
+	bStopServer.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    if (sf.listenServer != null) {
+			sf.stopListenServer();
+		    }
+		    else {
+			updateGlobals();
+			sf.startListenServer();
+		    }
+		}
+	    });
+	gridLayout2.setRows(15);
+	gridLayout2.setColumns(1);
+
+	toplayout.setHgap(1);
+	toplayout.setVgap(1);
+	this.add(mssgPanel, BorderLayout.CENTER);
+	this.add(pnlTabs, BorderLayout.EAST);
+	pnlTabs.add(pnlMain, "Main");
+
+	// Main Panel Setup
+	pnlMain.add(labelServerPort, null);
+	pnlMain.add(fieldServerPort, null);
+	pnlMain.add(labelMoteCom, null);
+	pnlMain.add(fieldMoteCom, null);
+	pnlMain.add(bStopServer, null);
+
+	pnlMain.add(cbVerboseMode, null);
+
+	pnlMain.add(labelPacketsSent, null);
+	pnlMain.add(labelPacketsReceived, null);
+	pnlMain.add(labelNumClients, null);
+        pnlMain.add(bHelp, null);
+        pnlMain.add(bClear, null);
+        pnlMain.add(bQuit, null);
+
+	mssgPanel.getViewport().add(mssgArea, null);
+	mssgArea.setFont(new java.awt.Font("Monospaced", Font.PLAIN, 12));
+    }
+
+    public synchronized void windowClosing (WindowEvent e) {
+	shutdown();
+    }
+
+    public void windowClosed      (WindowEvent e) { }
+    public void windowActivated   (WindowEvent e) { }
+    public void windowIconified   (WindowEvent e) { }
+    public void windowDeactivated (WindowEvent e) { }
+    public void windowDeiconified (WindowEvent e) { }
+    public void windowOpened      (WindowEvent e) { }
+
+    public synchronized void message(String mssg) {
+	mssgArea.append(mssg + "\n");
+	mssgArea.setCaretPosition(mssgArea.getDocument().getLength());
+    }
+
+    public void updatePacketsRead(int numPackets) {
+	labelPacketsSent.setText("Pckts Read: " + numPackets);
+    }
+
+    public void updatePacketsWritten(int numPackets) {
+	labelPacketsReceived.setText("Pckts Wrttn: " + numPackets);
+    }
+
+    public void updateNumClients(int numClients) {
+	labelNumClients.setText("Num Clients: " + numClients);
+    }
+
+    private void updateGlobals() {
+	// set application/communications defaults
+	sf.verbose.on          = cbVerboseMode.isSelected();
+	sf.motecom             = fieldMoteCom.getText();
+	sf.serverPort          = Integer.parseInt(fieldServerPort.getText());
+    }
+
+    public void updateListenServerStatus(boolean running) {
+	if (!running) {
+	    bStopServer.setText("Start Server");
+	}
+	else {
+	    bStopServer.setText("Stop Server");
+	}
+    }
+
+    synchronized private void shutdown() {
+        //sf.cntrlWndw = null;
+	sf.stopListenServer();
+        System.out.println("Serial Forwarder Exited Normally\n");
+        System.exit(0);
+    }
+
+}
diff --git a/support/sdk/java/net/tinyos/sf/SerialForwarder.java b/support/sdk/java/net/tinyos/sf/SerialForwarder.java
new file mode 100644
index 00000000..08f2eb62
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SerialForwarder.java
@@ -0,0 +1,222 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: SerialForwarder.java
+ *
+ * Description:
+ * The SerialForwarder class provides many static functions
+ * that handle the initialization of the serialforwarder
+ * and/or the associated gui.
+ *
+ * @author Bret Hull
+ * @author David Gay
+ */
+package net.tinyos.sf;
+
+import java.io.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class SerialForwarder implements Messenger {
+  public static final int DEFAULT_PORT = 9002;
+  
+    // appication defaults
+    public SFRenderer renderer;
+    public SFListen listenServer;
+    public String motecom = "serial@com1:57600";
+    public boolean logDB;
+
+    public int serverPort = DEFAULT_PORT;
+
+    private boolean guiMode = true;
+    private boolean displayHelp = false;
+    private int nClients = 0;
+    private int nPacketsRead = 0;
+    private int nPacketsWritten = 0;
+    private SFListen listener = null;
+    SFMessenger verbose = new SFMessenger(true);
+    SFMessenger debug = new SFMessenger(false);
+
+    class SFMessenger implements Messenger {
+	boolean on;
+
+	SFMessenger(boolean on) {
+	    this.on = on;
+	}
+
+	public void message(String message) {
+	    if (on) {
+		SerialForwarder.this.message(message);
+	    }
+	}
+    }
+
+    public static void main(String[] args) throws IOException {
+	new SerialForwarder(args);
+    }
+
+    public SerialForwarder(String[] args) throws IOException {
+        ProcessCommandLineArgs (args);
+
+	if (displayHelp) {
+	    printHelp();
+	    System.exit(2);
+	}
+	if (guiMode) {
+            renderer = SFWindow.createGui( this, "TinyOS 2.x Serial Forwarder" );
+	} else {
+            renderer = new SFConsoleRenderer();
+        }
+	startListenServer();
+    }
+
+    private void ProcessCommandLineArgs(String[] args) {
+	for (int i = 0; i < args.length; i++) {
+	    debug.message(args[i]);
+	}
+	for (int i = 0; i < args.length; i++) {
+	    if (args[i].equals ("-no-gui")) {
+		guiMode = false;
+	    }
+	    else if (args[i].equals ("-comm")) {
+		i++;
+		if (i < args.length) {
+		    motecom = args[i];
+		}
+		else {
+		    displayHelp = true; 
+		}
+	    }
+	    else if (args[i].equals ("-port")) {
+		i++;
+		if (i < args.length) {
+		    serverPort = Integer.parseInt(args[i]);
+		}
+		else {
+		    displayHelp = true;
+		}
+	    }
+	    else if (args[i].equals ("-log")) {
+		logDB = true;
+	    }
+	    else if (args[i].equals ("-quiet")) {
+		verbose.on = false;
+	    }
+	    else if (args[i].equals ("-debug")) {
+		debug.on = true;
+	    }
+	    else {
+		displayHelp = true;
+	    }
+	}
+    }
+
+    private static void printHelp() {
+	System.err.println ("optional arguments:");
+	System.err.println ("-port [server port] (default " + DEFAULT_PORT + ")");
+	System.err.println ("-comm [motecom spec] (default serial@com1:57600)");
+	System.err.println ("-packetsize [size] (default 36)");
+	System.err.println ("-no-gui      = do not display graphic interface");
+	System.err.println ("-quiet       = non-verbose mode");
+	System.err.println ("-debug       = display debug messages");
+	System.err.println ("-log         = log to database");
+    }
+
+    private void createGui() {
+        renderer = SFWindow.createGui( this, "SerialForwarder" );
+    }
+
+    public void message(String msg) {
+        renderer.message(msg);
+    }
+
+    synchronized public void incrementPacketsRead() {
+        nPacketsRead++;
+	renderer.updatePacketsRead(nPacketsRead);
+    }
+
+    synchronized public void incrementPacketsWritten() {
+        nPacketsWritten++;
+        renderer.updatePacketsWritten(nPacketsWritten);
+    }
+
+    synchronized public void incrementClients() {
+        nClients++;
+        renderer.updateNumClients(nClients);
+    }
+
+    synchronized public void decrementClients() {
+        nClients--;
+	renderer.updateNumClients(nClients);
+    }
+
+    public synchronized void clearCounts() {
+	nPacketsRead = nPacketsWritten = 0;
+	renderer.updatePacketsWritten(nPacketsWritten);
+	renderer.updatePacketsRead(nPacketsRead);
+    }
+
+    public synchronized void startListenServer() {
+	if (listenServer == null) {
+	    nClients = 0;
+	    listenServer = new SFListen(this);
+	    listenServer.start();
+	}
+	renderer.updateListenServerStatus(true);
+	renderer.updateNumClients(nClients);
+	clearCounts();
+    }
+
+    public void stopListenServer() {
+	SFListen lserver;
+
+	// We can't just make stopSFListen synchronized because
+	// listenServerStopped must be synchronized too
+	synchronized (this) {
+	    lserver = listenServer;
+	    if (lserver != null)
+		listenServer.shutdown();
+	}
+        if (lserver != null) {
+	    try {
+		lserver.join(2000);
+	    }
+	    catch (InterruptedException ex) { }
+	}
+    }
+
+    public synchronized void listenServerStopped() {
+	listenServer = null;
+        renderer.updateListenServerStatus(false);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sim/LinkLayerModel.java b/support/sdk/java/net/tinyos/sim/LinkLayerModel.java
new file mode 100644
index 00000000..edf875f7
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sim/LinkLayerModel.java
@@ -0,0 +1,751 @@
+/****************************************************************************
+ *       
+ * "Copyright (c) 2006 The University of Southern California"  
+ * All rights reserved.   
+ *       
+ * Permission to use, copy, modify, and distribute all components of 
+ * this software and its documentation for any purpose, without fee, 
+ * and without written agreement is hereby granted, 
+ * provided that the above copyright notice, the following two paragraphs 
+ * and the author names appear in all copies of this software.  
+ *     
+ * NO REPRESENTATIONS ARE MADE ABOUT THE SUITABILITY OF THE SOFTWARE FOR ANY  
+ * PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY.  
+ *     
+ * Neither the software developers, the Autonomous Network Research Group  
+ * (ANRG), or USC, shall be liable for any damages suffered from using this  
+ * software.   
+ *     
+ * Author:  Marco Zuniga, Avinash Sridharan
+ * Director: Prof. Bhaskar Krishnamachari
+ * Autonomous Networks Reseach Group, University of Southern California
+ * http://ceng.usc.edu/~anrg
+ * Contact: marcozun@usc.edu
+ *
+ * Date last modified: 2004/07/02 marcozun
+ * Date last modified: 2006/02/05 asridhar
+ *       
+ *     
+ * Description: This file contains the code that generates the
+ * gains for all links in the network and noise floor values for
+ * all nodes.
+ *     
+ ****************************************************************************/
+
+package net.tinyos.sim;
+
+import java.io.*;
+import java.util.*;
+import java.text.DecimalFormat;
+
+/**
+ * Stores channel, radio and topology parameters provided by user
+ * through the configuration file.
+ */
+
+class InputVariables {
+
+  // Channel parameters
+  double n;  // path loss exponent
+  double sigma; // standard deviation shadowing variance
+  double  d0;  // reference distance
+  double pld0; // power decay for reference distance d0
+  // Radio parameters
+  double pn;  // radio noise floor
+  double wgn; // white gaussian noise 
+  // Covariance Matrix for hardware variance
+  double  s11;
+  double  s12;
+  double  s21;
+  double  s22;
+  // Topology parameters
+  int  numNodes; // number of nodes
+  int  top;  // topology option
+  double grid;  // grid unit
+  double Xterr;  // X dimension of Terrain
+  double Yterr;  // Y dimension of Terrain
+  String topFile; // file name with nodes' coordinates (user-defined)
+  // data directly derived from configuration file
+  double area;  // area of the terrain
+
+
+  InputVariables() { // Constructor, loading default values
+    n  = 3;
+    sigma = 3;
+    pld0 = 55;
+    d0  = 1;
+    pn  = -105;
+    wgn  = 4;
+    s11  = 3.7;
+    s12  = -3.3;
+    s21  = -3.3;
+    s22  = 6.0;
+    numNodes= 0;
+    top  = 0;
+    Xterr = 0;
+    Yterr = 0;
+    topFile = "";
+    area  = 0;
+  }
+
+}
+
+/**
+ * Stores nodes' coordinates, link gains and noise floor values for a given topology 
+ */
+
+class OutputVariables {
+
+  double[] nodePosX;  // X coordinate
+  double[] nodePosY;  // Y coordinate
+  double[] outputpowervar; // output power
+  double[] noisefloor;  // noise floor
+  double[][]  linkGain;  // link gain
+
+  OutputVariables(int numNodes) { // Constructor
+
+    nodePosX = new double[numNodes];
+    nodePosY = new double[numNodes];
+    outputpowervar = new double[numNodes];
+    noisefloor  = new double[numNodes];
+    linkGain = new double[numNodes][numNodes];
+  }
+
+}
+
+
+/**
+ * Simulates gains for all links of a specific topology, and noise
+ * floor values for all nodes.  
    The link gain between nodes A and B
+ * is defined as the output power of A minus the pathloss between A
+ * and B.  The user specifies the desired channel, radio and topology
+ * parameters through a configuration file.  The configuration file is
+ * provided as a command line argument: $ java LinkLayerModel
+ * configurationFileName, and the link gains and noise floor
+ * values are provided on a file called linkgain.out.
+ */
+
+public class LinkLayerModel  {
+
+  public static void main (String args[]) {
+    if (args.length != 1) {
+      usage();
+      return;
+    }
+    // variable that contains input parameters
+    InputVariables inVar = new InputVariables();
+    // parse configuration file and store parameters in inVar
+    readFile  ( args[0], inVar );
+    // if user defined topology (TOPOLOGY = 4), obtain number of nodes
+    if (inVar.top == 4) {
+      obtainNumNodes (inVar.topFile, inVar);
+    }
+    // variable that contains output data
+    OutputVariables outVar = new OutputVariables( inVar.numNodes ); 
+    // create topology
+    System.out.print("Topology ...\t\t\t");
+    obtainTopology ( inVar, outVar );
+    System.out.println("done");
+    // obtain ouput power and noise floor for all nodes
+    System.out.print("Radio Pt and Pn ...\t\t");
+    obtainRadioPtPn ( inVar, outVar );
+    System.out.println("done");
+    // obtain link gains 
+    System.out.print("Links Gain .....\t\t");
+    obtainLinkGain ( inVar, outVar);
+    System.out.println("done");
+    // print linkgain.out (link gains and noise floor) and topology.out (x/y coordinates)
+    System.out.print("Printing Output File ...\t");
+    printFile  ( inVar, outVar);
+    System.out.println("done");
+  }
+
+
+  /**
+   * Parses configuration file provided by user and stores specified
+   * parameters
+   *
+   * @param inputFile configuration file containing channel, radio and
+   * deployment parameters
+   * @param  var   class that stores input parameters from configuration file
+   * @return    true if file parsing was performed without errors
+   */
+
+  protected static boolean readFile (String inputFile, InputVariables var )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+
+    // open configuration file
+    try {
+      FileInputStream fin =  new FileInputStream(inputFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+        try {
+          // parse the file
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("") && !thisLine.startsWith("%") ) {
+              st = new StringTokenizer(thisLine, " =;\t");
+              String key = st.nextToken();
+              String value = st.nextToken();
+
+              if ( key.equals("PATH_LOSS_EXPONENT")) {
+                var.n = Double.valueOf(value).doubleValue();
+                if (var.n < 0) {
+                  System.out.println("Error: value of PATH_LOSS_EXPONENT must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("SHADOWING_STANDARD_DEVIATION")) {
+                var.sigma = Double.valueOf(value).doubleValue();
+                if (var.sigma < 0) {
+                  System.out.println("Error: value of SHADOWING_STANDARD_DEVIATION must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("PL_D0")) {
+                var.pld0 = Double.valueOf(value).doubleValue();
+                if (var.pld0 < 0) {
+                  System.out.println("Error: value of PL_D0 must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("D0")) {
+                var.d0 = Double.valueOf(value).doubleValue();
+                if (var.d0 <= 0) {
+                  System.out.println("Error: value of D0 must be greater than zero");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("NOISE_FLOOR")) {
+                var.pn = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("WHITE_GAUSSIAN_NOISE")) {
+                var.wgn = Double.valueOf(value).doubleValue();
+                if (var.wgn < 0) {
+                  System.out.println("Error: value of WHITE_GAUSSIAN_NOISE must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("S11")) {
+                var.s11 = Double.valueOf(value).doubleValue();
+                if (var.s11 < 0) {
+                  System.out.println("Error: value of S11 must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("S12")) {
+                var.s12 = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("S21")) {
+                var.s21 = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("S22")) {
+                var.s22 = Double.valueOf(value).doubleValue();
+                if (var.s22 < 0) {
+                  System.out.println("Error: value of S22 must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("NUMBER_OF_NODES")) {
+                var.numNodes = Integer.parseInt(value);
+                if (var.numNodes <= 0) {
+                  System.out.println("Error: value of NUMBER_OF_NODES must be positive");
+                  System.exit(1);
+                }
+              } 
+              else if ( key.equals("TOPOLOGY")) {
+                var.top = Integer.parseInt(value);
+                if ( (var.top < 1) | (var.top > 4) ) {
+                  System.out.println("Error: value of TOPOLOGY must be between 1 and 4");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("GRID_UNIT")) {
+                var.grid = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("TOPOLOGY_FILE")) {
+                var.topFile = value;
+              }
+              else if ( key.equals("TERRAIN_DIMENSIONS_X")) {
+                var.Xterr = Double.valueOf(value).doubleValue();
+                if (var.Xterr < 0) {
+                  System.out.println("Error: value of TERRAIN_DIMENSIONS_X must be positive");
+                  System.exit(1);
+                }
+              } 
+              else if ( key.equals("TERRAIN_DIMENSIONS_Y")) {
+                var.Yterr = Double.valueOf(value).doubleValue();
+                if (var.Yterr < 0) {
+                  System.out.println("Error: value of TERRAIN_DIMENSIONS_Y must be positive");
+                  System.exit(1);
+                }
+                var.area = var.Xterr * var.Yterr;
+              } 
+              else {
+                System.out.println("Error: undefined parameter " + key + ", please review your configuration file");
+                System.exit(1);
+              } 
+            }
+          } // end while loop
+        }
+        catch (Exception e) {
+          System.out.println("Error1: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error2: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error Failed to Open file " + inputFile + e);
+      System.exit(1);
+    }
+
+    return true;
+
+  }
+
+  /**
+   * Obtain X and Y coordinates for all nodes. Different type of topologies are available 
+   * (grid, uniform, random, user-defined)
+   * 
+   * @param inVar class that contains input parameters from configuration file
+   * @param outVar class that stores x/y coordinates
+   * @return true if X/Y coordinates are obtained without errors
+   */
+
+  protected static boolean obtainTopology( InputVariables  inVar, 
+                                           OutputVariables outVar )
+  {
+
+    Random rand = new Random();
+    int i, j;
+    int sqrtNumNodes, nodesX;
+    double cellArea, cellLength;
+    double Xdist, Ydist, dist;
+    boolean wrongPlacement;
+
+    if (inVar.numNodes <= 0) {
+      System.out.println("\nError: value of NUMBER_OF_NODES must be positive");
+      System.exit(1);
+    }
+
+    switch (inVar.top) {
+    case 1: // GRID
+      if (inVar.grid < inVar.d0) {
+        System.out.println("\nError: value of GRID_UNIT must be equal or greater than D0");
+        System.exit(1);
+      }
+      sqrtNumNodes = (int) Math.sqrt(inVar.numNodes);
+      if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) {
+        System.out.println ("\nError: on GRID topology, NUMBER_OF_NODES should be the square of a natural number");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = (i%sqrtNumNodes) * inVar.grid;
+        outVar.nodePosY[i] = (i/sqrtNumNodes) * inVar.grid;
+      }
+      break;
+    case 2: // UNIFORM
+      sqrtNumNodes = (int) Math.sqrt(inVar.numNodes);
+      if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) {
+        System.out.println ("\nError: on UNIFORM topology, NUMBER_OF_NODES should be the square of a natural number");
+        System.exit(1);
+      }
+      if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive");
+        System.exit(1);
+      }
+      if ( inVar.Xterr != inVar.Yterr ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS_X and TERRAIN_DIMENSIONS_Y must be equal");
+        System.exit(1);
+      }
+      cellLength = Math.sqrt ( inVar.area / inVar.numNodes );
+      nodesX = sqrtNumNodes; 
+      if ( cellLength < (inVar.d0*1.4) ) {
+        System.out.println ("\nError: on UNIFORM topology, density is too high, increase physical terrain");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength;
+        outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength;
+        wrongPlacement = true;
+        while ( wrongPlacement ) {
+          for (j = 0; j < i; j = j+1) {
+            Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+            Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+            // distance between a given pair of nodes
+            dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+            if (dist < inVar.d0) {
+              outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength;
+              outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength;
+              wrongPlacement = true;
+              break;
+            }
+          }
+          if ( j == i ) {
+            wrongPlacement = false;
+          }
+        }
+      }
+      break;
+    case 3: // RANDOM
+      if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive");
+        System.exit(1);
+      }
+      cellLength = Math.sqrt ( inVar.area / inVar.numNodes );   
+      if ( cellLength < (inVar.d0*1.4) ) {
+        System.out.println ("\nError: on RANDOM topology, density is too high, increase physical terrain");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr;
+        outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr;
+        wrongPlacement = true;
+        while ( wrongPlacement ) {
+          for (j = 0; j < i; j = j+1) {
+            Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+            Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+            // distance between a given pair of nodes
+            dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+            if (dist < inVar.d0) {
+              outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr;
+              outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr;
+              wrongPlacement = true;
+              break;
+            }
+          }
+          if ( j == i ) {
+            wrongPlacement = false;
+          }
+        }
+      }
+      break;
+    case 4: // FILE (user-defined topology)
+      readTopologyFile(inVar.topFile, outVar);
+      correctTopology (inVar, outVar);
+      break;
+    default:
+      System.out.println("\nError: topology is not correct, please check TOPOLOGY in the configuration file");
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+
+  /**
+   * Checks that user-defined topology does not have inter-node distances less than D0 meter, 
+   * where D0 is the reference distance in the channel model (specified in configuration file)
+   *
+   * @param inVar class that stores input parameters from configuration file
+   * @param outVar class that stores link gains, noise floors and x/y coordinates
+   * @return true if x/y coordinates provided by user satisfy the condition that no internode distance is lesss than D0
+   */
+
+  protected static boolean correctTopology ( InputVariables  inVar, 
+                                             OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double Xdist, Ydist, dist, avgDecay;
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      for (j = i+1; j < inVar.numNodes; j = j+1 ) {
+        Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+        Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+        // distance between a given pair of nodes
+        dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+        if (dist < inVar.d0) {
+          System.out.println("\nError: file " + inVar.topFile + " contains inter-node distances less than one.");
+          System.exit(1);
+        }
+      }
+    }
+    return true;
+  }
+
+
+  /**
+   * Obtains output power and noise floor for all nodes in the network
+   *
+   * @param inVar class that contains radio parameters
+   * @param outVar class that stores output powers and noise floors
+   * @return true if all output powers and noise floors were obtained correctly
+   */
+
+  protected static boolean obtainRadioPtPn ( InputVariables  inVar, 
+                                             OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double t11, t12, t21, t22;
+    double rn1, rn2;
+
+    t11 = 0;
+    t12 = 0;
+    t21 = 0;
+    t22 = 0;
+
+    if ( (inVar.s11 == 0) && (inVar.s22 == 0) ) { // symmetric links do nothing
+    }
+    else if ( (inVar.s11 == 0) && (inVar.s22 != 0) ) { // both S11 and S22 must be 0 for symmetric links
+      System.out.println("\nError: symmetric links require both, S11 and S22 to be 0, not only S11.");
+      System.exit(1);
+    }
+    else {
+      if ( (inVar.s12 != inVar.s21) ) { // check that S is symmetric
+        System.out.println("\nError: S12 and S21 must have the same value.");
+        System.exit(1);
+      }
+      if ( Math.abs(inVar.s12) > Math.sqrt(inVar.s11*inVar.s22) ) { // check that correlation is within [-1,1]
+        System.out.println("\nError: S12 (and S21) must be less than sqrt(S11xS22).");
+        System.exit(1);
+      }
+      t11 = Math.sqrt(inVar.s11);
+      t12 = inVar.s12/Math.sqrt(inVar.s11);
+      t21 = 0;
+      t22 = Math.sqrt( (inVar.s11*inVar.s22 - Math.pow( inVar.s12, 2)) / inVar.s11 );
+    }
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      rn1 = rand.nextGaussian();
+      rn2 = rand.nextGaussian();
+      outVar.noisefloor[i]  = inVar.pn + t11 * rn1;
+      outVar.outputpowervar[i] = t12 * rn1 + t22 * rn2;
+    }
+    return true;
+  }
+
+
+  /**
+   * Obtains gain for all links in the network. The link gain between nodes A and B 
+   * is defined as the output power of A minus the pathloss between A and B.
+   *
+   * @param inVar class that contains channel parameters from configuration file
+   * @param outVar class that stores link gains
+   * @return true if all link gains were obtained correctly
+   */
+
+  protected static boolean obtainLinkGain ( InputVariables  inVar, 
+                                            OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double Xdist, Ydist, dist, pathloss;
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      for (j = i+1; j < inVar.numNodes; j = j+1 ) {
+        Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+        Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+        // distance between a given pair of nodes
+        dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+        // mean decay dependent on distance
+        pathloss = - inVar.pld0 - 10*inVar.n*(Math.log(dist/inVar.d0)/Math.log(10.0)) + ( rand.nextGaussian()*inVar.sigma );
+        // assymetric links are given by running two different
+        // R.V.s for each unidirectional link (output power variance).
+        outVar.linkGain[i][j] = outVar.outputpowervar[i] + pathloss;
+        outVar.linkGain[j][i] = outVar.outputpowervar[j] + pathloss;
+  
+      }
+    }
+    return true;
+
+  }
+
+
+  /**
+   * Provides link gain and noise floor in file linkgain.out, and the
+   * X/Y coordinates in file topology.out.
+   *
+   * @param inVar class that contains input parameters from configuration file
+   * @param outVar class that stores link gains, noise floors and x/y coordinates
+   * @return true if files linkgain.out and topology.out were printed correctly
+   */
+
+  protected static boolean printFile( InputVariables  inVar, 
+                                      OutputVariables outVar )
+  {
+
+    int i, j;
+
+    DecimalFormat posFormat = new DecimalFormat("##0.00");
+
+    /*
+     * Output file for xy coordinates.
+     */
+
+    try{
+      FileOutputStream fout =  new FileOutputStream("topology.out");
+      try {
+        PrintStream myOutput = new PrintStream(fout);
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          myOutput.print( i + "\t" + posFormat.format(outVar.nodePosX[i]) + "\t"+ posFormat.format(outVar.nodePosY[i]) + "\n");
+        }
+      }
+      catch (Exception e) {
+        System.out.println("\nError : Failed to open a print stream to the linkgain file" + e);
+      }
+
+    }
+    catch (Exception e) {
+      System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e);
+    }
+
+   
+    /*
+     * Output file for link gains.
+     */
+    try{
+      FileOutputStream fout =  new FileOutputStream("linkgain.out");
+      try {
+        PrintStream myOutput = new PrintStream(fout);
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          for (j = (i+1); j < inVar.numNodes; j = j+1 ) {
+            if ( i != j) {
+              myOutput.print( "gain\t" + i + "\t" + j + "\t" + posFormat.format(outVar.linkGain[i][j]) + "\n");
+              myOutput.print( "gain\t" + j + "\t" + i + "\t" + posFormat.format(outVar.linkGain[j][i]) + "\n");
+            }
+          }
+        }
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          myOutput.print( "noise\t" + i + "\t" + posFormat.format(outVar.noisefloor[i]) + "\t" + posFormat.format(inVar.wgn) + "\n");
+        }
+      }
+      catch (Exception e) {
+        System.out.println("\nError : Failed to open a print stream to the linkgain file" + e);
+      }
+
+    }
+    catch (Exception e) {
+      System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e);
+    }
+
+    return true;
+  }
+
+  /**
+   * Obtains nodes coordinates for user-defined topology.
+   *  
+   * @param inputTopoFile topology file provided by user
+   * @param outVar class that contains variables to store x/y coordinates of nodes
+   * @return true if x/y coordinates of user-defined topology file were read correctly.
+   */
+
+  protected static boolean readTopologyFile ( String inputTopoFile,
+                                              OutputVariables outVar )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+    int counter = 0;
+
+    try {
+      FileInputStream fin =  new FileInputStream(inputTopoFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+
+        try {
+
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("")  && !thisLine.startsWith("%") && 
+                 !thisLine.startsWith(" ") ) {
+              st = new StringTokenizer(thisLine, " \t");
+              int node = Integer.parseInt(st.nextToken());
+              double x = Double.valueOf(st.nextToken()).doubleValue();
+              double y = Double.valueOf(st.nextToken()).doubleValue();
+              outVar.nodePosX[node] = x;
+              outVar.nodePosY[node] = y;
+              counter++;
+            }
+          }
+        } // end try
+        catch (Exception e) {
+          System.out.println("Error4: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error5: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e);
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+
+  /**
+   * Obtains number of nodes in network when user defines the topology.
+   *
+   * @param inputTopoFile topology file provided by user
+   * @param inVar class that contains variable for number of nodes
+   * @return true if number of nodes from user-defined topology file were obtained correctly
+   */
+
+  protected static boolean obtainNumNodes ( String inputTopoFile,
+                                            InputVariables inVar )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+    int counter = 0;
+
+    try {
+      FileInputStream fin =  new FileInputStream(inputTopoFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+
+        try {
+
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("")  && !thisLine.startsWith("%") && 
+                 !thisLine.startsWith(" ") ) {
+              counter++;
+            }
+          }
+          inVar.numNodes = counter; 
+
+        } // end try
+        catch (Exception e) {
+          System.out.println("Error4: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error5: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e);
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+  private static void usage() {
+    System.err.println("usage: net.tinyos.sim.LinkLayerModel ");
+  }
+}
+
+
diff --git a/support/sdk/java/net/tinyos/sim/Makefile b/support/sdk/java/net/tinyos/sim/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sim/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/tools/Listen.java b/support/sdk/java/net/tinyos/tools/Listen.java
new file mode 100644
index 00000000..cfea0b6a
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Listen.java
@@ -0,0 +1,77 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.tools;
+
+import java.io.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+import net.tinyos.message.*;
+
+public class Listen {
+    public static void main(String args[]) throws IOException {
+        String source = null;
+        PacketSource reader;
+        if (args.length == 2 && args[0].equals("-comm")) {
+          source = args[1];
+        }
+	else if (args.length > 0) {
+	    System.err.println("usage: java net.tinyos.tools.Listen [-comm PACKETSOURCE]");
+	    System.err.println("       (default packet source from MOTECOM environment variable)");
+	    System.exit(2);
+	}
+        if (source == null) {	
+  	  reader = BuildSource.makePacketSource();
+        }
+        else {
+  	  reader = BuildSource.makePacketSource(source);
+        }
+	if (reader == null) {
+	    System.err.println("Invalid packet source (check your MOTECOM environment variable)");
+	    System.exit(2);
+	}
+
+	try {
+	  reader.open(PrintStreamMessenger.err);
+	  for (;;) {
+	    byte[] packet = reader.readPacket();
+	    Dump.printPacket(System.out, packet);
+	    System.out.println();
+	    System.out.flush();
+	  }
+	}
+	catch (IOException e) {
+	    System.err.println("Error on " + reader.getName() + ": " + e);
+	}
+    }
+}
+
diff --git a/support/sdk/java/net/tinyos/tools/ListenRaw.java b/support/sdk/java/net/tinyos/tools/ListenRaw.java
new file mode 100644
index 00000000..01cf8b4c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/ListenRaw.java
@@ -0,0 +1,173 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors: Mike Chen, Philip Levis
+ * Last Modified: 7/1/02 (transition to nesC)
+ *
+ */
+
+/**
+ * @author Mike Chen
+ * @author Philip Levis
+ */
+
+
+
+package net.tinyos.tools;
+
+import java.util.*;
+import java.io.*;
+import net.tinyos.comm.*;
+
+import net.tinyos.util.*;
+
+public class ListenRaw {
+    private static String CLASS_NAME = "net.tinyos.tools.ListenRaw";
+    private static final int MAX_MSG_SIZE = 40;
+    private static final int PORT_SPEED_TELOS = 115200;
+    private static final int PORT_SPEED_MICAZ = 57600;
+    private static final int PORT_SPEED_MICA2 = 57600;
+    private static final int PORT_SPEED_MICA2DOT = 19200;
+    private static final int PORT_SPEED_MICA = 19200;
+    private static final int PORT_SPEED_RENE = 19200;
+    private static final int LENGTH_OFFSET = 4;
+    private int packetLength;
+    private int portSpeed;
+
+    private SerialPort port;
+    private String portName;
+    private InputStream in;
+    private OutputStream out;
+
+    public ListenRaw(String portName, int portSpeed) {
+	this.portName = portName;
+	this.portSpeed = portSpeed;
+    }
+
+
+    public void open() throws IOException, UnsupportedCommOperationException {
+	System.out.println("Opening port " + portName);
+	port = new TOSSerial(portName);
+	in = port.getInputStream();
+	out = port.getOutputStream();
+	
+	//port.setFlowControlMode(SerialPort.FLOWCONTROL_NONE);
+	// These are the mote UART parameters
+	port.setSerialPortParams(portSpeed, 8, SerialPort.STOPBITS_1, false);
+	printPortStatus();
+	System.out.println();
+    }
+    
+    private void printPortStatus() {
+	System.out.println(" baud rate: " + port.getBaudRate());
+	System.out.println(" data bits: " + port.getDataBits());
+	System.out.println(" stop bits: " + port.getStopBits());
+	System.out.println(" parity:    " + port.getParity());
+    }
+
+    public void read() throws IOException {
+	int i; 
+	int count = 0;
+	byte[] packet = new byte[MAX_MSG_SIZE];
+	
+	while ((i = in.read()) != -1) {
+	    if (i == 0x7e) {
+		System.out.println();
+	    }
+	    Dump.printByte(System.out, i);
+	}
+    }
+
+    private static void printUsage() {
+	System.err.println("usage: java net.tinyos.tools.ListenRaw [options] ");
+	System.err.println("options are:");
+	System.err.println("  -h, --help:    usage help");
+	System.err.println("  -p:            print available ports");
+	System.err.println("  -telos:        Telos ("+PORT_SPEED_TELOS+" bps) [default]");
+	System.err.println("  -micaz:        Mica2 ("+PORT_SPEED_MICAZ+" bps) [default]");
+	System.err.println("  -mica2:        Mica2 ("+PORT_SPEED_MICA2+" bps) [default]");
+	System.err.println("  -mica2dot:        Mica2Dot ("+PORT_SPEED_MICA2DOT+" bps)");
+	System.err.println("  -mica:         Mica ("+PORT_SPEED_MICA+" bps)");
+	System.err.println("  -rene:         Rene ("+PORT_SPEED_RENE+" bps)");
+	System.exit(-1);
+    }
+
+
+    public static void main(String args[]) {
+	int speed = PORT_SPEED_MICA2;
+
+	if ((args.length < 1) || (args.length > 3)) {
+	    printUsage();
+	}
+	
+	for (int i = 0; i < args.length; i++) {
+	    if (args[i].equals("-h") || args[i].equals("--help")) {
+		printUsage();
+	    }
+	    if (args[i].equals("-telos")) {
+	        speed = PORT_SPEED_TELOS;
+	    }
+	    if (args[i].equals("-micaz")) {
+	        speed = PORT_SPEED_MICAZ;
+	    }
+	    if (args[i].equals("-mica2")) {
+	        speed = PORT_SPEED_MICA2;
+	    }
+	    if (args[i].equals("-mica2dot")) {
+	        speed = PORT_SPEED_MICA2DOT;
+	    }
+	    if (args[i].equals("-mica")) {
+	        speed = PORT_SPEED_MICA;
+	    }
+	    if (args[i].equals("-rene")) {
+	        speed = PORT_SPEED_RENE;
+	    }
+	}
+
+	if (args[args.length - 1].charAt(0) == '-') {
+	    return; // No port specified
+	}
+	
+	ListenRaw reader = new ListenRaw(args[args.length - 1], speed);
+	try {
+	    reader.open();
+	}
+	catch (Exception e) {
+	    e.printStackTrace();
+	}
+	
+	try {
+	    reader.read();
+	}
+	catch (Exception e) {
+	    e.printStackTrace();
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/tools/Makefile b/support/sdk/java/net/tinyos/tools/Makefile
new file mode 100644
index 00000000..1102a8a4
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Makefile
@@ -0,0 +1,10 @@
+# $Id$
+#
+# TinyOS Tools Makefile
+#
+# @author  TinyOS Team
+#
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
diff --git a/support/sdk/java/net/tinyos/tools/MsgReader.java b/support/sdk/java/net/tinyos/tools/MsgReader.java
new file mode 100644
index 00000000..885ee3ee
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/MsgReader.java
@@ -0,0 +1,119 @@
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:	Phil Levis 
+ * Date:        December 1 2005
+ * Desc:        Generic Message reader
+ *               
+ */
+
+/**
+ * @author Phil Levis 
+ */
+
+
+package net.tinyos.tools;
+
+import java.util.*;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class MsgReader implements net.tinyos.message.MessageListener {
+
+  private MoteIF moteIF;
+  
+  public MsgReader(String source) throws Exception {
+    if (source != null) {
+      moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err));
+    }
+    else {
+      moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err));
+    }
+  }
+
+  public void start() {
+  }
+  
+  public void messageReceived(int to, Message message) {
+    long t = System.currentTimeMillis();
+    //    Date d = new Date(t);
+    System.out.print("" + t + ": ");
+    System.out.println(message);
+  }
+
+  
+  private static void usage() {
+    System.err.println("usage: MsgReader [-comm ] message-class [message-class ...]");
+  }
+
+  private void addMsgType(Message msg) {
+    moteIF.registerListener(msg, this);
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    Vector v = new Vector();
+    if (args.length > 0) {
+      for (int i = 0; i < args.length; i++) {
+	if (args[i].equals("-comm")) {
+	  source = args[++i];
+	}
+	else {
+	  String className = args[i];
+	  try {
+	    Class c = Class.forName(className);
+	    Object packet = c.newInstance();
+	    Message msg = (Message)packet;
+	    v.addElement(msg);
+	  }
+	  catch (Exception e) {
+	    System.err.println(e);
+	  }
+	}
+      }
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+
+    MsgReader mr = new MsgReader(source);
+    Enumeration msgs = v.elements();
+    while (msgs.hasMoreElements()) {
+      Message m = (Message)msgs.nextElement();
+      mr.addMsgType(m);
+    }
+    mr.start();
+  }
+
+
+}
diff --git a/support/sdk/java/net/tinyos/tools/Send.java b/support/sdk/java/net/tinyos/tools/Send.java
new file mode 100644
index 00000000..ad7f1aef
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Send.java
@@ -0,0 +1,59 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.tools;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+public class Send {
+    public static void main(String[] argv) throws IOException
+    {
+	PacketSource sfw = BuildSource.makePacketSource();
+	sfw.open(PrintStreamMessenger.err);
+
+	byte[] packet = new byte[argv.length];
+	for (int i = 0; i < argv.length; i++)
+	    packet[i] = (byte)Integer.parseInt(argv[i], 16);
+
+	try {
+	    sfw.writePacket(packet);
+	}
+	catch (IOException e) {
+	    System.exit(2);
+	}
+	Dump.printPacket(System.out, packet);
+	System.out.println();
+	// A close would be nice, but javax.comm's close is deathly slow
+	//sfw.close();
+	System.exit(0);
+    }
+}    
diff --git a/support/sdk/java/net/tinyos/util/Crc.java b/support/sdk/java/net/tinyos/util/Crc.java
new file mode 100644
index 00000000..f9b5fc4c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Crc.java
@@ -0,0 +1,78 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+public class Crc {
+    public static int calcByte(int crc, int b) {
+      crc = crc ^ (int)b << 8;
+
+      for (int i = 0; i < 8; i++) {
+	if ((crc & 0x8000) == 0x8000)
+	  crc = crc << 1 ^ 0x1021;
+	else
+	  crc = crc << 1;
+      }
+
+      return crc & 0xffff;
+    }
+
+    public static int calc(byte[] packet, int index, int count) {
+	int crc = 0;
+	int i;
+
+	while (count > 0) {
+	    crc = calcByte(crc, packet[index++]);
+	    count--;
+	}
+	return crc;
+    }
+
+    public static int calc(byte[] packet, int count) {
+	return calc(packet, 0, count);
+    }
+
+    public static void set(byte[] packet) {
+        int crc = Crc.calc(packet, packet.length - 2);
+
+        packet[packet.length - 2] = (byte) (crc & 0xFF);
+        packet[packet.length - 1] = (byte) ((crc >> 8) & 0xFF);
+    }
+
+    public static void main(String[] args) {
+	byte[] ia = new byte[args.length];
+
+	for (int i = 0; i < args.length; i++)
+	    try {
+		ia[i] = Integer.decode(args[i]).byteValue();
+	    } catch (NumberFormatException e) { }
+	System.out.println(Integer.toHexString(calc(ia, ia.length)));
+    }
+}
diff --git a/support/sdk/java/net/tinyos/util/Dump.java b/support/sdk/java/net/tinyos/util/Dump.java
new file mode 100644
index 00000000..4e2f18bb
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Dump.java
@@ -0,0 +1,80 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay 
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.util;
+
+import java.io.*;
+
+/**
+ * Dump class (print tinyos messages).
    
+ *
+ * Print packets in hex
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ */
+public class Dump {
+    public static void printByte(PrintStream p, int b) {
+	String bs = Integer.toHexString(b & 0xff).toUpperCase();
+	if (b >=0 && b < 16)
+	    p.print("0");
+	p.print(bs + " ");
+    }
+
+    public static void printPacket(PrintStream p, byte[] packet, int from, int count) {
+	for (int i = from; i < count; i++)
+	    printByte(p, packet[i]);
+    }
+
+    public static void printPacket(PrintStream p, byte[] packet) {
+	printPacket(p, packet, 0, packet.length);
+    }
+
+    public static void dump(PrintStream to, String prefix, byte[] data) {
+	to.print(prefix);
+	to.print(":");
+	printPacket(to, data);
+	to.println();
+    }
+
+    public static void dump(String prefix, byte[] packet) {
+	dump(System.err, prefix, packet);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/util/Env.java b/support/sdk/java/net/tinyos/util/Env.java
new file mode 100644
index 00000000..be9b00a5
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Env.java
@@ -0,0 +1,50 @@
+// $Id$
+
+package net.tinyos.util;
+
+/**
+ * The Env class provides an implementation of
+ * getenv that actually works, unlike the one in
+ * java.lang.System.  The class cannot be instantiated.
+ *
+ * V1.1: provide wrapper so that getenv doesn't fail horribly when the
+ * native code is not found.
+ *
+ * @author   R M Yorston, David Gay
+ * @version  1.1
+ */
+public class Env {
+    static private boolean loaded;
+    static {
+	try {
+	    java.lang.System.loadLibrary("getenv");
+	    loaded = true;
+	}
+	catch (Throwable t) {
+	    System.err.println("getenv JNI library not found. Env.getenv will not work");
+	    System.err.println("(run the tos-install-jni tool, see man tos-install-jni for more details)\n");
+	}
+    }
+
+    private Env() {
+    }
+
+    /**
+     * Gets an environment variable. An environment variable is a
+     * system-dependent external variable that has a string value.
+     *
+     * @param	name	name of the environment variable
+     * @return	the value of the variable, or null if the
+     * variable is not defined.
+     */
+    public static String getenv(String name) {
+	if (loaded) {
+	    return igetenv(name);
+	}
+	else {
+	    return null;
+	}
+    }
+
+    private static native String igetenv(String name);
+}
diff --git a/support/sdk/java/net/tinyos/util/Makefile b/support/sdk/java/net/tinyos/util/Makefile
new file mode 100644
index 00000000..5be38247
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Makefile
@@ -0,0 +1,7 @@
+# Top-level Makefile for tools/java 
+
+SUBDIRS = 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
diff --git a/support/sdk/java/net/tinyos/util/Messenger.java b/support/sdk/java/net/tinyos/util/Messenger.java
new file mode 100644
index 00000000..c2557d73
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Messenger.java
@@ -0,0 +1,35 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+public interface Messenger {
+  public void message(String s);
+}
diff --git a/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java b/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java
new file mode 100644
index 00000000..9813d803
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java
@@ -0,0 +1,48 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+import java.io.*;
+
+public class PrintStreamMessenger implements Messenger {
+  private PrintStream ps;
+
+  public PrintStreamMessenger(PrintStream ps) {
+    this.ps = ps;
+  }
+
+  public void message(String s) {
+    ps.println(s);
+  }
+
+  public static PrintStreamMessenger err = new PrintStreamMessenger(System.err);
+  public static PrintStreamMessenger out = new PrintStreamMessenger(System.out);
+}
diff --git a/support/sdk/java/tinyos.jar b/support/sdk/java/tinyos.jar
new file mode 100644
index 0000000000000000000000000000000000000000..3910e3fed9a39992bd1c9033ca7b8812acf825cc
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z)=UFZG5jUf5ODnbFH*7HFO{W==0GYe7}yh_X2|YZ0eH6pT=0Rg{%nZ*ftbE-byL8{
z$pHcX>?N%%e*wk*ckcyv=ql9)IDhxvQDD4-2={OGGv6;)(bI?q8lboN0G0MR
zm9Ya97#ResFAkKp8+eib(G&+Ve*u5qo&66HZ_h8^v@m!Cfi7nZ3fl&3n+>i_Pjtrae-yx(VcL>
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zkUN2D8v&{fnB9MSmb~r({kK{4Rwjt=9^*&A;OGGc$D`jsU|{*^h%f%2{R+=_UsB!QYwb279B7u%JEniceayS~aDV0u{hfO&D`t{p@_8Q6504pvklDsAdWGQRVJWr3H!wO{{c>%}Tlts|=E636uw#
z@8yoC{pLR2|F77fnN#j~27n^=w^QUQPhLF3}y0Xs_W1O6N`|1MDX&9Aou1~d}w9W}4?
zzf=EL!+^$Uy(2D^-ADX0Vk>B=L8F1*(K^cSqx~F#e@|q$lMZMY$~)HU%KKP%lg{6~
z+qwe{Ky=63ZN8WHv(x+;jtI2CprK^$pf14XF&Pd(a7Il@*kgy|K?o>iU)O)y2BTZ{*4E5nF57@dVJi$Xea)L{YTdOn;+D;_6~+P
z|2OQe!S1JlT3_DLxEBAW{dZeT&?1A{?cH(Jm+$5N6!cf~{B6Yt$_KR#yW=ab{xAN$
zmSUiAP}`R~_{hfJ@V_l#KzX2-xpzGIy}x;PP4@2^a(~l-UZ&nrDfa)M-gmVMDkA8$
z<{fP79@u{_Ie*98ce{0mp+5RsrvHA|^*i@=#s|Gyx#L2d{LQ_)X#wScYP0V+Q(yn)
b{71K~APof^4#2
+#
+__all__ = ["message", "tossim"]
diff --git a/support/sdk/python/tinyos/message/Message.py b/support/sdk/python/tinyos/message/Message.py
new file mode 100644
index 00000000..1d592fd2
--- /dev/null
+++ b/support/sdk/python/tinyos/message/Message.py
@@ -0,0 +1,202 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Authors: Geoffrey Mainland 
+#          Philip Levis 
+
+import struct
+
+class MessageException(Exception):
+    def __init__(self, *args):
+        self.args = args
+
+class Message:
+    def __init__(self, data, addr=None, gid=None, base_offset=0, data_length=None):
+        self.addr = addr
+        self.gid = gid
+        self.data = data
+        self.base_offset = base_offset
+        if data_length != None:
+            self.data_length = data_length
+
+            if data == None or len(data) != data_length:
+                self.data = chr(0) * data_length
+        else:
+            self.data_length = len(data)
+
+            self.am_type = 0
+
+    def dataGet(self):
+        return self.data
+
+    def baseOffset(self):
+        return self.base_offset
+
+    def dataLength(self):
+        return self.data_length
+
+    def getAddr(self):
+        return self.addr
+
+    def getGid(self):
+        return self.gid
+
+    def amType(self):
+        return self.am_type
+
+    def amTypeSet(self, type):
+        self.am_type = type
+
+    def checkBounds(self, offset, length):
+        if offset < 0 or length <= 0 or offset + length > (self.data_length * 8):
+            raise MessageException("Message.checkBounds: bad offset (%d) or length (%d), for data_length %d" \
+                                   % (offset, length, self.data_length))
+
+        if offset & 7 != 0:
+            raise MessageException("Cannot deal with bit fields")
+
+        if length & 7 != 0:
+            raise MessageException("Cannot deal with bit fields")
+
+    def getUIntElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+        
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+            
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        if length == 8:
+            return struct.unpack("B", temp)[0]
+        elif length == 16:
+            return struct.unpack(endian + "H", temp)[0]
+        elif length == 32:
+            return struct.unpack(endian + "L", temp)[0]
+        else:
+            raise MessageException("Bad length")
+
+    def setUIntElement(self, offset, length, val, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+            
+        if length == 8:
+            temp = struct.pack(endian + "B", val)
+        elif length == 16:
+            temp = struct.pack(endian + "H", val)
+        elif length == 32:
+            temp = struct.pack(endian + "L", val)
+        else:
+            raise MessageException("Bad length")
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
+
+    def getSIntElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        if length == 8:
+            return struct.unpack(endian + "b", temp)[0]
+        elif length == 16:
+            return struct.unpack(endian + "h", temp)[0]
+        elif length == 32:
+            return struct.unpack(endian + "l", temp)[0]
+        else:
+            raise MessageException("Bad length")
+
+    def setSIntElement(self, offset, length, val, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        if length == 8:
+            temp = struct.pack(endian + "b", val)
+        elif length == 16:
+            temp = struct.pack(endian + "h", val)
+        elif length == 32:
+            temp = struct.pack(endian + "l", val)
+        else:
+            raise MessageException("Bad length")
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
+
+    def getFloatElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        return struct.unpack(endian + "f", temp)[0]
+
+    def setFloatElement(self, offset, length, value, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = struct.pack(endian + "f", value)
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
diff --git a/support/sdk/python/tinyos/message/__init__.py b/support/sdk/python/tinyos/message/__init__.py
new file mode 100644
index 00000000..a2d8cf6d
--- /dev/null
+++ b/support/sdk/python/tinyos/message/__init__.py
@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland 
+#
+__all__ = ["Message"]
diff --git a/support/sdk/python/tinyos/tossim/TossimApp.py b/support/sdk/python/tinyos/tossim/TossimApp.py
new file mode 100644
index 00000000..1b191a1d
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/TossimApp.py
@@ -0,0 +1,517 @@
+# "Copyright (c) 2000-2003 The Regents of the University of California.  
+# All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and its
+# documentation for any purpose, without fee, and without written agreement
+# is hereby granted, provided that the above copyright notice, the following
+# two paragraphs and the author appear in all copies of this software.
+# 
+# IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+# OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+# OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# 
+# THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+# AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+# ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+# PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+#
+#                                                                      
+# "Copyright (c) 2005 Stanford University. All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and
+# its documentation for any purpose, without fee, and without written
+# agreement is hereby granted, provided that the above copyright
+# notice, the following two paragraphs and the author appear in all
+# copies of this software.
+#
+# IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+# ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+# IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+# DAMAGE.
+#
+# STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+# PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+# HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+# ENHANCEMENTS, OR MODIFICATIONS."
+#
+# @author Kamin Whitehouse 
+# @author Philip Levis
+
+from tinyos.tossim.TossimNescDecls import *
+
+class NescVariables(object) :
+  def __init__( self, applicationName="Unknown App", xmlFilename=None ) :
+    self.applicationName = applicationName
+    self._varNames = []
+    self._vars = []
+
+    dom = minidom.parse(xmlFilename)
+    variableList = [node for node in dom.getElementsByTagName("variables")]
+    while len(variableList) > 0:
+      variables = variableList.pop(0).getElementsByTagName("variable")
+      while len(variables) > 0:
+        cVariable = 0
+        isArray = 0
+
+        variable = variables.pop(0)
+        name = variable.getAttribute("name")
+        component = variable.getElementsByTagName("component-ref")
+
+        if (len(component) > 0):
+          name = component[0].getAttribute("qname") + "." + name
+        else:  # It's in a C file
+          cVariable = 1
+          fileName = variable.getAttribute("loc")
+          index = fileName.rfind("/") # First check for a UNIX path
+          if (index == -1):
+            index = fileName.rfind("\\") # Then a windows path
+            if (index == -1):
+              index = fileName.rfind(":") # Then if it's in the local dir
+
+          if (index != -1):
+            fileName = fileName[index+1:]
+            index = fileName.rfind(".")
+            if (index != -1):
+              fileName = fileName[0:index]
+              name = fileName + "." + name
+
+        varType = "unknown"
+        varTypes = variable.getElementsByTagName("type-float")
+        if (len(varTypes) == 0):
+          varTypes = variable.getElementsByTagName("type-int")
+
+        if (len(variable.getElementsByTagName("type-array")) > 0):
+          isArray = 1
+          
+        if (len(varTypes) > 0):
+          varTypeEntry = varTypes[0]
+          varType = varTypeEntry.getAttribute("cname")
+
+        if (cVariable == 0):
+          self._varNames.append(str(name))
+          self._vars.append(str(name))
+          if (isArray):
+            self._vars.append("array")
+          else:
+            self._vars.append("simple")
+          self._vars.append(str(varType))
+             
+  def __str__(self) :
+    """ Print all available variables."""
+    string = "\n"
+    name = 1
+    for val in self._varNames :
+      if (name):
+        string += "\t" + val
+        name = 0
+      else:
+        string += ": " + val + "\n"
+        name = 1
+        
+    return string
+     
+  def variables(self):
+    return self._vars
+  
+
+class NescTypes( object ) :
+  """A class that holds all types defined in a specific nesc application.
+
+  usage:
+  myTypes = NescTypes('/path/to/nescDecls.xml')
+  print myTypes
+  var = myTypes.typeName
+  """
+  def __init__( self, applicationName="Unknown App", xmlFilename = None) :
+    self.applicationName = applicationName
+    self._typeNames = []
+    self._types = {}
+    #figure out the sizes of all the basic types for this platform (by scanning the xml file)
+    platformTypes = {}
+    typeRE = re.compile('cname=\"([\w\s]+?)\" size=\"I:(\d+?)\"')
+    infile = open(xmlFilename, 'r')
+    for line in infile :
+      match = typeRE.search(line)
+      if match != None:
+        platformTypes[match.groups()[0]] = int(match.groups()[1])      
+    #define all the basic types
+    self.addType(
+      nescType("uint8_t", "unsigned char", "int", "type-int", "B",1,0))
+    self.addType(
+      nescType("int8_t", "signed char", "int", "type-int", "b", 1, 0))
+    if (platformTypes.has_key("int") and platformTypes["int"] == 4) or \
+       (platformTypes.has_key("unsigned int") and platformTypes["unsigned int"] == 4) :
+      self.addType(
+        nescType("uint16_t", "unsigned short", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("int16_t", "short", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint32_t", "unsigned int", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("int32_t", "int", "int", "type-int", "L", 4, 0))
+      self.addType(
+        nescType("unsigned long", "unsigned long", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("long", "long", "int", "type-int", "l", 4, 0))
+    else : #int is 2 bytes long (the default)
+      self.addType(
+        nescType("unsigned short", "unsigned short", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("short", "short", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint16_t", "unsigned int", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("int16_t", "int", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint32_t", "unsigned long", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("int32_t", "long", "int", "type-int", "l", 4, 0))
+    self.addType(
+      nescType("int64_t", "long long", "long", "type-int", "q", 8, 0))
+    self.addType(
+      nescType("uint64_t", "unsigned long long", "long", "type-int", "Q", 8, 0))
+    self.addType(
+      nescType("float", "float", "float", "type-float", "f", 4, 0))
+    if platformTypes.has_key("double") and platformTypes["double"] == 8 :
+      self.addType(
+        nescType("double", "double", "float", "type-float", "d", 8, 0))
+    else : #double is 4 bytes (the default)
+      self.addType(
+        nescType("double", "double", "float", "type-float", "f", 4, 0))
+    self.addType(
+      nescType("char", "char", "str", "type-int", "c", 1, '\x00'))
+    self.addType(
+      nescType("void", "void", "", "type-void", "", 0, ''))
+
+    #some arrays for error reporting:
+    self.unknownStructs = []
+    self.anonymousStructs = []
+    self.anonymousRefStructs = []
+    self.undefinedTypes = []
+    self.createTypesFromXml(xmlFilename)
+    self._typeNames.sort()
+    #self.printSkippedTypes()
+  
+  def addType(self, value) :
+    if not value.nescType in self._typeNames :
+      self._typeNames.append(value.nescType)
+    self._types[value.nescType] = value #XXX: why does this have to be unconditional??
+    if not self._types.has_key(value.cType):
+      self._types[value.cType] = value
+      self._typeNames.append(value.cType)
+    
+  def __getattr__(self, name) :
+    if name in self._typeNames :
+      return deepcopy(self._types[name])
+    else:
+      raise AttributeError("No type \"%s\" defined" % name)
+  
+  def __getitem__(self, key) :
+    if key in self._typeNames :
+      return deepcopy(self._types[key])
+    else:
+      raise AttributeError("No type \"%s\" defined" % key)
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """ Print all available types."""
+    string = "\n"
+    for t in self._typeNames :
+      string += "\t%s\n" % t
+    return string
+    
+  def createTypesFromXml(self, xmlFilename) :
+    """Go through the struct and typedef elements in the nescDecls.xml file"""
+    
+    dom = minidom.parse(xmlFilename)
+    typeDefs = [node for node in dom.getElementsByTagName("struct")]
+    for node in dom.getElementsByTagName("typedef") :
+      typeDefs.append(node)
+    
+    numSkipped = 0
+
+    #keep going through the queue until it is empty
+    while len(typeDefs) > 0:
+      typeDef = typeDefs.pop(0)
+
+      #if this is a typedef, see if the value is there
+      if typeDef.tagName == "typedef" :
+        value = typeDef.getAttribute("value")
+        name = typeDef.getAttribute("name")
+        #if the real value exists and typedef doesn't already exist, copy and rename original
+        if self._types.has_key(value) :
+          newType = deepcopy(self._types[value])
+          newType.nescType = name
+          self.addType(newType)
+          numSkipped=0
+        else :
+          #try again later
+          typeDefs.append(typeDef)
+          numSkipped += 1
+          
+      else :
+        #if all types within the struct are already defined, it can be defined
+        try :
+          self.addType(nescStruct(self, typeDef ) )
+          numSkipped=0
+
+        except Exception, e:
+          if len(e.args) > 0 and e.args[0] == "Undefined struct":
+            #otherwise, put it back in the queue and move on to the next one
+            typeDefs.append(typeDef)
+            numSkipped += 1
+          elif len(e.args) > 0 and e.args[0] == "Anonymous struct" :
+            self.anonymousStructs.append(typeDef)
+          elif len(e.args) > 0 and e.args[0] == "Anonymous struct reference" :
+            self.anonymousRefStructs.append( (typeDef, e.args[1]) )
+          elif len(e.args) > 0 and e.args[0] == "Unknown type" :
+            self.unknownStructs.append( (typeDef, e.args[1]) )
+          else :
+            #if it's an unknown exception, reraise it
+            raise
+      
+      #make sure we are not cycling endlessly
+      if numSkipped >= len(typeDefs) > 0:
+        self.undefinedTypes = typeDefs
+        break
+
+  def printSkippedTypes(self):
+    err = ""
+    if len(self.anonymousStructs) >0 :
+      err += "\nWarning: %d structs were anonymous." % len(self.anonymousStructs)
+#        for struc in anonymousStructs :
+#            err += "\t%s\n" % struc.getAttribute("ref")
+    if len(self.anonymousRefStructs) >0 :
+      err += "\nWarning: The following structs referenced anonymous structs:\n"
+      for pair in self.anonymousRefStructs :
+        err += "\t%s\n" % pair[0].getAttribute("name")
+    if len(self.undefinedTypes) >0 :
+      err += "\nWarning: The following types are ill-defined or had circular dependencies:\n"
+      for struc in self.undefinedTypes :
+        err += "\t%s\n" % struc.getAttribute("name")
+    if len(self.unknownStructs) >0 :
+      err += "\nWarning: The following structs had unknown xml types:\n"
+      for pair in self.unknownStructs :
+        err += "\t%s (%s)\n" % (pair[0].getAttribute("name"),
+                                pair[1].tagName )
+    if len(err) > 0 : print err
+    
+  def getTypeFromXML(self, xmlDefinition) :
+    """Find the type name value given an xml definition.
+    If it is an array or pointer, define the new type here."""
+
+    #first, see if the tag is type or if child is type
+    if xmlDefinition.tagName.find("type-") < 0 or \
+           xmlDefinition.tagName.find("type-qualified") >= 0 :
+      foundType = 0
+      childNodes = [node for node in xmlDefinition.childNodes
+                    if node.nodeType == 1]
+      for tag in childNodes :
+        if tag.tagName.find("type-") >= 0 :
+          foundType += 1
+          typeTag = tag
+      if foundType < 1 :
+        raise Exception("No type tag found")
+      if foundType > 1 :
+        raise Exception("Too many type tags found")
+      else :
+        return self.getTypeFromXML(typeTag)
+
+    #now check all the existing types to see if it is one of them
+    for val in self._typeNames :
+      typeObj = self._types[val]
+      if typeObj.isType(xmlDefinition) :
+        return deepcopy(typeObj)
+
+    #if the type doesn't already exist, try creating a new one
+    try :
+      return nescArray(self, xmlDefinition)
+    except Exception, e:
+        if len(e.args) <= 0 or e.args[0] != "Not array definition":
+          raise
+    try :
+      return nescPointer(self, xmlDefinition)
+    except Exception, e:
+        if len(e.args) <= 0 or e.args[0] != "Not pointer definition":
+          raise
+      
+    #it is not a simple type, array, or pointer,
+    #so it must be a yet undefined struct
+    child = getUniqueChild(xmlDefinition)
+    if ( xmlDefinition.tagName == "type-tag" and child != None and
+         child.tagName == "struct-ref" ):
+         if child.hasAttribute("name"):
+             raise Exception("Undefined struct")
+         else :
+             raise Exception("Anonymous struct reference", child)
+    else:
+      #otherwise, raise an exception
+      #(but first make sure the right kind of unknown type is displayed)
+      if  xmlDefinition.tagName == "type-tag":
+          xmlDefinition = child
+      raise Exception("Unknown type", xmlDefinition)
+
+class NescEnums( object ) :
+  """A class that holds all enums defined in a specific nesc application.
+
+  usage:
+  myEnums = NescEnums('/path/to/nescDecls.xml')
+  print myEnums
+  var = myEnums.enumName
+  """
+
+  def __init__( self, applicationName="Unknown App", xmlFilename = None ) :
+    self.applicationName = applicationName
+    self._enums = []
+    if type(xmlFilename) == str:
+      xmlFilename = minidom.parse(xmlFilename)
+
+    self.createEnumsFromXml(xmlFilename)
+
+  def __getitem__(self, key) :
+    if key in self._enums :
+      return self.__dict__[key]
+    else:
+      raise AttributeError("No such enum defined")
+      
+  def createEnumsFromXml(self, dom) :
+
+    #now define all the struct types
+    enumDefs = [node for node in dom.getElementsByTagName("enum")]
+    integer = re.compile('^I:(\d+)$')
+    hexidecimal = re.compile('^(0x[\dabcdefABCDEF]+)$')
+    
+    for enumDef in enumDefs :
+      name = enumDef.getAttribute("name")
+      if name in self._enums :
+        continue
+      value = enumDef.getAttribute("value")
+      match = integer.match(value)
+      if match != None :
+        self.__dict__[name] = int(match.groups()[0])
+      else :
+        match = hexidecimal.match(value)
+        if match != None :
+          self.__dict__[name] = int(match.groups()[0], 16)
+        else :
+          self.__dict__[name] = value
+      self._enums.append(name)
+      
+    namedEnums = [node for node in dom.getElementsByTagName("namedEnum")]
+    for namedEnum in namedEnums :
+      name = namedEnum.getAttribute("name")
+      self.__dict__[name] = NescEnums(namedEnum,name)
+      self._enums.append(name)
+    
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all available enums."""
+    string = "\n"
+    for key in self._enums :
+      string += "\t%s = %s\n" % (key, str(self[key]))
+    return string
+    
+
+class NescMsgs( object ) :
+  """A class that holds all msgs defined in a specific nesc application.
+  It assumes a struct is a message if AM_STRUCTNAME is defined.
+
+  usage:
+  myMsgs = NescMsgs(myTypes, myEnums[, applicationName])
+  print myMsgs
+  var = myMsgs.msgName
+  """
+  def __init__( self, types, enums, applicationName="Unknown App" ) :
+    self.applicationName = applicationName
+    msgTypes = [enum for enum in enums._enums if enum.find("AM_") ==0]
+    name = re.compile("^AM_(\w+)$")
+    self._msgNames = []
+    self._msgs = {}
+    for msgType in msgTypes :
+      if type(enums[msgType]) == int:
+        msgName = name.match(msgType)
+        if msgName != None :
+          msgName = msgName.groups()[0]
+        for key in types._typeNames :
+          if key.lower() == msgName.lower() :
+            msg = TosMsg(enums[msgType], types[key])
+            self._msgs[key] = msg
+            self._msgNames.append(key)
+            break
+
+  def __getattr__(self, name) :
+    if name in self._msgNames :
+      return deepcopy(self._msgs[name])
+    else:
+      raise AttributeError("No such message defined")
+  
+  def __getitem__(self, key) :
+    if key in self._msgNames :
+      return deepcopy(self._msgs[key])
+    else:
+      raise AttributeError("No such message defined")
+      
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all available msgs."""
+    string = "\n"
+    for key in self._msgNames :
+      string += "\t%5d : %s\n" % (self._msgs[key].amType, key)
+    return string
+    
+
+class NescApp( object ) :
+  """A class that holds all types, enums, msgs, rpc commands and ram
+  symbol definitions as defined for a specific nesc application.
+
+  usage:
+  myApp = nescApp('/path/to/nescDecls.xml')
+  print myApp
+  var = myApp.enums.enumName
+  var = myApp.types.typeName
+  """
+  def __init__( self, applicationName="Unknown App", xmlFile="app.xml" ) :
+    """This function creates the NescEnums, NescTypes, and NescMsgs
+    objects for a particular application."""
+    
+    #first, import all enums, types, msgs, rpc functions, and ram symbols
+    self.applicationName = applicationName
+    self.xmlFile = xmlFile
+    
+    # Check for the nescDecls.xml file
+    if not os.path.isfile(xmlFile):
+      raise Exception("""\nERROR: cannot find file \"%s\".
+
+Your nesC app cannot be imported.  Be sure that you compiled with the \"nescDecls\" option.\n\n""" % xmlFile)
+
+    # Import enums, types, and msgs
+    self.enums = NescEnums(applicationName, xmlFile)
+    self.types = NescTypes(applicationName, xmlFile)
+    self.variables = NescVariables(applicationName, xmlFile)
+    self.messages = NescMsgs(self.types, self.enums, applicationName)
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all application declarations."""
+    string = "%20s : %d\n" % ("Enums", len(self.enums._enums))
+    string += "%20s : %d\n" % ("Types", len(self.types._types))
+    string += "%20s : %d\n" % ("Messages", len(self.messages._msgNames))
+    string += "%20s : %d\n" % ("Variables", len(self.variables._varNames))
+    return string
+
+  def configureTossim(self):
+    for var in variables:
+      Mote.var
diff --git a/support/sdk/python/tinyos/tossim/TossimNescDecls.py b/support/sdk/python/tinyos/tossim/TossimNescDecls.py
new file mode 100644
index 00000000..67a15c59
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/TossimNescDecls.py
@@ -0,0 +1,771 @@
+# "Copyright (c) 2000-2003 The Regents of the University of California.  
+# All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and its
+# documentation for any purpose, without fee, and without written agreement
+# is hereby granted, provided that the above copyright notice, the following
+# two paragraphs and the author appear in all copies of this software.
+# 
+# IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+# OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+# OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# 
+# THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+# AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+# ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+# PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+#
+# @author Kamin Whitehouse 
+#
+
+import sys, string, math, re, os
+from struct import *
+from xml.dom import minidom
+from copy import deepcopy
+
+###########
+# This class can be used to hold a basic nesc type, eg uint8_t It can
+# be set and get through nescType.value, and does type checking
+# 
+###########
+
+def findBuildFile(givenString, desiredFilename) :
+  """This function will find a desiredFilename (eg. nescDecls.xml) the build directory
+  from a givenString (e.g 'build/pc').  Legal givenStrings are:
+  1.  Full path,     eg: /home/kamin/tinyos-1.x/...
+  2.  relative path, eg: apps/TestRpc/build/pc
+  3.  platform name, eg: pc or telosb
+  """
+
+  #check to see if the given string contains the desiredFilename
+  if givenString.find(desiredFilename) >= 0 :
+    filename = givenString
+
+  #then check to see if it is an absolute or relative path
+  elif givenString.find('/') >= 0 :
+    filename = givenString + desiredFilename
+
+  #then check to see if it is just the platform name
+  elif len(givenString) > 0:
+    filename = 'build/' + givenString + '/' + desiredFilename
+
+  #check if a default platform environment variable is defined
+  elif os.environ.has_key("TINYOS_DEFAULT_PLATFORM") :
+    filename = 'build/' + os.environ["TINYOS_DEFAULT_PLATFORM"] + '/' + desiredFilename
+
+  #otherwise, assume the file is in './'
+  else :
+    filename = desiredFilename
+    
+  #check to see if the file was successfully found
+  if not os.path.isfile(filename) :
+    raise IOError("File %s not found" % filename)
+  return filename
+
+  
+class nescType( object ) :
+  """A python representation of a nesc type.
+
+  usage:
+  X = nescType.value
+  nescType.value = X
+  bytes = nescType.getBytes()
+  nescType.setBytes(bytes)
+  nescType
+  print nescType
+  """
+
+  def __init__( self , nescType, cType, pythonType, xmlTag,
+                conversionString, size, defaultValue) :
+    """create a new nescType"""
+    self.nescType = nescType
+    self.cType = cType
+    self.pythonType = pythonType
+    self._xmlTag = xmlTag
+    self.size = size
+    self._conversionString = conversionString
+    self.value = defaultValue
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n%20s : %s" % (self.__class__, hex(id(self)), "value", str(self))
+
+  def __str__(self) :
+    if self._conversionString == "c" :
+        return "'" + str(self.value) + "'"
+    else :
+        return str(self.value)
+
+  #   this func could be used for type checking 
+  def __setattr__(self, name, value) :
+    if self.__dict__.has_key("value") and name == "value":
+        #use the type conversions built into pack
+        pack(self._conversionString, value)
+    self.__dict__[name] = value
+
+  def oneLineStr(self) :
+    return str(self)
+
+  def __deepcopy__(self, memo={}) :
+    result = nescType(self.nescType, self.cType, self.pythonType,
+                    self._xmlTag, self._conversionString, self.size,
+                    deepcopy(self.value, memo))
+    memo[id(self)] = result
+    return result
+  
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition != None and xmlDefinition.tagName == self._xmlTag and \
+           xmlDefinition.hasAttribute("cname") and \
+           xmlDefinition.getAttribute("cname") == self.cType :
+      return 1
+    elif self.nescType == "void" and xmlDefinition.tagName == self._xmlTag :
+      #void is a special xml case that doesn't have cname defined (grr)
+      return 1
+    else :
+      return 0
+  
+  def getBytes(self) :
+    """Hexidecimal representation of a value of this type"""
+    if self.nescType == "void" :
+      return ''
+    try:
+      bytes = pack(self._conversionString, self.value)
+    except Exception, inst:
+      print inst
+      raise Exception("Bytes conversion error: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size) )
+    if len(bytes) != self.size:
+      raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size))
+    return bytes
+  
+  def setBytes(self, bytes):
+    """A value of this type from a hexidecimal representation"""
+    if self.nescType == "void" :
+      return bytes
+    if len(bytes) < self.size:
+      raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size))
+    try:
+      self.value, = unpack( self._conversionString, bytes[:self.size])
+    except Exception, inst:
+      print inst
+      raise Exception("Bytes conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size) )
+    return bytes[self.size:]
+
+###########
+# Array of basic nesc types,
+###########
+
+class nescArray( object ) :
+  """A python representation of a nesc array.
+
+  usage:
+  array = nescArray(size, nescType)
+  array = nescArray(myTypes, xmlDecl)
+  X = array[3]
+  X = array[3:6] (returns a list or, if char[] array, a python string)
+  array[3] = X
+  array[3:6] [X,Y,Z] (or, if char[], \"foo\")
+  bytes = array.getBytes()
+  array.setBytes(bytes)
+  array
+  print array
+  """
+
+  def __init__( self , *varargs) :
+    """initialize all elements to 0"""
+    if len(varargs) == 0 :
+      return
+    elif len(varargs) == 2 and type(varargs[0]) == int :
+      (self.len,self.elementType) = varargs[:]
+      bracketStr = "[" + str(self.len) + "]"
+    elif len(varargs) == 2 :
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "type-array" :
+        raise Exception("Not array definition")
+      child = getUniqueChild(xmlDefinition)
+      self.elementType = nescTypes.getTypeFromXML(child)
+      sizeStr = xmlDefinition.getAttribute("elements")[2:]
+      self.len = int(sizeStr)
+      bracketStr = "[" + sizeStr + "]"
+    else :
+      raise Exception("Illegal array params")
+    self.nescType = self.elementType.nescType + bracketStr
+    self.cType = self.elementType.cType + bracketStr
+    self.pythonType = self.elementType.pythonType + bracketStr
+    self.size = self.len * self.elementType.size
+    self.value = []
+    for i in range(self.len):
+      self.value.append(deepcopy(self.elementType))
+      
+
+  def __repr__(self) :
+    """A printable representation of the value"""
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """A printable representation of the value"""
+    string = "nescArray of type %s:\n" % self.nescType
+#     if self.elementType._conversionString == "c":
+#       string += self.oneLineStr()
+#     else:
+    for i in range(self.len) :
+      string += "%2d: %s\n" % (i, self.value[i].oneLineStr())
+    return string
+
+  def __getitem__(self, key) :
+      if self.elementType.__class__ == nescType :
+          if key.__class__ == slice:
+              if self.elementType._conversionString == "c":
+                  string = ""
+                  for item in self.value.__getitem__(key) :
+                      string += item.value
+                  return string
+              else:
+                  return [item.value for item in self.value.__getitem__(key)]
+          else:
+              return self.value.__getitem__(key).value
+      else:
+          return self.value.__getitem__(key)
+      
+  def __setitem__(self, key, value) : 
+      if self.elementType.__class__ == nescType :
+        if key.__class__ == slice:
+            i=0;
+            for item in self.value.__getitem__(key) :
+                item.value = value[i]
+                i += 1
+        else:
+            self.value.__getitem__(key).value = value
+      else :
+          self.value.__setitem__(key, value)
+
+  def __delitem__(self, key) : 
+      return self.value.__delitem__(key)
+
+  def oneLineStr(self) :
+    """A one-line representation of the value"""
+    #maybe the string should just print like a string
+    #but the \x00 chars look like nothing
+#     if self.elementType._conversionString == "c":
+#       string = '\''
+#       for c in self.value :
+#         string += c.value
+#       string += '\''
+#     else:
+    tmpStr = str(self.elementType)
+    if tmpStr.find("\n") >= 0 or len(tmpStr) > 5 :
+      return self.nescType
+    else :
+      i = 0; string = "["
+      while len(string) < 40 and i < self.len :
+        string += str(self.value[i]) + ", "
+        i += 1
+      if i < self.len :
+        string += "...]"
+      else:
+        string += "\b\b]"
+    return string
+ 
+  def __deepcopy__(self, memo={}) :
+    result = nescArray()
+    memo[id(self)] = result
+    result.elementType = deepcopy(self.elementType, memo)
+    result.nescType = self.nescType
+    result.cType = self.cType
+    result.pythonType = self.pythonType
+    result.len = self.len
+    result.size = self.size
+    result.value = deepcopy(self.value, memo)
+    return result
+
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if ( xmlDefinition != None and xmlDefinition.tagName == "type-array" and
+         int(xmlDefinition.getAttribute("elements")[2:]) == self.len ) :
+      child = getUniqueChild(xmlDefinition)
+      return self.elementType.isType(child)
+    else :
+      return 0
+
+  def getBytes(self) :
+    """Hexidecimal representation of a value of this type"""
+    bytes = ""
+    for i in range(self.len):
+      bytes += self.value[i].getBytes()
+    if len(bytes) != self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size))
+    return bytes
+    
+  
+  def setBytes(self, bytes) :
+    """A value of this type from a hexidecimal representation"""
+    if len(bytes) < self.size:
+        raise Exception("Byte conversion error: %s %d bytes to %d" %
+                        (self.nescType, len(bytes), self.size) )
+    for i in range(self.len) :
+      bytes = self.value[i].setBytes(bytes)
+    return bytes
+
+###########
+# Pointer to basic nesc types,
+###########
+
+class nescPointer( object ) :
+  """A python representation of a nesc pointer.
+
+  usage:
+  pointer = nescPointer(ptrSize, nescType)
+  pointer = nescPointer(myTypes, xmlDecl)
+  nescType = pointer.value
+  pointer.value = nescType
+  bytes = pointer.getBytes()
+  pointer.setBytes(bytes)
+  pointer
+  print pointer
+  """
+  
+  def __init__( self , *varargs) :
+    """initialize all elements to 0"""
+    if len(varargs) == 0:
+      return
+    elif len(varargs) == 2 and varargs[1].__dict__.has_key("tagName"):
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "type-pointer" :
+        raise Exception("Not pointer definition")
+      child = getUniqueChild(xmlDefinition)
+      self.value = nescTypes.getTypeFromXML(child)
+      self.size = int(xmlDefinition.getAttribute("size")[2:])
+    elif len(varargs) == 2 :
+      self.size = varargs[0].types["unsigned int"].size
+      self.value = varargs[1]
+    else :
+      raise Exception("Illegal nescPointer constructor arguments")
+    self.nescType = self.value.nescType + "*"
+    self.cType = self.value.cType + "*"
+    self.pythonType = self.value.pythonType + "*"
+      
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+
+  def __str__(self) :
+    """A text representation of the value"""
+    return "ptr-> %s" % str(self.value)
+
+  def oneLineStr(self) :
+    """A one-line representation of the value"""
+    return  "ptr-> %s" % self.value.oneLineStr()
+
+  def __deepcopy__(self, memo={}) :
+    result = nescPointer()
+    memo[id(self)] = result
+    result.value = deepcopy(self.value, memo)
+    result.size = self.size
+    result.nescType = self.nescType
+    result.cType = self.cType
+    result.pythonType = self.pythonType
+    return result
+
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition != None and xmlDefinition.tagName == "type-pointer" :
+      child = getUniqueChild(xmlDefinition)
+      return self.value.isType(child)
+    else :
+      return 0
+
+  def getBytes(self) :
+      bytes = pack (str(self.size)+"s",'\x00')
+      if len(bytes) != self.size:
+          raise Exception("Byte conversion error: %s %d bytes to %d" %
+                          (self.nescType, len(bytes), self.size) )
+      return bytes
+  
+  def setBytes(self, bytes) :
+    if len(bytes) < self.size:
+        raise Exception("Byte conversion error: %s %d bytes to %d" %
+                        ( self.nescType, len(bytes), self.size) )
+    return bytes[self.size:]
+
+
+###########
+# Struct of basic nesc types,
+###########
+
+class nescStruct( object ) :
+  """A python representation of a nesc structure.
+
+  usage:
+  struct = nescStruct(myTypes, xmlDecl)
+  struct = nescStruct(structName, (fieldName, type) (fieldName, type), ...)
+  X = struct.field
+  struct.field = X
+  bytes = struct.getBytes()
+  struct.setBytes(bytes)
+  struct
+  print struct
+  """
+
+  def __init__( self, *varargs) :
+    """initialize all fields to 0"""
+    self.__dict__["value"] = {}
+    self.fields = []
+    self.size = 0
+    if len(varargs) == 0 :
+      self.nescType = ""
+    #create the struct from nescType args
+    elif len(varargs) >= 1 and ( type(varargs[0]) == str or
+                                 type(varargs[0]) == unicode ) :
+      self.nescType = varargs[0]
+      self._parseNescTypeFields(varargs[1:])
+    ## parse the struct def from xml
+    elif len(varargs) == 2 and type(varargs[1]) != tuple :
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "struct" :
+        raise Exception("Not struct definition")
+      if xmlDefinition.hasAttribute("name") == False:
+        raise Exception("Anonymous struct")
+      self.nescType = xmlDefinition.getAttribute("name")
+      if xmlDefinition.getAttribute("size")[2:]:
+        self.size = int(xmlDefinition.getAttribute("size")[2:])
+      else:
+        self.size = 0
+      self._parseXMLFields(nescTypes, xmlDefinition)
+    else :
+      raise Exception("Illegal nescStruct constructor args")
+    self.cType = self.nescType
+    self.pythonType = self.nescType
+    self.__initialized = True
+    
+  def __getattr__(self, name) :
+    if self.__dict__.has_key("value") :
+      if self.value.has_key(name) :
+        if self.value[name].__class__ == nescType :
+          return self.value[name].value
+        else :
+          return self.value[name]
+    else :
+      raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType))
+
+  def __setattr__(self, name, value) :
+    if not self.__dict__.has_key("_nescStruct__initialized") :
+      self.__dict__[name] = value
+      return
+    if self.value.has_key(name) :
+      if self.value[name].__class__ == nescType :
+          self.value[name].value = value;
+      else :
+          self.value[name] = value;
+    elif self.__dict__.has_key(name) :
+      self.__dict__[name] = value
+    else :
+      raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType))
+        
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """All fields and values as a readable string"""
+    string = self.nescType + ": \n"
+    for field in self.fields :
+      string += "%30s  : %s\n" % (
+        "%s %s" % (self.value[field["name"]].nescType, field["name"]),
+        self.value[field["name"]].oneLineStr() )
+    return string
+
+  def oneLineStr(self) :
+    """A one-line representation of the struct"""
+    return self.nescType
+
+  def __deepcopy__(self, memo={}) :
+    result = self.__class__()
+    memo[id(self)] = result
+    self._copyFields(result, memo)
+    return result
+
+  def _copyFields(self, other, memo=None) :
+    other.size = self.size
+    other.nescType = self.nescType
+    other.cType = self.cType
+    other.pythonType = self.pythonType
+    if memo == None :
+      other.value = deepcopy(self.value)
+      other.fields = deepcopy(self.fields)
+    else :
+      other.value = deepcopy(self.value, memo)
+      other.fields = deepcopy(self.fields, memo)
+    other.__initialized = True
+
+  def _parseXMLFields(self, nescTypes, xmlDefinition) :
+    """Create a list of fields & values given a struct xml declaration."""
+    fields = [node for node in xmlDefinition.getElementsByTagName("field")]
+    fields.sort( lambda A, B :  int(A.getAttribute("bit-offset")[2:]) - int(B.getAttribute("bit-offset")[2:]))
+    for fieldDef in fields:
+      field = {}
+      field["name"] = fieldDef.getAttribute("name")
+      field["bitOffset"] = int(fieldDef.getAttribute("bit-offset")[2:])
+      if fieldDef.hasAttribute("bit-size"):
+          field["bitSize"] = int(fieldDef.getAttribute("bit-size")[2:])
+      elif fieldDef.hasAttribute("size"):
+          field["bitSize"] = int(fieldDef.getAttribute("size")[2:])*8
+      self.fields.append(field)
+      self.value[fieldDef.getAttribute("name")] = nescTypes.getTypeFromXML(fieldDef)
+    #here's a weird bug in the nesc.xml generation where the "size" attribute
+    #for packed structs is actually the size of the unpacked struct.
+    if xmlDefinition.hasAttribute("packed") :
+      self.size = self.packedSize()
+    elif xmlDefinition.getAttribute("size")[2:]:
+      self.size = int(xmlDefinition.getAttribute("size")[2:])
+    else:
+      self.size = 0
+  def _parseNescTypeFields(self, fields) :
+    """Create a list of fields & values given a tuple of
+    fieldname,value sequences."""
+    self.size = 0
+    for fieldDef in fields:
+      field = {}
+      (field["name"],fType) = fieldDef
+      field["bitOffset"] = self.size*8
+      field["bitSize"] = fType.size*8
+      self.fields.append(field)
+      self.value[field["name"]] = fType
+      self.size += fType.size
+  
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition == None :
+      return 0
+    child = getUniqueChild(xmlDefinition)
+    if ( ( xmlDefinition.tagName == "struct" and
+           xmlDefinition.getAttribute("name") == self.nescType) or
+         ( xmlDefinition.tagName == "type-tag" and child != None and 
+           child.tagName == "struct-ref" and
+           child.getAttribute("name") == self.nescType ) ) :
+      return 1
+    else :
+      return 0
+
+  def getBytes(self) :
+    """Hexidecimal representation of struct"""
+    # We have to be careful in here about:
+    # 1.  bit fields (ie. bitSize shorter than nominal type size)
+    # 2.  packing (ie. bits that are not part of any particular field)
+    bits = ""
+    for field in self.fields :
+      for i in range(len(bits), field["bitOffset"]) :
+        bits += "0"
+      newBits = hex2bin(self.value[field["name"]].getBytes())
+      bits += newBits[-field["bitSize"]:]
+      #the following loop is just type checking for bit fields.  Can we do this on setattr?
+      for i in range(len(newBits)-field["bitSize"]):
+          if newBits[i] == "1":
+              print "Bit-field type error: value of %s.%s being truncated" % (self.nescType,
+                                                        field["name"])
+    for i in range(len(bits), self.size*8) :
+      bits += "0"
+    bytes = bin2hex(bits)
+    if len(bytes) != self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size))
+    return bytes
+
+  def setBytes(self, bytes) :
+    """Set all values using hexidecimal representation"""
+    # We have to be careful in here about:
+    # 1.  bit fields (ie. bitSize shorter than nominal type size)
+    # 2.  packing (ie. bits that are not part of any particular field)
+    if len(bytes) < self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size) )
+    bits = hex2bin(bytes)
+    for field in self.fields :
+      newBits = ""
+      for i in range(self.value[field["name"]].size*8) :
+        newBits += "0"
+      selectedBits=bits[field["bitOffset"]:field["bitOffset"]+field["bitSize"]]
+      newBits = newBits[:-field["bitSize"]] + selectedBits
+      newBytes = ""
+      for i in range(self.value[field["name"]].size) :
+        newBytes += '\x00'
+      tmpBytes = bin2hex(newBits)
+      newBytes = newBytes[:-len(tmpBytes)] + tmpBytes
+      self.value[field["name"]].setBytes(newBytes);
+    return bytes[self.size:]
+
+  def packedSize(self) :
+    if len(self.fields) == 0 :
+      trueSize = 0
+    else :
+      a,b,lastField = self._findLastNestedField()
+      trueSize = (lastField["bitOffset"] + lastField["bitSize"]) /8
+    return trueSize
+
+  def _findLastNestedField(self) :
+    lastField = self
+    parents = []
+    #find the last (possibly nested) field
+    while issubclass(type(lastField), nescStruct) and len(lastField.fields) > 0 :
+      parent = lastField
+      lastFieldDef = parent.fields[-1]
+      lastField = parent.value[lastFieldDef["name"]]
+      parents.append( parent )
+    return (lastField, parents, lastFieldDef)
+
+
+
+
+
+class TosMsg ( nescStruct ) :
+    """A python representation of a TosMsg.
+    Is a nescStruct object.
+    Can be used with
+    pytos.comm.send, pytos.comm.register, pytos.comm.unregister.
+    
+    usage:
+    msg = TosMsg(amType)
+    msg = TosMsg(amType, nescStruct)
+    msg = TosMsg(amType, )
+    print msg
+    msg.field = X
+    comm.send(msg)
+    comm.register(msg, f)
+    comm.unregister(msg, f)
+    migMsg = msg.createMigMsg()
+    msg.parseMigMsg(migMsg)
+    """
+
+    def __init__(self, amType, *varargs):
+        self.amType = amType
+        self.parentMsg = None
+        #if this is a nescStruct argument, make myself a clone of it
+        if len(varargs) == 1 and issubclass(type(varargs[0]), nescStruct) :
+            nescStruct._copyFields(varargs[0],self)
+        #otherwise, make myself into a struct with the struct args
+        elif len(varargs) >= 1:
+            nescStruct.__init__(self, *varargs)
+
+    def __deepcopy__(self, memo={}) :
+      result = self.__class__(self.amType)
+      memo[id(self)] = result
+      self._copyFields(result, memo)
+      result.parentMsg = deepcopy(self.parentMsg, memo)
+      return result
+
+    def getParentMsg(self, amOrName) :
+      """This function will get the parent message with the amType or name specified"""
+      if self.parentMsg == None :
+        return None
+      elif self.parentMsg.nescType == amOrName or self.parentMsg.amType == amOrName :
+        return self.parentMsg
+      else :
+        return self.parentMsg.getParentMsg(amOrName)
+      
+    def createMigMsg(self) :
+        """Returns a java BaseTOSMsg with same amType and length
+        and with data payload of same bytes"""
+        Message = tinyos.message.Message()
+        msg = Message(self.size)
+        msg.dataSet(unpack( str(self.size) + 'b', self.getBytes() ) )
+        msg.amTypeSet(self.amType)
+#        msg.set_type( self.amType )
+#        msg.set_length(self.size)
+        return msg
+
+    def parseMigMsg(self, msg) :
+        """Takes a java BaseTOSMsg and creates TosMsg
+        with same amType and length and with data payload of same bytes"""
+        self.amType = msg.amType()
+        data = list(msg.dataGet())
+        self.setBytes(pack(str(len(data)) + 'b', *data))
+
+    def __repr__(self) :
+      return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+      
+    def __str__(self) :
+        """All fields and values as a readable string"""
+        return "TosMsg(am=%d) " % self.amType + nescStruct.__str__(self)
+        
+    def setBytes(self, bytes) :
+        """Extend this msg to be longer, if necessary to accomodate extra data.
+        This only happens if the last field is a nescArray of length 0.
+        Unlike nescStructs, TosMsg objects are not nested recursively, so it is
+        Ok to do this."""
+        if len(bytes) > self.size : #trueSize() :
+            #print "there are more bytes than fit in this msg... trying to grow msg"
+            lastField, parents,b = self._findLastNestedField()
+            #see if it is an array of size 0
+            if type(lastField) == nescArray and lastField.len == 0 :
+                #make it bigger
+                #print "last field is nescArray[0]... growing"
+                lastFieldSize = lastField.elementType.size
+                numExtraBytes = len(bytes) - self.size #trueSize()
+                if numExtraBytes % lastFieldSize == 0:
+                    requiredArraySize = int( numExtraBytes/lastFieldSize )
+                    lastField = nescArray(requiredArraySize, lastField.elementType)
+                #print "new size is %d" % numExtraBytes
+                #and set it, changing the size of all parent structs
+                parents.reverse()
+                for parent in parents :
+#                    trueSize = parent.trueSize()
+                    parent.value[parent.fields[-1]["name"]] = lastField
+                    parent.fields[-1]["bitSize"] = lastField.size*8
+                    parent.size = self.packedSize()# + lastField.size
+                    lastField = parent
+            else:
+                #print "last field is not nescArray[0]. Cannot grow. Ignoring extra data."
+                pass
+            
+        #make sure everything worked out correctly and call parent's function
+        if len(bytes) != self.size :#trueSize() :
+            raise Exception("Incorrect number of bytes for TosMsg. Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size) )
+        #print "passing to child to set bytes."
+        nescStruct.setBytes(self,bytes)
+
+
+
+
+
+
+
+def getUniqueChild(xmlDefinition) :
+  child = None
+  for childNode in xmlDefinition.childNodes :
+    if childNode.nodeType == 1 :
+      child = childNode
+      break
+  return child
+
+def bin2hex(bits) :
+    bytes = ""
+    for i in range(0, len(bits), 8 ):
+        bytes += pack('B',int(bits[i:i+8],2))
+    return bytes
+
+def hex2bin(bytes) :
+    bits = ""
+    for i in range(len(bytes)) :
+        val, = unpack('B',bytes[i])
+        for j in range(7,-1,-1):
+            if val>= pow(2,j):
+                bits += "1"
+                val -= pow(2,j)
+            else :
+                bits += "0"
+    return bits
+
+
+def TestAppTypes() :
+    testRpc = appTypes('/home/kamin/tinyos-1.x/contrib/hood/apps/TestRpc/build/telosb/nesc.xml')
+    print testRpc
+    
+if __name__ == "__main__": TestAppTypes()
diff --git a/support/sdk/python/tinyos/tossim/__init__.py b/support/sdk/python/tinyos/tossim/__init__.py
new file mode 100644
index 00000000..d2c963bd
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/__init__.py
@@ -0,0 +1,24 @@
+# "Copyright (c) 2005 Stanford University. All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and
+# its documentation for any purpose, without fee, and without written
+# agreement is hereby granted, provided that the above copyright
+# notice, the following two paragraphs and the author appear in all
+# copies of this software.
+#
+# IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+# ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+# IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+# DAMAGE.
+#
+# STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+# PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+# HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+# ENHANCEMENTS, OR MODIFICATIONS."
+#
+# Author Philip Levis
+
+__all__ = ["TossimApp", "TossimNescDecls"]
diff --git a/tools/.cvsignore b/tools/.cvsignore
new file mode 100644
index 00000000..7dfd1f3b
--- /dev/null
+++ b/tools/.cvsignore
@@ -0,0 +1,8 @@
+Makefile
+Makefile.in
+aclocal.m4
+autom4te.cache
+config-aux
+config.log
+config.status
+configure
diff --git a/tools/Bootstrap b/tools/Bootstrap
new file mode 100755
index 00000000..528867bd
--- /dev/null
+++ b/tools/Bootstrap
@@ -0,0 +1,30 @@
+#!/bin/sh
+
+set -e
+
+srcdir=src
+
+ACLOCAL="aclocal"
+AUTOMAKE="automake"
+AUTOCONF="autoconf"
+AUTOHEADER="autoheader"
+
+set -x
+(
+    $ACLOCAL
+    $AUTOCONF
+    [ -d config-aux ] || mkdir config-aux
+    $AUTOMAKE -a -c
+)
+
+set -x
+(
+    # If you include this above, errors regarding $(EXEEXT) in 
+    # tinyos/java/env/Makefile.am cause the block to be exited
+    # before running this command below. I was able to address
+    # the $(EXEEXT) errors for windows, but it still died in
+    # redhat 9 so I'm moving this call to below.
+    (cd platforms/mica/uisp; ./bootstrap)
+)
+
+rm -f config.cache $srcdir/config.cache
diff --git a/tools/Makefile.am b/tools/Makefile.am
new file mode 100644
index 00000000..680cd39d
--- /dev/null
+++ b/tools/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = platforms tinyos
+
diff --git a/tools/README b/tools/README
new file mode 100644
index 00000000..81471a78
--- /dev/null
+++ b/tools/README
@@ -0,0 +1,13 @@
+This directory contains the tinyos tools that are distributed in the
+tinyos-tools package, along with the spec files for all tinyos packages
+(the release directory). 
+
+To install the tinyos tools from CVS, you must first prepare the
+configure scripts here and in platforms/mica/uisp:
+  ./Bootstrap
+  (cd platforms/mica/uisp;./bootstrap)
+
+Then you can configure, make and install as usual:
+  ./configure
+  make
+  make install
diff --git a/tools/configure.ac b/tools/configure.ac
new file mode 100644
index 00000000..debc3de2
--- /dev/null
+++ b/tools/configure.ac
@@ -0,0 +1,135 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+dnl -*- m4 -*-
+
+# force autoconf 2.5 on Debian systems
+AC_PREREQ(2.50)
+
+AC_INIT(tinyos-tools, 1.2.1)
+AC_CONFIG_AUX_DIR(config-aux)
+AM_INIT_AUTOMAKE
+AC_CANONICAL_HOST
+
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_RANLIB
+
+AC_PATH_PROG(pathperl, perl)
+if test -z "$pathperl" ; then
+  AC_MSG_ERROR(I can't find perl); 
+fi
+
+AC_PATH_PROG(pathpython, python)
+if test -z "$pathpython" ; then
+  AC_MSG_ERROR(I can't find python); 
+fi
+
+if test -z "$NESCC_PREFIX"; then
+  AC_PATH_PROG(pathnescc, nescc)
+  if test -z "$pathnescc"; then
+    AC_MSG_ERROR(I can't find nescc)
+  else
+    NESCC_PREFIX=`dirname "$pathnescc"`
+    NESCC_PREFIX=`dirname "$NESCC_PREFIX"`
+  fi
+fi
+nescc_prefix=`(cd $NESCC_PREFIX;pwd)`
+AC_SUBST(nescc_prefix)
+
+
+if test -z "$DEFAULT_TARGET"; then
+  DEFAULT_TARGET=mica
+fi
+default_target=$DEFAULT_TARGET
+AC_MSG_NOTICE(Default ncc build target is $default_target)
+AC_MSG_NOTICE(...but using a tos/.default-platform file is a better choice)
+AC_SUBST(default_target)
+
+if test -z "$TOSDIR"; then
+  if test -d ../tos; then
+    TOSDIR=../tos
+  elif test -d ../../tos; then
+    TOSDIR=../../tos
+  elif test -d $HOME/nest/tos; then
+    TOSDIR=$HOME/nest/tos
+  else
+    AC_MSG_ERROR(I can't find the tos directory);
+  fi
+fi
+TOSDIR=`(cd $TOSDIR;pwd)`
+AC_MSG_NOTICE(TinyOS directory is $TOSDIR)
+AC_SUBST(TOSDIR)
+
+AC_MSG_CHECKING(for cygwin)
+case $host in
+  *-*-cygwin*)
+    AC_MSG_RESULT(yes)
+    JNIPREFIX=
+    JNISUFFIX=dll
+    INSTALLJNI="install --group=SYSTEM"
+    CYGWIN=yes
+    ;;
+  *)
+    JNIPREFIX=lib
+    JNISUFFIX=so
+    INSTALLJNI="install"
+    AC_MSG_RESULT(no)
+esac
+
+AM_CONDITIONAL([CYGWIN], [test "$CYGWIN"])
+
+AC_MSG_CHECKING(for JDK location)
+JAVAC_DIR=`/bin/sh tinyos/misc/tos-locate-jre --javac`
+if test $? -ne 0; then
+  AC_ERROR(java not found)
+fi
+JDK=`dirname "$JAVAC_DIR"`
+AC_MSG_RESULT($JDK)
+
+GETENVLIB=${JNIPREFIX}getenv.$JNISUFFIX
+TOSCOMMLIB=${JNIPREFIX}toscomm.$JNISUFFIX
+
+AC_SUBST(GETENVLIB)
+AC_SUBST(TOSCOMMLIB)
+AC_SUBST(JDK)
+AC_SUBST(INSTALLJNI)
+AC_SUBST(JNIPREFIX)
+AC_SUBST(JNISUFFIX)
+
+AC_CONFIG_SUBDIRS(platforms/mica/uisp)
+
+AC_OUTPUT(
+	Makefile
+	platforms/Makefile
+	platforms/mica/Makefile
+	platforms/mica/cc1000-channelgen/Makefile
+	platforms/msp430/Makefile
+	platforms/msp430/motelist/Makefile
+	platforms/msp430/pybsl/Makefile
+	platforms/msp430/pybsl/tos-bsl.1
+	platforms/msp430/pybsl/serial/Makefile
+	tinyos/Makefile
+	tinyos/java/Makefile
+	tinyos/java/env/Makefile
+	tinyos/java/serial/Makefile
+	tinyos/misc/tos-ident-flags
+	tinyos/misc/tos-install-jni
+	tinyos/misc/tos-set-symbols
+	tinyos/misc/tos-write-image
+	tinyos/misc/tos-storage-at45db
+	tinyos/misc/tos-storage-stm25p
+	tinyos/misc/Makefile
+	tinyos/ncc/Makefile
+	tinyos/ncc/mig
+	tinyos/ncc/ncc
+	tinyos/ncc/ncg
+	tinyos/ncc/nesdoc
+	tinyos/ncc/nesdoc-py/Makefile
+)
diff --git a/tools/platforms/.cvsignore b/tools/platforms/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/Makefile.am b/tools/platforms/Makefile.am
new file mode 100644
index 00000000..b19ad779
--- /dev/null
+++ b/tools/platforms/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = mica msp430
+
diff --git a/tools/platforms/mica/.cvsignore b/tools/platforms/mica/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/mica/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/mica/Makefile.am b/tools/platforms/mica/Makefile.am
new file mode 100644
index 00000000..5ce734ea
--- /dev/null
+++ b/tools/platforms/mica/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = cc1000-channelgen uisp
diff --git a/tools/platforms/mica/cc1000-channelgen/.cvsignore b/tools/platforms/mica/cc1000-channelgen/.cvsignore
new file mode 100644
index 00000000..3f3c51a2
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/.cvsignore
@@ -0,0 +1,4 @@
+Makefile
+Makefile.in
+.deps
+tos-channelgen
diff --git a/tools/platforms/mica/cc1000-channelgen/Makefile.am b/tools/platforms/mica/cc1000-channelgen/Makefile.am
new file mode 100644
index 00000000..4ebf65dd
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/Makefile.am
@@ -0,0 +1,9 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tos-channelgen.1
+
+bin_PROGRAMS=tos-channelgen
+
+all: $(EXES)
+
+tos_channelgen_SOURCES = tos-channelgen.c
diff --git a/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1 b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1
new file mode 100644
index 00000000..bd2d705a
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1
@@ -0,0 +1,18 @@
+.TH tos-channelgen 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-channelgen - Calculate valid CC1000 radio channels
+.SH SYNOPSIS
+
+\fBtos-channelgen\fR [\fB-p\fR] \fIfrequency\fR
+.SH DESCRIPTION
+
+\fBtos-channelgen\fR computes the CC1000 channel which is closest to the
+requested \fIfrequency\fR. With the \fB-p\fR option, \fBtos-channelgen\fR
+prints a table (suitable for use in a C initialiser) containing all the
+CC1000 settings for the channel.
+.SH EXAMPLES
+
+  tos-channelgen 916000000
+  tos-channelgen -p 433000000
diff --git a/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c
new file mode 100644
index 00000000..d2a6c45b
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c
@@ -0,0 +1,320 @@
+// $Id$
+
+/* -*- Mode: C; c-basic-indent: 2; indent-tabs-mode: nil -*- */
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author:	Phil Buonadonna
+ * Revision:	$Id$
+ * 
+ */
+
+/*
+ * This tool provides two things:
+ *  1) To verify the actual channel generated by the component function
+ *     CC1000Control.TuneManual(freq)  The computation engine used in
+ *     this program is EXACTLY the same as it is for the on-device
+ *     stack and should generate the same result.
+ * 
+ *  2) To generate a C-code preset-table entry for a given frequency.
+ * 
+ * The assumptions used are:
+ *  XOSC Freq           - 14.745600 MHz
+ *  Separation Freq     - 64 KHz
+ *  IF                  - 150 KHz
+ *  LO Injection        - High Side
+ *  Baud Rate           - 38.4 Kbaud (19.2 realized w/ Manchester Encoding)
+ */
+
+#include 
+#ifndef __CYGWIN__
+#include 
+#endif
+
+char gfPrintPreset = 0;
+
+enum {
+  IF = 150000,
+  FREQ_MIN = 4194304,
+  FREQ_MAX = 16751615
+};
+
+
+const uint32_t FRefTbl[9] = {2457600,
+			     2106514,
+			     1843200,
+			     1638400,
+			     1474560,
+			     1340509,
+			     1228800,
+			     1134277,
+			     1053257};
+
+const uint16_t CorTbl[9] = {1213,
+			    1416,
+			    1618,
+			    1820,
+			    2022,
+			    2224,
+			    2427,
+			    2629,
+			    2831};
+
+const uint16_t FSepTbl[9] = {0x1AA,
+			     0x1F1,
+			     0x238,
+			     0x280,
+			     0x2C7,
+			     0x30E,
+			     0x355,
+			     0x39C,
+			     0x3E3};
+
+uint32_t cc1000ComputeFreq(uint32_t desiredFreq) {
+  uint32_t ActualChannel = 0;
+  uint32_t RXFreq = 0, TXFreq = 0;
+  int32_t Offset = 0x7fffffff;
+  uint16_t FSep = 0;
+  uint8_t RefDiv = 0;
+  uint8_t i;
+
+  for (i = 0; i < 9; i++) {
+
+    uint32_t NRef = ((desiredFreq + IF));
+    uint32_t FRef = FRefTbl[i];
+    uint32_t Channel = 0;
+    uint32_t RXCalc = 0, TXCalc = 0;
+    int32_t  diff;
+
+    NRef = ((desiredFreq + IF) << 2) / FRef;
+    if (NRef & 0x1) {
+      NRef++;
+    }
+
+    if (NRef & 0x2) {
+      RXCalc = 16384 >> 1;
+      Channel = FRef >> 1;
+    }
+
+    NRef >>= 2;
+
+    RXCalc += (NRef * 16384) - 8192;
+    if ((RXCalc < FREQ_MIN) || (RXCalc > FREQ_MAX)) 
+      continue;
+    
+    TXCalc = RXCalc - CorTbl[i];
+    if ((TXCalc < FREQ_MIN) || (TXCalc > FREQ_MAX)) 
+      continue;
+
+    Channel += (NRef * FRef);
+    Channel -= IF;
+
+    diff = Channel - desiredFreq;
+    if (diff < 0)
+      diff = 0 - diff;
+
+    if (diff < Offset) {
+      RXFreq = RXCalc;
+      TXFreq = TXCalc;
+      ActualChannel = Channel;
+      FSep = FSepTbl[i];
+      RefDiv = i + 6;
+      Offset = diff;
+    }
+
+  }
+
+  if (RefDiv != 0) {
+    uint8_t ucRxVcoCurrent, ucRxLoDrive, ucRxMatch;
+    uint8_t ucTxVcoCurrent, ucTxPaDrive;
+    uint8_t ucBufCurrent, ucLNACurrent; 
+    if (ActualChannel < 500000000) {
+      if (ActualChannel < 400000000) {
+        // CURRENT (RX)
+        //gCurrentParameters[0x9] = ((8 << CC1K_VCO_CURRENT) | (1 << CC1K_LO_DRIVE));
+        ucRxVcoCurrent = 8; ucRxLoDrive = 1;
+        // CURRENT (TX)
+        //gCurrentParameters[0x1d] = ((9 << CC1K_VCO_CURRENT) | (1 << CC1K_PA_DRIVE));
+        ucTxVcoCurrent = 9; ucTxPaDrive = 1;
+      }
+      else {
+        // CURRENT (RX)
+        // gCurrentParameters[0x9] = ((4 << CC1K_VCO_CURRENT) | (1 << CC1K_LO_DRIVE));
+        ucRxVcoCurrent = 4; ucRxLoDrive = 1;
+        // CURRENT (TX)
+        // gCurrentParameters[0x1d] = ((8 << CC1K_VCO_CURRENT) | (1 << CC1K_PA_DRIVE));
+        ucTxVcoCurrent = 8; ucTxPaDrive = 1;
+      }
+      // FRONT_END
+      //gCurrentParameters[0xa] = (1 << CC1K_IF_RSSI); 
+      ucBufCurrent = 0; ucLNACurrent = 0;
+      // MATCH
+      //gCurrentParameters[0x12] = (7 << CC1K_RX_MATCH);
+      ucRxMatch = 7;
+    }
+    else {
+      // CURRENT (RX)
+      // gCurrentParameters[0x9] = ((8 << CC1K_VCO_CURRENT) | (3 << CC1K_LO_DRIVE));
+      ucRxVcoCurrent = 8; ucRxLoDrive = 3;
+      // CURRENT (TX)
+      // gCurrentParameters[0x1d] = ((15 << CC1K_VCO_CURRENT) | (3 << CC1K_PA_DRIVE));
+      ucTxVcoCurrent = 15; ucTxPaDrive = 3;
+      // FRONT_END
+      //gCurrentParameters[0xa] = ((1<> 16) & 0xFF));  // MSB
+      printf("0x%x,",(uint8_t)((RXFreq >> 8) & 0xFF));
+      printf("0x%x,\n ",(uint8_t)((RXFreq) & 0xFF));  // LSB
+      // FREQB
+      printf("0x%x,",(uint8_t)((TXFreq >> 16) & 0xFF));  // MSB
+      printf("0x%x,",(uint8_t)((TXFreq >> 8) & 0xFF));
+      printf("0x%x,\n ",(uint8_t)((TXFreq) & 0xFF)); // LSB
+      // FSEP
+      printf("0x%x,",(uint8_t)((FSep >> 8) & 0xFF)); //MSB
+      printf("0x%x,\n ",(uint8_t)((FSep) & 0xFF));  // LSB
+      // CURRENT (RX)
+      printf("((%d << CC1K_VCO_CURRENT) | (%d << CC1K_LO_DRIVE)), \n ",ucRxVcoCurrent,ucRxLoDrive);
+      // FRONT_END
+      printf("((%d<\n");
+}
+
+int main(int argc, char **argv) {
+
+  uint32_t DesiredFreq;
+  uint32_t ActualFreq;
+  char *szProgName = argv[0];
+  char cOption;
+
+  if (argc < 2) {
+    PrintUsage(szProgName);
+    return 0;
+  }
+
+  while ((--argc > 0) && ((*++argv)[0] == '-')) {
+    while (cOption = *++argv[0]) {
+      switch (cOption) {
+      case 'p':
+        gfPrintPreset = 1;
+        break;
+      default:
+        PrintUsage(szProgName);
+        return 0;
+      }
+    }
+  }
+
+  DesiredFreq = atoi(argv[0]);
+
+  if ((DesiredFreq < 300000000) || (DesiredFreq > 1000000000)) {
+    fprintf(stderr,"Frequency %d not in range 300000000 Hz - 1000000000 Hz\n",DesiredFreq);
+    return 0;
+  }
+
+  ActualFreq = cc1000ComputeFreq(DesiredFreq);
+
+  return 0;
+
+}
+
diff --git a/tools/platforms/mica/uisp/.cvsignore b/tools/platforms/mica/uisp/.cvsignore
new file mode 100644
index 00000000..d8b16eb9
--- /dev/null
+++ b/tools/platforms/mica/uisp/.cvsignore
@@ -0,0 +1,13 @@
+.dates-set
+Makefile
+Makefile.in
+aclocal.m4
+config
+autom4te.cache
+config.log
+config.status
+uisp.1
+kernel
+uisp.spec
+config.cache
+configure
diff --git a/tools/platforms/mica/uisp/AUTHORS b/tools/platforms/mica/uisp/AUTHORS
new file mode 100644
index 00000000..4388bf49
--- /dev/null
+++ b/tools/platforms/mica/uisp/AUTHORS
@@ -0,0 +1,26 @@
+This version is a patch of the regular uisp distribution, maintained by
+	Phil Buonadonna (pbuonado@intel-research.net)
+	David Gay (dgay@intel-research.net)
+
+The regular distibution is:
+
+Original Author: Uros Platise
+
+Current maintainers: 
+
+	Marek Michalkiewicz 
+	Theodore A. Roth 
+
+Contributors:
+
+	Dean Ferreyra 
+	Daniel Berntsson 
+	Jason Kyle 
+	Uwe Bonnes 
+	Bryce Denney 
+	Alexander Popov 
+	Hamish Moffatt 
+
+If you have made contributions and your name is missing, send an email saying
+so to .
+
diff --git a/tools/platforms/mica/uisp/CHANGES b/tools/platforms/mica/uisp/CHANGES
new file mode 100644
index 00000000..b436b0b2
--- /dev/null
+++ b/tools/platforms/mica/uisp/CHANGES
@@ -0,0 +1,184 @@
+From 20020524 on, see the ChangeLog file.
+
+The project is now hosted on http://savannah.gnu.org/projects/uisp/ .
+
+Changes in uisp-20020524:
+ - add (GPL) copyright notices to all files, as required before the project
+   can be added to savannah.gnu.org (again, thanks to Theodore A. Roth)
+ - add preliminary ATmega8515 and ATmega162 support (untested, not yet
+   supported by pavr/stk500, just added signature bytes to the list)
+ - add a few items to the TODO list :)
+
+Changes in uisp-20020420:
+ - add preliminary ATtiny26 and ATmega32 support (untested, not yet
+   supported by pavr/stk500)
+ - another parallel port programmer (MAXI - http://www.invtech.com.au/),
+   thanks to Hamish Moffatt 
+ - fix upload/verify of >64K srec/ihex files,
+   fix STK500 swapped signature bytes, and
+   support case-insensitive AVR device names,
+   thanks to Theodore A. Roth 
+ - ATtiny15 has a calibration byte, too (was not in an older version of
+   the datasheet), thanks to Alexander Popov 
+
+Changes in uisp-20020303:
+ - add support for fuse bits with avr910/pavr programmers, and fix NULL
+   pointer segfaults with no -dprog, thanks to Bryce Denney 
+
+Changes in uisp-20011025:
+ - DASA2 (aka PonyProg interface) fixes (thanks to Uwe Bonnes):
+   AVR RESET# = inverted TXD (so sending BREAK resets the AVR)
+   -dinvert=sck,miso,mosi,reset (invert each specified line)
+   -dt_reset=N (reset inactive high time in microseconds)
+ - add S2/S3 record support necessary for ATmega103 (thanks to Uwe Bonnes)
+ - add ATmega64 to the device table (untested)
+ - read/write ATmega64/128 extended fuse bits (untested, no pavr support yet)
+ - tested on ATmega323 (thanks to Lars Thore W. Aarrestad 
+   for sending me samples)
+
+Changes in uisp-20011006:
+ - add ATmega103-old back (bad sig bytes), these chips still exist :)
+ - comment out free(argv_ok) to work around a segfault
+
+Changes in uisp-20010909:
+ - add preliminary ATmega8/ATmega16/ATmega128 support based on recently
+   released datasheets (not tested, no extended fuse bits, no pavr yet)
+ - add support for yet another parallel port cable (DT006)
+ - include pavr firmware source (hacked a little by me) as part of uisp
+   (should also work in existing old "Atmel low cost" programmers after
+   1200 -> 2313 upgrade, assuming the original 1200 was in a socket...)
+
+Changes in uisp-20010818:
+ - clear O_NONBLOCK flag with fcntl() instead of re-opening serial ports
+   (failed with "Permission denied" on Cygwin, reported by Jason Kyle)
+ - enable direct serial support only if TIOCMGET is defined, remove dummy
+   TIOCM* defines added for Cygwin port
+
+Changes in uisp-20010813:
+ - STK500 support (not yet complete, reverse-engineered communication
+   protocol), thanks to Daniel Berntsson 
+ - Win9x/ME/NT/2K (Cygwin) port (needs the giveio.sys driver for direct
+   I/O port access), thanks to Dean Ferreyra 
+
+Changes in uisp-20010805:
+ - fix recent termios changes (forgot to clear CRTSCTS and set VMIN, VTIME),
+   also now set termios modes for dasa, dasa2 (still untested)
+ - rename ATmega32 to ATmega323 (now that the official datasheet is out)
+ - accept -dprog=pavr (for now as alias for -dprog=avr910, but may include
+   more features in the future, see http://avr.jpk.co.nz/pavr/pavr.html)
+
+Changes in uisp-20010715:
+ - rename AVR3 to FBPRG (-dprog=fbprg), as it seems that smartcard
+   development boards might have illegal uses in some countries ;)
+ - fix avr910 page write for ATmega163 (please test ATmega103 too!)
+ - save/restore termios modes on serial ports, please test
+ - change -datmel to -dprog=avr910
+ - uisp --help now prints to stdout, not stderr
+ - change #include  to #include 
+ - #include  in Terminal.C
+ - fix -dspeed handling in Serial.C
+
+Changes in uisp-20010701:
+ - fix compile with g++ 3.0
+ - fix Programming Enable error message after 32 retries
+ - add yet another parallel port interface (FBPRG/AVR3)
+ - more about --download of=file in uisp --help
+
+Changes in uisp-20010616:
+ - hopefully fix serial support (can't test), broken by my 20010211 -dpart
+   changes, in code common to both serial and parallel modes that use
+   different AVR device names :(
+ - CHANGES -> CHANGES.old, README -> CHANGES, TODO
+ - document FBPRG interface (not yet supported), and possible new design
+   using tables to make adding these new cables easier, in DAPA.C comments
+
+Changes in uisp-20010501:
+ - direct serial support: -dlpt=/dev/ttyS0 -dprog=dasa (or dasa2, see help)
+   warning: completely untested, might or might not work
+ - incompatible change: programmer type (for all these dummy parallel and
+   serial programmers) is specified with -dprog=... (-dstk200 etc. is gone)
+ - more portability changes (please test especially on non-x86 Linux and
+   FreeBSD, and send me patches if I broke something...)
+ - fix AT90S2323 signature byte (0x02 not 0x04)
+ - increase SCK delay (4us to 5us) for devices with slow RC oscillators
+ - don't skip 0xFF for page write
+ - fix a few typos
+ - remove OLD_DELAY_LOOP
+ - longer timeout for -datmel (500ms -> 1s)
+
+Changes in uisp-20010211:
+ - now available from http://www.amelek.gda.pl/avr/uisp/ and
+   officially maintained by me (many thanks to Uros for all previous work)
+ - device type can be specified if auto-detection fails, necessary for
+   AT90S1200 and other parts with erased signature bytes: -dpart=at90s1200
+ - assume -dno-retry -dno-poll for AT90S1200 (data polling should work
+   according to the datasheet, but bug reports indicate it doesn't, and
+   1K of program memory doesn't take that long to write anyway...)
+ - support for yet another AVR ISP parallel port cable (not tested),
+   based on information from http://www.bsdhome.com/avrprog/
+ - FreeBSD support (not tested, uncomment -DHAVE_PPI in the Makefile
+   and tell me if it works, or send me a patch if it doesn't :)
+
+Changes in uisp-20001216:
+ - ATmega163 now supported, and tested (many thanks to Odd Jostein Svendsli
+   of Atmel Norway for help - sending me two samples of these new chips)
+ - reading Flash and EEPROM contents to a srec file (--download of=file)
+ - read/write fuse bits and boot lock bits, read calibration byte (use
+   --segment=fuse, address 0 = fuse low, 1 = fuse high, 2 = calibration,
+   3 = lock bits: 1 1 BLB12 BLB11 BLB02 BLB01 LB2 LB1)
+ - data polling with page write, if supported by device
+ - added timer{add,sub,cmp} macros for systems that don't have them
+ - security fix, drop privileges before opening the serial device too
+   (warning: installation setuid root still not recommended, these are
+   just random fixes, and not a complete review for security holes;
+   using ppdev instead of direct I/O is highly recommended)
+
+Changes in uisp-20001125:
+ - fix a bug where erasing a locked device (not possible to identify)
+   might fail, now always wait 200 ms for chip erase
+ - add support for "Atmel AVR ISP" parallel port cable
+ - various cleanups (duplicated code to report statistics, etc.)
+
+Changes in uisp-20001118:
+ - make it possible to compile without direct I/O port access for non-PC
+   architectures, but still allow parallel port access via /dev/parportX
+   (Linux ppdev driver)
+ - include the latest ppdev driver (kernel patch) for Linux 2.2.17
+ - security: drop privileges before opening /dev/parportX (only matters
+   if accidentally installed setuid root - still not recommended!)
+ - data polling statistics reworked: min/avg/max ms/byte (so you can
+   compare them with datasheet specs - maybe it helps in detecting chips
+   that were programmed too many times)
+ - fix a longstanding bug in data polling that caused random programming
+   failures (could be worked around by specifying longer t_wd_flash -
+   no, that really wasn't the chips failing :)
+ - update write timing specs from the current datasheets (flash 8ms -> 4ms
+   for most chips, programs a bit faster - now that the above bug is gone)
+ - add more device codes for "Atmel low cost" (serial port) programmer
+   (still looking for updated avr910.asm - it must exist somewhere, as
+   avrprog.exe from AVR Studio claims to support all devices...)
+ - started work on fuse bits (not finished yet), will be needed for
+   ATmega163 (internal RC oscillator enabled by default)
+
+Changes in uisp-20001014:
+ - fix some stupid bugs (SCK delay, writing lock bits)
+ - avoid "invalid parameter" errors for -dt_wd_flash etc. if device locked
+ - updated help and version information
+
+Changes in uisp-20000930:
+ - compiles with g++ 2.95.2 (tested on Debian 2.2), does not depend on
+   kernel header files for parallel port bit definitions
+ - as in PonyProg, support for the "ppdev" Linux driver (included in
+   pre-2.4.0 kernels, available separately for 2.2.x - please bug Alan
+   to add it to 2.2.18 :), as well as the old direct I/O port access
+   (works with any kernel, but requires root privileges)
+ - more reliable delays on very fast machines, using gettimeofday()
+   (programming may be very slow on <=486 but should work otherwise)
+ - support for more new devices, such as ATmega161 (not tested)
+ - support for programming lock bits with --lock option (currently
+   only both at the same time, and no ATmega161 BLBxx bits yet)
+ - when not programming, try to disable (PS/2) parallel port data outputs -
+   this may allow cheap cables (no 74HC244 inside) to work if the ISP pins
+   are also used for other things (not tested)
+ - removed endian_bug backwards compatibility, various other cleanups
+
diff --git a/tools/platforms/mica/uisp/COPYING b/tools/platforms/mica/uisp/COPYING
new file mode 100644
index 00000000..60549be5
--- /dev/null
+++ b/tools/platforms/mica/uisp/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
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+  The licenses for most software are designed to take away your
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+
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+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
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+free software which everyone can redistribute and change under these terms.
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+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    
+    Copyright (C) 19yy  
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+
+
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+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
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+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  , 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/tools/platforms/mica/uisp/ChangeLog b/tools/platforms/mica/uisp/ChangeLog
new file mode 100644
index 00000000..5faa48a8
--- /dev/null
+++ b/tools/platforms/mica/uisp/ChangeLog
@@ -0,0 +1,473 @@
+2003-06-20  Theodore A. Roth  
+
+	* configure.in: Bump version (back to cvs track).
+	* src/DAPA.C: There's some bug in recent linux kernels which makes
+	ioperm I/O port permission changes be delayed (you get a segmentation
+	fault at the instruction accessing the I/O port). May be related to
+	this: http://www.securitytracker.com/alerts/2003/May/1006778.html.
+	Known to affect RedHat's 2.4.20-13.9 kernel.
+	[Thanks to David Gay  for finding and fixing
+	this and for the link.]
+
+2003-06-18: Theodore A. Roth  
+
+	* Release 20030618.
+
+2003-06-18  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Cut 20030618 release.
+	* NEWS: Minor update to note release.
+
+2003-05-27  Theodore A. Roth  
+
+	* Makefile.am (EXTRA_DIST): Add doc/uisp-parport-connect.txt.
+	* doc/uisp-parport-connect.txt: Add note about mega128 PDI/PDO pins.
+
+2003-05-27  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* TODO: Add note about fuse and lock bits.
+	* doc/uisp-parport-connect.txt: New file (found on net).
+
+2003-05-18  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* NEWS: Fix spelling mistake.
+
+2003-05-13  Theodore A. Roth  
+
+	* configure.in: Update copyright year.
+	* src/Avr.C: Ditto.
+	* src/Avr.h: Ditto.
+	* src/DAPA.C: Ditto.
+	* src/DAPA.h: Ditto.
+	* src/Error.h: Ditto.
+	* src/MotIntl.C: Ditto.
+	* src/Serial.C: Ditto.
+
+2003-05-12  Theodore A. Roth  
+
+	* uisp.1.in: Added new options.
+	If an option takes an argument, show what it should be.
+	* src/Main.C: Make a few usage notes more verbose to clarify some
+	of the options.
+
+2003-05-12  Theodore A. Roth  
+
+	* uisp.1.in: Update pavr URL.
+	Update bsd URL.
+	Update bug report email address.
+	Update download URL.
+
+2003-05-12  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Fix a bug in which setting -dlpt= for
+	direct IO tries to open the default port name instead of the direct
+	port. [Thanks to Pavel Celeda for reporting the problem and isolating
+	a fix.]
+
+2003-05-10  Theodore A. Roth  
+
+	* src/Main.C: Update URLs for pavr and bsd programmers.
+	s/Futurtec/Futurlec/ for ett programmer.
+	* TODO: Update pavr URL.
+
+2003-05-10  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Serial.C: Fix select() failure on cygwin due to use of 
+	getdtablesize() function. [Thanks to Marc Wetzel for the fix and
+	Jason Kyle for reporting.]
+
+2003-05-08  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* NEWS: Add note about pagesize fix.
+	* src/Stk500.C: Fix num fuse bytes for mega162/mega169/mega103.
+	When writing a page to the stk500, set the pagesize based on the
+	pagesize parameter or if the parameter is zero, to 128 (this was
+	causing programming of a 1200 to hang since the pagesize was
+	fixed at 256 which was too long).
+
+2003-05-08  Theodore A. Roth  
+
+	* src/Avr.C: Mega162 has 3 fuse bytes, so set flags to AVR_M128
+	instead of AVR_M163. [Thanks to John Norgaard for reporting this.]
+
+2003-05-05  Theodore A. Roth  
+
+	* src/Stk500.C: Add a unique string to some "Device is not responding
+	correctly." error messages.
+
+2003-05-04  Theodore A. Roth  
+
+	* NEWS: New file.
+
+2003-04-18  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* TODO: Updated.
+	* src/DAPA.C: Handle TIOCMGET #ifdef's so that enum values are still
+	valid in switch statements.
+	Also, add check to see if TIOCCBRK is defined before using it. (This
+	was causing the build to fail on cygwin.
+
+2003-04-16  Theodore A. Roth  
+
+	* src/DAPA.C:
+	* src/Error.h:
+	* src/Main.C:
+	* src/MotIntl.C:
+	* src/Serial.C:
+	When throwing an Error_C, pass an argument so that the user has a
+	clue as to the cause of the failure. (Maybe the user won't then have
+	to spend two hours looking for what went wrong. *cough*)
+
+2003-03-24  Theodore A. Roth  
+
+	* configure.in: Add check for strtod function.
+	* src/MotIntl.C: Calculate ihex checksum even on ignored records.
+	[submitted by Pavel Celeda ] [patch #1322]
+	* src/Stk500.C: Use strtod() instead of strtof() [strtof isn't
+	available when using gcc-2.95.x (debian)]
+
+2003-03-11  Theodore A. Roth  
+
+	* CHANGES:
+	* ChangeLog:
+	* uisp.spec.in:
+	* doc/HOWTO.windows:
+	Update all occurences of my email address.
+
+2003-03-02  Theodore A. Roth  
+[Thanks to Richard Barrington ]
+
+	* src/DAPA.C: Add support for Futurlec ETT parallel port programmer.
+	* src/DAPA.h: Ditto.
+	* src/Main.C: Add note about ETT programmer to Usage().
+
+2003-03-02  Theodore A. Roth  
+[Thanks to Klaus Rudolph  as this is based on his patch]
+
+	* src/Main.C: Add --{rd,wr}_{aref,vtg} options to Usage().
+	* src/Stk500.C: Add read/write of aref and vtg voltages.
+	* src/Stk500.h: Add ReadParam() and WriteParam() prototypes.
+
+2003-02-21  Theodore A. Roth  
+
+	* src/Main.C: Update copyright year.
+
+2003-02-20  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* uisp.1.in: Fix -v option so max is 4.
+
+2003-02-19  Theodore A. Roth  
+
+	* AUTHORS: Update email addresses.
+	* src/Avr.C: Remove const from parts array so we can change some values
+		at runtime.
+	* src/Avr.h: Ditto.
+	* src/Main.C: Add command switch '-dparallel' for stk500.
+	Fix -v option when printing help to note max is 4 instead of 3.
+	Update email and URL addresses.
+	* src/Stk500.C: Rename VerifyPresense() to Initialize().
+	Remove const from prg_part[] array so we can change some values
+	    at runtime.
+	Before calling Initialize() process the -dparallel option.
+	* src/Stk500.h: Rename VerifyPresense() to Initialize().
+	Remove const from prg_part[] array so we can change some values
+	        at runtime.
+
+2003-02-19  Theodore A. Roth  
+
+	* src/Stk500.C: Add support for firmware version 1.14.
+	Add support for at90s8534, mega8515, mega8535, mega32.
+	* src/Stk500.h: Remove cmd, len and sync from SPrgExtDevParams struct
+	since its len varies depending on the firmware version.
+
+2003-02-18  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Avr.C: Add support for mega169.
+	* src/Stk500.C: Add support for mega162 and mega169.
+
+2003-02-17  Theodore A. Roth  
+
+	* src/Stk500.C: Change MagicNumber to ExtDevParams (see appnote AVR061).
+	Add ext dev params initialization to prg_part structure init.
+	Wrap a few line strings.
+	Change the "Device is not responding correctly." error messages so we
+		can tell where they originated in the code.
+	Add VerifyPresense() method: does most of what was in 
+		EnterProgrammingMode().
+	Simplify EnterProgrammingMode(): doesn't really need to set the params
+		every time it's called.
+	* src/Stk500.h: Add struct SPrgExtDevParams.
+	Remove MagicNumber.
+	Add VerifyPresense() method prototype.
+
+2003-02-17  Theodore A. Roth  
+
+	* src/timeradd.h: Fix some typos in timeradd & timersub macros.
+
+2003-02-17  Theodore A. Roth  
+
+	* src/Terminal.C: Remove C++ iostream usage since this was the only
+	file to use it and it was not consistently used.
+
+2003-02-15  Theodore A. Roth  
+
+	* src/Stk500.C: Add support for mega16.
+
+2003-02-15  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* pavr/Makefile: Create .lst file.
+	Change default lpt port to parport0.
+	* pavr/pavr.c: Use latest avr-libc headers.
+	* src/Stk500.C: Print out the version of the stk500 firmware.
+
+2002-12-19  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Stk500.C: Add struct entry for mega8.
+
+2002-12-01  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Reset version to 20021201cvs.
+
+2002-12-01  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Cut 20021201 release.
+
+2002-11-22  Theodore A. Roth  
+  (Thanks to Jake McGuire  for the patch and porting to
+  Mac OS X for use with a USB-to-RS232 dongle.)
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Make sure the ioport_*() functions are defined in all
+	cases.
+	If par_release() isn't available, define it to nothing instead of (0).
+
+2002-11-15  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Use /dev/parport0 as the default interface instead of
+	direct port access via ioperm(). Using uisp at root or setuid root is
+	frowned upon so it should not be the default.
+
+2002-11-15  Theodore A. Roth  
+  (Thanks to Christopher X. Candreva  for reporting this.)
+
+	* src/Serial.h: Increase serial timeout. Programming 8535 parts with
+	the stk500 was timing out to early and caused failures. This also seems
+	to affect the at90s1200 devices (also reported by Klaus Rudolph 
+	).
+
+2002-10-30  Theodore A. Roth  
+  (Thanks to Seth LaForge  for pointing out the buffer overflow
+   problems.)
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Main.C: Add comment about dropping setuid privies.
+	* src/AvrAtmel.C: Remove unused variables.
+	* src/Makefile.am: Add -Wall and -Werror compile flags.
+	* src/MotIntl.C (Htoi): Make sure hex digit is valid.
+	(UploadMotorola): Increase size of seg_name[] to avoid buffer overflow.
+	(UploadMotorola): Check for possible read past end of line_buf.
+	(UploadMotorola): Add case for "S3" records.
+	(UploadIntel): Check for possible read past end of line_buf.
+
+2002-10-29  Theodore A. Roth  
+
+	* doc/srecord.htm: New file (from Marek's site).
+
+2002-10-28  Theodore A. Roth  
+
+	* src/Stk500.C: Allow firmware version >= 1.7.
+
+2002-10-28  Theodore A. Roth  
+
+	* bootstrap: Check for proper autotools.
+	* configure.in: Check for autoconf version 2.13.
+	* config/check_autoconf213.m4: New file.
+
+2002-10-28  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	Make cvs version rpm compatible.
+	* src/AvrAtmel.C: Make -dpart more compatible with gcc device names.
+
+2002-10-05  Theodore A. Roth  
+
+	* Makefile.am: Add man page.
+	* configure.in: Ditto.
+	(AM_INIT_AUTOMAKE): Bump version.
+	* uisp.1.in: New file. [Thanks to Shaun Jackman ]
+
+2002-10-02  Theodore A. Roth  
+
+	* src/Stk500.C: Use struct for programming parameters instead of just
+	a byte array.
+	Add tiny26 support.
+	* src/Stk500.h: Define SPrgParams structure.
+
+2002-10-02  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* doc/README.stk500: Add note about specs available from Atmel.
+
+2002-08-19  Theodore A. Roth  
+	[Patch from Tetsuya Okada ]
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Added Xilinx cable support.
+	* src/DAPA.h: Added Xilinx cable support.
+	* src/Main.C: Added Xilinx cable support.
+	* doc/README.xilinx: New file.
+
+2002-07-04  Marek Michalkiewicz  
+
+	* src/DAPA.C (OutReset, Init): Fix PAT_BSD bug.
+
+2002-06-26  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version for release.
+
+2002-06-24  Theodore A. Roth  
+
+	* doc/HOWTO.windows: New file. Thanks to Marc Wetzel .
+	* Makefile.am (EXTRA_DIST): Added doc files.
+
+2002-06-24  Marek Michalkiewicz  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* pavr/pavr.c: Add ATmega323 support.
+
+	* src/AvrAtmel.C (ChipErase): Wait up to 5 seconds for chip erase.
+	* src/Serial.C (Tx, Rx): Use Info() instead of fprintf() to log
+	sent and received characters (now enabled at run time with -v=4).
+	(Send): Accept optional timeout argument, default is 1 second.
+	* src/Serial.h (DEBUG_LOG_TX, DEBUG_LOG_RX): Remove.
+	(Send): Update for optional timeout argument.
+	Thanks to Bryce Denney  for suggestions.
+
+2002-06-13  Marek Michalkiewicz  
+
+	* src/DAPA.C (SendRecv): Read MISO just before SCK falling edge,
+	leaving more room for propagation delays.
+
+2002-06-13  Marek Michalkiewicz  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/MotIntl.C (UploadIntel): Handle hex record types 3, 4, 5.
+
+2002-06-09  Marek Michalkiewicz  
+
+	* pavr/pavr.c: Fix to build with latest avr-libc.
+
+2002-06-08  Marek Michalkiewicz  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/Avr.C (parts): Add ATmega8535 signature bytes.
+	* src/AvrAtmel.C (prg_part): Update list to match AvrProg 1.37
+	distributed with AVR Studio 3.54.  Sort by device code.
+
+2002-06-03  Theodore A. Roth  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+
+	* src/Avr.h, src/AvrAtmel.C, src/AvrDummy.C, src/Main.C,
+	  src/Stk500.h:
+	Implemented the new '--wr_lock' command line option.
+
+	* src/Stk500.C:
+	Implemented WriteLockBits.
+	Simplified usage of UniversalCmd.
+
+	* src/Avr.C, src/AvrAtmel.C, src/AvrDummy.C, src/DAPA.C,
+	  src/MotIntl.C, src/Serial.C, src/Stk500.C, src/Terminal.C,
+	  src/cygwinp.C:
+	Add include for config.h.
+
+2002-06-02  Marek Michalkiewicz  
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/Avr.C, src/DAPA.C, src/Main.C, src/Terminal.C:
+	Fixes for g++ 3.1 errors.  Please test with older compilers.
+
+2002-06-02  Marek Michalkiewicz  
+
+	* src/Main.C (main): Fix typo (missing %) in 4 format strings.
+
+2002-06-01  Theodore A. Roth  
+
+	* src/Avr.h, src/AvrAtmel.C, src/AvrDummy.C, src/Main.C,
+	  src/Stk500.C:
+	Added new command lines options for reading/writing fuses.
+	Stubbed out code for new lock bit writing implementation.
+
+2002-05-30  Theodore A. Roth  
+
+	* configure.in:
+	Changed version to -cvs.
+
+	* src/Stk500.C, src/Stk500.h:
+	Added functionality to write lock/fuse bits.
+
+	* src/Stk500.C, src/Stk500.h:
+	Added functionality to read lock/fuse/calibration bits.
+
+	* src/Terminal.C:
+	Added space to prompt.
+
+	* src/Stk500.C, src/Stk500.h:
+	Fix write_buffer (separate buffers for flash and eeprom segments).
+
+	* src/Stk500.C, src/Stk500.h:
+	Fix read_buffer (separate buffers for flash and eeprom segments).
+
+2002-05-27  Theodore A. Roth  
+
+	* doc/README.stk500:
+	New file from Jason Kyle.
+
+	* TODO:
+	Remove note about autoconf/automake.
+
+	* CHANGES:
+	Added note about new ChangeLog file.
+
+	* AUTHORS:
+	Added Hamish Moffatt.
+
+	* Makefile.am, acconfig.h, bootstrap, config/README, configure.in,
+	  src/Main.C, src/Makefile, src/Makefile.am:
+	Conversion to use autoconf/automake for build system.
+
+	* uisp.spec.in:
+	New file.
+
+	* AUTHORS:
+	New file.
+
+2002-05-25  marekm  
+
+	* CHANGES:
+	Added notice that uisp is now on savannah, mainly to test CVS
+	write access.
+
+2002-05-25  Theodore A. Roth  
+
+	* CHANGES, CHANGES.old, COPYING, INSTALL, TODO,
+	  kernel/patch-2.2.17-ppdev1.gz, pavr/Makefile, pavr/pavr.c,
+	  src/Avr.C, src/Avr.h, src/AvrAtmel.C, src/AvrAtmel.h,
+	  src/AvrDummy.C, src/AvrDummy.h, src/DAPA.C, src/DAPA.h,
+	  src/Error.h, src/Global.h, src/Main.C, src/Makefile,
+	  src/MotIntl.C, src/MotIntl.h, src/Serial.C, src/Serial.h,
+	  src/Stk500.C, src/Stk500.h, src/Terminal.C, src/Terminal.h,
+	  src/cygwinp.C, src/cygwinp.h, src/parport.h, src/ppdev.h,
+	  src/timeradd.h:
+	Import sources from uisp-20020524.
diff --git a/tools/platforms/mica/uisp/INSTALL b/tools/platforms/mica/uisp/INSTALL
new file mode 100644
index 00000000..37e3c5a3
--- /dev/null
+++ b/tools/platforms/mica/uisp/INSTALL
@@ -0,0 +1,13 @@
+Installation for TinyOS-specific uisp:
+
+Execute
+  ./COMPILE
+(you can run the commands it contains directly if you prefer)
+
+Then:
+  make install
+(you must be root on Linux to perform this step)
+
+WARNING: if you don't use the COMPILE script, you may get compilation
+errors (depending on whether you've installed autoconf/etc, and what
+versions you have)
diff --git a/tools/platforms/mica/uisp/Makefile.am b/tools/platforms/mica/uisp/Makefile.am
new file mode 100644
index 00000000..fdc3af5b
--- /dev/null
+++ b/tools/platforms/mica/uisp/Makefile.am
@@ -0,0 +1,71 @@
+#
+# $Id$
+#
+# uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+# Copyright (C) 2002  Theodore A. Roth
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# Makefile.am -- Process this file with automake to produce Makefile.in
+#
+
+auxdir               = @ac_aux_dir@
+AUX_DIST             = $(auxdir)/install-sh $(auxdir)/missing \
+                       $(auxdir)/mkinstalldirs $(auxdir)/README
+
+man_MANS             = uisp.1
+
+AUX_DIST_EXTRA       = 
+EXTRA_DIST           = bootstrap config acconfig.h \
+                       CHANGES CHANGES.old \
+                       kernel/patch-2.2.17-ppdev1.gz \
+                       pavr/Makefile pavr/pavr.c \
+                       doc/HOWTO.windows doc/README.stk500 \
+                       doc/README.xilinx \
+                       doc/uisp-parport-connect.txt \
+                       uisp.1.in 
+
+AUTOMAKE_OPTIONS     = foreign
+
+if CYGWIN
+SUBDIRS              = src kernel
+else
+SUBDIRS              = src
+endif
+DIST_SUBDIRS         = $(SUBDIRS)
+
+MAINTAINERCLEANFILES = Makefile.in aclocal.m4 configure src/config-h.in \
+                       src/stamp-h.in $(AUX_DIST)
+
+ACLOCAL              = aclocal -I $(auxdir)
+
+install_aux_files    = AUTHORS ChangeLog COPYING INSTALL CHANGES CHANGES.old \
+                       TODO
+
+DOC_INST_DIR         = $(DESTDIR)$(datadir)/doc/uisp-$(VERSION)
+
+install-data-local:
+	$(mkinstalldirs) $(DOC_INST_DIR)
+	for file in $(install_aux_files) ; do \
+	  echo " $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file"; \
+	  $(INSTALL_DATA) $(srcdir)/$$file $(DOC_INST_DIR)/$$file; \
+	done
+
+uninstall-local:
+	rm -rf $(DOC_INST_DIR)
+
+dist-hook: uisp.spec
+	cp uisp.spec $(distdir)/uisp.spec
+	rm -rf $(distdir)/config/CVS
diff --git a/tools/platforms/mica/uisp/TODO b/tools/platforms/mica/uisp/TODO
new file mode 100644
index 00000000..5f68983c
--- /dev/null
+++ b/tools/platforms/mica/uisp/TODO
@@ -0,0 +1,42 @@
+
+ - The handling of fuse and lock bits needs some serious work. As it stands
+   it does not work with Hi-V parallel programming (on stk500). I've 
+   started working on this, but it was way too intusive a change to do just
+   before a release. [TRoth/2003-05-27]
+ - improve pavr support (many thanks to Jason Kyle for sending me one
+   of these nice programmers, see http://www.avr1.org/pavr/pavr.html):
+   - add option to force device type for chips with broken signature bytes
+   - use consistent -dpart=... device names
+   - more firmware improvements, speed optimizations (send OK response
+     and receive the next command while executing the previous one, use
+     data polling if supported by device, etc.)
+ - support for parallel port JTAG programming of ATmega8/16/323/128
+ - AT89S52 support (similar commands as AVR, but RESET active high)
+ - option to generate XTAL1 clock for target device while programming,
+   as in FBPRG / AVREAL / modified ByteBlaster / STK200 (LED output)
+ - how to talk to these new USB programmers Kanda is advertising now?
+ - better documentation
+ - clean rewrite in C ;)
+   (for parallel port interfaces only, maybe port the program already
+   available at http://www.bsdhome.com/avrprog/ from FreeBSD to Linux
+   and extend it to support all these different cables? [This program
+   is now called avrdude and has been ported to linux and cygwin.])
+   or at least, some better way to add all these parallel interfaces
+   invented by various people, with different pin assignments.
+   See also "cisp" by Marko Makela  available from
+   http://www.funet.fi/pub/cbm/crossplatform/transfer/C2N232/firmware/
+   cisp-1.0.tar.gz
+ - ATDH1150VPC cable support
+ - cleaner way to describe all these different cables
+ - free/open firmware for the STK500 (which is based on AT90S8535, and
+   schematics are available on avrfreaks), implementing the same and/or
+   our own different protocol
+ - uisp-compatible (avr910/pavr mode) boot loader for recent ATmega chips,
+   share common parts of the code (comm protocol) with pavr.c ?
+   add multi-word read/write/verify commands (faster)
+   mostly done, needs to be merged - see http://tlw.com/bryce/robot/avr/
+ - pavr firmware for ATmega8: new hardware design, more features possible
+   than with the original 2313, board with TQFP32 part should still fit in
+   that nice small DB9-DB9 housing, and it would be nice to be able to
+   flash the firmware through the same serial port, using a boot loader
+   and uisp of course :)
diff --git a/tools/platforms/mica/uisp/acconfig.h b/tools/platforms/mica/uisp/acconfig.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tools/platforms/mica/uisp/bootstrap b/tools/platforms/mica/uisp/bootstrap
new file mode 100755
index 00000000..15a3f7fe
--- /dev/null
+++ b/tools/platforms/mica/uisp/bootstrap
@@ -0,0 +1,5 @@
+aclocal
+autoheader
+autoconf
+[ -d config ] || mkdir config
+automake -a -c
diff --git a/tools/platforms/mica/uisp/configure.in b/tools/platforms/mica/uisp/configure.in
new file mode 100644
index 00000000..9d70496c
--- /dev/null
+++ b/tools/platforms/mica/uisp/configure.in
@@ -0,0 +1,78 @@
+#
+# $Id$
+#
+# uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+# Copyright (C) 2002, 2003  Theodore A. Roth
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+dnl Make sure we're using the correct version of autoconf
+AC_PREREQ(2.50)
+
+dnl Process this file with autoconf to produce a configure script.
+AC_INIT(src/Main.C)
+AC_CONFIG_AUX_DIR(config)
+AM_CONFIG_HEADER(src/config.h:src/config-h.in)
+AM_INIT_AUTOMAKE(uisp, 20050519tinyos)
+AC_CANONICAL_HOST
+
+dnl Checks for programs.
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_INSTALL
+
+dnl Checks for libraries.
+
+dnl Checks for header files.
+AC_HEADER_STDC
+AC_CHECK_HEADERS(fcntl.h sys/ioctl.h sys/time.h unistd.h)
+
+dnl Checks for typedefs, structures, and compiler characteristics.
+AC_C_CONST
+AC_TYPE_SIZE_T
+AC_HEADER_TIME
+
+dnl Checks for library functions.
+AC_PROG_GCC_TRADITIONAL
+AC_FUNC_MEMCMP
+AC_FUNC_VPRINTF
+AC_CHECK_FUNCS(gettimeofday select strstr strtol strtod)
+
+AC_SUBST(ac_aux_dir)
+
+# Set the DATE variable for the man page
+DATE=`date "+%B, %Y"` 
+
+AC_SUBST(DATE)
+
+AC_MSG_CHECKING(for cygwin)
+case $host in
+  *-*-cygwin*)
+    AC_MSG_RESULT(yes)
+    CYGWIN=yes
+    ;;
+  *)
+    AC_MSG_RESULT(no)
+esac
+
+AM_CONDITIONAL([CYGWIN], [test "$CYGWIN"])
+
+AC_OUTPUT( \
+	src/Makefile \
+	kernel/Makefile \
+	kernel/win32/Makefile \
+	uisp.1 \
+	uisp.spec \
+	Makefile)
diff --git a/tools/platforms/mica/uisp/doc/HOWTO.windows b/tools/platforms/mica/uisp/doc/HOWTO.windows
new file mode 100644
index 00000000..e511483d
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/HOWTO.windows
@@ -0,0 +1,91 @@
+$Id$
+
+MINI-HOWTO to build and use uisp under cygwin/w32.
+----------------------------------------------------------------------------
+-----------
+2002-06-23  Marc Wetzel  
+	* First release. Cygwin part.
+2002-06-24  Theodore A. Roth  
+	* Minor formatting changes.
+
+
+Cygwin:
+-------
+
+Short version:
+--------------
+Get uisp-source.
+./bootstrap  (Only needed if you get source from CVS)
+./configure
+make
+make install
+
+
+Long version:
+--------------
+Install cygwin as explained by redhat 
+Be sure to also install the development tools: GNU-C and GNU-CPP,
+and don't forget to install 'make', too :)
+
+Create a directory e.g. "/home/username/uisp-cvs".  Get the latest cvs source/
+or snapshot out of savannah.gnu.org into this directory.
+
+CVS: 
+
+  cvs -z3 -d:pserver:anoncvs@subversions.gnu.org:/cvsroot/uisp login
+  
+  cvs -z3 -d:pserver:anoncvs@subversions.gnu.org:/cvsroot/uisp co uisp
+
+Create the configure script by calling `./bootstrap`.  Now we call
+`./configure` to create the necessary makefiles depending on your system.
+Your are ready to type `make && make install` to build UISP.
+
+This build will link uisp with the cygwin dll's to provide the unix subsystem
+(posix layer) on a plain windows box.  See the cygwin site to get a deeper
+knowledge of it.  But you can use this uisp/w32 by just copying the necessary
+dll's out of your cygwin directory into the windows\system or system32
+directory.
+
+Necessary are the following 3 dlls:
+
+  13.12.2001  11:33            22.016 cygintl-1.dll
+  22.11.2001  00:16            41.105 cygpcre.dll
+  25.02.2002  18:16           769.352 cygwin1.dll
+
+
+Installing the printer-port driver:
+-----------------------------------
+
+Under Windows NT or Windows 2000 you need to install a special driver to get
+access to system resources like the printer port.  A ready to use lpt-driver
+for uisp is for example giveio.  One place where GIVEIO is found is e.g. here:
+.  Unzip the downloaded file to a location of
+your choice: e.g. "c:\Program Files\Giveio".  Copy the unzipped giveio.sys to
+your "winnt\system32\drivers" directory.  Now run the program loaddrv.exe to
+install the driver, you'll have to change the "Full pathname of driver" to the
+location you copied the giveio.sys to:
+e.g. "C:\WINNT\SYSTEM32\DRIVERS\GIVEIO.SYS".  Now press install, then
+start.  You should see the status change to "Operation was successful" - Now
+the driver is installed.  You should now extend your preferred
+compiler-startup-batch e.g. `run.cmd`  with the line `net start giveio` as
+this driver is not installed automatically.  Or run the loaddrv.exe (with
+changing to the right path) and press the start-button.
+
+You could extend your makefiles with the following two lines to have a new
+rule `make install` to flash the built .rom file into your avr.  My
+programming-interface is a stk200 compatible one, and I like the hashes to see
+that uisp is still working...
+
+ISP = C:/PATH-TO-UISP/uisp.exe
+install: $(TARG)
+		 $(ISP) -v=3 -dprog=stk200 --hash=1024 --erase --upload if=$(TARG).hex
+
+
+MinGW:
+
+To be continued...
+
+
+
+
+Any comments and/or corrections go to Marc Wetzel: 
diff --git a/tools/platforms/mica/uisp/doc/README.stk500 b/tools/platforms/mica/uisp/doc/README.stk500
new file mode 100644
index 00000000..2065bd7e
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/README.stk500
@@ -0,0 +1,294 @@
+$Id$
+
+NOTE: Atmel has finally released the specs for the protocol for talking to the
+stk500 over a serial line. Here's where to get the files:
+
+    ftp://www.atmel.com/pub/atmel/avr061.zip
+    http://www.atmel.com/atmel/acrobat/doc2525.pdf
+
+STK500 Commands  **preliminary information**
+---------------
+
+Extracted by Jason Kyle 20010701
+Updated 200201
+
+The latest version of this document can be found at www.avr1.org.
+
+Notes:
+- Incomplete but sufficient to make progress on free tools.
+- All commands are terminated by 0x20
+- All successful responses are framed 0x14 data 0x10 (i.e. NULL response is 
+  0x14 0x10)
+- Commands invalid in current mode (i.e not in pgm mode, pgm page) give 
+  0x14 0x13 response.
+
+
+STK500 BOARD COMMANDS
+---------------------
+
+** ?STK500
+Command		0x30 0x20
+Response	0x14 0x10
+Use		Establish STK500 presence and UART sync. Re-send n times until
+		response.
+Notes		STK500 won't respond to other commands unless this has been
+		sent.
+
+** BoardID
+Command		0x31 0x20
+Response	0x14 "AVR STK" 0x10
+Use		Identify board.
+Notes
+
+** VTargetSet
+Command		0x40 0x84 VTarget 0x20
+Response	0x14 0x10
+Use		Set VTarget voltage.
+Notes		0x33 = 5.1V , 0x34 = 5.2V , 0x32 = 5.0V
+
+** ARefSet
+Command		0x40 0x85 ARef 0x20
+Response	0x14 0x10
+Use		Set ARef voltage.
+Notes		Same count/V relationship as VTargetRead
+
+** POscSet
+Command		0x40 0x86 POsc 0x20
+Response	0x14 0x10
+Use		Set P parameter.
+Notes
+
+** NOscSet
+Command		0x40 0x87 NOsc 0x20
+Response	0x14 0x10
+Use		Set N parameter.
+Notes
+
+** SDOscSet
+Command		0x40 0x89 SDOsc 0x20
+Response	0x14 0x10
+Use		Set SD parameter.
+Notes
+
+** HWver
+Command		0x41 0x80 0x20
+Response	0x14 0x02 0x10
+Use		Hardware version identification.
+Notes
+
+** SWmajor
+Command		0x41 0x81 0x20
+Response	0x14 0x01 0x10
+Use		Software major version identification.
+Notes
+
+** SWminor
+Command		0x41 0x82 0x20
+Response	0x14 0x07 0x10
+Use		Software minor version identification.
+Notes
+
+** VTargetRead
+Command		0x41 0x84 0x20
+Response	0x14 0x33 0x10
+Use		Query present VTarget voltage.
+Notes		0x33 = 5.1V , 0x34 = 5.2V , 0x32 = 5.0V
+
+** ARefRead
+Command		0x41 0x85 0x20
+Response	0x14 0x33 0x10
+Use		Query present ARef voltage.
+Notes		Same count/V relationship as VTargetRead
+
+** POscRead
+Command		0x41 0x86 0x20
+Response	0x14 0x01 0x10
+Use		Query present P parameter.
+Notes
+
+** NOscRead
+Command		0x41 0x87 0x20
+Response	0x14 0x00 0x10
+Use		Query present N parameter.
+Notes
+
+** SDOscRead
+Command		0x41 0x89 0x20
+Response	0x14 0x01 0x10
+Use		Query present SD parameter.
+Notes
+
+** DeviceParam
+Command		0x42 (20 device specific bytes) 0x20
+Response	0x14 0x10
+Use		Tell programmer how to program device, i.e data polling byte
+		returns.
+Notes		See table for more details
+
+** MagicNumber
+Command		0x45 0x03 0x00 0xD7 0xA0 0x20
+Response	0x14 0x10
+Use		Ask Atmel.  Sent before entering programming mode.
+Notes		This may well be a code checksum, software version requested
+		first.
+
+
+STK500 PROGRAMMING COMMANDS
+---------------------------
+
+** EnterPgmMode
+Command		0x50 0x20
+Response	0x14 0x10
+Use		Enter programming mode, nRESET = low.
+Notes
+
+** LeavePgmMode
+Command		0x51 0x20
+Response	0x14 0x10
+Use		Leave programming mode, nRESET = high.
+Notes
+
+** EraseDevice
+Command		0x52 0x20
+Response	0x14 0x10
+Use		Erase device.
+Notes
+
+** SetAddress
+Command		0x55 AddrL AddrH 0x20
+Response	0x14 0x10
+Use		Set address for read/write operation
+Notes		Word address FLASH, Byte address EEPROM
+
+** UniversalCmd
+Command		0x56 0xAC 0xFD 0x00 0xFF 0x20
+Response	0x14 0x00 0x10
+Use		Sending lock and fuse bits.
+Notes		Could probably be used for byte by byte programming of devices.
+		The 0x00 returned is read from byte 4 SPI return value, i.e. if
+		read program memory SPI command sent then this is the byte
+		returned.
+
+** WriteMemory
+Command		0x64 LenH LenL 0x46 DataBytes 0x20
+Response	0x14 0x10
+Use		Programming FLASH/EEPROM/PageBuffer
+Notes		Change 0x46 ("F") to 0x45 ("E") for EEPROM. Length in bytes.
+		Written in 0x0100 chunks for 8515
+
+
+** ReadMemory
+Command		0x74 LenH LenL 0x46 0x20
+Response	0x14 DataBytes 0x10
+Use		Reading FLASH/EEPROM
+Notes		Change 0x46 ("F") to 0x45 ("E") for EEPROM. Length in bytes.
+		Read in 0x0100 chunks for 8515.
+
+** GetSignature
+Command		0x75 0x20
+Response	0x14 0x1E 0x93 0x01 0x10
+Use		Requesting device signature bytes
+Notes		Response shown for 8515
+
+** ReadOscCal
+Command		0x76 0x20
+Response	0x14 0x42 0x10
+Use		Read current oscillator calibration value
+Notes		Varies between devices, 0x42 in an ATmega163L-4PI 0035
+
+
+
+COMMAND SEQUENCES
+-----------------
+
+Startup:
+?STK500 , BoardID , HWver , SWmajor , SWminor
+
+ReadSignature:
+?STK500 , DeviceParam , SWminor , SWmajor, MagicNumber , EnterPgmMode ,
+GetSignature , LeavePgmMode
+
+WriteLockBits:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+UniversalCmd , LeavePgmMode
+
+WriteMemory:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+EraseDevice , SetAddress 0x0000 , PgmBlockMode n bytes , SetAddress 0x0000 ,
+ReadBlockMode n bytes , LeavePgmMode
+
+ReadMemory:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+SetAddress 0x0000 , ReadBlockMode n bytes , LeavePgmMode
+
+Normally memory is programmed or read in 0x0100 byte chunks, obviously if a
+program doesn't align to an 0x0100 length then there will be a < 0x0100 chunk
+at the end.
+
+
+Writing mega163.  Set address to 0x0000, write 0x0100 bytes, set address to
+0x0080, write 0x0100 bytes etc...  STK500 must auto detect end of page boundry
+and write current page to address specified in last setaddress cmd.
+
+
+Set device paramters and programming mode command for STK500
+
+8515
+42 60 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 02 00 00 00 20 00 20
+
+4414
+42 50 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 01 00 00 00 10 00 20
+
+2313
+42 40 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 00 80 00 00 08 00 20
+
+1200
+42 33 00 00 01 01 00 01 01 ff ff 00 ff 00 00 00 40 00 00 04 00 20
+
+2323
+42 41 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+2343
+42 43 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+2233
+42 42 00 00 01 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+4433
+42 51 00 00 01 01 00 01 01 ff ff 00 ff 00 00 01 00 00 00 10 00 20
+
+4434
+42 52 00 00 01 01 00 01 01 ff ff 00 ff 00 00 01 00 00 00 10 00 20
+
+8535
+42 61 00 00 01 01 00 01 01 ff ff 00 ff 00 00 02 00 00 00 20 00 20
+
+tiny11
+42 11 00 00 00 00 00 01 01 00 00 00 00 00 00 00 00 00 00 04 00 20
+
+tiny12
+42 12 00 00 00 01 01 01 01 ff ff ff ff 00 00 00 40 00 00 04 00 20
+
+tiny15
+42 13 00 00 00 01 01 01 01 ff ff ff ff 00 00 00 40 00 00 04 00 20
+
+tiny22
+42 20 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+tiny28
+42 22 00 00 01 00 01 01 01 00 00 00 00 00 00 00 00 00 00 08 00 20
+
+mega32
+42 90 00 00 01 01 01 01 02 ff ff ff ff 00 80 04 00 00 00 80 00 20
+
+mega161
+42 80 00 00 01 01 01 01 01 ff ff ff ff 00 80 02 00 00 00 40 00 20
+
+mega163
+42 81 00 00 01 01 01 01 02 ff ff ff ff 00 80 02 00 00 00 40 00 20
+
+mega103
+42 b1 00 00 01 00 00 01 01 00 00 00 00 01 00 10 00 00 02 00 00 20
+
+mega128
+42 b2 00 00 01 01 01 01 03 ff ff ff ff 01 00 10 00 00 02 00 00 20
diff --git a/tools/platforms/mica/uisp/doc/README.xilinx b/tools/platforms/mica/uisp/doc/README.xilinx
new file mode 100644
index 00000000..80ae6ea4
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/README.xilinx
@@ -0,0 +1,12 @@
+I've made a quick hack to support Xilinx HW-JTAG-PC cable.
+Connection is as follows:
+
+TCK --> SCK
+TDO --> MISO
+TDI --> MOSI
+TMS --> RESET#
+
+--
+Tetsuya Okada  
+Computer Creators, Inc.
+
diff --git a/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt b/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt
new file mode 100644
index 00000000..32d2e8b7
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt
@@ -0,0 +1,21 @@
+
+
+          Connect AVR with parallel port
+        AVR                       Parallel Port
+   Signal name   Pin             Pin  Signal name
+   GND           20 ------------ 19   GND
+   GND           20 ------------ 21   GND
+   SCK            8 ------------  1   Strobe
+   MOSI           6 ------------  2   Data 0
+   MISO           7 ------------ 11   Busy
+   Reset          9 ------------ 16   Init
+
+This scheme works with all parallel port modes (EPP,ECP, classic).
+
+Copyright (C) 1998 by Alexey Lapshin and Sergey Larin.
+
+This scheme can be modifyed as described in send_byte.s
+
+Note: The ATmega128 (maybe other megas too) uses PDI and PDO for spi
+programming instead of MISO and MOSI. You will need to modify the
+connections accordingly.
diff --git a/tools/platforms/mica/uisp/install-giveio b/tools/platforms/mica/uisp/install-giveio
new file mode 100755
index 00000000..bc127199
--- /dev/null
+++ b/tools/platforms/mica/uisp/install-giveio
@@ -0,0 +1,10 @@
+#!/bin/sh
+#
+# This is called by the InstallScript Wizard. The Wizard
+# determines, sets, and exports the value of $TOSROOT before
+# this is called.
+# 
+
+cd $TOSDIR/../tools/platforms/mica/uisp/kernel/win32
+$TOSDIR/../tools/platforms/mica/uisp/kernel/win32/giveio-install --install
+
diff --git a/tools/platforms/mica/uisp/kernel/.cvsignore b/tools/platforms/mica/uisp/kernel/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/mica/uisp/kernel/Makefile.am b/tools/platforms/mica/uisp/kernel/Makefile.am
new file mode 100644
index 00000000..43823a3f
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS=foreign
+
+SUBDIRS = win32
diff --git a/tools/platforms/mica/uisp/kernel/stargate/Makefile b/tools/platforms/mica/uisp/kernel/stargate/Makefile
new file mode 100644
index 00000000..a87c8e50
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/Makefile
@@ -0,0 +1,22 @@
+# Comment/uncomment the following line to enable/disable debugging
+#DEBUG = y
+
+# This Makefile has been simplified as much as possible, by putting all
+# generic material, independent of this specific directory, into
+# ../Rules.make. Read that file for details
+
+KERNELDIR = /home/pbuonado/Projects/stargate-linux/linux-2.4.19-star5
+
+CFLAGS = -v -O2
+CFLAGS += -I. -I$(KERNELDIR)/include
+CFLAGS += -DEXPORT_SYMTAB
+
+CC=arm-linux-gcc
+
+all: stargate_ssp.o
+
+stargate_ssp.o: stargate_ssp.c
+	$(CC) $(CFLAGS) -c $< -o $@
+
+clean:
+	rm -f *.o *~ core
diff --git a/tools/platforms/mica/uisp/kernel/stargate/README b/tools/platforms/mica/uisp/kernel/stargate/README
new file mode 100644
index 00000000..bc601669
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/README
@@ -0,0 +1,20 @@
+Stargate SSP driver 
+
+INSTALLATION
+
+This directory should contain a precompiled version of the Stargate
+SSP driver (stargate_ssp.o) for STARGATE Version 5 (linux 
+version 2.4.19-rmk7-pxa1). If not, see the instructions on COMPILING
+below. 
+To install the driver, copy 'stargate_ssp.o' and 'ssp_load.sh' to a
+directory on your Stargate platform. Execute 'ssp_load.sh' to install
+the driver.  NOTE: As of this version, you will need to run this
+script each time you reboot the stargate to reload the driver.
+
+COMPILING
+
+Edit the 'KERNELDIR' variable in 'Makefile' to point to your Stargate
+kernel tree.  Then execute 'make'.  
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh b/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh
new file mode 100755
index 00000000..bdd37e8a
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh
@@ -0,0 +1,18 @@
+#!/bin/sh
+module="stargate_ssp"
+device="ssp"
+
+# invoke insmod with all arguments we got
+# and use a pathname, as newer modutils don't look in . by default
+/sbin/insmod -f ./stargate_ssp.o $* || exit 1
+
+rm -f /dev/${device}[0-7]
+mknod /dev/${device} c $major 0
+
+chmod 644 /dev/${device}
+
+
+
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c
new file mode 100644
index 00000000..c0a07fd1
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c
@@ -0,0 +1,324 @@
+/*
+ * sg_ssp.c -- Stargate SSP Driver for mote programming
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+
+ * Portions Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet
+ * Copyright (C) 2001 O'Reilly & Associates
+ *
+ * The source code in this file can be freely used, adapted,
+ * and redistributed in source or binary form, so long as an
+ * acknowledgment appears in derived source files.  The citation
+ * should list that the code comes from the book "Linux Device
+ * Drivers" by Alessandro Rubini and Jonathan Corbet, published
+ * by O'Reilly & Associates.   No warranty is attached;
+ * we cannot take responsibility for errors or fitness for use.
+ *
+ * $Id$
+ */
+
+#ifndef __KERNEL__
+#  define __KERNEL__
+#endif
+#ifndef MODULE
+#  define MODULE
+#endif
+
+#include 
+
+#ifdef CONFIG_MODVERSIONS
+#define MODVERSIONS
+#include 
+#endif
+
+#include  /* printk() */
+#include 
+#include 
+
+#include      /* everything... */
+#include   /* error codes */
+#include   /* udelay */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define SG_SSP_PHYSBASE (__PREG(SSCR0))
+#define SG_SSP_SIZE	(5*4) /* 5 Registers, 4 Bytes each */
+
+#define SG_GPIOCNTL_PHYSBASE (__PREG(GPLR0))
+#define SG_GPIOCNTL_SIZE (27*4) /* 27 Registers, 4 Bytes each */
+
+#define SSPS_TNF		(1 << 2)
+#define SSPS_RNE		(1 << 3)
+#define SSPS_BSY		(1 << 4)
+#define SSPS_TFS		(1 << 5)
+#define SSPS_RFS		(1 << 6)
+#define SSPS_ROR		(1 << 7)
+
+#define SSPC_SSE		(1 << 7)
+/*
+ * all of the parameters have no "sg_ssp_" prefix, to save typing when
+ * specifying them at load time
+ */
+static int major = 0; /* dynamic by default */
+MODULE_PARM(major, "i");
+
+/* Since sg_ssp_base is vremapped in case use_mem==1, remember the phys addr. */
+unsigned long sg_ssp_vbase;
+
+MODULE_AUTHOR ("Phil Buonadonna");
+MODULE_DESCRIPTION ("Stargate SSP Driver v 0.91");
+/*
+ * The devices with low minor numbers write/read burst of data to/from
+ * specific I/O ports (by default the parallel ones).
+ * 
+ * The device with 128 as minor number returns ascii strings telling
+ * when interrupts have been received. Writing to the device toggles
+ * 00/FF on the parallel data lines. If there is a loopback wire, this
+ * generates interrupts.  
+ */
+
+int sg_ssp_open (struct inode *inode, struct file *filp)
+{
+  MOD_INC_USE_COUNT;
+
+
+  GPCR(22) = GPIO_bit(22); // MUX -> Programming mode
+  
+  SSCR0 = ((10 << 8) | SSPC_SSE | 7);  /* SRC=3, SSE, DSS = 8-bit data */
+  
+  /* Put attached mote into reset */
+  GPCR(77) = GPIO_bit(77); // RSTN -> 0
+  
+  return 0;
+}
+
+
+int sg_ssp_release (struct inode *inode, struct file *filp)
+{
+  SSCR0 = 0;
+
+  GPSR(22) = GPIO_bit(22); // MUX -> Serial Comm mode
+
+  /* Clear the reset */
+  GPSR(77) = GPIO_bit(77); // RSTN -> 1
+
+  MOD_DEC_USE_COUNT;
+  return 0;
+}
+
+
+ssize_t sg_ssp_read(struct file *filp, char *buf, size_t count, loff_t *f_pos)
+{
+  int retval = count, lcnt = count;
+  unsigned char *kbuf=kmalloc(count, GFP_KERNEL), *ptr;
+  unsigned int value;
+
+  if (!kbuf) {
+    return -ENOMEM;
+  }
+
+  ptr = kbuf;
+
+  while (lcnt > 0) {
+    while (!(SSSR & SSPS_RNE)) {
+      cpu_relax();
+    }
+    value = SSDR;
+    *(ptr++) = value;
+    //printk(KERN_INFO "sg_ssp: read 0x%lx from ssp\n",value);
+    lcnt--;
+  }
+
+  if ( (retval > 0) && copy_to_user(buf, kbuf, retval))
+    retval = -EFAULT;
+  kfree(kbuf);
+
+  return retval;
+}
+
+ssize_t sg_ssp_write(struct file *filp, const char *buf, size_t count,
+		     loff_t *f_pos)
+{
+  int retval = count, lcnt = count;
+  unsigned char *kbuf=kmalloc((count+1), GFP_KERNEL), *ptr;
+  unsigned int value;
+
+  if (!kbuf) {
+    return -ENOMEM;
+  }
+  if (copy_from_user(kbuf, buf, count)) {
+    return -EFAULT;
+  }
+  ptr = kbuf;
+
+  while (lcnt > 0) {
+    while (!(SSSR & SSPS_TNF)) {
+      cpu_relax();
+    }
+    value = *(ptr++);
+    SSDR = value;
+    //printk(KERN_INFO "sg_ssp: wrote 0x%lx to ssp\n",value);
+    lcnt--;
+  }
+  kfree(kbuf);
+  return retval;
+
+}
+
+
+
+unsigned int sg_ssp_poll(struct file *filp, poll_table *wait)
+{
+  return POLLIN | POLLRDNORM | POLLOUT | POLLWRNORM;
+}
+
+
+struct file_operations sg_ssp_fops = {
+  read: sg_ssp_read,
+  write: sg_ssp_write,
+  poll: sg_ssp_poll,
+  open: sg_ssp_open,
+  release: sg_ssp_release,
+};
+
+
+void sg_ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+
+  unsigned int status = SSSR;
+
+  if (status & SSPS_ROR) {
+    printk(KERN_WARNING "sg_ssp: receiver overrun 0x%lx",status);
+    SSSR = SSPS_ROR;
+  }
+
+}
+
+
+
+/* Two wrappers, to use non-page-aligned ioremap() on 2.0 */
+
+/* Remap a not (necessarily) aligned port region */
+void *sg_ssp_remap(unsigned long phys_addr, unsigned long phys_size)
+{
+  /* The code comes mainly from arch/any/mm/ioremap.c */
+  unsigned long offset, last_addr, size;
+
+  last_addr = phys_addr + phys_size - 1;
+  offset = phys_addr & ~PAGE_MASK;
+    
+    /* Adjust the begin and end to remap a full page */
+  phys_addr &= PAGE_MASK;
+  size = PAGE_ALIGN(last_addr) - phys_addr;
+  return ioremap(phys_addr, size) + offset;
+}
+
+/* Unmap a region obtained with sg_ssp_remap */
+void sg_ssp_unmap(void *virt_add)
+{
+  iounmap((void *)((unsigned long)virt_add & PAGE_MASK));
+}
+
+/* Finally, init and cleanup */
+
+int sg_ssp_init(void)
+{
+  int result;
+  
+  /* Set up owner pointers.*/
+  SET_MODULE_OWNER(&sg_ssp_fops);
+  
+  /* Get our needed resources. */
+  result = check_mem_region(SG_SSP_PHYSBASE, SG_SSP_SIZE);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get I/O mem address 0x%lx\n",
+	   SG_SSP_PHYSBASE);
+    return result;
+  }
+  request_mem_region(SG_SSP_PHYSBASE, SG_SSP_SIZE, "SSP");
+  
+  result = check_mem_region(SG_GPIOCNTL_PHYSBASE, SG_GPIOCNTL_SIZE);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get GPIO I/O mem address 0x%lx\n",
+	   SG_GPIOCNTL_PHYSBASE);
+    return result;
+  }
+  request_mem_region(SG_GPIOCNTL_PHYSBASE, SG_GPIOCNTL_SIZE, "SSPGPIO");
+
+  /* also, ioremap it */
+  sg_ssp_vbase = (unsigned long)sg_ssp_remap(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+  /* Hmm... we should check the return value */
+  
+  result = register_chrdev(major, "ssp", &sg_ssp_fops);
+  if (result < 0) {
+    printk(KERN_INFO "sg_ssp: can't get major number\n");
+    sg_ssp_unmap((void *)sg_ssp_vbase);
+    release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+    return result;
+  }
+  if (major == 0) major = result; /* dynamic */
+  
+  result = request_irq(IRQ_SSP, sg_ssp_interrupt,
+		       SA_INTERRUPT, "ssp", NULL);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get assigned irq %i\n",
+	   IRQ_SSP);
+    sg_ssp_unmap((void *)sg_ssp_vbase);
+    release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+    return result;
+  }
+
+  SSSR = SSPS_ROR;
+  SSCR1 = 0;
+
+  // Enable the SSP alternate functions
+  set_GPIO_mode(GPIO23_SCLK_md);
+  set_GPIO_mode(GPIO25_STXD_MD); // Enable the SSP TX/RX lines
+  set_GPIO_mode(GPIO26_SRXD_MD);
+
+  set_GPIO_mode((GPIO27_SEXTCLK | GPIO_IN));    // Avoid driving the RED LED
+  set_GPIO_mode((22 | GPIO_OUT));		// MUX Selector
+  set_GPIO_mode((77 | GPIO_OUT));		// RSTN 
+
+  /* Set the state of the reset pin */
+  GPSR(77) = GPIO_bit(77);  // RSTN -> 1
+ 
+  return 0;
+}
+
+void sg_ssp_cleanup(void)
+{
+
+  free_irq(IRQ_SSP,NULL);
+  unregister_chrdev(major, "ssp");
+  sg_ssp_unmap((void *)sg_ssp_vbase);
+  release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+  release_mem_region(SG_GPIOCNTL_PHYSBASE,SG_GPIOCNTL_SIZE);
+}
+
+module_init(sg_ssp_init);
+module_exit(sg_ssp_cleanup);
+
+
+
+
+
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.o b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.o
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tH(6mHkao8b;lG~
+#include 
+#include 
+#include 
+using namespace std;
+
+int help()
+{
+    cout << "usage: giveio-install [option]" << endl;
+    cout << "    [option] is one of the following:" << endl;
+    cout << "        --install    Installs GiveIO driver" << endl;
+    cout << "        --uninstall  Uninstalls GiveIO driver" << endl;
+    cout << "        --help       Prints this help message" << endl;
+    return 1;
+}
+
+int error(const char* msg)
+{
+    cout << "giveio-install: " << msg << endl;
+    return 0;
+}
+
+class auto_sc_handle {
+public:
+    auto_sc_handle(SC_HANDLE h_arg) : h(h_arg) { }
+    ~auto_sc_handle() { CloseServiceHandle(h); }
+
+    operator SC_HANDLE() { return h; }
+private:
+    SC_HANDLE h;
+};
+
+bool is_installed(SC_HANDLE scmh)
+{
+    bool result = false;
+    size_t ess_size = sizeof(ENUM_SERVICE_STATUS) + 256 + 256;
+    ENUM_SERVICE_STATUS* essp =
+	reinterpret_cast(new char[ess_size]);
+    DWORD bytes_needed = 0;
+    DWORD services_returned = 0;
+    DWORD resume_handle = 0;
+    do {
+	BOOL success =
+	    EnumServicesStatus(scmh,
+			       SERVICE_DRIVER/* | SERVICE_WIN32*/,
+			       SERVICE_STATE_ALL,
+			       essp,
+			       ess_size,
+			       &bytes_needed,
+			       &services_returned,
+			       &resume_handle);
+	if (success == FALSE && GetLastError() != ERROR_MORE_DATA)
+	    break;
+	
+	for (DWORD i = 0; i < services_returned; i++) {
+	    // cout << essp[i].lpServiceName << endl;
+	    if (strcasecmp(essp[i].lpServiceName, "GiveIO") == 0
+		|| strcasecmp(essp[i].lpDisplayName, "GiveIO") == 0) {
+		result = true;
+		break;
+	    }
+		
+	}
+    } while (bytes_needed != 0 && ! result);
+    delete[] essp;
+    return result;
+}
+
+int install()
+{
+    // Taking out the input from stdin -- eases installation and if
+    // the user chooses N, TOS won't work right. 
+    // -lkw 1/25/2002
+    //cout << "giveio-install:" << endl;
+    //cout << "You are about to install the GiveIO driver" << endl;
+    //cout << "on your computer!  This driver can give applications" << endl;
+    //cout << "direct access to I/O, circumventing" << endl;
+    //cout << "Windows NT/Windows 2000 prohibitions." << endl << endl;
+    //cout << "Do you want to continue?  (Y/N) ";
+    char c;
+    //cin >> c;
+    //cout << endl;
+    //if (c != 'y' && c != 'Y')
+	//return error("Installation aborted");
+
+    auto_sc_handle scmh = OpenSCManager(0, 0, GENERIC_WRITE | GENERIC_READ);
+    if (! scmh)
+	return error("Could not connect to the Service Control Manager");
+
+    if (is_installed(scmh))
+	return error("Driver already installed");
+
+    bool copy_failed = false;
+    string WINDIR = getenv("WINDIR");
+    if (WINDIR.empty()) {
+	copy_failed = true;
+	cout << "giveio-install: warning: "
+	     << "WINDIR environment variable is not defined." << endl;
+    } else {
+	replace(WINDIR.begin(), WINDIR.end(), '\\', '/');
+	const string cp =
+	    "cp giveio.sys " + WINDIR + "/system32/drivers/giveio.sys";
+	cout << cp << endl;
+	if (system(cp.c_str()) != 0) {
+	    copy_failed = true;
+	    cout << "giveio-install: warning: "
+		 << "Copy failed." << endl;
+	}
+    }
+    if (copy_failed)
+	cout << "giveio-install: warning: "
+	     << "Please copy giveio.sys to the "
+	     << "$WINDIR/system32/drivers directory." << endl;
+
+    auto_sc_handle csh =
+	CreateService(scmh,
+		      "GiveIO",
+		      "GiveIO Port Access",
+		      SERVICE_ALL_ACCESS,
+		      SERVICE_KERNEL_DRIVER,
+		      SERVICE_AUTO_START,
+		      SERVICE_ERROR_NORMAL,
+		      "system32\\drivers\\giveio.sys",
+		      0,
+		      0,
+		      0,
+		      0,
+		      0);
+    if (csh == 0)
+      return error("Could not create service");
+    BOOL result = StartService(csh,0,NULL);
+    if (!result)
+      return error("Could not start service");
+    return 0;
+}
+
+int uninstall()
+{
+  SERVICE_STATUS status;
+    auto_sc_handle scmh = OpenSCManager(0, 0, GENERIC_WRITE | GENERIC_READ);
+    if (! scmh)
+	return error("Could not connect to the Service Control Manager");
+
+    if (! is_installed(scmh))
+	return error("Driver has not been installed");
+    auto_sc_handle csh =
+	OpenService(scmh,
+		    "GiveIO",
+		    SERVICE_ALL_ACCESS);
+    if (!csh)
+	return error("Could not access GiveIO driver");
+    BOOL result = ControlService(csh,
+				 SERVICE_CONTROL_STOP,
+				 &status);
+    if (!result) {
+      cout << "giveio-install: warning:"
+	   << "The GiveIO service could not be stopped. "
+	   << "Uninstall will complete when the system restarts." << endl;
+    }
+    DeleteService(csh);
+    return 0;
+}
+
+int main(int argc, char* argv[])
+{
+    enum actions {
+	a_install,
+	a_uninstall,
+	a_help
+    } action = a_install;
+
+    for (int i = 1; i < argc; i++) {
+	if (strcmp(argv[i], "--install") == 0)
+	    action = a_install;
+	else if (strcmp(argv[i], "--uninstall") == 0)
+	    action = a_uninstall;
+	else if (strcmp(argv[i], "--help") == 0)
+	    action = a_help;
+	else
+	    action = a_help;
+    }
+    switch (action) {
+    case a_help:
+	return help();
+    case a_install:
+	return install();
+    case a_uninstall:
+	return uninstall();
+    }
+    return 0;
+}
diff --git a/tools/platforms/mica/uisp/kernel/win32/giveio.sys b/tools/platforms/mica/uisp/kernel/win32/giveio.sys
new file mode 100755
index 0000000000000000000000000000000000000000..62a0cb66ffda02c19a6db878b32f5b4342131258
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diff --git a/tools/platforms/mica/uisp/src/.cvsignore b/tools/platforms/mica/uisp/src/.cvsignore
new file mode 100644
index 00000000..36540130
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/.cvsignore
@@ -0,0 +1,10 @@
+Makefile
+Makefile.in
+config-h.in
+stamp-h1
+uisp
+uisp.exe
+.deps
+config.h
+stamp-h
+stamp-h.in
diff --git a/tools/platforms/mica/uisp/src/Avr.C b/tools/platforms/mica/uisp/src/Avr.C
new file mode 100644
index 00000000..55f5e4a3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Avr.C
@@ -0,0 +1,373 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Avr.C
+	
+	Top class of the AVR micro controllers 
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+#include "Avr.h"
+#include "Error.h"
+
+#define TARGET_MISSING 0xff
+#define DEVICE_LOCKED  0x1
+
+/* ATMEL AVR codes */
+TAvr::TPart TAvr::parts [] = {
+  /* device         sig. bytes   flash page EEPROM twdFL twdEE  flags */
+  { "AT90S1200",    0x90, 0x01,   1024,   0,   64,  4000, 4000, AVR_1200 },
+
+  { "ATtiny12",     0x90, 0x05,   1024,   0,   64,  1700, 3400, AVR_TN12 },
+  { "ATtiny15",     0x90, 0x06,   1024,   0,   64,  2000, 4000, AVR_TN15 },
+#if 0
+  /* 12V serial programming only; here just for the evidence */
+  /* ATtiny10 = QuickFlash(TM) OTP */
+  { "ATtiny10",     0x90, 0x03,   1024,   0,    0,  8000,    0, 0 },
+  { "ATtiny11",     0x90, 0x04,   1024,   0,    0,  8000,    0, 0 },
+#endif
+
+  { "AT90S2313",    0x91, 0x01,   2048,   0,  128,  4000, 4000, AVR_2313 },
+  { "AT90S2343",    0x91, 0x03,   2048,   0,  128,  4000, 4000, AVR_8535 },
+  { "AT90S2323",    0x91, 0x02,   2048,   0,  128,  4000, 4000, AVR_8535 },
+
+  /* no longer in production?  2333 -> 4433, tiny22 -> 2343? */
+  { "AT90S2333",    0x91, 0x05,   2048,   0,  128,  4000, 4000, AVR_4433 },
+  { "ATtiny22",     0x91, 0x06,   2048,   0,  128,  4000, 4000, AVR_TN22 },
+
+  { "ATtiny26",     0x91, 0x09,   2048,  32,  128,  4500, 9000, AVR_TN26 },
+
+#if 0
+  /* 12V parallel programming only; here just for the evidence */
+  { "ATtiny28",     0x91, 0x07,   2048,   0,    0,  8000,    0, 0 },
+#endif
+
+  { "AT90S4433",    0x92, 0x03,   4096,   0,  256,  4000, 4000, AVR_4433 },
+
+  /* no longer in production? -> use 8515, 8535 instead */
+  { "AT90S4414",    0x92, 0x01,   4096,   0,  256,  4000, 4000, AVR_2313 },
+  { "AT90S4434",    0x92, 0x02,   4096,   0,  256,  4000, 4000, AVR_8535 },
+
+  { "AT90S8515",    0x93, 0x01,   8192,   0,  512,  4000, 4000, AVR_2313 },
+  { "AT90S8535",    0x93, 0x03,   8192,   0,  512,  4000, 4000, AVR_8535 },
+
+#if 0
+  /* aka AT90S8555 - probably doesn't exist, use ATmega8535 */
+  { "ATmega83",     0x93, 0x05,   8192, 128,  512, 11000, 4000, AVR_M163 },
+#endif
+
+  { "ATmega8515",   0x93, 0x06,   8192,  64,  512,  4500, 9000, AVR_M163 },
+  { "ATmega8",      0x93, 0x07,   8192,  64,  512,  4500, 9000, AVR_M163 },
+  { "ATmega8535",   0x93, 0x08,   8192,  64,  512,  4500, 9000, AVR_M163 },
+
+#if 0
+  /* 12V parallel programming only; here just for the evidence */
+  { "AT90C8534",    0x93, 0x04,   8192,   0,  512,  8000, 4000, 0 }, 
+#endif
+
+  { "ATmega161",    0x94, 0x01,  16384, 128,  512, 11000, 4000, AVR_M161 },
+  { "ATmega163",    0x94, 0x02,  16384, 128,  512, 15000, 3800, AVR_M163 },
+  { "ATmega16",     0x94, 0x03,  16384, 128,  512,  4500, 9000, AVR_M163 },
+  { "ATmega162",    0x94, 0x04,  16384, 128,  512,  4500, 9000, AVR_M128 },
+  { "ATmega169",    0x94, 0x05,  16384, 128,  512,  4500, 9000, AVR_M128 },
+
+  { "ATmega323",    0x95, 0x01,  32768, 128, 1024, 15000, 3800, AVR_M163 },
+  { "ATmega32",     0x95, 0x02,  32768, 128, 1024,  4500, 9000, AVR_M163 },
+
+  { "ATmega64",     0x96, 0x02,  65536, 256, 2048,  4500, 9000, AVR_M128 },
+
+  { "ATmega103",    0x97, 0x01, 131072, 256, 4096, 22000, 4000, AVR_M103 },
+  { "ATmega128",    0x97, 0x02, 131072, 256, 4096,  4500, 9000, AVR_M128 },
+
+  { "ATmega103-old",0x01, 0x01, 131072, 256, 4096, 22000, 4000, AVR_M103 },
+
+#if 0
+  { "ATmega603",    0x96, 0x01,  65536, 256, 2048, 22000, 4000, AVR_M103 },
+  { "ATmega603-old",0x06, 0x01,  65536, 256, 2048, 22000, 4000, AVR_M103 },
+#endif
+
+#if 0 /* not yet */
+  { "AT89S52",      0x52, 0x06,   8192,   0,    0,  1000,    0, AT89S52 },
+#endif
+
+  { "",          TARGET_MISSING, 0,  0,   0,    0,     0,    0, 0 },
+  { "locked",    DEVICE_LOCKED,  0,  0,   0,    0,     0,    0, 0 },
+  { "",          0x0,            0,  0,   0,    0,     0,    0, 0 }
+};
+
+const char* TAvr::segment_names[] = {"flash", "eeprom", "fuse", NULL};
+
+
+/* Private Functions
+*/
+
+TAddr TAvr::GetWritePageSize(){
+  if (device_locked){return 0;}
+  assert(part!=NULL);
+  return part->flash_page_size;
+}
+
+/* Protected Functions
+*/
+
+void TAvr::OverridePart(const char *part_name)
+{
+  int i;
+
+  for (i = 0; parts[i].name[0]; i++) {
+    if (strcasecmp(parts[i].name, part_name) == 0)
+      break;
+  }
+  if (parts[i].name[0]) {
+    if (vendor_code != 0x1e
+	|| part_family != parts[i].part_family
+	|| part_number != parts[i].part_number) {
+      vendor_code = 0x1e;
+      part_family = parts[i].part_family;
+      part_number = parts[i].part_number;
+
+      Info(3, "Override signature bytes, device %s assumed.\n",
+	   parts[i].name);
+    }
+  } else
+    throw Error_Device("Unknown device specified", part_name);
+}
+
+void TAvr::Identify()
+{
+  const char* vendor = "Device";
+
+  Info(3, "Vendor Code: 0x%02x\nPart Family: 0x%02x\nPart Number: 0x%02x\n",
+    vendor_code, part_family, part_number);  
+
+  /* Identify AVR Part according to the vendor_code ... */
+  if (vendor_code==0x1e){vendor = "Atmel AVR";}
+  
+  if (vendor_code==0 && part_family==DEVICE_LOCKED && part_number==0x02){
+    device_locked=true;
+    Info(0, "Cannot identify device because it is locked.\n");
+    /* XXX hack to avoid "invalid parameter" errors if device is locked */
+    GetCmdParam("-dt_wd_eeprom");
+    GetCmdParam("-dt_wd_flash");
+    GetCmdParam("-dvoltage");
+#if 0
+    return;
+#endif
+  } else{device_locked=false;}
+  if (part_family==TARGET_MISSING){
+    Info(0, "An error has occurred during the AVR initialization.\n"
+	    " * Target status:\n"
+	    "   Vendor Code = 0x%02x, Part Family = 0x%02x, Part Number = 0x%02x\n\n",
+	    vendor_code, part_family, part_number);
+    throw 
+      Error_Device("Probably the wiring is incorrect or target"
+        " might be `damaged'.");
+  }
+  int i,n;
+  for(i=0; parts[i].part_family != 0x0; i++){
+    if (part_family == parts[i].part_family){
+      for (n=i; parts[n].part_family==part_family; n++){
+        if (part_number == parts[n].part_number){i=n; break;}
+      }
+      if (i==n){Info(1, "%s %s is found.\n", vendor, parts[i].name);}
+      else{Info(1, "%s similar to the %s is found.\n", vendor, parts[i].name);}
+      part = &parts[i];
+      break;
+    }
+  }
+  if (parts[i].part_family == 0x0) {
+    throw Error_Device ("Probably the AVR MCU is not in the RESET state.\n"
+			"Check it out and run me again.");}
+
+  if (!GetCmdParam("--download", false))
+    SetWriteTimings();
+}
+
+/* This looks like a good approximation to make the device table simpler
+   (only specify the 5V timings).  */
+
+#define CALC_FLASH_T_wd(voltage) ((long) \
+  ((part ? part->t_wd_flash_50 : 22000) * (5.0 * 5.0) / (voltage * voltage)))
+#define CALC_EEPROM_T_wd(voltage) ((long) \
+  ((part ? part->t_wd_eeprom_50 : 4000) * (5.0 * 5.0) / (voltage * voltage)))
+
+void TAvr::SetWriteTimings(){
+  const char* val;
+
+  page_size = GetWritePageSize();
+  if (page_size)
+    Info(3, "Page Write Enabled, size=%d\n", (int) page_size);
+  else
+    Info(3, "Page Write Disabled\n");
+
+  /* defaults */
+  t_wd_flash = CALC_FLASH_T_wd(AVR_DEFAULT_VOLTAGE);
+  t_wd_eeprom = CALC_EEPROM_T_wd(AVR_DEFAULT_VOLTAGE);  
+    
+  /* set FLASH write delay */  
+  if ((val=GetCmdParam("-dt_wd_flash"))){
+    t_wd_flash = atol(val);
+    Info(0, "t_wd_flash = %ld\n", t_wd_flash);
+    if (t_wd_flash < CALC_FLASH_T_wd(AVR_MAX_VOLTAGE)){
+      Info(0, " * According to the Atmel specs the t_wd_flash\n"
+              "   should be at least %ld us\n", 
+	      CALC_FLASH_T_wd(AVR_MAX_VOLTAGE));
+#if 0
+      throw Error_Device("-dt_wd_flash: Value out of range.");
+#endif
+    }
+  }
+  
+  /* set EEPROM write delay */  
+  if ((val=GetCmdParam("-dt_wd_eeprom"))){
+    t_wd_eeprom = atol(val);
+    if (t_wd_eeprom < CALC_EEPROM_T_wd(AVR_MAX_VOLTAGE)){
+      Info(0, " * According to the Atmel specs the t_wd_eeprom\n"
+              "   should be at least %ld us\n", 
+	      CALC_EEPROM_T_wd(AVR_MAX_VOLTAGE));
+#if 0
+      throw Error_Device("-dt_wd_eeprom: Value out of range.");
+#endif
+    }
+  }
+
+  /* Set Timings according to the Power Supply Voltage */
+  if ((val=GetCmdParam("-dvoltage"))){
+    double voltage = atof(val);
+    if (voltage < AVR_MIN_VOLTAGE || voltage > AVR_MAX_VOLTAGE){
+      Info(0, " * Atmel AVR MCUs operate in range from %.1f to %.1f V\n",
+           AVR_MIN_VOLTAGE, AVR_MAX_VOLTAGE);
+	   
+      throw Error_Device("-dvoltage: Value out of range.");
+    }
+    
+    t_wd_flash = CALC_FLASH_T_wd(voltage);
+    t_wd_eeprom = CALC_EEPROM_T_wd(voltage);
+  }
+  
+  Info(3, "FLASH Write Delay (t_wd_flash): %ld us\n"
+          "EEPROM Write Delay (t_wd_eeprom): %ld us\n",
+	  t_wd_flash, t_wd_eeprom);
+}
+
+const char* TAvr::GetPartName(){
+  return part->name;
+}
+
+TAddr
+TAvr::GetSegmentSize()
+{
+  switch (segment) {
+  case SEG_FLASH: return part->flash_size;
+  case SEG_EEPROM: return part->eeprom_size;
+  case SEG_FUSE: return 5;
+  }
+  throw Error_MemoryRange();
+}
+
+bool
+TAvr::TestFeatures(unsigned int mask)
+{
+  return ((part->flags & mask) == mask);
+}
+
+void TAvr::CheckMemoryRange(TAddr addr){
+  if (device_locked){
+    Info(0, "Device is locked.\n");
+    throw Error_MemoryRange();
+  }
+  if (addr >= GetSegmentSize()) {
+    throw Error_MemoryRange();
+  }
+}
+
+long TAvr::Get_t_wd_flash() const {
+  return t_wd_flash;
+}
+
+long TAvr::Get_t_wd_eeprom() const {
+  return t_wd_eeprom;
+}
+
+long TAvr::Get_t_wd_erase() const{
+#if 0
+  return 3*t_wd_flash;	/* right factor is 2, but just in case */
+#else
+  /* Device might be locked and not possible to identify, assume 200ms
+     which should be long enough for any device, and is not that long
+     compared to the program time itself.  */
+  return 200000;
+#endif
+}
+
+/* Device Interface Functions
+*/
+
+bool TAvr::SetSegment(const char* segment_name){
+  for (int i=0; segment_names[i]!=NULL; i++){
+    if (strcmp(segment_names[i], segment_name)==0){
+      segment=i; 
+      return true;
+    }
+  }
+  return false;
+}
+
+const char* TAvr::TellActiveSegment(){
+  return segment_names[segment];
+}
+
+const char* TAvr::ListSegment(unsigned index){
+  if (index>3){return NULL;}
+  return segment_names[index];
+}
+
+const char* TAvr::ReadByteDescription(TAddr addr){
+  static const char* no_desc = "No description available.";
+  CheckMemoryRange(addr);
+  return no_desc;
+}
+
+/* Constructor/Destructor
+*/
+
+TAvr::TAvr():
+  part(NULL), 
+  page_size(0), page_addr_fetched(false),
+  page_poll_byte(0xFF),
+  segment(SEG_FLASH){
+}
+
+TAvr::~TAvr(){
+}
diff --git a/tools/platforms/mica/uisp/src/Avr.h b/tools/platforms/mica/uisp/src/Avr.h
new file mode 100644
index 00000000..d96c590b
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Avr.h
@@ -0,0 +1,205 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Avr.h
+	
+	Top class of the AVR micro controllers 
+	Uros Platise (c) 1999
+*/
+
+#ifndef __AVR
+#define __AVR
+
+#include "Global.h"
+
+/* Virtual Addresses for fuse and lock bytes. These are used to map a
+   read/write of a byte in the fuse segment to the underlying operation. The
+   real address may be different, but should be hidden in the more specific
+   code. */
+
+enum {
+    AVR_FUSE_LOW_ADDR   = 0,
+    AVR_FUSE_HIGH_ADDR  = 1,
+    AVR_CAL_ADDR        = 2,
+    AVR_LOCK_ADDR       = 3,
+    AVR_FUSE_EXT_ADDR   = 4,
+};
+
+/* Define the lock bits */
+enum {
+    LB1   = 0x01,
+    LB2   = 0x02,
+    BLB01 = 0x04,
+    BLB02 = 0x08,
+    BLB11 = 0x10,
+    BLB12 = 0x20,
+};
+
+/* Flags for device features: */
+
+/* Old command (LB1=b7, LB2=b6) for Read Lock and Fuse Bits.  */
+#define AVR_LOCK_RD76	0x0001
+
+/* New command (LB1=b1, LB2=b2) for Read Lock Bits.  */
+#define AVR_LOCK_RD12	0x0002
+
+/* Read/Write Boot Lock Bits (BLB12,11,02,01,LB2,LB1=b5...b0).  */
+#define AVR_LOCK_BOOT	0x0004
+
+/* Read Fuse Bits (0x50) command supported.  */
+#define AVR_FUSE_RD	0x0008
+
+/* Old command (bits 0-4 of byte 2) for Write Fuse Bits.  */
+#define AVR_FUSE_OLDWR	0x0010
+
+/* New command (all bits of byte 4) for Write Fuse (Low) Bits.  */
+#define AVR_FUSE_NEWWR	0x0020
+
+/* Read/Write Fuse High Bits.  */
+#define AVR_FUSE_HIGH 	0x0040
+
+/* Read Calibration Byte.  */
+#define AVR_CAL_RD	0x0080
+
+/* Data Polling supported for Flash page write.  */
+#define AVR_PAGE_POLL	0x0100
+
+/* Data Polling supported for byte write (XXX not on AT90S1200?).  */
+#define AVR_BYTE_POLL	0x0200
+
+/* Has 3 bytes of fuse bits (ATmega128).  */
+#define AVR_FUSE_EXT	0x0400
+
+/* Sets of the above flags ORed for different classes of devices.  */
+
+#define AVR_1200 0  /* XXX no polling */
+#define AVR_2313 (AVR_BYTE_POLL)
+#define AVR_TN22 (AVR_BYTE_POLL | AVR_LOCK_RD76)
+#define AVR_8535 (AVR_BYTE_POLL | AVR_LOCK_RD76 | AVR_FUSE_OLDWR)
+#define AVR_4433 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_OLDWR)
+#define AVR_M103 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_OLDWR)
+#define AVR_TN12 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_NEWWR \
+		  | AVR_CAL_RD)
+#define AVR_TN15 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_NEWWR \
+		  | AVR_CAL_RD)
+#define AVR_M161 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR)
+#define AVR_M163 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH)
+#define AVR_M128 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH | AVR_FUSE_EXT)
+
+/* XXX no boot lock bits, but ordinary lock bits are in bits 1 and 0.
+   XXX has 4 calibration bytes for 1/2/4/8 MHz, can only read one for now.  */
+#define AVR_TN26 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH)
+
+#define AVR_MIN_VOLTAGE		2.7	/* V */
+#define AVR_MAX_VOLTAGE		6.0	/* V */
+#define AVR_DEFAULT_VOLTAGE	3.0	/* V */
+
+class TAvr: public TDevice{
+private:
+  /* AVR Family Device (Part) List */
+  struct TPart {
+    char* name;
+    TByte part_family;
+    TByte part_number;
+    TAddr flash_size;
+    TAddr flash_page_size;
+    TAddr eeprom_size;
+    long t_wd_flash_50;    	/* flash programming delay at 5.0 V */
+    long t_wd_eeprom_50;
+    unsigned int flags;
+  };  
+  
+  TPart* part;
+  bool device_locked;   
+  long t_wd_flash;
+  long t_wd_eeprom;
+
+protected:
+  enum TSegment{SEG_FLASH=0, SEG_EEPROM=1, SEG_FUSE=2};
+  
+  /* ATmega page programming */  
+  TAddr page_size;
+  TAddr page_addr_fetched;	/* Becomes true when first byte is written */
+  TAddr page_addr;		/* Fetched Page Address */
+  /* Page Write Polling */
+  TAddr page_poll_addr;  /* address of the last non-0xFF byte written */
+  TByte page_poll_byte;  /* value of the last non-0xFF byte written */
+  
+  /* Variables and Functions */
+private:
+  static TPart parts[];
+  TAddr GetWritePageSize();
+  void SetWriteTimings();
+
+protected:  
+  int segment;
+  static const char* segment_names[];
+  
+  /* AVR Signs/Info */
+  TByte vendor_code;
+  TByte part_family;
+  TByte part_number;
+  
+  void Identify();
+  void OverridePart(const char *);
+  const char* GetPartName();  
+  TAddr GetSegmentSize();
+  bool TestFeatures(unsigned int mask);
+  void CheckMemoryRange(TAddr addr);  
+  long Get_t_wd_flash() const;
+  long Get_t_wd_eeprom() const;    
+  long Get_t_wd_erase() const;
+
+public:
+  /* Set active segment. 
+     Returns true if segment exists, otherwise false 
+  */
+  bool SetSegment(const char* segment_name);
+  
+    /* Returns char pointer of current active segment name.
+  */
+  const char* TellActiveSegment();
+  
+  /* Returns char pointer of the indexed segment name.
+     Index is in range [0,no_of_segments].
+     When index is out of range NULL is returned.
+  */
+  const char* ListSegment(unsigned index);
+
+  /* Read byte description at address addr (as security bits) */
+  const char* ReadByteDescription(TAddr addr);
+  
+  TAvr();
+  ~TAvr();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrAtmel.C b/tools/platforms/mica/uisp/src/AvrAtmel.C
new file mode 100644
index 00000000..9695d691
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrAtmel.C
@@ -0,0 +1,615 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	AvrAtmel.C
+	
+	Device driver for the Serial Atmel Low Cost Programmer
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "AvrAtmel.h"
+
+#define AUTO_SELECT	0
+
+/* Low Cost Atmel Programmer AVR Codes
+   Valid for software version: SW_MAJOR=2 SW_MINOR=0
+   
+   Code 0xff is reserved for invalid code. Update the
+   TAvrAtmel constructor if Atmel comes up with it.
+
+   The list is current as of AVRProg 1.37 (shipped with AVR Studio 3.54).
+*/
+TAvrAtmel::SPrgPart TAvrAtmel::prg_part [] = {
+  {"S1200A", 0x10, "AT90S1200 rev. A", false}, /* old */
+  {"S1200B", 0x11, "AT90S1200 rev. B", false}, /* old */
+  {"S1200C", 0x12, "AT90S1200 rev. C", false}, /* old */
+  {"S1200",  0x13, "AT90S1200", false},
+  {"S2313",  0x20, "AT90S2313", false},
+  {"S4414",  0x28, "AT90S4414", false},
+  {"S4433",  0x30, "AT90S4433", false},
+  {"S2333",  0x34, "AT90S2333", false},
+  {"S8515",  0x38, "AT90S8515", false},
+  {"M8515",  0x3A, "ATmega8515", false},
+  {"M8515b", 0x3B, "ATmega8515 BOOT", false},
+  {"M103C",  0x40, "ATmega103 rev. C", false}, /* old */
+  {"M103",   0x41, "ATmega103", false},
+  {"M603",   0x42, "ATmega603", false},
+  {"M128",   0x43, "ATmega128", false},
+  {"M128b",  0x44, "ATmega128 BOOT", false},
+  {"S2323",  0x48, "AT90S2323", false},
+  {"S2343",  0x4C, "AT90S2343", false}, /* ATtiny22 too */
+  {"TN11",   0x50, "ATtiny11",  false}, /* parallel */
+  {"TN10",   0x51, "ATtiny10",  false}, /* parallel */
+  {"TN12",   0x55, "ATtiny12",  false},
+  {"TN15",   0x56, "ATtiny15",  false},
+  {"TN19",   0x58, "ATtiny19",  false}, /* parallel */
+  {"TN28",   0x5C, "ATtiny28",  false}, /* parallel */
+  {"TN26",   0x5E, "ATtiny26",  false},
+  {"M161",   0x60, "ATmega161", false},
+  {"M161b",  0x61, "ATmega161 BOOT", false},
+  {"M163",   0x64, "ATmega163", false},
+  {"M83",    0x65, "ATmega83",  false}, /* ATmega8535 ??? */
+  {"M163b",  0x66, "ATmega163 BOOT", false},
+  {"M83b",   0x67, "ATmega83 BOOT", false},
+  {"S8535",  0x68, "AT90S8535", false},
+  {"S4434",  0x6C, "AT90S4434", false},
+  {"C8534",  0x70, "AT90C8534", false}, /* parallel */
+  {"C8544",  0x71, "AT90C8544", false}, /* parallel ??? */
+  {"M32",    0x72, "ATmega32",  false}, /* XXX no ATmega323 */
+  {"M32b",   0x73, "ATmega32 BOOT", false},
+  {"M16",    0x74, "ATmega16",  false},
+  {"M16b",   0x75, "ATmega16 BOOT", false},
+  {"M8",     0x76, "ATmega8",   false},
+  {"M8b",    0x77, "ATmega8 BOOT", false},
+  {"89C1051",0x80, "AT89C1051", false}, /* parallel */
+  {"89C2051",0x81, "AT89C2051", false}, /* parallel */
+  {"89C51",  0x82, "AT89C51",   false}, /* parallel */
+  {"89LV51", 0x83, "AT89LV51",  false}, /* parallel */
+  {"89C52",  0x84, "AT89C52",   false}, /* parallel */
+  {"89LV52", 0x85, "AT89LV52",  false}, /* parallel */
+  {"S8252",  0x86, "AT89S8252", false},
+  {"89S53",  0x87, "AT89S53",   false},
+  /* 0x88..0xDF reserved for AT89,
+     0xE0..0xFF reserved */
+  {"auto",   AUTO_SELECT, "Auto detect", false},  
+  {"",       0x00, "", false}
+};
+
+/* Private Functions
+*/
+
+void TAvrAtmel::EnterProgrammingMode(){
+  /* Select Device Type */
+  TByte set_device[2] = {'T', desired_avrcode};
+  Send(set_device, 2, 1);
+  CheckResponse(set_device[0]);
+
+  /* Enter Programming Mode */
+  TByte enter_prg[1] = {'P'};
+  Send(enter_prg, 1);
+  CheckResponse(enter_prg[0]);
+
+  /* Read Signature Bytes */
+  TByte sig_bytes[3] = {'s', 0, 0};
+  Send(sig_bytes, 1, 3);
+  part_number = sig_bytes[0];
+  part_family = sig_bytes[1];
+  vendor_code = sig_bytes[2];
+}
+
+void TAvrAtmel::LeaveProgrammingMode(){
+  TByte leave_prg [1] = { 'L' };
+  Send(leave_prg, 1);    
+}
+
+void TAvrAtmel::CheckResponse(TByte x){
+  if (x!=13){throw Error_Device ("Device is not responding correctly.");}
+}
+
+void TAvrAtmel::EnableAvr(){
+  bool auto_select = desired_avrcode == AUTO_SELECT;
+  
+  for (unsigned pidx=0; prg_part[pidx].code != AUTO_SELECT; pidx++){
+  
+    if (!prg_part[pidx].supported && auto_select){continue;}
+    if (auto_select){
+      desired_avrcode = prg_part[pidx].code;
+      Info(2, "Trying with: %s\n", prg_part[pidx].description);
+    }    
+    EnterProgrammingMode();
+    if (!auto_select ||
+        !(vendor_code==0 && part_family==1 && part_number==2)){
+      break;
+    }
+    LeaveProgrammingMode();    
+  }
+
+ // OverridePart("atmega163"); // XXXXX local hack for broken signature bytes
+  
+  Identify();
+  
+  if (auto_select){
+    /* If avr was recongnized by the Identify(), try to find better match
+       in the support list.
+    */    
+    unsigned better_pidx = 0;
+    TByte better_avrcode = desired_avrcode;
+    
+    for (unsigned pidx=0; prg_part[pidx].code != AUTO_SELECT; pidx++){
+      if (!prg_part[pidx].supported){continue;}      
+      if (strstr(prg_part[pidx].description, GetPartName())){
+        better_avrcode = prg_part[better_pidx = pidx].code;
+      }
+    }
+    if (better_avrcode != desired_avrcode){
+      Info(2, "Retrying with better match: %s\n", 
+        prg_part[better_pidx].description);
+      desired_avrcode = better_avrcode;
+      LeaveProgrammingMode();
+      EnterProgrammingMode();
+      Identify();
+    }
+  }
+}
+
+void TAvrAtmel::SetAddress(TAddr addr){
+  apc_address = addr;
+  TByte setAddr [3] = { 'A', (addr>>8)&0xff, addr&0xff};
+  Send(setAddr, 3, 1);
+  CheckResponse(setAddr [0]);
+}
+
+void TAvrAtmel::WriteProgramMemoryPage(){
+  SetAddress(page_addr >> 1);
+  TByte prg_page [1] = { 'm' };
+  Send(prg_page, 1);    
+}
+
+/* Device Interface Functions
+*/
+
+TByte TAvrAtmel::ReadByte(TAddr addr){
+  CheckMemoryRange(addr);
+  if (segment==SEG_FLASH){
+    TAddr saddr = addr>>1;
+    TByte rdF [2] = { 'R', 0 };
+    
+    if (buf_addr==addr && cache_lowbyte==true){return buf_lowbyte;}
+    if (apc_address!=saddr || apc_autoinc==false) SetAddress(saddr);    
+    apc_address++;
+    Send(rdF, 1, 2);
+    /* cache low byte */
+    cache_lowbyte = true;
+    buf_addr = (saddr<<1) + 1;
+    buf_lowbyte = rdF[0];
+    return rdF [1 - (addr&1)];
+  }
+  else if (segment==SEG_EEPROM){    
+    SetAddress(addr);
+    TByte readEE [1] = { 'd' };    
+    Send(readEE, 1);
+    return readEE[0];
+  }
+  else if (segment==SEG_FUSE) {
+    TByte readback = 0xff;
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+        readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+        readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+        readback = ReadFuseHighBits();
+      else
+        Info (1, "Cannot read high fuse bits on this device. Returning 0xff\n");
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+        readback = ReadCalByte(0);
+      else
+        Info (1, "Cannot read calibration byte on this device. Returning 0xff\n");
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+        readback = ReadFuseExtBits();
+      else
+        Info (1, "Cannot read extended fuse bits on this device. Returning 0xff\n");
+      break;
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+             (int) addr, (int) readback);
+    return readback;
+  }
+  else return 0;
+}
+
+void TAvrAtmel::WriteByte(TAddr addr, TByte byte, bool flush_buffer){
+  CheckMemoryRange(addr);
+  
+  /* do not check if byte is already written -- it spoils auto-increment
+     feature which reduces the speed for 50%!
+  */     
+  if (segment==SEG_FLASH){
+  
+    cache_lowbyte = false;		/* clear read cache buffer */  
+    if (!page_size && byte==0xff) return;
+  
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */  
+    if (page_size){
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+	addr, page_addr_fetched?"Yes":"No");
+
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+	WriteProgramMemoryPage();
+	page_addr_fetched = false;
+      }
+      if (page_addr_fetched==false){
+	page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+    
+    TByte wrF [2] = { (addr&1)?'C':'c', byte };
+    
+    if (apc_address!=(addr>>1) || apc_autoinc==false) SetAddress (addr>>1);
+    if (wrF[0]=='C') apc_address++;
+    Send(wrF, 2, 1);
+    CheckResponse(wrF[0]);
+  }
+  else if (segment==SEG_EEPROM){
+    SetAddress(addr);
+    TByte writeEE [2] = { 'D', byte };
+    Send(writeEE, 2, 1);
+    CheckResponse(writeEE[0]);
+  }  
+  else if (segment==SEG_FUSE){
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      else
+        Info (1, "Cannot write high fuse bits on this device");
+      break;
+    /* calibration byte (addr == 2) is read only */
+    case AVR_CAL_ADDR:
+      Info (1, "Cannot write calibration byte. It is read-only.\n");
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+  }
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void TAvrAtmel::WriteOldFuseBits (TByte val)
+{
+  TByte buf[5] = {'.', 0xac, (val & 0x1f) | 0xa0, 0x00, 0xd2 };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void TAvrAtmel::WriteFuseLowBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa0, 0x00, val };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ */
+void TAvrAtmel::WriteFuseHighBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa8, 0x00, val };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void TAvrAtmel::WriteFuseExtBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa4, 0x00, val };
+  Info (2, "Write fuse extended bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+
+void TAvrAtmel::FlushWriteBuffer(){
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+/* Chip erase can take a few seconds when talking to a boot loader,
+   which does it one page at a time.  */
+
+#ifndef CHIP_ERASE_TIMEOUT
+#define CHIP_ERASE_TIMEOUT 5
+#endif
+
+void TAvrAtmel::ChipErase(){
+  TByte eraseTarget [1] = { 'e' };
+  Send (eraseTarget, 1, -1, CHIP_ERASE_TIMEOUT);
+  CheckResponse(eraseTarget [0]);
+  Info(1, "Erasing device ...\nReinitializing device\n");
+  EnableAvr();
+}
+
+void TAvrAtmel::WriteLockBits(TByte bits){
+  TByte lockTarget [2] = { 'l', 0xF9 | ((bits << 1) & 0x06) };
+  Send (lockTarget, 2, 1);
+  CheckResponse(lockTarget [0]);
+  Info(1, "Writing lock bits ...\nReinitializing device\n");
+  EnableAvr();
+}
+
+TByte TAvrAtmel::ReadFuseLowBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x50, 0x00, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read fuse low bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadFuseHighBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x58, 0x08, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read fuse high bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadCalByte(TByte addr)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x38, 0x00, addr, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read calibration byte: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadFuseExtBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x50, 0x08, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  return buf[0];
+  Info (2, "Read extended fuse bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadLockFuseBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x58, 0x00, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read lock bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+// ReadLockBits tries to return the lock bits in a uniform order, despite
+// the differences in different AVR versions.  The goal is to get the lock 
+// bits into this order:
+//       x x BLB12 BLB11 BLB02 BLB01 LB2 LB1
+// For devices that don't support a boot block, the BLB bits will be 1.
+TByte
+TAvrAtmel::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else {
+    // if its signature returns 0,1,2 then say it's locked.
+    /* Read Signature Bytes */
+    TByte sig_bytes[3] = {'s', 0, 0};
+    Send(sig_bytes, 1, 3);
+    if (sig_bytes[0]==0 && sig_bytes[1]==1 && sig_bytes[2]==2)
+      rbits = 0xFC;
+    else
+      throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  }
+  return rbits;
+}
+
+
+/* Constructor/Destructor
+*/
+
+TAvrAtmel::TAvrAtmel():
+  cache_lowbyte(false), apc_address(0x10000), apc_autoinc(false)
+  {
+
+  /* Select Part by Number or Name */
+  desired_avrcode=0xff;
+  const char* desired_partname = GetCmdParam("-dpart");
+  bool got_device=false;
+  
+  if (desired_partname!=NULL) {
+    if (desired_partname[0] >= '0' && desired_partname[0] <= '9'){
+      desired_avrcode = strtol(&desired_partname[0],(char**)NULL,16); 
+    } else{
+      int j;
+      for (j=0; prg_part[j].name[0] != 0; j++){
+        if ((strcasecmp (desired_partname, prg_part[j].name)==0) ||
+            (strcasecmp (desired_partname, prg_part[j].description)==0))
+        {
+	  desired_avrcode = prg_part[j].code;
+	  break;
+	}
+      }
+      if (prg_part[j].name[0]==0){throw Error_Device("-dpart: Invalid name.");}
+    }
+  }
+  
+  /* check: software version and supported part codes */
+  TByte sw_version [2] = {'V', 0};
+  TByte hw_version [2] = {'v', 0};
+  Send(sw_version, 1, 2);
+  Send(hw_version, 1, 2);
+  Info(1, "Programmer Information:\n"
+          "  Software Version: %c.%c, Hardware Version: %c.%c\n", 
+	  sw_version [0], sw_version [1],
+	  hw_version [0], hw_version [1]);
+  
+  /* Detect Auto-Increment */
+  if (sw_version[0]>='2'){
+    apc_autoinc=true;
+    Info(2, "Address Auto Increment Optimization Enabled\n");
+  }
+  
+  /* Retrieve supported codes */
+  TByte sup_codes[1] = {'t'};
+  Tx(sup_codes, 1);
+  TByte buf_code;
+  timeval timeout = {1, 0};
+  if (desired_partname==NULL){
+    Info(1, "  Supported Parts:\n\tNo\tAbbreviation\tDescription\n");
+  }
+  do{
+    Rx(&buf_code, 1, &timeout);
+    if (buf_code==0){break;}    
+    if (desired_partname!=NULL){ 
+      if (buf_code==desired_avrcode){got_device=true;}
+      if (desired_avrcode!=AUTO_SELECT) continue; 
+    }
+    int j;
+    for (j=0; prg_part[j].name[0] != 0; j++){
+      if (prg_part[j].code == buf_code){
+        prg_part[j].supported = true;
+	if (desired_avrcode!=AUTO_SELECT){
+	  Info(1, "\t%.2x\t%s\t\t%s\n", 
+	    buf_code, prg_part[j].name, prg_part[j].description);
+	}
+	break;
+      }
+    }
+    if (prg_part[j].code == 0) {
+      Info(1, "    - %.2xh (not on the uisp's list yet)\n", buf_code);
+    }
+  } while (1);  
+  Info(1, "\n");
+  
+  if (got_device==false) {
+    if (desired_partname==NULL){
+      throw Error_Device("Select a part from the list with the: -dpart\n"
+        "or use the -dpart=auto option for auto-select.\n");
+    } 
+    else if (desired_avrcode!=AUTO_SELECT){
+      throw Error_Device("Programmer does not supported chosen device.");
+    }
+  }
+  
+  EnableAvr();
+}
+
+TAvrAtmel::~TAvrAtmel(){
+  /* leave programming mode! Due to this 
+     procedure, enableAvr had to be taken out
+     of TAtmelAvr::TAtmelAvr func. */
+  LeaveProgrammingMode();
+}
diff --git a/tools/platforms/mica/uisp/src/AvrAtmel.h b/tools/platforms/mica/uisp/src/AvrAtmel.h
new file mode 100644
index 00000000..bd366587
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrAtmel.h
@@ -0,0 +1,94 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* AvrAtmel.h, Uros Platise (c) 1999 */
+
+#ifndef __AVR_ATMEL
+#define __AVR_ATMEL
+
+#include "Global.h"
+#include "Serial.h"
+#include "Avr.h"
+
+class TAvrAtmel: public TAvr, TSerial {
+private:
+  /* Programmer AVR codes */
+  struct SPrgPart{
+    const char* name;
+    TByte code;
+    const char* description;
+    bool supported;
+  };
+  static SPrgPart prg_part[];
+  TByte desired_avrcode;
+
+  /* Flash word's lower byte cache */
+  bool cache_lowbyte;
+  TByte buf_lowbyte;
+  TAddr buf_addr;
+  
+  /* Speed-up Transfer by using the Auto-Increment Option */
+  TAddr apc_address;	/* AVR Programmer's Current Address */
+  bool apc_autoinc;	/* Auto Increment Supported by AVR ISP SoftVer 2 */
+
+private:
+  void EnterProgrammingMode();
+  void LeaveProgrammingMode();
+  void CheckResponse(TByte x);
+  void EnableAvr();
+  void SetAddress(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadFuseLowBits ();
+  TByte ReadFuseHighBits ();
+  TByte ReadCalByte(TByte addr);
+  TByte ReadFuseExtBits ();
+  TByte ReadLockFuseBits ();
+  TByte ReadLockBits ();
+  void WriteOldFuseBits (TByte val);
+  void WriteFuseLowBits (TByte val);
+  void WriteFuseHighBits (TByte val);
+  void WriteFuseExtBits (TByte val);
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+  
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Write lock bits */
+  void WriteLockBits(TByte bits);
+  
+  TAvrAtmel();
+  ~TAvrAtmel();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrDummy.C b/tools/platforms/mica/uisp/src/AvrDummy.C
new file mode 100644
index 00000000..8a7fc1a2
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrDummy.C
@@ -0,0 +1,606 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	AvrDummy.C
+	
+	Dummy device driver for the AVR parallel access
+	Uros Platise (c) 1999
+*/
+
+#ifndef NO_DAPA
+
+#include "config.h"
+
+#include "timeradd.h"
+#include "AvrDummy.h"
+
+/* Private Functions
+*/
+
+void TAvrDummy::EnableAvr(){
+  unsigned char prg  [4] = { 0xAC, 0x53, 0, 0 };
+  int try_number = 32;
+  bool no_retry = GetCmdParam("-dno-retry", false);
+  const char *part_name = GetCmdParam("-dpart");
+
+  if (part_name && strcasecmp(part_name, "at90s1200") == 0)
+    no_retry = true;  /* XXX */
+
+  /* Enable AVR programming mode */
+  do{
+    prg[0]=0xAC; prg[1]=0x53; prg[2]=prg[3]=0;
+    Send(prg, 4);
+    if (no_retry) break;
+    if (prg[2] == 0x53) break;
+    PulseSck();
+  } while (try_number--);
+  
+  if (try_number>=0){
+    Info(2,"AVR Direct Parallel Access succeeded after %d retries.\n", 
+      32-try_number);
+  } else {
+    Info(2,"AVR Direct Parallel Access failed after 32 retries.\n");
+  }
+  
+  /* Get AVR Info */
+  vendor_code = GetPartInfo(0);
+  part_family = GetPartInfo(1);
+  part_number = GetPartInfo(2);
+
+  if (part_name)
+    OverridePart(part_name);
+
+  Identify();
+}
+
+TByte
+TAvrDummy::GetPartInfo(TAddr addr)
+{
+  TByte info [4] = { 0x30, 0, addr, 0 };
+  Send(info, 4);
+  return info[3];
+}
+
+void
+TAvrDummy::WriteProgramMemoryPage()
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+
+  bool poll_data = use_data_polling && TestFeatures(AVR_PAGE_POLL)
+		   && (page_poll_byte != 0xFF);
+
+  TByte prg_page [4] = { 0x4C,
+			(TByte)((page_addr >> 9) & 0xff),
+			(TByte)((page_addr >> 1) & 0xff),
+			0 };
+
+  gettimeofday(&t_start_wr, NULL);
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = Get_t_wd_flash();
+
+  Info(4, "Programming page address: %d (%.2x, %.2x, %.2x, %.2x)\n", 
+    page_addr, prg_page[0], prg_page[1], prg_page[2], prg_page[3]);
+  Send(prg_page, 4);
+
+  gettimeofday(&t_start_poll, NULL);
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  /* Wait */
+  do {
+    gettimeofday(&t_end, NULL);
+    if (poll_data) {
+      TByte rbyte = ReadByte(page_poll_addr);
+      if (rbyte == page_poll_byte)
+	break;
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  page_addr_fetched=false;
+  page_poll_byte = 0xFF;
+}
+
+
+/* Device Interface Functions
+*/
+
+TByte
+TAvrDummy::ReadByte(TAddr addr)
+{
+  TByte readback = 0xFF;
+    
+  CheckMemoryRange(addr);
+  if (segment == SEG_FLASH) {
+    TByte hl = (addr & 1) ? 0x28 : 0x20;
+    TByte flash[4] = { hl,
+		       (TByte)((addr >> 9) & 0xff),
+		       (TByte)((addr >> 1) & 0xff),
+			 0 };
+    Send(flash, 4);
+    readback = flash[3];
+  } else if (segment == SEG_EEPROM) {
+    TByte eeprom [4] = { 0xA0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff), 
+			 0 };
+    Send(eeprom, 4);
+    readback = eeprom[3];
+  } else if (segment==SEG_FUSE) {
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+	readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+	readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	readback = ReadFuseHighBits();
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+	readback = ReadCalByte(0);
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	readback = ReadFuseExtBits();
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) readback);
+  }
+  return readback;
+}
+
+/*
+ Read Lock/Fuse Bits:           7     6     5     4     3     2     1     0
+ 2333,4433,m103,m603,tn12,tn15: x     x     x     x     x     LB2   LB1   x
+ 2323,8535:                     LB1   LB2   SPIEN x     x     x     x     FSTRT
+ 2343:                          LB1   LB2   SPIEN x     x     x     x     RCEN
+ tn22:                          LB1   LB2   SPIEN x     x     x     x     0
+ m161,m163,m323,m128:           x     x     BLB12 BLB11 BLB02 BLB01 LB2   LB1
+ tn26:                          x     x     x     x     x     x     LB2   LB1
+ */
+TByte
+TAvrDummy::ReadLockFuseBits()
+{
+  TByte lockfuse[4] = { 0x58, 0, 0, 0 };
+  Send(lockfuse, 4);
+  return lockfuse[3];
+}
+
+/*
+ Read Fuse Bits (Low):          7     6     5     4     3     2     1     0
+ 2333,4433:                     x     x     SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     SPIEN x     EESAV 1     SUT1  SUT0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI x     x     CKSL1 CKSL0
+ m161:                          x     BTRST SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN x     x     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m32,m64,m128:           BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ */
+TByte
+TAvrDummy::ReadFuseLowBits()
+{
+  TByte fuselow[4] = { 0x50, 0, 0, 0 };
+  Send(fuselow, 4);
+  return fuselow[3];
+}
+
+/*
+ Read Fuse Bits High:           7     6     5     4     3     2     1     0
+ m163:                          x     x     x     x     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN x     x     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m32,m64,m128:              OCDEN JTGEN SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+TByte
+TAvrDummy::ReadFuseHighBits()
+{
+  TByte fusehigh[4] = { 0x58, 0x08, 0, 0 };
+  Send(fusehigh, 4);
+  return fusehigh[3];
+}
+
+/*
+ Read Extended Fuse Bits:       7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+TByte
+TAvrDummy::ReadFuseExtBits()
+{
+  TByte fuseext[4] = { 0x50, 0x08, 0, 0 };
+  Send(fuseext, 4);
+  return fuseext[3];
+}
+
+/* Read Calibration Byte (m163, m323, m128, tn12, tn15, tn26)
+   addr=0...3 for tn26, addr=0 for other devices */
+TByte
+TAvrDummy::ReadCalByte(TByte addr)
+{
+  TByte cal[4] = { 0x38, 0, addr, 0 };
+  Send(cal, 4);
+  return cal[3];
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void
+TAvrDummy::WriteOldFuseBits(TByte val)
+{
+  TByte oldfuse[4] = { 0xAC, (val & 0x1F) | 0xA0, 0, 0xD2 };
+  Send(oldfuse, 4);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void
+TAvrDummy::WriteFuseLowBits(TByte val)
+{
+  TByte fuselow[4] = { 0xAC, 0xA0, 0, val };
+  Send(fuselow, 4);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+void
+TAvrDummy::WriteFuseHighBits(TByte val)
+{
+  TByte fusehigh[4] = { 0xAC, 0xA8, 0, val };
+  Send(fusehigh, 4);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void
+TAvrDummy::WriteFuseExtBits(TByte val)
+{
+  TByte fuseext[4] = { 0xAC, 0xA4, 0, val };
+  Send(fuseext, 4);
+}
+
+
+void
+TAvrDummy::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+  TByte rbyte=0;
+  bool device_not_erased=false;
+  
+  /* Poll data if use_data_polling is enabled and if page mode
+     is enabled, flash is not selected */
+  bool poll_data = ((segment==SEG_FLASH && !page_size) || segment==SEG_EEPROM)
+		   && use_data_polling && TestFeatures(AVR_BYTE_POLL);
+
+  CheckMemoryRange(addr);
+  
+  /* For speed, don't program a byte that is already there
+     (such as 0xFF after chip erase).  */
+  if (poll_data){
+    rbyte=ReadByte(addr);
+    if (rbyte == byte){return;}
+    if (rbyte != 0xff){device_not_erased=true;}
+  }
+  
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = 500000;
+
+  gettimeofday(&t_start_wr, NULL);
+
+  if (segment==SEG_FLASH){
+      
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */
+    if (page_size) {
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+        addr, page_addr_fetched?"Yes":"No");
+	
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+        WriteProgramMemoryPage();	
+      }
+      if (page_addr_fetched==false){
+        page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+
+    TByte hl = (addr & 1) ? 0x48 : 0x40;
+    TByte flash [4] = { hl,
+			(TByte)((addr >> 9) & 0xff),
+			(TByte)((addr >> 1) & 0xff),
+			byte };
+    Send(flash, 4);
+
+    /* Remember the last non-0xFF byte written, for page write polling.  */
+    if (byte != 0xFF) {
+      page_poll_addr = addr;
+      page_poll_byte = byte;
+    }
+
+    /* We do not need to wait for each byte in page mode programming */
+    if (page_size){return;}    
+    t_wait.tv_usec = Get_t_wd_flash();
+  }
+  else if (segment==SEG_EEPROM){
+    TByte eeprom [4] = { 0xC0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff),
+			 byte };
+    Send(eeprom, 4);  
+    t_wait.tv_usec = Get_t_wd_eeprom();    
+  }
+  else if (segment==SEG_FUSE) {
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      break;
+    case AVR_CAL_ADDR:
+      /* calibration byte (addr == 2) is read only */
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+    t_wait.tv_usec = Get_t_wd_eeprom();
+  }
+
+  gettimeofday(&t_start_poll, NULL);
+  /* t_timeout = now + t_wd_prog */
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  do {
+    /* Data Polling: if the programmed value reads correctly, and
+       is not equal to any of the possible P1, P2 read back values,
+       it is done; else wait until tWD_PROG time has elapsed.
+       The busy loop here is to avoid rounding up the programming
+       wait time to 10ms timer ticks (for Linux/x86).  Programming
+       is not really "hard real time" but 10ms instead of ~4ms for
+       every byte makes it slow.  gettimeofday() reads the 8254
+       timer registers (or Pentium cycle counter if available),
+       so it has much better (microsecond) resolution.  
+    */
+    gettimeofday(&t_end, NULL);
+    if (poll_data){
+      if ((byte == (rbyte = ReadByte(addr))) &&
+          (byte != 0) && (byte != 0x7F) && (byte != 0x80) && (byte != 0xFF)){
+	break;
+      }
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+  
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  if (poll_data && byte != rbyte){
+    if (device_not_erased){
+      Info(0, "Warning: It seems that device is not erased.\n"
+              "         Erase it with the --erase option.\n");
+    }
+    Info(0, "Error: Data polling readback status: write=0x%02x read=0x%02x\n", 
+      byte, rbyte);
+    throw Error_Device("If device was erased disable polling with the "
+      "-dno-poll option.");
+  }
+}
+
+void
+TAvrDummy::FlushWriteBuffer()
+{
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+void
+TAvrDummy::ChipErase()
+{
+  TByte init[4] = { 0xAC, 0x53, 0x00, 0x00 };
+  TByte chip_erase [4] = { 0xAC, 0x80, 0x00, 0x00 };
+  Info(1, "Erasing device ...\n");
+  Send(init, 4);
+  Send(chip_erase, 4);
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(9000);
+  Delay_usec(9000);
+  PulseReset();
+  Delay_usec(9000);
+  Info(1, "Reinitializing device\n");  
+  EnableAvr();
+}
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void
+TAvrDummy::WriteLockBits(TByte bits)
+{
+  /* This handles both old (byte 2, bits 1-2)
+     and new (byte 4, bits 0-5) devices.  */
+  TByte lock[4] = { 0xAC, 0xF9 | ((bits << 1) & 0x06), 0xFF, bits };
+  TByte rbits;
+
+  Info(1, "Writing lock bits ...\n");
+  Send(lock, 4);
+  Delay_usec(Get_t_wd_erase());
+  PulseReset();
+  Info(1, "Reinitializing device\n");
+  EnableAvr();
+  rbits = ReadLockBits();
+  if (rbits & ~bits)
+    Info(0, "Warning: lock bits write=0x%02X read=0x%02X\n",
+	 (int) bits, (int) rbits);
+}
+
+TByte
+TAvrDummy::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else if (GetPartInfo(0) == 0 &&
+	     GetPartInfo(1) == 1 &&
+	     GetPartInfo(2) == 2) {
+    rbits = 0xFC;
+  } else throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  return rbits;
+}
+
+unsigned int
+TAvrDummy::GetPollCount()
+{
+  return total_poll_cnt;
+}
+
+float
+TAvrDummy::GetMinPollTime()
+{
+  return min_poll_time;
+}
+
+float
+TAvrDummy::GetMaxPollTime()
+{
+  return max_poll_time;
+}
+
+float
+TAvrDummy::GetTotPollTime()
+{
+  return total_poll_time;
+}
+
+void
+TAvrDummy::ResetMinMax()
+{
+  min_poll_time = 1.0;
+  max_poll_time = 0.0;
+  total_poll_time = 0.0;
+  total_poll_cnt = 0;
+}
+
+/* Constructor
+*/
+
+TAvrDummy::TAvrDummy():
+  use_data_polling(true)
+{
+  ResetMinMax();
+  
+  /* Device Command line options ... */ 
+  if (GetCmdParam("-dno-poll", false)){use_data_polling=false;} 
+  
+  EnableAvr();
+}
+
+#endif
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/AvrDummy.h b/tools/platforms/mica/uisp/src/AvrDummy.h
new file mode 100644
index 00000000..cb5de87d
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrDummy.h
@@ -0,0 +1,82 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* AvrDummy.h, Uros Platise (c) 1999 */
+
+#ifndef __AVR_DUMMY
+#define __AVR_DUMMY
+
+#include "Global.h"
+#include "Avr.h"
+#include "DAPA.h"
+
+class TAvrDummy: public TAvr, TDAPA {
+private:
+  bool use_data_polling;
+  float min_poll_time, max_poll_time, total_poll_time;
+  unsigned long total_poll_cnt;  /* bytes or pages */
+
+  void EnableAvr();
+  TByte GetPartInfo(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadLockFuseBits();
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+  TByte ReadCalByte(TByte addr);
+  void WriteOldFuseBits(TByte val);  /* 5 bits */
+  void WriteFuseLowBits(TByte val);
+  void WriteFuseHighBits(TByte val);
+  void WriteFuseExtBits(TByte val);
+
+  /* lock bits */
+  void WriteLockBits(TByte bits);
+  TByte ReadLockBits();
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Transfer Statistics */
+  unsigned int GetPollCount();
+  float GetMinPollTime();
+  float GetTotPollTime();
+  float GetMaxPollTime();
+  void ResetMinMax();
+  
+  TAvrDummy();
+  ~TAvrDummy(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrStargate.C b/tools/platforms/mica/uisp/src/AvrStargate.C
new file mode 100644
index 00000000..cc2f6057
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrStargate.C
@@ -0,0 +1,604 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ ****************************************************************************
+ */
+
+#include "config.h"
+
+#include "timeradd.h"
+#include "AvrStargate.h"
+
+/* Private Functions
+*/
+
+void TAvrStargate::EnableAvr(){
+  unsigned char prg  [4] = { 0xAC, 0x53, 0, 0 };
+  int try_number = 32;
+  bool no_retry = GetCmdParam("-dno-retry", false);
+  const char *part_name = GetCmdParam("-dpart");
+
+  if (part_name && strcasecmp(part_name, "at90s1200") == 0)
+    no_retry = true;  /* XXX */
+
+  /* Enable AVR programming mode */
+  do{
+    prg[0]=0xAC; prg[1]=0x53; prg[2]=prg[3]=0;
+    Send(prg, 4);
+    if (no_retry) break;
+    if (prg[2] == 0x53) break;
+    PulseSck();
+  } while (try_number--);
+  
+  if (try_number>=0){
+    Info(2,"AVR Stargate SSP Access succeeded after %d retries.\n", 
+      32-try_number);
+  } else {
+    Info(2,"AVR Stargate SSP Access failed after 32 retries.\n");
+  }
+  
+  /* Get AVR Info */
+  vendor_code = GetPartInfo(0);
+  part_family = GetPartInfo(1);
+  part_number = GetPartInfo(2);
+
+  if (part_name)
+    OverridePart(part_name);
+
+  Identify();
+}
+
+TByte
+TAvrStargate::GetPartInfo(TAddr addr)
+{
+  TByte info [4] = { 0x30, 0, addr, 0 };
+  Send(info, 4);
+  return info[3];
+}
+
+void
+TAvrStargate::WriteProgramMemoryPage()
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+
+  bool poll_data = use_data_polling && TestFeatures(AVR_PAGE_POLL)
+		   && (page_poll_byte != 0xFF);
+
+  TByte prg_page [4] = { 0x4C,
+			(TByte)((page_addr >> 9) & 0xff),
+			(TByte)((page_addr >> 1) & 0xff),
+			0 };
+
+  gettimeofday(&t_start_wr, NULL);
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = Get_t_wd_flash();
+
+  Info(4, "Programming page address: %d (%.2x, %.2x, %.2x, %.2x)\n", 
+    page_addr, prg_page[0], prg_page[1], prg_page[2], prg_page[3]);
+  Send(prg_page, 4);
+
+  gettimeofday(&t_start_poll, NULL);
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  /* Wait */
+  do {
+    gettimeofday(&t_end, NULL);
+    if (poll_data) {
+      TByte rbyte = ReadByte(page_poll_addr);
+      if (rbyte == page_poll_byte)
+	break;
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  page_addr_fetched=false;
+  page_poll_byte = 0xFF;
+}
+
+
+/* Device Interface Functions
+*/
+
+TByte
+TAvrStargate::ReadByte(TAddr addr)
+{
+  TByte readback = 0xFF;
+    
+  CheckMemoryRange(addr);
+  if (segment == SEG_FLASH) {
+    TByte hl = (addr & 1) ? 0x28 : 0x20;
+    TByte flash[4] = { hl,
+		       (TByte)((addr >> 9) & 0xff),
+		       (TByte)((addr >> 1) & 0xff),
+			 0 };
+    Send(flash, 4);
+    readback = flash[3];
+  } else if (segment == SEG_EEPROM) {
+    TByte eeprom [4] = { 0xA0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff), 
+			 0 };
+    Send(eeprom, 4);
+    readback = eeprom[3];
+  } else if (segment==SEG_FUSE) {
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+	readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+	readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	readback = ReadFuseHighBits();
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+	readback = ReadCalByte(0);
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	readback = ReadFuseExtBits();
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) readback);
+  }
+  return readback;
+}
+
+/*
+ Read Lock/Fuse Bits:           7     6     5     4     3     2     1     0
+ 2333,4433,m103,m603,tn12,tn15: x     x     x     x     x     LB2   LB1   x
+ 2323,8535:                     LB1   LB2   SPIEN x     x     x     x     FSTRT
+ 2343:                          LB1   LB2   SPIEN x     x     x     x     RCEN
+ tn22:                          LB1   LB2   SPIEN x     x     x     x     0
+ m161,m163,m323,m128:           x     x     BLB12 BLB11 BLB02 BLB01 LB2   LB1
+ tn26:                          x     x     x     x     x     x     LB2   LB1
+ */
+TByte
+TAvrStargate::ReadLockFuseBits()
+{
+  TByte lockfuse[4] = { 0x58, 0, 0, 0 };
+  Send(lockfuse, 4);
+  return lockfuse[3];
+}
+
+/*
+ Read Fuse Bits (Low):          7     6     5     4     3     2     1     0
+ 2333,4433:                     x     x     SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     SPIEN x     EESAV 1     SUT1  SUT0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI x     x     CKSL1 CKSL0
+ m161:                          x     BTRST SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN x     x     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m32,m64,m128:           BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ */
+TByte
+TAvrStargate::ReadFuseLowBits()
+{
+  TByte fuselow[4] = { 0x50, 0, 0, 0 };
+  Send(fuselow, 4);
+  return fuselow[3];
+}
+
+/*
+ Read Fuse Bits High:           7     6     5     4     3     2     1     0
+ m163:                          x     x     x     x     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN x     x     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m32,m64,m128:              OCDEN JTGEN SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+TByte
+TAvrStargate::ReadFuseHighBits()
+{
+  TByte fusehigh[4] = { 0x58, 0x08, 0, 0 };
+  Send(fusehigh, 4);
+  return fusehigh[3];
+}
+
+/*
+ Read Extended Fuse Bits:       7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+TByte
+TAvrStargate::ReadFuseExtBits()
+{
+  TByte fuseext[4] = { 0x50, 0x08, 0, 0 };
+  Send(fuseext, 4);
+  return fuseext[3];
+}
+
+/* Read Calibration Byte (m163, m323, m128, tn12, tn15, tn26)
+   addr=0...3 for tn26, addr=0 for other devices */
+TByte
+TAvrStargate::ReadCalByte(TByte addr)
+{
+  TByte cal[4] = { 0x38, 0, addr, 0 };
+  Send(cal, 4);
+  return cal[3];
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void
+TAvrStargate::WriteOldFuseBits(TByte val)
+{
+  TByte oldfuse[4] = { 0xAC, (val & 0x1F) | 0xA0, 0, 0xD2 };
+  Send(oldfuse, 4);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void
+TAvrStargate::WriteFuseLowBits(TByte val)
+{
+  TByte fuselow[4] = { 0xAC, 0xA0, 0, val };
+  Send(fuselow, 4);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+void
+TAvrStargate::WriteFuseHighBits(TByte val)
+{
+  TByte fusehigh[4] = { 0xAC, 0xA8, 0, val };
+  Send(fusehigh, 4);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void
+TAvrStargate::WriteFuseExtBits(TByte val)
+{
+  TByte fuseext[4] = { 0xAC, 0xA4, 0, val };
+  Send(fuseext, 4);
+}
+
+
+void
+TAvrStargate::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+  TByte rbyte=0;
+  bool device_not_erased=false;
+  
+  /* Poll data if use_data_polling is enabled and if page mode
+     is enabled, flash is not selected */
+  bool poll_data = ((segment==SEG_FLASH && !page_size) || segment==SEG_EEPROM)
+		   && use_data_polling && TestFeatures(AVR_BYTE_POLL);
+
+  CheckMemoryRange(addr);
+  
+  /* For speed, don't program a byte that is already there
+     (such as 0xFF after chip erase).  */
+  if (poll_data){
+    rbyte=ReadByte(addr);
+    if (rbyte == byte){return;}
+    if (rbyte != 0xff){device_not_erased=true;}
+  }
+  
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = 500000;
+
+  gettimeofday(&t_start_wr, NULL);
+
+  if (segment==SEG_FLASH){
+      
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */
+    if (page_size) {
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+        addr, page_addr_fetched?"Yes":"No");
+	
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+        WriteProgramMemoryPage();	
+      }
+      if (page_addr_fetched==false){
+        page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+
+    TByte hl = (addr & 1) ? 0x48 : 0x40;
+    TByte flash [4] = { hl,
+			(TByte)((addr >> 9) & 0xff),
+			(TByte)((addr >> 1) & 0xff),
+			byte };
+    Send(flash, 4);
+
+    /* Remember the last non-0xFF byte written, for page write polling.  */
+    if (byte != 0xFF) {
+      page_poll_addr = addr;
+      page_poll_byte = byte;
+    }
+
+    /* We do not need to wait for each byte in page mode programming */
+    if (page_size){return;}    
+    t_wait.tv_usec = Get_t_wd_flash();
+  }
+  else if (segment==SEG_EEPROM){
+    TByte eeprom [4] = { 0xC0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff),
+			 byte };
+    Send(eeprom, 4);  
+    t_wait.tv_usec = Get_t_wd_eeprom();    
+  }
+  else if (segment==SEG_FUSE) {
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      break;
+    case AVR_CAL_ADDR:
+      /* calibration byte (addr == 2) is read only */
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+    t_wait.tv_usec = Get_t_wd_eeprom();
+  }
+
+  gettimeofday(&t_start_poll, NULL);
+  /* t_timeout = now + t_wd_prog */
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  do {
+    /* Data Polling: if the programmed value reads correctly, and
+       is not equal to any of the possible P1, P2 read back values,
+       it is done; else wait until tWD_PROG time has elapsed.
+       The busy loop here is to avoid rounding up the programming
+       wait time to 10ms timer ticks (for Linux/x86).  Programming
+       is not really "hard real time" but 10ms instead of ~4ms for
+       every byte makes it slow.  gettimeofday() reads the 8254
+       timer registers (or Pentium cycle counter if available),
+       so it has much better (microsecond) resolution.  
+    */
+    gettimeofday(&t_end, NULL);
+    if (poll_data){
+      if ((byte == (rbyte = ReadByte(addr))) &&
+          (byte != 0) && (byte != 0x7F) && (byte != 0x80) && (byte != 0xFF)){
+	break;
+      }
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+  
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  if (poll_data && byte != rbyte){
+    if (device_not_erased){
+      Info(0, "Warning: It seems that device is not erased.\n"
+              "         Erase it with the --erase option.\n");
+    }
+    Info(0, "Error: Data polling readback status: write=0x%02x read=0x%02x\n", 
+      byte, rbyte);
+    throw Error_Device("If device was erased disable polling with the "
+      "-dno-poll option.");
+  }
+}
+
+void
+TAvrStargate::FlushWriteBuffer()
+{
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+void
+TAvrStargate::ChipErase()
+{
+  TByte init[4] = { 0xAC, 0x53, 0x00, 0x00 };
+  TByte chip_erase [4] = { 0xAC, 0x80, 0x00, 0x00 };
+  Info(1, "Erasing device ...\n");
+  Send(init, 4);
+  Send(chip_erase, 4);
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(9000);
+  Delay_usec(9000);
+  PulseReset();
+  Delay_usec(9000);
+  Info(1, "Reinitializing device\n");  
+  EnableAvr();
+}
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void
+TAvrStargate::WriteLockBits(TByte bits)
+{
+  /* This handles both old (byte 2, bits 1-2)
+     and new (byte 4, bits 0-5) devices.  */
+  TByte lock[4] = { 0xAC, 0xF9 | ((bits << 1) & 0x06), 0xFF, bits };
+  TByte rbits;
+
+  Info(1, "Writing lock bits ...\n");
+  Send(lock, 4);
+  Delay_usec(Get_t_wd_erase());
+  PulseReset();
+  Info(1, "Reinitializing device\n");
+  EnableAvr();
+  rbits = ReadLockBits();
+  if (rbits & ~bits)
+    Info(0, "Warning: lock bits write=0x%02X read=0x%02X\n",
+	 (int) bits, (int) rbits);
+}
+
+TByte
+TAvrStargate::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else if (GetPartInfo(0) == 0 &&
+	     GetPartInfo(1) == 1 &&
+	     GetPartInfo(2) == 2) {
+    rbits = 0xFC;
+  } else throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  return rbits;
+}
+
+unsigned int
+TAvrStargate::GetPollCount()
+{
+  return total_poll_cnt;
+}
+
+float
+TAvrStargate::GetMinPollTime()
+{
+  return min_poll_time;
+}
+
+float
+TAvrStargate::GetMaxPollTime()
+{
+  return max_poll_time;
+}
+
+float
+TAvrStargate::GetTotPollTime()
+{
+  return total_poll_time;
+}
+
+void
+TAvrStargate::ResetMinMax()
+{
+  min_poll_time = 1.0;
+  max_poll_time = 0.0;
+  total_poll_time = 0.0;
+  total_poll_cnt = 0;
+}
+
+/* Constructor
+*/
+
+TAvrStargate::TAvrStargate():
+  use_data_polling(true)
+{
+  ResetMinMax();
+  
+  /* Device Command line options ... */ 
+  if (GetCmdParam("-dno-poll", false)){use_data_polling=false;} 
+  
+  EnableAvr();
+}
+
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/AvrStargate.h b/tools/platforms/mica/uisp/src/AvrStargate.h
new file mode 100644
index 00000000..1cd96289
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrStargate.h
@@ -0,0 +1,89 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ ****************************************************************************
+ */
+
+
+#ifndef __AVR_STARGATE
+#define __AVR_STARGATE
+
+#include "Global.h"
+#include "Avr.h"
+#include "SASA.h"
+
+class TAvrStargate: public TAvr, TSASA {
+private:
+  bool use_data_polling;
+  float min_poll_time, max_poll_time, total_poll_time;
+  unsigned long total_poll_cnt;  /* bytes or pages */
+
+  void EnableAvr();
+  TByte GetPartInfo(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadLockFuseBits();
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+  TByte ReadCalByte(TByte addr);
+  void WriteOldFuseBits(TByte val);  /* 5 bits */
+  void WriteFuseLowBits(TByte val);
+  void WriteFuseHighBits(TByte val);
+  void WriteFuseExtBits(TByte val);
+
+  /* lock bits */
+  void WriteLockBits(TByte bits);
+  TByte ReadLockBits();
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Transfer Statistics */
+  unsigned int GetPollCount();
+  float GetMinPollTime();
+  float GetTotPollTime();
+  float GetMaxPollTime();
+  void ResetMinMax();
+  
+  TAvrStargate();
+  ~TAvrStargate(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/DAPA.C b/tools/platforms/mica/uisp/src/DAPA.C
new file mode 100644
index 00000000..002170be
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/DAPA.C
@@ -0,0 +1,1196 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Sergey Larin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	DAPA.C
+
+	Direct AVR Parallel Access (c) 1999
+	
+	Originally written by Sergey Larin.
+	Corrected by 
+	  Denis Chertykov, 
+	  Uros Platise and 
+	  Marek Michalkiewicz
+*/
+
+#ifndef NO_DAPA
+//#define DEBUG
+//#define DEBUG1
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+
+#ifndef NO_DIRECT_IO
+
+/* Linux and FreeBSD differ in the order of outb() arguments.
+   XXX any other OS/architectures with PC-style parallel ports?
+   XXX how about the other *BSDs?  */
+
+#if defined(__linux__) && defined(__i386__)
+
+#include 
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(val, port)
+#define ioport_enable(port, num)  ({ \
+    int x = ioperm(port, num, 1); usleep(1); x; }) 
+#define ioport_disable(port, num) ({ \
+    int x = ioperm(port, num, 0); usleep(1); x; })
+
+#elif defined(__CYGWIN__)
+
+#include "cygwinp.h"
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(val, port)
+#define ioport_enable(port, num)  ioperm(port, num, 1)
+#define ioport_disable(port, num) ioperm(port, num, 0)
+
+#elif defined(__FreeBSD__) && defined(__i386__)
+
+#include 
+#include 
+#include 
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(port, val)
+#define ioport_enable(port, num)  i386_set_ioperm(port, num, 1)
+#define ioport_disable(port, num) i386_set_ioperm(port, num, 0)
+
+#else
+
+/* Direct I/O port access not supported - ppdev/ppi kernel driver
+   required for parallel port support to work at all.  Only likely to
+   work on PC-style parallel ports (all signals implemented) anyway.
+
+   The only lines believed to be implemented in all parallel ports are:
+	D0-D6 outputs	(long long ago I heard of some non-PC machine with
+			D7 hardwired to GND - don't remember what it was)
+	BUSY input
+
+   So far, only the dt006 interface happens to use a subset of the above.
+
+	STROBE output might be pulsed by hardware and not be writable
+	ACK input might only trigger an interrupt and not be readable
+
+   Future designers of these "dongles" might want to keep this in mind.
+ */
+
+#define ioport_read(port)         (0xFF)
+#define ioport_write(port, val)
+#define ioport_enable(port, num)  (-1)
+#define ioport_disable(port, num) (0)
+
+#endif
+
+#else /* NO_DIRECT_IO */
+
+#define ioport_read(port)         (0xFF)
+#define ioport_write(port, val)
+#define ioport_enable(port, num)  (-1)
+#define ioport_disable(port, num) (0)
+
+#endif /* NO_DIRECT_IO */
+
+#include 
+#include 
+#include "timeradd.h"
+
+#include 
+#include 
+
+#include "parport.h"
+
+/* These should work on any architecture, not just i386.  */
+#if defined(__linux__)
+
+#include "ppdev.h"
+
+#define par_claim(fd)            ioctl(fd, PPCLAIM, 0)
+#define par_read_status(fd, ptr) ioctl(fd, PPRSTATUS, ptr)
+#define par_write_data(fd, ptr)  ioctl(fd, PPWDATA, ptr)
+#define par_write_ctrl(fd, ptr)  ioctl(fd, PPWCONTROL, ptr)
+#define par_set_dir(fd, ptr)     ioctl(fd, PPDATADIR, ptr)
+#define par_release(fd)          ioctl(fd, PPRELEASE, 0)
+
+#elif defined(__FreeBSD__)
+
+#include 
+
+#define par_claim(fd)            (0)
+#define par_read_status(fd, ptr) ioctl(fd, PPIGSTATUS, ptr)
+#define par_write_data(fd, ptr)  ioctl(fd, PPISDATA, ptr)
+#define par_write_ctrl(fd, ptr)  ioctl(fd, PPISCTRL, ptr)
+/* par_set_dir not defined, par_write_ctrl used instead */
+#define par_release(fd)
+
+#else
+
+/* Dummy defines if ppdev/ppi not supported by the kernel.  */
+
+#define par_claim(fd)            (-1)
+#define par_read_status(fd, ptr)
+#define par_write_data(fd, ptr)
+#define par_write_ctrl(fd, ptr)
+#define par_release(fd)
+
+#endif
+
+#include "Global.h"
+#include "Error.h"
+#include "DAPA.h"
+#include "Avr.h"
+
+/* Parallel Port Base Address
+*/
+#define IOBASE parport_base
+#define IOSIZE 3
+
+/* FIXME: rewrite using tables to define new interface types.
+
+   For each of the logical outputs (SCK, MOSI, RESET, ENA1, ENA2,
+   power, XTAL1) there should be two bit masks that define which
+   physical bits (from the parallel port output data or control
+   registers, or serial port DTR/RTS/TXD) are affected, and if
+   they should be inverted.  More than one output may be changed.
+   For each of the inputs (MISO, maybe TEST?), define which bit
+   (only one, from parallel port status or CTS/DCD/DSR/RI) should
+   be tested and if it should be inverted.
+   One struct as described above should be initialized for each
+   of the supported hardware interfaces.
+ */
+
+/* Alex's Direct Avr Parallel Access 
+*/
+#define DAPA_SCK    PARPORT_CONTROL_STROBE	/* base + 2 */
+#define DAPA_RESET  PARPORT_CONTROL_INIT	/* base + 2 */
+#define DAPA_DIN    PARPORT_STATUS_BUSY		/* base + 1 */
+#define DAPA_DOUT   0x1		/* base */
+
+/* STK200 Direct Parallel Access 
+*/
+#define STK2_TEST1  0x01	/* D0 (base) - may be connected to POUT input */
+#define STK2_TEST2  0x02	/* D1 (base) - may be connected to BUSY input */
+#define STK2_ENA1   0x04    	/* D2 (base) - ENABLE# for RESET#, MISO */
+#define STK2_ENA2   0x08    	/* D3 (base) - ENABLE# for SCK, MOSI, LED# */
+#define STK2_SCK    0x10    	/* D4 (base) - SCK */
+#define STK2_DOUT   0x20    	/* D5 (base) - MOSI */
+#define STK2_LED    0x40	/* D6 (base) - LED# (optional) */
+#define STK2_RESET  0x80    	/* D7 (base) - RESET# */
+#define STK2_DIN    PARPORT_STATUS_ACK    	/* ACK (base + 1) - MISO */
+
+/* Altera Byte Blaster Port Configuration
+*/
+#define ABB_EN      PARPORT_CONTROL_AUTOFD	/* low active */
+#define ABB_LPAD    0x80	/* D7: loop back throught enable auto-detect */
+#define ABB_SCK	    0x01	/* D0: TCK (ISP conn. pin 1) */
+#define ABB_RESET   0x02	/* D1: TMS (ISP conn. pin 5) */
+#define ABB_DOUT    0x40	/* D6: TDI (ISP conn. pin 9) */
+#define ABB_DIN	    PARPORT_STATUS_BUSY	/* BUSY: TDO (ISP conn. pin 3) */
+/* D5 (pin 7) connected to ACK (pin 10) directly */
+/* D7 (pin 9) connected to POUT (pin 12) via 74HC244 buffer */
+/* optional modification for AVREAL: D3 (pin 5) = XTAL1 (ISP conn. pin 8) */
+#define ABB_XTAL1   0x08
+
+/*
+   XXX not yet supported, just documented here...
+
+   Atmel-ISP Download Cable (P/N ATDH1150VPC)
+   (10-pin connector similar to Altera Byte Blaster, but no 3-state outputs)
+   http://www.atmel.com/atmel/acrobat/isp_c_v5.pdf
+
+   VCC ---- 4
+   GND ---- 2,10 ---- GND
+   SCK   <- TCK(1) <- nSTROBE
+   MISO  -> TDO(3) -> nACK
+   RESET <- TMS(5) <- SELECT
+   MOSI  <- TDI(9) <- D0
+   XTAL1 <- AF(8)  <- AUTOFD (optional, not yet supported)
+ */
+#define ATDH_SCK    PARPORT_CONTROL_STROBE
+#define ATDH_DOUT   0x01
+#define ATDH_RESET  PARPORT_CONTROL_SELECT
+#define ATDH_DIN    PARPORT_STATUS_ACK
+#define ATDH_XTAL1  PARPORT_CONTROL_AUTOFD
+
+/* "Atmel AVR ISP" cable (?)
+ */
+#define AISP_TSTOUT 0x08	/* D3 (base) - dongle test output */
+#define AISP_SCK    0x10	/* D4 (base) - SCK */
+#define AISP_DOUT   0x20	/* D5 (base) - MOSI */
+#define AISP_ENA    0x40	/* D6 (base) - ENABLE# for MISO, MOSI, SCK */
+#define AISP_RESET  0x80	/* D7 (base) - RESET# */
+#define AISP_DIN    PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+/* BUSY and POUT used as inputs to test for the dongle */
+
+/* Yet another AVR ISP cable from http://www.bsdhome.com/avrprog/
+ */
+#define BSD_POWER   0x0F	/* D0-D3 (base) - power */
+#define BSD_ENA     0x10	/* D4 (base) - ENABLE# */
+#define BSD_RESET   0x20	/* D5 (base) - RESET# */
+#define BSD_SCK     0x40	/* D6 (base) - SCK */
+#define BSD_DOUT    0x80	/* D7 (base) - MOSI */
+#define BSD_DIN     PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+/* optional status LEDs, active low, not yet supported (base + 2) */
+#define BSD_LED_ERR PARPORT_CONTROL_STROBE  /* error */
+#define BSD_LED_RDY PARPORT_CONTROL_AUTOFD  /* ready */
+#define BSD_LED_PGM PARPORT_CONTROL_INIT    /* programming */
+#define BSD_LED_VFY PARPORT_CONTROL_SELECT  /* verifying */
+
+/*
+   FBPRG - http://ln.com.ua/~real/avreal/adapters.html
+*/
+#define FBPRG_POW    0x07	/* D0,D1,D2 (base) - power supply (XXX D7 too?) */
+#define FBPRG_XTAL1  0x08	/* D3 (base) (not supported) */
+#define FBPRG_RESET  0x10	/* D4 (base) */
+#define FBPRG_DOUT   0x20	/* D5 (base) */
+#define FBPRG_SCK    0x40	/* D6 (base) */
+#define FBPRG_DIN    PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+
+/* DT006/Sample Electronics Parallel Cable
+   http://www.dontronics.com/dt006.html
+*/
+/* all at base, except for DT006_DIN at base + 1 */
+#define DT006_SCK    0x08
+#define DT006_RESET  0x04
+#define DT006_DIN    PARPORT_STATUS_BUSY
+#define DT006_DOUT   0x01
+
+/* ETT-AVR V2.0 Programmer / Futurlec AT90S8535 */ 
+#define ETT_SCK      0x01                   /* DB25 Pin  2: D0 (Base + 0) -> SCK      */
+#define ETT_RESET    0x02                   /* DB25 Pin  3: D1 (Base + 0) -> RESET    */
+#define ETT_DIN      PARPORT_STATUS_ACK     /* DB25 Pin 10: ACK (Base + 1) -> MISO    */
+#define ETT_DOUT     PARPORT_CONTROL_STROBE /* DB25 Pin  1: STROBE (Base + 2) -> MOSI */
+
+/* ABC Maxi - just like DT006 with two pins swapped */
+/* all at base, except for MAXI_DIN at base + 1 */
+#define MAXI_SCK    0x02
+#define MAXI_RESET  0x04
+#define MAXI_DIN    PARPORT_STATUS_ACK
+#define MAXI_DOUT   0x01
+
+/* Xilinx JTAG download cable
+   RESET=TMS, SCK=TCK, MISO=TDO, MOSI=TDI
+*/
+#define XIL_DOUT    0x01        /* D0: TDI */
+#define XIL_SCK     0x02        /* D1: TCK */
+#define XIL_RESET   0x04        /* D2: TMS */
+#define XIL_ENA     0x08        /* D3: ENABLE# */
+#define XIL_DIN	    PARPORT_STATUS_SELECT /* SLCT: TDO */
+
+/* Default value for minimum SCK high/low time in microseconds.  */
+#ifndef SCK_DELAY
+#define SCK_DELAY 5
+#endif
+
+/* Minimum RESET# high time in microseconds.
+   Should be enough to charge a capacitor between RESET# and GND
+   (it is recommended to use a voltage detector with open collector
+   output, and only something like 100 nF for noise immunity).
+   Default value may be changed with -dt_reset=N microseconds.  */
+#ifndef RESET_HIGH_TIME
+#define RESET_HIGH_TIME 1000
+#endif
+
+/* Delay from RESET# low to sending program enable command
+   (the datasheet says it must be at least 20 ms).  Also wait time
+   for crystal oscillator to start after possible power down mode.  */
+#ifndef RESET_LOW_TIME
+#define RESET_LOW_TIME 30000
+#endif
+
+void
+TDAPA::SckDelay()
+{
+  Delay_usec(t_sck);
+}
+
+#ifndef MIN_SLEEP_USEC
+#define MIN_SLEEP_USEC 20000
+#endif
+
+void
+TDAPA::Delay_usec(long t)
+{
+  struct timeval t1, t2;
+
+#if defined(__CYGWIN__)
+  if (cygwinp_delay_usec(t)) {
+    return;
+  }
+#endif
+
+  if (t <= 0)
+    return;  /* very short delay for slow machines */
+  gettimeofday(&t1, NULL);
+  if (t > MIN_SLEEP_USEC)
+    usleep(t - MIN_SLEEP_USEC);
+  /* loop for the remaining time */
+  t2.tv_sec = t / 1000000UL;
+  t2.tv_usec = t % 1000000UL;
+  timeradd(&t1, &t2, &t1);
+  do {
+    gettimeofday(&t2, NULL);
+  } while (timercmp(&t2, &t1, <));
+}
+
+void
+TDAPA::ParportSetDir(int dir)
+{
+  if (dir)
+    par_ctrl |= PARPORT_CONTROL_DIRECTION;
+  else
+    par_ctrl &= ~PARPORT_CONTROL_DIRECTION;
+
+  if (ppdev_fd != -1) {
+#ifdef par_set_dir
+    par_set_dir(ppdev_fd, &dir);
+#else
+    par_write_ctrl(ppdev_fd, &par_ctrl);
+#endif
+  } else
+    ioport_write(IOBASE+2, par_ctrl);
+}
+
+void
+TDAPA::ParportWriteCtrl()
+{
+  if (ppdev_fd != -1)
+    par_write_ctrl(ppdev_fd, &par_ctrl);
+  else
+    ioport_write(IOBASE+2, par_ctrl);
+}
+
+void
+TDAPA::ParportWriteData()
+{
+  if (ppdev_fd != -1)
+    par_write_data(ppdev_fd, &par_data);
+  else
+    ioport_write(IOBASE, par_data);
+}
+
+void
+TDAPA::ParportReadStatus()
+{
+  if (ppdev_fd != -1)
+    par_read_status(ppdev_fd, &par_status);
+  else
+    par_status = ioport_read(IOBASE+1);
+}
+
+void
+TDAPA::SerialReadCtrl()
+{
+#ifdef TIOCMGET
+  ioctl(ppdev_fd, TIOCMGET, &ser_ctrl);
+#else
+  ser_ctrl = 0;
+#endif
+}
+
+void
+TDAPA::SerialWriteCtrl()
+{
+#ifdef TIOCMGET
+  ioctl(ppdev_fd, TIOCMSET, &ser_ctrl);
+#endif
+}
+
+void
+TDAPA::OutReset(int b)
+  /* FALSE means active Reset at the AVR */ 
+{
+  if (reset_invert)
+    b = !b;
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+    if (b) par_ctrl |= DAPA_RESET; else par_ctrl &= ~DAPA_RESET;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_RESET; else par_data &= ~STK2_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_RESET; else par_data &= ~ABB_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_RESET; else par_data &= ~AISP_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_RESET; else par_data &= ~BSD_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_RESET; else par_data &= ~FBPRG_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_RESET; else par_data &= ~DT006_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_data |= ETT_RESET; else par_data &= ~ETT_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_RESET; else par_data &= ~MAXI_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_RESET; else par_data &= ~XIL_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#ifdef TIOCMGET
+    SerialReadCtrl();
+    if (b) ser_ctrl |= TIOCM_RTS; else ser_ctrl &= ~TIOCM_RTS;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET) && defined(TIOCCBRK)
+    ioctl(ppdev_fd, b ? TIOCCBRK : TIOCSBRK, 0);
+#endif /* TIOCMGET */
+    break;
+  }
+  Delay_usec(b ? reset_high_time : RESET_LOW_TIME );
+}
+
+void
+TDAPA::OutSck(int b)
+{
+  if (sck_invert)
+    b = !b;
+#ifdef DEBUG1
+  printf("%c",(b)?'S':'s');
+#endif
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+    if (b) par_ctrl &= ~DAPA_SCK; else par_ctrl |= DAPA_SCK;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_SCK; else par_data &= ~STK2_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_SCK; else par_data &= ~ABB_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_SCK; else par_data &= ~AISP_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_SCK; else par_data &= ~BSD_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_SCK; else par_data &= ~FBPRG_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_SCK; else par_data &= ~DT006_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_data |= ETT_SCK; else par_data &= ~ETT_SCK;
+    ParportWriteData();
+    break;
+  
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_SCK; else par_data &= ~MAXI_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_SCK; else par_data &= ~XIL_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#if defined(TIOCMGET)
+    SerialReadCtrl();
+    if (b) ser_ctrl |= TIOCM_DTR; else ser_ctrl &= ~TIOCM_DTR;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET)
+    if (b) ser_ctrl |= TIOCM_RTS; else ser_ctrl &= ~TIOCM_RTS;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+  }
+}
+
+
+void
+TDAPA::OutEnaReset(int b)
+{
+  bool no_ps2_hack = GetCmdParam("-dno-ps2-hack", false);
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_FBPRG:
+  case PAT_DT006:
+  case PAT_ETT:
+  case PAT_MAXI:
+    if (b) {
+      ParportSetDir(0);
+    } else if (!no_ps2_hack) {
+      /* No special enable line on these interfaces, for PAT_DAPA
+         this only disables the data line (MOSI) and not SCK.  */
+      ParportSetDir(1);
+    }
+    break;
+
+  case PAT_STK200:
+    if (b) {
+      /* Make sure outputs are enabled.  */
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~STK2_ENA1;
+      ParportWriteData();
+    } else {
+      par_data |= STK2_ENA1;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+        /* Experimental: disable outputs (PS/2 parallel port), for cheap
+	   STK200-like cable without the '244.  Should work with the real
+           STK200 too (disabled outputs should still have pull-up resistors,
+	   ENA1 and ENA2 are high, and the '244 remains disabled).
+	   This way the SPI pins can be used by the application too.
+	   Please report if it doesn't work on some parallel ports.  */
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_ABB:
+    if (b) {
+      ParportSetDir(0);
+      par_ctrl |= ABB_EN;
+      ParportWriteCtrl();
+    } else {
+      par_ctrl &= ~ABB_EN;
+      ParportWriteCtrl();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_AVRISP:
+    if (b) {
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~AISP_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= AISP_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_BSD:
+    if (b) {
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~BSD_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= BSD_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_XIL:
+    if (b) {
+      ParportSetDir(0);
+      par_data &= ~XIL_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= XIL_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_DASA:
+  case PAT_DASA2:
+    break;
+  }
+}
+
+void
+TDAPA::OutEnaSck(int b)
+{
+  switch (pa_type) {
+  case PAT_STK200:
+    if (b)
+      par_data &= ~(STK2_ENA2 | STK2_LED);
+    else
+      par_data |= (STK2_ENA2 | STK2_LED);
+    ParportWriteData();
+    break;
+
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_ABB:
+  case PAT_AVRISP:
+  case PAT_BSD:
+  case PAT_FBPRG:
+  case PAT_DT006:
+  case PAT_ETT:
+  case PAT_MAXI:
+  case PAT_XIL:
+  case PAT_DASA:
+  case PAT_DASA2:
+    /* no separate enable for SCK nad MOSI */
+    break;
+  }
+}
+
+void
+TDAPA::PulseSck()
+{
+  SckDelay();
+  OutSck(1);
+  SckDelay();
+  OutSck(0);
+}
+
+void
+TDAPA::PulseReset()
+{
+  printf("pulse\n");
+  /* necessary delays already included in these methods */
+  OutReset(1);
+  Delay_usec(1000); 
+  OutReset(0);
+}
+
+void
+TDAPA::OutData(int b)
+{
+  if (mosi_invert)
+    b = !b;
+#ifdef DEBUG1
+  printf("%c",(b)?'D':'d');
+#endif
+  switch (pa_type) {
+  case PAT_DAPA:
+    if (b) par_data |= DAPA_DOUT; else par_data &= ~DAPA_DOUT;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x0; //0x6
+    ParportWriteData();
+    break;
+
+  case PAT_DAPA_2:
+    if (b) par_data |= DAPA_DOUT; else par_data &= ~DAPA_DOUT;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x4; //0x6
+    ParportWriteData();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_DOUT; else par_data &= ~STK2_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_DOUT; else par_data &= ~ABB_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_DOUT; else par_data &= ~AISP_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_DOUT; else par_data &= ~BSD_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_DOUT; else par_data &= ~FBPRG_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_DOUT; else par_data &= ~DT006_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_ctrl |= ETT_DOUT; else par_ctrl &= ~ETT_DOUT;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_DOUT; else par_data &= ~MAXI_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_DOUT; else par_data &= ~XIL_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#if defined(TIOCMGET) && defined(TIOCCBRK)
+    ioctl(ppdev_fd, b ? TIOCSBRK : TIOCCBRK, 0);
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET)
+    if (b) ser_ctrl |= TIOCM_DTR; else ser_ctrl &= ~TIOCM_DTR;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+  }
+}
+
+int
+TDAPA::InData()
+{
+  int b = 0;
+
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_ABB:
+  case PAT_DT006:
+    ParportReadStatus();
+    b = (~par_status & PARPORT_STATUS_BUSY);
+    break;
+  case PAT_ETT:
+    ParportReadStatus();
+    b = (par_status & ETT_DIN);
+    break;
+  case PAT_STK200:
+  case PAT_AVRISP:
+  case PAT_BSD:
+  case PAT_FBPRG:
+  case PAT_MAXI:
+    ParportReadStatus();
+    b = (par_status & PARPORT_STATUS_ACK);
+    break;
+  case PAT_XIL:
+    ParportReadStatus();
+    b = (par_status & PARPORT_STATUS_SELECT);
+    break;
+  case PAT_DASA:
+  case PAT_DASA2:
+#ifdef TIOCMGET
+    SerialReadCtrl();
+#ifdef DEBUG1
+    printf("%c",(ser_ctrl & TIOCM_CTS)?'I':'i');
+#endif
+    b = (ser_ctrl & TIOCM_CTS);
+#endif /* TIOCMGET */
+    break;
+  }
+  if (miso_invert)
+    b = !b;
+  return b;
+}
+
+void
+TDAPA::Init()
+{
+  /* data=1, reset=0, sck=0 */
+  switch (pa_type) {
+  case PAT_DAPA:
+    par_ctrl = DAPA_SCK;
+    par_data = 0xFF;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x0; //0x6
+    break;
+  case PAT_DAPA_2:
+    par_ctrl = DAPA_SCK;
+    par_data = 0xFF;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x4; //0x6
+    break;
+
+  case PAT_STK200:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(STK2_ENA1 | STK2_SCK);
+    break;
+
+  case PAT_ABB:
+    par_ctrl = ABB_EN;
+    par_data = 0xFF & ~ABB_SCK;
+    break;
+
+  case PAT_AVRISP:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(AISP_ENA | AISP_SCK);
+    break;
+
+  case PAT_BSD:
+    par_ctrl = 0;
+    par_data = BSD_POWER | BSD_RESET;
+    break;
+
+  case PAT_FBPRG:
+    par_ctrl = 0;
+    par_data = FBPRG_POW | FBPRG_RESET;
+    break;
+
+  case PAT_ETT:
+    par_ctrl = ETT_DOUT;
+    par_data = ETT_SCK | ETT_RESET;
+    mosi_invert = 1;
+    break;
+
+  case PAT_DT006:
+  case PAT_MAXI:
+    par_ctrl = 0;
+    par_data = 0xFF;
+    break;
+
+  case PAT_XIL:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(XIL_ENA | XIL_SCK | XIL_RESET);
+    break;
+
+  case PAT_DASA:
+  case PAT_DASA2:
+    break;
+  }
+
+  if (!pa_type_is_serial) {
+    ParportWriteCtrl();
+    ParportWriteData();
+    SckDelay();
+    ParportReadStatus();
+  }
+
+  OutEnaReset(1);
+  OutReset(0);
+  OutEnaSck(1);
+  OutSck(0);
+  /* Wait 100 ms as recommended for ATmega163 (SCK not low on power up).  */
+  Delay_usec(100000);
+  PulseReset();
+}
+
+int
+TDAPA::SendRecv(int b)
+{
+  unsigned int mask, received=0;
+
+  for (mask = 0x80; mask; mask >>= 1) {
+     OutData(b & mask);
+     SckDelay();
+     /* MM 20020613: we used to read the bit here, but ... */
+     OutSck(1);
+     SckDelay();
+     /* ... here we have more room for propagation delays (almost the
+	whole SCK period, instead of half of it) - good for long cables,
+	slow RS232 drivers/receivers, opto-isolated interfaces, etc.  */
+     if (InData())
+       received |= mask;
+     OutSck(0);
+  }
+  return received;
+}
+
+int
+TDAPA::Send (unsigned char* queue, int queueSize, int rec_queueSize)
+{
+  unsigned char *p = queue, ch;
+  int i = queueSize;
+  
+  if (rec_queueSize==-1){rec_queueSize = queueSize;}
+#ifdef DEBUG
+  printf ("send(recv): ");
+#endif
+  while (i--){
+#ifdef DEBUG
+    printf ("%02X(", (unsigned int)*p);
+#endif    
+    ch = SendRecv(*p);
+#ifdef DEBUG    
+    printf ("%02X) ", (unsigned int)ch);
+#endif    
+    *p++ = ch;
+  }
+#ifdef DEBUG  
+  printf ("\n");
+#endif  
+  return queueSize;
+}
+
+
+TDAPA::TDAPA(): 
+  parport_base(0x378), ppdev_fd(-1)
+{
+  const char *val;
+
+  /* If the user doesn't specify -dlpt option, use /dev/parport0 as the
+     default instead of defaulting to using ioperm (ick!). If the user wants
+     to run uisp as root (or setuid root) they should know what they are doing
+     and can suffer the consequences. Joe user should not be told about ioperm
+     failure due to permission denied. */
+#ifdef __CYGWIN__
+  /* But on cygwin, /dev/parport0 does not exist. So... */
+  const char *ppdev_name = NULL;
+#else
+  const char *ppdev_name = "/dev/parport0";
+#endif
+
+  /* Enable Parallel Port */
+  val = GetCmdParam("-dprog");
+  if (val && strcmp(val, "dapa") == 0)
+    pa_type = PAT_DAPA;
+  else if (val && strcmp(val, "dapa_2") == 0)
+    pa_type = PAT_DAPA_2;
+  else if (val && strcmp(val, "stk200") == 0)
+    pa_type = PAT_STK200;
+  else if (val && strcmp(val, "abb") == 0)
+    pa_type = PAT_ABB;
+  else if (val && strcmp(val, "avrisp") == 0)
+    pa_type = PAT_AVRISP;
+  else if (val && strcmp(val, "bsd") == 0)
+    pa_type = PAT_BSD;
+  else if (val && strcmp(val, "fbprg") == 0)
+    pa_type = PAT_FBPRG;
+  else if (val && strcmp(val, "dt006") == 0)
+    pa_type = PAT_DT006;
+  else if (val && strcmp(val, "ett") == 0)
+    pa_type = PAT_ETT;
+  else if (val && strcmp(val, "maxi") == 0)
+    pa_type = PAT_MAXI;
+  else if (val && strcmp(val, "xil") == 0)
+    pa_type = PAT_XIL;
+  else if (val && strcmp(val, "dasa") == 0)
+    pa_type = PAT_DASA;
+  else if (val && strcmp(val, "dasa2") == 0)
+    pa_type = PAT_DASA2;
+  else {
+    throw Error_Device("Direct Parallel Access not defined.");
+  }
+  pa_type_is_serial = (pa_type == PAT_DASA || pa_type == PAT_DASA2);
+  /* Parse Command Line Switches */
+#ifndef NO_DIRECT_IO
+  if ((val = GetCmdParam("-dlpt")) != NULL) {
+    if (!strcmp(val, "1")) {
+      parport_base = 0x378;
+      ppdev_name = NULL;
+    }
+    else if (!strcmp(val, "2")) {
+      parport_base = 0x278;
+      ppdev_name = NULL;
+    }
+    else if (!strcmp(val, "3")) {
+      parport_base = 0x3bc;
+      ppdev_name = NULL;
+    }    
+    else if (isdigit(*val)) {
+      parport_base = strtol(val, NULL, 0);
+      ppdev_name = NULL;
+    }
+    else {
+      ppdev_name = val;
+    }
+  }
+  if (!ppdev_name && !pa_type_is_serial) {
+    if (parport_base!=0x278 && parport_base!=0x378 && parport_base!=0x3bc) {
+      /* TODO: option to override this if you really know
+	 what you're doing (only if running as root).  */
+      throw Error_Device("Bad device address.");
+    }
+    if (ioport_enable(IOBASE, IOSIZE) != 0) {
+      perror("ioperm");
+      throw Error_Device("Failed to get direct I/O port access.");
+    }
+  }
+#endif
+
+  /* Drop privileges (if installed setuid root - NOT RECOMMENDED).  */
+  setgid(getgid());
+  setuid(getuid());
+
+#ifdef NO_DIRECT_IO
+  if ((val = GetCmdParam("-dlpt")) != NULL) {
+    ppdev_name = val;
+  }
+#endif
+
+  if (ppdev_name) {
+    if (pa_type_is_serial) {
+      ppdev_fd = open(ppdev_name, O_RDWR | O_NOCTTY | O_NONBLOCK);
+      if (ppdev_fd != -1) {
+	struct termios pmode;
+
+	tcgetattr(ppdev_fd, &pmode);
+	saved_modes = pmode;
+
+	cfmakeraw(&pmode);
+	pmode.c_iflag &= ~(INPCK | IXOFF | IXON);
+	pmode.c_cflag &= ~(HUPCL | CSTOPB | CRTSCTS);
+	pmode.c_cflag |= (CLOCAL | CREAD);
+	pmode.c_cc [VMIN] = 1;
+	pmode.c_cc [VTIME] = 0;
+
+	tcsetattr(ppdev_fd, TCSANOW, &pmode);
+
+	/* Clear O_NONBLOCK flag.  */
+	int flags = fcntl(ppdev_fd, F_GETFL, 0);
+	if (flags == -1) { throw Error_C("Can not get flags"); }
+	flags &= ~O_NONBLOCK;
+	if (fcntl(ppdev_fd, F_SETFL, flags) == -1) { 
+          throw Error_C("Can not clear nonblock flag");
+        }
+      }
+    } else {
+      ppdev_fd = open(ppdev_name, O_RDWR, 0);
+    }
+    if (ppdev_fd == -1) {
+      perror(ppdev_name);
+      throw Error_Device("Failed to open ppdev.");
+    }
+    if (!pa_type_is_serial && par_claim(ppdev_fd) != 0) {
+      perror("ioctl PPCLAIM");
+      close(ppdev_fd);
+      ppdev_fd = -1;
+      throw Error_Device("Failed to claim ppdev.");
+    }
+  }
+  t_sck = SCK_DELAY;
+  if (pa_type_is_serial)
+    t_sck *= 3;  /* more delay for slow RS232 drivers */
+  val = GetCmdParam("-dt_sck");
+  if (val)
+    t_sck = strtol(val, NULL, 0);
+
+  sck_invert = 0;
+  mosi_invert = 0;
+  miso_invert = 0;
+  reset_invert = 0;
+  if ((val=GetCmdParam("-dinvert")))
+    {
+#define MAXLINESIZE    256
+      char temp[MAXLINESIZE];
+      char * p;
+      strncpy(temp, val, MAXLINESIZE-1);
+      temp[MAXLINESIZE-1] = '\0';
+      for (p=temp; *p; p++)
+        *p=toupper(*p);
+      Info(3, "Inverting %s\n",temp);
+      if (strstr(temp,"SCK"))
+        sck_invert=1;
+
+      if (strstr(temp,"MOSI"))
+        mosi_invert=1;
+
+      if (strstr(temp,"MISO"))
+        miso_invert=1;
+
+      if (strstr(temp,"RESET"))
+        reset_invert=1;
+    }
+
+  reset_high_time = RESET_HIGH_TIME;
+  if ((val=GetCmdParam("-dt_reset")))
+    {
+      reset_high_time = atoi(val);
+    }
+  Info(3, "Reset inactive time (t_reset) %d us\n", reset_high_time);
+
+  Init();
+}
+
+TDAPA::~TDAPA()
+{
+  OutData(1); SckDelay();
+  OutSck(1); SckDelay();
+  OutEnaSck(0);
+  OutReset(1);
+  OutEnaReset(0);
+
+  if (ppdev_fd != -1) {
+    if (pa_type_is_serial)
+      tcsetattr(ppdev_fd, TCSADRAIN, &saved_modes);
+    else
+      par_release(ppdev_fd);
+    close(ppdev_fd);
+    ppdev_fd = -1;
+  } else
+    (void) ioport_disable(IOBASE, IOSIZE);
+}
+
+#endif
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/DAPA.h b/tools/platforms/mica/uisp/src/DAPA.h
new file mode 100644
index 00000000..96edd20c
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/DAPA.h
@@ -0,0 +1,101 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+  DAPA.h
+  
+  Direct AVR Parallel Access
+  
+  (c) copyright 1997, Uros Platise  
+*/
+
+#ifndef __DAPA
+#define __DAPA
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Error.h"
+
+class TDAPA {
+public:
+  enum TPaType{	PAT_DAPA, PAT_STK200, PAT_ABB, PAT_AVRISP, PAT_BSD,
+		PAT_FBPRG, PAT_DT006, PAT_ETT, PAT_MAXI, PAT_XIL,
+		PAT_DASA, PAT_DASA2, PAT_DAPA_2 };
+
+private:
+  int mosi_invert;
+  int miso_invert;
+  int sck_invert;
+  int reset_invert;
+  int reset_high_time;
+  int parport_base;
+  int ppdev_fd;
+  long t_sck;
+  TPaType pa_type;
+  bool pa_type_is_serial;  /* not ppdev/ppi */
+  struct termios saved_modes;
+  unsigned char par_data, par_ctrl;  /* write */
+  unsigned char par_status;  /* read */
+  unsigned int ser_ctrl;  /* TIOCMGET/TIOCMSET */
+
+private:
+  int SendRecv(int);
+  /* low level access to parallel port lines */
+  void OutReset(int);
+  void OutSck(int);
+  void OutData(int);
+  void SckDelay();
+  int InData();
+  void OutEnaReset(int);
+  void OutEnaSck(int);
+
+  void ParportSetDir(int);
+  void ParportWriteCtrl();
+  void ParportWriteData();
+  void ParportReadStatus();
+
+  void SerialReadCtrl();
+  void SerialWriteCtrl();
+
+public:
+  /* If enable command 0x53 did not echo back, give a positive SCK
+     pulse and retry again.
+  */
+  void PulseSck();
+  void PulseReset();
+  void Init();
+  int Send(unsigned char*, int, int rec_queueSize=-1);
+  void Delay_usec(long);
+
+  TDAPA();
+  ~TDAPA();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Error.h b/tools/platforms/mica/uisp/src/Error.h
new file mode 100644
index 00000000..5be80fca
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Error.h
@@ -0,0 +1,68 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+** Error.h
+** Uros Platise, (c) 1997, November
+*/
+
+#ifndef __Error
+#define __Error
+#include 
+
+/* This error class is used to express standard C errors. */
+class Error_C {
+ public:
+  Error_C (const char* _arg) : arg(_arg) { }
+  void print (void) {
+    if (arg != NULL) { printf (" -> %s\n", arg); }
+  }
+ private:
+    const char *arg;
+};
+
+/* Out of memory error class informs terminal or upload/download
+   tools that it has gone out of valid memory - and that's all.
+   Program should not terminate. */
+class Error_MemoryRange {};
+
+/* General internal error reporting class that normally force
+   uisp to exit after proper destruction of all objects. */
+class Error_Device {
+public:
+  Error_Device (const char *_errMsg, const char *_arg=NULL) : 
+    errMsg(_errMsg), arg(_arg) { }
+  void print () { 
+    if (arg==NULL) { printf ("%s\n", errMsg); }
+    else { printf ("%s: %s\n", errMsg, arg); }
+  }
+private:
+  const char* errMsg;
+  const char* arg;
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Global.h b/tools/platforms/mica/uisp/src/Global.h
new file mode 100644
index 00000000..dd7ca421
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Global.h
@@ -0,0 +1,141 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Global.h, Uros Platise (c) 1999 */
+
+#ifndef __GLOBAL
+#define __GLOBAL
+
+#include 
+#include 
+
+typedef unsigned char TByte;
+typedef unsigned TAddr;
+
+
+/* Smart Pointer Class 
+*/
+template 
+class TPt{
+private:
+  TRec* Addr;
+  void MkRef(){if (Addr!=NULL){Addr->CRef++;}}
+  void UnRef(){if (Addr!=NULL){Addr->CRef--;if (Addr->CRef==0){delete Addr;}}}
+public:
+  TPt():Addr(NULL){}
+  TPt(TRec* _Addr): Addr(_Addr){MkRef();}
+  TPt(const TPt& Pt): Addr(Pt.Addr){MkRef();}
+  ~TPt(){UnRef();}
+
+  TPt& operator=(const TPt& Pt){
+    if (this!=&Pt){UnRef(); Addr=Pt.Addr; MkRef();} return *this;}
+  TPt& operator=(TRec* _Addr){
+    if (Addr!=_Addr){UnRef();Addr=_Addr;MkRef();} return *this;}
+  bool operator==(const TPt& Pt) const {return Addr==Pt.Addr;}
+
+  TRec* operator->() const {assert(Addr!=NULL); return Addr;}
+  TRec& operator*() const {assert(Addr!=NULL); return *Addr;}
+  TRec& operator[](int RecN) const {assert(Addr!=NULL); return Addr[RecN];}
+  TRec* operator()() const {return Addr;}
+  
+  /* think once more! */
+  bool operator<(const TPt& Pt){return Addr < Pt.Addr;}
+};
+
+
+class TDevice{
+private:
+  int CRef;
+  
+public:
+  /* Set active segment. 
+     Returns true if segment exists, otherwise false 
+  */
+  virtual bool SetSegment(const char* segment_name)=0;
+  
+  /* Returns char pointer of current active segment name.
+  */
+  virtual const char* TellActiveSegment()=0;
+
+  /* Returns char pointer of the indexed segment name.
+     Index is in range [0,no_of_segments].
+     When index is out of range NULL is returned.
+  */
+  virtual const char* ListSegment(unsigned index)=0;
+
+  virtual TAddr GetSegmentSize()=0;
+
+  /* Read byte from active segment at address addr. */
+  virtual TByte ReadByte(TAddr addr)=0;
+  
+  /* Read byte description at address addr (as security bits) */
+  virtual const char* ReadByteDescription(TAddr addr)=0;
+  
+  /* Write byte to active segment at address addr */
+  virtual void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true)=0;
+  virtual void FlushWriteBuffer(){}
+  
+  /* Chip Erase */
+  virtual void ChipErase()=0;
+
+  /* lock bits */
+  virtual void WriteLockBits(TByte bits)=0;
+  virtual TByte ReadLockBits(){return 0;}
+  
+  /* Transfer Statistics in Bytes/Seconds */
+  virtual unsigned int GetPollCount(){return 0;}
+  virtual float GetMinPollTime(){return 0;}
+  virtual float GetTotPollTime(){return 0;}
+  virtual float GetMaxPollTime(){return 0;}
+  virtual void ResetMinMax(){}
+  
+  TDevice():CRef(0){}
+  virtual ~TDevice(){}
+  
+  friend class TPt;
+};
+
+typedef TPt PDevice;
+
+extern PDevice device;
+
+/* Find command line parameter's value.
+   It searches the command line parameters of the form:
+   
+	argv_name=value
+	
+   Returns pointer to the value. 
+*/
+const char* GetCmdParam(const char* argv_name, bool value_required=true);
+
+
+/* Print Status Information to the Standard Error Output.
+*/
+bool Info(unsigned _verbose_level, const char* fmt, ...)
+  __attribute__((format (printf, 2, 3)));
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Main.C b/tools/platforms/mica/uisp/src/Main.C
new file mode 100644
index 00000000..b7eeb54a
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Main.C
@@ -0,0 +1,453 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+  Main.C
+
+  Micro In-System Programmer
+  Uros Platise (C) 1997-1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Terminal.h"
+#include "MotIntl.h"
+#include "AvrAtmel.h"
+#include "Stk500.h"
+#include "AvrStargate.h"
+#ifndef NO_DAPA
+# include "AvrDummy.h"
+#endif
+
+/* Globals
+*/
+
+int argc;
+const char** argv;
+char* argv_ok;
+unsigned verbose_level;
+
+PDevice device;
+TMotIntl motintl;
+TTerminal terminal;
+
+const char* version = "uisp version %s\n"
+"(C) 1997-1999 Uros Platise, 2000-2003 Marek Michalkiewicz\n"
+"(c) 2003-2005 Philip Buonadonna, Intel Corporation\n"
+"(c) 2003           ,        Crossbow Technology\n"
+"\nuisp is free software, covered by the GNU General Public License.\n"
+"You are welcome to change it and/or distribute copies of it under\n"
+"the conditions of the GNU General Public License.\n\n";
+
+const char* help_screen =
+"Syntax: uisp [-v{=level}] [-h] [--help] [--version] [--hash=perbytes]\n"
+"             [-dprog=avr910|pavr|stk500|mib510|stargate]"
+#ifndef NO_DAPA
+" [-dprog=type]\n"
+"             [-dlpt=address|/dev/parportX] [-dno-poll] [-dno-retry]\n"
+"             [-dvoltage=...] [-dt_sck=time] [-dt_wd_{flash|eeprom}=time]\n"
+"             [-dt_reset=time] [-dinvert=sck,mosi,miso,reset]"
+#endif
+"\n"
+"             [-dserial=device] [-dpart=name|no]\n"
+"             [-dspeed=1200|2400|4800|9600|19200|38400|57600|115200]"
+"\n"
+"             [--upload] [--verify] [--erase] [if=input_file]\n"
+"             [--download] [of=output_file]\n"
+"             [--segment=flash|eeprom|fuse] [--terminal]\n"
+"             [--rd_fuses] [--wr_fuse_l=byte] [--wr_fuse_h=byte]\n"
+"             [--wr_fuse_e=byte] [--wr_lock=byte]\n\n"
+"Programming Methods:\n"
+"  -dprog=avr910    Standard Atmel Serial Programmer/Atmel Low Cost Programmer\n"
+"         pavr      http://www.avr1.org/pavr/pavr.html\n"
+"         stk500    Atmel STK500 or Atmel ATAVRISP\n"
+"         mib510    Crossbow MIB510 (for Atmega128, 115200 baud serial only) \n"
+"         stargate  PXA Based Stargate \n"
+#ifndef NO_DAPA
+"  -dprog=dapa|stk200|abb|avrisp|bsd|fbprg|dt006|maxi|xil|dasa|dasa2\n"
+"       Programmer type:\n"
+"         dapa      Direct AVR Parallel Access\n"
+"         stk200    Parallel Starter Kit STK200, STK300\n"
+"         abb       Altera ByteBlasterMV Parallel Port Download Cable\n"
+"         avrisp    Atmel AVR ISP (?)\n"
+"         bsd       http://www.bsdhome.com/avrdude/ (parallel)\n"
+"         fbprg     http://ln.com.ua/~real/avreal/adapters.html (parallel)\n"
+"         dt006     http://www.dontronics.com/dt006.html (parallel)\n"
+"         maxi      Investment Technologies Maxi (parallel)\n"
+"         xil       Xilinx HW-JTAG-PC Cable (parallel)\n"
+"         ett       ETT AVR Programmer V2.0 [from Futurlec] (parallel)\n"
+"         dasa      serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)\n"
+"         dasa2     serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)\n"
+"\n"
+"Target Device Selection:\n"
+"  -dpart       Set  target abbreviated name or number. For some programmers, if\n"
+"               -dpart is not given programmer's supported devices  are  listed.\n"
+"               Set  -dpart=auto for auto-select. Auto-select does not work with\n"
+"               all programmers, so it is recommended to always specify a target\n"
+"               device explicitly.\n"
+"\n"
+"Parallel Device Settings:\n"
+"  -dlpt=       specify device name (Linux ppdev, FreeBSD ppi, serial)\n"
+#ifndef NO_DIRECT_IO
+"               or direct I/O parallel port address (0x378, 0x278, 0x3BC)\n"
+#endif
+"  -dno-poll    Program without data polling (a little slower)\n"
+"  -dno-retry   Disable retries of program enable command\n"
+"  -dvoltage    Set timing specs according to the power supply voltage in [V]\n"
+"               (default 3.0)\n"
+"  -dt_sck      Set minimum SCK high/low time in micro-seconds (default 5)\n"
+"  -dt_wd_flash Set FLASH maximum write delay time in micro-seconds\n"
+"  -dt_wd_eeprom Set EEPROM maximum write delay time in micro-seconds\n"
+"  -dt_reset    Set reset inactive (high) time in micro-seconds\n"
+"  -dinvert=... Invert specified lines\n"
+"               Use -v=3 option to see current settings.\n"
+#endif
+"\n"
+"Atmel Low Cost Programmer Serial Device Settings:\n"
+"  -dserial     Set serial interface as /dev/ttyS* (default /dev/avr)\n"
+"  -dspeed      Set speed of the serial interface (default 19200)\n"
+"  -dhost       IP Address or hostname of serial server. This option\n"
+"               overrides the -dserial option\n"
+"  -dport       Port number of the serial server (default 10001)\n"
+"\n"
+"Stk500 specific options:\n"
+"  -dparallel   Use Hi-V parallel programming instead of serial (default is\n"
+"               serial)\n"
+"  --rd_aref    Read the ARef Voltage. Note that due to a bug in the\n"
+"               stk500 firmware, the read value is sometimes off by 0.1\n"
+"               from the actual value measured with a volt meter.\n"
+"  --rd_vtg     Read the Vtarget Voltage. Note that due to a bug in the\n"
+"               stk500 firmware, the read value is sometimes off by 0.1\n"
+"               from the actual value measured with a volt meter.\n"
+"  --wr_aref    Set the ARef Voltage. Valid values are 0.0 to 6.0 volts in\n"
+"               0.1 volt increments. Value can not be larger than the\n"
+"               VTarget value.\n"
+"  --wr_vtg     Set the VTarget Voltage. Valid values are 0.0 to 6.0 volts in\n"
+"               0.1 volt increments. Value can not be smaller than the\n"
+"               ARef value.\n"
+"\n"
+"Functions:\n"
+"  --upload     Upload \"input_file\" to the AVR memory.\n"
+"  --verify     Verify \"input_file\" (processed after the --upload opt.)\n"
+"  --download   Download AVR memory to \"output_file\" or stdout.\n"
+"  --erase      Erase device.\n"
+"  --segment    Set active segment (auto-select for AVA Motorola output)\n"
+"\n"
+"Fuse/Lock Bit Operations:\n"
+"  --rd_fuses   Read all fuses and print values to stdout\n"
+"  --wr_fuse_l  Write fuse low byte\n"
+"  --wr_fuse_h  Write fuse high byte\n"
+"  --wr_fuse_e  Write fuse extended byte\n"
+"  --wr_lock    Write lock bits. Argument is a byte where each bit is:\n"
+"                   Bit5 -> blb12\n"
+"                   Bit4 -> blb11\n"
+"                   Bit3 -> blb02\n"
+"                   Bit2 -> blb01\n"
+"                   Bit1 -> lb2\n"
+"                   Bit0 -> lb1\n"
+"  --lock       Write lock bits [old method; deprecated].\n" 
+"\n"
+"Files:\n"
+"  if           Input file for the --upload and --verify functions in\n"
+"               Motorola S-records (S1 or S2) or 16 bit Intel format\n"
+"  of           Output file for the --download function in\n"
+"               Motorola S-records format, default is standard output\n"
+"\n"
+"Other Options:\n"
+"  -v           Set verbose level (-v equals -v=2, min/max: 0/4, default 1)\n"
+"  --hash       Print hash (default is 32 bytes)\n"
+"  --help -h    Help\n"
+"  --version    Print version information\n"
+"  --terminal   Invoke shell-like terminal\n"
+"\n"
+"Report bugs to: Maintainers \n"
+"Updates:        http://savannah.nongnu.org/projects/uisp\n";
+
+
+/* Find command line parameter's value.
+   It searches the command line parameters of the form:
+   
+	argv_name=value
+	
+   Returns pointer to the value. 
+*/
+const char* GetCmdParam(const char* argv_name, bool value_required)
+{
+  int argv_name_len = strlen(argv_name);
+  for (int i=1; i verbose_level){return false;}
+  va_list ap;
+  va_start(ap,fmt); 
+  vfprintf(stderr,fmt,ap);
+  va_end(ap);
+  return true;
+}
+
+static void cleanup_exception() {
+  fprintf(stderr, "problem during cleanup - exiting\n");
+  _exit(2);
+}
+
+int main(int _argc, const char* _argv[]){
+  int return_val=0;
+  argc = _argc;
+  argv = _argv;
+  verbose_level=1;  
+  
+  if (argc==1){
+    Info(0, "%s: No commands specified. "
+         "Try '%s --help' for list of commands.\n",
+         argv[0], argv[0]);
+    exit(1);
+  }  
+  argv_ok = (char *)malloc(argc);
+  for (int i=1; iSetSegment(val)){
+	Info(0, "--segment=%s: bad segment name\n", val);
+      }
+    }
+
+    	/* Device Operations: */
+
+    if (GetCmdParam("--download", false)) {
+      motintl.Write(GetCmdParam("of"));
+    }
+
+    if (GetCmdParam("--erase", false)){device->ChipErase();}
+
+    /* Input file */
+    if ((val=GetCmdParam("if"))) {
+      if (GetCmdParam("--upload", false)){motintl.Read(val, true, false);}
+      if (GetCmdParam("--verify", false)){motintl.Read(val, false, true);}
+    }
+
+    if (GetCmdParam("--rd_fuses",false))
+    {
+      TByte bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      printf("\n");
+      printf("Fuse Low Byte      = 0x%02x\n", device->ReadByte(AVR_FUSE_LOW_ADDR));
+      printf("Fuse High Byte     = 0x%02x\n", device->ReadByte(AVR_FUSE_HIGH_ADDR));
+      printf("Fuse Extended Byte = 0x%02x\n", device->ReadByte(AVR_FUSE_EXT_ADDR));
+      printf("Calibration Byte   = 0x%02x  --  Read Only\n",
+             device->ReadByte(AVR_CAL_ADDR));
+
+      bits = device->ReadByte(AVR_LOCK_ADDR);
+      printf("Lock Bits          = 0x%02x\n", bits);
+      printf("    BLB12 -> %d\n", ((bits & BLB12) == BLB12));
+      printf("    BLB11 -> %d\n", ((bits & BLB11) == BLB11));
+      printf("    BLB02 -> %d\n", ((bits & BLB02) == BLB02));
+      printf("    BLB01 -> %d\n", ((bits & BLB01) == BLB01));
+      printf("      LB2 -> %d\n", ((bits & LB2) == LB2));
+      printf("      LB1 -> %d\n", ((bits & LB1) == LB1));
+
+      printf("\n");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_l")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_LOW_ADDR, (TByte)bits );
+        printf("\nFuse Low Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_l.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_h")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_HIGH_ADDR, (TByte)bits );
+        printf("\nFuse High Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_h.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_e")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_EXT_ADDR, (TByte)bits );
+        printf("\nFuse Extended Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_e.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_lock")) != NULL)
+    {
+      unsigned int bits;
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteLockBits( (TByte)bits );
+        printf("\nLock Bits set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_lock.");
+    }
+
+    if (GetCmdParam("--lock", false))
+    {
+      Info(0, "NOTE: '--lock' is deprecated. Used '--wr_lock' instead.\n");
+      device->WriteLockBits(0xFC);
+      printf("\nLock Bits set to 0x%02x\n", 0xfc);
+    }
+
+    	/* enter terminal */ 
+	
+    if (GetCmdParam("--terminal", false)){terminal.Run();}
+    
+    /* Check bad command line parameters */
+    for (int i=1; i -Werror removed
+
+AM_CXXFLAGS          = -Wall
+
+bin_PROGRAMS         = uisp
+uisp_SOURCES         = \
+	Avr.C              \
+	Avr.h              \
+	AvrAtmel.C         \
+	AvrAtmel.h         \
+	AvrDummy.C         \
+	AvrDummy.h         \
+	AvrStargate.C      \
+	AvrStargate.h      \
+	DAPA.C             \
+	DAPA.h             \
+	Error.h            \
+	Global.h           \
+	Main.C             \
+	MotIntl.C          \
+	MotIntl.h          \
+	SASA.C             \
+	SASA.h	           \
+	Serial.C           \
+	Serial.h           \
+	Stk500.C           \
+	Stk500.h           \
+	Terminal.C         \
+	Terminal.h         \
+	cygwinp.C          \
+	cygwinp.h          \
+	parport.h          \
+	ppdev.h            \
+	timeradd.h
diff --git a/tools/platforms/mica/uisp/src/MotIntl.C b/tools/platforms/mica/uisp/src/MotIntl.C
new file mode 100644
index 00000000..d57aeb02
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/MotIntl.C
@@ -0,0 +1,481 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* 
+	MotIntl.C
+	
+	Motorola and Intel Uploading/Downloading Routines
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+#include "timeradd.h"
+#include "Global.h"
+#include "Error.h"
+#include "MotIntl.h"
+
+TByte TMotIntl::Htoi(const char* p){
+  unsigned char val = 0;
+
+  if (*p>='0' && *p<='9')
+    val += *p-'0';
+  else if (*p>='A' && *p<='F')
+    val += *p-'A'+10;
+  else if (*p>='a' && *p<='f')
+    val += *p-'a'+10;
+  else
+    throw Error_Device("Bad file format.");
+
+  val <<= 4; p++;    
+
+  if (*p>='0' && *p<='9')
+    val += *p-'0';
+  else if (*p>='A' && *p<='F')
+    val += *p-'A'+10;
+  else if (*p>='a' && *p<='f')
+    val += *p-'a'+10;
+  else
+    throw Error_Device("Bad file format.");
+
+  cc_sum += val;
+  return val;
+}
+
+void TMotIntl::InfoOperation(const char* prefix, const char* seg_name){
+  Info(1, "%s", prefix);
+  if (!upload && !verify) { Info(1, "Downloading"); }
+  if (upload){Info(1, "Uploading");}
+  if (upload && verify){Info(1, "/");}
+  if (verify){Info(1, "Verifying");}
+  Info(1, ": %s\n", seg_name);
+}
+
+void
+TMotIntl::ReportStats(float elapsed, TAddr total_bytes)
+{
+  float rate = (float)total_bytes / elapsed;
+  Info(2, "\n(total %u bytes transferred in %.2f s (%.0f bytes/s)\n",
+       total_bytes, elapsed, rate);
+  if (upload) {
+    unsigned int total_polled = device->GetPollCount();
+    if (total_polled) {
+      float min_poll_time = device->GetMinPollTime() * 1000.0;
+      float max_poll_time = device->GetMaxPollTime() * 1000.0;
+      float avg_poll_time = device->GetTotPollTime() * (1000.0 / total_polled);
+      Info(2, "Polling: count = %u, min/avg/max = %.2f/%.2f/%.2f ms\n",
+	   total_polled, min_poll_time, avg_poll_time, max_poll_time);
+    }
+  }
+}
+
+void TMotIntl::UploadMotorola(){
+  unsigned char srec_len, buf_len, srec_cc_sum;
+  char seg_name[256];   /* data field length is a byte, so this is safe */
+  char* p;		/* line buffer pointer */
+  TAddr addr;
+  TAddr total_bytes_uploaded=0;
+  TAddr hash_cnt=0;
+  TByte byte;
+  struct timeval t1, t2;
+  
+  device->ResetMinMax();
+  
+  do{
+    /* convert to upper case */
+    buf_len = strlen(line_buf);
+    for (int i=0;i MI_LINEBUF_SIZE)
+        throw ("Bad Motorola file format.");
+    
+    /* Load address */
+    addr = Htoi(p); p+=2; addr <<= 8;
+    addr += Htoi(p); p+=2;
+    
+    switch(line_buf[1]){
+    case '0':{    
+	/* Load segment name */
+        int i;
+	for (i=0;iSetSegment(seg_name)){InfoOperation("Auto-", seg_name);}
+	else{InfoOperation("", device->TellActiveSegment());}
+	
+	/* Print first hash */
+	if (device->GetSegmentSize() >= 16)
+	  Info(2, "#");
+	hash_cnt=0;
+	
+	/* Set statistic variables */	
+	total_bytes_uploaded = 0;
+	gettimeofday(&t1, NULL);
+      } break;
+
+    /* 4 byte address */
+    case '3':
+        addr <<= 8; addr += Htoi(p); p+=2;
+	srec_len--;
+        /* Note that we fall through. */
+
+    /* 3 byte address */	
+    case '2':
+        addr <<= 8; addr += Htoi(p); p+=2;
+	srec_len--;
+        /* Note that we fall through. */
+	
+    /* 2 byte address */
+    case '1':{
+	/* Upload/Verify bytes */
+	total_bytes_uploaded += srec_len;
+	while(srec_len-->0){
+	  byte = Htoi(p);
+	  if (upload){device->WriteByte(addr, byte, false);}
+	  if (verify){
+	    TByte rbyte = device->ReadByte(addr);
+	    if (rbyte != byte){
+	      Info(0, "%s error at address 0x%x: file=0x%02x, mem=0x%02x\n",
+	        device->TellActiveSegment(), addr, 
+		(int) byte, (int) rbyte);
+	    }
+	  }	  
+	  p+=2; addr++;
+	  if (total_bytes_uploaded >= hash_cnt+hash_marker){
+	    Info(2, "#");
+	    hash_cnt+=hash_marker;
+	  }
+	}
+      } break;
+
+    case '7':
+    case '8':
+    case '9':{
+        if (upload){device->FlushWriteBuffer();}
+	gettimeofday(&t2, NULL);
+	timersub(&t2, &t1, &t2);
+	float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+	ReportStats(elapsed, total_bytes_uploaded);
+
+        /* verify check sum */
+	for (int i=0;iTellActiveSegment());
+  
+  /* Print first hash */
+  if (device->GetSegmentSize() >= 16)
+    Info(2, "#");
+  
+  /* Set statistic variables */	
+  total_bytes_uploaded = 0;
+  gettimeofday(&t1, NULL);
+
+  device->ResetMinMax();
+
+  do{
+    /* convert to upper case */
+    buf_len = strlen(line_buf);
+    for (int i=0;i MI_LINEBUF_SIZE)
+        throw ("Bad Intel file format.");
+    
+    /* Load address */
+    addr = Htoi(p); p+=2; addr <<= 8;
+    addr += Htoi(p); p+=2;
+    rec_type = Htoi(p); p+=2;   /* read control byte: 00-data, 01-end, 02-seg_offset */
+
+    addr += seg_offset;         /* this allows access to more than 64K */
+
+    switch(rec_type)
+      {
+      case 0x00:{
+        /* Upload/Verify bytes */
+        total_bytes_uploaded += ihex_len;
+        while(ihex_len-->0){
+          byte = Htoi(p);
+          if (upload){device->WriteByte(addr, byte, false);}
+          if (verify){
+            TByte rbyte = device->ReadByte(addr);
+            if (rbyte != byte){
+              Info(0, "%s error at address 0x%x: file=0x%02x, mem=0x%02x\n",
+                   device->TellActiveSegment(), addr, 
+                   (int) byte, (int) rbyte);
+            }
+          }
+          p+=2; addr++;
+          if (total_bytes_uploaded >= hash_cnt+hash_marker){
+            Info(2, "#");
+            hash_cnt+=hash_marker;
+          }
+        }
+      } break;
+
+      case 0x01:  /* end */
+      case 0x03:  /* start address record */
+      case 0x05:  /* start linear address record */
+        /* don't need to do anything, except calculate the checksum */
+        while (ihex_len-- > 0) {
+          byte = Htoi(p);
+          p += 2;
+        }
+        break;
+
+      case 0x02:{
+        seg_offset = Htoi(p); p+=2; seg_offset <<=8;
+        seg_offset += Htoi(p); p+=2;
+
+        /* seg_offset is bits 4-19 of addr, so shift to that. */
+        seg_offset <<=4;
+      } break;
+
+      case 0x04: /* extended linear address record */
+	seg_offset = Htoi(p); p += 2; seg_offset <<= 8;
+	seg_offset += Htoi(p); p += 2;
+	seg_offset <<= 16;
+	break;
+
+      default: throw Error_Device("Bad Intel Hex record.\n");
+      }
+    
+    /* Read Check Sum and give a report */
+    ihex_cc_sum = Htoi(p);
+    if (cc_sum != 0x0){
+      Info(2, "Intel check sum: %d   uisp check sum: %d\n",
+        (unsigned)ihex_cc_sum, (unsigned)cc_sum);
+      throw Error_Device("Check sum error.\n");
+    }
+    
+  
+  } while(fgets(line_buf, MI_LINEBUF_SIZE, fd)!=NULL);
+  
+  if (upload){device->FlushWriteBuffer();}  
+  
+  /* Print transfer statistics */        
+  gettimeofday(&t2, NULL);  
+  timersub(&t2, &t1, &t2);
+  float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+  ReportStats(elapsed, total_bytes_uploaded);
+}
+
+void TMotIntl::Read(const char* filename, bool _upload, bool _verify){
+  upload = _upload;
+  verify = _verify;
+  if ((fd=fopen(filename,"rt"))==NULL){
+    throw Error_C(filename);
+  }
+  
+  /* Set-up Hash Marker */
+  const char* val = GetCmdParam("--hash");
+  if (val!=NULL){hash_marker = atoi(val);}  
+  
+  /* auto-detect Motorola or Intel file format */
+  fgets(line_buf, MI_LINEBUF_SIZE, fd);
+  if (strncasecmp(line_buf, "S0", 2)==0){UploadMotorola();}
+  else if (line_buf[0]==':'){UploadIntel();}
+  else {throw Error_Device("Unknown file format.");}  
+  
+  fclose(fd);
+}
+
+void
+TMotIntl::SrecWrite(unsigned int type, const unsigned char *buf,
+		    unsigned int len)
+{
+  unsigned i, sum;
+
+  fprintf(fd, "S%01X%02X", type, len + 1);
+  sum = len + 1;
+  for (i = 0; i < len; i++) {
+    sum += buf[i];
+    fprintf(fd, "%02X", (unsigned int) buf[i]);
+  }
+  fprintf(fd, "%02X\r\n", (unsigned int)(~sum & 0xFF));
+}
+
+void
+TMotIntl::DownloadMotorola()
+{
+  /* A short description of S-Records may be found at 
+     http://www.ndsu.nodak.edu/instruct/tareski/373f98/notes/srecord.htm
+  */
+  TAddr addr, size;
+  TAddr total_bytes_uploaded=0;
+  TAddr hash_cnt=0;
+  struct timeval t1, t2;
+  unsigned char buf[40];
+  const char *seg;
+  int s5count=0;
+
+  seg = device->TellActiveSegment();
+  InfoOperation("", seg);
+  
+  /* Set statistic variables */	
+  total_bytes_uploaded = 0;
+  gettimeofday(&t1, NULL);
+
+  device->ResetMinMax();
+
+  size = device->GetSegmentSize();
+
+  /* Print first hash (except for fuse bits) */
+  if (size >= 16)
+    Info(2, "#");
+
+  buf[0] = 0;
+  buf[1] = 0;
+  strncpy((char *) buf+2, seg, 16);
+  buf[18] = 0;
+  SrecWrite(0, buf, 2 + strlen((const char *) buf + 2));
+
+  for (addr = 0; addr < size; addr += 16) {
+    int i, len;
+
+    len = size - addr;
+    if (len > 16)
+      len = 16;
+    buf[0] = (addr >> 24) & 0xFF;
+    buf[1] = (addr >> 16) & 0xFF;
+    buf[2] = (addr >> 8) & 0xFF;
+    buf[3] = addr & 0xFF;
+    for (i = 0; i < len; i++) {
+      TByte rbyte = device->ReadByte(addr + i);
+      buf[4 + i] = rbyte;
+      total_bytes_uploaded++;
+      if (total_bytes_uploaded >= hash_cnt + hash_marker) {
+	Info(2, "#");
+	hash_cnt += hash_marker;
+      }
+    }
+    if (addr < 0x10000)
+      SrecWrite(1, buf + 2, 2 + len);
+    else if (addr < 0x1000000)
+      SrecWrite(2, buf + 1, 3 + len);
+    else
+      SrecWrite(3, buf    , 4 + len);
+    s5count++;
+  }
+  /* number of S1/2/3 records written */
+  buf[0] = (s5count >> 8) & 0xFF;
+  buf[1] = s5count & 0xFF;
+  SrecWrite(5, buf, 2 );
+
+  /* starting address is 0 */
+  buf[0] = 0;
+  buf[1] = 0;
+  buf[2] = 0;
+  buf[3] = 0;
+  if (addr < 0x10000)
+    SrecWrite(9, buf+2, 2 );
+  else if (addr < 0x1000000)
+    SrecWrite(8, buf+1, 3);
+  else
+    SrecWrite(7, buf, 4);
+
+  /* Print transfer statistics */        
+  gettimeofday(&t2, NULL);  
+  timersub(&t2, &t1, &t2);
+  float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+  ReportStats(elapsed, total_bytes_uploaded);
+}
+
+void
+TMotIntl::Write(const char *filename)
+{
+  if (filename) {
+    fd = fopen(filename, "wb");
+    if (!fd) {
+      throw Error_C(filename);
+    }
+    DownloadMotorola();
+    fclose(fd);
+  } else {
+    fd = stdout;
+    DownloadMotorola();
+  }
+}
+
+TMotIntl::TMotIntl():
+  hash_marker(32){
+}
diff --git a/tools/platforms/mica/uisp/src/MotIntl.h b/tools/platforms/mica/uisp/src/MotIntl.h
new file mode 100644
index 00000000..3118efc0
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/MotIntl.h
@@ -0,0 +1,72 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* 
+	MotIntl.h
+	
+	Motorola and Intel Uploading/Downloading Routines
+	Uros Platise (c) 1999
+*/
+
+#ifndef __MOTINTL
+#define __MOTINTL
+
+#include 
+#include "Global.h"
+
+#define MI_LINEBUF_SIZE	128
+
+class TMotIntl{
+public:
+  enum TFormatType{TF_MOTOROLA, TF_INTEL};
+
+private:
+  char line_buf [MI_LINEBUF_SIZE];
+  unsigned char cc_sum;
+  unsigned int hash_marker;
+  FILE* fd;
+  bool upload, verify;
+
+  TByte Htoi(const char* p);
+  void InfoOperation(const char* prefix, const char* seg_name);
+  void ReportStats(float, TAddr);
+  void UploadMotorola();
+  void UploadIntel();
+  void SrecWrite(unsigned int, const unsigned char *, unsigned int);
+  void DownloadMotorola();
+
+public:
+  void Read(const char* filename, bool _upload, bool _verify);
+  void Write(const char *filename);
+
+  TMotIntl();
+  ~TMotIntl(){}
+};
+
+extern TMotIntl motintl;
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/SASA.C b/tools/platforms/mica/uisp/src/SASA.C
new file mode 100644
index 00000000..dc54fab3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/SASA.C
@@ -0,0 +1,211 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Sergey Larin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+
+ ****************************************************************************
+ */
+
+/*
+	SASA.C
+
+	Stargate AVR SSP Access (SASA)
+	
+	Phil Buonadonna (c) 2003
+*/
+
+//#define DEBUG
+//#define DEBUG1
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+
+
+#include 
+#include 
+#include 
+#include 
+
+#include "timeradd.h"
+#include "Global.h"
+#include "Error.h"
+#include "SASA.h"
+#include "Avr.h"
+
+
+/* Default value for minimum SCK high/low time in microseconds.  */
+#ifndef SCK_DELAY
+#define SCK_DELAY 5
+#endif
+
+/* Minimum RESET# high time in microseconds.
+   Should be enough to charge a capacitor between RESET# and GND
+   (it is recommended to use a voltage detector with open collector
+   output, and only something like 100 nF for noise immunity).
+   Default value may be changed with -dt_reset=N microseconds.  */
+#ifndef RESET_HIGH_TIME
+#define RESET_HIGH_TIME 1000
+#endif
+
+/* Delay from RESET# low to sending program enable command
+   (the datasheet says it must be at least 20 ms).  Also wait time
+   for crystal oscillator to start after possible power down mode.  */
+#ifndef RESET_LOW_TIME
+#define RESET_LOW_TIME 30000
+#endif
+
+const char TSASA::dev_name[] = "/dev/ssp";
+
+void
+TSASA::SckDelay()
+{
+  Delay_usec(5);
+}
+
+#ifndef MIN_SLEEP_USEC
+#define MIN_SLEEP_USEC 20000
+#endif
+
+void
+TSASA::Delay_usec(long t)
+{
+  struct timeval t1, t2;
+  if (t <= 0)
+    return;  /* very short delay for slow machines */
+  gettimeofday(&t1, NULL);
+  if (t > MIN_SLEEP_USEC)
+    usleep(t - MIN_SLEEP_USEC);
+  /* loop for the remaining time */
+  t2.tv_sec = t / 1000000UL;
+  t2.tv_usec = t % 1000000UL;
+  timeradd(&t1, &t2, &t1);
+  do {
+    gettimeofday(&t2, NULL);
+  } while (timercmp(&t2, &t1, <));
+}
+
+void 
+TSASA::PulseSck()
+{
+
+  PulseReset();
+
+}
+
+void
+TSASA::PulseReset()
+{
+  close(dev_fd);
+
+  Delay_usec(1000);
+
+  dev_fd = open(dev_name, O_RDWR, 0);
+  if (dev_fd == -1) {
+    perror(dev_name);
+    throw Error_Device("Failed to reopen ppdev.");
+  }
+
+}
+
+void
+TSASA::Init()
+{
+  return;
+}
+
+unsigned char
+TSASA::SendRecv(unsigned char b)
+{
+  unsigned char received;
+
+  write(dev_fd,&b,1);
+  read(dev_fd,&received,1);
+
+  return received;
+}
+
+int
+TSASA::Send (unsigned char* queue, int queueSize, int rec_queueSize)
+{
+  unsigned char *p = queue, ch;
+  int i = queueSize;
+  
+  if (rec_queueSize==-1){rec_queueSize = queueSize;}
+#ifdef DEBUG
+  printf ("send(recv): ");
+#endif
+  while (i--){
+#ifdef DEBUG
+    printf ("%02X(", (unsigned int)*p);
+#endif    
+    ch = SendRecv(*p);
+#ifdef DEBUG    
+    printf ("%02X) ", (unsigned int)ch);
+#endif    
+    *p++ = ch;
+  }
+#ifdef DEBUG  
+  printf ("\n");
+#endif  
+  return queueSize;
+}
+
+
+TSASA::TSASA(): 
+  dev_fd(-1)
+{
+
+  /* Drop privileges (if installed setuid root - NOT RECOMMENDED).  */
+  setgid(getgid());
+  setuid(getuid());
+
+  dev_fd = open(dev_name, O_RDWR, 0);
+  if (dev_fd == -1) {
+    perror(dev_name);
+    throw Error_Device("Failed to open the SSP. Is the driver installed?");
+  }
+
+}
+
+TSASA::~TSASA()
+{
+
+  if (dev_fd != -1) {
+    close(dev_fd);
+    dev_fd = -1;
+  } 
+}
+
+
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/SASA.h b/tools/platforms/mica/uisp/src/SASA.h
new file mode 100644
index 00000000..d8e3a8c3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/SASA.h
@@ -0,0 +1,73 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ ****************************************************************************
+ */
+
+/*
+  SASA.h
+  
+  Stargate AVR SSP Access
+
+*/
+
+#ifndef __SASA
+#define __SASA
+
+#include 
+#include 
+#include 
+#include 
+#include "Error.h"
+
+class TSASA {
+
+private:
+  int dev_fd;
+  static const char dev_name[];
+
+private:
+  unsigned char SendRecv(unsigned char);
+  /* low level access to parallel port lines */
+  void SckDelay();
+
+public:
+  void PulseSck();
+  void PulseReset();
+  void Init();
+  int Send(unsigned char*, int, int rec_queueSize=-1);
+  void Delay_usec(long);
+
+  TSASA();
+  ~TSASA();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Serial.C b/tools/platforms/mica/uisp/src/Serial.C
new file mode 100644
index 00000000..4fdd8be2
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Serial.C
@@ -0,0 +1,267 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Serial.C
+	
+	Serial Interface
+	Uros Platise, (c) 1997-1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "Global.h"
+#include "Serial.h"
+
+int TSerial::Tx(unsigned char* queue, int queue_size)
+{
+  Info(4, "Transmit: { ");
+  for (int n=0; nh_addr,server->h_length);
+
+  const char* val;
+  if ((val = GetCmdParam("-dport"))) {
+    sPort = (short) atoi(val);
+  }
+  serv_addr.sin_port = htons(sPort);
+
+  if (connect(serline,(sockaddr *)&serv_addr,sizeof(serv_addr)) < 0) {
+    throw Error_Device("Error connecting to server.",GetCmdParam("-dhost"));
+  }
+
+  remote = true;
+}
+
+void TSerial::OpenPort() { 
+  struct termios pmode;
+  const char* dev_name = "/dev/avr";
+  const char* val;
+  speed_t speed = B19200;	/* default speed */
+  
+  struct TSpeed{
+    const char* arg;
+    speed_t speed;
+  };
+  const TSpeed speed_array[] = {
+    {"1200", B1200},
+    {"2400", B2400},
+    {"4800", B4800},
+    {"9600", B9600},
+    {"19200", B19200},
+    {"38400", B38400},
+    {"57600", B57600},
+    {"115200", B115200},
+    {"", 0}
+  };
+  
+ /* Open port and set serial attributes */
+  if (strcmp(GetCmdParam("-dprog"), "stk500") == 0 ||
+      strcmp(GetCmdParam("-dprog"), "mib510") == 0) {
+    speed = B115200;        /* default STK500 speed */
+  }
+
+  if ((val=GetCmdParam("-dserial"))){dev_name = val;}
+  if ((val=GetCmdParam("-dspeed"))){
+    const TSpeed* speed_item = speed_array;
+    for (;speed_item->arg[0] != 0; speed_item++){
+      if (strcmp(speed_item->arg, val) == 0) {
+	speed = speed_item->speed;
+	break;
+      }
+    } 
+    if (speed_item->arg[0]==0){throw Error_Device("-dspeed: Invalid speed.");}
+  }
+
+  // COMn and cygwin don't interact well. Use /dev/ttyS instead
+  if (strlen(dev_name) == 4 && strncasecmp(dev_name, "com", 3) == 0 &&
+      isdigit(dev_name[3]))
+    {
+      char *new_name = new char[11];
+      sprintf(new_name, "/dev/ttyS%c", dev_name[3] - 1);
+
+      Info(0, "Please use %s rather than %s (the latter often doesn't work)\n",
+	   new_name, dev_name);
+      dev_name = new_name;
+    }
+  
+  if ((serline = open(dev_name, O_RDWR | O_NOCTTY | O_NONBLOCK)) < 0) {
+    throw Error_C(dev_name);
+  }  
+  tcgetattr(serline, &pmode);
+  saved_modes = pmode;
+
+  memset(&pmode, 0, sizeof(pmode));
+  /* VMIN, VTIME=0 is fine as we use select in Rx anyway */
+  pmode.c_cflag = CS8 | CLOCAL | CREAD;
+  pmode.c_iflag = IGNPAR | IGNBRK;
+  cfsetispeed(&pmode, speed);
+  cfsetospeed(&pmode, speed);
+  tcsetattr(serline, TCSANOW, &pmode);
+
+#if 0
+  /* Reopen port */
+  int fd = serline;
+  if ((serline = open(dev_name, O_RDWR | O_NOCTTY)) < 0){throw Error_C();}
+  close(fd);
+#else
+  /* Clear O_NONBLOCK flag.  */
+  int flags = fcntl(serline, F_GETFL, 0);
+  if (flags == -1) { throw Error_C("Can not get flags"); }
+  flags &= ~O_NONBLOCK;
+  if (fcntl(serline, F_SETFL, flags) == -1) {
+    throw Error_C("Can not clear nonblock flag");
+  }
+#endif
+}
+
+TSerial::~TSerial(){
+  if (!remote)
+    tcsetattr(serline, TCSADRAIN, &saved_modes);
+  close(serline);
+}
diff --git a/tools/platforms/mica/uisp/src/Serial.h b/tools/platforms/mica/uisp/src/Serial.h
new file mode 100644
index 00000000..885236c4
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Serial.h
@@ -0,0 +1,69 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Serial.h  
+	RS232 Serial Interface for the standard Atmel Programmer
+	Uros Platise(c) copyright 1997-1999
+*/
+
+#ifndef __Serial
+#define __Serial
+
+#include 
+#if defined(__CYGWIN__)
+#include "cygwinp.h"
+#endif
+#include 
+#include 
+#include 
+#include 
+#include "Global.h"
+#include "Error.h"
+
+class TSerial{
+private:
+  int serline;
+  bool remote;
+  struct termios saved_modes;
+  
+protected:
+  int Tx(unsigned char* queue, int queue_size);
+  int Rx(unsigned char* queue, int queue_size, timeval* timeout);
+  void OpenPort();
+  void OpenTcp();
+
+public:
+  int Send(unsigned char* queue, int queue_size, int rec_queue_size=-1,
+	   int timeout = 4);
+  void  SendOnly(unsigned char* queue, int queue_size);
+
+  TSerial();
+  ~TSerial();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Stk500.C b/tools/platforms/mica/uisp/src/Stk500.C
new file mode 100644
index 00000000..8e78ea17
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Stk500.C
@@ -0,0 +1,959 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2001, 2002, 2003  Daniel Berntsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Stk500.C, Daniel Berntsson, 2001 */
+
+#include 
+
+#include "config.h"
+
+#include "Stk500.h"
+#include "Serial.h"
+
+const TByte TStk500::pSTK500[] = { 0x30, 0x20 };
+const TByte TStk500::pSTK500_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::SWminor[] = { 0x41, 0x82, 0x20 };
+const TByte TStk500::SWminor_Reply[] = { 0x14, 0x07, 0x10 };
+
+const TByte TStk500::SWmajor[] = { 0x41, 0x81, 0x20 };
+const TByte TStk500::SWmajor_Reply[] = {0x14, 0x01, 0x10 };
+
+//XBOW MIC510 cmd to enter cmd MIB510 to take control of RS232 lines
+const TByte TStk500::IspMode[] = {0xaa, 0x55, 0x55, 0xaa, 0x17, 0x51, 0x31, 0x13,  '?' };
+const TByte TStk500::IspMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::EnterPgmMode[] = { 0x50, 0x20 };
+const TByte TStk500::EnterPgmMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::LeavePgmMode[] = { 0x51, 0x20 };
+const TByte TStk500::LeavePgmMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::SetAddress[] = { 0x55, '?', '?', 0x20 };
+const TByte TStk500::SetAddress_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::EraseDevice[] = { 0x52, 0x20 };
+const TByte TStk500::EraseDevice_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::WriteMemory[] = { 0x64, '?', '?', '?' };
+const TByte TStk500::WriteMemory_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::ReadMemory[] = { 0x74, 0x01, 0x00, '?', 0x20 };
+const TByte TStk500::ReadMemory_Reply[] = { 0x14 };
+
+const TByte TStk500::GetSignature[] = {0x75, 0x20};
+const TByte TStk500::GetSignature_Reply[] = {0x75, '?', '?', '?', 0x20};
+
+const TByte TStk500::CmdStopByte[] = { 0x20 };
+
+const TByte TStk500::ReplyStopByte[] = { 0x10 };
+
+const TByte TStk500::Flash = 'F';
+
+const TByte TStk500::EEPROM = 'E';
+
+const TByte TStk500::DeviceParam_Reply[] = { 0x14, 0x10 };
+const TByte TStk500::ExtDevParams_Reply[] = { 0x14, 0x10 };
+
+/* FIXME: troth/2002-10-02: Get rid of all these magic numbers now that we
+   know what they mean. (See REAME.stk500) */
+
+TStk500::SPrgPart TStk500::prg_part[] = {
+  {"AT90S4414",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x50, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S2313",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x40, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S1200",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x33, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"AT90S2323",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x41, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S2343",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x43, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S2333",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x42, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S4433",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x51, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S4434",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x52, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S8515",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x60, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"AT90S8535",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x61, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"AT90S8534", /* NOTE (20030216): experimental and untested */
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x62, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega8515",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x63, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega8535",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x64, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATtiny11",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00,
+    0x00, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny12",
+   {0x00, 0xD7, 0xA0, 0x01},
+   {0x42, 0x12, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny15",
+   {0x00, 0xD7, 0xA0, 0x01},
+   {0x42, 0x13, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny22",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATtiny26",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x21, 0x01, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x20}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATtiny28",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x22, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00,
+    0x00, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATmega8",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x70, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega323",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x90, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x04, 0x00}, {0x00, 0x00, 0x80, 0x00}, 0x20}
+  },
+  {"ATmega32",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x91, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x04, 0x00}, {0x00, 0x00, 0x80, 0x00}, 0x20}
+  },
+  // FIXME: add mega64
+  {"ATmega161",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x80, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega163",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x81, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega16",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x82, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega162",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x83, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega169",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x84, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega103",
+   {0x00, 0xA0, 0xD7, 0x00},
+   {0x42, 0xb1, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00,
+    0x00, {0x01, 0x00}, {0x10, 0x00}, {0x00, 0x02, 0x00, 0x00}, 0x20}
+  },
+  {"ATmega128",
+   {0x08, 0xD7, 0xA0, 0x00},
+   {0x42, 0xb2, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x01, 0x00}, {0x10, 0x00}, {0x00, 0x02, 0x00, 0x00}, 0x20}
+  },
+  // FIXME: add at86rf401, at89s51, at89s52
+  {"", {0,0,0,0},{0,0,0,0, 0,0,0,0, 0,0,0,0, 0, {0}, {0}, {0}, 0}}
+};
+
+/* Get a stk500 parameter value */
+
+TByte
+TStk500::ReadParam(TByte param)
+{
+  TByte buf[0x80];
+
+  TByte rd_param[] = { 0x41, param, 0x20 };
+  TByte rd_param_reply[] = { 0x14, '?', 0x10 };
+
+  memcpy(buf, rd_param, sizeof(rd_param));
+  Send(buf, sizeof(rd_param), sizeof(rd_param_reply));
+
+  if ((buf[0] != rd_param_reply[0]) || (buf[2] != rd_param_reply[2]))
+  {
+      throw Error_Device ("Failed to read parameter", pNodename);
+  }
+
+  return buf[1];
+}
+
+/* Set a stk500 parameter value */
+
+void
+TStk500::WriteParam(TByte param, TByte val)
+{
+  TByte buf[0x80];
+
+  TByte wr_param[] = { 0x40, param, val, 0x20 };
+  TByte wr_param_reply[] = { 0x14, 0x10 };
+
+  memcpy(buf, wr_param, sizeof(wr_param));
+  Send(buf, sizeof(wr_param), sizeof(wr_param_reply));
+
+  if (memcmp(buf, wr_param_reply, sizeof(wr_param_reply)) != 0)
+  {
+      throw Error_Device ("Failed to write parameter", pNodename);
+  }
+}
+
+/* Read byte from active segment at address addr. */
+TByte TStk500::ReadByte(TAddr addr)
+{
+  TByte val = 0xff;
+
+  if (segment == SEG_FUSE)
+  {
+    switch (addr) 
+    {
+      case AVR_FUSE_LOW_ADDR:
+        if (TestFeatures(AVR_FUSE_RD))
+          val = ReadFuseLowBits();
+        else
+          Info (1, "Cannot read low fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_FUSE_HIGH_ADDR:
+        if (TestFeatures(AVR_FUSE_HIGH))
+          val = ReadFuseHighBits();
+        else
+          Info (1, "Cannot read high fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_CAL_ADDR:
+        if (TestFeatures(AVR_CAL_RD))
+          val = ReadCalFuseBits(0);
+        else
+          Info (1, "Cannot read calibration byte on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_LOCK_ADDR:
+        val = ReadLockBits();
+        break;
+
+      case AVR_FUSE_EXT_ADDR:
+        if (TestFeatures(AVR_FUSE_EXT))
+          val = ReadFuseExtBits();
+        else
+          Info (1, "Cannot read extended fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+    }
+  }
+  else
+  {
+    /* FIXME: TRoth/2002-05-29: This is still broken. If flash or eeprom
+       changes after the calling ReadMem(), you won't ever see the change. */
+
+    // Xbow: the original STK500 version reads all 128K of Atmega memory
+    // before checking. This takes ~15sec on the mib510. This version reads
+    // a 256 byte page. If a new 256 byte page is needed then it retreives
+    // it from the mib510
+
+    if (read_buffer[segment] == NULL) {
+      page =  addr >> 8;                                  //page number
+      read_buffer[segment] = new TByte[GetSegmentSize()]; //create buffer for data
+      ReadMemPage(addr & 0xfff00);                        //read the page
+    }
+    int new_page = addr >> 8;
+    if (new_page != page){
+      page = new_page;
+      ReadMemPage(addr & 0xfff00);
+    }   
+    val = read_buffer[segment][addr];
+  }
+  return val;
+}
+
+/* Write byte to active segment */
+void TStk500::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  if (segment == SEG_FUSE)
+  {
+    switch (addr) 
+    {
+      case AVR_FUSE_LOW_ADDR:
+        if (TestFeatures(AVR_FUSE_RD))
+          WriteFuseLowBits(byte);
+        else
+          Info (1, "Cannot write low fuse bits on this device.\n");
+        break;
+
+      case AVR_FUSE_HIGH_ADDR:
+        if (TestFeatures(AVR_FUSE_HIGH))
+          WriteFuseHighBits(byte);
+        else
+          Info (1, "Cannot write high fuse bits on this device.\n");
+        break;
+
+      case AVR_CAL_ADDR:
+        /* Calibration byte is always readonly. */
+        break;
+
+      case AVR_LOCK_ADDR:
+        WriteLockBits(byte);
+        break;
+
+      case AVR_FUSE_EXT_ADDR:
+        if (TestFeatures(AVR_FUSE_EXT))
+          WriteFuseExtBits(byte);
+        else
+          Info (1, "Cannot read extended fuse bits on this device.\n");
+        break;
+    }
+  }
+  else
+  {
+    if (write_buffer[segment] == NULL) {
+      write_buffer[segment] = new TByte[GetSegmentSize()];
+      minaddr = GetSegmentSize();
+      memset(write_buffer[segment], 0xff, GetSegmentSize());
+    }
+
+    if (addr > maxaddr)
+      maxaddr = addr;
+
+    if (addr < minaddr)
+      minaddr = addr;
+
+    write_buffer[segment][addr] = byte;
+
+    if (flush_buffer) {
+      FlushWriteBuffer();
+    }
+  }
+}
+
+
+void TStk500::FlushWriteBuffer(){
+  TByte buf[0x200];
+  int wordsize;
+  TAddr addr;
+  TByte seg;
+  const TByte *pgsz;
+  int pagesize;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else {
+    wordsize = 1;
+    seg = EEPROM;
+  }
+
+  pgsz = prg_part[desired_part].params.pagesize;
+  pagesize = (pgsz[0]) << 8 + pgsz[1];
+
+  if (pagesize == 0) {
+    pagesize = 128;
+  }
+
+  EnterProgrammingMode();
+
+  addr = 0;
+  for (unsigned int addr=minaddr; addr> 8) & 0xff;
+    Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+    if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("[FWB 1] Device is not responding correctly.", pNodename); }
+
+    memcpy(buf, WriteMemory, sizeof(WriteMemory));
+    buf[1] = pagesize >> 8;
+    buf[2] = pagesize & 0xff;
+    buf[3] = seg;
+    memcpy(buf+sizeof(WriteMemory), write_buffer[segment]+addr, pagesize);
+    memcpy(buf+sizeof(WriteMemory)+pagesize,
+       CmdStopByte, sizeof(CmdStopByte));
+    Send(buf, sizeof(WriteMemory)+pagesize+sizeof(CmdStopByte),
+     sizeof(WriteMemory_Reply));
+    if (memcmp(buf, WriteMemory_Reply, sizeof(WriteMemory_Reply)) != 0) {
+      throw Error_Device ("[FWB 2] Device is not responding correctly.", pNodename); }
+  }   
+  LeaveProgrammingMode();
+}
+
+
+/* Chip Erase */
+void TStk500::ChipErase(){
+  TByte buf[100];
+
+  EnterProgrammingMode();
+
+  memcpy(buf, EraseDevice, sizeof(EraseDevice));
+  Send(buf, sizeof(EraseDevice), sizeof(EraseDevice_Reply));
+  if (memcmp(buf, EraseDevice_Reply, sizeof(EraseDevice_Reply)) != 0) {
+    throw Error_Device ("[CE] Device is not responding correctly.",  pNodename); }
+
+  LeaveProgrammingMode();
+}
+
+
+TByte TStk500::ReadLockFuseBits()
+{
+  TByte cmd[] = { 0x58, 0x00, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+/* ReadLockBits tries to return the lock bits in a uniform order, despite the
+   differences in different AVR versions.  The goal is to get the lock bits
+   into this order:
+       x x BLB12 BLB11 BLB02 BLB01 LB2 LB1
+   For devices that don't support a boot block, the BLB bits will be 1. */
+
+TByte TStk500::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else {
+    /* if its signature returns 0,1,2 then say it's locked. */
+    EnterProgrammingMode();
+    ReadSignature();
+    LeaveProgrammingMode();
+    if (vendor_code == 0 &&
+        part_family == 1 &&
+        part_number == 2)
+    {
+      rbits = 0xFC;
+    }
+    else
+    {
+      throw Error_Device ("ReadLockBits failed: are you sure this device "
+                          "has lock bits?", pNodename);
+    }
+  }
+  return rbits;
+}
+
+
+TByte TStk500::ReadCalFuseBits(int addr)
+{
+  TByte cmd[] = { 0xc8, 0x00, addr, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseLowBits()
+{
+  TByte cmd[] = { 0x50, 0x00, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseHighBits()
+{
+  TByte cmd[] = { 0x58, 0x08, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseExtBits()
+{
+  TByte cmd[] = { 0x50, 0x08, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteLockFuseBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xff, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseLowBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa0, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseHighBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa8, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseExtBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa4, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void TStk500::WriteLockBits(TByte bits)
+{
+  TByte wbits;
+  if (TestFeatures(AVR_LOCK_BOOT))
+  {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    wbits = bits;
+  }
+  else if (TestFeatures(AVR_LOCK_RD76))
+  {
+    /* x x x x x x LB2 LB1 -> LB1 LB2 1 1 1 1 1 1 */
+    wbits = ((bits << 7) & 0x80) | ((bits << 5) & 0x40) | 0x3f;
+  }
+  else if (TestFeatures(AVR_LOCK_RD12))
+  {
+    /* x x x x x x LB2 LB1 -> 1 1 1 1 1 LB2 LB1 1 */
+    wbits = ((bits << 1) & 0x06) | 0xF9;
+  }
+  else
+  {
+    Info (0, "WriteLockBits failed: are you sure this device has lock bits?");
+    return;
+  }
+  WriteLockFuseBits(wbits);
+}
+
+void TStk500::Initialize()
+{
+  TByte buf[100];
+  TByte vmajor;
+  TByte vminor;
+
+  TByte num_ext_parms = 3;
+  bool bMIB510 = false;
+
+  //----------------- XBOW mod for MIB510, cmd MIB510 to control RS232 lines----
+  if (bMIB510 = strcmp(GetCmdParam("-dprog"), "mib510") == 0) {
+    int itry= 5;      //try 5 times
+    while (itry > 0){
+      itry--;
+      memcpy(buf, IspMode, sizeof(IspMode));
+      buf[8] =  1;
+      SendOnly(buf, sizeof(IspMode));
+      try {
+	Send(buf, sizeof(IspMode), sizeof(IspMode_Reply), 1);
+	if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) == 0) itry = 0;
+      }
+      catch (Error_Device e) {
+      }
+    }
+
+    memcpy(buf, IspMode, sizeof(IspMode));
+    buf[8] =  1;
+    Send(buf, sizeof(IspMode), sizeof(IspMode_Reply));
+    if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+  }
+//-----------------------------------------------------------------------------
+
+  memcpy(buf, pSTK500, sizeof(pSTK500));
+  Send(buf, sizeof(pSTK500), sizeof(pSTK500_Reply));
+  if (memcmp(buf, pSTK500_Reply, sizeof(pSTK500_Reply)) != 0) {
+    throw Error_Device ("[VP 1] Device is not responding correctly.", pNodename); }
+
+  memcpy(buf, &prg_part[desired_part].params,
+     sizeof(prg_part[desired_part].params));
+
+  Send(buf, sizeof(prg_part[desired_part].params),
+       sizeof(DeviceParam_Reply));
+  if (memcmp(buf, DeviceParam_Reply, sizeof(DeviceParam_Reply)) != 0) {
+    throw Error_Device ("[VP 2] Device is not responding correctly.", pNodename); }
+  
+
+  memcpy(buf, SWminor, sizeof(SWminor));
+  Send(buf, sizeof(SWminor), sizeof(SWminor_Reply));
+  vminor = buf[1];
+
+  memcpy(buf, SWmajor, sizeof(SWmajor));
+  Send(buf, sizeof(SWmajor), sizeof(SWmajor_Reply));
+  vmajor = buf[1];
+  
+  if (bMIB510){
+    printf ("Firmware Version: %c.%c\n", vmajor, vminor);
+    return;
+  }
+
+  printf ("Firmware Version: %d.%d\n", vmajor, vminor);
+
+#if 0
+  if (! ((vmajor == 1 && vminor >= 7) || (vmajor > 1)))
+    throw Error_Device ("Need STK500 firmware version 1.7 or newer.", pNodename);
+#endif
+
+  if ((vmajor == 1 && vminor >= 14) || (vmajor > 1))
+      num_ext_parms = 4;
+
+  buf[0] = 0x45;
+  buf[1] = num_ext_parms;
+  memcpy(buf+2, &prg_part[desired_part].ext_params, num_ext_parms);
+  buf[num_ext_parms+2] = 0x20;
+  Send(buf, num_ext_parms+3, sizeof(ExtDevParams_Reply));
+  if (memcmp(buf, ExtDevParams_Reply, sizeof(ExtDevParams_Reply)) != 0) {
+    throw Error_Device ("[VP 3] Device is not responding correctly.", pNodename); }
+}
+
+void TStk500::Cleanup() {
+  TByte buf[100];
+
+  //----------------- XBOW mod for MIB510, cmd MIB510 to release RS232 lines
+  if (strcmp(GetCmdParam("-dprog"), "mib510") == 0)  {
+    memcpy(buf, IspMode, sizeof(IspMode));
+    buf[8] =  0;
+    Send(buf, sizeof(IspMode), sizeof(IspMode_Reply));
+    if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+  }
+}
+
+void TStk500::EnterProgrammingMode() {
+  TByte buf[100];
+
+  memcpy(buf, EnterPgmMode, sizeof(EnterPgmMode));
+  Send(buf, sizeof(EnterPgmMode), sizeof(EnterPgmMode_Reply));
+  if (memcmp(buf, EnterPgmMode_Reply, sizeof(EnterPgmMode_Reply)) != 0) {
+    throw Error_Device ("Failed to enter programming mode.", pNodename); }
+}
+
+
+void TStk500::LeaveProgrammingMode() {
+  TByte buf[100];
+
+  memcpy(buf, LeavePgmMode, sizeof(LeavePgmMode));
+  Send(buf, sizeof(LeavePgmMode), sizeof(LeavePgmMode_Reply));
+  if (memcmp(buf, LeavePgmMode_Reply, sizeof(LeavePgmMode_Reply)) != 0) {
+    throw Error_Device ("[LPM] Device is not responding correctly.", pNodename); }
+}
+
+
+/* TRoth/2002-05-28: A Universal Command seems to be just the 4 bytes of an
+   SPI command. I'm basing this on my interpretation of the doc/README.stk500
+   and Table 129 of the mega128 datasheet (page 300). */
+
+TByte TStk500::UniversalCmd(TByte cmd[])
+{
+  TByte buf[6] = { 0x56, 0x00, 0x00, 0x00, 0x00, 0x20 };
+
+  memcpy(buf+1, cmd, 4);
+
+  EnterProgrammingMode();
+
+  /* Expected response is { 0x14, , 0x10 } */
+  Send(buf, sizeof(buf), 3);
+
+  LeaveProgrammingMode();
+
+  if ((buf[0] != 0x14) || (buf[2] != 0x10))
+  {
+    throw Error_Device ("[UC] Device is not responding correctly.", pNodename);
+  }
+
+  return buf[1];
+}
+
+
+void TStk500::ReadSignature() {
+  TByte buf[100];
+
+  memcpy(buf, GetSignature, sizeof(GetSignature));
+  Send(buf, sizeof(GetSignature), sizeof(GetSignature_Reply));
+  
+  vendor_code = buf[1];
+  part_family = buf[2];
+  part_number = buf[3];
+}
+
+//mib510: read 256 bytes of flash memory starting at addr
+void TStk500::ReadMemPage(TAddr  addr){
+  TByte buf[0x200];
+  int wordsize;
+  TByte seg;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else if (segment == SEG_EEPROM) {
+    wordsize = 1;
+    seg = EEPROM;
+  } else {
+    throw Error_Device ("TStk500::ReadMemPage() called for invalid segment.",pNodename);
+  }
+
+  EnterProgrammingMode();
+ 
+  memcpy(buf, SetAddress, sizeof(SetAddress));
+  buf[1] = (addr/wordsize) & 0xff;
+  buf[2] = ((addr/wordsize) >> 8) & 0xff;
+  Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+  if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+   
+  memcpy(buf, ReadMemory, sizeof(ReadMemory));
+  buf[3] = seg;
+  Send(buf, sizeof(ReadMemory), 2+0x100);
+
+  memcpy(read_buffer[segment]+addr, buf+1, 0x100);
+  
+
+  LeaveProgrammingMode();
+}
+void TStk500::ReadMem(){
+  TByte buf[0x200];
+  int wordsize;
+  TAddr addr;
+  TByte seg;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else if (segment == SEG_EEPROM) {
+    wordsize = 1;
+    seg = EEPROM;
+  } else {
+    throw Error_Device ("TStk500::ReadMem() called for invalid segment.",pNodename);
+  }
+
+  read_buffer[segment] = new TByte[GetSegmentSize()];
+
+  EnterProgrammingMode();
+
+  addr = 0;
+  for (unsigned int addr=0; addr> 8) & 0xff;
+    Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+    if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("[RM] Device is not responding correctly.", pNodename); }
+   
+    memcpy(buf, ReadMemory, sizeof(ReadMemory));
+    buf[3] = seg;
+    Send(buf, sizeof(ReadMemory), 2+0x100);
+
+    memcpy(read_buffer[segment]+addr, buf+1, 0x100);
+  }
+
+  LeaveProgrammingMode();
+}
+
+static TByte
+convert_voltage (const char *val)
+{
+    char *endptr;
+    double v = strtod (val, &endptr);
+    if (endptr == val)
+        throw Error_Device ("Bad voltage value.");
+    if (v > 6.0)
+        throw Error_Device ("Voltages can not be greater than 6.0 volts");
+    if (v < 0.0)
+        throw Error_Device ("Voltages can not be less the 0.0 volts");
+
+    TByte res = (int)(v * 10.01);
+
+    return res;
+}
+
+TStk500::TStk500() {
+  /* Select Part by name */
+  desired_part=-1;
+  const char* desired_partname = GetCmdParam("-dpart");
+  pNodename = GetCmdParam("-dhost");
+  if (desired_partname!=NULL) {
+    int j;
+    for (j=0; prg_part[j].name[0] != 0; j++){
+      if (strcasecmp (desired_partname, prg_part[j].name)==0){
+    desired_part = j;
+    break;
+      }
+    }
+    if (prg_part[j].name[0]==0){throw Error_Device("-dpart: Invalid name.",pNodename);}
+  } else {
+    int i = 0;
+    Info(0, "No part specified, supported devices are:\n");
+    while (prg_part[i].name[0] != '\0')
+      Info(0, "%s\n", prg_part[i++].name);
+    throw Error_Device("");
+  }
+
+  /* Force parallel programming mode if the use wants it, otherwise, just use
+     what the device prefers (usually serial programming). */
+
+  if (GetCmdParam("-dparallel",false))
+      prg_part[desired_part].params.progtype = STK500_PROG_PARALLEL;
+
+  Initialize();
+
+  /* Handle Reading/Writing ARef voltage level. */
+
+  const char *val;
+
+  if ((val=GetCmdParam("--wr_vtg", true)))
+  {
+      TByte value = convert_voltage (val);
+      printf ("Setting VTarget to %d.%d V\n", value/10, value%10);
+
+      TByte aref = ReadParam(0x85);
+      if (aref > value)
+      {
+          printf ("Setting ARef == VTarget to avoid damaging device.\n");
+          WriteParam(0x85, value);
+      }
+
+      WriteParam(0x84, value);
+  }
+
+  if ((val=GetCmdParam("--wr_aref", true)))
+  {
+      TByte value = convert_voltage (val);
+      printf ("Setting ARef to %d.%d V\n", value/10, value%10);
+
+      TByte vtg = ReadParam(0x84);
+      if (vtg < value)
+      {
+          printf ("Setting ARef == VTarget to avoid damaging device.\n");
+          WriteParam(0x84, value);
+      }
+
+      WriteParam(0x85, value);
+  }
+
+  if (GetCmdParam("--rd_vtg", false))
+  {
+      TByte val = ReadParam(0x84);
+      printf("VTarget = %d.%d V\n", val/10, val%10);
+  }
+
+  if (GetCmdParam("--rd_aref", false))
+  {
+      TByte val = ReadParam(0x85);
+      printf("ARef = %d.%d V\n", val/10, val%10);
+  }
+
+  EnterProgrammingMode();
+  ReadSignature();
+  LeaveProgrammingMode();
+  Identify();
+
+  write_buffer[SEG_FLASH] = NULL;
+  write_buffer[SEG_EEPROM] = NULL;
+
+  read_buffer[SEG_FLASH] = NULL;
+  read_buffer[SEG_EEPROM] = NULL;
+
+  maxaddr = 0;
+}
+
+
+TStk500::~TStk500() {
+  Cleanup();
+  delete write_buffer[SEG_FLASH];
+  delete write_buffer[SEG_EEPROM];
+
+  delete read_buffer[SEG_FLASH];
+  delete read_buffer[SEG_EEPROM];
+}
diff --git a/tools/platforms/mica/uisp/src/Stk500.h b/tools/platforms/mica/uisp/src/Stk500.h
new file mode 100644
index 00000000..ba657d10
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Stk500.h
@@ -0,0 +1,183 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2001, 2002, 2003  Daniel Berntsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Stk500.h, Daniel Berntsson, 2001 */
+
+#ifndef __STK500
+#define __STK500
+
+#include "Global.h"
+#include "Serial.h"
+#include "Avr.h"
+
+#define STK500_PROG_SERIAL   0
+#define STK500_PROG_PARALLEL 1
+
+struct SPrgParams {
+  const TByte cmd;              // Always 0x42 (Cmnd_STK_SET_DEVICE)
+  const TByte devicecode;       // Device code (as defined above)
+  const TByte revision;         // Device revision. Not used, set to 0.
+  TByte progtype;               // Defines which Program modes are supported:
+                                //   0 - Both parallel/Hi-V and serial mode
+                                //   1 - Parallel/Hi-V only
+  const TByte parmode;          // Defines if the device has a full parallel
+                                // interface or a pseudo parallel programming
+                                // interface: 0 - pseudo; 1 - full
+  const TByte polling;          // Defines if polling may be used during SPI
+                                // access: 0 - no; 1 - yes
+  const TByte selftimed;        // Defines if prog insns are self timed: 
+                                // 0 - no; 1 - yes
+  const TByte lockbytes;        // Number of lock bytes. Currently not used
+                                // but should be set for future compat.
+  const TByte fusebytes;        // Number of fuse bytes. Currently not used
+                                // but should be set for future compat.
+  const TByte flashpollval1;    // FLASH polling value. See dev data sheet.
+  const TByte flashpollval2;    // FLASH polling value. Same as val1.
+  const TByte eeprompollval1;   // EEPROM polling value 1 (P1). See dev data
+                                // sheet.
+  const TByte eeprompollval2;   // EEPROM polling value 2 (P2). See dev data
+                                // sheet.
+  
+  // The following multi-byte values are sent to the stk500 in big endian
+  // order.
+  const TByte pagesize[2];      // Page size in bytes for pagemode parts
+  const TByte eepromsize[2];    // Size of eeprom in bytes.
+  const TByte flashsize[4];     // Size of FLASH in bytes.
+  const TByte sync;             // Always 0x20 (Sync_CRC_EOP)
+};
+
+/* Set the Extened Device Programming parameters. In the future, this may
+   require more than 3 arguments. */
+
+struct SPrgExtDevParams {
+  const TByte eepgsz;           // EEPROM page size in bytes.
+  const TByte sig_pagel;        // Defines which port pin the PAGEL signal
+                                // should be mapped on to. e.g. 0xD7 maps to
+                                // PORTD7.
+  const TByte sig_bs2;          // Defines which port pin the BS2 signal
+                                // should be mapped on to.
+  const TByte reset_disable;    // Req'd by firmware version 1.14.  It's a
+                                // flag which tells whether a device uses the
+                                // reset pin as an IO pin. Where 0x00 =
+                                // Dedicated RESET pin, 0x01 = Can't rely on
+                                // RESET pin for going into programming
+                                // mode. Not needed for SPI programming
+                                // though.
+};
+
+class TStk500: public TAvr, TSerial {
+private:
+  struct SPrgPart{
+    const char *name;
+    struct SPrgExtDevParams ext_params;
+    struct SPrgParams params;
+  };
+
+  int desired_part;
+  int page;                     /* page address for reading memory, mib510 */
+  const char *pNodename;
+  TByte* write_buffer[2];       /* buffer for SEG_FLASH and SEG_EEPROM */
+  TByte* read_buffer[2];        /* buffer for SEG_FLASH and SEG_EEPROM */
+  TAddr maxaddr;
+  TAddr minaddr;
+
+  static const TByte IspMode[];             //XBOW MIB510
+  static const TByte IspMode_Reply[];       //XBOW MIB510
+  static const TByte pSTK500[];
+  static const TByte pSTK500_Reply[];
+  static const TByte SWminor[];
+  static const TByte SWminor_Reply[];
+  static const TByte SWmajor[];
+  static const TByte SWmajor_Reply[];
+  static const TByte EnterPgmMode[];
+  static const TByte EnterPgmMode_Reply[];
+  static const TByte LeavePgmMode[];
+  static const TByte LeavePgmMode_Reply[];
+  static const TByte SetAddress[];
+  static const TByte SetAddress_Reply[];
+  static const TByte EraseDevice[];
+  static const TByte EraseDevice_Reply[];
+  static const TByte WriteMemory[];
+  static const TByte WriteMemory_Reply[];
+  static const TByte ReadMemory[];
+  static const TByte ReadMemory_Reply[];
+  static const TByte GetSignature[];
+  static const TByte GetSignature_Reply[];
+  static const TByte CmdStopByte[];
+  static const TByte ReplyStopByte[];
+  static const TByte Flash;
+  static const TByte EEPROM;
+  static const TByte DeviceParam_Reply[];
+  static const TByte ExtDevParams_Reply[];
+  static SPrgPart prg_part[];
+
+  void Initialize();
+  void Cleanup();
+
+  void EnterProgrammingMode();
+  void LeaveProgrammingMode();
+  void ReadSignature();
+  void ReadMem();
+  void ReadMemPage(TAddr addr);
+
+  TByte ReadParam(TByte param);
+  void  WriteParam(TByte param, TByte val);
+
+  TByte UniversalCmd(TByte cmd[]);
+
+  TByte ReadLockFuseBits();
+  TByte ReadCalFuseBits(int addr);
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+
+  TByte ReadLockBits();
+
+  void WriteLockFuseBits(TByte bits);
+  void WriteFuseLowBits(TByte bits);
+  void WriteFuseHighBits(TByte bits);
+  void WriteFuseExtBits(TByte bits);
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Write lock bits */
+  void WriteLockBits(TByte bits);
+
+  TStk500();
+  ~TStk500();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Terminal.C b/tools/platforms/mica/uisp/src/Terminal.C
new file mode 100644
index 00000000..005c1eb5
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Terminal.C
@@ -0,0 +1,171 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Terminal.C
+	
+	Device Terminal Access
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include 
+#include 
+#include "Global.h"
+#include "Error.h"
+#include "Terminal.h"
+#include "MotIntl.h"
+
+void TTerminal::Run()
+{
+#if 0
+  enableAvr ();
+  if (isDeviceLocked ()) {
+    char q[20];
+    printf ("Do you want to clear it and enter normal mode now "
+            "(enter y for yes): ");
+    if (fgets (q,sizeof(q),stdin))
+    {
+        if (q[0]=='y') { chipErase (); }
+        else { return; }
+    }
+  }
+#endif
+
+  printf ("Entering the AVR Terminal. ?-help, q-quit.\n");
+  char cmd[32];
+  TAddr addr = 0;
+  do {
+    try {
+      printf("avr> "); 
+      scanf("%s",cmd);
+      if (!strcmp(cmd,"?")){
+	printf ("AVR Terminal supports the following commands:\n"
+	  "ul fileName        - uploads data from Motorola/Intel format.\n"
+	  "vf fileName        - verify file with memory\n"
+/*	  
+	  "dl fileName[%segs] - downloads data to Micro Output File\n"
+*/	  
+          "ls                 - list segments\n"
+	  "ss seg_name        - set segment\n"
+	  "ce                 - perform chip erase\n"
+	  "rd addr            - read a byte from a segment\n"
+	  "wr addr byte       - write a 'byte' to a segment at address 'addr'\n"
+	  "du addr            - dump segment starting at address 'addr'\n"
+	  ",                  - continue segment dump\n"
+	  "\n"
+	  "Written by Uros Platise (c) 1997-1999, uros.platise@ijs.si\n");
+      }
+      else if (!strcmp(cmd,"ul")) {
+	char inputFileName [64]; scanf ("%s", inputFileName);
+	try{
+	  motintl.Read(inputFileName, true, false);
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }
+      else if (!strcmp(cmd,"vf")) {
+	char inputFileName [64]; scanf ("%s", inputFileName);
+	try{
+	  motintl.Read(inputFileName, false, true);
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }      
+/*      
+      else if (cmd=="dl") {
+	char outputFileName [64]; scanf ("%s", outputFileName);
+	try { 
+	  TAout outAout (outputFileName, "wt");
+	  download (&outAout); 
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }
+*/     
+      else if (!strcmp(cmd,"ls")){
+        printf("Available segments: ");
+        const char* seg_name;
+        for (unsigned i=0; (seg_name=device->ListSegment(i))!=NULL; i++){
+	  if (i>0){printf(", ");}
+	  printf("%s", seg_name);
+	}
+	putchar('\n');
+      } 
+      else if (!strcmp(cmd,"ss")){
+        char seg_name [32];
+	scanf("%s", seg_name);
+	if (!device->SetSegment(seg_name)){
+	  printf("Invalid segment: `%s'\n", seg_name);
+	} else {addr=0;}
+      }       
+      else if (!strcmp(cmd,"ce")){ 
+	device->ChipErase();
+      }
+/*      
+      else if (cmd=="rsb") {
+	unsigned char byte = readLockBits ();
+	printf ("Lock and Fuse bits status: %.2x\n", byte );
+      }
+      else if (cmd=="wlb") {
+	string mode; cin >> mode;
+	if (mode=="wr") { writeLockBits (lckPrg);
+	} else if (mode=="rdwr") { writeLockBits (lckPrgRd); 
+	} else { printf ("Invalid parameter: %s\n", mode); }
+      }
+*/      
+      else if (!strcmp(cmd,"rd")){
+	scanf ("%x", &addr);
+	printf("%s: $%.2x\n", 
+	  device->TellActiveSegment(), device->ReadByte(addr));
+      }
+      else if (!strcmp(cmd,"wr")){
+        unsigned x;
+	scanf("%x%x", &addr, &x);
+	device->WriteByte(addr, TByte(x));
+      }
+      else if (!strcmp(cmd,"du")){
+	scanf ("%x", &addr);
+	goto list_contents;
+      }
+      else if (!strcmp(cmd,",")){
+list_contents:
+	int i,l=0;
+	while (l<4) {
+	  printf ("%s $%.5x: ", device->TellActiveSegment(), addr); 
+	  for (i=0; i<0x8; addr++,i++) 
+	    printf ("%.2x ", device->ReadByte(addr));
+	  printf ("\n");
+	  l++;
+	}  
+      }
+      else printf ("Ouch.\n");
+      
+    } catch (Error_MemoryRange){Info(0,"Out of memory range!\n");putchar('\n');}
+  } while (strcmp(cmd,"q"));
+}
diff --git a/tools/platforms/mica/uisp/src/Terminal.h b/tools/platforms/mica/uisp/src/Terminal.h
new file mode 100644
index 00000000..707951fb
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Terminal.h
@@ -0,0 +1,40 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Terminal.h, Uros Platise (c) 1999 */
+
+#ifndef __TERMINAL
+#define __TERMINAL
+
+class TTerminal{
+public:
+  void Run(); 
+  TTerminal(){}
+  ~TTerminal(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/cygwinp.C b/tools/platforms/mica/uisp/src/cygwinp.C
new file mode 100644
index 00000000..4f44b2ba
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/cygwinp.C
@@ -0,0 +1,118 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+
+#if defined(__CYGWIN__)
+
+#include "config.h"
+
+#include 
+#include 
+#include "cygwinp.h"
+#include "DAPA.h"
+
+unsigned char inb(unsigned short port)
+{
+    unsigned char t;
+    asm volatile ("in %1, %0"
+		  : "=a" (t)
+		  : "d" (port));
+    return t;
+}
+
+void outb(unsigned char value, unsigned short port)
+{
+    asm volatile ("out %1, %0"
+		  :
+		  : "d" (port), "a" (value) );
+}
+
+int ioperm(unsigned short port, int num, int enable)
+{
+    if (enable) {
+	// Only try to use directio under Windows NT/2000.
+	OSVERSIONINFO ver_info;
+	memset(&ver_info, 0, sizeof(ver_info));
+	ver_info.dwOSVersionInfoSize = sizeof(ver_info);
+	if (! GetVersionEx(&ver_info))
+	    return -1;
+	else if (ver_info.dwPlatformId == VER_PLATFORM_WIN32_NT) {
+	    HANDLE h =
+		CreateFile("\\\\.\\giveio",
+			   GENERIC_READ,
+			   0,
+			   NULL,
+			   OPEN_EXISTING,
+			   FILE_ATTRIBUTE_NORMAL,
+			   NULL);
+	    if (h == INVALID_HANDLE_VALUE)
+		return -1;
+	    CloseHandle(h);
+	}
+    }
+    return 0;
+}
+
+bool cygwinp_delay_usec(long t)
+{
+    static bool perf_counter_checked = false;
+    static bool use_perf_counter = false;
+    static LARGE_INTEGER freq;
+
+    if (! perf_counter_checked) {
+	if (QueryPerformanceFrequency(&freq))
+	    use_perf_counter = true;
+	perf_counter_checked = true;
+    }
+
+    if (! use_perf_counter)
+	return false;
+    else {
+	LARGE_INTEGER now;
+	LARGE_INTEGER finish;
+	QueryPerformanceCounter(&now);
+	finish.QuadPart = now.QuadPart + (t * freq.QuadPart) / 1000000;
+	do {
+	    QueryPerformanceCounter(&now);
+	} while (now.QuadPart < finish.QuadPart);
+	return true;
+    }
+}
+
+
+int cfmakeraw(struct termios *termios_p)
+{
+    termios_p->c_iflag &=
+	~(IGNBRK|BRKINT|PARMRK|ISTRIP |INLCR|IGNCR|ICRNL|IXON);
+    termios_p->c_oflag &= ~OPOST;
+    termios_p->c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN);
+    termios_p->c_cflag &= ~(CSIZE|PARENB);
+    termios_p->c_cflag |= CS8;
+    return 0;
+}
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/cygwinp.h b/tools/platforms/mica/uisp/src/cygwinp.h
new file mode 100644
index 00000000..a5405a9f
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/cygwinp.h
@@ -0,0 +1,35 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+
+#include 
+
+unsigned char inb(unsigned short port);
+void outb(unsigned char value, unsigned short port);
+int ioperm(unsigned short port, int num, int enable);
+int cfmakeraw(struct termios *termios_p);
+bool cygwinp_delay_usec(long t);
diff --git a/tools/platforms/mica/uisp/src/parport.h b/tools/platforms/mica/uisp/src/parport.h
new file mode 100644
index 00000000..fba9d6b3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/parport.h
@@ -0,0 +1,423 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Id: parport.h,v 1.1 1998/05/17 10:57:52 andrea Exp andrea */
+
+#ifndef _PARPORT_H_
+#define _PARPORT_H_
+
+/* Start off with user-visible constants */
+
+/* Maximum of 8 ports per machine */
+#define PARPORT_MAX  8 
+
+/* Magic numbers */
+#define PARPORT_IRQ_NONE  -1
+#define PARPORT_DMA_NONE  -1
+#define PARPORT_IRQ_AUTO  -2
+#define PARPORT_DMA_AUTO  -2
+#define PARPORT_DISABLE   -2
+#define PARPORT_IRQ_PROBEONLY -3
+
+#define PARPORT_CONTROL_STROBE    0x1
+#define PARPORT_CONTROL_AUTOFD    0x2
+#define PARPORT_CONTROL_INIT      0x4
+#define PARPORT_CONTROL_SELECT    0x8
+#define PARPORT_CONTROL_INTEN     0x10
+#define PARPORT_CONTROL_DIRECTION 0x20
+
+#define PARPORT_STATUS_ERROR      0x8
+#define PARPORT_STATUS_SELECT     0x10
+#define PARPORT_STATUS_PAPEROUT   0x20
+#define PARPORT_STATUS_ACK        0x40
+#define PARPORT_STATUS_BUSY       0x80
+
+/* Type classes for Plug-and-Play probe.  */
+typedef enum {
+	PARPORT_CLASS_LEGACY = 0,       /* Non-IEEE1284 device */
+	PARPORT_CLASS_PRINTER,
+	PARPORT_CLASS_MODEM,
+	PARPORT_CLASS_NET,
+	PARPORT_CLASS_HDC,              /* Hard disk controller */
+	PARPORT_CLASS_PCMCIA,
+	PARPORT_CLASS_MEDIA,            /* Multimedia device */
+	PARPORT_CLASS_FDC,              /* Floppy disk controller */
+	PARPORT_CLASS_PORTS,
+	PARPORT_CLASS_SCANNER,
+	PARPORT_CLASS_DIGCAM,
+	PARPORT_CLASS_OTHER,            /* Anything else */
+	PARPORT_CLASS_UNSPEC            /* No CLS field in ID */
+} parport_device_class;
+
+/* The "modes" entry in parport is a bit field representing the following
+ * modes.
+ * Note that PARPORT_MODE_PCECPEPP is for the SMC EPP+ECP mode which is NOT
+ * 100% compatible with EPP.
+ */
+#define PARPORT_MODE_PCSPP	        0x0001
+#define PARPORT_MODE_PCPS2		0x0002
+#define PARPORT_MODE_PCEPP		0x0004
+#define PARPORT_MODE_PCECP		0x0008
+#define PARPORT_MODE_PCECPEPP		0x0010
+#define PARPORT_MODE_PCECR		0x0020  /* ECR Register Exists */
+#define PARPORT_MODE_PCECPPS2		0x0040
+
+/* The rest is for the kernel only */
+#ifdef __KERNEL__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PARPORT_NEED_GENERIC_OPS
+
+/* Define this later. */
+struct parport;
+
+struct pc_parport_state {
+	unsigned int ctr;
+	unsigned int ecr;
+};
+
+struct parport_state {
+	union {
+		struct pc_parport_state pc;
+		/* ARC has no state. */
+		/* AX uses same state information as PC */
+		void *misc; 
+	} u;
+};
+
+struct parport_operations {
+	void (*write_data)(struct parport *, unsigned char);
+	unsigned char (*read_data)(struct parport *);
+	void (*write_control)(struct parport *, unsigned char);
+	unsigned char (*read_control)(struct parport *);
+	unsigned char (*frob_control)(struct parport *, unsigned char mask, unsigned char val);
+	void (*write_econtrol)(struct parport *, unsigned char);
+	unsigned char (*read_econtrol)(struct parport *);
+	unsigned char (*frob_econtrol)(struct parport *, unsigned char mask, unsigned char val);
+	void (*write_status)(struct parport *, unsigned char);
+	unsigned char (*read_status)(struct parport *);
+	void (*write_fifo)(struct parport *, unsigned char);
+	unsigned char (*read_fifo)(struct parport *);
+
+	void (*change_mode)(struct parport *, int);
+
+	void (*release_resources)(struct parport *);
+	int (*claim_resources)(struct parport *);
+
+	void (*epp_write_data)(struct parport *, unsigned char);
+	unsigned char (*epp_read_data)(struct parport *);
+	void (*epp_write_addr)(struct parport *, unsigned char);
+	unsigned char (*epp_read_addr)(struct parport *);
+	int (*epp_check_timeout)(struct parport *);
+	size_t (*epp_write_block)(struct parport *, void *, size_t);
+	size_t (*epp_read_block)(struct parport *, void *, size_t);
+
+	int (*ecp_write_block)(struct parport *, void *, size_t, void (*fn)(struct parport *, void *, size_t), void *);
+	int (*ecp_read_block)(struct parport *, void *, size_t, void (*fn)(struct parport *, void *, size_t), void *);
+
+	void (*init_state)(struct parport_state *);
+	void (*save_state)(struct parport *, struct parport_state *);
+	void (*restore_state)(struct parport *, struct parport_state *);
+
+	void (*enable_irq)(struct parport *);
+	void (*disable_irq)(struct parport *);
+	void (*interrupt)(int, void *, struct pt_regs *);
+
+	void (*inc_use_count)(void);
+	void (*dec_use_count)(void);
+	void (*fill_inode)(struct inode *inode, int fill);
+};
+
+struct parport_device_info {
+	parport_device_class class;
+	const char *class_name;
+	const char *mfr;
+	const char *model;
+	const char *cmdset;
+	const char *description;
+};
+
+/* Each device can have two callback functions:
+ *  1) a preemption function, called by the resource manager to request
+ *     that the driver relinquish control of the port.  The driver should
+ *     return zero if it agrees to release the port, and nonzero if it 
+ *     refuses.  Do not call parport_release() - the kernel will do this
+ *     implicitly.
+ *
+ *  2) a wake-up function, called by the resource manager to tell drivers
+ *     that the port is available to be claimed.  If a driver wants to use
+ *     the port, it should call parport_claim() here.
+ */
+
+/* A parallel port device */
+struct pardevice {
+	const char *name;
+	struct parport *port;
+	int (*preempt)(void *);
+	void (*wakeup)(void *);
+	void *private;
+	void (*irq_func)(int, void *, struct pt_regs *);
+	unsigned int flags;
+	struct pardevice *next;
+	struct pardevice *prev;
+	struct parport_state *state;     /* saved status over preemption */
+	struct wait_queue *wait_q;
+	unsigned long int time;
+	unsigned long int timeslice;
+	unsigned int waiting;
+	struct pardevice *waitprev;
+	struct pardevice *waitnext;
+};
+
+/* Directory information for the /proc interface */
+struct parport_dir {
+	struct proc_dir_entry *entry;    /* Directory /proc/parport/X     */
+	struct proc_dir_entry *irq;	/*		.../irq           */
+	struct proc_dir_entry *devices;  /*		.../devices       */
+	struct proc_dir_entry *hardware; /*		.../hardware      */
+	struct proc_dir_entry *probe;	 /*		.../autoprobe	  */
+	char name[4];
+};
+
+/* A parallel port */
+struct parport {
+	unsigned long base;	/* base address */
+	unsigned int size;	/* IO extent */
+	const char *name;
+	int irq;		/* interrupt (or -1 for none) */
+	int dma;
+	unsigned int modes;
+
+	struct pardevice *devices;
+	struct pardevice *cad;	/* port owner */
+
+	struct pardevice *waithead;
+	struct pardevice *waittail;
+	
+	struct parport *next;
+	unsigned int flags;
+
+	struct parport_dir pdir;
+	struct parport_device_info probe_info; 
+
+	struct parport_operations *ops;
+	void *private_data;     /* for lowlevel driver */
+
+	int number;		/* port index - the `n' in `parportn' */
+	spinlock_t pardevice_lock;
+	spinlock_t waitlist_lock;
+	rwlock_t cad_lock;
+
+	/* PCI parallel I/O card support. */
+	unsigned long base_hi;  /* base address (hi - ECR) */
+};
+
+/* parport_register_port registers a new parallel port at the given address (if
+ * one does not already exist) and returns a pointer to it.  This entails
+ * claiming the I/O region, IRQ and DMA.
+ * NULL is returned if initialisation fails. 
+ */
+struct parport *parport_register_port(unsigned long base, int irq, int dma,
+				      struct parport_operations *ops);
+
+/* Unregister a port. */
+extern void parport_unregister_port(struct parport *port);
+
+/* parport_in_use returns nonzero if there are devices attached to a port. */
+#define parport_in_use(x)  ((x)->devices != NULL)
+
+/* Put a parallel port to sleep; release its hardware resources.  Only possible
+ * if no devices are registered.  */
+extern void parport_quiesce(struct parport *);
+
+/* parport_enumerate returns a pointer to the linked list of all the ports
+ * in this machine.
+ */
+struct parport *parport_enumerate(void);
+
+/* parport_register_device declares that a device is connected to a port, and 
+ * tells the kernel all it needs to know.  
+ * pf is the preemption function (may be NULL for no callback)
+ * kf is the wake-up function (may be NULL for no callback)
+ * irq_func is the interrupt handler (may be NULL for no interrupts)
+ * handle is a user pointer that gets handed to callback functions. 
+ */
+struct pardevice *parport_register_device(struct parport *port, 
+			  const char *name,
+			  int (*pf)(void *), void (*kf)(void *),
+			  void (*irq_func)(int, void *, struct pt_regs *), 
+			  int flags, void *handle);
+
+/* parport_unregister unlinks a device from the chain. */
+extern void parport_unregister_device(struct pardevice *dev);
+
+/* parport_claim tries to gain ownership of the port for a particular driver.
+ * This may fail (return non-zero) if another driver is busy.  If this
+ * driver has registered an interrupt handler, it will be enabled. 
+ */
+extern int parport_claim(struct pardevice *dev);
+
+/* parport_claim_or_block is the same, but sleeps if the port cannot be 
+   claimed.  Return value is 1 if it slept, 0 normally and -errno on error.  */
+extern int parport_claim_or_block(struct pardevice *dev);
+
+/* parport_release reverses a previous parport_claim.  This can never fail, 
+ * though the effects are undefined (except that they are bad) if you didn't
+ * previously own the port.  Once you have released the port you should make
+ * sure that neither your code nor the hardware on the port tries to initiate
+ * any communication without first re-claiming the port.
+ * If you mess with the port state (enabling ECP for example) you should
+ * clean up before releasing the port. 
+ */
+
+extern void parport_release(struct pardevice *dev);
+
+/* parport_yield relinquishes the port if it would be helpful to other
+ * drivers.  The return value is the same as for parport_claim.
+ */
+extern __inline__ int parport_yield(struct pardevice *dev)
+{
+	unsigned long int timeslip = (jiffies - dev->time);
+	if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice))
+		return 0;
+	parport_release(dev);
+	return parport_claim(dev);
+}
+
+/* parport_yield_blocking is the same but uses parport_claim_or_block
+ * instead of parport_claim.
+ */
+extern __inline__ int parport_yield_blocking(struct pardevice *dev)
+{
+	unsigned long int timeslip = (jiffies - dev->time);
+	if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice))
+		return 0;
+	parport_release(dev);
+	return parport_claim_or_block(dev);
+}
+
+/*
+ * Lowlevel drivers _can_ call this support function to handle irqs.
+ */
+extern __inline__ void parport_generic_irq(int irq, struct parport *port,
+					   struct pt_regs *regs)
+{
+	read_lock(&port->cad_lock);
+	if (!port->cad)
+		goto out_unlock;
+	if (port->cad->irq_func)
+		port->cad->irq_func(irq, port->cad->private, regs);
+	else
+		printk(KERN_ERR "%s: irq%d happened with irq_func NULL "
+		       "with %s as cad!\n", port->name, irq, port->cad->name);
+ out_unlock:
+	read_unlock(&port->cad_lock);
+}
+
+/* Flags used to identify what a device does. */
+#define PARPORT_DEV_TRAN		0	/* WARNING !! DEPRECATED !! */
+#define PARPORT_DEV_LURK		(1<<0)	/* WARNING !! DEPRECATED !! */
+#define PARPORT_DEV_EXCL		(1<<1)	/* Need exclusive access. */
+
+#define PARPORT_FLAG_COMA		(1<<0)
+#define PARPORT_FLAG_EXCL		(1<<1)	/* EXCL driver registered. */
+
+extern void parport_parse_irqs(int, const char *[], int irqval[]);
+extern int parport_ieee1284_nibble_mode_ok(struct parport *, unsigned char);
+extern int parport_wait_peripheral(struct parport *, unsigned char, unsigned
+				   char);
+
+/* Prototypes from parport_procfs */
+extern int parport_proc_init(void);
+extern void parport_proc_cleanup(void);
+extern int parport_proc_register(struct parport *pp);
+extern int parport_proc_unregister(struct parport *pp);
+
+extern void dec_parport_count(void);
+extern void inc_parport_count(void);
+
+extern int parport_probe(struct parport *port, char *buffer, int len);
+extern void parport_probe_one(struct parport *port);
+extern void (*parport_probe_hook)(struct parport *port);
+
+/* If PC hardware is the only type supported, we can optimise a bit.  */
+#if (defined(CONFIG_PARPORT_PC) || defined(CONFIG_PARPORT_PC_MODULE)) && !(defined(CONFIG_PARPORT_AX) || defined(CONFIG_PARPORT_AX_MODULE)) && !(defined(CONFIG_PARPORT_ARC) || defined(CONFIG_PARPORT_ARC_MODULE)) && !defined(CONFIG_PARPORT_OTHER)
+#undef PARPORT_NEED_GENERIC_OPS
+#include 
+#define parport_write_data(p,x)            parport_pc_write_data(p,x)
+#define parport_read_data(p)               parport_pc_read_data(p)
+#define parport_write_control(p,x)         parport_pc_write_control(p,x)
+#define parport_read_control(p)            parport_pc_read_control(p)
+#define parport_frob_control(p,m,v)        parport_pc_frob_control(p,m,v)
+#define parport_write_econtrol(p,x)        parport_pc_write_econtrol(p,x)
+#define parport_read_econtrol(p)           parport_pc_read_econtrol(p)
+#define parport_frob_econtrol(p,m,v)       parport_pc_frob_econtrol(p,m,v)
+#define parport_write_status(p,v)          parport_pc_write_status(p,v)
+#define parport_read_status(p)             parport_pc_read_status(p)
+#define parport_write_fifo(p,v)            parport_pc_write_fifo(p,v)
+#define parport_read_fifo(p)               parport_pc_read_fifo(p)
+#define parport_change_mode(p,m)           parport_pc_change_mode(p,m)
+#define parport_release_resources(p)       parport_pc_release_resources(p)
+#define parport_claim_resources(p)         parport_pc_claim_resources(p)
+#define parport_epp_write_data(p,x)        parport_pc_write_epp(p,x)
+#define parport_epp_read_data(p)           parport_pc_read_epp(p)
+#define parport_epp_write_addr(p,x)        parport_pc_write_epp_addr(p,x)
+#define parport_epp_read_addr(p)           parport_pc_read_epp_addr(p)
+#define parport_epp_check_timeout(p)       parport_pc_check_epp_timeout(p)
+#endif
+
+#ifdef PARPORT_NEED_GENERIC_OPS
+/* Generic operations vector through the dispatch table. */
+#define parport_write_data(p,x)            (p)->ops->write_data(p,x)
+#define parport_read_data(p)               (p)->ops->read_data(p)
+#define parport_write_control(p,x)         (p)->ops->write_control(p,x)
+#define parport_read_control(p)            (p)->ops->read_control(p)
+#define parport_frob_control(p,m,v)        (p)->ops->frob_control(p,m,v)
+#define parport_write_econtrol(p,x)        (p)->ops->write_econtrol(p,x)
+#define parport_read_econtrol(p)           (p)->ops->read_econtrol(p)
+#define parport_frob_econtrol(p,m,v)       (p)->ops->frob_econtrol(p,m,v)
+#define parport_write_status(p,v)          (p)->ops->write_status(p,v)
+#define parport_read_status(p)             (p)->ops->read_status(p)
+#define parport_write_fifo(p,v)            (p)->ops->write_fifo(p,v)
+#define parport_read_fifo(p)               (p)->ops->read_fifo(p)
+#define parport_change_mode(p,m)           (p)->ops->change_mode(p,m)
+#define parport_release_resources(p)       (p)->ops->release_resources(p)
+#define parport_claim_resources(p)         (p)->ops->claim_resources(p)
+#define parport_epp_write_data(p,x)        (p)->ops->epp_write_data(p,x)
+#define parport_epp_read_data(p)           (p)->ops->epp_read_data(p)
+#define parport_epp_write_addr(p,x)        (p)->ops->epp_write_addr(p,x)
+#define parport_epp_read_addr(p)           (p)->ops->epp_read_addr(p)
+#define parport_epp_check_timeout(p)       (p)->ops->epp_check_timeout(p)
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* _PARPORT_H_ */
diff --git a/tools/platforms/mica/uisp/src/ppdev.h b/tools/platforms/mica/uisp/src/ppdev.h
new file mode 100644
index 00000000..d0b5e034
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/ppdev.h
@@ -0,0 +1,140 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1998-9 Tim Waugh 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+ * linux/drivers/char/ppdev.h
+ *
+ * User-space parallel port device driver (header file).
+ *
+ * Added PPGETTIME/PPSETTIME, Fred Barnes, 1999.
+ */
+
+#define PP_MAJOR	99
+
+#define PP_IOCTL	'p'
+
+/* Set mode for read/write (e.g. IEEE1284_MODE_EPP) */
+#define PPSETMODE	_IOW(PP_IOCTL, 0x80, int)
+
+/* Read status */
+#define PPRSTATUS	_IOR(PP_IOCTL, 0x81, unsigned char)
+#define PPWSTATUS	OBSOLETE__IOW(PP_IOCTL, 0x82, unsigned char)
+
+/* Read/write control */
+#define PPRCONTROL	_IOR(PP_IOCTL, 0x83, unsigned char)
+#define PPWCONTROL	_IOW(PP_IOCTL, 0x84, unsigned char)
+
+struct ppdev_frob_struct {
+	unsigned char mask;
+	unsigned char val;
+};
+#define PPFCONTROL      _IOW(PP_IOCTL, 0x8e, struct ppdev_frob_struct)
+
+/* Read/write data */
+#define PPRDATA		_IOR(PP_IOCTL, 0x85, unsigned char)
+#define PPWDATA		_IOW(PP_IOCTL, 0x86, unsigned char)
+
+/* Read/write econtrol (not used) */
+#define PPRECONTROL	OBSOLETE__IOR(PP_IOCTL, 0x87, unsigned char)
+#define PPWECONTROL	OBSOLETE__IOW(PP_IOCTL, 0x88, unsigned char)
+
+/* Read/write FIFO (not used) */
+#define PPRFIFO		OBSOLETE__IOR(PP_IOCTL, 0x89, unsigned char)
+#define PPWFIFO		OBSOLETE__IOW(PP_IOCTL, 0x8a, unsigned char)
+
+/* Claim the port to start using it */
+#define PPCLAIM		_IO(PP_IOCTL, 0x8b)
+
+/* Release the port when you aren't using it */
+#define PPRELEASE	_IO(PP_IOCTL, 0x8c)
+
+/* Yield the port (release it if another driver is waiting,
+ * then reclaim) */
+#define PPYIELD		_IO(PP_IOCTL, 0x8d)
+
+/* Register device exclusively (must be before PPCLAIM). */
+#define PPEXCL		_IO(PP_IOCTL, 0x8f)
+
+/* Data line direction: non-zero for input mode. */
+#define PPDATADIR	_IOW(PP_IOCTL, 0x90, int)
+
+/* Negotiate a particular IEEE 1284 mode. */
+#define PPNEGOT		_IOW(PP_IOCTL, 0x91, int)
+
+/* Set control lines when an interrupt occurs. */
+#define PPWCTLONIRQ	_IOW(PP_IOCTL, 0x92, unsigned char)
+
+/* Clear (and return) interrupt count. */
+#define PPCLRIRQ	_IOR(PP_IOCTL, 0x93, int)
+
+/* Set the IEEE 1284 phase that we're in (e.g. IEEE1284_PH_FWD_IDLE) */
+#define PPSETPHASE	_IOW(PP_IOCTL, 0x94, int)
+
+/* Set and get port timeout (struct timeval's) */
+#define PPGETTIME	_IOR(PP_IOCTL, 0x95, struct timeval)
+#define PPSETTIME	_IOW(PP_IOCTL, 0x96, struct timeval)
+
+/* IEEE1284 modes: 
+   Nibble mode, byte mode, ECP, ECPRLE and EPP are their own
+   'extensibility request' values.  Others are special.
+   'Real' ECP modes must have the IEEE1284_MODE_ECP bit set.  */
+#define IEEE1284_MODE_NIBBLE             0
+#define IEEE1284_MODE_BYTE              (1<<0)
+#define IEEE1284_MODE_COMPAT            (1<<8)
+#define IEEE1284_MODE_BECP              (1<<9) /* Bounded ECP mode */
+#define IEEE1284_MODE_ECP               (1<<4)
+#define IEEE1284_MODE_ECPRLE            (IEEE1284_MODE_ECP | (1<<5))
+#define IEEE1284_MODE_ECPSWE            (1<<10) /* Software-emulated */
+#define IEEE1284_MODE_EPP               (1<<6)
+#define IEEE1284_MODE_EPPSL             (1<<11) /* EPP 1.7 */
+#define IEEE1284_MODE_EPPSWE            (1<<12) /* Software-emulated */
+#define IEEE1284_DEVICEID               (1<<2)  /* This is a flag */
+#define IEEE1284_EXT_LINK               (1<<14) /* This flag causes the
+						 * extensibility link to
+						 * be requested, using
+						 * bits 0-6. */
+
+/* For the benefit of parport_read/write, you can use these with
+ * parport_negotiate to use address operations.  They have no effect
+ * other than to make parport_read/write use address transfers. */
+#define IEEE1284_ADDR			(1<<13)	/* This is a flag */
+#define IEEE1284_DATA			 0	/* So is this */
+
+/* IEEE1284 phases */
+enum ieee1284_phase {
+	IEEE1284_PH_FWD_DATA,
+	IEEE1284_PH_FWD_IDLE,
+	IEEE1284_PH_TERMINATE,
+	IEEE1284_PH_NEGOTIATION,
+	IEEE1284_PH_HBUSY_DNA,
+	IEEE1284_PH_REV_IDLE,
+	IEEE1284_PH_HBUSY_DAVAIL,
+	IEEE1284_PH_REV_DATA,
+	IEEE1284_PH_ECP_SETUP,
+	IEEE1284_PH_ECP_FWD_TO_REV,
+	IEEE1284_PH_ECP_REV_TO_FWD
+};
diff --git a/tools/platforms/mica/uisp/src/timeradd.h b/tools/platforms/mica/uisp/src/timeradd.h
new file mode 100644
index 00000000..4a22df61
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/timeradd.h
@@ -0,0 +1,65 @@
+// $Id$
+
+/*
+ * $Id$
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2002, 2003  Marek Michalkiewicz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* I'm not sure how portable is to use these macros (they are available
+   on my system, but not mentioned in the glibc manual I have).
+   Similar macros are provided here for systems that don't have them.  -MM */
+
+#include 
+
+#ifndef timeradd
+#define timeradd(_a, _b, _res)				\
+  do {							\
+    (_res)->tv_usec = (_a)->tv_usec + (_b)->tv_usec;	\
+    (_res)->tv_sec = (_a)->tv_sec + (_b)->tv_sec;	\
+    if ((_res)->tv_usec >= 1000000)			\
+      {							\
+        (_res)->tv_usec -= 1000000;			\
+        (_res)->tv_sec++;				\
+      }							\
+  } while (0)
+#endif
+
+#ifndef timersub
+#define timersub(_a, _b, _res)				\
+  do {							\
+    (_res)->tv_usec = (_a)->tv_usec - (_b)->tv_usec;	\
+    (_res)->tv_sec = (_a)->tv_sec - (_b)->tv_sec;	\
+    if ((_res)->tv_usec < 0) {				\
+      (_res)->tv_usec += 1000000;			\
+      (_res)->tv_sec--;					\
+    }							\
+  } while (0)
+#endif
+
+#ifndef timercmp
+#define timercmp(_a, _b, _cmp)				\
+  (((_a)->tv_sec == (_b)->tv_sec) ?			\
+   ((_a)->tv_usec _cmp (_b)->tv_usec) :			\
+   ((_a)->tv_sec _cmp (_b)->tv_sec))
+#endif
+
diff --git a/tools/platforms/mica/uisp/uisp.1.in b/tools/platforms/mica/uisp/uisp.1.in
new file mode 100644
index 00000000..21142214
--- /dev/null
+++ b/tools/platforms/mica/uisp/uisp.1.in
@@ -0,0 +1,200 @@
+.TH UISP "1" "@DATE@" "uisp version @VERSION@" "User Commands"
+.SH NAME
+uisp \- manual page for uisp
+.SH SYNOPSIS
+.B uisp
+[\fIOPTION\fR].. \fI-dprog=TYPE\fR \fI-dpart=AT90XXX\fR \fI--FUNCTION\fR.. [\fIif=SOURCE\fR] [\fIof=DEST\fR]
+.SH DESCRIPTION
+.IP
+.SS "Programming Methods:"
+\fB\-dprog\fR=avr910|pavr|stk500
+.RS
+.TP
+avr910
+Standard Atmel Serial Programmer/Atmel Low Cost Programmer
+.TP
+pavr
+http://www.avr1.org/pavr/pavr.html
+.TP
+stk500
+Atmel STK500
+.RE
+.HP
+\fB\-dprog\fR=dapa|stk200|abb|avrisp|bsd|fbprg|dt006|maxi|dasa|dasa2
+.RS
+.TP
+dapa
+Direct AVR Parallel Access
+.TP
+stk200
+Parallel Starter Kit STK200, STK300
+.TP
+abb
+Altera ByteBlasterMV Parallel Port Download Cable
+.TP
+avrisp
+Atmel AVR ISP (?)
+.TP
+bsd
+http://www.bsdhome.com/avrdude/ (parallel)
+.TP
+fbprg
+http://ln.com.ua/~real/avreal/adapters.html (parallel)
+.TP
+dt006
+http://www.dontronics.com/dt006.html (parallel)
+.TP
+maxi
+Investment Technologies Maxi (parallel)
+.TP
+dasa
+serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)
+.TP
+dasa2
+serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)
+.RE
+.SS "Target Device Selection:"
+.TP
+\fB\-dpart\fR=part
+Set target abbreviated name or number. For some programmers, if
+\fB\-dpart\fR is not given programmer's supported devices are listed. Set
+\fB\-dpart\fR=\fIauto\fR for auto-select. Auto-select does not work with
+all programmers, so it is recommended to always specify a target device
+explicitly.
+.SS "Parallel Device Settings:"
+.TP
+\fB\-dlpt\fR=address|device name
+specify device name (Linux ppdev, FreeBSD ppi, serial)
+or direct I/O parallel port address (0x378, 0x278, 0x3BC)
+.TP
+\fB\-dno\-poll\fR
+Program without data polling (a little slower)
+.TP
+\fB\-dno\-retry\fR
+Disable retries of program enable command
+.TP
+\fB\-dvoltage\fR=value
+Set timing specs according to the power supply voltage in [V]
+(default 3.0)
+.TP
+\fB\-dt_sck\fR=time
+Set minimum SCK high/low time in micro-seconds (default 5)
+.TP
+\fB\-dt_wd_flash\fR=time
+Set FLASH maximum write delay time in micro-seconds
+.TP
+\fB\-dt_wd_eeprom\fR=time
+Set EEPROM maximum write delay time in micro-seconds
+.TP
+\fB\-dt_reset\fR=time
+Set reset inactive (high) time in micro-seconds
+.TP
+\fB\-dinvert\fR=[sck[,mosi[,miso[,reset]]]]]
+Invert specified lines
+Use \fB\-v\fR=\fI3\fR option to see current settings.
+.SS "Atmel Low Cost Programmer Serial Device Settings:"
+.TP
+\fB\-dserial\fR=device name
+Set serial interface as /dev/ttyS* (default /dev/avr)
+.TP
+\fB\-dspeed\fR=1200|2400|4800|9600|19200|38400|57600|115200
+Set speed of the serial interface (default 19200)
+.SS "Stk500 specific options:"
+.TP
+\fB\-dparallel\fR
+Use Hi-V parallel programming instead of serial (default is serial)
+.TP
+\fB\-\-rd_aref\fR
+Read the ARef Voltage. Note that due to a bug in the stk500 firmware, the read
+value is sometimes off by 0.1 from the actual value measured with a volt meter.
+.TP
+\fB\-\-rd_vtg\fR
+Read the Vtarget Voltage. Note that due to a bug in the stk500 firmware, the
+read value is sometimes off by 0.1 from the actual value measured with a volt
+meter.
+.TP
+\fB\-\-wr_aref\fR=value
+Set the ARef Voltage. Valid values are 0.0 to 6.0 volts in 0.1 volt increments.
+Value can not be larger than the VTarget value.
+.TP
+\fB\-\-wr_vtg\fR=value
+Set the VTarget Voltage. Valid values are 0.0 to 6.0 volts in 0.1 volt
+increments.  Value can not be smaller than the ARef value.
+.SS "Functions:"
+.TP
+\fB\-\-upload\fR
+Upload "input_file" to the AVR memory.
+.TP
+\fB\-\-verify\fR
+Verify "input_file" (processed after the \fB\-\-upload\fR opt.)
+.TP
+\fB\-\-download\fR
+Download AVR memory to "output_file" or stdout.
+.TP
+\fB\-\-erase\fR
+Erase device.
+.TP
+\fB\-\-segment\fR=flash|eeprom|fuse
+Set active segment (auto-select for AVA Motorola output)
+.SS "Fuse/Lock Bit Operations:"
+.TP
+\fB\-\-rd_fuses\fR
+Read all fuses and print values to stdout
+.TP
+\fB\-\-wr_fuse_l\fR=byte
+Write fuse low byte
+.TP
+\fB\-\-wr_fuse_h\fR=byte
+Write fuse high byte
+.TP
+\fB\-\-wr_fuse_e\fR=byte
+Write fuse extended byte
+.TP
+\fB\-\-wr_lock\fR=byte
+Write lock bits. Argument is a byte where each bit is:
+ Bit5 -> blb12
+ Bit4 -> blb11
+ Bit3 -> blb02
+ Bit2 -> blb01
+ Bit1 -> lb2
+ Bit0 -> lb1
+.TP
+\fB\-\-lock\fR
+Write lock bits [old method; deprecated].
+.SS "Files:"
+.TP
+\fBif\fR=filename
+Input file for the \fB\-\-upload\fR and \fB\-\-verify\fR functions in
+Motorola S-records (S1 or S2) or 16 bit Intel format
+.TP
+\fBof\fR=filename
+Output file for the \fB\-\-download\fR function in
+Motorola S-records format, default is standard output
+.SS "Other Options:"
+.TP
+\fB\-v\fR=level
+Set verbose level (-v equals \fB\-v\fR=\fI2\fR, min/max: 0/4, default 1)
+.TP
+\fB\-\-hash\fR=perbytes
+Print hash (default is 32 bytes)
+.TP
+\fB\-\-help\fR \fB\-h\fR
+Help
+.TP
+\fB\-\-version\fR
+Print version information
+.TP
+\fB\-\-terminal\fR
+Invoke shell-like terminal
+.SH "AUTHOR"
+Written by Uros Platise.
+.SH "REPORTING BUGS"
+Report bugs to 
+.SH "SEE ALSO"
+http://savannah.nongnu.org/download/uisp/
+.SH "COPYRIGHT"
+(c) 1997-1999 Uros Platise, 2000-2003 Marek Michalkiewicz
+.PP
+uisp is free software, covered by the GNU General Public License.  You are
+welcome to change it and/or distribute copies of it under the conditions of
+the GNU General Public License.
diff --git a/tools/platforms/mica/uisp/uisp.spec.in b/tools/platforms/mica/uisp/uisp.spec.in
new file mode 100644
index 00000000..40be6cf4
--- /dev/null
+++ b/tools/platforms/mica/uisp/uisp.spec.in
@@ -0,0 +1,78 @@
+## -*- mode: rpm-spec; -*-
+##
+## $Id$
+##
+## @configure_input@
+##
+
+%define uispVersion      @VERSION@
+
+Summary: Universal In-System Programmer for Atmel AVR and 8051.
+Name: uisp
+Version: %{uispVersion}
+Release: 1
+License: GPL
+Group: Development/Tools
+URL: http://freesoftware.fsf.org/download/uisp
+Source: http://freesoftware.fsf.org/download/uisp/uisp-%{uispVersion}.tar.gz
+Buildroot: %{_tmppath}/%{name}-%{version}-root
+
+%description
+Uisp is utility for downloading/uploading programs to AVR devices. Can also be
+used for some Atmel 8051 type devices. In addition, uisp can erase the device,
+write lock bits, verify and set the active segment.
+
+For use with the following hardware to program the devices:
+  pavr      http://avr.jpk.co.nz/pavr/pavr.html
+  stk500    Atmel STK500
+  dapa      Direct AVR Parallel Access
+  stk200    Parallel Starter Kit STK200, STK300
+  abb       Altera ByteBlasterMV Parallel Port Download Cable
+  avrisp    Atmel AVR ISP (?)
+  bsd       http://www.bsdhome.com/avrprog/ (parallel)
+  fbprg     http://ln.com.ua/~real/avreal/adapters.html (parallel)
+  dt006     http://www.dontronics.com/dt006.html (parallel)
+  dasa      serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)
+  dasa2     serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)
+
+	
+%prep
+%setup -q
+
+%build
+
+./configure --prefix=/usr
+
+make
+
+%install
+rm -rf $RPM_BUILD_ROOT
+make prefix=$RPM_BUILD_ROOT/%{_prefix} install
+
+%clean
+rm -rf $RPM_BUILD_ROOT
+
+%files
+%defattr(-,root,root)
+%doc ChangeLog AUTHORS CHANGES  CHANGES.old  COPYING  INSTALL  TODO kernel pavr
+%{_prefix}/bin/uisp
+
+%changelog
+* Sun May 26 2002 Theodore A. Roth 
+- Integrated in to build system.
+
+* Sat Apr 20 2002 Theodore A. Roth 
+- Update to new 20020420 release.
+
+* Fri Apr 18 2002 Theodore A. Roth 
+- Added patch to fix reading cal byte on tiny15. (from Alexander Popov)
+
+* Mon Apr 08 2002 Theodore A. Roth 
+- Added patch to fix reading signature bytes.
+- Added patch to fix some problems with srec uploading.
+
+* Tue Mar 17 2002 Theodore A. Roth 
+- Added kernel/ and pavr/ directories to %doc files.
+
+* Tue Mar 17 2002 Theodore A. Roth 
+- Initial spec file.
diff --git a/tools/platforms/msp430/.cvsignore b/tools/platforms/msp430/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/msp430/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/msp430/Makefile.am b/tools/platforms/msp430/Makefile.am
new file mode 100644
index 00000000..29ae5edc
--- /dev/null
+++ b/tools/platforms/msp430/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = motelist pybsl
diff --git a/tools/platforms/msp430/motelist/.cvsignore b/tools/platforms/msp430/motelist/.cvsignore
new file mode 100644
index 00000000..1be91fbf
--- /dev/null
+++ b/tools/platforms/msp430/motelist/.cvsignore
@@ -0,0 +1,3 @@
+Makefile
+Makefile.in
+motelist
diff --git a/tools/platforms/msp430/motelist/Makefile.am b/tools/platforms/msp430/motelist/Makefile.am
new file mode 100644
index 00000000..54b7191e
--- /dev/null
+++ b/tools/platforms/msp430/motelist/Makefile.am
@@ -0,0 +1,11 @@
+bin_SCRIPTS = motelist
+
+dist_man_MANS = motelist.1
+
+if CYGWIN
+motelist: motelist-win32.cpp
+	g++ -O3 -Wall -o motelist motelist-win32.cpp
+else
+motelist: motelist-linux
+	cp motelist-linux motelist
+endif
diff --git a/tools/platforms/msp430/motelist/motelist-linux b/tools/platforms/msp430/motelist/motelist-linux
new file mode 100755
index 00000000..b6f1c407
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist-linux
@@ -0,0 +1,275 @@
+#!/usr/bin/perl -w
+use strict;
+# $Id$
+# @author Cory Sharp 
+# @author Joe Polastre
+
+my $help = <<'EOF';
+usage: motelist [options]
+
+  $Revision$
+
+options:
+  -h  display this help
+  -c  compact format, not pretty but easier for parsing
+  -f  specify the usb-serial file (for smote.cs)
+  -k  kernel version: 2.4, 2.6, auto (default)
+  -m  method to scan usb: procfs, sysfs, auto (default)
+  -dev_prefix  force the device prefix for the serial device
+  -usb  display extra usb information
+EOF
+
+my %Opt = (
+  compact => 0,
+  usb => 0,
+  method => "auto",
+  kernel => "auto",
+  dev_prefix => [ "/dev/usb/tts/", "/dev/ttyUSB", "/dev/tts/USB" ],
+  usbserial => "sudo cat /proc/tty/driver/usbserial |",
+);
+
+while (@ARGV) {
+  last unless $ARGV[0] =~ /^-/;
+  my $opt = shift @ARGV;
+  if( $opt eq "-h" ) { print "$help\n"; exit 0; }
+  elsif( $opt eq "-c" ) { $Opt{compact} = 1; }
+  elsif( $opt eq "-f" ) { $Opt{usbserial} = shift @ARGV; }
+  elsif( $opt eq "-k" ) { $Opt{kernel} = shift @ARGV; }
+  elsif( $opt eq "-m" ) { $Opt{method} = shift @ARGV; }
+  elsif( $opt eq "-dev_prefix" ) { $Opt{dev_prefix} = shift @ARGV; }
+  elsif( $opt eq "-usb" ) { $Opt{usb} = 1; }
+  else { print STDERR "$help\nerror, unknown command line option $opt\n"; exit 1; }
+}
+
+if( $Opt{kernel} eq "auto" ) {
+  $Opt{kernel} = "unknown";
+  $Opt{kernel} = $1 if snarf("/proc/version") =~ /\bLinux version (\d+\.\d+)/;
+}
+
+if( $Opt{method} eq "auto" ) {
+  $Opt{method} = ($Opt{kernel} eq "2.4") ? "procfs" : "sysfs";
+}
+
+my @devs = $Opt{method} eq "procfs" ? scan_procfs() : scan_sysfs();
+print_motelist( sort { cmp_usbdev($a,$b) } @devs );
+
+
+#
+#  SysFS
+#
+sub scan_sysfs {
+
+  #  Scan /sys/bus/usb/drivers/usb for FTDI devices
+  my @ftdidevs =
+    grep { ($_->{UsbVendor}||"") eq "0403" && ($_->{UsbProduct}||"") eq "6001" }
+    map { {
+      SysPath => $_,
+      UsbVendor => snarf("$_/idVendor",1),
+      UsbProduct => snarf("$_/idProduct",1),
+    } }
+    glob("/sys/bus/usb/drivers/usb/*");
+
+  #  Gather information about each FTDI device
+  for my $f (@ftdidevs) {
+    my $syspath = $f->{SysPath};
+
+    $f->{InfoManufacturer} = snarf("$syspath/manufacturer",1);
+    $f->{InfoProduct} = snarf("$syspath/product",1);
+    $f->{InfoSerial} = snarf("$syspath/serial",1);
+    $f->{UsbDevNum} = snarf("$syspath/devnum",1);
+
+    my $devstr = readlink($syspath);
+    if( $devstr =~ m{([^/]+)/usb(\d+)/.*-([^/]+)$} ) {
+      $f->{UsbPath} = "usb-$1-$3";
+      $f->{UsbBusNum} = $2;
+    }
+    ($f->{SysDev} = $syspath) =~ s{^.*/}{};
+
+    my $port = "$syspath/$f->{SysDev}:1.0";
+    ($f->{DriverName} = readlink("$port/driver")) =~ s{^.*/}{} if -l "$port/driver";
+    ($f->{SerialDevName} = (glob("$port/tty*"),undef)[0]) =~ s{^.*/}{};
+    $f->{SerialDevNum} = $1 if $f->{SerialDevName} =~ /(\d+)/;
+    $f->{SerialDevName} = getSerialDevName( $f->{SerialDevNum} ) || "  (none)";
+  }
+
+  return @ftdidevs;
+}
+
+
+#
+#  Scan Procfs
+#
+sub scan_procfs {
+
+  my $text_devs = snarf("< /proc/bus/usb/devices");
+  my $text_serial = snarf($Opt{usbserial});
+
+  my @usbdevs = map { {parse_usb_devices_text($_)} }
+                grep { !/^\s*$/ } split /\n+(?=T:)/, $text_devs;
+  my %usbtree = build_usb_tree( @usbdevs );
+  my %usbserialtree = build_usbserial_tree( $text_serial );
+  for my $tts ( values %usbserialtree ) {
+    $usbtree{usbkey($tts->{path})}{usbserial} = $tts if defined $tts->{path};
+  }
+
+  my @ftdidevs = map { {
+      UsbVendor => $_->{Vendor},
+      UsbProduct => $_->{ProdID},
+      InfoManufacturer => $_->{Manufacturer},
+      InfoProduct => $_->{Product},
+      InfoSerial => $_->{SerialNumber},
+      UsbBusNum => $_->{nbus},
+      UsbDevNum => $_->{ndev},
+      UsbPath => (($Opt{kernel} eq "2.4") ? $_->{usbserial}{path} : $_->{usbpath}),
+      DriverName => $_->{driver},
+      SerialDevNum => $_->{usbserial}{tts},
+      SerialDevName => getSerialDevName($_->{usbserial}{tts}) || "  (none)",
+    } }
+    grep { ($_->{Vendor}||"") eq "0403" && ($_->{ProdID}||"") eq "6001" }
+    values %usbtree;
+
+  return @ftdidevs;
+}
+
+sub build_usb_tree {
+  my @devs = @_;
+  my %tree = ();
+  for my $dev (sort { $a->{Lev} <=> $b->{Lev} } @devs) {
+    my ($bus,$lev,$prnt) = ( $dev->{Bus}+0, $dev->{Lev}+0, $dev->{Prnt}+0 );
+    my $devnum = $dev->{"Dev#"}+0;
+    $dev->{nbus} = $bus;
+    $dev->{ndev} = $devnum;
+    $tree{"bus$bus"} = {} unless exists $tree{"bus$bus"};
+    $tree{"bus$bus"}{"dev$devnum"} = $dev;
+    if( $lev == 0 ) {
+      $dev->{usbpath} = "usb-$dev->{SerialNumber}";
+    } else {
+      my $sep = ($lev==1) ? "-" : ".";
+      $dev->{parent} = $tree{"bus$bus"}{"dev$prnt"};
+      $dev->{usbpath} = $dev->{parent}{usbpath} . $sep . ($dev->{Port}+1);
+    }
+    $tree{usbkey($dev->{usbpath})} = $dev;
+  }
+  return %tree;
+}
+
+sub parse_usb_devices_text {
+  my $text = shift;
+  $text =~ s/^\S+\s*//gm;
+  return ($text =~ m/([^\s=]+)=\s*(.*?\S)\s*(?=[^\s=]+=|$)/mg);
+}
+
+sub build_usbserial_tree {
+  my $text = shift;
+  my %tree = ();
+  while( $text =~ /^([^:]+):(.*)/mg ) {
+    my ($tts,$params) = ($1,$2);
+    $tree{$tts} = { tts => $tts };
+    while ($params =~ m/\s+([^:]+):(?:"([^"]*)"|(\S+))/g) {
+      $tree{$tts}{$1} = $2||$3;
+    }
+  }
+  return %tree;
+}
+
+sub usbkey {
+  if( $Opt{kernel} eq "2.4" ) {
+    (my $key = $_[0]) =~ s/^.*-//;
+    return $key;
+  }
+  return $_[0];
+}
+
+
+#
+#  getSerialDevName
+#
+#  For each device, force to use dev_prefix if it's not an array.  Otherwise,
+#  assume it's a list of candidate prefixes.  Check them and commit to the
+#  first one that actually exists.
+#
+sub getSerialDevName {
+  my $devnum = shift;
+  my $devname = undef;
+  if( defined $devnum ) {
+    if( ref($Opt{dev_prefix}) eq "ARRAY" ) {
+      $devname = $devnum;
+      for my $prefix (@{$Opt{dev_prefix}}) {
+        my $file = $prefix . $devnum;
+        if( -e $file ) { $devname = $file; last; }
+      }
+    } else {
+      $devname = $Opt{dev_prefix} . $devnum;
+    }
+  }
+  return $devname;
+}
+
+
+#
+#  Print motelist
+#
+sub print_motelist {
+  my @devs = @_;
+
+  #  If none were found, quit
+  if( @devs == 0 ) {
+    print "No devices found.\n";
+    return;
+  }
+
+  #  Print a header
+  if( !$Opt{compact} ) {
+    if( $Opt{usb} ) {
+      print << "EOF" unless $Opt{compact};
+Bus Dev USB Path                 Reference  Device           Description
+--- --- ------------------------ ---------- ---------------- -------------------------------------
+EOF
+    } else {
+      print << "EOF" unless $Opt{compact};
+Reference  Device           Description
+---------- ---------------- ---------------------------------------------
+EOF
+    }
+  }
+
+  #  Print the usb information
+  for my $dev (sort { cmp_usbdev($a,$b) } @devs) {
+    my $desc = join( " ", $dev->{InfoManufacturer}||"", $dev->{InfoProduct}||"" ) || " (none)";
+    my @output = ( $dev->{InfoSerial}||" (none)", $dev->{SerialDevName}, $desc );
+    @output = ( $dev->{UsbBusNum}, $dev->{UsbDevNum}, $dev->{UsbPath}, @output ) if $Opt{usb};
+    if( $Opt{compact} ) {
+      print join(",",@output) . "\n";
+    } else {
+      printf( ($Opt{usb}?"%3d %3d %-24s ":"")."%-10s %-16s %s\n", @output );
+    }
+  }
+}
+
+
+#
+#  Cmp Usbdev's
+#
+sub cmp_usbdev {
+  my ($a,$b) = @_;
+  if( defined $a->{SerialDevNum} ) {
+    if( defined $b->{SerialDevNum} ) {
+      return $a->{SerialDevNum} <=> $b->{SerialDevNum};
+    }
+    return -1;
+  }
+  return 1 if defined $b->{SerialDevNum};
+  return ($a->{InfoSerial}||"") cmp ($b->{InfoSerial}||"");
+}
+
+#
+#  Read a file in
+#
+sub snarf {
+  open my $fh, $_[0] or return undef;
+  my $text = do{local $/;<$fh>};
+  close $fh;
+  $text =~ s/\s+$// if $_[1];
+  return $text;
+}
+
diff --git a/tools/platforms/msp430/motelist/motelist-win32.cpp b/tools/platforms/msp430/motelist/motelist-win32.cpp
new file mode 100644
index 00000000..8abbf087
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist-win32.cpp
@@ -0,0 +1,468 @@
+// $Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+// @author Cory Sharp 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+namespace TelosList
+{
+using std::cout;
+using std::endl;
+
+typedef std::string String;
+typedef const String& StringRef;
+typedef std::vector VecString;
+
+struct RegValue
+{
+  typedef long long int_type;
+  String name;
+  String data;
+  int_type data_int;
+  int data_type;
+
+  RegValue()
+    : data_int(0), data_type(0)
+  {
+  }
+
+  RegValue( StringRef _name, StringRef _data, int _type )
+    : name(_name), data(_data), data_int(atoi(data.c_str())), data_type(_type)
+  {
+  }
+
+  RegValue( StringRef _name, int_type _data, int _type )
+    : name(_name), data(), data_int(_data), data_type(_type)
+  {
+    char buf[16];
+    int nbuf = sprintf( buf, "%lld", data_int );
+    data = String( buf, buf+nbuf );
+  }
+
+  RegValue( StringRef _name, const char* _data, DWORD _dlen, int _type )
+    : name(_name), data_type(_type)
+  {
+    char buf[256];
+    int nbuf = 0;
+
+    switch( data_type )
+    {
+      case REG_BINARY:
+      case REG_EXPAND_SZ:
+      case REG_MULTI_SZ:
+      case REG_SZ:
+	data = String( _data, _dlen );
+	data_int = atoi( _data );
+	break;
+
+      case REG_NONE:
+	break;
+
+      case REG_DWORD:
+	data_int = *(DWORD*)_data;
+	nbuf = sprintf( buf, "%d", *(DWORD*)_data );
+	data = String( buf, buf+nbuf );
+	break;
+
+      case REG_QWORD:
+	data_int = *(long long*)_data;
+	nbuf = sprintf( buf, "%lld", *(long long*)_data );
+	data = String( buf, buf+nbuf );
+	break;
+
+      default:
+	throw std::runtime_error( "unsupported data type in " + name );
+    }
+  }
+};
+
+
+class RegKey;
+typedef std::vector VecRegKey;
+typedef std::vector VecRegValue;
+
+
+class RegKey
+{
+  HKEY m_hkey;
+  String m_name;
+
+  void openKey( HKEY hkey, StringRef subkey )
+  {
+    LONG result = RegOpenKeyEx( hkey, subkey.c_str(), 0, (KEY_READ&~KEY_NOTIFY), &m_hkey );
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "could not open key " + m_name );
+  }
+
+  void prefixName( HKEY root )
+  {
+    if( root == HKEY_LOCAL_MACHINE )
+      m_name = "HKLM\\" + m_name;
+  }
+
+public:
+
+  ~RegKey()
+  {
+    RegCloseKey(m_hkey);
+    m_hkey = (HKEY)INVALID_HANDLE_VALUE;
+  }
+
+  RegKey( HKEY hkey, StringRef subkey )
+    : m_hkey((HKEY)INVALID_HANDLE_VALUE), m_name(subkey)
+  {
+    prefixName( hkey );
+    openKey( hkey, subkey );
+  }
+
+  RegKey( const RegKey& key, StringRef subkey )
+    : m_hkey((HKEY)INVALID_HANDLE_VALUE), m_name(key.m_name+"\\"+subkey)
+  {
+    openKey( key.m_hkey, subkey );
+  }
+
+  RegKey getSubkey( StringRef subkey ) const
+  {
+    return RegKey( m_hkey, subkey );
+  }
+
+  RegKey operator[]( StringRef subkey ) const
+  {
+    return getSubkey( subkey );
+  }
+
+  RegValue operator()( StringRef value ) const
+  {
+    return getValue( value );
+  }
+
+  RegValue getValue( StringRef value ) const;
+
+  VecString getSubkeyNames() const;
+  VecRegValue getValues() const;
+};
+
+
+VecString RegKey::getSubkeyNames() const
+{
+  VecString v;
+  DWORD i = 0;
+
+  while(true)
+  {
+    DWORD len = 4096;
+    char name[len];
+    LONG result = RegEnumKeyEx( m_hkey, i++, name, &len, NULL, NULL, NULL, NULL );
+
+    if( result == ERROR_NO_MORE_ITEMS )
+      break;
+
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "error iterating keys in " + m_name );
+
+    v.push_back( String(name, name+len) );
+  }
+
+  return v;
+}
+
+
+RegValue RegKey::getValue( StringRef value ) const
+{
+  DWORD dtype = 0;
+  DWORD dlen = 4096;
+  char data[dlen];
+  LONG result = RegQueryValueEx( m_hkey, value.c_str(), NULL, &dtype, (BYTE*)data, &dlen );
+
+  if( result != ERROR_SUCCESS )
+    throw std::runtime_error( "error iterating values in " + m_name );
+
+  return RegValue( value, data, dlen, dtype );
+}
+
+
+VecRegValue RegKey::getValues() const
+{
+  VecRegValue v;
+  DWORD i = 0;
+
+  while(true)
+  {
+    DWORD nlen = 4096;
+    DWORD dlen = 4096;
+    char name[nlen];
+    char data[dlen];
+    DWORD dtype = 0;
+    LONG result = RegEnumValue( m_hkey, i++, name, &nlen, NULL, &dtype, (BYTE*)data, &dlen );
+    dtype = REG_NONE;
+    dlen = 0;
+
+    if( result == ERROR_NO_MORE_ITEMS )
+      break;
+
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "error iterating values in " + m_name );
+
+    v.push_back( RegValue( String(name,name+nlen), data, dlen, dtype ) );
+  }
+
+  return v;
+}
+
+
+struct Device
+{
+  String id;
+  String comm;
+  String info;
+  int sortnum;
+  int refcount;
+
+  Device(): sortnum(0), refcount(0) { }
+
+  bool operator<( const Device& a ) const
+  {
+    if( sortnum < a.sortnum )
+      return true;
+    
+    if( sortnum == a.sortnum )
+      return (id < a.id);
+
+    return false;
+  }
+};
+
+typedef std::list ListDevice;
+
+String join( StringRef sep, const VecString& vs )
+{
+  String j;
+  VecString::const_iterator i = vs.begin();
+  if( i != vs.end() ) j = *i++;
+  while( i != vs.end() ) j += sep + *i++;
+  return j;
+}
+
+String join( StringRef sep, const VecRegValue& vrv )
+{
+  String j;
+  VecRegValue::const_iterator i = vrv.begin();
+  if( i != vrv.end() ) { j = i->name+"="+i->data; i++; }
+  while( i != vrv.end() ) { j = i->name+"="+i->data; i++; }
+  return j;
+}
+
+VecString split( const char* chars, StringRef str )
+{
+  VecString vs;
+
+  String::size_type n0 = 0;
+  String::size_type n1 = str.find_first_of( chars, 0 );
+  vs.push_back( str.substr( n0, n1 ) );
+
+  while( n1 != String::npos )
+  {
+    n0 = n1+1;
+    n1 = str.find_first_of( chars, n0 );
+    if( n1 != String::npos ) vs.push_back( str.substr( n0, n1-n0 ) );
+    else vs.push_back( str.substr( n0 ) );
+  }
+
+  return vs;
+}
+
+int getRefCount( const RegKey& dclass, const RegKey& key )
+{
+  int refcnt = 0;
+
+  try
+  {
+    String symstr = key["Device Parameters"]("SymbolicName").data;
+    VecString sym = split( "\\#", symstr );
+
+    if( sym.size() >= 4 )
+    {
+      sym.erase( sym.begin(), sym.begin()+sym.size()-4 );
+      String devstr = sym[3] +"\\##?#" + join("#",sym) + "\\Control";
+      RegKey ctrl = dclass[devstr];
+      refcnt = strtol( ctrl("ReferenceCount").data.c_str(), NULL, 0 );
+    }
+  }
+  catch( std::runtime_error e ) { }
+
+  return refcnt;
+}
+
+ListDevice getDevices()
+{
+  ListDevice devs;
+
+  String ccs = "SYSTEM\\CurrentControlSet\\";
+  RegKey dclass( HKEY_LOCAL_MACHINE, ccs+"Control\\DeviceClasses" );
+  RegKey ftdibus( HKEY_LOCAL_MACHINE, ccs+"Enum\\FTDIBUS" );
+  RegKey usb6001( HKEY_LOCAL_MACHINE, ccs+"Enum\\USB\\Vid_0403&Pid_6001" );
+
+  VecString fdev = ftdibus.getSubkeyNames();
+  for( VecString::const_iterator i=fdev.begin(); i!=fdev.end(); i++ )
+  {
+    if( i->substr(0,18) == String("VID_0403+PID_6001+") )
+    {
+      Device d;
+      d.id = i->substr(18,8);
+
+      try
+      {
+	RegKey devkey = ftdibus[*i];
+	VecString devsub = devkey.getSubkeyNames();
+	d.comm = devkey[devsub[0]+"\\Device Parameters"]("PortName").data;
+      }
+      catch( std::runtime_error e )
+      {
+	d.comm = "no_comm";
+      }
+
+      try { d.info = usb6001[d.id]("LocationInformation").data; }
+      catch( std::runtime_error e ) { }
+
+      try { d.refcount = getRefCount( dclass, usb6001[d.id] ); }
+      catch( std::runtime_error e ) { }
+
+      String::size_type ncomm = d.comm.find_first_of("0123456789");
+      if( ncomm != String::npos )
+	d.sortnum = atoi( d.comm.substr(ncomm).c_str() );
+
+      devs.push_back(d);
+    }
+  }
+
+  return devs;
+}
+
+
+void prettyPrintDevices( const ListDevice& devs )
+{
+  const char* fmt = "%-10s %-10s %s\n";
+  printf( fmt, "Reference", "CommPort", "Description" );
+  printf( "---------- ---------- ----------------------------------------\n" );
+
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    String comm = i->comm;
+    if( i->refcount == 0 )
+    {
+      char buf[256];
+      int n = snprintf( buf, 255, " (%s)", i->comm.c_str() );
+      comm = String( buf, buf+n );
+    }
+    printf( fmt, i->id.c_str(), comm.c_str(), i->info.c_str() );
+  }
+}
+
+void printDevices( const ListDevice& devs )
+{
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    cout << i->id << "," << i->comm << ","
+	 << i->refcount << "," << i->info << endl;
+  }
+}
+
+ListDevice getActiveDevices( const ListDevice& devs )
+{
+  ListDevice active;
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    if( i->refcount > 0 )
+      active.push_back( *i );
+  }
+  return active;
+}
+
+void usage()
+{
+  cout << "usage: motelist [-l] [-c]\n"
+       << "\n"
+       << "  $Revision$ $Date$\n"
+       << "\n"
+       << "options:\n"
+       << "  -h  display this help\n"
+       << "  -l  long format, also display disconnected devices\n"
+       << "  -c  compact format, not pretty but easier for parsing\n"
+       << std::endl;
+}
+
+int main( VecString args )
+{
+  bool showall = false;
+  bool compact = false;
+  //bool recovery = false;
+
+  for( VecString::size_type n=1; n!=args.size(); n++ )
+  {
+    StringRef opt = args[n];
+    if( opt == "-h" ) { usage(); return 0; }
+    else if( opt == "-l" ) { showall = true; }
+    else if( opt == "-c" ) { compact = true; }
+    else if( opt == "-c" ) { compact = true; }
+    else { usage(); throw std::runtime_error("unknown command line option "+opt); }
+  }
+
+  ListDevice devs = getDevices();
+
+  if( showall == false )
+    devs = getActiveDevices( devs );
+
+  devs.sort();
+
+  if( devs.empty() )
+    { cout << "No devices found." << endl; return 2; }
+  else if( compact )
+    printDevices( devs );
+  else
+    prettyPrintDevices( devs );
+
+  return 0;
+}
+
+}//namespace TelosList
+
+
+int main( int argc, char* argv[] )
+{
+  try
+  {
+    return TelosList::main( TelosList::VecString(argv,argv+argc) );
+  }
+  catch( std::runtime_error e )
+  {
+    std::cerr << "error, " << e.what() << std::endl;
+  }
+  return 1;
+}
+
diff --git a/tools/platforms/msp430/motelist/motelist.1 b/tools/platforms/msp430/motelist/motelist.1
new file mode 100644
index 00000000..53159adc
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist.1
@@ -0,0 +1,30 @@
+.TH motelist 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+motelist - Locate connected USB devices
+.SH SYNOPSIS
+
+\fBmotelist\fR [\fB-c\fR]
+.SH DESCRIPTION
+
+\fBmotelist\fR lists all devices conntected to a PC through an FTDI
+USB-to-serial converter (see www.ftdichip.com).  This includes the
+Telos A, Telos B, and Tmote modules. 
+
+Options for All Platforms:
+  \fB-h\fR display a help message
+  \fB-c\fR compact format for automated parsing
+
+Options for Windows:
+  \fB-l\fR long format, also display disconnected devices
+
+Options for Linux:
+  \fB-f\fR specify the usb-serial file (if not in /proc/tty/driver/usbserial)
+  \fB-k\fR kernel version: 2.4, 2.6, auto (default)
+  \fB-m\fR method to scan usb: procfs, sysfs, auto (default)
+  \fB-dev_prefix\fR force the device prefix for the serial device
+  \fB-usb\fR display extra usb information
+.SH SEE ALSO
+
+.IR tos-bsl (1)
diff --git a/tools/platforms/msp430/pybsl/.cvsignore b/tools/platforms/msp430/pybsl/.cvsignore
new file mode 100644
index 00000000..fdf03227
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/.cvsignore
@@ -0,0 +1,4 @@
+tos-bsl
+tos-bsl.1
+Makefile
+Makefile.in
diff --git a/tools/platforms/msp430/pybsl/Makefile.am b/tools/platforms/msp430/pybsl/Makefile.am
new file mode 100644
index 00000000..dc3f4e9f
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/Makefile.am
@@ -0,0 +1,29 @@
+AUTOMAKE_OPTIONS = foreign
+
+sharedocdir=$(datadir)/doc/tinyos-tools-@PACKAGE_VERSION@
+
+sharedoc_DATA = tos-bsl.txt tos-bsl-license.txt
+
+dist_man_MANS = tos-bsl.1
+
+if CYGWIN
+# Cygwin support using native windows binary
+# (this code is not compatible with cygwin's python)
+
+install: tos-bsl-win.tar.gz
+	tar xzvf tos-bsl-win.tar.gz -C $(bindir) 
+
+else
+# Linux support
+SUBDIRS = serial
+
+tinyoslibdir=$(libdir)/tinyos
+
+bin_SCRIPTS = tos-bsl
+
+tinyoslib_DATA = elf.py
+
+tos-bsl: tos-bsl.in
+	sed -e 's,@tinyoslibdir\@,$(tinyoslibdir),g' tos-bsl.in >$@
+
+endif
diff --git a/tools/platforms/msp430/pybsl/elf.py b/tools/platforms/msp430/pybsl/elf.py
new file mode 100644
index 00000000..ba332191
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/elf.py
@@ -0,0 +1,318 @@
+#!/usr/bin/env python
+import struct
+
+# ELF object file reader
+# (C) 2003 cliechti@gmx.net
+# Python license
+
+#            size  alignment
+# Elf32_Addr    4  4  Unsigned program address
+# Elf32_Half    2  2  Unsigned medium integer
+# Elf32_Off     4  4  Unsigned file offset
+# Elf32_Sword   4  4  Signed large integer
+# Elf32_Word    4  4  Unsigned large integer
+# unsignedchar  1  1  Unsigned small integer
+
+#define EI_NIDENT 16
+#~ typedef struct{
+    #~ unsigned char e_ident[EI_NIDENT];
+    #~ Elf32_Half e_type;
+    #~ Elf32_Half e_machine;
+    #~ Elf32_Word e_version;
+    #~ Elf32_Addr e_entry;
+    #~ Elf32_Off  e_phoff;
+    #~ Elf32_Off  e_shoff;
+    #~ Elf32_Word e_flags;
+    #~ Elf32_Half e_ehsize;
+    #~ Elf32_Half e_phentsize;
+    #~ Elf32_Half e_phnum;
+    #~ Elf32_Half e_shentsize;
+    #~ Elf32_Half e_shnum;
+    #~ Elf32_Half e_shstrndx;
+#~ } Elf32_Ehdr;
+
+
+#Section Header
+#~ typedef struct {
+    #~ Elf32_Word sh_name;
+    #~ Elf32_Word sh_type;
+    #~ Elf32_Word sh_flags;
+    #~ Elf32_Addr sh_addr;
+    #~ Elf32_Off  sh_offset;
+    #~ Elf32_Word sh_size;
+    #~ Elf32_Word sh_link;
+    #~ Elf32_Word sh_info;
+    #~ Elf32_Word sh_addralign;
+    #~ Elf32_Word sh_entsize;
+#~ } Elf32_Shdr; 
+
+#~ typedef struct {
+    #~ Elf32_Word p_type;
+    #~ Elf32_Off  p_offset;
+    #~ Elf32_Addr p_vaddr;
+    #~ Elf32_Addr p_paddr;
+    #~ Elf32_Word p_filesz;
+    #~ Elf32_Word p_memsz;
+    #~ Elf32_Word p_flags;
+    #~ Elf32_Word p_align;
+#~ } Elf32_Phdr;
+
+
+class ELFException(Exception): pass
+
+class ELFSection:
+    """read and store a section"""
+    Elf32_Shdr = "= section.sh_addr + section.sh_size) \
+                    and (not (section.sh_flags & ELFSection.SHF_ALLOC and section.sh_type != ELFSection.SHT_NOBITS) \
+                    or  (p.p_offset <= section.sh_offset \
+                    and (p.p_offset + p.p_filesz >= section.sh_offset + section.sh_size)))):
+                return section.sh_addr + p.p_paddr - p.p_vaddr
+        return section.sh_addr
+
+    def getSections(self):
+        """get sections relevant for the application"""
+        res = []
+        for section in self.sections:
+            if section.sh_flags & ELFSection.SHF_ALLOC and section.sh_type != ELFSection.SHT_NOBITS:
+                res.append(section)
+        return res
+
+    def __str__(self):
+        """pretty print for debug..."""
+        return "%s(self.e_type=%r, self.e_machine=%r, self.e_version=%r, sections=%r)" % (
+            self.__class__.__name__, 
+            self.e_type, self.e_machine, self.e_version,
+            [section.name for section in self.sections])
+
+
+if __name__ == '__main__':
+    print "This is only a module test!"
+    elf = ELFObject()
+    elf.fromFile(open("test.elf"))
+    if elf.e_type != ELFObject.ET_EXEC:
+        raise Exception("No executable")
+    print elf
+
+    #~ print repr(elf.getSection('.text').data)
+    #~ print [(s.name, hex(s.sh_addr)) for s in elf.getSections()]
+    print "-"*20
+    for p in elf.sections: print p
+    print "-"*20
+    for p in elf.getSections(): print p
+    print "-"*20
+    for p in elf.getProgrammableSections(): print p
diff --git a/tools/platforms/msp430/pybsl/serial/.cvsignore b/tools/platforms/msp430/pybsl/serial/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/msp430/pybsl/serial/Makefile.am b/tools/platforms/msp430/pybsl/serial/Makefile.am
new file mode 100644
index 00000000..c3ccf3fb
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/Makefile.am
@@ -0,0 +1,10 @@
+AUTOMAKE_OPTIONS = foreign
+
+tinyoslibdir=$(libdir)/tinyos
+serialdir=$(tinyoslibdir)/serial
+
+serial_DATA = __init__.py 		\
+		serialjava.py		\
+		serialposix.py		\
+		serialutil.py		\
+		serialwin32.py
diff --git a/tools/platforms/msp430/pybsl/serial/__init__.py b/tools/platforms/msp430/pybsl/serial/__init__.py
new file mode 100644
index 00000000..b8c1af35
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/__init__.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python 
+#portable serial port access with python
+#this is a wrapper module for different platform implementations
+#
+# (C)2001-2002 Chris Liechti 
+# this is distributed under a free software license, see license.txt
+
+import sys, os, string
+VERSION = string.split("$Revision$")[1]     #extract CVS version
+
+#chose an implementation, depending on os
+if os.name == 'nt': #sys.platform == 'win32':
+    from serialwin32 import *
+elif os.name == 'posix':
+    from serialposix import *
+elif os.name == 'java':
+    from serialjava import *
+else:
+    raise "Sorry no implementation for your platform available."
+
+#no "mac" implementation. someone want's to write it? i have no access to a mac.
diff --git a/tools/platforms/msp430/pybsl/serial/serialjava.py b/tools/platforms/msp430/pybsl/serial/serialjava.py
new file mode 100644
index 00000000..67b15dec
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialjava.py
@@ -0,0 +1,197 @@
+#!jython
+#module for serial IO for Jython and JavaComm
+#see __init__.py
+#
+#(C) 2002 Chris Liechti 
+# this is distributed under a free software license, see license.txt
+
+import sys, os, string, javax.comm
+import serialutil
+
+VERSION = string.split("$Revision$")[1]     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD, PARITY_MARK, PARITY_SPACE = (0,1,2,3,4)
+STOPBITS_ONE, STOPBITS_TWO, STOPBITS_ONE_HALVE = (1, 2, 3)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+
+portNotOpenError = ValueError('port not open')
+
+def device(portnumber):
+    enum = javax.comm.CommPortIdentifier.getPortIdentifiers()
+    ports = []
+    while enum.hasMoreElements():
+        el = enum.nextElement()
+        if el.getPortType() == javax.comm.CommPortIdentifier.PORT_SERIAL:
+            ports.append(el)
+    return ports[portnumber]
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+
+        if type(port) == type(''):      #strings are taken directly
+            portId = javax.comm.CommPortIdentifier.getPortIdentifier(port)
+        else:
+            portId = device(port)     #numbers are transformed to a comportid obj
+        self.portstr = portId.getName()
+        try:
+            self.sPort = portId.open("python serial module", 10)
+        except Exception, msg:
+            self.sPort = None
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        self.instream = self.sPort.getInputStream()
+        self.outstream = self.sPort.getOutputStream()
+        self.sPort.enableReceiveTimeout(30)
+        if bytesize == FIVEBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_5
+        elif bytesize == SIXBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_6
+        elif bytesize == SEVENBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_7
+        elif bytesize == EIGHTBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_8
+        else:
+            raise ValueError, "unsupported bytesize"
+        
+        if stopbits == STOPBITS_ONE:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_1
+        elif stopbits == STOPBITS_ONE_HALVE:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_1_5
+        elif stopbits == STOPBITS_TWO:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_2
+        else:
+            raise ValueError, "unsupported number of stopbits"
+
+        if parity == PARITY_NONE:
+            self.jparity = javax.comm.SerialPort.PARITY_NONE
+        elif parity == PARITY_EVEN:
+            self.jparity = javax.comm.SerialPort.PARITY_EVEN
+        elif parity == PARITY_ODD:
+            self.jparity = javax.comm.SerialPort.PARITY_ODD
+        elif parity == PARITY_MARK:
+            self.jparity = javax.comm.SerialPort.PARITY_MARK
+        elif parity == PARITY_SPACE:
+            self.jparity = javax.comm.SerialPort.PARITY_SPACE
+        else:
+            raise ValueError, "unsupported parity type"
+
+        jflowin = jflowout = 0
+        if rtscts:
+            jflowin = jflowin | javax.comm.SerialPort.FLOWCONTROL_RTSCTS_IN 
+            jflowout = jflowout | javax.comm.SerialPort.FLOWCONTROL_RTSCTS_OUT
+        if xonxoff:
+            jflowin = jflowin | javax.comm.SerialPort.FLOWCONTROL_XONXOFF_IN
+            jflowout = jflowout | javax.comm.SerialPort.FLOWCONTROL_XONXOFF_OUT
+        
+        self.sPort.setSerialPortParams(baudrate, self.databits, self.jstopbits, self.jparity)
+        self.sPort.setFlowControlMode(jflowin | jflowout)
+        
+        self.timeout = timeout
+        if timeout >= 0:
+            self.sPort.enableReceiveTimeout(timeout*1000)
+        else:
+            self.sPort.disableReceiveTimeout()
+
+    def close(self):
+        if self.sPort:
+            self.instream.close()
+            self.outstream.close()
+            self.sPort.close()
+            self.sPort = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setSerialPortParams(baudrate, self.databits, self.jstopbits, self.jparity)
+
+
+    def inWaiting(self):
+        if not self.sPort: raise portNotOpenError
+        return self.instream.available()
+
+    def write(self, data):
+        if not self.sPort: raise portNotOpenError
+        self.outstream.write(data)
+
+    def read(self, size=1):
+        if not self.sPort: raise portNotOpenError
+        read = ''
+        if size > 0:
+            while len(read) < size:
+                x = self.instream.read()
+                if x == -1:
+                    if self.timeout >= 0:
+                        break
+                else:
+                    read = read + chr(x)
+        return read
+
+    def flushInput(self):
+        if not self.sPort: raise portNotOpenError
+        self.instream.skip(self.instream.available())
+
+    def flushOutput(self):
+        if not self.sPort: raise portNotOpenError
+        self.outstream.flush()
+
+    def sendBreak(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.sendBreak()
+
+    def getDSR(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isDSR()
+
+    def getCD(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isCD()
+
+    def getRI(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isRI()
+
+    def getCTS(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isCTS()
+
+    def setDTR(self,on=1):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setDTR(on)
+
+    def setRTS(self,on=1):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setRTS(on)
+
+if __name__ == '__main__':
+    s = Serial(0,
+                 baudrate=19200,        #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_EVEN,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=3,             #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+               )
+    s.setRTS(1)
+    s.setDTR(1)
+    s.flushInput()
+    s.flushOutput()
+    s.write('hello')
+    print repr(s.read(5))
+    print s.inWaiting()
+    del s
+
+
+
diff --git a/tools/platforms/msp430/pybsl/serial/serialposix.py b/tools/platforms/msp430/pybsl/serial/serialposix.py
new file mode 100644
index 00000000..96a284cd
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialposix.py
@@ -0,0 +1,392 @@
+#!/usr/bin/env python
+#module for serial IO for POSIX compatible systems, like Linux
+#see __init__.py
+#
+#(C) 2001-2002 Chris Liechti 
+# this is distributed under a free software license, see license.txt
+#
+#parts based on code from Grant B. Edwards  :
+#  ftp://ftp.visi.com/users/grante/python/PosixSerial.py
+# references: http://www.easysw.com/~mike/serial/serial.html
+
+import sys, os, fcntl, termios, struct, string, select
+import serialutil
+
+VERSION = string.split("$Revision$")[1]     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD = range(3)
+STOPBITS_ONE, STOPBITS_TWO = (1, 2)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+#Do check the Python version as some constants have moved.
+if (sys.hexversion < 0x020100f0):
+    import TERMIOS
+else:
+    TERMIOS = termios
+
+if (sys.hexversion < 0x020200f0):
+    import FCNTL
+else:
+    FCNTL = fcntl
+
+#try to detect the os so that a device can be selected...
+plat = string.lower(sys.platform)
+
+if   plat[:5] == 'linux':    #Linux (confirmed)
+    def device(port):
+        return '/dev/ttyS%d' % port
+
+elif plat == 'cygwin':       #cywin/win32 (confirmed)
+    def device(port):
+        return '/dev/com%d' % (port + 1)
+
+elif plat     == 'openbsd3': #BSD (confirmed)
+    def device(port):
+        return '/dev/ttyp%d' % port
+
+elif plat[:3] == 'bsd' or  \
+     plat[:6] == 'netbsd' or \
+     plat[:7] == 'freebsd' or \
+     plat[:7] == 'openbsd' or \
+     plat[:6] == 'darwin':   #BSD (confirmed for freebsd4: cuaa%d)
+    def device(port):
+        return '/dev/cuaa%d' % port
+
+elif plat[:4] == 'irix':     #IRIX (not tested)
+    def device(port):
+        return '/dev/ttyf%d' % port
+
+elif plat[:2] == 'hp':       #HP-UX (not tested)
+    def device(port):
+        return '/dev/tty%dp0' % (port+1)
+
+elif plat[:5] == 'sunos':    #Solaris/SunOS (confirmed)
+    def device(port):
+        return '/dev/tty%c' % (ord('a')+port)
+
+elif plat[:3] == 'dgux':     #Digital UNIX (not tested)
+    def device(port):
+        return '/dev/tty0%d' % (port+1)
+
+else:
+    #platform detection has failed...
+    info = "sys.platform = %r\nos.name = %r\nserialposix.py version = %s" % (sys.platform, os.name, VERSION)
+    print """send this information to the author of this module:
+
+%s
+
+also add the device name of the serial port and where the
+counting starts for the first serial port.
+e.g. 'first serial port: /dev/ttyS0'
+and with a bit luck you can get this module running...
+"""
+    raise Exception, "this module does not run on this platform, sorry."
+
+#whats up with "aix", "beos", "sco", ....
+#they should work, just need to know the device names.
+
+
+# construct dictionaries for baud rate lookups
+baudEnumToInt = {}
+baudIntToEnum = {}
+for rate in (0,50,75,110,134,150,200,300,600,1200,1800,2400,4800,9600,
+             19200,38400,57600,115200,230400,460800,500000,576000,921600,
+             1000000,1152000,1500000,2000000,2500000,3000000,3500000,4000000
+    ):
+    try:
+        i = eval('TERMIOS.B'+str(rate))
+        baudEnumToInt[i]=rate
+        baudIntToEnum[rate] = i
+    except:
+        pass
+
+
+#load some constants for later use.
+#try to use values from TERMIOS, use defaults from linux otherwise
+TIOCMGET  = hasattr(TERMIOS, 'TIOCMGET') and TERMIOS.TIOCMGET or 0x5415
+TIOCMBIS  = hasattr(TERMIOS, 'TIOCMBIS') and TERMIOS.TIOCMBIS or 0x5416
+TIOCMBIC  = hasattr(TERMIOS, 'TIOCMBIC') and TERMIOS.TIOCMBIC or 0x5417
+TIOCMSET  = hasattr(TERMIOS, 'TIOCMSET') and TERMIOS.TIOCMSET or 0x5418
+
+#TIOCM_LE = hasattr(TERMIOS, 'TIOCM_LE') and TERMIOS.TIOCM_LE or 0x001
+TIOCM_DTR = hasattr(TERMIOS, 'TIOCM_DTR') and TERMIOS.TIOCM_DTR or 0x002
+TIOCM_RTS = hasattr(TERMIOS, 'TIOCM_RTS') and TERMIOS.TIOCM_RTS or 0x004
+#TIOCM_ST = hasattr(TERMIOS, 'TIOCM_ST') and TERMIOS.TIOCM_ST or 0x008
+#TIOCM_SR = hasattr(TERMIOS, 'TIOCM_SR') and TERMIOS.TIOCM_SR or 0x010
+
+TIOCM_CTS = hasattr(TERMIOS, 'TIOCM_CTS') and TERMIOS.TIOCM_CTS or 0x020
+TIOCM_CAR = hasattr(TERMIOS, 'TIOCM_CAR') and TERMIOS.TIOCM_CAR or 0x040
+TIOCM_RNG = hasattr(TERMIOS, 'TIOCM_RNG') and TERMIOS.TIOCM_RNG or 0x080
+TIOCM_DSR = hasattr(TERMIOS, 'TIOCM_DSR') and TERMIOS.TIOCM_DSR or 0x100
+TIOCM_CD  = hasattr(TERMIOS, 'TIOCM_CD') and TERMIOS.TIOCM_CD or TIOCM_CAR
+TIOCM_RI  = hasattr(TERMIOS, 'TIOCM_RI') and TERMIOS.TIOCM_RI or TIOCM_RNG
+#TIOCM_OUT1 = hasattr(TERMIOS, 'TIOCM_OUT1') and TERMIOS.TIOCM_OUT1 or 0x2000
+#TIOCM_OUT2 = hasattr(TERMIOS, 'TIOCM_OUT2') and TERMIOS.TIOCM_OUT2 or 0x4000
+TIOCINQ   = hasattr(TERMIOS, 'FIONREAD') and TERMIOS.FIONREAD or 0x541B
+
+TIOCM_zero_str = struct.pack('I', 0)
+TIOCM_RTS_str = struct.pack('I', TIOCM_RTS)
+TIOCM_DTR_str = struct.pack('I', TIOCM_DTR)
+
+portNotOpenError = ValueError('port not open')
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+        """init comm port"""
+        self.fd = None
+        self.timeout = timeout
+        vmin = vtime = 0                #timeout is done via select
+        #open
+        if type(port) == type(''):      #strings are taken directly
+            self.portstr = port
+        else:
+            self.portstr = device(port) #numbers are transformed to a os dependant string
+        try:
+            self.fd = os.open(self.portstr, os.O_RDWR|os.O_NOCTTY|os.O_NONBLOCK)
+        except Exception, msg:
+            self.fd = None
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        fcntl.fcntl(self.fd, FCNTL.F_SETFL, 0)  #set blocking
+        try:
+            self.__tcgetattr()          #read current settings
+        except termios.error, msg:      #if a port is nonexistent but has a /dev file, it'll fail here
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        #set up raw mode / no echo / binary
+        self.cflag = self.cflag |  (TERMIOS.CLOCAL|TERMIOS.CREAD)
+        self.lflag = self.lflag & ~(TERMIOS.ICANON|TERMIOS.ECHO|TERMIOS.ECHOE|TERMIOS.ECHOK|TERMIOS.ECHONL|
+                                    TERMIOS.ECHOCTL|TERMIOS.ECHOKE|TERMIOS.ISIG|TERMIOS.IEXTEN) #|TERMIOS.ECHOPRT
+        self.oflag = self.oflag & ~(TERMIOS.OPOST)
+        if hasattr(TERMIOS, 'IUCLC'):
+            self.iflag = self.iflag & ~(TERMIOS.INLCR|TERMIOS.IGNCR|TERMIOS.ICRNL|TERMIOS.IUCLC|TERMIOS.IGNBRK)
+        else:
+            self.iflag = self.iflag & ~(TERMIOS.INLCR|TERMIOS.IGNCR|TERMIOS.ICRNL|TERMIOS.IGNBRK)
+        #setup baudrate
+        try:
+            self.ispeed = self.ospeed = baudIntToEnum[baudrate]
+        except:
+            raise ValueError,'invalid baud rate: %s' % baudrate
+        #setup char len
+        self.cflag = self.cflag & ~TERMIOS.CSIZE
+        if bytesize == 8:
+            self.cflag = self.cflag | TERMIOS.CS8
+        elif bytesize == 7:
+            self.cflag = self.cflag | TERMIOS.CS7
+        elif bytesize == 6:
+            self.cflag = self.cflag | TERMIOS.CS6
+        elif bytesize == 5:
+            self.cflag = self.cflag | TERMIOS.CS5
+        else:
+            raise ValueError,'invalid char len: '+str(clen)
+        #setup stopbits
+        if stopbits == STOPBITS_ONE:
+            self.cflag = self.cflag & ~(TERMIOS.CSTOPB)
+        elif stopbits == STOPBITS_TWO:
+            self.cflag = self.cflag |  (TERMIOS.CSTOPB)
+        else:
+            raise ValueError,'invalid stopit specification:'+str(stopbits)
+        #setup parity
+        self.iflag = self.iflag & ~(TERMIOS.INPCK|TERMIOS.ISTRIP)
+        if parity == PARITY_NONE:
+            self.cflag = self.cflag & ~(TERMIOS.PARENB|TERMIOS.PARODD)
+        elif parity == PARITY_EVEN:
+            self.cflag = self.cflag & ~(TERMIOS.PARODD)
+            self.cflag = self.cflag |  (TERMIOS.PARENB)
+        elif parity == PARITY_ODD:
+            self.cflag = self.cflag |  (TERMIOS.PARENB|TERMIOS.PARODD)
+        else:
+            raise ValueError,'invalid parity: '+str(par)
+        #setup flow control
+        #xonxoff
+        if hasattr(TERMIOS, 'IXANY'):
+            if xonxoff:
+                self.iflag = self.iflag |  (TERMIOS.IXON|TERMIOS.IXOFF|TERMIOS.IXANY)
+            else:
+                self.iflag = self.iflag & ~(TERMIOS.IXON|TERMIOS.IXOFF|TERMIOS.IXANY)
+        else:
+            if xonxoff:
+                self.iflag = self.iflag |  (TERMIOS.IXON|TERMIOS.IXOFF)
+            else:
+                self.iflag = self.iflag & ~(TERMIOS.IXON|TERMIOS.IXOFF)
+        #rtscts
+        if hasattr(TERMIOS, 'CRTSCTS'):
+            if rtscts:
+                self.cflag = self.cflag |  (TERMIOS.CRTSCTS)
+            else:
+                self.cflag = self.cflag & ~(TERMIOS.CRTSCTS)
+        elif hasattr(TERMIOS, 'CNEW_RTSCTS'):   #try it with alternate constant name
+            if rtscts:
+                self.cflag = self.cflag |  (TERMIOS.CNEW_RTSCTS)
+            else:
+                self.cflag = self.cflag & ~(TERMIOS.CNEW_RTSCTS)
+        #XXX should there be a warning if setting up rtscts (and xonxoff etc) fails??
+        
+        #buffer
+        #vmin "minimal number of characters to be read. = for non blocking"
+        if vmin<0 or vmin>255:
+            raise ValueError,'invalid vmin: '+str(vmin)
+        self.cc[TERMIOS.VMIN] = vmin
+        #vtime
+        if vtime<0 or vtime>255:
+            raise ValueError,'invalid vtime: '+str(vtime)
+        self.cc[TERMIOS.VTIME] = vtime
+        #activate settings
+        self.__tcsetattr()
+
+    def __tcsetattr(self):
+        """internal function to set port attributes"""
+        termios.tcsetattr(self.fd, TERMIOS.TCSANOW, [self.iflag,self.oflag,self.cflag,self.lflag,self.ispeed,self.ospeed,self.cc])
+
+    def __tcgetattr(self):
+        """internal function to get port attributes"""
+        self.iflag,self.oflag,self.cflag,self.lflag,self.ispeed,self.ospeed,self.cc = termios.tcgetattr(self.fd)
+
+    def close(self):
+        """close port"""
+        if self.fd:
+            os.close(self.fd)
+            self.fd = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.fd: raise portNotOpenError
+        self.__tcgetattr()  #read current settings
+        #setup baudrate
+        try:
+            self.ispeed = self.ospeed = baudIntToEnum[baudrate]
+        except:
+            raise ValueError,'invalid baud rate: %s' % baudrate
+        self.__tcsetattr()
+
+    def inWaiting(self):
+        """how many character are in the input queue"""
+        #~ s = fcntl.ioctl(self.fd, TERMIOS.FIONREAD, TIOCM_zero_str)
+        s = fcntl.ioctl(self.fd, TIOCINQ, TIOCM_zero_str)
+        return struct.unpack('I',s)[0]
+
+    def write(self, data):
+        """write a string to the port"""
+        if not self.fd: raise portNotOpenError
+        t = len(data)
+        d = data
+        while t>0:
+            n = os.write(self.fd, d)
+            d = d[n:]
+            t = t - n
+
+    def read(self, size=1):
+        """read a number of bytes from the port.
+        the default is one (unlike files)"""
+        if not self.fd: raise portNotOpenError
+        read = ''
+        inp = None
+        if size > 0:
+            while len(read) < size:
+                #print "\tread(): size",size, "have", len(read)    #debug
+                ready,_,_ = select.select([self.fd],[],[], self.timeout)
+                if not ready:
+                    break   #timeout
+                buf = os.read(self.fd, size-len(read))
+                read = read + buf
+                if self.timeout >= 0 and not buf:
+                    break  #early abort on timeout
+        return read
+
+    def flushInput(self):
+        """clear input queue"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcflush(self.fd, TERMIOS.TCIFLUSH)
+
+    def flushOutput(self):
+        """flush output"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcflush(self.fd, TERMIOS.TCOFLUSH)
+
+    def sendBreak(self):
+        """send break signal"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcsendbreak(self.fd, 0)
+
+    def drainOutput(self):
+        """internal - not portable!"""
+        if not self.fd: raise portNotOpenError
+        termios.tcdrain(self.fd)
+
+    def nonblocking(self):
+        """internal - not portable!"""
+        if not self.fd:
+            raise portNotOpenError
+        fcntl.fcntl(self.fd, FCNTL.F_SETFL, FCNTL.O_NONBLOCK)
+
+    def getDSR(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_DSR
+
+    def getCD(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_CD
+
+    def getRI(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_RI
+
+    def getCTS(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_CTS
+
+    def setDTR(self,on=1):
+        """set terminal status line"""
+        if not self.fd: raise portNotOpenError
+        if on:
+            fcntl.ioctl(self.fd, TIOCMBIS, TIOCM_DTR_str)
+        else:
+            fcntl.ioctl(self.fd, TIOCMBIC, TIOCM_DTR_str)
+
+    def setRTS(self,on=1):
+        """set terminal status line"""
+        if not self.fd: raise portNotOpenError
+        if on:
+            fcntl.ioctl(self.fd, TIOCMBIS, TIOCM_RTS_str)
+        else:
+            fcntl.ioctl(self.fd, TIOCMBIC, TIOCM_RTS_str)
+
+if __name__ == '__main__':
+    s = Serial(0,
+                 baudrate=19200,        #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_EVEN,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=3,             #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+               )
+    s.setRTS(1)
+    s.setDTR(1)
+    s.flushInput()
+    s.flushOutput()
+    s.write('hello')
+    print repr(s.read(5))
+    print s.inWaiting()
+    del s
diff --git a/tools/platforms/msp430/pybsl/serial/serialutil.py b/tools/platforms/msp430/pybsl/serial/serialutil.py
new file mode 100644
index 00000000..e3a4bdb3
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialutil.py
@@ -0,0 +1,65 @@
+
+class SerialException(Exception):
+    pass
+
+class FileLike:
+    """An abstract file like class.
+    
+    This class implements readline and readlines based on read and
+    writelines based on write.
+    This class is used to provide the above functions for to Serial
+    port objects.
+    
+    Note that when the serial port was opened with _NO_ timeout that
+    readline blocks until it sees a newline (or the specified size is
+    reached) and that readlines would never return and therefore
+    refuses to work (it raises an exception in this case)!
+    """
+
+    def read(self, size): raise NotImplementedError
+    def write(self, s): raise NotImplementedError
+
+    def readline(self, size=None, eol='\n'):
+        """read a line which is terminated with end-of-line (eol) character
+        ('\n' by default) or until timeout"""
+        line = ''
+        while 1:
+            c = self.read(1)
+            if c:
+                line += c   #not very efficient but lines are usually not that long
+                if c == eol:
+                    break
+                if size is not None and len(line) >= size:
+                    break
+            else:
+                break
+        return line
+
+    def readlines(self, sizehint=None, eol='\n'):
+        """read a list of lines, until timeout
+        sizehint is ignored"""
+        if self.timeout is None:
+            raise ValueError, "Serial port MUST have enabled timeout for this function!"
+        lines = []
+        while 1:
+            line = self.readline(eol=eol)
+            if line:
+                lines.append(line)
+                if line[-1] != eol:    #was the line received with a timeout?
+                    break
+            else:
+                break
+        return lines
+
+    def xreadlines(self, sizehint=None):
+        """just call readlines - here for compatibility"""
+        return self.readlines()
+
+    def writelines(self, sequence):
+        for line in sequence:
+            self.write(line)
+
+    def flush(self):
+        """flush of file like objects"""
+        pass
+
diff --git a/tools/platforms/msp430/pybsl/serial/serialwin32.py b/tools/platforms/msp430/pybsl/serial/serialwin32.py
new file mode 100644
index 00000000..ffb3155a
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialwin32.py
@@ -0,0 +1,280 @@
+#! python
+#serial driver for win32
+#see __init__.py
+#
+#(C) 2001-2002 Chris Liechti 
+# this is distributed under a free software license, see license.txt
+
+import win32file  # The base COM port and file IO functions.
+import win32event # We use events and the WaitFor[Single|Multiple]Objects functions.
+import win32con   # constants.
+import sys, string
+import serialutil
+
+VERSION = string.split("$Revision$")[1]     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD = range(3)
+STOPBITS_ONE, STOPBITS_TWO = (1, 2)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+portNotOpenError = ValueError('port not open')
+
+#from winbase.h. these should realy be in win32con
+MS_CTS_ON  = 16
+MS_DSR_ON  = 32
+MS_RING_ON = 64
+MS_RLSD_ON = 128
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+        """initialize comm port"""
+
+        self.timeout = timeout
+
+        if type(port) == type(''):       #strings are taken directly
+            self.portstr = port
+        else:
+	    # CSS 20040528 - open wasn't working for COM10 and greater, but by
+            # chance the '\\.\COM10' format seems to work, yay!  But, only use
+            # if for COM10 and greater in case it introduces some other
+	    # incompatibility.
+	    if port < 9:
+	      self.portstr = 'COM%d' % (port+1) #numbers are transformed to a string
+	    else:
+	      self.portstr = '\\\\.\\COM%d' % (port+1) #WIN NT format??
+
+        try:
+            self.hComPort = win32file.CreateFile(self.portstr,
+                   win32con.GENERIC_READ | win32con.GENERIC_WRITE,
+                   0, # exclusive access
+                   None, # no security
+                   win32con.OPEN_EXISTING,
+                   win32con.FILE_ATTRIBUTE_NORMAL | win32con.FILE_FLAG_OVERLAPPED,
+                   None)
+        except Exception, msg:
+            self.hComPort = None    #'cause __del__ is called anyway
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        # Setup a 4k buffer
+        win32file.SetupComm(self.hComPort, 4096, 4096)
+
+        #Save original timeout values:
+        self.orgTimeouts = win32file.GetCommTimeouts(self.hComPort)
+
+        #Set Windows timeout values
+        #timeouts is a tuple with the following items:
+        #(ReadIntervalTimeout,ReadTotalTimeoutMultiplier,
+        # ReadTotalTimeoutConstant,WriteTotalTimeoutMultiplier,
+        # WriteTotalTimeoutConstant)
+        if timeout is None:
+            timeouts = (0, 0, 0, 0, 0)
+        elif timeout == 0:
+            timeouts = (win32con.MAXDWORD, 0, 0, 0, 0)
+        else:
+            #timeouts = (0, 0, 0, 0, 0) #timeouts are done with WaitForSingleObject
+            #timeouts = (win32con.MAXDWORD, 0, 0, 0, 1000)   #doesn't works
+            #timeouts = (timeout*1000, 0, timeout*1000, 0, 0)
+            timeouts = (0, 0, timeout*1000, 0, timeout*1000)
+        win32file.SetCommTimeouts(self.hComPort, timeouts)
+
+        #win32file.SetCommMask(self.hComPort, win32file.EV_RXCHAR | win32file.EV_TXEMPTY |
+        #    win32file.EV_RXFLAG | win32file.EV_ERR)
+        win32file.SetCommMask(self.hComPort,
+                win32file.EV_RXCHAR | win32file.EV_RXFLAG | win32file.EV_ERR)
+        #win32file.SetCommMask(self.hComPort, win32file.EV_ERR)
+
+        # Setup the connection info.
+        # Get state and modify it:
+        comDCB = win32file.GetCommState(self.hComPort)
+        comDCB.BaudRate = baudrate
+
+        if bytesize == FIVEBITS:
+            comDCB.ByteSize     = 5
+        elif bytesize == SIXBITS:
+            comDCB.ByteSize     = 6
+        elif bytesize == SEVENBITS:
+            comDCB.ByteSize     = 7
+        elif bytesize == EIGHTBITS:
+            comDCB.ByteSize     = 8
+
+        if parity == PARITY_NONE:
+            comDCB.Parity       = win32file.NOPARITY
+            comDCB.fParity      = 0 # Dis/Enable Parity Check
+        elif parity == PARITY_EVEN:
+            comDCB.Parity       = win32file.EVENPARITY
+            comDCB.fParity      = 1 # Dis/Enable Parity Check
+        elif parity == PARITY_ODD:
+            comDCB.Parity       = win32file.ODDPARITY
+            comDCB.fParity      = 1 # Dis/Enable Parity Check
+
+        if stopbits == STOPBITS_ONE:
+            comDCB.StopBits     = win32file.ONESTOPBIT
+        elif stopbits == STOPBITS_TWO:
+            comDCB.StopBits     = win32file.TWOSTOPBITS
+        comDCB.fBinary          = 1 # Enable Binary Transmission
+        # Char. w/ Parity-Err are replaced with 0xff (if fErrorChar is set to TRUE)
+        if rtscts:
+            comDCB.fRtsControl  = win32file.RTS_CONTROL_HANDSHAKE
+            comDCB.fDtrControl  = win32file.DTR_CONTROL_HANDSHAKE
+        else:
+            comDCB.fRtsControl  = win32file.RTS_CONTROL_ENABLE
+            comDCB.fDtrControl  = win32file.DTR_CONTROL_ENABLE
+        comDCB.fOutxCtsFlow     = rtscts
+        comDCB.fOutxDsrFlow     = rtscts
+        comDCB.fOutX            = xonxoff
+        comDCB.fInX             = xonxoff
+        comDCB.fNull            = 0
+        comDCB.fErrorChar       = 0
+        comDCB.fAbortOnError    = 0
+
+        win32file.SetCommState(self.hComPort, comDCB)
+
+        # Clear buffers:
+        # Remove anything that was there
+        win32file.PurgeComm(self.hComPort,
+                            win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT |
+                            win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+
+        #print win32file.ClearCommError(self.hComPort) #flags, comState =
+
+        #self.overlapped = win32file.OVERLAPPED()
+        #self.overlapped.hEvent = win32event.CreateEvent(None, 0, 0, None)
+
+    def __del__(self):
+        self.close()
+
+    def close(self):
+        """close port"""
+        if self.hComPort:
+            #Wait until data is transmitted, but not too long... (Timeout-Time)
+            #while 1:
+            #    flags, comState = win32file.ClearCommError(hComPort)
+            #    if comState.cbOutQue <= 0 or calcTimeout(startTime) > timeout:
+            #        break
+
+            self.setRTS(0)
+            self.setDTR(0)
+            #Clear buffers:
+            win32file.PurgeComm(self.hComPort,
+                                win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT |
+                                win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+            #Restore original timeout values:
+            win32file.SetCommTimeouts(self.hComPort, self.orgTimeouts)
+            #Close COM-Port:
+            win32file.CloseHandle(self.hComPort)
+            self.hComPort = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.hComPort: raise portNotOpenError
+        # Setup the connection info.
+        # Get state and modify it:
+        comDCB = win32file.GetCommState(self.hComPort)
+        comDCB.BaudRate = baudrate
+        win32file.SetCommState(self.hComPort, comDCB)
+
+    def inWaiting(self):
+        """returns the number of bytes waiting to be read"""
+        flags, comstat = win32file.ClearCommError(self.hComPort)
+        return comstat.cbInQue
+
+    def read(self, size=1):
+        "read num bytes from serial port"
+        if not self.hComPort: raise portNotOpenError
+        read = ''
+        if size > 0:
+            overlapped = win32file.OVERLAPPED()
+            overlapped.hEvent = win32event.CreateEvent(None, 1, 0, None)
+            if self.timeout == 0:
+                flags, comstat = win32file.ClearCommError(self.hComPort)
+                n = min(comstat.cbInQue, size)
+                if n > 0:
+                    rc, buf = win32file.ReadFile(self.hComPort, win32file.AllocateReadBuffer(n), overlapped)
+                    win32event.WaitForSingleObject(overlapped.hEvent, win32event.INFINITE)
+                    read = str(buf)
+            else:
+                flags, comstat = win32file.ClearCommError(self.hComPort)
+                rc, buf = win32file.ReadFile(self.hComPort, win32file.AllocateReadBuffer(size), overlapped)
+                n = win32file.GetOverlappedResult(self.hComPort, overlapped, 1)
+                read = str(buf[:n])
+        return read
+
+    def write(self, s):
+        "write string to serial port"
+        if not self.hComPort: raise portNotOpenError
+        #print repr(s),
+        overlapped = win32file.OVERLAPPED()
+        overlapped.hEvent = win32event.CreateEvent(None, 1, 0, None)
+        err, n = win32file.WriteFile(self.hComPort, s, overlapped)
+        if err: #will be ERROR_IO_PENDING:
+            # Wait for the write to complete.
+            win32event.WaitForSingleObject(overlapped.hEvent, win32event.INFINITE)
+
+    def flushInput(self):
+        if not self.hComPort: raise portNotOpenError
+        win32file.PurgeComm(self.hComPort, win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+
+    def flushOutput(self):
+        if not self.hComPort: raise portNotOpenError
+        win32file.PurgeComm(self.hComPort, win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT)
+
+    def sendBreak(self):
+        if not self.hComPort: raise portNotOpenError
+        import time
+        win32file.SetCommBreak(self.hComPort)
+        #TODO: how to set the correct duration??
+        time.sleep(0.020)
+        win32file.ClearCommBreak(self.hComPort)
+
+    def setRTS(self,level=1):
+        """set terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        if level:
+            win32file.EscapeCommFunction(self.hComPort, win32file.SETRTS)
+        else:
+            win32file.EscapeCommFunction(self.hComPort, win32file.CLRRTS)
+
+    def setDTR(self,level=1):
+        """set terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        if level:
+            win32file.EscapeCommFunction(self.hComPort, win32file.SETDTR)
+        else:
+            win32file.EscapeCommFunction(self.hComPort, win32file.CLRDTR)
+
+    def getCTS(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_CTS_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getDSR(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_DSR_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getRI(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_RING_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getCD(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_RLSD_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+#Nur Testfunktion!!
+if __name__ == '__main__':
+    print __name__
+    s = Serial(0)
+
diff --git a/tools/platforms/msp430/pybsl/tos-bsl-license.txt b/tools/platforms/msp430/pybsl/tos-bsl-license.txt
new file mode 100644
index 00000000..5cae85d7
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl-license.txt
@@ -0,0 +1,62 @@
+Copyright (c) 2001-2003 Chris Liechti 
+
+All Rights Reserved.
+
+This is the Python license. In short, you can use this product in
+commercial and non-commercial applications, modify it, redistribute it.
+A notification to the author when you use and/or modify it is welcome.
+
+TERMS AND CONDITIONS FOR ACCESSING OR OTHERWISE USING THIS SOFTWARE
+============================================
+
+LICENSE AGREEMENT
+-----------------
+
+1. This LICENSE AGREEMENT is between the copyright holder of this
+product, and the Individual or Organization ("Licensee") accessing
+and otherwise using this product in source or binary form and its
+associated documentation.
+
+2. Subject to the terms and conditions of this License Agreement,
+the copyright holder hereby grants Licensee a nonexclusive,
+royalty-free, world-wide license to reproduce, analyze, test,
+perform and/or display publicly, prepare derivative works, distribute,
+and otherwise use this product alone or in any derivative version,
+provided, however, that copyright holders License Agreement and
+copyright holders notice of copyright are retained in this product
+alone or in any derivative version prepared by Licensee.
+
+3. In the event Licensee prepares a derivative work that is based on
+or incorporates this product or any part thereof, and wants to make
+the derivative work available to others as provided herein, then
+Licensee hereby agrees to include in any such work a brief summary of
+the changes made to this product.
+
+4. The copyright holder is making this product available to Licensee
+on an "AS IS" basis. THE COPYRIGHT HOLDER MAKES NO REPRESENTATIONS
+OR WARRANTIES, EXPRESS OR IMPLIED.  BY WAY OF EXAMPLE, BUT NOT
+LIMITATION, THE COPYRIGHT HOLDER MAKES NO AND DISCLAIMS ANY
+REPRESENTATION OR WARRANTY OF MERCHANTABILITY OR FITNESS FOR
+ANY PARTICULAR PURPOSE OR THAT THE USE OF THIS PRODUCT WILL
+NOT INFRINGE ANY THIRD PARTY RIGHTS.
+
+5. THE COPYRIGHT HOLDER SHALL NOT BE LIABLE TO LICENSEE OR ANY
+OTHER USERS OF THIS PRODUCT FOR ANY INCIDENTAL, SPECIAL, OR
+CONSEQUENTIAL DAMAGES OR LOSS AS A RESULT OF MODIFYING,
+DISTRIBUTING, OR OTHERWISE USING THIS PRODUCT, OR ANY
+DERIVATIVE THEREOF, EVEN IF ADVISED OF THE POSSIBILITY
+THEREOF.
+
+6. This License Agreement will automatically terminate upon a
+material breach of its terms and conditions.
+
+7. Nothing in this License Agreement shall be deemed to create any
+relationship of agency, partnership, or joint venture between the
+copyright holder and Licensee. This License Agreement does not grant
+permission to use trademarks or trade names from the copyright holder
+in a trademark sense to endorse or promote products or services of
+Licensee, or any third party.
+
+8. By copying, installing or otherwise using this product, Licensee
+agrees to be bound by the terms and conditions of this License
+Agreement.
diff --git a/tools/platforms/msp430/pybsl/tos-bsl-win.tar.gz b/tools/platforms/msp430/pybsl/tos-bsl-win.tar.gz
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diff --git a/tools/platforms/msp430/pybsl/tos-bsl.1.in b/tools/platforms/msp430/pybsl/tos-bsl.1.in
new file mode 100644
index 00000000..8e275d99
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.1.in
@@ -0,0 +1,18 @@
+.TH tos-bsl 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-bsl - Program a telos or telos B mote
+.SH SYNOPSIS
+
+\fBtos-bsl\fR [\fIoptions-and-files\fR]
+.SH DESCRIPTION
+
+\fBtos-bsl\fR is a version of \fBmsp430-bsl\fR modifies to support the
+telos and telos B motes. See 
+  @prefix@/share/doc/tinyos-tools-@PACKAGE_VERSION@/tos-bsl.txt
+.br
+for full documentation.
+.SH SEE ALSO
+
+.IR motelist (1)
diff --git a/tools/platforms/msp430/pybsl/tos-bsl.in b/tools/platforms/msp430/pybsl/tos-bsl.in
new file mode 100644
index 00000000..ee0d4152
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.in
@@ -0,0 +1,1629 @@
+#!/usr/bin/env python
+# Serial Bootstrap Loader software for the MSP430 embedded proccessor.
+#
+# (C) 2001-2003 Chris Liechti 
+# this is distributed under a free software license, see license.txt
+#
+# fixes from Colin Domoney
+#
+# based on the application note slas96b.pdf from Texas Instruments, Inc.,
+# Volker Rzehak
+# additional infos from slaa089a.pdf
+
+import sys, time, string, cStringIO, struct
+sys.path.append("@tinyoslibdir@")
+import serial
+
+VERSION = string.split("Revision: 1.39-telos-8 ")[1] #freeze the mspgcc CVS version, and tag telos
+
+DEBUG = 0                                       #disable debug messages by default
+
+#copy of the patch file provided by TI
+#this part is (C) by Texas Instruments
+PATCH = """@0220
+31 40 1A 02 09 43 B0 12 2A 0E B0 12 BA 0D 55 42
+0B 02 75 90 12 00 1F 24 B0 12 BA 02 55 42 0B 02
+75 90 16 00 16 24 75 90 14 00 11 24 B0 12 84 0E
+06 3C B0 12 94 0E 03 3C 21 53 B0 12 8C 0E B2 40
+10 A5 2C 01 B2 40 00 A5 28 01 30 40 42 0C 30 40
+76 0D 30 40 AC 0C 16 42 0E 02 17 42 10 02 E2 B2
+08 02 14 24 B0 12 10 0F 36 90 00 10 06 28 B2 40
+00 A5 2C 01 B2 40 40 A5 28 01 D6 42 06 02 00 00
+16 53 17 83 EF 23 B0 12 BA 02 D3 3F B0 12 10 0F
+17 83 FC 23 B0 12 BA 02 D0 3F 18 42 12 02 B0 12
+10 0F D2 42 06 02 12 02 B0 12 10 0F D2 42 06 02
+13 02 38 E3 18 92 12 02 BF 23 E2 B3 08 02 BC 23
+30 41
+q
+"""
+
+#These BSL's are (C) by TI. They come with the application note slaa089a
+F1X_BSL = """@0220
+24 02 2E 02 31 40 20 02 2B D2 C0 43 EA FF 32 C2
+F2 C0 32 00 00 00 B2 40 80 5A 20 01 F2 40 85 00
+57 00 F2 40 80 00 56 00 E2 D3 21 00 E2 D3 22 00
+E2 C3 26 00 E2 C2 2A 00 E2 C2 2E 00 B2 40 10 A5
+2C 01 B2 40 00 A5 28 01 3B C0 3A 00 B0 12 D6 04
+82 43 12 02 09 43 36 40 0A 02 37 42 B0 12 AC 05
+C6 4C 00 00 16 53 17 83 F9 23 D2 92 0C 02 0D 02
+28 20 55 42 0B 02 75 90 12 00 80 24 75 90 10 00
+6D 24 B0 12 9C 04 55 42 0B 02 75 90 18 00 31 24
+75 90 1E 00 B8 24 75 90 20 00 17 24 2B B2 11 24
+75 90 16 00 22 24 75 90 14 00 B3 24 75 90 1A 00
+18 24 75 90 1C 00 45 24 04 3C B0 12 36 05 BE 3F
+21 53 B0 12 3C 05 BA 3F 03 43 B0 12 36 05 D2 42
+0E 02 56 00 D2 42 0F 02 57 00 D2 42 10 02 16 02
+AD 3F B0 12 36 05 10 42 0E 02 16 42 0E 02 15 43
+07 3C 36 40 FE FF B2 40 06 A5 10 02 35 40 0C 00
+B2 40 00 A5 2C 01 92 42 10 02 28 01 B6 43 00 00
+92 B3 2C 01 FD 23 15 83 F3 23 36 90 FE FF CD 27
+37 40 80 00 36 F0 80 FF 36 90 00 11 0E 28 07 57
+36 F0 00 FF 36 90 00 12 08 28 07 57 36 F0 00 FE
+04 3C 16 42 0E 02 17 42 10 02 35 43 75 96 03 20
+17 83 FC 23 B2 3F 82 46 00 02 B3 3F 36 40 E0 FF
+37 40 20 00 B0 12 AC 05 7C 96 01 24 2B D3 17 83
+F9 23 2B C2 B0 12 9C 04 2B D2 9F 3F 16 42 0E 02
+17 42 10 02 2B B2 38 24 3B D0 10 00 B0 12 AC 05
+36 90 00 10 06 2C 36 90 00 01 09 2C C6 4C 00 00
+25 3C B2 40 00 A5 2C 01 B2 40 40 A5 28 01 16 B3
+03 20 C2 4C 14 02 1A 3C C2 4C 15 02 86 9A FD FF
+08 24 2B D3 3B B0 20 00 04 20 3B D0 20 00 82 46
+00 02 36 90 01 02 04 28 3B D2 3B B0 10 00 02 24
+3B C0 32 00 1A 42 14 02 86 4A FF FF 16 53 17 83
+CD 23 B0 12 9C 04 61 3F B0 12 AC 05 17 83 FC 23
+B0 12 9C 04 5E 3F B2 40 F0 0F 0E 02 B2 40 10 00
+10 02 B2 40 80 00 0A 02 D2 42 10 02 0C 02 D2 42
+10 02 0D 02 82 43 12 02 09 43 36 40 0A 02 27 42
+7C 46 B0 12 40 05 17 83 FB 23 16 42 0E 02 17 42
+10 02 36 90 00 01 0A 28 B2 46 14 02 5C 42 14 02
+B0 12 40 05 17 83 5C 42 15 02 01 3C 7C 46 B0 12
+40 05 17 83 EE 23 B2 E3 12 02 5C 42 12 02 B0 12
+40 05 5C 42 13 02 B0 12 40 05 E0 3E 18 42 12 02
+B0 12 AC 05 C2 4C 12 02 B0 12 AC 05 C2 4C 13 02
+38 E3 3B B2 0A 24 86 9A FE FF 07 24 3B B0 20 00
+04 20 16 53 82 46 00 02 2B D3 18 92 12 02 08 23
+2B B3 06 23 30 41 E2 B2 28 00 FD 27 E2 B2 28 00
+FD 23 B2 40 24 02 60 01 E2 B2 28 00 FD 27 15 42
+70 01 05 11 05 11 05 11 82 45 02 02 05 11 82 45
+04 02 B2 80 1E 00 04 02 57 42 16 02 37 80 03 00
+05 11 05 11 17 53 FD 23 35 50 40 A5 82 45 2A 01
+35 42 B2 40 24 02 60 01 92 92 70 01 02 02 FC 2F
+15 83 F7 23 09 43 7C 40 90 00 02 3C 7C 40 A0 00
+C2 43 07 02 C9 EC 12 02 19 E3 1B C3 55 42 07 02
+55 45 56 05 00 55 0C 2E 2E 2E 2E 2E 2E 2E 2E 1A
+34 34 92 42 70 01 72 01 B2 50 0C 00 72 01 07 3C
+1B B3 0B 20 82 43 62 01 92 B3 62 01 FD 27 E2 C3
+21 00 0A 3C 4C 11 F6 2B 1B E3 82 43 62 01 92 B3
+62 01 FD 27 E2 D3 21 00 92 52 02 02 72 01 D2 53
+07 02 F0 90 0C 00 61 FC D1 23 30 41 C2 43 09 02
+1B C3 55 42 09 02 55 45 BC 05 00 55 0C 56 56 56
+56 56 56 56 56 36 76 00 E2 B2 28 00 FD 23 92 42
+70 01 72 01 92 52 04 02 72 01 82 43 62 01 92 B3
+62 01 FD 27 E2 B2 28 00 1E 28 2B D3 1C 3C 4C 10
+1A 3C 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+01 28 1B E3 1B B3 01 24 2B D3 C9 EC 12 02 19 E3
+0A 3C 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+E6 2B 4C 10 1B E3 92 52 02 02 72 01 D2 53 09 02
+C0 3F 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+01 2C 2B D3 30 41
+q
+"""
+
+F4X_BSL = """@0220
+24 02 2E 02 31 40 20 02 2B D2 C0 43 EA FF 32 C2
+F2 C0 32 00 00 00 B2 40 80 5A 20 01 32 D0 40 00
+C2 43 50 00 F2 40 98 00 51 00 F2 C0 80 00 52 00
+D2 D3 21 00 D2 D3 22 00 D2 C3 26 00 E2 C3 22 00
+E2 C3 26 00 B2 40 10 A5 2C 01 B2 40 00 A5 28 01
+3B C0 3A 00 B0 12 DE 04 82 43 12 02 09 43 36 40
+0A 02 37 42 B0 12 B4 05 C6 4C 00 00 16 53 17 83
+F9 23 D2 92 0C 02 0D 02 28 20 55 42 0B 02 75 90
+12 00 80 24 75 90 10 00 6D 24 B0 12 A4 04 55 42
+0B 02 75 90 18 00 31 24 75 90 1E 00 B8 24 75 90
+20 00 17 24 2B B2 11 24 75 90 16 00 22 24 75 90
+14 00 B3 24 75 90 1A 00 18 24 75 90 1C 00 45 24
+04 3C B0 12 3E 05 BE 3F 21 53 B0 12 44 05 BA 3F
+03 43 B0 12 3E 05 D2 42 0E 02 50 00 D2 42 0F 02
+51 00 D2 42 10 02 16 02 AD 3F B0 12 3E 05 10 42
+0E 02 16 42 0E 02 15 43 07 3C 36 40 FE FF B2 40
+06 A5 10 02 35 40 0C 00 B2 40 00 A5 2C 01 92 42
+10 02 28 01 B6 43 00 00 92 B3 2C 01 FD 23 15 83
+F3 23 36 90 FE FF CD 27 37 40 80 00 36 F0 80 FF
+36 90 00 11 0E 28 07 57 36 F0 00 FF 36 90 00 12
+08 28 07 57 36 F0 00 FE 04 3C 16 42 0E 02 17 42
+10 02 35 43 75 96 03 20 17 83 FC 23 B2 3F 82 46
+00 02 B3 3F 36 40 E0 FF 37 40 20 00 B0 12 B4 05
+7C 96 01 24 2B D3 17 83 F9 23 2B C2 B0 12 A4 04
+2B D2 9F 3F 16 42 0E 02 17 42 10 02 2B B2 38 24
+3B D0 10 00 B0 12 B4 05 36 90 00 10 06 2C 36 90
+00 01 09 2C C6 4C 00 00 25 3C B2 40 00 A5 2C 01
+B2 40 40 A5 28 01 16 B3 03 20 C2 4C 14 02 1A 3C
+C2 4C 15 02 86 9A FD FF 08 24 2B D3 3B B0 20 00
+04 20 3B D0 20 00 82 46 00 02 36 90 01 02 04 28
+3B D2 3B B0 10 00 02 24 3B C0 32 00 1A 42 14 02
+86 4A FF FF 16 53 17 83 CD 23 B0 12 A4 04 61 3F
+B0 12 B4 05 17 83 FC 23 B0 12 A4 04 5E 3F B2 40
+F0 0F 0E 02 B2 40 10 00 10 02 B2 40 80 00 0A 02
+D2 42 10 02 0C 02 D2 42 10 02 0D 02 82 43 12 02
+09 43 36 40 0A 02 27 42 7C 46 B0 12 48 05 17 83
+FB 23 16 42 0E 02 17 42 10 02 36 90 00 01 0A 28
+B2 46 14 02 5C 42 14 02 B0 12 48 05 17 83 5C 42
+15 02 01 3C 7C 46 B0 12 48 05 17 83 EE 23 B2 E3
+12 02 5C 42 12 02 B0 12 48 05 5C 42 13 02 B0 12
+48 05 E0 3E 18 42 12 02 B0 12 B4 05 C2 4C 12 02
+B0 12 B4 05 C2 4C 13 02 38 E3 3B B2 0A 24 86 9A
+FE FF 07 24 3B B0 20 00 04 20 16 53 82 46 00 02
+2B D3 18 92 12 02 08 23 2B B3 06 23 30 41 E2 B3
+20 00 FD 27 E2 B3 20 00 FD 23 B2 40 24 02 60 01
+E2 B3 20 00 FD 27 15 42 70 01 05 11 05 11 05 11
+82 45 02 02 05 11 82 45 04 02 B2 80 1E 00 04 02
+57 42 16 02 37 80 03 00 05 11 05 11 17 53 FD 23
+35 50 40 A5 82 45 2A 01 35 42 B2 40 24 02 60 01
+92 92 70 01 02 02 FC 2F 15 83 F7 23 09 43 7C 40
+90 00 02 3C 7C 40 A0 00 C2 43 07 02 C9 EC 12 02
+19 E3 1B C3 55 42 07 02 55 45 5E 05 00 55 0C 2E
+2E 2E 2E 2E 2E 2E 2E 1A 34 34 92 42 70 01 72 01
+B2 50 0C 00 72 01 07 3C 1B B3 0B 20 82 43 62 01
+92 B3 62 01 FD 27 D2 C3 21 00 0A 3C 4C 11 F6 2B
+1B E3 82 43 62 01 92 B3 62 01 FD 27 D2 D3 21 00
+92 52 02 02 72 01 D2 53 07 02 F0 90 0C 00 59 FC
+D1 23 30 41 C2 43 09 02 1B C3 55 42 09 02 55 45
+C4 05 00 55 0C 56 56 56 56 56 56 56 56 36 76 00
+E2 B3 20 00 FD 23 92 42 70 01 72 01 92 52 04 02
+72 01 82 43 62 01 92 B3 62 01 FD 27 E2 B3 20 00
+1E 28 2B D3 1C 3C 4C 10 1A 3C 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 01 28 1B E3 1B B3 01 24
+2B D3 C9 EC 12 02 19 E3 0A 3C 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 E6 2B 4C 10 1B E3 92 52
+02 02 72 01 D2 53 09 02 C0 3F 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 01 2C 2B D3 30 41
+q
+"""
+
+#cpu types for "change baudrate"
+#use strings as ID so that they can be used in outputs too
+F1x                     = "F1x family"
+F4x                     = "F4x family"
+
+#known device list
+deviceids = {
+    0xf149: F1x,
+    0xf16c: F1x, #for telosb
+    0xf112: F1x,
+    0xf413: F4x,
+    0xf123: F1x,
+    0xf449: F4x,
+    0x1232: F1x,
+}
+
+class BSLException(Exception):
+    pass
+
+class LowLevel:
+    "lowlevel communication"
+    #Constants
+    MODE_SSP                = 0
+    MODE_BSL                = 1
+
+    BSL_SYNC                = 0x80
+    BSL_TXPWORD             = 0x10
+    BSL_TXBLK               = 0x12 #Transmit block to boot loader
+    BSL_RXBLK               = 0x14 #Receive  block from boot loader
+    BSL_ERASE               = 0x16 #Erase one segment
+    BSL_MERAS               = 0x18 #Erase complete FLASH memory
+    BSL_CHANGEBAUD          = 0x20 #Change baudrate
+    BSL_LOADPC              = 0x1A #Load PC and start execution
+    BSL_TXVERSION           = 0x1E #Get BSL version
+
+    #Upper limit of address range that might be modified by
+    #"BSL checksum bug".
+    BSL_CRITICAL_ADDR       = 0x0A00
+
+    #Header Definitions
+    CMD_FAILED              = 0x70
+    DATA_FRAME              = 0x80
+    DATA_ACK                = 0x90
+    DATA_NAK                = 0xA0
+
+    QUERY_POLL              = 0xB0
+    QUERY_RESPONSE          = 0x50
+
+    OPEN_CONNECTION         = 0xC0
+    ACK_CONNECTION          = 0x40
+
+    DEFAULT_TIMEOUT         =   1
+    DEFAULT_PROLONG         =  10
+    MAX_FRAME_SIZE          = 256
+    MAX_DATA_BYTES          = 250
+    MAX_DATA_WORDS          = 125
+
+    MAX_FRAME_COUNT         = 16
+
+    #Error messages
+    ERR_COM                 = "Unspecific error"
+    ERR_RX_NAK              = "NAK received (wrong password?)"
+    #ERR_CMD_NOT_COMPLETED   = "Command did not send ACK: indicates that it didn't complete correctly"
+    ERR_CMD_FAILED          = "Command failed, is not defined or is not allowed"
+    ERR_BSL_SYNC            = "Bootstrap loader synchronization error"
+    ERR_FRAME_NUMBER        = "Frame sequence number error."
+
+    def calcChecksum(self, data, length):
+        """Calculates a checksum of "data"."""
+        checksum = 0
+
+        for i in range(length/2):
+            checksum = checksum ^ (ord(data[i*2]) | (ord(data[i*2+1]) << 8))    #xor-ing
+        return 0xffff & (checksum ^ 0xffff)         #inverting
+
+    def __init__(self, aTimeout = None, aProlongFactor = None):
+        """init bsl object, don't connect yet"""
+        if aTimeout is None:
+            self.timeout = self.DEFAULT_TIMEOUT
+        else:
+            self.timeout = aTimeout
+        if aProlongFactor is None:
+            self.prolongFactor = self.DEFAULT_PROLONG
+        else:
+            self.prolongFactor = aProlongFactor
+
+        #flags for inverted use of control pins
+        #used for some hardware
+        self.invertRST = 0
+        self.invertTEST = 0
+	self.swapRSTTEST = 0
+	self.telosLatch = 0
+	self.telosI2C = 0
+        
+        self.protocolMode = self.MODE_BSL
+        self.BSLMemAccessWarning = 0                #Default: no warning.
+        self.slowmode = 0
+
+    def comInit(self, port):
+        """Tries to open the serial port given and
+        initialises the port and variables.
+        The timeout and the number of allowed errors is multiplied by
+        'aProlongFactor' after transmission of a command to give
+        plenty of time to the micro controller to finish the command.
+        Returns zero if the function is successful."""
+        if DEBUG > 1: sys.stderr.write("* comInit()\n")
+        self.seqNo = 0
+        self.reqNo = 0
+        self.rxPtr = 0
+        self.txPtr = 0
+        # Startup-Baudrate: 9600,8,E,1, 1s timeout
+        self.serialport = serial.Serial(
+            port,
+            9600,
+            parity = serial.PARITY_EVEN,
+            timeout = self.timeout
+        )
+        if DEBUG: sys.stderr.write("using serial port %r\n" % self.serialport.portstr)
+        self.SetRSTpin()                        #enable power
+        self.SetTESTpin()                       #enable power
+        self.serialport.flushInput()
+        self.serialport.flushOutput()
+
+    def comDone(self):
+        """Closes the used serial port.
+        This function must be called at the end of a program,
+        otherwise the serial port might not be released and can not be
+        used in other programs.
+        Returns zero if the function is successful."""
+        if DEBUG > 1: sys.stderr.write("* comDone()")
+        self.SetRSTpin(1)                       #disable power
+        self.SetTESTpin(0)                      #disable power
+        self.serialport.close()
+
+    def comRxHeader(self):
+        """receive header and split data"""
+        if DEBUG > 1: sys.stderr.write("* comRxHeader()\n")
+
+        hdr = self.serialport.read(1)
+        if not hdr: raise BSLException("Timeout")
+        rxHeader = ord(hdr) & 0xf0;
+        rxNum    = ord(hdr) & 0x0f;
+
+        if self.protocolMode == self.MODE_BSL:
+            self.reqNo = 0
+            self.seqNo = 0
+            rxNum = 0
+        if DEBUG > 1: sys.stderr.write("* comRxHeader() OK\n")
+        return rxHeader, rxNum
+
+    def comRxFrame(self, rxNum):
+        if DEBUG > 1: sys.stderr.write("* comRxFrame()\n")
+        rxFrame = chr(self.DATA_FRAME | rxNum)
+
+        if DEBUG > 2: sys.stderr.write("  comRxFrame() header...\n")
+        rxFramedata = self.serialport.read(3)
+        if len(rxFramedata) != 3: raise BSLException("Timeout")
+        rxFrame = rxFrame + rxFramedata
+
+        if DEBUG > 3: sys.stderr.write("  comRxFrame() check header...\n")
+        if rxFrame[1] == chr(0) and rxFrame[2] == rxFrame[3]:   #Add. header info. correct?
+            rxLengthCRC = ord(rxFrame[2]) + 2       #Add CRC-Bytes to length
+            if DEBUG > 2: sys.stderr.write("  comRxFrame() receiving data, size: %s\n" % rxLengthCRC)
+
+            rxFramedata = self.serialport.read(rxLengthCRC)
+            if len(rxFramedata) != rxLengthCRC: raise BSLException("Timeout")
+            rxFrame = rxFrame + rxFramedata
+            #Check received frame:
+            if DEBUG > 3: sys.stderr.write("  comRxFrame() crc check\n")
+            #rxLength+4: Length with header but w/o CRC:
+            checksum = self.calcChecksum(rxFrame, ord(rxFrame[2]) + 4)
+            if rxFrame[ord(rxFrame[2])+4] == chr(0xff & checksum) and \
+               rxFrame[ord(rxFrame[2])+5] == chr(0xff & (checksum >> 8)): #Checksum correct?
+                #Frame received correctly (=> send next frame)
+                if DEBUG > 2: sys.stderr.write("* comRxFrame() OK\n")
+                return rxFrame
+            else:
+                if DEBUG: sys.stderr.write("  comRxFrame() Checksum wrong\n")
+        else:
+            if DEBUG: sys.stderr.write("  comRxFrame() Header corrupt %r" % rxFrame)
+        raise BSLException(self.ERR_COM)            #Frame has errors!
+
+    def comTxHeader(self, txHeader):
+        """send header"""
+        if DEBUG > 1: sys.stderr.write("* txHeader()\n")
+        self.serialport.write(txHeader)
+
+    def comTxRx(self, cmd, dataOut, length):
+        """Sends the command cmd with the data given in dataOut to the
+        microcontroller and expects either an acknowledge or a frame
+        with result from the microcontroller.  The results are stored
+        in dataIn (if not a NULL pointer is passed).
+        In this routine all the necessary protocol stuff is handled.
+        Returns zero if the function was successful."""
+        if DEBUG > 1: sys.stderr.write("* comTxRx()\n")
+        txFrame     = []
+        rxHeader    = 0
+        rxNum       = 0
+
+        dataOut = list(dataOut)     #convert to a list for simpler data fill in
+        #Transmitting part ----------------------------------------
+        #Prepare data for transmit
+        if (length % 2) != 0:
+            #/* Fill with one byte to have even number of bytes to send */
+            if self.protocolMode == self.MODE_BSL:
+                dataOut.append(0xFF)  #fill with 0xFF
+            else:
+                dataOut.append(0)     #fill with zero
+
+        txFrame = "%c%c%c%c" % (self.DATA_FRAME | self.seqNo, cmd, len(dataOut), len(dataOut))
+
+        self.reqNo = (self.seqNo + 1) % self.MAX_FRAME_COUNT
+
+        txFrame = txFrame + string.join(dataOut,'')
+        checksum = self.calcChecksum(txFrame, length + 4)
+        txFrame = txFrame + chr(checksum & 0xff)
+        txFrame = txFrame + chr((checksum >> 8) & 0xff)
+
+        accessAddr = (0x0212 + (checksum^0xffff)) & 0xfffe  #0x0212: Address of wCHKSUM
+        if self.BSLMemAccessWarning and accessAddr < self.BSL_CRITICAL_ADDR:
+            sys.stderr.write("WARNING: This command might change data at address %04x or %04x!\n" % (accessAddr, accessAddr + 1))
+
+        self.serialport.flushInput()                #clear receiving queue
+        #TODO: Check after each transmitted character,
+        #TODO: if microcontroller did send a character (probably a NAK!).
+        for c in txFrame:
+            self.serialport.write(c)
+            if DEBUG > 3: sys.stderr.write("\ttx %02x" % ord(c))
+            #if self.serialport.inWaiting(): break  #abort when BSL replies, probably NAK
+        else:
+            if DEBUG > 1: sys.stderr.write( "  comTxRx() transmit OK\n")
+
+        #Receiving part -------------------------------------------
+        rxHeader, rxNum = self.comRxHeader()        #receive header
+        if DEBUG > 1: sys.stderr.write("  comTxRx() rxHeader=0x%02x, rxNum=%d, seqNo=%d, reqNo=%s\n" % (rxHeader, rxNum, self.seqNo, self.reqNo))
+        if rxHeader == self.DATA_ACK:               #acknowledge/OK
+            if DEBUG > 2: sys.stderr.write("  comTxRx() DATA_ACK\n")
+            if rxNum == self.reqNo:
+                self.seqNo = self.reqNo
+                if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_ACK OK\n")
+                return          #Acknowledge received correctly => next frame
+            raise BSLException(self.ERR_FRAME_NUMBER)
+        elif rxHeader == self.DATA_NAK:             #not acknowledge/error
+            if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_NAK\n")
+            raise BSLException(self.ERR_RX_NAK)
+        elif rxHeader == self.DATA_FRAME:           #receive data
+            if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_FRAME\n")
+            if rxNum == self.reqNo:
+                rxFrame = self.comRxFrame(rxNum)
+                return rxFrame
+            raise BSLException(self.ERR_FRAME_NUMBER)
+        elif rxHeader == self.CMD_FAILED:           #Frame ok, but command failed.
+            if DEBUG > 2: sys.stderr.write("*  comTxRx() CMD_FAILED\n")
+            raise BSLException(self.ERR_CMD_FAILED)
+
+        raise BSLException("Unknown header 0x%02x\nAre you downloading to RAM into an old device that requires the patch? Try option -U" % rxHeader)
+
+    def SetDTR(self, level, invert):
+        """Controls DTR pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if invert:
+            self.serialport.setDTR(not level)
+        else:
+            self.serialport.setDTR(level)
+        if self.slowmode:
+            time.sleep(0.040)
+
+    def SetRTS(self, level, invert):
+        """Controls RTS pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if invert:
+            self.serialport.setRTS(not level)
+        else:
+            self.serialport.setRTS(level)
+        if self.slowmode:
+            time.sleep(0.040)
+
+    def SetRSTpin(self, level=1):
+        """Controls RST/NMI pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if self.swapRSTTEST:
+            self.SetRTS(level, self.invertRST)
+        else:
+            self.SetDTR(level, self.invertRST)
+
+    def SetTESTpin(self, level=1):
+        """Controls TEST pin (inverted on board: 0: VCC; 1: GND; unless inverted flag is set)"""
+        if self.swapRSTTEST:
+            self.SetDTR(level, self.invertTEST)
+        else:
+            self.SetRTS(level, self.invertTEST)
+
+    def telosSetSCL(self, level):
+        self.serialport.setRTS(not level)
+
+    def telosSetSDA(self, level):
+        self.serialport.setDTR(not level)
+
+    def telosI2CStart(self):
+	self.telosSetSDA(1)
+	self.telosSetSCL(1)
+	self.telosSetSDA(0)
+
+    def telosI2CStop(self):
+	self.telosSetSDA(0)
+	self.telosSetSCL(1)
+	self.telosSetSDA(1)
+
+    def telosI2CWriteBit(self, bit):
+	self.telosSetSCL(0)
+	self.telosSetSDA(bit)
+        time.sleep(2e-6)
+	self.telosSetSCL(1)
+        time.sleep(1e-6)
+	self.telosSetSCL(0)
+
+    def telosI2CWriteByte(self, byte):
+        self.telosI2CWriteBit( byte & 0x80 );
+        self.telosI2CWriteBit( byte & 0x40 );
+        self.telosI2CWriteBit( byte & 0x20 );
+        self.telosI2CWriteBit( byte & 0x10 );
+        self.telosI2CWriteBit( byte & 0x08 );
+        self.telosI2CWriteBit( byte & 0x04 );
+        self.telosI2CWriteBit( byte & 0x02 );
+        self.telosI2CWriteBit( byte & 0x01 );
+        self.telosI2CWriteBit( 0 );  # "acknowledge"
+
+    def telosI2CWriteCmd(self, addr, cmdbyte):
+	self.telosI2CStart()
+        self.telosI2CWriteByte( 0x90 | (addr << 1) )
+	self.telosI2CWriteByte( cmdbyte )
+	self.telosI2CStop()
+
+    def telosBReset(self,invokeBSL=0):
+
+	# "BSL entry sequence at dedicated JTAG pins"
+        # rst !s0: 0 0 0 0 1 1
+	# tck !s1: 1 0 1 0 0 1
+        #   s0|s1: 1 3 1 3 2 0
+
+	# "BSL entry sequence at shared JTAG pins"
+        # rst !s0: 0 0 0 0 1 1
+	# tck !s1: 0 1 0 1 1 0
+        #   s0|s1: 3 1 3 1 0 2
+
+	if invokeBSL:
+	  self.telosI2CWriteCmd(0,1)
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,1)
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,2)
+	  self.telosI2CWriteCmd(0,0)
+	else:
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,2)
+	self.telosI2CWriteCmd(0,0)
+        time.sleep(0.250)       #give MSP430's oscillator time to stabilize
+	self.serialport.flushInput()  #clear buffers
+
+    def bslReset(self, invokeBSL=0):
+        """Applies BSL entry sequence on RST/NMI and TEST/VPP pins
+        Parameters:
+            invokeBSL = 1: complete sequence
+            invokeBSL = 0: only RST/NMI pin accessed
+
+        RST is inverted twice on boot loader hardware
+        TEST is inverted (only once)
+        Need positive voltage on DTR, RTS for power-supply of hardware"""
+	if self.telosI2C:
+	  self.telosBReset(invokeBSL)
+	  return
+
+        if DEBUG > 1: sys.stderr.write("* bslReset(invokeBSL=%s)\n" % invokeBSL)
+        self.SetRSTpin(1)       #power suply
+        self.SetTESTpin(1)      #power suply
+        time.sleep(0.250)       #charge capacitor on boot loader hardware
+
+	if self.telosLatch:
+	  self.SetTESTpin(0)
+	  self.SetRSTpin(0)
+	  self.SetTESTpin(1)
+
+        self.SetRSTpin(0)       #RST  pin: GND
+        if invokeBSL:
+            self.SetTESTpin(1)  #TEST pin: GND
+            self.SetTESTpin(0)  #TEST pin: Vcc
+            self.SetTESTpin(1)  #TEST pin: GND
+            self.SetTESTpin(0)  #TEST pin: Vcc
+            self.SetRSTpin (1)  #RST  pin: Vcc
+            self.SetTESTpin(1)  #TEST pin: GND
+        else:
+            self.SetRSTpin(1)   #RST  pin: Vcc
+        time.sleep(0.250)       #give MSP430's oscillator time to stabilize
+
+        self.serialport.flushInput()    #clear buffers
+
+    def bslSync(self,wait=0):
+        """Transmits Synchronization character and expects to receive Acknowledge character
+        if wait is 0 it must work the first time. otherwise if wait is 1
+        it is retried (forever).
+        """
+        loopcnt = 5                                 #Max. tries to get synchronization
+
+        if DEBUG > 1: sys.stderr.write("* bslSync(wait=%d)\n" % wait)
+        while wait or loopcnt:
+            loopcnt = loopcnt - 1                   #count down tries
+            self.serialport.flushInput()            #clear input, in case a prog is running
+
+            self.serialport.write(chr(self.BSL_SYNC))   #Send synchronization byte
+            c = self.serialport.read(1)             #read answer
+            if c == chr(self.DATA_ACK):             #ACk
+                if DEBUG > 1: sys.stderr.write("  bslSync() OK\n")
+                return                              #Sync. successful
+            elif not c:                             #timeout
+                    if loopcnt > 4:
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout, retry ...\n")
+                    elif loopcnt == 4:
+                        #nmi may have caused the first reset to be ignored, try again
+                        self.bslReset(0) 
+                        self.bslReset(1)
+                    elif loopcnt > 0:
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout, retry ...\n")
+                    else :
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout\n")
+            else:                                   #garbage
+                if DEBUG > 1: sys.stderr.write("  bslSync() failed (0x%02x), retry ...\n" % ord(c))
+                
+                raise BSLException(self.ERR_BSL_SYNC)       #Sync. failed
+
+    def bslTxRx(self, cmd, addr, length = 0, blkout = None, wait=0):
+        """Transmits a command (cmd) with its parameters:
+        start-address (addr), length (len) and additional
+        data (blkout) to boot loader.
+        wait specified if the bsl sync should be tried once or
+        repeated, forever
+        Parameters return by boot loader are passed via blkin.
+        """
+        if DEBUG > 1: sys.stderr.write("* bslTxRx()\n")
+
+        if cmd == self.BSL_TXBLK:
+            #Align to even start address
+            if (addr % 2) != 0:
+                addr = addr - 1                     #Decrement address and
+                blkout = chr(0xFF) + blkOut         #fill first byte of blkout with 0xFF
+                length = length + 1
+            #Make sure that len is even
+            if (length % 2) != 0:
+                blkout = blkout + chr(0xFF)         #Inc. len and fill last byte of blkout with 0xFF
+                length = length + 1
+
+        elif cmd == self.BSL_RXBLK:
+            #Align to even start address
+            if (addr % 2) != 0:
+                addr = addr - 1                     #Decrement address but
+                length = length + 1                 #request an additional byte
+            #Make sure that len is even
+            if (length % 2) != 0:
+                length = length + 1
+
+        #if cmd == self.BSL_TXBLK or cmd == self.BSL_TXPWORD:
+        #    length = len + 4
+
+        #Add necessary information data to frame
+        dataOut =  struct.pack("= 1:
+            #Read one line
+            l = file.readline()
+            if not l: break #EOF
+            l = l.strip()
+            if l[0] == 'q': break
+            elif l[0] == '@':        #if @ => new address => send frame and set new addr.
+                #create a new segment
+                if segmentdata:
+                    self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+                startAddr = int(l[1:],16)
+                segmentdata = []
+            else:
+                for i in string.split(l):
+                    segmentdata.append(chr(int(i,16)))
+        if segmentdata:
+            self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+
+    def loadELF(self, file):
+        """load data from a (opened) file in ELF object format.
+        File must be seekable"""
+        import elf
+        obj = elf.ELFObject()
+        obj.fromFile(file)
+        if obj.e_type != elf.ELFObject.ET_EXEC:
+            raise Exception("No executable")
+        for section in obj.getSections():
+            if DEBUG:
+                sys.stderr.write("ELF section %s at 0x%04x %d bytes\n" % (section.name, section.lma, len(section.data)))
+            if len(section.data):
+                self.segments.append( Segment(section.lma, section.data) )
+        
+    def loadFile(self, filename):
+        """fill memory with the contents of a file. file type is determined from extension"""
+        #TODO: do a contents based detection
+        if filename[-4:].lower() == '.txt':
+            self.loadTIText(open(filename, "rb"))
+        elif filename[-4:].lower() in ('.a43', '.hex'):
+            self.loadIHex(open(filename, "rb"))
+        else:
+            self.loadELF(open(filename, "rb"))
+
+    def getMemrange(self, fromadr, toadr):
+        """get a range of bytes from the memory. unavailable values are filled with 0xff."""
+        res = ''
+        toadr = toadr + 1   #python indxes are excluding end, so include it
+        while fromadr < toadr:
+            #print "fromto: %04x %04x" % (fromadr, toadr)
+            for seg in self.segments:
+                #print seg
+                segend = seg.startaddress + len(seg.data)
+                if seg.startaddress <= fromadr and fromadr < segend:
+                    #print "startok 0x%04x %d" % (seg.startaddress, len(seg.data))
+                    #print ("0x%04x "*3) % (segend, fromadr, toadr)
+                    if toadr > segend:   #not all data in segment
+                        #print "out of segment"
+                        catchlength = segend-fromadr
+                    else:
+                        catchlength = toadr-fromadr
+                    #print toadr-fromadr
+                    #print catchlength
+                    res = res + seg.data[fromadr-seg.startaddress : fromadr-seg.startaddress+catchlength]
+                    fromadr = fromadr + catchlength    #adjust start
+                    if len(res) >= toadr-fromadr:
+                        break#return res
+            else:
+                    res = res + chr(255)
+                    fromadr = fromadr + 1 #adjust start
+                    #print "fill FF"
+        #print "res: %r" % res
+        return res
+
+
+class BootStrapLoader(LowLevel):
+    """higher level Bootstrap Loader functions."""
+
+    ERR_VERIFY_FAILED       = "Error: verification failed"
+    ERR_ERASE_CHECK_FAILED  = "Error: erase check failed"
+
+    ACTION_PROGRAM          = 0x01 #Mask: program data
+    ACTION_VERIFY           = 0x02 #Mask: verify data
+    ACTION_ERASE_CHECK      = 0x04 #Mask: erase check
+
+    #Max. bytes sent within one frame if parsing a TI TXT file.
+    #( >= 16 and == n*16 and <= MAX_DATA_BYTES!)
+    MAXDATA                 = 240-16
+
+
+    def __init__(self, *args, **kargs):
+        LowLevel.__init__(self, *args, **kargs)
+        self.byteCtr        = 0
+        self.meraseCycles   = 1
+        self.patchRequired  = 0
+        self.patchLoaded    = 0
+        self.bslVer         = 0
+        self.passwd         = None
+        self.data           = None
+        self.maxData        = self.MAXDATA
+        self.cpu            = None
+
+
+    def preparePatch(self):
+        """prepare to download patch"""
+        if DEBUG > 1: sys.stderr.write("* preparePatch()\n")
+
+        if self.patchLoaded:
+            #Load PC with 0x0220.
+            #This will invoke the patched bootstrap loader subroutines.
+            self.bslTxRx(self.BSL_LOADPC,           #Command: Load PC
+                           0x0220)                  #Address to load into PC
+            self.BSLMemAccessWarning = 0 #Error is removed within workaround code
+        return
+
+    def postPatch(self):
+        """setup after the patch is loaded"""
+        if DEBUG > 1: sys.stderr.write("* postPatch()\n")
+        if self.patchLoaded:
+            self.BSLMemAccessWarning = 1                #Turn warning back on.
+
+
+    def verifyBlk(self, addr, blkout, action):
+        """verify memory against data or 0xff"""
+        if DEBUG > 1: sys.stderr.write("* verifyBlk()\n")
+
+        if action & self.ACTION_VERIFY or action & self.ACTION_ERASE_CHECK:
+            if DEBUG: sys.stderr.write("  Check starting at 0x%04x, %d bytes ... \n" % (addr, len(blkout)))
+
+            self.preparePatch()
+            blkin = self.bslTxRx(self.BSL_RXBLK, addr, len(blkout))
+            self.postPatch()
+
+            for i in range(len(blkout)):
+                if action & self.ACTION_VERIFY:
+                    #Compare data in blkout and blkin
+                    if blkin[i] != blkout[i]:
+                        sys.stderr.write("Verification failed at 0x%04x (0x%02x, 0x%02x)\n" % (addr+i, ord(blkin[i]), ord(blkout[i])))
+                        sys.stderr.flush()
+                        raise BSLException(self.ERR_VERIFY_FAILED)      #Verify failed!
+                    continue
+                elif action & self.ACTION_ERASE_CHECK:
+                    #Compare data in blkin with erase pattern
+                    if blkin[i] != chr(0xff):
+                        sys.stderr.write("Erase Check failed at 0x%04x (0x%02x)\n" % (addr+i, ord(blkin[i])))
+                        sys.stderr.flush()
+                        raise BSLException(self.ERR_ERASE_CHECK_FAILED) #Erase Check failed!
+                    continue
+
+    def programBlk(self, addr, blkout, action):
+        """programm a memory block"""
+        if DEBUG > 1: sys.stderr.write("* programBlk()\n")
+
+        #Check, if specified range is erased
+        self.verifyBlk(addr, blkout, action & self.ACTION_ERASE_CHECK)
+
+        if action & self.ACTION_PROGRAM:
+            if DEBUG: sys.stderr.write("  Program starting at 0x%04x, %i bytes ...\n" % (addr, len(blkout)))
+            self.preparePatch()
+            #Program block
+            self.bslTxRx(self.BSL_TXBLK, addr, len(blkout), blkout)
+            self.postPatch()
+
+        #Verify block
+        self.verifyBlk(addr, blkout, action & self.ACTION_VERIFY)
+
+    #segments:
+    #list of tuples or lists:
+    #segements = [ (addr1, [d0,d1,d2,...]), (addr2, [e0,e1,e2,...])]
+    def programData(self, segments, action):
+        """programm or verify data"""
+        if DEBUG > 1: sys.stderr.write("* programData()\n")
+        for seg in segments:
+            currentAddr = seg.startaddress
+            pstart = 0
+            while pstart len(seg.data):
+                    length = len(seg.data) - pstart
+                self.programBlk(currentAddr, seg.data[pstart:pstart+length], action)
+                pstart = pstart + length
+                currentAddr = currentAddr + length
+                self.byteCtr = self.byteCtr + length #total sum
+
+    def uploadData(self, startaddress, size, wait=0):
+        """upload a datablock"""
+        if DEBUG > 1: sys.stderr.write("* uploadData()\n")
+        data = ''
+        pstart = 0
+        while pstart size:
+                length = size - pstart
+            data = data + self.bslTxRx(self.BSL_RXBLK,
+                                       pstart+startaddress,
+                                       length,
+                                       wait=wait)[:-2] #cut away checksum
+            pstart = pstart + length
+        return data
+
+    def txPasswd(self, passwd=None, wait=0):
+        """transmit password, default if None is given."""
+        if DEBUG > 1: sys.stderr.write("* txPassword(%r)\n" % passwd)
+        if passwd is None:
+            #Send "standard" password to get access to protected functions.
+            sys.stderr.write("Transmit default password ...\n")
+            sys.stderr.flush()
+            #Flash is completely erased, the contents of all Flash cells is 0xff
+            passwd = chr(0xff)*32
+        else:
+            #sanity check of password
+            if len(passwd) != 32:
+                raise ValueError, "password has wrong length (%d)\n" % len(passwd)
+            sys.stderr.write('Transmit password ...\n')
+            sys.stderr.flush()
+        #send the password
+        self.bslTxRx(self.BSL_TXPWORD,      #Command: Transmit Password
+                       0xffe0,              #Address of interupt vectors
+                       0x0020,              #Number of bytes
+                       passwd,              #password
+                       wait=wait)           #if wait is 1, try to sync forever
+
+
+    #-----------------------------------------------------------------
+
+    def actionMassErase(self):
+        """Erase the flash memory completely (with mass erase command)"""
+        sys.stderr.write("Mass Erase...\n")
+        sys.stderr.flush()
+        self.bslReset(1)                            #Invoke the boot loader.
+        for i in range(self.meraseCycles):
+            if i == 1: sys.stderr.write("Additional Mass Erase Cycles...\n")
+            self.bslTxRx(self.BSL_MERAS,            #Command: Mass Erase
+                                0xff00,             #Any address within flash memory.
+                                0xa506)             #Required setting for mass erase!
+        self.passwd = None                          #No password file required!
+        #print "Mass Erase complete"
+        #Transmit password to get access to protected BSL functions.
+        self.txPasswd()
+
+    def actionStartBSL(self, usepatch=1, adjsp=1, replacementBSL=None, forceBSL=0, mayuseBSL=0, speed=None, bslreset=1):
+        """start BSL, download patch if desired and needed, adjust SP if desired"""
+        sys.stderr.write("Invoking BSL...\n")
+        sys.stderr.flush()
+        if bslreset:
+            self.bslReset(1)                        #Invoke the boot loader.
+        self.txPasswd(self.passwd)                  #transmit password
+
+        #Read actual bootstrap loader version.
+        #sys.stderr.write("Reading BSL version ...\n")
+        blkin = self.bslTxRx(self.BSL_RXBLK,        #Command: Read/Receive Block
+                          0x0ff0,                   #Start address
+                          16)                       #No. of bytes to read
+        dev_id, bslVerHi, bslVerLo = struct.unpack(">H8xBB4x", blkin[:-2]) #cut away checksum and extract data
+
+        if self.cpu is None:                        #cpy type forced?
+            if deviceids.has_key(dev_id):
+                self.cpu = deviceids[dev_id]        #try to autodectect CPU type
+                if DEBUG:
+                    sys.stderr.write("Autodetect successful: %04x -> %s\n" % (dev_id, self.cpu))
+            else:
+                sys.stderr.write("Autodetect failed! Unkown ID: %04x. Trying to continue anyway.\n" % dev_id)
+                self.cpu = F1x                      #assume something and try anyway..
+
+        sys.stderr.write("Current bootstrap loader version: %x.%x (Device ID: %04x)\n" % (bslVerHi, bslVerLo, dev_id))
+        sys.stderr.flush()
+        self.bslVer = (bslVerHi << 8) | bslVerLo
+
+        if self.bslVer <= 0x0110:                   #check if patch is needed
+            self.BSLMemAccessWarning = 1
+        else:
+            self.BSLMemAccessWarning = 0 #Fixed in newer versions of BSL.
+
+        if self.bslVer <= 0x0130 and adjsp:
+            #only do this on BSL where it's needed to prevent
+            #malfunction with F4xx devices/ newer ROM-BSLs
+            
+            #Execute function within bootstrap loader
+            #to prepare stack pointer for the following patch.
+            #This function will lock the protected functions again.
+            sys.stderr.write("Adjust SP. Load PC with 0x0C22 ...\n")
+            self.bslTxRx(self.BSL_LOADPC,           #Command: Load PC
+                                0x0C22)             #Address to load into PC
+            #Re-send password to re-gain access to protected functions.
+            self.txPasswd(self.passwd)
+
+        #get internal BSL replacement if needed or forced by the user
+        #required if speed is set but an old BSL is in the device
+        #if a BSL is given by the user, that one is used and not the internal one
+        if ((mayuseBSL and speed and self.bslVer < 0x0150) or forceBSL) and replacementBSL is None:
+            replacementBSL = Memory() #File to program
+            if self.cpu == F4x:
+                if DEBUG:
+                    sys.stderr.write("Using built in BSL replacement for F4x devices\n")
+                    sys.stderr.flush()
+                replacementBSL.loadTIText(cStringIO.StringIO(F4X_BSL))  #parse embedded BSL
+            else:
+                if DEBUG:
+                    sys.stderr.write("Using built in BSL replacement for F1x devices\n")
+                    sys.stderr.flush()
+                replacementBSL.loadTIText(cStringIO.StringIO(F1X_BSL))  #parse embedded BSL
+    
+        #now download the new BSL, if allowed and needed (version lower than the
+        #the replacement) or forced
+        if replacementBSL is not None:
+            self.actionDownloadBSL(replacementBSL)
+
+        #debug message with the real BSL version in use (may have changed after replacement BSL)
+        if DEBUG:
+            sys.stderr.write("Current bootstrap loader version: 0x%04x\n" % (self.bslVer,))
+            sys.stderr.flush()
+
+        #now apply workarounds or patches if BSL in use requires that
+        if self.bslVer <= 0x0110:                   #check if patch is needed
+            if usepatch:                            #test if patch is desired
+                sys.stderr.write("Patch for flash programming required!\n")
+                self.patchRequired = 1
+
+                sys.stderr.write("Load and verify patch ...\n")
+                sys.stderr.flush()
+                #Programming and verification is done in one pass.
+                #The patch file is only read and parsed once.
+                segments = Memory()                     #data to program
+                segments.loadTIText(cStringIO.StringIO(PATCH))  #parse embedded patch
+                #program patch
+                self.programData(segments, self.ACTION_PROGRAM | self.ACTION_VERIFY)
+                self.patchLoaded = 1
+            else:
+                if DEBUG:
+                    sys.stderr.write("Device needs patch, but not applied (usepatch is false).\n")    #message if not patched
+
+        #should the baudrate be changed?
+        if speed is not None:
+            self.actionChangeBaudrate(speed)            #change baudrate
+
+    def actionDownloadBSL(self, bslsegments):
+        sys.stderr.write("Load new BSL into RAM...\n")
+        sys.stderr.flush()
+        self.programData(bslsegments, self.ACTION_PROGRAM)
+        sys.stderr.write("Verify new BSL...\n")
+        sys.stderr.flush()
+        self.programData(bslsegments, self.ACTION_VERIFY) #File to verify
+
+        #Read startvector of bootstrap loader
+        #blkin = self.bslTxRx(self.BSL_RXBLK, 0x0300, 2)
+        #blkin = self.bslTxRx(self.BSL_RXBLK, 0x0220, 2)
+        blkin = self.bslTxRx(self.BSL_RXBLK, bslsegments[0].startaddress, 2)
+        startaddr = struct.unpack("=1.6, downloadable >=1.5)"""
+        try:
+            baudconfigs = self.bauratetable[self.cpu]
+        except KeyError:
+            raise ValueError, "unknown CPU type %s, can't switch baudrate" % self.cpu
+        try:
+            a,l = baudconfigs[baudrate]
+        except KeyError:
+            raise ValueError, "baudrate not valid. valid values are %r" % baudconfigs.keys()
+        
+        sys.stderr.write("Changing baudrate to %d ...\n" % baudrate)
+        sys.stderr.flush()
+        self.bslTxRx(self.BSL_CHANGEBAUD,   #Command: change baudrate
+                    a, l)                   #args are coded in adr and len
+        time.sleep(0.010)                   #recomended delay
+        self.serialport.setBaudrate(baudrate)
+
+    def actionReadBSLVersion(self):
+        """informational output of BSL version number.
+        (newer MSP430-BSLs only)"""
+        ans = self.bslTxRx(self.BSL_TXVERSION, 0) #Command: receive version info
+        #the following values are in big endian style!!!
+        family_type, bsl_version = struct.unpack(">H8xH4x", ans[:-2]) #cut away checksum and extract data
+        print "Device Type: 0x%04x\nBSL version: 0x%04x\n" % (family_type, bsl_version)
+
+
+def usage():
+    """print some help message"""
+    sys.stderr.write("""
+USAGE: %s [options] [file]
+Version: %s
+
+If "-" is specified as file the data is read from the stdinput.
+A file ending with ".txt" is considered to be in TIText format,
+'.a43' and '.hex' as IntelHex and all other filenames are
+considered as ELF files.
+
+General options:
+  -h, --help            Show this help screen.
+  -c, --comport=port    Specify the communication port to be used.
+                        (Default is 0)
+                                0->COM1 / ttyS0
+                                1->COM2 / ttyS1
+                                etc.
+  -P, --password=file   Specify a file with the interrupt vectors that
+                        are used as password. This can be any file that
+                        has previously been used to program the device.
+                        (e.g. -P INT_VECT.TXT).
+  -f, --framesize=num   Max. number of data bytes within one transmitted
+                        frame (16 to 240 in steps of 16) (e.g. -f 240).
+  -m, --erasecycles=num Number of mass erase cycles (default is 1). Some
+                        old F149 devices need additional erase cycles.
+                        On newer devices it is no longer needed. (e.g. for
+                        an old F149: -m20)
+  -U, --unpatched       Do not download the BSL patch, even when it is
+                        needed. This is used when a program is downloaded
+                        into RAM and executed from there (and where flash
+                        programming is not needed.)
+  -D, --debug           Increase level of debug messages. This won't be
+                        very useful for the average user...
+  -I, --intelhex        Force fileformat to IntelHex
+  -T, --titext          Force fileformat to be TIText
+  -N, --notimeout       Don't use timeout on serial port (use with care)
+  -B, --bsl=bsl.txt     Load and use new BSL from the TI Text file
+  -S, --speed=baud      Reconfigure speed, only possible with newer
+                        MSP403-BSL versions (>1.5, read slaa089a.pdf for
+                        details). If the --bsl option is not used, an
+                        internal BSL replacement will be loaded.
+                        Needs a target with at least 2kB RAM!
+                        Possible values are 9600, 19200, 38400
+                        (default 9600)
+  -1, --f1x             Specify CPU family, in case autodetect fails
+  -4, --f4x             Specify CPU family, in case autodetect fails
+                        --F1x and --f2x are only needed when the "change
+                        baudrate" feature is used and the autodetect feature
+                        fails. If the device ID that is uploaded is known, it
+                        has precedence to the command line option.
+  --invert-reset        Invert signal on RST pin (used for some BSL hardware)
+  --invert-test         Invert signal on TEST/TCK pin (used for some BSL
+                        hardware)
+  --swap-reset-test     Swap the RST and TEST pins (used for some BSL hardware)
+  --telos-latch         Special twiddle in BSL reset for Telos hardware
+  --telos-i2c           DTR/RTS map via an I2C switch to TCK/RST in Telos Rev.B
+  --telos               Implies options --invert-reset, --invert-test, 
+                        --swap-reset-test, and --telos-latch
+  --telosb              Implies options --swap-reset-test, --telos-i2c,
+                        --no-BSL-download, and --speed=38400
+  --tmote               Identical operation to --telosb
+  --no-BSL-download     Do not download replacement BSL (disable automatic)
+  --force-BSL-download  Download replacement BSL even if not needed (the one
+                        in the device would have the required features)
+  --slow                Add delays when operating the conrol pins. Useful if
+                        the pins/circuit has high capacitance.
+
+Program Flow Specifiers:
+  -e, --masserase       Mass Erase (clear all flash memory)
+  -E, --erasecheck      Erase Check by file
+  -p, --program         Program file
+  -v, --verify          Verify by file
+
+The order of the above options matters! The table is ordered by normal
+execution order. For the options "Epv" a file must be specified.
+Program flow specifiers default to "pvr" if a file is given.
+Don't forget to specify "e" or "eE" when programming flash!
+
+Data retreiving:
+  -u, --upload=addr     Upload a datablock (see also: -s).
+  -s, --size=num        Size of the data block do upload. (Default is 2)
+  -x, --hex             Show a hexadecimal display of the uploaded data.
+                        (Default)
+  -b, --bin             Get binary uploaded data. This can be used
+                        to redirect the output into a file.
+
+Do before exit:
+  -g, --go=address      Start programm execution at specified address.
+                        This implies option --wait.
+  -r, --reset           Reset connected MSP430. Starts application.
+                        This is a normal device reset and will start
+                        the programm that is specified in the reset
+                        vector. (see also -g)
+  -w, --wait            Wait for  before closing serial port.
+
+If it says "NAK received" it's probably because you specified no or a
+wrong password.
+""" % (sys.argv[0], VERSION))
+
+#add some arguments to a function, but don't call it yet, instead return
+#a wrapper object for later invocation
+class curry:
+    """create a callable with some arguments specified in advance"""
+    def __init__(self, fun, *args, **kwargs):
+        self.fun = fun
+        self.pending = args[:]
+        self.kwargs = kwargs.copy()
+
+    def __call__(self, *args, **kwargs):
+        if kwargs and self.kwargs:
+            kw = self.kwargs.copy()
+            kw.update(kwargs)
+        else:
+            kw = kwargs or self.kwargs
+        return apply(self.fun, self.pending + args, kw)
+
+    def __repr__(self):
+        #first try if it a function
+        try:
+            return "curry(%s, %r, %r)" % (self.fun.func_name, self.pending, self.kwargs)
+        except AttributeError:
+            #fallback for callable classes
+            return "curry(%s, %r, %r)" % (self.fun, self.pending, self.kwargs)
+
+def hexify(line, bytes, width=16):
+    return  '%04x  %s%s %s' % (
+        line,
+        ('%02x '*len(bytes)) % tuple(bytes),
+        '   '* (width-len(bytes)),
+        ('%c'*len(bytes)) % tuple(map(lambda x: (x>=32 and x<127) and x or ord('.'), bytes))
+        )
+
+#Main:
+def main():
+    global DEBUG
+    import getopt
+    filetype    = None
+    filename    = None
+    comPort     = 0     #Default setting.
+    speed       = None
+    unpatched   = 0
+    reset       = 0
+    wait        = 0     #wait at the end
+    goaddr      = None
+    bsl         = BootStrapLoader()
+    toinit      = []
+    todo        = []
+    startaddr   = None
+    size        = 2
+    hexoutput   = 1
+    notimeout   = 0
+    bslrepl     = None
+    mayuseBSL   = 1
+    forceBSL    = 0
+
+    sys.stderr.write("MSP430 Bootstrap Loader Version: %s\n" % VERSION)
+
+    try:
+        opts, args = getopt.getopt(sys.argv[1:],
+            "hc:P:wf:m:eEpvrg:UDudsxbITNB:S:V14",
+            ["help", "comport=", "password=", "wait", "framesize=",
+             "erasecycles=", "masserase", "erasecheck", "program",
+             "verify", "reset", "go=", "unpatched", "debug",
+             "upload=", "download=", "size=", "hex", "bin",
+             "intelhex", "titext", "notimeout", "bsl=", "speed=",
+             "bslversion", "f1x", "f4x", "invert-reset", "invert-test",
+	     "swap-reset-test", "telos-latch", "telos-i2c", "telos", "telosb",
+             "tmote","no-BSL-download", "force-BSL-download", "slow"]
+        )
+    except getopt.GetoptError:
+        # print help information and exit:
+        usage()
+        sys.exit(2)
+
+    for o, a in opts:
+        if o in ("-h", "--help"):
+            usage()
+            sys.exit()
+        elif o in ("-c", "--comport"):
+            try:
+                comPort = int(a)                    #try to convert decimal
+            except ValueError:
+                comPort = a                         #take the string and let serial driver decide
+        elif o in ("-P", "--password"):
+            #extract password from file
+            bsl.passwd = Memory(a).getMemrange(0xffe0, 0xffff)
+        elif o in ("-w", "--wait"):
+            wait = 1
+        elif o in ("-f", "--framesize"):
+            try:
+                maxData = int(a)                    #try to convert decimal
+            except ValueError:
+                sys.stderr.write("framesize must be a valid number\n")
+                sys.exit(2)
+            #Make sure that conditions for maxData are met:
+            #( >= 16 and == n*16 and <= MAX_DATA_BYTES!)
+            if maxData > BootStrapLoader.MAX_DATA_BYTES:
+                maxData = BootStrapLoader.MAX_DATA_BYTES
+            elif maxData < 16:
+                maxData = 16
+            bsl.maxData = maxData - (maxData % 16)
+            sys.stderr.write( "Max. number of data bytes within one frame set to %i.\n" % maxData)
+        elif o in ("-m", "--erasecycles"):
+            try:
+                meraseCycles = int(a)               #try to convert decimal
+            except ValueError:
+                sys.stderr.write("erasecycles must be a valid number\n")
+                sys.exit(2)
+            #sanity check of value
+            if meraseCycles < 1:
+                sys.stderr.write("erasecycles must be a positive number\n")
+                sys.exit(2)
+            if meraseCycles > 20:
+                sys.stderr.write("warning: erasecycles set to a large number (>20): %d\n" % meraseCycles)
+            sys.stderr.write( "Number of mass erase cycles set to %i.\n" % meraseCycles)
+            bsl.meraseCycles = meraseCycles
+        elif o in ("-e", "--masserase"):
+            toinit.append(bsl.actionMassErase)        #Erase Flash
+        elif o in ("-E", "--erasecheck"):
+            toinit.append(bsl.actionEraseCheck)       #Erase Check (by file)
+        elif o in ("-p", "--programm"):
+            todo.append(bsl.actionProgram)          #Program file
+        elif o in ("-v", "--verify"):
+            todo.append(bsl.actionVerify)           #Verify file
+        elif o in ("-r", "--reset"):
+            reset = 1
+        elif o in ("-g", "--go"):
+            try:
+                goaddr = int(a)                    #try to convert decimal
+            except ValueError:
+                try:
+                    goaddr = int(a[2:],16)         #try to convert hex
+                except ValueError:
+                    sys.stderr.write("go address must be a valid number\n")
+                    sys.exit(2)
+            wait = 1
+        elif o in ("-U", "--unpatched"):
+            unpatched = 1
+        elif o in ("-D", "--debug"):
+            DEBUG = DEBUG + 1
+        elif o in ("-u", "--upload"):
+            try:
+                startaddr = int(a)                  #try to convert decimal
+            except ValueError:
+                try:
+                    startaddr = int(a,16)           #try to convert hex
+                except ValueError:
+                    sys.stderr.write("upload address must be a valid number\n")
+                    sys.exit(2)
+        elif o in ("-s", "--size"):
+            try:
+                size = int(a)
+            except ValueError:
+                try:
+                    size = int(a,16)
+                except ValueError:
+                    sys.stderr.write("size must be a valid number\n")
+                    sys.exit(2)
+        elif o in ("-x", "--hex"):
+            hexoutput = 1
+        elif o in ("-b", "--bin"):
+            hexoutput = 0
+        elif o in ("-I", "--intelhex"):
+            filetype = 0
+        elif o in ("-T", "--titext"):
+            filetype = 1
+        elif o in ("-N", "--notimeout"):
+            notimeout = 1
+        elif o in ("-B", "--bsl"):
+            bslrepl = Memory() #File to program
+            bslrepl.loadFile(a)
+        elif o in ("-V", "--bslversion"):
+            todo.append(bsl.actionReadBSLVersion) #load replacement BSL as first item
+        elif o in ("-S", "--speed"):
+            try:
+                speed = int(a)                    #try to convert decimal
+            except ValueError:
+                sys.stderr.write("speed must be decimal number\n")
+                sys.exit(2)
+        elif o in ("-1", "--f1x"):
+            bsl.cpu = F1x
+        elif o in ("-4", "--f4x"):
+            bsl.cpu = F4x
+        elif o in ("--invert-reset", ):
+            bsl.invertRST = 1
+        elif o in ("--invert-test", ):
+            bsl.invertTEST = 1
+        elif o in ("--swap-reset-test", ):
+            bsl.swapRSTTEST = 1
+        elif o in ("--telos-latch", ):
+            bsl.telosLatch = 1
+        elif o in ("--telos-i2c", ):
+            bsl.telosI2C = 1
+        elif o in ("--telos", ):
+            bsl.invertRST = 1
+            bsl.invertTEST = 1
+            bsl.swapRSTTEST = 1
+            bsl.telosLatch = 1
+        elif o in ("--telosb", ):
+            bsl.swapRSTTEST = 1
+            bsl.telosI2C = 1
+            mayuseBSL = 0
+	    speed = 38400
+        elif o in ("--tmote", ):
+            bsl.swapRSTTEST = 1
+            bsl.telosI2C = 1
+            mayuseBSL = 0
+	    speed = 38400
+        elif o in ("--no-BSL-download", ):
+            mayuseBSL = 0
+        elif o in ("--force-BSL-download", ):
+            forceBSL = 1
+        elif o in ("--slow", ):
+            bsl.slowmode = 1
+
+    if len(args) == 0:
+        sys.stderr.write("Use -h for help\n")
+    elif len(args) == 1:                            #a filename is given
+        if not todo:                                #if there are no actions yet
+            todo.extend([                           #add some useful actions...
+                bsl.actionProgram,
+                bsl.actionVerify,
+            ])
+        filename = args[0]
+    else:                                           #number of args is wrong
+        usage()
+        sys.exit(2)
+
+    if DEBUG:   #debug infos
+        sys.stderr.write("Debug level set to %d\n" % DEBUG)
+        sys.stderr.write("Python version: %s\n" % sys.version)
+
+    #sanity check of options
+    if notimeout and goaddr is not None and startaddr is not None:
+        sys.stderr.write("Option --notimeout can not be used together with both --upload and --go\n")
+        sys.exit(1)
+
+    if notimeout:
+        sys.stderr.write("Warning: option --notimeout can cause improper function in some cases!\n")
+        bsl.timeout = 0
+
+    if goaddr and reset:
+        sys.stderr.write("Warning: option --reset ignored as --go is specified!\n")
+        reset = 0
+
+    if startaddr and reset:
+        sys.stderr.write("Warning: option --reset ignored as --upload is specified!\n")
+        reset = 0
+
+    sys.stderr.flush()
+    
+    #prepare data to download
+    bsl.data = Memory()                             #prepare downloaded data
+    if filetype is not None:                        #if the filetype is given...
+        if filename is None:
+            raise ValueError("no filename but filetype specified")
+        if filename == '-':                         #get data from stdin
+            file = sys.stdin
+        else:
+            file = open(filename, "rb")             #or from a file
+        if filetype == 0:                           #select load function
+            bsl.data.loadIHex(file)                 #intel hex
+        elif filetype == 1:
+            bsl.data.loadTIText(file)               #TI's format
+        else:
+            raise ValueError("illegal filetype specified")
+    else:                                           #no filetype given...
+        if filename == '-':                         #for stdin:
+            bsl.data.loadIHex(sys.stdin)            #assume intel hex
+        elif filename:
+            bsl.data.loadFile(filename)             #autodetect otherwise
+
+    if DEBUG > 3: sys.stderr.write("File: %r" % filename)
+
+    bsl.comInit(comPort)                            #init port
+
+    #initialization list
+    if toinit:  #erase and erase check
+        if DEBUG: sys.stderr.write("Preparing device ...\n")
+        #bsl.actionStartBSL(usepatch=0, adjsp=0)     #no workarounds needed
+        #if speed: bsl.actionChangeBaudrate(speed)   #change baud rate as fast as possible
+        for f in toinit: f()
+
+    if todo or goaddr or startaddr:
+        if DEBUG: sys.stderr.write("Actions ...\n")
+        #connect to the BSL
+        bsl.actionStartBSL(
+            usepatch=not unpatched,
+            replacementBSL=bslrepl,
+            forceBSL=forceBSL,
+            mayuseBSL=mayuseBSL,
+            speed=speed,
+        )
+
+    #work list
+    if todo:
+        if DEBUG > 0:       #debug
+            #show a nice list of sheduled actions
+            sys.stderr.write("TODO list:\n")
+            for f in todo:
+                try:
+                    sys.stderr.write("   %s\n" % f.func_name)
+                except AttributeError:
+                    sys.stderr.write("   %r\n" % f)
+        for f in todo: f()                          #work through todo list
+
+    if reset:                                       #reset device first if desired
+        bsl.actionReset()
+
+    if goaddr is not None:                          #start user programm at specified address
+        bsl.actionRun(goaddr)                       #load PC and execute
+
+    #upload datablock and output
+    if startaddr is not None:
+        if goaddr:                                  #if a program was started...
+            #don't restart BSL but wait for the device to enter it itself
+            sys.stderr.write("Waiting for device to reconnect for upload: ")
+            sys.stderr.flush()
+            bsl.txPasswd(bsl.passwd, wait=1)        #synchronize, try forever...
+            data = bsl.uploadData(startaddr, size)  #upload data
+        else:
+            data = bsl.uploadData(startaddr, size)  #upload data
+        if hexoutput:                               #depending on output format
+            m = 0
+            while m < len(data):                    #print a hex display
+                print hexify(startaddr+m, map(ord,data[m:m+16]))
+                m = m + 16
+        else:
+            sys.stdout.write(data)                  #binary output w/o newline!
+        wait = 0    #wait makes no sense as after the upload the device is still in BSL
+
+    if wait:                                        #wait at the end if desired
+        sys.stderr.write("Press  ...\n")     #display a prompt
+        sys.stderr.flush()
+        raw_input()                                 #wait for newline
+
+    bsl.comDone()           #Release serial communication port
+
+if __name__ == '__main__':
+    try:
+        main()
+    except SystemExit:
+        raise               #let pass exit() calls
+    except KeyboardInterrupt:
+        if DEBUG: raise     #show full trace in debug mode
+        sys.stderr.write("user abort.\n")   #short messy in user mode
+        sys.exit(1)         #set errorlevel for script usage
+    except Exception, msg:  #every Exception is caught and displayed
+        if DEBUG: raise     #show full trace in debug mode
+        sys.stderr.write("\nAn error occoured:\n%s\n" % msg) #short messy in user mode
+        sys.exit(1)         #set errorlevel for script usage
diff --git a/tools/platforms/msp430/pybsl/tos-bsl.txt b/tools/platforms/msp430/pybsl/tos-bsl.txt
new file mode 100644
index 00000000..8f7c5fa4
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.txt
@@ -0,0 +1,279 @@
+tos-bsl
+-------
+
+BootStrapLoader software for the flash devices MSP430F1xx 
+(maybe F4xx too, but its not tested).
+Based on the example provided by TI but with more features.
+
+This version is a modification of Chris Liechti's original
+pybsl, with support for the telos, telosb and tmote devices
+from Moteiv (www.moteiv.com).
+
+It is released under a free software license,
+see tos-bsl-license.txt for more details.
+
+(C) 2001-2003 Chris Liechti 
+
+Features
+--------
+
+- understands TI-Text and Intel-hex
+- download to Flash and/or RAM, erase, verify
+- reset and wait for keypress (to run a device directly from the port
+  power)
+- load addres into R0/PC and run
+- password file can be any data file, e.g. the one used to program the
+  device in an earlier session
+- upload a memory block MSP->PC (output as binary data or hex dump)
+- written in Python, runs on Win32, Linux, BSD (other unices have other
+  device names but should be faisible), Jython (Python in Java)
+- use per command line, or in a Python script
+- download a program, execute it, resynchronize and upload results.
+  (for testing and callibration)
+- downladable BSL for larger devices
+- baudrate change for newer MSP430-BSLs
+- test and reset lines can be inverted for non standard BSL hardware
+
+Requirements
+------------
+- Linux, BSD, Un*x or Windows PC
+- Python 2.0 or newer (1.5.2 untested), 2.2 recomeded
+- win32all extensions to Python on Windows
+- BSL hardware with an MSP430 device connected to a serial port 
+
+Installation
+------------
+Python installations are available from www.python.org. On Windows simply
+use the installer. The win32all package has an installer too. These
+installations should run fine with the deafults.
+
+On Linux just Python is needed. On many distributions is Python 1.5.2
+incuded. I suggest that an upgrade to 2.2 or newer. There are rpm and deb
+binary packages and a source tarball availabe through the Python homepage.
+
+The pybsl archive can simply be unpacked to a directory, Windows users
+can use WinZip or WinRar among others to extract the gzipped tar file.
+If you want to run it from everywhere the directory where the file bsl.py
+is, should be added to the PATH.
+Look at "/etc/profile" on Linux, "autoexec.bat" on Win9x/ME,
+System Properties/Environment in Win2000/NT/XP.
+
+For Jython you need to have installed the "Java Communications API"
+(JavaComm).
+
+Short introduction
+------------------
+First the MSP430 BSL hardware is needed. An example schematics can be found
+in the application note "slaa96b" from TI (see references). Then this
+programm can be used to communicate between the PC and the MSP430 device.
+
+The program can be started by typing "python bsl.py" in a console. Often
+it works also with just "bsl.py" or "./bsl.py".
+
+USAGE: bsl.py [options] [file]
+
+If "-" is specified as file the data is read from the stdinput.
+A file ending with ".txt" is considered to be in TIText format,
+'.a43' and '.hex' as IntelHex and all other filenames are
+considered as ELF files.
+
+General options:
+  -h, --help            Show this help screen.
+  -c, --comport=port    Specify the communication port to be used.
+                        (Default is 0)
+                                0->COM1 / ttyS0
+                                1->COM2 / ttyS1
+                                etc.
+  -P, --password=file   Specify a file with the interrupt vectors that
+                        are used as password. This can be any file that
+                        has previously been used to program the device.
+                        (e.g. -P INT_VECT.TXT).
+  -f, --framesize=num   Max. number of data bytes within one transmitted
+                        frame (16 to 240 in steps of 16) (e.g. -f 240).
+  -m, --erasecycles=num Number of mass erase cycles (default is 1). Some
+                        old F149 devices need additional erase cycles.
+                        On newer devices it is no longer needed. (e.g. for
+                        an old F149: -m20)
+  -U, --unpatched       Do not download the BSL patch, even when it is
+                        needed. This is used when a program is downloaded
+                        into RAM and executed from there (and where flash
+                        programming is not needed.)
+  -D, --debug           Increase level of debug messages. This won't be
+                        very useful for the average user...
+  -I, --intelhex        Force fileformat to IntelHex
+  -T, --titext          Force fileformat to be TIText
+  -N, --notimeout       Don't use timeout on serial port (use with care)
+  -B, --bsl=bsl.txt     Load and use new BSL from the TI Text file
+  -S, --speed=baud      Reconfigure speed, only possible with newer
+                        MSP403-BSL versions (>1.5, read slaa089a.pdf for
+                        details). If the --bsl option is not used, an
+                        internal BSL replacement will be loaded.
+                        Needs a target with at least 2kB RAM!
+                        Possible values are 9600, 19200, 38400
+                        (default 9600)
+  -1, --f1x             Specify CPU family, in case autodetect fails
+  -4, --f4x             Specify CPU family, in case autodetect fails
+                        --F1x and --f2x are only needed when the "change
+                        baudrate" feature is used and the autodetect feature
+                        fails. If the device ID that is uploaded is known, it
+                        has precedence to the command line option.
+  --invert-reset        Invert signal on RST pin (used for some BSL hardware)
+  --invert-test         Invert signal on TEST/TCK pin (used for some BSL
+                        hardware)
+  --slow                Add delays when operating the conrol pins. Useful if
+                        the pins/circuit has high capacitance.
+
+Program Flow Specifiers:
+  -e, --masserase       Mass Erase (clear all flash memory)
+  -E, --erasecheck      Erase Check by file
+  -p, --program         Program file
+  -v, --verify          Verify by file
+
+The order of the above options matters! The table is ordered by normal
+execution order. For the options "Epv" a file must be specified.
+Program flow specifiers default to "pvr" if a file is given.
+Don't forget to specify "e" or "eE" when programming flash!
+
+Data retreiving:
+  -u, --upload=addr     Upload a datablock (see also: -s).
+  -s, --size=num        Size of the data block do upload. (Default is 2)
+  -x, --hex             Show a hexadecimal display of the uploaded data.
+                        (Default)
+  -b, --bin             Get binary uploaded data. This can be used
+                        to redirect the output into a file.
+
+Do before exit:
+  -g, --go=address      Start programm execution at specified address.
+                        This implies option --wait.
+  -r, --reset           Reset connected MSP430. Starts application.
+                        This is a normal device reset and will start
+                        the programm that is specified in the reset
+                        vector. (see also -g)
+  -w, --wait            Wait for  before closing serial port.
+
+If it says "NAK received" it's probably because you specified no or a
+wrong password.
+
+
+Examples
+--------
+These exaples assume that you have added the installation directory to
+the PATH. type the full path to bsl.py otherwise and maybe use
+"python bsl.py".
+
+bsl.py -e
+        Only erase flash.
+
+bsl.py -eErw 6port.a43
+        Erase flash, erase check, download an executable, run it (reset)
+        and wait.
+        
+        Old F149 devices need addidional erase cycles! Use the -m
+        option in this case (-m20 will be OK is most cases):
+        "python bsl.py -eErwm20 6port.a43"
+
+bsl.py 6port.a43
+        Download of an executable to en empty (new or erased) device.
+        (Note that in new devices some of the first bytes in the
+        information memory are random data. If data should be
+        downloaded there, specify -eE.)
+
+bsl.py -erwB BL_150S_14x.txt -S 38400 6port.a43
+        Erase device, change baudrate and download a new BSL, then
+        download the specified file. After that, reset the device and
+        wait for user input.
+
+bsl.py --go=0x220 ramtest.a43
+        Download a program into RAM and run it (on an erased device)
+
+bsl.py --go=0x200 -P 6port.a43 ramtest.a43
+        Download a program into RAM and run it (on a device that was
+        previously programmed with 6port.a43 and therefore needs a
+        specific password).
+
+        For old devices that use the patch the above command gives a
+        conflict with the patch. But as the patch is only needed to
+        programm flash, it can be left out when running a program solely
+        from RAM:
+        "python bsl.py --go=0x200 -u -P 6port.a43 ramtest.a43"
+
+bsl.py -u 0x0c00 -s 1024 -P 6port.a43
+        Get a memory dump in HEX, from the bootstrap loader (on a device
+        that was previously programmed with 6port.a43 and therefore needs
+        a specific password):
+
+        or on unix with the use of "hexdump":
+        "python bsl.py -u 0x0c00 -s 1024 -P 6port.a43 -b | hexdump"
+
+        or save the binary in a file:
+        "python bsl.py -u 0x0c00 -s 1024 -P 6port.a43 -b >dump.bin"
+
+bsl.py --go=0x220 --upload=0x200 --size=256 ramtest.a43
+        Download the file ramtest.a43 to an empty device, execute its
+        main function at 0x0220. The BSL then tries to reconnect to the
+        device. This does only work when the program on the MSP430
+        does enter the BSL by jumping at address 0x0c00. It is not
+        forced to enter the BSL by a reset as this would stop the
+        program excution.
+        When the reconnection was successful, the data, specified with
+        the --upload and --size parameters, is loaded and printed.
+        
+        This configuration can be useful for software tests, getting
+        callibration data, etc.
+        
+        PS: dont specify -r when using -g. A reset starts the user
+        program which possibly destroys a program that was downloaded
+        to RAM.
+
+bsl.py -rw
+        Just start the user program (with a reset) and wait.
+
+bsl.py -rwc1
+        Reset the device on the second serial/COM port and wait.
+
+cat 6port.a43|bsl.py -eE -
+        Pipe the data from "cat" to the BSL to erase and program the
+        flash. (un*x example, don't forget the dash at the end of the
+        line)
+
+bsl.py -e -S 38400 6port.a43
+        First download the internal replacement BSL and then use it
+        to program at 38400 baud. Only works with targets with more
+        than 1kB of RAM.
+
+bsl.py -e -B BL_150S_14x.txt -S 38400 6port.a43
+        First download the given replacement BSL and then use it to
+        program at 38400 baud. Only works with targets with more
+        than 1kB of RAM.
+
+History
+-------
+  V1.4
+        uses improved serial library
+        support for BSL download to MSP
+        support for higher baudrates (up to 38400)
+
+  V1.5
+        ELF file support
+        replacement BSLs are now internal
+
+References
+----------
+- Python: http://www.python.org
+
+- Jython: http://www.jython.org
+
+- Serial Extension for Python: http://pyserial.sourceforge.net
+
+- win32all: http://starship.python.net/crew/mhammond/
+  and http://www.activestate.com/Products/ActivePython/win32all.html
+
+- slaa89.pdf: "Features of the MSP430 Bootstrap Loader in the
+  MSP430F1121", TI
+
+- slaa96b.pdf: "Application of Bootstrap Loader in MSP430 With Flash
+  Hardware and Software Proposal", TI
+
+- Texas Instruments MSP430 Homepage, links to Datasheets and Application
+  Notes: http://www.ti.com/sc/docs/products/micro/msp430/msp430.htm
+
diff --git a/tools/platforms/msp430/pybsl/winexe/Makefile b/tools/platforms/msp430/pybsl/winexe/Makefile
new file mode 100644
index 00000000..7a419969
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/Makefile
@@ -0,0 +1,12 @@
+
+.PHONY: all FORCE clean windist
+
+all: windist
+
+#wrap py to exe and build windows installer
+windist:
+	sh build-windist
+
+#clean up the mess...
+clean:
+	rm -r dist build bin
diff --git a/tools/platforms/msp430/pybsl/winexe/README.windows b/tools/platforms/msp430/pybsl/winexe/README.windows
new file mode 100644
index 00000000..49ee19bb
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/README.windows
@@ -0,0 +1,24 @@
+$Id$
+@author Cory Sharp 
+
+Follow these directions to recreate the standalone tos-bsl.exe. After doing
+this, you should recreate ../tos-bsl-win.tar.gz with the contents of the
+generated bin directory.
+
+--
+
+To build a binary executable msp430-bsl.exe for Windows, first download
+and install Python 2.3 for Windows [1][2], the version included with
+Cygwin is insufficient.  Then install py2exe [3][4].
+
+  [1] http://www.python.org/download/
+  [2] http://www.python.org/ftp/python/2.3.4/Python-2.3.4.exe
+  [3] http://starship.python.net/crew/theller/py2exe/
+  [4] http://prdownloads.sourceforge.net/py2exe/py2exe-0.5.3.win32-py2.3.exe?download
+
+To compile msp430-bsl, make sure the Windows version of python is
+first in your path (i.e., before any cygwin version), then run
+make. When successful, that command creates a bin/ directory, which
+contains tos-bsl.exe and its supporting files.  You must install
+bin/ and bin/lib/ all together, or it won't work.  I installed it into
+c:/mspgcc/bin, directly over the version that came with MSPGCC.
diff --git a/tools/platforms/msp430/pybsl/winexe/build-windist b/tools/platforms/msp430/pybsl/winexe/build-windist
new file mode 100644
index 00000000..7fb3565b
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/build-windist
@@ -0,0 +1,5 @@
+rm -rf bin
+cd ..
+python winexe/setup.py py2exe
+mv bin winexe/bin
+rm -rf build
diff --git a/tools/platforms/msp430/pybsl/winexe/setup.py b/tools/platforms/msp430/pybsl/winexe/setup.py
new file mode 100644
index 00000000..5acef03c
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/setup.py
@@ -0,0 +1,24 @@
+# setup.py
+from distutils.core import setup
+import glob, sys, py2exe, os
+
+sys.argv.append("sdist")
+sys.argv.append("py2exe")
+
+setup(
+    name='pybsl',
+    version='0.5',
+    options = {"py2exe":
+        {
+            'dist_dir': 'bin',
+            'excludes': ['javax.comm'],
+        }
+    },
+    console = ["tos-bsl"],
+    zipfile = "lib/shared-bsl.zip",
+)
+
+if os.path.exists('bin/bsl.exe'):
+    if os.path.exists('bin/msp430-bsl.exe'):
+        os.remove('bin/msp430-bsl.exe')
+    os.rename('bin/bsl.exe', 'bin/msp430-bsl.exe')
diff --git a/tools/release/build-rpms b/tools/release/build-rpms
new file mode 100755
index 00000000..6a9f46e3
--- /dev/null
+++ b/tools/release/build-rpms
@@ -0,0 +1,44 @@
+## NOTE: This is for MY rpm setup. Don't expect it to work for you...
+
+# For linux, change to /usr/src/redhat
+# For my cygwin: /cygdrive/c/rpmsrc
+RPMS=/cygdrive/c/rpmsrc
+TINYOS_VERSION=2.0.0beta2
+TINYOS_TOOLS_VERSION=1.2.2
+VM_VERSION=1.1.1Mar2004cvs
+TINYDB_VERSION=1.1.3July2004cvs
+CONTRIB_VERSION=1.1.4Apr2005cvs
+
+echo "*** Building tarballs"
+#rm ../../../*.tar.gz
+sh tinyos.files
+#sh tinyos-tools.files
+#sh contrib/contrib.files
+#sh vm/vm.files
+#sh task-tinydb/task-tinydb.files
+
+HERE=$PWD
+
+echo "*** Removing old srcs and rpms"
+cd $RPMS
+#rm -f $RPMS/SOURCES/*.tar.gz
+#rm -f $RPMS/RPMS/noarch/*.rpm
+#rm -f $RPMS/RPMS/i386/*.rpm
+
+echo "*** Installing new tarballs"
+cd $HERE/../../..
+cp tinyos-$TINYOS_VERSION.tar.gz $RPMS/SOURCES
+#cp tinyos-tools-$TINYOS_TOOLS_VERSION.tar.gz $RPMS/SOURCES
+#cp tinyos-vm-$VM_VERSION.tar.gz $RPMS/SOURCES
+#cp tinyos-contrib-$CONTRIB_VERSION.tar.gz $RPMS/SOURCES
+#cp task-tinydb-$TINYDB_VERSION.tar.gz $RPMS/SOURCES
+
+echo "*** Creating rpms"
+cd $RPMS
+rpmbuild -bb $HERE/tinyos.spec
+#rpmbuild -bb $HERE/tinyos-tools.spec
+#rpmbuild -bb $HERE/task-tinydb/task-tinydb.spec
+#rpmbuild -bb $HERE/contrib/contrib.spec
+#rpmbuild -bb $HERE/vm/vm.spec
+
+
diff --git a/tools/release/external-tools/make.spec b/tools/release/external-tools/make.spec
new file mode 100644
index 00000000..e7845200
--- /dev/null
+++ b/tools/release/external-tools/make.spec
@@ -0,0 +1,57 @@
+Summary: GNU Make 3.80 patched for use with TinyOS
+Name: make
+Version: 3.80tinyos
+Release: 1
+Packager: TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools
+URL: http://webs.cs.berkeley.edu/tos/dist-1.1.0
+Source0: %{name}-%{version}.tar.bz2
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+GNU make 3.80 patched for use with TinyOS. 
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=/usr
+make
+
+%pre
+# This worked in linux, but not in cygwin:
+#   cp: `/usr/bin/make' and `/usr/bin/make-unpatched' are the same file
+#   error: %pre(make-3.80tinyos-1) scriptlet failed, exit status 1
+#   error:   install: %pre scriptlet failed (2), skipping make-3.80tinyos-1
+# cp /usr/bin/make /usr/bin/make-unpatched
+
+%install
+rm -rf %{buildroot}/usr
+make prefix=%{buildroot}/usr install
+cd %{buildroot}/usr
+# just install the modified make
+rm -rf man share info
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+/usr
+%doc
+
+%changelog
+* Mon May 23 2005 kwright  
+- Initial build.
+
+#
+# Use Phil's tgz to build make. Before installing,
+# move existing to /usr/bin/make-unpatched. 
+#
+# In order to not generate the debuginfo for this, the 
+# users's .rpmmacro must have this line:
+#    %debug_package %{nil}
+#
+
diff --git a/tools/release/extractor b/tools/release/extractor
new file mode 100755
index 00000000..dc9b894f
--- /dev/null
+++ b/tools/release/extractor
@@ -0,0 +1,26 @@
+#!/usr/bin/perl
+$name = $ARGV[0];
+
+@files = split /\n/, `find .`;
+@result = @files;
+
+while () {
+    if (/^!(.*)/) { # exclude
+	$pat = $1;
+	@result = grep !/$pat/, @result;
+    }
+    else { # include
+	$pat = $_;
+	chop $pat;
+	push @result, grep /$pat/, @files;
+    }
+}
+
+mkdir $name;
+open TAR, "|tar cf - -T - --no-recursion | tar xf - -C $name";
+print TAR join("\n", @result);
+close TAR;
+#print join("\n", @result);
+system("tar cf - $name");
+
+
diff --git a/tools/release/tinyos-tools.files b/tools/release/tinyos-tools.files
new file mode 100755
index 00000000..634be0df
--- /dev/null
+++ b/tools/release/tinyos-tools.files
@@ -0,0 +1,19 @@
+NAME=tinyos-tools
+VERSION=1.2.2
+
+cd ../..
+rm -rf $NAME-$VERSION
+tools/release/extractor $NAME-$VERSION <<'EOF' | gzip >../$NAME-$VERSION.tar.gz
+!^./apps
+!^./doc
+!^./support
+!^./tools/release
+!^./tos
+!^./README|overall-todo.txt
+!/.cvsignore
+!/CVS/
+!/CVS$
+!~$
+!#
+EOF
+rm -rf $NAME-$VERSION
diff --git a/tools/release/tinyos-tools.spec b/tools/release/tinyos-tools.spec
new file mode 100644
index 00000000..93537414
--- /dev/null
+++ b/tools/release/tinyos-tools.spec
@@ -0,0 +1,90 @@
+%define debug_package %{nil}
+
+Summary: TinyOS tools 
+Name: tinyos-tools
+Version: 1.2.2
+Release: 1
+License: Please see source
+Group: Development/System
+URL: http://www.tinyos.net/
+BuildRoot: %{_tmppath}/%{name}-root
+Source0: %{name}-%{version}.tar.gz
+# This makes cygwin happy
+Provides: /bin/sh /bin/bash
+Requires: nesc >= 1.2.7
+
+%description
+Tools for use with tinyos. Includes, for example: uisp, motelist, pybsl, mig,
+ncc and nesdoc. The source for these tools is found in the TinyOS CSV
+repository under tinyos-2.x/tools.
+
+%prep
+%setup -q -n %{name}-%{version}
+
+%build
+cd tools
+./Bootstrap
+TOSDIR=/opt/tinyos-2.x/tos ./configure --prefix=/usr
+make
+
+%install
+rm -rf %{buildroot}
+cd tools
+make install prefix=%{buildroot}/usr
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+/usr/
+%attr(4755, root, root) /usr/bin/uisp*
+
+%post
+if [ -z "$RPM_INSTALL_PREFIX" ]; then
+  RPM_INSTALL_PREFIX=/usr
+fi
+
+# Install giveio (windows only)
+if [ -f $RPM_INSTALL_PREFIX/lib/tinyos/giveio-install ]; then
+  (cd $RPM_INSTALL_PREFIX/lib/tinyos; ./giveio-install --install)
+fi
+# Install the JNI;  we can't call tos-install-jni 
+# directly because it isn't in the path yet. Stick
+# a temporary script in /etc/profile.d and then delete.
+jni=`$RPM_INSTALL_PREFIX/bin/tos-locate-jre --jni`
+if [ $? -ne 0 ]; then
+  echo "Java not found, not installing JNI code"
+  exit 0
+fi
+echo "Installing Java JNI code in $jni ... "
+%ifos linux
+for lib in $RPM_INSTALL_PREFIX/lib/tinyos/*.so; do 
+  install $lib "$jni" || exit 0
+done
+%else
+for lib in $RPM_INSTALL_PREFIX/lib/tinyos/*.dll; do 
+  install --group=SYSTEM $lib "$jni" || exit 0
+done
+%endif
+echo "done."
+
+%preun
+# Remove JNI code on uninstall
+
+%changelog
+* Wed Jul 5 2006  1.2.2-1
+* Thu Feb 9 2006  1.2.1-2
+* Sat Feb 4 2006  1.2.1-1
+- 1.2.1
+* Wed Aug 26 2005  1.2.0-beta2.1
+- includes dgay fixes for uisp and calling tos-locate-jre from post script
+* Wed Aug 17 2005  1.2.0-internal2.1
+- include fixes/improvements to tos-locate-jre and switch prefix to /usr
+* Fri Aug 12 2005   1.2.0-internal1.1
+- 1.2
+* Wed Sep  3 2003   1.1.0-internal2.1
+- All tools, no java
+* Sun Aug 31 2003 root  1.1.0-internal1.1
+- Initial build.
diff --git a/tools/release/tinyos.files b/tools/release/tinyos.files
new file mode 100644
index 00000000..cc9583e1
--- /dev/null
+++ b/tools/release/tinyos.files
@@ -0,0 +1,28 @@
+NAME=tinyos
+VERSION=2.0.0beta2
+
+cd ../..
+rm -rf $NAME-$VERSION
+tools/release/extractor $NAME-$VERSION <<'EOF' | gzip >../$NAME-$VERSION.tar.gz
+!^./apps/tests/(eyesIFX|mica2|msp430|RadioStress|TestAlarm|TestAMService|TestBroadcast|TestCollection|TestNetwork|TestPowerManager|TestPowerup|TestSerialBandwidth|TestSleep|TestTimerSync|TestTreeRouting|TestTrickleTimer)
+!^./doc
+!^./overall-todo.txt
+!^./support/make/Makelocal
+!^./support/make/btnode3.target
+!^./support/make/telosa.target
+!^./tools
+!^./tos/chips/sht11
+!^./tos/sensorboards/mts300
+!^./tos/sensorboards/im2sb
+!^./tos/platforms/btnode3
+!/.cvsignore
+!/CVS/
+!/CVS$
+!~$
+!/build/
+!/build$
+!#
+!.class$
+!^./tos/platforms/telosa/.platform
+EOF
+rm -rf $NAME-$VERSION
diff --git a/tools/release/tinyos.spec b/tools/release/tinyos.spec
new file mode 100644
index 00000000..1d0f92ee
--- /dev/null
+++ b/tools/release/tinyos.spec
@@ -0,0 +1,49 @@
+Summary: An event-based operating environment designed for use with embedded networked sensors.
+Name: tinyos
+BuildArchitectures: noarch
+Version: 2.0.0beta2
+Release: 3
+License: Please see source
+Packager: TinyOS Group, UC Berkeley
+Group: Development/System
+URL: www.tinyos.net
+Source0: %{name}-%{version}.tar.gz
+BuildRoot: %{_tmppath}/%{name}-root
+Prefix: /opt
+Requires: tinyos-tools >= 1.2.2, nesc >= 1.2.7
+
+%description
+TinyOS is an event based operating environment designed for use with 
+embedded networked sensors.  It is designed to support the concurrency
+intensive operations required by networked sensors while requiring minimal
+hardware resources. For a full analysis and description of the
+TinyOS system, its component model, and its implications for Networked
+Sensor Architectures please see: "Architectural Directions for Networked
+Sensors" which can be found off of http://www.tinyos.net
+
+%prep
+%setup -q
+
+%install
+rm -rf %{buildroot}/opt/tinyos-2.x
+mkdir -p %{buildroot}/opt
+export TOSROOT=$RPM_BUILD_DIR/%{name}-%{version}
+export TOSDIR=$TOSROOT/tos
+%ifos linux
+export CLASSPATH=$TOSROOT/support/sdk/java:.
+%else
+export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java`\;.
+%endif
+cd support/sdk/java
+pwd
+ls
+make tinyos.jar; make clean
+cp -a $RPM_BUILD_DIR/%{name}-%{version} %{buildroot}/opt/tinyos-2.x
+
+%clean
+rm -rf %{buildroot}
+
+%files
+%defattr(-,root, root,-)
+/opt/tinyos-2.x/
+
diff --git a/tools/tinyos/.cvsignore b/tools/tinyos/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/Makefile.am b/tools/tinyos/Makefile.am
new file mode 100644
index 00000000..4c28fe6c
--- /dev/null
+++ b/tools/tinyos/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = java misc ncc
+
diff --git a/tools/tinyos/java/.cvsignore b/tools/tinyos/java/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/java/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/java/Makefile.am b/tools/tinyos/java/Makefile.am
new file mode 100644
index 00000000..75d91fdc
--- /dev/null
+++ b/tools/tinyos/java/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = env serial
+
diff --git a/tools/tinyos/java/README b/tools/tinyos/java/README
new file mode 100644
index 00000000..3148ae7d
--- /dev/null
+++ b/tools/tinyos/java/README
@@ -0,0 +1,2 @@
+JNI libraries for TinyOS's java SDK
+
diff --git a/tools/tinyos/java/env/.cvsignore b/tools/tinyos/java/env/.cvsignore
new file mode 100644
index 00000000..43fc01c5
--- /dev/null
+++ b/tools/tinyos/java/env/.cvsignore
@@ -0,0 +1,4 @@
+Makefile
+Makefile.in
+.deps
+getenv.dll
diff --git a/tools/tinyos/java/env/Makefile.am b/tools/tinyos/java/env/Makefile.am
new file mode 100644
index 00000000..5fad4c02
--- /dev/null
+++ b/tools/tinyos/java/env/Makefile.am
@@ -0,0 +1,17 @@
+JDK = @JDK@
+
+EXEEXT=
+
+tinyoslibdir=$(libdir)/tinyos
+
+tinyoslib_PROGRAMS = @GETENVLIB@
+
+EXTRA_PROGRAMS = libgetenv.so getenv.dll
+
+libgetenv_so_SOURCES = net_tinyos_util_Env.h net_tinyos_util_Env.c
+
+libgetenv.so : net_tinyos_util_Env.h net_tinyos_util_Env.c
+	gcc "-I$(JDK)/include/linux" "-I$(JDK)/include" -shared -fpic net_tinyos_util_Env.c -o$@
+
+getenv.dll: net_tinyos_util_Env.h net_tinyos_util_Env.c
+	gcc -shared -o$@ -mno-cygwin "-I$(JDK)/include" "-I$(JDK)/include/win32" -D_JNI_IMPLEMENTATION -Wl,--kill-at net_tinyos_util_Env.c
diff --git a/tools/tinyos/java/env/net_tinyos_util_Env.c b/tools/tinyos/java/env/net_tinyos_util_Env.c
new file mode 100644
index 00000000..ce59b50d
--- /dev/null
+++ b/tools/tinyos/java/env/net_tinyos_util_Env.c
@@ -0,0 +1,22 @@
+// $Id$
+
+#include "net_tinyos_util_Env.h"
+#include 
+
+
+JNIEXPORT jstring JNICALL Java_net_tinyos_util_Env_igetenv
+  (JNIEnv *env, jclass c, jstring jname)
+{
+  const char *name, *value;
+
+  if (jname == NULL)
+    return NULL;
+
+  name = (*env)->GetStringUTFChars(env, jname, (jboolean *)NULL);
+
+  value = getenv(name) ;
+
+  (*env)->ReleaseStringUTFChars(env, jname, name);
+
+  return value ? (*env)->NewStringUTF(env, value) : NULL;
+}
diff --git a/tools/tinyos/java/env/net_tinyos_util_Env.h b/tools/tinyos/java/env/net_tinyos_util_Env.h
new file mode 100644
index 00000000..0d76bd4b
--- /dev/null
+++ b/tools/tinyos/java/env/net_tinyos_util_Env.h
@@ -0,0 +1,24 @@
+// $Id$
+
+/* DO NOT EDIT THIS FILE - it is machine generated */
+#include 
+/* Header for class net_tinyos_util_Env */
+
+#ifndef _Included_net_tinyos_util_Env
+#define _Included_net_tinyos_util_Env
+#ifdef __cplusplus
+extern "C" {
+#endif
+/* Inaccessible static: loaded */
+/*
+ * Class:     net_tinyos_util_Env
+ * Method:    igetenv
+ * Signature: (Ljava/lang/String;)Ljava/lang/String;
+ */
+JNIEXPORT jstring JNICALL Java_net_tinyos_util_Env_igetenv
+  (JNIEnv *, jclass, jstring);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/tinyos/java/serial/.cvsignore b/tools/tinyos/java/serial/.cvsignore
new file mode 100644
index 00000000..0526cde5
--- /dev/null
+++ b/tools/tinyos/java/serial/.cvsignore
@@ -0,0 +1,4 @@
+Makefile
+Makefile.in
+.deps
+toscomm.dll
diff --git a/tools/tinyos/java/serial/Makefile.am b/tools/tinyos/java/serial/Makefile.am
new file mode 100644
index 00000000..e71be367
--- /dev/null
+++ b/tools/tinyos/java/serial/Makefile.am
@@ -0,0 +1,28 @@
+JDK = @JDK@
+
+EXEEXT=
+
+tinyoslibdir=$(libdir)/tinyos
+
+tinyoslib_PROGRAMS = @TOSCOMMLIB@
+
+EXTRA_PROGRAMS = libtoscomm.so toscomm.dll
+
+libtoscomm_so_SOURCES = \
+  NativeSerialEnums.h \
+  NativeSerial_linux.cpp \
+  TOSComm_wrap.cxx
+
+toscomm_dll_SOURCES = \
+  NativeSerialEnums.h \
+  NativeSerial_win32.cpp \
+  TOSComm_wrap.cxx
+
+libtoscomm.so: $(libtoscomm_so_SOURCES)
+	$(CXX) -O2 -shared "-I$(JDK)/include" "-I$(JDK)/include/linux" \
+	  -o $@ NativeSerial_linux.cpp
+
+toscomm.dll: $(toscomm_dll_SOURCES)
+	$(CXX) -O2 -s -mno-cygwin -shared "-I$(JDK)/include" "-I$(JDK)/include/win32" -D_JNI_IMPLEMENTATION -Wl,--kill-at \
+	  -o $@ NativeSerial_win32.cpp
+
diff --git a/tools/tinyos/java/serial/NativeSerial.h b/tools/tinyos/java/serial/NativeSerial.h
new file mode 100644
index 00000000..4272fbe8
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial.h
@@ -0,0 +1,66 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+#include 
+
+class NativeSerial
+{
+public:
+  void setSerialPortParams( int baudrate, int databits, int stopbits, bool parity );
+  int getBaudRate();
+  int getDataBits();
+  int getStopBits();
+  bool getParity();
+
+  void notifyOn( int event, bool enable );
+  bool isNotifyOn( int event );
+  bool waitForEvent();
+  bool cancelWait();
+  bool didEventOccur( int event );
+
+  void setDTR( bool high );
+  void setRTS( bool high );
+  bool isDTR();
+  bool isRTS();
+  bool isCTS();
+  bool isDSR();
+  bool isRI();
+  bool isCD();
+
+  void sendBreak( int millis );
+
+  NativeSerial( const char* portname );
+  ~NativeSerial();
+
+  void close();
+
+  int available();
+  int read();
+  int read( signed char buffer_out[], int off, int len );
+  int write( int b );
+  int write( const signed char buffer_in[], int off, int len );
+
+  static std::string getTOSCommMap();
+};
+
diff --git a/tools/tinyos/java/serial/NativeSerialEnums.h b/tools/tinyos/java/serial/NativeSerialEnums.h
new file mode 100644
index 00000000..def7e78d
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerialEnums.h
@@ -0,0 +1,55 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+namespace NativeSerialEnums
+{
+  enum event_type
+  {
+    DATA_AVAILABLE = (1<<0),
+    OUTPUT_EMPTY = (1<<1),
+    CTS = (1<<2),
+    DSR = (1<<3),
+    RING_INDICATOR = (1<<4),
+    CARRIER_DETECT = (1<<5),
+    OVERRUN_ERROR = (1<<6),
+    PARITY_ERROR = (1<<7),
+    FRAMING_ERROR = (1<<8),
+    BREAK_INTERRUPT = (1<<9),
+  };
+
+  enum parity_type
+  {
+    NPARITY_NONE = 0,
+    NPARITY_EVEN = 1,
+    NPARITY_ODD = 2,
+  };
+
+  enum stop_type
+  {
+    STOPBITS_1 = 1,
+    STOPBITS_2 = 2,
+    STOPBITS_1_5 = 3,
+  };
+};
+
diff --git a/tools/tinyos/java/serial/NativeSerial_linux.cpp b/tools/tinyos/java/serial/NativeSerial_linux.cpp
new file mode 100644
index 00000000..7e66a910
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial_linux.cpp
@@ -0,0 +1,513 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "NativeSerialEnums.h"
+using namespace NativeSerialEnums;
+
+
+class comm_port_error : public std::runtime_error
+{
+  public:
+    comm_port_error( const char* msg ): std::runtime_error(msg) { }
+};
+
+
+class NativeSerial
+{
+public:
+  typedef std::string String;
+
+private:
+
+  std::string m_portname;
+  int m_fd;
+  int m_events_in;
+  int m_events_out;
+  bool m_wait_for_events;
+
+protected:
+
+  void note( std::string s )
+  {
+    //std::cout << "NativeSerial_linux " << m_portname << ": " << s << std::endl;
+  }
+
+  String cat( const char* prefix, const String& err )
+  {
+    return (prefix == NULL ? "" : String(prefix)+": ") + err;
+  }
+
+  void errno_wrap( bool error, const char* extra_err = NULL )
+  {
+    if( error && (errno != 0) )
+      throw comm_port_error( cat(extra_err, strerror(errno)).c_str() );
+  }
+
+  void block_on_read( bool block )
+  {
+note( "block_on_read begin" );
+    fcntl( m_fd, F_SETFL, (block ? 0 : FNDELAY) );
+note( "block_on_read end" );
+  }
+
+  struct termios get_comm_state()
+  {
+note( "get_comm_state begin" );
+    struct termios options;
+    errno_wrap( tcgetattr( m_fd, &options ) == -1, "get_comm_state" );
+note( "get_comm_state end" );
+    return options;
+  }
+
+
+  int get_modem_status()
+  {
+note( "get_modem_status begin" );
+    int status = 0;
+    errno_wrap( ioctl( m_fd, TIOCMGET, &status ) == -1, "get_modem_status" );
+note( "get_modem_status end" );
+    return status;
+  }
+
+  void set_modem_status( int status )
+  {
+note( "set_modem_status begin" );
+    errno_wrap( ioctl( m_fd, TIOCMSET, &status ) == -1, "set_modem_status" );
+note( "set_modem_status end" );
+  }
+
+  int baud_to_enum( int baud )
+  {
+    switch( baud )
+    {
+      case 0: return B0;
+      case 50: return B50;
+      case 75: return B75;
+      case 110: return B110;
+      case 134: return B134;
+      case 150: return B150;
+      case 200: return B200;
+      case 300: return B300;
+      case 600: return B600;
+      case 1200: return B1200;
+      case 1800: return B1800;
+      case 2400: return B2400;
+      case 4800: return B4800;
+      case 9600: return B9600;
+      case 19200: return B19200;
+      case 38400: return B38400;
+      case 57600: return B57600;
+      case 115200: return B115200;
+      case 230400: return B230400;
+    }
+    throw comm_port_error("baud_to_enum, bad baud rate");
+  }
+
+  int enum_to_baud( int baudenum )
+  {
+    switch( baudenum )
+    {
+      case B0: return 0;
+      case B50: return 50;
+      case B75: return 75;
+      case B110: return 110;
+      case B134: return 134;
+      case B150: return 150;
+      case B200: return 200;
+      case B300: return 300;
+      case B600: return 600;
+      case B1200: return 1200;
+      case B1800: return 1800;
+      case B2400: return 2400;
+      case B4800: return 4800;
+      case B9600: return 9600;
+      case B19200: return 19200;
+      case B38400: return 38400;
+      case B57600: return 57600;
+      case B115200: return 115200;
+      case B230400: return 230400;
+    }
+    throw comm_port_error("enum_to_baud, bad baud rate");
+  }
+
+/*
+  static DWORD map_events_to_win32( int event )
+  {
+    DWORD ev = 0;
+    if( event & DATA_AVAILABLE ) ev |= EV_RXCHAR;
+    if( event & OUTPUT_EMPTY ) ev |= EV_TXEMPTY;
+    if( event & CTS ) ev |= EV_CTS;
+    if( event & DSR ) ev |= EV_DSR;
+    if( event & RING_INDICATOR ) ev |= EV_RING;
+    if( event & CARRIER_DETECT ) ev |= EV_RLSD;
+    if( event & OVERRUN_ERROR ) ev |= EV_ERR;
+    if( event & PARITY_ERROR ) ev |= EV_ERR;
+    if( event & FRAMING_ERROR ) ev |= EV_ERR;
+    if( event & BREAK_INTERRUPT ) ev |= EV_BREAK;
+    return ev;
+  }
+
+  static int map_events_from_win32( DWORD ev, DWORD errors )
+  {
+    int event = 0;
+    if( ev & EV_RXCHAR ) event |= DATA_AVAILABLE;
+    if( ev & EV_TXEMPTY ) event |= OUTPUT_EMPTY;
+    if( ev & EV_CTS ) event |= CTS;
+    if( ev & EV_DSR ) event |= DSR;
+    if( ev & EV_RING ) event |= RING_INDICATOR;
+    if( ev & EV_RLSD ) event |= CARRIER_DETECT;
+    if( ev & EV_ERR )
+    {
+      if( errors & CE_BREAK ) event |= BREAK_INTERRUPT;
+      if( errors & CE_FRAME ) event |= FRAMING_ERROR;
+      if( errors & CE_IOE ) throw comm_port_error("Win32 Comm IO Error");
+      if( errors & CE_MODE ) throw comm_port_error("Win32 Comm Invalid Mode");
+      if( errors & CE_OVERRUN ) event |= OVERRUN_ERROR;
+      if( errors & CE_RXOVER ) event |= OVERRUN_ERROR; //?? okay
+      if( errors & CE_RXPARITY ) event |= PARITY_ERROR;
+      if( errors & CE_TXFULL ) event |= OVERRUN_ERROR; //?? okay
+    }
+    if( ev & EV_BREAK ) event |= BREAK_INTERRUPT;
+    return event;
+  }
+*/
+
+public:
+
+  void setSerialPortParams( int baudrate, int databits, int stopbits, int parity )
+  {
+note( "setSerialPortParams begin" );
+    struct termios state = get_comm_state();
+
+    int baudenum = baud_to_enum(baudrate);
+    errno_wrap( cfsetispeed( &state, baudenum ) == -1, "baudrate" );
+    errno_wrap( cfsetospeed( &state, baudenum ) == -1, "baudrate" );
+
+    //throw comm_port_error("nuthin");
+
+    state.c_cflag &= ~CSIZE;
+    switch( databits )
+    {
+      case 5: state.c_cflag |= CS5; break;
+      case 6: state.c_cflag |= CS6; break;
+      case 7: state.c_cflag |= CS7; break;
+      case 8: default: state.c_cflag |= CS8;
+    }
+
+    if( stopbits == STOPBITS_2 )
+      state.c_cflag |= CSTOPB;
+    else
+      state.c_cflag &= ~CSTOPB;
+
+    state.c_cflag |= PARENB;
+    switch( parity )
+    {
+      case NPARITY_EVEN: state.c_cflag &= ~PARODD; break;
+      case NPARITY_ODD: state.c_cflag |= PARODD; break;
+      case NPARITY_NONE: default: state.c_cflag &= ~PARENB;
+    }
+
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &state ) == -1, "set_comm_state" );
+note( "setSerialPortParams end" );
+  }
+
+  int getBaudRate()
+  {
+    struct termios state = get_comm_state();
+    return enum_to_baud( cfgetospeed( &state ) );
+  }
+
+  int getDataBits()
+  {
+    switch( get_comm_state().c_cflag & CSIZE )
+    {
+      case CS5: return 5;
+      case CS6: return 6;
+      case CS7: return 7;
+      case CS8: default: return 8;
+    }
+  }
+
+  int getStopBits()
+  {
+    int stop = get_comm_state().c_cflag;
+    return (stop & CSTOPB) ? STOPBITS_2 : STOPBITS_1;
+  }
+
+  int getParity()
+  {
+    int parity = get_comm_state().c_cflag;
+    if( parity & PARENB )
+      return (parity & PARODD) ? NPARITY_ODD : NPARITY_EVEN;
+    return NPARITY_NONE;
+  }
+
+  int read( signed char* buffer, int off, int len )
+  {
+note( "read begin" );
+    int nread = ::read( m_fd, buffer+off, len );
+    errno_wrap( nread == -1, "read" );
+#if 0
+printf("   ...  read:");
+for( int i=0; i 0) ? ((unsigned char)byte) : -1;
+  }
+
+  int write( int b )
+  {
+    signed char byte = b;
+    return write( &byte, 0, 1 );
+  }
+
+  int available()
+  {
+note( "available begin" );
+    int navail = 0;
+    int rv = 0;
+    errno_wrap( rv=ioctl( m_fd, FIONREAD, &navail ) == -1, "available" );
+//printf("... fionread=%d, rv=%d\n",navail,rv);
+note( "available end" );
+    return navail;
+  }
+
+  void notifyOn( int event, bool enable )
+  {
+    if( enable )
+      m_events_in |= event;
+    else
+      m_events_in &= ~event;
+  }
+
+  bool isNotifyOn( int event )
+  {
+    return (m_events_in & event) != 0;
+  }
+
+  bool waitForEvent()
+  {
+note( "waitForEvent begin" );
+    fd_set input;
+    struct timeval tv;
+    m_events_out = 0;
+
+    while( m_wait_for_events && (m_fd != -1) && (m_events_out == 0) )
+    {
+      FD_ZERO( &input );
+      FD_SET( m_fd, &input );
+      tv.tv_sec = 0;
+      tv.tv_usec = 100*1000; // 1ms is the minimum resolution, at best
+
+      if( select( m_fd+1, &input, NULL, NULL, &tv ) == -1 )
+      {
+	if( errno == EINTR )
+	  break;
+	errno_wrap( true, "waitForEvent.select" );
+      }
+
+      if( FD_ISSET( m_fd, &input ) )
+	m_events_out |= DATA_AVAILABLE;
+    }
+
+    m_wait_for_events = true;
+note( "waitForEvent end" );
+    return (m_events_out != 0);
+  }
+
+  bool cancelWait()
+  {
+note( "cancelWait begin" );
+    m_wait_for_events = false;
+note( "cancelWait end" );
+  }
+
+  bool didEventOccur( int event )
+  {
+    return (m_events_out & event) != 0;
+  }
+
+  void setDTR( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_DTR );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_DTR );
+  }
+
+  void setRTS( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_RTS );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_RTS );
+  }
+
+  bool isDTR()
+  {
+    return (get_modem_status() & TIOCM_DTR) != 0;
+  }
+
+  bool isRTS()
+  {
+    return (get_modem_status() & TIOCM_RTS) != 0;
+  }
+
+  bool isCTS()
+  {
+    return (get_modem_status() & TIOCM_CTS) != 0;
+  }
+
+  bool isDSR()
+  {
+    return (get_modem_status() & TIOCM_DSR) != 0;
+  }
+
+  bool isRI()
+  {
+    return (get_modem_status() & TIOCM_RI) != 0;
+  }
+
+  bool isCD()
+  {
+    return (get_modem_status() & TIOCM_CD) != 0;
+  }
+
+  void sendBreak( int millis )
+  {
+  }
+
+  NativeSerial( const char* portname ):
+    m_fd(-1),
+    m_events_in(0), 
+    m_events_out(0),
+    m_wait_for_events(true)
+  {
+    m_portname = portname;
+note( "constructor begin" );
+    m_fd = open( portname, O_RDWR | O_NOCTTY | O_NONBLOCK );
+    errno_wrap( m_fd == -1, "open" );
+
+//std::cout << "NativeSerial constructor [1] " << portname << std::endl;
+
+    block_on_read(false);
+
+    // set default port parmeters
+    //struct termios options = get_comm_state();
+    struct termios options;
+    memset( &options, 0, sizeof(options) );
+
+    // disable rts/cts, no parity bits, one stop bit, clear databits mask
+    //local mode, enable receiver, 8 databits
+    options.c_cflag = CLOCAL | CREAD | CS8;
+
+    //raw mode
+    options.c_lflag = 0;
+
+    //disable software flow control, etc
+    options.c_iflag = IGNPAR | IGNBRK;
+
+    //raw output mode
+    options.c_oflag = 0;
+
+    //set thresholds
+    options.c_cc[VMIN] = 0;
+    options.c_cc[VTIME] = 0;
+
+    errno_wrap( tcflush( m_fd, TCIOFLUSH ) == -1, "flush" );
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &options ) == -1, "setattr" );
+
+    setDTR(false);
+    setRTS(false);
+note( "constructor end" );
+  }
+
+  ~NativeSerial()
+  {
+note( "destructor begin" );
+    close();
+note( "destructor end" );
+  }
+
+  void close()
+  {
+note( "close begin" );
+//std::cout << "NativeSerial_linux close fd=" << m_fd << std::endl;
+    if( m_fd != -1 )
+    {
+      cancelWait();
+      struct timeval tv = { tv_sec:0, tv_usec:1100 };
+      select( 0, NULL, NULL, NULL, &tv );
+      ::close( m_fd );
+      m_fd = -1;
+    }
+note( "close end" );
+  }
+
+  static std::string getTOSCommMap()
+  {
+    const char* env = getenv( "TOSCOMMMAP" );
+    return (env == NULL) ? "com1=/dev/ttyS0:usb1=/dev/ttyUSB0" : env;
+  }
+};
+
+
+#include "TOSComm_wrap.cxx"
+
diff --git a/tools/tinyos/java/serial/NativeSerial_win32.cpp b/tools/tinyos/java/serial/NativeSerial_win32.cpp
new file mode 100644
index 00000000..c545a0cd
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial_win32.cpp
@@ -0,0 +1,415 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "NativeSerialEnums.h"
+using namespace NativeSerialEnums;
+
+
+class comm_port_error : public std::runtime_error
+{
+  public:
+    comm_port_error( const char* msg ): std::runtime_error(msg) { }
+};
+
+
+class W32Overlapped
+{
+public:
+  OVERLAPPED o;
+
+  W32Overlapped()
+  {
+    o.hEvent = CreateEvent( NULL, FALSE, FALSE, NULL );
+    o.Internal = 0;
+    o.InternalHigh = 0;
+    o.Offset = 0;
+    o.OffsetHigh = 0;
+    if( o.hEvent == NULL )
+      throw comm_port_error("could not create Overlapped event");
+  }
+
+  ~W32Overlapped()
+  {
+    if( o.hEvent != NULL )
+      CloseHandle( o.hEvent );
+  }
+};
+
+
+class NativeSerial
+{
+private:
+
+  HANDLE hComm;
+  W32Overlapped oread;
+  W32Overlapped owrite;
+  W32Overlapped owait;
+  W32Overlapped oavail;
+
+  std::string m_portname;
+  int m_events_in;
+  int m_events_out;
+  bool m_dtr;
+  bool m_rts;
+
+protected:
+
+  void test_comm_success( bool success, const char* extra_msg )
+  {
+    if( !success )
+    {
+      DWORD err = GetLastError();
+      std::ostringstream os;
+      char msg[1024];
+      FormatMessage( FORMAT_MESSAGE_FROM_SYSTEM, NULL, err, 0, msg, sizeof(msg), NULL );
+      os << "Error " << err << ".\n   " << msg;
+      if( extra_msg != NULL ) { os << "   in " << extra_msg; }
+      throw comm_port_error(os.str().c_str());
+    }
+  }
+
+  DCB get_comm_state()
+  {
+    DCB dcb;
+    test_comm_success( GetCommState( hComm, &dcb ), "get_comm_state.GetCommState" );
+    return dcb;
+  }
+
+  DWORD get_modem_status()
+  {
+    DWORD status = 0;
+    test_comm_success( GetCommModemStatus( hComm, &status ), "get_modem_stauts.GetCommModemStatus" );
+    return status;
+  }
+
+  static DWORD map_events_to_win32( int event )
+  {
+    DWORD ev = 0;
+    if( event & DATA_AVAILABLE ) ev |= EV_RXCHAR;
+    if( event & OUTPUT_EMPTY ) ev |= EV_TXEMPTY;
+    if( event & CTS ) ev |= EV_CTS;
+    if( event & DSR ) ev |= EV_DSR;
+    if( event & RING_INDICATOR ) ev |= EV_RING;
+    if( event & CARRIER_DETECT ) ev |= EV_RLSD;
+    if( event & OVERRUN_ERROR ) ev |= EV_ERR;
+    if( event & PARITY_ERROR ) ev |= EV_ERR;
+    if( event & FRAMING_ERROR ) ev |= EV_ERR;
+    if( event & BREAK_INTERRUPT ) ev |= EV_BREAK;
+    return ev;
+  }
+
+  static int map_events_from_win32( DWORD ev, DWORD errors )
+  {
+    int event = 0;
+    if( ev & EV_RXCHAR ) event |= DATA_AVAILABLE;
+    if( ev & EV_TXEMPTY ) event |= OUTPUT_EMPTY;
+    if( ev & EV_CTS ) event |= CTS;
+    if( ev & EV_DSR ) event |= DSR;
+    if( ev & EV_RING ) event |= RING_INDICATOR;
+    if( ev & EV_RLSD ) event |= CARRIER_DETECT;
+    if( ev & EV_ERR )
+    {
+      if( errors & CE_BREAK ) event |= BREAK_INTERRUPT;
+      if( errors & CE_FRAME ) event |= FRAMING_ERROR;
+      if( errors & CE_IOE ) throw comm_port_error("Win32 Comm IO Error");
+      if( errors & CE_MODE ) throw comm_port_error("Win32 Comm Invalid Mode");
+      if( errors & CE_OVERRUN ) event |= OVERRUN_ERROR;
+      if( errors & CE_RXOVER ) event |= OVERRUN_ERROR; //?? okay
+      if( errors & CE_RXPARITY ) event |= PARITY_ERROR;
+      if( errors & CE_TXFULL ) event |= OVERRUN_ERROR; //?? okay
+    }
+    if( ev & EV_BREAK ) event |= BREAK_INTERRUPT;
+    return event;
+  }
+
+public:
+
+  void setSerialPortParams( int baudrate, int databits, int stopbits, bool parity )
+  {
+    DCB dcb = get_comm_state();
+    dcb.BaudRate = baudrate;
+    dcb.ByteSize = databits;
+    switch( stopbits )
+    {
+      case 0: dcb.StopBits = ONE5STOPBITS; break;
+      case 2: dcb.StopBits = TWOSTOPBITS; break;
+      default: dcb.StopBits = ONESTOPBIT;
+    }
+    dcb.Parity = (parity ? 1 : 0);
+    test_comm_success( SetCommState( hComm, &dcb ), "set_params.SetCommState" );
+  }
+
+  int getBaudRate()
+  {
+    int baud_rate = get_comm_state().BaudRate;
+    switch( baud_rate )
+    {
+      case CBR_110:    return 110;
+      case CBR_300:    return 300;
+      case CBR_600:    return 600;
+      case CBR_1200:   return 1200;
+      case CBR_2400:   return 2400;
+      case CBR_4800:   return 4800;
+      case CBR_9600:   return 9600;
+      case CBR_14400:  return 14400;
+      case CBR_19200:  return 19200;
+      case CBR_38400:  return 38400;
+      case CBR_56000:  return 56000;
+      case CBR_57600:  return 57600;
+      case CBR_115200: return 115200;
+      case CBR_128000: return 128000;
+      case CBR_256000: return 256000;
+    }
+    return baud_rate;
+  }
+
+  int getDataBits()
+  {
+    return get_comm_state().ByteSize;
+  }
+
+  int getStopBits()
+  {
+    switch( get_comm_state().StopBits )
+    {
+      case ONESTOPBIT: return 0;
+      case ONE5STOPBITS: return 1;
+      case TWOSTOPBITS: return 2;
+    }
+    return 0;
+  }
+
+  bool getParity()
+  {
+    return (get_comm_state().fParity != 0);
+  }
+
+  int read( signed char* buffer, int off, int len )
+  {
+    DWORD nread = 0;
+    if( !ReadFile( hComm, buffer+off, len, &nread, &oread.o ) )
+    {
+      test_comm_success( GetLastError() == ERROR_IO_PENDING, "read.WriteFile" );
+      DWORD rvwait = WaitForSingleObject(oread.o.hEvent,INFINITE);
+      test_comm_success( rvwait != WAIT_FAILED, "read.WaitForSingleObject" );
+      if( rvwait != WAIT_OBJECT_0 )
+	return 0;
+      test_comm_success( GetOverlappedResult(hComm,&oread.o,&nread,TRUE), "read.GetOverlappedresult" );
+    }
+    return nread;
+  }
+
+  int write( const signed char* buffer, int off, int len )
+  {
+    DWORD nread = 0;
+    DWORD nwritten = 0;
+    if( !WriteFile( hComm, buffer+off, len, &nwritten, &owrite.o ) )
+    {
+      test_comm_success( GetLastError() == ERROR_IO_PENDING, "write.WriteFile" );
+      DWORD rvwait = WaitForSingleObject(owrite.o.hEvent,INFINITE);
+      test_comm_success( rvwait != WAIT_FAILED, "write.WaitForSingleObject" );
+      if( rvwait != WAIT_OBJECT_0 )
+	return 0;
+      test_comm_success( GetOverlappedResult(hComm,&owrite.o,&nwritten,TRUE), "write.GetOverlappedresult" );
+    }
+    return nwritten;
+  }
+
+  int read()
+  {
+    signed char byte;
+    return (read(&byte,0,1) > 0) ? ((unsigned char)byte) : -1;
+  }
+
+  int write( int b )
+  {
+    signed char byte = b;
+    return write( &byte, 0, 1 );
+  }
+
+  int available()
+  {
+    COMSTAT cs;
+    DWORD errors = 0;
+    test_comm_success( ClearCommError( hComm, &errors, &cs ), "available.ClearCommError" );
+    return cs.cbInQue;
+  }
+
+  void notifyOn( int event, bool enable )
+  {
+    if( enable )
+      m_events_in |= event;
+    else
+      m_events_in &= ~event;
+    test_comm_success( SetEvent( owait.o.hEvent ), "enable_event.SetEvent" );
+  }
+
+  bool isNotifyOn( int event )
+  {
+    return (m_events_in & event) != 0;
+  }
+
+  bool waitForEvent()
+  {
+    DWORD evMaskIn = map_events_to_win32( m_events_in );
+    DWORD evMaskOut = 0;
+    m_events_out = 0;
+    if( evMaskIn != 0 )
+    {
+      test_comm_success( SetCommMask( hComm, evMaskIn ), "wait_for_event.SetCommMask" );
+      if( !WaitCommEvent(hComm,&evMaskOut,&owait.o) )
+      {
+	DWORD nbytes = 0;
+	test_comm_success( GetLastError() == ERROR_IO_PENDING, "wait_for_event.WaitCommEvent" );
+	DWORD rvwait = WaitForSingleObject(owait.o.hEvent,INFINITE);
+	test_comm_success( rvwait != WAIT_FAILED, "wait_for_event.WaitForSingleObject" );
+	if( rvwait != WAIT_OBJECT_0 )
+	  return 0;
+	test_comm_success( GetOverlappedResult(hComm,&owait.o,&nbytes,TRUE), "write.GetOverlappedresult" );
+      }
+      //evMaskOut &= evMaskIn;
+      DWORD errors = 0;
+      test_comm_success( ClearCommError( hComm, &errors, NULL ), "wait_for_event.ClearCommError" );
+      m_events_out = map_events_from_win32( evMaskOut, errors );
+    }
+    else
+    {
+      test_comm_success( ResetEvent( owait.o.hEvent ), "wait_for_event.ResetEvent" );
+      DWORD rvwait = WaitForSingleObject( owait.o.hEvent, INFINITE );
+      test_comm_success( rvwait != WAIT_FAILED, "wait_for_event.WaitForSingleObject" );
+    }
+    return (m_events_out != 0);
+  }
+
+  bool cancelWait()
+  {
+    test_comm_success( SetEvent( owait.o.hEvent ), "cancel_wait.SetEvent" );
+    return true;
+  }
+
+  bool didEventOccur( int event )
+  {
+    return (m_events_out & event) != 0;
+  }
+
+  void setDTR( bool high )
+  {
+    test_comm_success( EscapeCommFunction( hComm, (high ? SETDTR : CLRDTR) ), "setDTR.EscapeCommFunction" );
+    m_dtr = high;
+  }
+
+  void setRTS( bool high )
+  {
+    test_comm_success( EscapeCommFunction( hComm, (high ? SETRTS : CLRRTS) ), "setRTS.EscapeCommFunction" );
+    m_rts = high;
+  }
+
+  bool isDTR()
+  {
+    return m_dtr;
+  }
+
+  bool isRTS()
+  {
+    return m_rts;
+  }
+
+  bool isCTS()
+  {
+    return (get_modem_status() & MS_CTS_ON) != 0;
+  }
+
+  bool isDSR()
+  {
+    return (get_modem_status() & MS_DSR_ON) != 0;
+  }
+
+  bool isRI()
+  {
+    return (get_modem_status() & MS_RING_ON) != 0;
+  }
+
+  bool isCD()
+  {
+    return (get_modem_status() & MS_RLSD_ON) != 0;
+  }
+
+  void sendBreak( int millis )
+  {
+  }
+
+  NativeSerial( const char* portname ):
+    m_events_in(0), 
+    m_events_out(0),
+    m_dtr(false),
+    m_rts(false)
+  {
+    hComm = CreateFile( portname,
+      GENERIC_READ | GENERIC_WRITE,
+      0,  // exclusive access
+      NULL,  // default security attributes
+      OPEN_EXISTING,
+      FILE_FLAG_OVERLAPPED,
+      NULL
+    );
+
+    test_comm_success( hComm != INVALID_HANDLE_VALUE, "NativeSerialPort.CreateFile" );
+
+    setDTR(false);
+    setRTS(false);
+
+    DWORD errors;
+    test_comm_success( PurgeComm( hComm, PURGE_TXABORT | PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR ), "NativeSerialPort.PurgeComm" );
+    test_comm_success( ClearCommError( hComm, &errors, NULL ), "NativeSerialPort.ClearCommErrors" );
+  }
+
+  ~NativeSerial()
+  {
+    close();
+  }
+
+  void close()
+  {
+    CloseHandle( hComm );
+    SetEvent( oread.o.hEvent );
+    SetEvent( owrite.o.hEvent );
+    SetEvent( owait.o.hEvent );
+    SetEvent( oavail.o.hEvent );
+  }
+
+  static std::string getTOSCommMap()
+  {
+    const char* env = getenv( "TOSCOMMMAP" );
+    return (env == NULL) ? "com1=COM1:com10=\\\\.\\COM10" : env;
+  }
+};
+
+
+#include "TOSComm_wrap.cxx"
+
diff --git a/tools/tinyos/java/serial/TOSComm.i b/tools/tinyos/java/serial/TOSComm.i
new file mode 100644
index 00000000..bc7e40cb
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm.i
@@ -0,0 +1,49 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+%module TOSComm
+
+%{
+%}
+
+%include "arrays_java.i";
+%include "std_string.i";
+
+%pragma(java) jniclasscode=%{
+  static { TOSCommLibraryLoader.load(); }
+%}
+
+%exception {
+  try {
+    $action
+  } catch (comm_port_error &e) {
+    jclass clazz = jenv->FindClass("java/lang/Exception");
+    std::string s = "TOSComm JNI library runtime error: ";
+    s += + e.what();
+    jenv->ThrowNew( clazz, s.c_str() );
+    return $null;
+  }
+}
+
+%include "NativeSerial.h"
diff --git a/tools/tinyos/java/serial/TOSComm_wrap.cxx b/tools/tinyos/java/serial/TOSComm_wrap.cxx
new file mode 100644
index 00000000..e6b6b4c9
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm_wrap.cxx
@@ -0,0 +1,1488 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.21
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+
+#ifdef __cplusplus
+template class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper& rhs);
+};                                                    
+#endif
+
+
+#if defined(__GNUC__)
+//    typedef long long __int64; /*For gcc on Windows */
+#endif
+#include 
+#include 
+#include 
+
+
+/* Support for throwing Java exceptions */
+typedef enum {
+  SWIG_JavaOutOfMemoryError = 1, 
+  SWIG_JavaIOException, 
+  SWIG_JavaRuntimeException, 
+  SWIG_JavaIndexOutOfBoundsException,
+  SWIG_JavaArithmeticException,
+  SWIG_JavaIllegalArgumentException,
+  SWIG_JavaNullPointerException,
+  SWIG_JavaDirectorPureVirtual,
+  SWIG_JavaUnknownError
+} SWIG_JavaExceptionCodes;
+
+typedef struct {
+  SWIG_JavaExceptionCodes code;
+  const char *java_exception;
+} SWIG_JavaExceptions_t;
+
+
+static void SWIG_JavaThrowException(JNIEnv *jenv, SWIG_JavaExceptionCodes code, const char *msg) {
+  jclass excep;
+  static const SWIG_JavaExceptions_t java_exceptions[] = {
+    { SWIG_JavaOutOfMemoryError, "java/lang/OutOfMemoryError" },
+    { SWIG_JavaIOException, "java/io/IOException" },
+    { SWIG_JavaRuntimeException, "java/lang/RuntimeException" },
+    { SWIG_JavaIndexOutOfBoundsException, "java/lang/IndexOutOfBoundsException" },
+    { SWIG_JavaArithmeticException, "java/lang/ArithmeticException" },
+    { SWIG_JavaIllegalArgumentException, "java/lang/IllegalArgumentException" },
+    { SWIG_JavaNullPointerException, "java/lang/NullPointerException" },
+    { SWIG_JavaDirectorPureVirtual, "java/lang/RuntimeException" },
+    { SWIG_JavaUnknownError,  "java/lang/UnknownError" },
+    { (SWIG_JavaExceptionCodes)0,  "java/lang/UnknownError" } };
+  const SWIG_JavaExceptions_t *except_ptr = java_exceptions;
+
+  while (except_ptr->code != code && except_ptr->code)
+    except_ptr++;
+
+  jenv->ExceptionClear();
+  excep = jenv->FindClass(except_ptr->java_exception);
+  if (excep)
+    jenv->ThrowNew(excep, msg);
+}
+
+
+/* Contract support */
+
+#define SWIG_contract_assert(nullreturn, expr, msg) if (!(expr)) {SWIG_JavaThrowException(jenv, SWIG_JavaIllegalArgumentException, msg); return nullreturn; } else
+
+
+
+
+#if defined(SWIG_NOINCLUDE) || defined(SWIG_NOARRAYS)
+
+
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input);
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input);
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz);
+
+
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input);
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input);
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz);
+
+
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input);
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz);
+
+
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input);
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz);
+
+
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input);
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input);
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz);
+
+
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input);
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input);
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz);
+
+
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz);
+
+
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input);
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input);
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz);
+
+
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz);
+
+
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input);
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz);
+
+
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input);
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input);
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz);
+
+
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input);
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input);
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz);
+
+
+#else
+
+
+/* bool[] support */
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetBooleanArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new bool[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseBooleanArrayElements(input, jarr, 0);
+}
+
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz) {
+  jboolean *arr;
+  int i;
+  jbooleanArray jresult = jenv->NewBooleanArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetBooleanArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseBooleanArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* signed char[] support */
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetByteArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new signed char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseByteArrayElements(input, jarr, 0);
+}
+
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz) {
+  jbyte *arr;
+  int i;
+  jbyteArray jresult = jenv->NewByteArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetByteArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseByteArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned char[] support */
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* short[] support */
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned short[] support */
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* int[] support */
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned int[] support */
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* long[] support */
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned long[] support */
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* jlong[] support */
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new jlong[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* float[] support */
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetFloatArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new float[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseFloatArrayElements(input, jarr, 0);
+}
+
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz) {
+  jfloat *arr;
+  int i;
+  jfloatArray jresult = jenv->NewFloatArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetFloatArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseFloatArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* double[] support */
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetDoubleArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new double[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseDoubleArrayElements(input, jarr, 0);
+}
+
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz) {
+  jdouble *arr;
+  int i;
+  jdoubleArray jresult = jenv->NewDoubleArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetDoubleArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseDoubleArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+#endif
+
+
+#define  SWIG_MemoryError    1
+#define  SWIG_IOError        2
+#define  SWIG_RuntimeError   3
+#define  SWIG_IndexError     4
+#define  SWIG_TypeError      5
+#define  SWIG_DivisionByZero 6
+#define  SWIG_OverflowError  7
+#define  SWIG_SyntaxError    8
+#define  SWIG_ValueError     9
+#define  SWIG_SystemError   10
+#define  SWIG_UnknownError  99
+
+
+static void SWIG_JavaException(JNIEnv *jenv, int code, const char *msg) {
+  SWIG_JavaExceptionCodes exception_code = SWIG_JavaUnknownError;
+  switch(code) {
+  case SWIG_MemoryError:
+    exception_code = SWIG_JavaOutOfMemoryError;
+    break;
+  case SWIG_IOError:
+    exception_code = SWIG_JavaIOException;
+    break;
+  case SWIG_SystemError:
+  case SWIG_RuntimeError:
+    exception_code = SWIG_JavaRuntimeException;
+    break;
+  case SWIG_OverflowError:
+  case SWIG_IndexError:
+    exception_code = SWIG_JavaIndexOutOfBoundsException;
+    break;
+  case SWIG_DivisionByZero:
+    exception_code = SWIG_JavaArithmeticException;
+    break;
+  case SWIG_SyntaxError:
+  case SWIG_ValueError:
+  case SWIG_TypeError:
+    exception_code = SWIG_JavaIllegalArgumentException;
+    break;
+  case SWIG_UnknownError:
+  default:
+    exception_code = SWIG_JavaUnknownError;
+    break;
+  }
+  SWIG_JavaThrowException(jenv, exception_code, msg);
+}
+#define SWIG_exception(code, msg) { SWIG_JavaException(jenv, code, msg); }
+
+
+#include 
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setSerialPortParams(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jint jarg3, jint jarg4, jboolean jarg5) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    int arg4 ;
+    bool arg5 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    arg5 = jarg5 ? true : false; 
+    {
+        try {
+            (arg1)->setSerialPortParams(arg2,arg3,arg4,arg5);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getBaudRate(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getBaudRate();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getDataBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getDataBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getStopBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getStopBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getParity(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->getParity();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1notifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jboolean jarg3) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool arg3 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = jarg3 ? true : false; 
+    {
+        try {
+            (arg1)->notifyOn(arg2,arg3);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isNotifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->isNotifyOn(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1waitForEvent(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->waitForEvent();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1cancelWait(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->cancelWait();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1didEventOccur(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->didEventOccur(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setDTR(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setDTR(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setRTS(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setRTS(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDTR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDTR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDSR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDSR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRI(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRI();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCD(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCD();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1sendBreak(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            (arg1)->sendBreak(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jlong JNICALL Java_net_tinyos_comm_TOSCommJNI_new_1NativeSerial(JNIEnv *jenv, jclass jcls, jstring jarg1) {
+    jlong jresult = 0 ;
+    char *arg1 ;
+    NativeSerial *result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        arg1 = 0;
+        if (jarg1) {
+            arg1 = (char *)jenv->GetStringUTFChars(jarg1, 0);
+            if (!arg1) return 0;
+        }
+    }
+    {
+        try {
+            result = (NativeSerial *)new NativeSerial((char const *)arg1);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    *(NativeSerial **)&jresult = result; 
+    {
+        if (arg1) jenv->ReleaseStringUTFChars(jarg1, arg1); 
+    }
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_delete_1NativeSerial(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            delete arg1;
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1close(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            (arg1)->close();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1available(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->available();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->read();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->read(arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (int)(arg1)->write(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->write((signed char const (*))arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jstring JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getTOSCommMap(JNIEnv *jenv, jclass jcls) {
+    jstring jresult = 0 ;
+    std::string result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        try {
+            result = NativeSerial::getTOSCommMap();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = jenv->NewStringUTF((&result)->c_str()); 
+    return jresult;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx b/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx
new file mode 100644
index 00000000..e353f3b2
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx
@@ -0,0 +1,1488 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.21
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+
+#ifdef __cplusplus
+template class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper& rhs);
+};                                                    
+#endif
+
+
+#if defined(__GNUC__)
+//    typedef long long __int64; /*For gcc on Windows */
+#endif
+#include 
+#include 
+#include 
+
+
+/* Support for throwing Java exceptions */
+typedef enum {
+  SWIG_JavaOutOfMemoryError = 1, 
+  SWIG_JavaIOException, 
+  SWIG_JavaRuntimeException, 
+  SWIG_JavaIndexOutOfBoundsException,
+  SWIG_JavaArithmeticException,
+  SWIG_JavaIllegalArgumentException,
+  SWIG_JavaNullPointerException,
+  SWIG_JavaDirectorPureVirtual,
+  SWIG_JavaUnknownError
+} SWIG_JavaExceptionCodes;
+
+typedef struct {
+  SWIG_JavaExceptionCodes code;
+  const char *java_exception;
+} SWIG_JavaExceptions_t;
+
+
+static void SWIG_JavaThrowException(JNIEnv *jenv, SWIG_JavaExceptionCodes code, const char *msg) {
+  jclass excep;
+  static const SWIG_JavaExceptions_t java_exceptions[] = {
+    { SWIG_JavaOutOfMemoryError, "java/lang/OutOfMemoryError" },
+    { SWIG_JavaIOException, "java/io/IOException" },
+    { SWIG_JavaRuntimeException, "java/lang/RuntimeException" },
+    { SWIG_JavaIndexOutOfBoundsException, "java/lang/IndexOutOfBoundsException" },
+    { SWIG_JavaArithmeticException, "java/lang/ArithmeticException" },
+    { SWIG_JavaIllegalArgumentException, "java/lang/IllegalArgumentException" },
+    { SWIG_JavaNullPointerException, "java/lang/NullPointerException" },
+    { SWIG_JavaDirectorPureVirtual, "java/lang/RuntimeException" },
+    { SWIG_JavaUnknownError,  "java/lang/UnknownError" },
+    { (SWIG_JavaExceptionCodes)0,  "java/lang/UnknownError" } };
+  const SWIG_JavaExceptions_t *except_ptr = java_exceptions;
+
+  while (except_ptr->code != code && except_ptr->code)
+    except_ptr++;
+
+  jenv->ExceptionClear();
+  excep = jenv->FindClass(except_ptr->java_exception);
+  if (excep)
+    jenv->ThrowNew(excep, msg);
+}
+
+
+/* Contract support */
+
+#define SWIG_contract_assert(nullreturn, expr, msg) if (!(expr)) {SWIG_JavaThrowException(jenv, SWIG_JavaIllegalArgumentException, msg); return nullreturn; } else
+
+
+
+
+#if defined(SWIG_NOINCLUDE) || defined(SWIG_NOARRAYS)
+
+
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input);
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input);
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz);
+
+
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input);
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input);
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz);
+
+
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input);
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz);
+
+
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input);
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz);
+
+
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input);
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input);
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz);
+
+
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input);
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input);
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz);
+
+
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz);
+
+
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input);
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input);
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz);
+
+
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz);
+
+
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input);
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz);
+
+
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input);
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input);
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz);
+
+
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input);
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input);
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz);
+
+
+#else
+
+
+/* bool[] support */
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetBooleanArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new bool[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseBooleanArrayElements(input, jarr, 0);
+}
+
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz) {
+  jboolean *arr;
+  int i;
+  jbooleanArray jresult = jenv->NewBooleanArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetBooleanArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseBooleanArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* signed char[] support */
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetByteArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new signed char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseByteArrayElements(input, jarr, 0);
+}
+
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz) {
+  jbyte *arr;
+  int i;
+  jbyteArray jresult = jenv->NewByteArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetByteArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseByteArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned char[] support */
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* short[] support */
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned short[] support */
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* int[] support */
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned int[] support */
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* long[] support */
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned long[] support */
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* jlong[] support */
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new jlong[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* float[] support */
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetFloatArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new float[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseFloatArrayElements(input, jarr, 0);
+}
+
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz) {
+  jfloat *arr;
+  int i;
+  jfloatArray jresult = jenv->NewFloatArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetFloatArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseFloatArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* double[] support */
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetDoubleArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new double[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; iGetArrayLength(input);
+  for (i=0; iReleaseDoubleArrayElements(input, jarr, 0);
+}
+
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz) {
+  jdouble *arr;
+  int i;
+  jdoubleArray jresult = jenv->NewDoubleArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetDoubleArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; iReleaseDoubleArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+#endif
+
+
+#define  SWIG_MemoryError    1
+#define  SWIG_IOError        2
+#define  SWIG_RuntimeError   3
+#define  SWIG_IndexError     4
+#define  SWIG_TypeError      5
+#define  SWIG_DivisionByZero 6
+#define  SWIG_OverflowError  7
+#define  SWIG_SyntaxError    8
+#define  SWIG_ValueError     9
+#define  SWIG_SystemError   10
+#define  SWIG_UnknownError  99
+
+
+static void SWIG_JavaException(JNIEnv *jenv, int code, const char *msg) {
+  SWIG_JavaExceptionCodes exception_code = SWIG_JavaUnknownError;
+  switch(code) {
+  case SWIG_MemoryError:
+    exception_code = SWIG_JavaOutOfMemoryError;
+    break;
+  case SWIG_IOError:
+    exception_code = SWIG_JavaIOException;
+    break;
+  case SWIG_SystemError:
+  case SWIG_RuntimeError:
+    exception_code = SWIG_JavaRuntimeException;
+    break;
+  case SWIG_OverflowError:
+  case SWIG_IndexError:
+    exception_code = SWIG_JavaIndexOutOfBoundsException;
+    break;
+  case SWIG_DivisionByZero:
+    exception_code = SWIG_JavaArithmeticException;
+    break;
+  case SWIG_SyntaxError:
+  case SWIG_ValueError:
+  case SWIG_TypeError:
+    exception_code = SWIG_JavaIllegalArgumentException;
+    break;
+  case SWIG_UnknownError:
+  default:
+    exception_code = SWIG_JavaUnknownError;
+    break;
+  }
+  SWIG_JavaThrowException(jenv, exception_code, msg);
+}
+#define SWIG_exception(code, msg) { SWIG_JavaException(jenv, code, msg); }
+
+
+#include 
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setSerialPortParams(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jint jarg3, jint jarg4, jboolean jarg5) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    int arg4 ;
+    bool arg5 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    arg5 = jarg5 ? true : false; 
+    {
+        try {
+            (arg1)->setSerialPortParams(arg2,arg3,arg4,arg5);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getBaudRate(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getBaudRate();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getDataBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getDataBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getStopBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getStopBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getParity(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->getParity();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1notifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jboolean jarg3) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool arg3 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = jarg3 ? true : false; 
+    {
+        try {
+            (arg1)->notifyOn(arg2,arg3);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isNotifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->isNotifyOn(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1waitForEvent(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->waitForEvent();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1cancelWait(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->cancelWait();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1didEventOccur(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->didEventOccur(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setDTR(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setDTR(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setRTS(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setRTS(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDTR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDTR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDSR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDSR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRI(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRI();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCD(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCD();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1sendBreak(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            (arg1)->sendBreak(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jlong JNICALL _Java_net_tinyos_comm_TOSCommJNI_new_1NativeSerial(JNIEnv *jenv, jclass jcls, jstring jarg1) {
+    jlong jresult = 0 ;
+    char *arg1 ;
+    NativeSerial *result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        arg1 = 0;
+        if (jarg1) {
+            arg1 = (char *)jenv->GetStringUTFChars(jarg1, 0);
+            if (!arg1) return 0;
+        }
+    }
+    {
+        try {
+            result = (NativeSerial *)new NativeSerial((char const *)arg1);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    *(NativeSerial **)&jresult = result; 
+    {
+        if (arg1) jenv->ReleaseStringUTFChars(jarg1, arg1); 
+    }
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_delete_1NativeSerial(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            delete arg1;
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1close(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            (arg1)->close();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1available(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->available();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->read();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->read(arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (int)(arg1)->write(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->write((signed char const (*))arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jstring JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getTOSCommMap(JNIEnv *jenv, jclass jcls) {
+    jstring jresult = 0 ;
+    std::string result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        try {
+            result = NativeSerial::getTOSCommMap();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = jenv->NewStringUTF((&result)->c_str()); 
+    return jresult;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/tools/tinyos/java/serial/reswig b/tools/tinyos/java/serial/reswig
new file mode 100755
index 00000000..ebe77f20
--- /dev/null
+++ b/tools/tinyos/java/serial/reswig
@@ -0,0 +1,5 @@
+#!/bin/sh
+swig -java -package net.tinyos.comm -c++ TOSComm.i
+perl -pe 's{^}{//} if /For gcc on Windows/; s/\b(JNICALL) (Java_)/$1 _$2/' TOSComm_wrap.cxx >TOSComm_wrap_win32.cxx
+rm TOSComm.java
+mv *.java ../../../../support/sdk/java/net/tinyos/comm
diff --git a/tools/tinyos/misc/.cvsignore b/tools/tinyos/misc/.cvsignore
new file mode 100644
index 00000000..f59b801d
--- /dev/null
+++ b/tools/tinyos/misc/.cvsignore
@@ -0,0 +1,10 @@
+Makefile
+Makefile.in
+.deps
+tos-ident-flags
+tos-install-jni
+tos-serial-debug
+tos-set-symbols
+tos-write-image
+tos-storage-at45db
+tos-storage-stm25p
diff --git a/tools/tinyos/misc/Makefile.am b/tools/tinyos/misc/Makefile.am
new file mode 100644
index 00000000..1f02a021
--- /dev/null
+++ b/tools/tinyos/misc/Makefile.am
@@ -0,0 +1,28 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tos-check-env.1 	\
+		tos-ident-flags.1	\
+                tos-install-jni.1	\
+                tos-locate-jre.1	\
+                tos-mote-key.1		\
+                tos-serial-configure.1	\
+                tos-serial-debug.1	\
+                tos-set-symbols.1	\
+                tos-storage-at45db.1	\
+                tos-storage-stm25p.1	\
+                tos-write-image.1
+
+
+bin_SCRIPTS = tos-ident-flags \
+	      tos-install-jni \
+	      tos-locate-jre \
+	      tos-mote-key \
+	      tos-serial-configure \
+	      tos-set-symbols \
+	      tos-write-image \
+	      tos-check-env \
+	      tos-storage-stm25p \
+	      tos-storage-at45db
+	      
+
+bin_PROGRAMS = tos-serial-debug
diff --git a/tools/tinyos/misc/tos-check-env b/tools/tinyos/misc/tos-check-env
new file mode 100755
index 00000000..86a02482
--- /dev/null
+++ b/tools/tinyos/misc/tos-check-env
@@ -0,0 +1,586 @@
+#!/usr/bin/perl -w
+#
+# $Id$ 
+#
+
+
+sub which {
+    my ($cmd, $found, $warning);
+    $cmd = $_[0]; 
+    $pw = $_[1]; # do we print a warning or not?
+    open WHICH, "which $cmd 2>&1 |" or die "could not which $cmd: something is very wrong";
+    while () {
+	if (/which: no $cmd/ || /^no $cmd/ || /^$cmd: Command not found/) { 
+	    if ($pw) {
+		$warning = "--> WARNING: No $cmd in current path.\n";
+		print "\n$warning"; 
+		$errorstr .= "$warning";
+		$errors = 1;
+	    }
+	    $found = 0;
+	} else {
+	    print "\t$_";
+	    $found = 1;
+	}
+    }
+    close WHICH;
+    return $found;
+}
+
+sub is_windows() {
+    return 1 if (grep { /cygwin/i } `uname`);
+    return 0;
+}
+
+sub chk_uisp() {
+    my $found;
+    my $version = "20050519tinyos";
+    my $versionok = 0;
+    print "uisp:\n";
+    $found = which("uisp", 1);
+    if ($found) {
+	open UISP, "uisp --version 2>&1 |" or die "could not execute uisp --version: is it in your PATH?";
+	while () {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /20050519tinyos/;
+	    }
+	}
+	close UISP;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The uisp version found by $program is not $version. " .
+		"Please update your uisp version. The source for uisp version $version " .
+		"can be found in the tinyos-tools 1.2 rpm.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	$warning = "--> WARNING: $program couldn't find the uisp program. Uisp is used to " . 
+	    "program the motes. Please install uisp version $version which can be found " .
+	    " in the tinyos-tools 1.2 rpm.\n";
+	
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_cygwin() {
+    my $system;
+    return if !is_windows();
+    print "Cygwin:\n";
+    open CYGCHECK, "cygcheck -s 2>&1 |" or die "could not execute cygcheck -s";
+    while () {
+	print "\t$_";;
+    }
+    print "\n";
+}
+
+#
+# Look for the phrase 'version 1.4' or 'version 1.5' in the first line
+#
+sub chk_java() {
+    my $found;
+    my $versionok = 0;
+    print "java:\n";
+    $found = which("java", 1);
+    if ($found) {
+	open JAVA, "java -version 2>&1 |" or die "could not execute java -version: is it in your PATH?\n";
+	while () {
+	    if ($_ =~ /version \"1\.[45]/) {
+		print "\t$_";
+		$versionok = 1;
+	    }
+	}
+	close JAVA;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The JAVA version found first by $program may not be version 1.4 or version 1.5" .
+		"one of which is required by TOS. Please " .
+		"ensure that the located Java version is 1.4 or 1.5\n";
+	    if (is_windows()) {
+		$warning .= "Depending on your PATH environment variable, there is often another " .
+		    " version of java.exe in c:\\windows\\system32 that is " .
+		    "\"seen\" first. Check that this is version 1.4 or 1.5 or reconfigure your PATH " .
+		    "environment variable if this is the case.\n";
+	    }
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+
+    } else {
+	$errors = 1;
+    }
+    print "\n";
+};
+
+sub chk_perl() {
+    my $found;
+    print "perl:\n";
+    $found = which("perl", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open PERL, "perl --version 2>&1 |" or die "could not execute perl --version: is it in your PATH?\n";
+	while () {
+	    print $1 if /(v[\d|\.]+.*$)/;
+	}
+	close PERL;
+    } else {
+	$errors = 1;
+    }
+    print "\n\n";
+};
+
+sub chk_lex {
+    my $found;
+    print "flex:\n";
+    which("flex", 1);
+    print "\n";
+}
+
+sub chk_yacc {
+    my $found;
+    print "bison:\n";
+    which("bison", 1);
+    print "\n";
+}
+
+sub chk_nesc {
+    my $found;
+    my $nescversion = ">=1.2.4";
+    print "nesc:\n";
+    $found = which("nescc", 1);
+    if ($found ne "") {
+	print "\tVersion: ";
+	open NESC, "nescc --version 2>&1 |" or die "could not execute nescc --version: is it in your PATH?\n";
+	while () {
+	    if (/nescc:/) {
+		print $_;
+		$versionok = 1 if /1\.2/;
+	    } elsif (/Unknown target /) {
+		$warning = "--> WARNING: nescc (nesc) was found, but the version could " .
+		    "not be verified. Verify that the ncc version that you have is $nescversion " .
+		    "by running nescc --version. If you get an error regarding platforms, " .
+		    "please see the TinyOS FAQ for help: www.tinyos.net/faq.html\n";
+		print "\n$warning";
+		$errorstr .= $warning;
+		$errors = 1;
+	    }
+	}
+	close NESC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The nescc found by $program is not $nescversion. " .
+		"Please update your nesc version to $nescversion.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: nescc not found. Please install nesc $nescversion.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_avrgcc {
+    my $found;
+    my $version = "3.4.3";
+    print "avr-gcc:\n";
+    $found = which("avr-gcc", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open AVRGCC, "avr-gcc --version 2>&1 |" or die "couldn't execute avr-gcc --version: is it in your PATH?\n";
+	while () {
+	    if (/avr-gcc/) {
+		print "$_";
+		$versionok = 1 if /3\.4\.3/;
+	    }
+	}
+	close AVRGCC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-gcc found by $program is not $version. " .
+		"Please update your avr-gcc compiler to $version.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: avr-gcc not found.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_mspgcc {
+    my $found;
+    print "msp430-gcc:\n";
+    $found = which("msp430-gcc", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open MSPGCC, "msp430-gcc --version 2>&1 |" or die "couldn't execute msp430-gcc --version: is it in your PATH?\n";
+	while () {
+	    if (/msp430-gcc/) {
+		print "$_";
+		$versionok = 1 if /3\.2\.3/;
+	    }
+	}
+	close MSPGCC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The msp430-gcc found by $program is not 3.2.3. " .
+		"If you intend to use any msp430 platforms (such as tmote), " .
+		"please update your msp430-gcc compiler to 3.2.3.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: msp430-gcc not found. Won't be able to " .
+	    "compile to any msp430 platforms (tmote).\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_mspas {
+    my $found;
+    my $version = "2.16";
+    print "msp430-as:\n";
+    $found = which("msp430-as", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open MSPAS, "msp430-as --version 2>&1 |" or die "couldn't execute msp430-as --version: is it in your PATH?\n";
+	while () {
+	    if (/GNU assembler/) {
+		print "$_";
+		$versionok = 1 if /2\.16/;
+	    }
+	}
+	close MSPAS;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The msp430-as found by $program is not $version. " .
+		"If you intend to use any msp430 platforms (such as tmote), " .
+		"please update your msp430 binutils to $version.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: msp430-as not found. Won't be able to " .
+	    "compile to any msp430 platforms (tmote).\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_path {
+    my @dirs;
+    print "Path:\n";
+    if (exists $ENV{PATH}) {
+	@dirs = split /:/, $ENV{PATH};
+	foreach $dir (@dirs) {
+	    print "\t$dir\n"
+	}
+	
+    } else {
+	my $warning = "--> WARNING: PATH environment variable doesn't exist.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+#
+# - should include $TOSROOT/support/sdk/java/tinyos.jar
+#   (we look for just support/sdk/java/tinyos.jar)
+# - '.' is recommended
+# 
+sub chk_classpath {
+    my @dirs;
+    my $warning; 
+    my $tosjarfound = 0;
+    my $dotfound = 0;
+    my $tosjarpath = "";
+    print "Classpath:\n";
+    if (exists $ENV{CLASSPATH}) {
+	$tosjarpath="$ENV{TOSROOT}/support/sdk/java/tinyos.jar";
+	if (is_windows()) {
+	    open CYGPATH, "cygpath -w $tosjarpath 2>&1 |" or die "couldn't execute cygpath: it is not PATH.";
+	    while () {
+		$tosjarpath = $_;
+	    }
+	    close CYGPATH;
+	    $separator = ';';
+	} else {
+	    $separator = ':';
+	}
+	@dirs = split /$separator/, $ENV{CLASSPATH};
+	foreach $dir (@dirs) {
+	    print "\t$dir\n";
+	    if ($dir =~ /[\\\/]support[\\\/]sdk[\\\/]java[\\\/]tinyos\.jar/) {
+		$tosjarfound = 1;
+	    }
+	    if ($dir =~ /^\.$/) {
+		$dotfound = 1;
+	    }
+	}
+	print "\n";
+	if ($tosjarfound == 0) {
+	    $warning = "--> WARNING: CLASSPATH may not include $tosjarpath. " . 
+		          "Please ensure that $tosjarpath is in your CLASSPATH or you may " .
+			      "experience configuration problems\n";
+	    print "$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+	if ($dotfound == 0) {
+	    $warning = "--> WARNING: CLASSPATH may not include '.' (that is, " .
+		          " the symbol for the current working directory). Please add " .
+		              "'.' to your CLASSPATH or you may " .
+			          "experience configuration problems.\n";
+	    print "$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: CLASSPATH environment variable doesn't exist.\n" .
+	                 "Your classpath should contain $tosjarpath and a pointer \n" .
+			 "to the cwd (a dot)\n";
+ 
+	print "$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+# List the rpms 
+sub chk_rpms {
+    my $found;
+    print "rpms:\n";
+    $found = which("rpm", 0);
+    if ($found) {
+	open RPM, "rpm -qa 2>&1 |" or die "couldn't execute rpm: is it in your PATH?\n";
+	while () {
+	    if (/avr/ || /tinyos/ || /nesc/ || /avarice/ || /msp430/ || /make/ || /xscale/ ) {
+		print "\t$_";
+	    }
+	}
+    }
+    print "\n\n";
+}
+
+sub chk_graphviz {
+    my $found;
+    my $versionok = 0;
+    print "graphviz:\n";
+    $found = which("dot", 1);
+    if ($found) {
+	open GRAPHVIZ, "dot -V 2>&1 |" or die "couldn't execute dot -V to check graphviz: is it in your PATH?\n";
+	while () {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /1\.10/;
+	    }
+	}
+	close GRAPHVIZ;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The graphviz (dot) version found by $program is not 1.10. " .
+		"Please update your graphviz version if you'd like to use the nescdoc " .
+		"documentation generator.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	$warning = "--> WARNING: $program could not find the 'dot' executable which is part " .
+	    "of the AT&T Graphviz package. Please install version 1.1.0 of Graphviz if you'd " .
+	    "like to use the nescdoc documentation generator. If Graphviz is already installed, ".
+	     "then dot may not be in your PATH.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_avarice {
+    my $found;
+    my $version="2.3.20041206";
+    my $versionok = 0;
+    print "avarice:\n";
+    $found = which("avarice", 0);
+    if ($found) {
+	open AVARICE, "avarice --version 2>&1 |" or die "could not execute avarice --version: is it in your PATH?\n";
+	while () {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /2\.4/;
+	    }
+	}
+	close AVARICE;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avarice version found by $program is not $version. " .
+		"Please update your avarice version.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    }
+    print "\n";
+}
+
+sub chk_avras {
+    my $found = 0;
+    my $version = "2.15";
+    my $versionok = 0;
+    print "avr-as:\n";
+    $found = which("avr-as", 1);
+    if ($found) {
+	open AVRAS, "avr-as --version 2>&1 |" or die "could not execute avr-as --version: is it in your PATH?\n";
+	while () {
+	    if (/GNU assembler/) {
+		print "\t$_";
+		$versionok = 1 if /2\.15/;
+	    }
+	}
+	close AVRAS;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-as version found by $program is not $version " .
+		"Please update your avr-as version by updating your avr-binutils package.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: Couldn't find avr-as. Please install avr-binutils " .
+	    "version $version \n";
+	print "$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_avrgdb {
+    my $found;
+    my $versionok = 0;
+    print "avr-gdb:\n";
+    $found = which("avr-gdb", 0);
+    if ($found) {
+	open AVRGDB, "avr-gdb --version 2>&1 |" or die "could not execute avr-gdb --version: is it in your PATH?\n";
+	while () {
+	    if (/GNU gdb/) {
+		print "\t$_";
+		$versionok = 1 if /6\.3/;
+	    }
+	}
+	close AVRGDB;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-gdb version found by $program is not 6.3. " .
+		"Please update your avr-gdb version.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    }
+    print "\n";
+}
+
+# as of 1.2, no longer used
+sub chk_javacomm {
+    print "javax.comm:\n";
+    $ok = open TMP, ">testcomm.java";
+    $ok = $ok && print TMP "class Test { javax.comm.CommPortIdentifier x; }";
+    $ok = $ok && close TMP;
+    $ok = $ok && open JAVAC, "javac testcomm.java 2>&1 |";
+    @result =  if $ok;
+    $ok = $ok && close JAVAC;
+    unlink "testcomm.java";
+
+    if (!$ok || join('', @result) =~ /error/) {
+	$warning = "--> WARNING: Could not find the javax.comm classes.\n" .
+	    "Please ensure the java Comm API is installed correctly.\n";
+	print "$warning";
+	if ($ok) {
+	    print "Compiler output was:\n";
+	    print @result;
+	    print "\n";
+	}
+	else {
+	    print "Couldn't invoke javac on test program\n";
+	}
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    else {
+	print "\tjavax.comm ok\n"
+    }
+    print "\n";
+}
+
+$errorstr = "";
+$errors = 0;    # binary, not a counting var #
+$program = "tos-check-env";
+
+chdir "/tmp";
+
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-avr$/) {
+	    $avr = 1;
+	}
+	elsif (/^-msp$/) {
+	    $msp = 1;
+	}
+        else {
+	    print "Usage: tos-check-env [-avr][-msp]\n";
+	    exit 0;
+	}
+    }
+}
+$avr = 0 if !defined($avr);
+$msp = 0 if !defined($msp);
+
+chk_path();
+chk_classpath();
+chk_rpms();
+chk_nesc();
+chk_perl();
+chk_lex();
+chk_yacc();
+chk_java();
+chk_cygwin();
+chk_graphviz();
+if ($avr) {
+    chk_avras();
+    chk_avarice();
+    chk_avrgcc();
+    chk_avrgdb();
+    chk_uisp();
+}
+if ($msp) {
+    chk_mspgcc();
+    chk_mspas();
+}
+if ($errors) {
+    print "\n$program completed with errors:\n\n$errorstr\n";
+} else {
+    print "\n$program completed without error.\n\n";
+}
+
+__END__
diff --git a/tools/tinyos/misc/tos-check-env.1 b/tools/tinyos/misc/tos-check-env.1
new file mode 100644
index 00000000..d09af040
--- /dev/null
+++ b/tools/tinyos/misc/tos-check-env.1
@@ -0,0 +1,30 @@
+.TH tos-check-env 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-check-env - Check that your environment is properly configured for TinyOS development
+.SH SYNOPSIS
+
+\fBtos-check-env\fR [\fB-avr\fR] [\fB-msp\fR]
+.SH DESCRIPTION
+
+\fBtos-check-env\fR checks that your environment is properly configured for
+TinyOS development. The script checks for the existence of compilers, 
+java, environment variables, graphics tools for nesdoc, 
+and more, and then check that the versions and settings are adequate for
+TinyOS development. Information is printed to STDOUT for each check 
+as the checks are made. 
+
+After \fBtos-check-env\fR checks the environment, any descrepances found will 
+be printed to STDOUT along with hints on how to fix the descrepencies.
+
+\fBtos-check-env\fR takes an optional argument that specifies a specific compiler
+chain (avr or msp) to check. \fB-avr\fR will check for only the avr toolchain and
+exclude msp checks; \fB-msp\fR will check for only the msp toolchain and exclude
+avr checks. 
+
+
+
+
+
+
diff --git a/tools/tinyos/misc/tos-ident-flags.1 b/tools/tinyos/misc/tos-ident-flags.1
new file mode 100644
index 00000000..e784a95f
--- /dev/null
+++ b/tools/tinyos/misc/tos-ident-flags.1
@@ -0,0 +1,13 @@
+.TH tos-ident-flags 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-ident-flags - generate compile-time flags identifying a program build
+.SH SYNOPSIS
+
+\fBtos-ident-flags\fR \fIprogram-name\fR
+.SH DESCRIPTION
+
+\fBtos-ident-flags\fR prints a set of \fB-D\fIname\fB=\fIvalue\fR options
+that identify a build of \fIprogram-name\fR. It is used to embed build
+information in a TinyOS executable.
diff --git a/tools/tinyos/misc/tos-ident-flags.in b/tools/tinyos/misc/tos-ident-flags.in
new file mode 100644
index 00000000..730610fe
--- /dev/null
+++ b/tools/tinyos/misc/tos-ident-flags.in
@@ -0,0 +1,48 @@
+#!@pathperl@ -w
+#$Id$
+#@author Cory Sharp 
+
+use strict;
+
+my $MaxNameLength = 16;
+
+if( @ARGV != 1 ) {
+  print "usage: tos-ident-flags program_name\n";
+  exit 0;
+}
+
+my $name = $ARGV[0];
+my $time = sprintf( "0x%08x", `date +%s` );
+
+(my $whoami = `whoami`) =~ s/\s//g;
+(my $hostname = `hostname`) =~ s/\s//g;
+my $uidhash = `echo "$name$time$whoami$hostname" | sha1sum`;
+my $idhash = `echo "$whoami$hostname" | sha1sum`;
+my $uid = ($uidhash =~/^(.{8})/) ? "0x$1" : 0;
+my $id = ($idhash =~/^(.{8})/) ? "0x$1" : 0;
+
+my @defs = ();
+my $qname = "";
+if( defined $name && $name !~ /^\s*$/ ) {
+  ($qname = $name) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_PROGRAM_NAME=\\\"$qname\\\"" );
+}
+if( defined $whoami && $whoami !~ /^\s*$/ ) {
+  ($qname = $whoami) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_USER_ID=\\\"$qname\\\"" );
+}
+if( defined $hostname && $hostname !~ /^\s*$/ ) {
+  ($qname = $hostname) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_HOSTNAME=\\\"$qname\\\"" );
+}
+push( @defs, "-DIDENT_USER_HASH=${id}L" );
+push( @defs, "-DIDENT_UNIX_TIME=${time}L" );
+push( @defs, "-DIDENT_UID_HASH=${uid}L" );
+
+print join(" ",@defs) . "\n";
diff --git a/tools/tinyos/misc/tos-install-jni.1 b/tools/tinyos/misc/tos-install-jni.1
new file mode 100644
index 00000000..bdcdf349
--- /dev/null
+++ b/tools/tinyos/misc/tos-install-jni.1
@@ -0,0 +1,19 @@
+.TH tos-install-jni 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-install-jni - Install TinyOS JNI libraries
+.SH SYNOPSIS
+
+\fBtos-install-jni\fR
+.SH DESCRIPTION
+
+\fBtos-install-jni\fR install's TinyOS's JNI libraries in your Java
+installation. On Linux and other similar operating systems,
+\fBtos-install-jni\fR should be run as root. If \fBtos-install-jni\fR has
+problems (fails to find Java, or installs files in an unexpected place),
+see the \fBtos-locate-jre\fR man page for information on how your Java
+installation is located.
+.SH SEE ALSO
+
+.IR tos-locate-jre (1)
diff --git a/tools/tinyos/misc/tos-install-jni.in b/tools/tinyos/misc/tos-install-jni.in
new file mode 100644
index 00000000..505f5157
--- /dev/null
+++ b/tools/tinyos/misc/tos-install-jni.in
@@ -0,0 +1,16 @@
+#!/bin/sh
+prefix=@prefix@
+exec_prefix=@exec_prefix@
+libdir=@libdir@
+tinyoslibdir=$libdir/tinyos
+
+jni=`tos-locate-jre --jni`
+if [ $? -ne 0 ]; then
+  echo "Java not found, not installing JNI code"
+  exit 1
+fi
+echo "Installing Java JNI code in $jni ... "
+for lib in $tinyoslibdir/*.@JNISUFFIX@; do 
+  @INSTALLJNI@ $lib "$jni" || exit 1
+done
+echo "done."
diff --git a/tools/tinyos/misc/tos-locate-jre b/tools/tinyos/misc/tos-locate-jre
new file mode 100755
index 00000000..b114d2c7
--- /dev/null
+++ b/tools/tinyos/misc/tos-locate-jre
@@ -0,0 +1,127 @@
+#!/bin/sh
+# This script attempts to locate the jre directory of the current
+# Java installation, even when java is not in the path
+# It works with  the following rpm files:
+#       Sun's Java Software Development Kit (Linux/Windows)
+#       Sun's Java Runtime Environment (Linux)
+#       IBM's Java Software Development Kit (linux)
+
+# We require an option to specify which directory is desired:
+# --java: directory with java executable
+# --javac: directory with javac executable
+# --jni: directory where JNI code is placed
+
+if [ "$1" = "--jni" ]; then
+    jni=yes
+elif [ "$1" = "--java" ]; then
+    java=yes
+elif [ "$1" = "--javac" ]; then
+    javac=yes
+else
+    echo "Usage: tos-locate-jre --java|--javac|--jni" >&2
+    exit 2
+fi
+
+rpmlocate () {
+    javarpm=$1
+    javapath=`rpm -ql $1 2>/dev/null | grep "bin/$2$"`
+}
+
+pathlocate () {
+    javapath=`which $1 2>/dev/null`
+    while [ -n "$javapath" -a -h "$javapath" ]; do
+	javapath=`readlink -q $javapath`
+    done
+    test -n "$javapath"
+}
+
+case `uname` in
+    CYGWIN*)
+    # Hopefully this will always work on cygwin with Sun's Java
+    jversion=`regtool -q get '\HKLM\SOFTWARE\JavaSoft\Java Development Kit\CurrentVersion'`
+    if [ $? != 0 ]; then
+	exit 1
+    fi
+    jhome=`regtool -q get '\HKLM\SOFTWARE\JavaSoft\Java Development Kit\'$jversion'\JavaHome'`
+    if [ $? != 0 ]; then
+	exit 1
+    fi
+    jhome=`cygpath -u "$jhome"`
+    ;;
+
+    Linux)
+    # We check the path first, on the assumption that that's the preferred
+    # version.
+    pathlocate javac || { test -z "$javac" && pathlocate java; }
+    if [ -z "$javapath" ]; then
+	# We try a bunch of standard names, before resorting to rpm -qa
+	rpmlocate IBMJava2-SDK javac || \
+	    rpmlocate IBMJava2-142-ia32-SDK javac || \
+	    rpmlocate j2sdk javac || \
+	    rpmlocate jdk javac || \
+	    { test -z "$javac" && rpmlocate j2re java; } || \
+	    { test -z "$javac" && rpmlocate jre java; }
+
+	if [ -z "$javapath" ]; then
+	    # lastly, check for a weirdly named IBMJava2
+	    name=`rpm -qa | grep IBMJava2 | head -1`
+	    if [ -n "$name" ]; then
+		rpmlocate $name javac
+	    fi
+	fi
+    fi
+    if [ -z "$javapath" ]; then
+	exit 1
+    fi
+    jbin=`dirname "$javapath"`
+    jhome=`dirname "$jbin"`
+    ;;
+
+    FreeBSD)
+    # We check the path first, on the assumption that that's the preferred
+    # version.
+    pathlocate javac || { test -z "$javac" && pathlocate java; }
+    if [ -n "$javapath" ]; then
+	jbin=`dirname "$javapath"`
+    else
+	if [ -f /usr/local/jdk1.4*/bin/java ]; then
+	    jbin=/usr/local/jdk1.4*/bin
+	else
+	    exit 1
+	fi
+    fi
+    jhome=`dirname $jbin`
+    ;;
+esac
+
+# These are correct for Sun and IBM's x86 Java versions
+if [ "$jni" = "yes" ]; then
+    jnilocate () {
+	dir="$1"
+	test -d "$1"
+    }
+
+    # Look for a likely JNI directory
+    # Windows, and IBM Java: in jre/bin
+    # Sun Java on Linux: in jre/lib/i386
+    if "$jhome/bin/java" -version 2>&1 | grep -q IBM || cygpath -w / >/dev/null 2>/dev/null; then
+	jnilocate "$jhome/jre/bin" || jnilocate "$jhome/bin"
+    else
+	arch=`uname -m`
+	jnilocate "$jhome/jre/lib/$arch" || \
+	    jnilocate "$jhome/jre/lib/i386" || \
+	    jnilocate "$jhome/lib/$arch" || \
+	    jnilocate "$jhome/lib/i386"
+    fi
+elif [ "$javac" = "yes" ]; then
+ dir="$jhome/bin"
+elif [ "$java" = "yes" ]; then
+ dir="$jhome/bin"
+fi
+
+# Check that what we found actually exists
+if [ -d "$dir" ]; then
+ echo $dir
+else
+ exit 1
+fi
diff --git a/tools/tinyos/misc/tos-locate-jre.1 b/tools/tinyos/misc/tos-locate-jre.1
new file mode 100644
index 00000000..55222418
--- /dev/null
+++ b/tools/tinyos/misc/tos-locate-jre.1
@@ -0,0 +1,37 @@
+.TH tos-locate-jre 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-locate-jre - Locate a Java installation
+.SH SYNOPSIS
+
+\fBtos-locate-jre\fR \fB--jni\fR
+\fBtos-locate-jre\fR \fB--java\fR
+\fBtos-locate-jre\fR \fB--javac\fR
+.SH DESCRIPTION
+
+\fBtos-locate-jre\fR locates your Java installation. It is used by other tools
+to decide where to install files, and is useful for setting up your shell
+path.
+
+Under cygwin, \fBtos-locate-jre\fR checks the registry for the installation
+point of Sun's JVM. It will not find any other versions of Java.
+
+Under Linux, \fBtos-locate-jre\fR looks for an executable named javac or
+java in the path. If none is found, it looks for IBM's and Sun's Java RPMs
+(in that order).
+
+Once \fBtos-locate-jre\fR has located your Java directory, it can return 
+the directory containing the \fBjava\fR executable (\fB--java\fR option),
+the directory containing the \fBjavac\fR executable (\fB--javac\fR option),
+or the directory where JNI libraries should be installed (\fB--jni\fR option).
+
+\fBtos-locate-jre\fR has only been tested with recent IBM and Sun JVMs. If
+you use something else, it will likely fail.
+.SH EXAMPLES
+
+Add java and javac to your path:
+  PATH=`/usr/local/bin/locate-jre --java`:$PATH
+  PATH=`/usr/local/bin/locate-jre --javac`:$PATH
+.SH SEE ALSO
+.IR tos-install-jni (1)
diff --git a/tools/tinyos/misc/tos-mote-key b/tools/tinyos/misc/tos-mote-key
new file mode 100644
index 00000000..d9dd7647
--- /dev/null
+++ b/tools/tinyos/misc/tos-mote-key
@@ -0,0 +1,113 @@
+#!/usr/bin/perl
+
+# "Copyright (c) 2000-2002 The Regents of the University  of California.  
+# All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and its
+# documentation for any purpose, without fee, and without written agreement is
+# hereby granted, provided that the above copyright notice, the following
+# two paragraphs and the athor appear in all copies of this software.
+# 
+# IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+# OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+# CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# 
+# THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+# AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+# ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+# PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+#
+# Authors: Naveen Sastry
+# Date:    11/11/02
+#
+#
+# Script to manage the tinysec keyfile
+
+
+# default keyfile and default key name (\w+ matches first valid key)
+$KEYFILE=".keyfile";
+$KEYNAME="\\w+";
+
+# if no keyfile is found, we'll need to create it and populate it with data
+# from /dev/random. This function returns the text taht should go into the 
+# new keyfile. We store the key in a hex-form.
+sub generateKey {
+    print STDERR "Generating default TinySec Key...\n";
+    
+    $a = "\n# TinySec Keyfile. By default, the first key will be used.\n";
+    $a = $a . "# You can import other keys by appending them to the file.\n";
+    $a = $a . "\ndefault ";
+
+    open RND, "', $KEYFILE and print KEYFILE generateKey() and
+     seek KEYFILE, 0, 0) or
+      die ("couldn't open file " . $KEYFILE);
+
+# find the matching key and print.
+while (  )  {
+    if ($_ =~ /^$KEYNAME\s+([a-fA-F0-9]+)/) {
+        $KEY = $1;
+        last;
+    }
+}
+
+print splitKey($KEY) . "\n";
diff --git a/tools/tinyos/misc/tos-mote-key.1 b/tools/tinyos/misc/tos-mote-key.1
new file mode 100644
index 00000000..4cf4f83f
--- /dev/null
+++ b/tools/tinyos/misc/tos-mote-key.1
@@ -0,0 +1,13 @@
+.TH tos-mote-key 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-mote-key - Manage TinySec keys
+.SH SYNOPSIS
+
+\fBtos-mote-key\fR [\fB-kf \fIkeyfile\fR] [\fB-kn \fIkeyname\fR]
+.SH DESCRIPTION
+
+\fBtos-mote-key\fR manages TinySec keys. TinySec is an encryption system
+for mica and mica2 motes under TinyOS 1.1. See the TinySec documentation
+for more details.
diff --git a/tools/tinyos/misc/tos-serial-configure b/tools/tinyos/misc/tos-serial-configure
new file mode 100644
index 00000000..ded492d8
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-configure
@@ -0,0 +1,3 @@
+#!/bin/sh
+num=$((`echo $1 | sed -e s/COM//` - 1))
+stty -F /dev/ttyS$num raw
diff --git a/tools/tinyos/misc/tos-serial-configure.1 b/tools/tinyos/misc/tos-serial-configure.1
new file mode 100644
index 00000000..4080621f
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-configure.1
@@ -0,0 +1,31 @@
+.TH tos-serial-configure 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-serial-configure - reset serial port settings for raw data
+.SH SYNOPSIS
+
+\fBtos-serial-configure\fR \fInumber\fR
+.SH DESCRIPTION
+
+\fBtos-serial-configure\fR is a tool that resets a serial port
+to read raw bytes. Some devices, such as terminals, require
+serial ports to interpret bytes in some fashion or another.
+For example, in "cooked" mode, a read on a serial port
+returns only after a newline character.
+
+\fBtos-serial-debug\fR takes a required \fInumber\fR argument,
+an integer which refers to which serial port to configure.
+This is appended to "/dev/ttyS" to determine the terminal
+device name. 
+
+.SH EXAMPLE
+Executing
+  
+  tos-serial-configure 0
+
+configures /dev/ttyS0.
+
+.SH SEE ALSO
+
+.IR tos-serial-debug (1),
diff --git a/tools/tinyos/misc/tos-serial-debug.1 b/tools/tinyos/misc/tos-serial-debug.1
new file mode 100644
index 00000000..1f236ee0
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-debug.1
@@ -0,0 +1,39 @@
+.TH tos-serial-debug 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-serial-debug - print the raw bytes read from a serial port
+.SH SYNOPSIS
+
+\fBtos-serial-debug\fR [\fIserial port\fR] [\fIbaud rate\fR]
+.SH DESCRIPTION
+
+\fBtos-serial-debug\fR is a tool that reads raw bytes from a
+serial port and prints them to stdout in hexidecimal format.
+It is typically used to determine whether failure to communicate
+with a node over the serial port is due to an inability to receive
+anything or whether it is due to disagreement on the packet format.
+
+\fBtos-serial-debug\fR takes optional \fIserial port\fR and
+\fIbaud rate\fR arguments. The latter cannot be specified unless
+the former is as well. The \fIserial port\fR argument names a serial 
+port device and defaults to /dev/ttyS0. The \fIbaud rate\fR argument
+is an ASCII string describing a baud rate, and must be one of
+50, 75, 110, 134, 150, 200, 600, 1200, 2400, 4800, 9600, 19200,
+38400, 57600, 115200, 230400, 460800k, 500000, 576000, 921600,
+1000000, 1152000, 1500000, 2000000, 2500000, 3000000, 3500000, 
+or 4000000. It defaults to 19200. Particular software distributions
+may vary, but the default speeds for current motes platforms
+are as follows:
+
+\fBeyesIFXv2\fR, \fBintelmote2\fR, \fBtelosb\fR, \fBtmote\fR: 115200
+.br
+\fBmica2\fR, \fBmicaz\fR: 57600
+
+.SH EXAMPLE
+  tos-serial-debug 
+  tos-serial-debug /dev/ttyS1 
+  tos-serial-debug /dev/ttyS1 57600
+.SH SEE ALSO
+
+.IR tos-serial-configure (1)
diff --git a/tools/tinyos/misc/tos-serial-debug.c b/tools/tinyos/misc/tos-serial-debug.c
new file mode 100644
index 00000000..bd0a9631
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-debug.c
@@ -0,0 +1,221 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifdef __CYGWIN__
+#include 
+#endif
+
+#define BAUDRATE B19200 //the baudrate that the device is talking
+#define SERIAL_DEVICE "/dev/ttyS0" //the port to use.
+
+int input_stream;
+
+void print_usage(char *name);
+void open_input(int argc, char **argv);
+
+int main(int argc, char ** argv) {
+    int n = 0;
+
+    if (argc > 3 || argc > 1 && argv[1][0] == '-') {
+	print_usage(argv[0]);
+	exit(2);
+    }
+    open_input(argc, argv);
+    while(1) { 
+	unsigned char c;
+	int cnt = read(input_stream, &c, 1);
+
+	if (cnt < 0) {
+	    perror("error reading from serial port");
+	    exit(2);
+	}
+	if (cnt == 1) {
+	    if (c == 0x7e || ++n == 26) {
+		n = 0;
+		printf("\n");
+	    }
+	    printf("%02x ", c);
+	    fflush(stdout);
+	}
+    }
+}
+
+void print_usage(char *name){
+    //usage...
+    fprintf(stderr, "usage: %s [serial port] [baudrate]\n", name);
+    fprintf(stderr, "Default serial port is " SERIAL_DEVICE ", default baud rate is 19200\n");
+}
+
+
+void open_input(int argc, char **argv) {
+    /* open input_stream for read/write */ 
+    struct termios newtio;
+    const char *name = SERIAL_DEVICE;
+    unsigned long baudrate = BAUDRATE;
+
+    if (argc > 1)
+	name = argv[1];
+    if (argc > 2) {
+	int reqrate = atoi(argv[2]);
+
+	switch (reqrate) {
+#ifdef B50
+	case 50: baudrate = B50; break;
+#endif
+#ifdef B75
+	case 75: baudrate = B75; break;
+#endif
+#ifdef B110
+	case 110: baudrate = B110; break;
+#endif
+#ifdef B134
+	case 134: baudrate = B134; break;
+#endif
+#ifdef B150
+	case 150: baudrate = B150; break;
+#endif
+#ifdef B200
+	case 200: baudrate = B200; break;
+#endif
+#ifdef B300
+	case 300: baudrate = B300; break;
+#endif
+#ifdef B600
+	case 600: baudrate = B600; break;
+#endif
+#ifdef B1200
+	case 1200: baudrate = B1200; break;
+#endif
+#ifdef B1800
+	case 1800: baudrate = B1800; break;
+#endif
+#ifdef B2400
+	case 2400: baudrate = B2400; break;
+#endif
+#ifdef B4800
+	case 4800: baudrate = B4800; break;
+#endif
+#ifdef B9600
+	case 9600: baudrate = B9600; break;
+#endif
+#ifdef B19200
+	case 19200: baudrate = B19200; break;
+#endif
+#ifdef B38400
+	case 38400: baudrate = B38400; break;
+#endif
+#ifdef B57600
+	case 57600: baudrate = B57600; break;
+#endif
+#ifdef B115200
+	case 115200: baudrate = B115200; break;
+#endif
+#ifdef B230400
+	case 230400: baudrate = B230400; break;
+#endif
+#ifdef B460800
+	case 460800: baudrate = B460800; break;
+#endif
+#ifdef B500000
+	case 500000: baudrate = B500000; break;
+#endif
+#ifdef B576000
+	case 576000: baudrate = B576000; break;
+#endif
+#ifdef B921600
+	case 921600: baudrate = B921600; break;
+#endif
+#ifdef B1000000
+	case 1000000: baudrate = B1000000; break;
+#endif
+#ifdef B1152000
+	case 1152000: baudrate = B1152000; break;
+#endif
+#ifdef B1500000
+	case 1500000: baudrate = B1500000; break;
+#endif
+#ifdef B2000000
+	case 2000000: baudrate = B2000000; break;
+#endif
+#ifdef B2500000
+	case 2500000: baudrate = B2500000; break;
+#endif
+#ifdef B3000000
+	case 3000000: baudrate = B3000000; break;
+#endif
+#ifdef B3500000
+	case 3500000: baudrate = B3500000; break;
+#endif
+#ifdef B4000000
+	case 4000000: baudrate = B4000000; break;
+#endif
+	default:
+	    fprintf(stderr, "Unknown baudrate %s, defaulting to 19200\n",
+		    argv[2]);
+	}
+    }
+    
+    input_stream = open(name, O_RDWR|O_NOCTTY);
+    if (input_stream == -1) {
+	fprintf(stderr, "Failed to open %s", name);
+	perror("");
+	fprintf(stderr, "Make sure the user has permission to open device.\n");
+	exit(2);
+    }
+    printf("%s input_stream opened\n", name);
+#ifdef __CYGWIN__
+    /* For some very mysterious reason, this incantation is necessary to make
+       the serial port work under some windows machines */
+    HANDLE handle = (HANDLE)get_osfhandle(input_stream);
+    DCB dcb;
+    if (!(GetCommState(handle, &dcb) &&
+	  SetCommState(handle, &dcb))) {
+      fprintf(stderr, "serial port initialisation problem\n");
+      exit(2);
+    }
+#endif
+
+    /* Serial port setting */
+    memset(&newtio, 0, sizeof(newtio));
+    newtio.c_cflag = CS8 | CLOCAL | CREAD;
+    newtio.c_iflag = IGNPAR | IGNBRK;
+    cfsetispeed(&newtio, baudrate);
+    cfsetospeed(&newtio, baudrate);
+
+    tcflush(input_stream, TCIFLUSH);
+    tcsetattr(input_stream, TCSANOW, &newtio);
+}
diff --git a/tools/tinyos/misc/tos-set-symbols.1 b/tools/tinyos/misc/tos-set-symbols.1
new file mode 100644
index 00000000..8199363c
--- /dev/null
+++ b/tools/tinyos/misc/tos-set-symbols.1
@@ -0,0 +1,60 @@
+.TH tos-set-symbols 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-set-symbols - set initialized variable values in a binary
+.SH SYNOPSIS
+
+\fBtos-set-symbols\fR [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                [\fB--target=\fR\fITARGET\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --srec [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                [\fB--target=\fR\fITARGET\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --exe [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --read [\fB--objdump=\fR...] \fIINPUTFILE\fR \fISYMBOL\fR...
+
+.SH DESCRIPTION
+
+\fBtos-set-symbols\fR is a tool to inspect and modify the initial values
+of variables in a binary. It is used by the TinyOS build system to set
+a node's ID and AM address, for example, when using \fBinstall.X\fR or
+\fBreinstall.X\fR. 
+
+\fBtos-set-symbols\fI takes an optional first argument that specifies
+the format of the binary being modified or whether it is only being read.
+By default, it acts as if \fB--srec\fR was passed. Instead of passing
+\fB--srec\fR, \fB--exe\fR, the \fB--target\fR option can be used to
+specify a target format. This option is passed to objcopy. The \fB--objdump\fR
+and \fB--objcopy\fR options allow you to specify which binary tools
+to use. By default, \fBtos-set-symbols\fR uses \fBavr-objcopy\fR and
+\fBavr-objdump\fR.
+
+The \fISYMBOL\fR parameter refers to a variable in the image to 
+modify or print. If the variable is in a component, its name is of
+the form \fIcomponent\fR$\fIvariable\fR. If the \fISYMBOL\fR is
+omitted, it defaults to \fBTOS_LOCAL_ADDRESS\fR, for compatibility
+with the TinyOS 1.x \fBset-mode-id\fR tool.
+
+.SH EXAMPLE
+. 
+This reads in a micaZ .srec file, changes the value of TOS_NODE_ID 
+to 4, and writes out a new binary to main.srec.out-4.
+
+  tos-set-symbols build/micaz/main.srec build/micaz/main.srec.out-4 \\
+  TOS_NODE_ID=4
+  
+This reads in a Telos .srec file, changes the value of TOS_NODE_ID and
+ActiveMessageAddressC$addr to 3, and writes out a new binary to 
+main.srec.out-3. It uses the msp430, rather than the avr, binary tools,
+and outputs an ihex format executable.
+
+  tos-set-symbols --objcopy=msp430-objcopy --objdump=msp430-objdump \\
+  --target=ihex build/telosa/main.ihex build/telosa/main.ihex.out-3 \\
+  TOS_NODE_ID=3 ActiveMessageAddressC\$addr=3 
+
+
diff --git a/tools/tinyos/misc/tos-set-symbols.in b/tools/tinyos/misc/tos-set-symbols.in
new file mode 100644
index 00000000..9bf0d540
--- /dev/null
+++ b/tools/tinyos/misc/tos-set-symbols.in
@@ -0,0 +1,163 @@
+#!@pathperl@ -w
+#
+# This program changes the mote ID of a TinyOS image. It is used to 
+# install a program for a specific mote.
+use strict;
+
+my %G_opts = (
+  compat => 1,
+  objdump => 'avr-objdump',
+  objcopy => 'avr-objcopy',
+  target => 'srec',
+  readdata => 0,
+);
+
+# default to backward compatability mode
+while( @ARGV && $ARGV[0] =~ /^-/ ) {
+  (my $opt = shift @ARGV) =~ s/^-+//;
+  if( $opt eq "srec" ) { $G_opts{compat} = 1; }
+  elsif( $opt eq "exe" ) { $G_opts{compat} = 0; }
+  elsif( $opt eq "read" ) { $G_opts{readdata} = 1; $G_opts{compat} = 0; }
+  elsif( exists $G_opts{$opt} ) { $G_opts{$opt} = shift @ARGV; }
+  else { die "Unknown command line option $opt\n"; }
+}
+
+# print usage if we have the wrong number of arguments
+if( @ARGV < ($G_opts{readdata} ? 1 : 3) ) {
+    print "usage: tos-set-symbols --srec [--objcopy=...] [--objdump=...]\n";
+    print "                       [--target=TARGETFILETYPE]\n";
+    print "                       INFILE OUTFILE [SYMBOL=]VALUE...\n";
+    print "       tos-set-symbols --exe [--objcopy=...] [--objdump=...]\n";
+    print "                       INFILE OUTFILE [SYMBOL]=VALUE...\n";
+    print "       tos-set-symbols --read [--objdump=...] INFILE SYMBOL...\n";
+    print "\nNote: If omitted, SYMBOL defaults to TOS_LOCAL_ADDRESS.\n";
+    print "(for TinyOS 1.x compatibility).\n";
+    exit 0;
+}
+
+# get the args and default variables set up
+my $exein = shift @ARGV;
+my $exeout = $G_opts{readdata} ? $exein : shift @ARGV;
+my %user_symbols = ();
+if( $G_opts{readdata} ) {
+  for my $name (@ARGV) {
+    $name =~ s/\./\$/g;
+    $user_symbols{$name} = 1;
+  }
+} else {
+  for my $value (@ARGV) {
+    my $name = 'TOS_LOCAL_ADDRESS';
+    ($name,$value) = ($1,$2) if $value =~ /^([^=]+)=(.*)/;
+    $value = hex $value if $value =~ /^0x/;
+    $user_symbols{$name} = $value;
+  }
+}
+my $segment_vma = undef;
+my $segment_lma = undef;
+my $segment_off = undef;
+
+# if in compatability mode, derive the names of the exes from the srecs
+my $srecin = undef;
+my $srecout = undef;
+if( $G_opts{compat} ) {
+  $srecin = $exein;
+  $srecout = $exeout;
+  $exein =~ s/$G_opts{target}/exe/;
+  $exeout =~ s/$G_opts{target}/exe/;
+}
+
+# find the data section
+open( SECTS, "$G_opts{objdump} -h $exein |" )
+  or die "Cannot extract section information: $!\n";
+while() {
+  if( /^\s*\d+\s+\.data\s+\S+\s+(\S+)\s+(\S+)\s+(\S+)/ ) {
+    $segment_vma = hex $1;
+    $segment_lma = hex $2;
+    $segment_off = hex $3;
+    last;
+  }
+}
+close(SECTS);
+die "Could not find data section in $exein, aborting.\n"
+  unless defined $segment_vma && defined $segment_lma && defined $segment_off;
+
+# build a hash of all data segment symbols to their address and size
+my %exe_symbols = ();
+open( SYMBOL, "$G_opts{objdump} -t $exein |" )
+  or die "Cannot extract symbol information: $!\n";
+while() {
+  if( /^(\S+)\s+\S+\s+\S+\s+\.data\s+(\S+)\s+(\S+)\s*$/ ) {
+    $exe_symbols{$3} = { addr => hex($1), size => hex($2) };
+  }
+}
+close(SYMBOL);
+
+# slurp the input exe
+open (FILE_IN, "<$exein") or die "Could not open $exein: $!\n";
+binmode FILE_IN;
+my $exe = join("",);
+close( FILE_IN );
+
+if( $G_opts{readdata} ) {
+
+  my %nums = ( 1 => 'C', 2 => 'v', 4 => 'V' );
+  %user_symbols = %exe_symbols unless %user_symbols;
+
+  my $maxlen = 0;
+  for (keys %user_symbols) { $maxlen = length if length > $maxlen; }
+
+  for my $symbol (sort keys %user_symbols) {
+
+    if( defined $exe_symbols{$symbol} ) {
+
+      my $addr = $exe_symbols{$symbol}->{addr};
+      my $size = $exe_symbols{$symbol}->{size};
+      my $filepos = $segment_off + ($addr - $segment_vma);
+      my $value = substr( $exe, $filepos, $size );
+
+      (my $valbytes = $value) =~ s/(.)/sprintf('%02x ',ord $1)/eg;
+      $valbytes =~ s/\s+$//;
+      (my $valstr = $value) =~ s/[^\040-\200]/./g;
+      (my $symstr = $symbol) =~ s/\$/./g;
+      my $numstr = "";
+      if( $nums{length($value)} ) {
+	$numstr = sprintf( '  (%d)', unpack($nums{length($value)},$value) );
+      }
+
+      print sprintf("%-${maxlen}s  :  %s  %s\n", $symstr, $valbytes, "[$valstr]$numstr" );
+
+    } else {
+      warn "Could not find symbol $symbol in $exein, ignoring symbol.\n";
+    }
+  }
+
+} else {
+
+  # change the desired symbols at their file offsets
+  for my $symbol (sort keys %user_symbols) {
+    my $value = $user_symbols{$symbol};
+    if( defined $exe_symbols{$symbol} ) {
+      my $addr = $exe_symbols{$symbol}->{addr};
+      my $size = $exe_symbols{$symbol}->{size};
+      my $filepos = $segment_off + ($addr - $segment_vma);
+      my $bytes = substr( pack("V", $value) . ("\000" x $size), 0, $size );
+      substr( $exe, $filepos, $size ) = $bytes;
+    } else {
+      warn "Could not find symbol $symbol in $exein, ignoring symbol.\n";
+    }
+  }
+
+  # barf the output exe
+  open (FILE_OUT, ">$exeout") or die "Could not open $exeout: $!\n";
+  binmode FILE_OUT;
+  print FILE_OUT $exe;
+  close( FILE_OUT );
+
+  # if in compatability mode, convert the output exe to the output srec
+  if( $G_opts{compat} ) {
+    my $cmd = "$G_opts{objcopy} --output-target=$G_opts{target} $exeout $srecout";
+    system( $cmd ) == 0 or die "Command \"$cmd\" failed";
+  }
+
+}
+
diff --git a/tools/tinyos/misc/tos-storage-at45db.1 b/tools/tinyos/misc/tos-storage-at45db.1
new file mode 100644
index 00000000..d511989d
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-at45db.1
@@ -0,0 +1,24 @@
+.TH tos-storage-at45db 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-storage-at45db - Generate storage volume description code
+.SH SYNOPSIS
+
+\fBtos-storage-at45db\fR
+.SH DESCRIPTION
+
+\fBtos-storage-at45db\fR reads a user specification describing the layout
+of storage volumes on an Atmel AT45DB-family flash chip, and generates code
+describing that layout for use by the TinyOS 2.0 storage subsystem.  The
+user specification is in XML and is read from standard input. The code is
+written to standard output.
+
+This program is normally invoked automatically by the TinyOS build system
+when your application directory contains a \fBvolumes-at45db.xml\fR file.
+.SH EXAMPLES
+
+  tos-storage-at45db build/mica2/StorageVolumes.h
+.SH SEE ALSO
+
+.IR tos-storage-stm25p (1)
diff --git a/tools/tinyos/misc/tos-storage-at45db.in b/tools/tinyos/misc/tos-storage-at45db.in
new file mode 100644
index 00000000..0bf9ad2a
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-at45db.in
@@ -0,0 +1,136 @@
+#!@pathpython@
+# Copyright (c) 2006 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+from xml.dom import *
+from xml.dom.minidom import *
+from re import match
+from sys import *
+
+sector_size = 256
+flash_size = 2048 # in sectors
+
+volumes = {}
+volmap = []
+
+# print an error message and exit
+def nfail(s):
+  stderr.write(s + "\n")
+  exit(2)
+
+def check_volume(name, base, size):
+  if base == "":
+    base = None
+  else:
+    try:
+      base = int(base)
+    except ValueError:
+      nfail("invalid base for volume %s" % name)
+    if (base & (sector_size - 1)) != 0:
+      nfail("base of volume %s is not a multiple of %d" % (name, sector_size))
+    base /= sector_size
+
+  try:
+    size = int(size)
+  except ValueError:
+    nfail("invalid size for volume %s" % name)
+  if (size & (sector_size - 1)) != 0:
+    nfail("size of volume %s is not a multiple of %d" % (name, sector_size))
+  size /= sector_size
+
+  name = name.upper()
+  if volumes.has_key(name):
+    nfail("duplicate definition of volume %s" % name)
+  if not match("^[a-zA-Z0-9_]+$", name):
+    nfail("invalid volume name %s" % name)
+  volumes[name] = (base, size)
+
+def allocate_at(name, base, size):
+  # check for overlap of existing allocations
+  for (vname, vbase, vsize) in volmap:
+    if base in range(vbase, vbase + vsize) or base + size - 1 in range(vbase, vbase + vsize) or vbase in range(base, base + size) or vbase + vsize - 1 in range(base, base + size):
+      nfail("volume %s overlaps volume %s" % (name, vname))
+
+  # insert at correct position
+  for i in range(len(volmap)):
+    if base < volmap[i][1]:
+      volmap.insert(i, (name, base, size))
+      return
+
+  # it's the last volume...
+  volmap.append((name, base, size))
+
+def allocate(name, size):
+  # We just do first fit. We could spend endless effort doing better.
+  base = 0
+  for i in range(len(volmap)):
+    (vname, vbase, vsize) = volmap[i]
+    if base < vbase and size <= vbase - base:
+      volmap.insert(i, (name, base, size))
+      return
+    base = vbase + vsize
+  volmap.append((name, base, size))
+
+try:
+  dom = parse(stdin)
+except xml.parsers.expat.ExpatError:
+  nfail("no valid input")
+
+for volume in dom.documentElement.getElementsByTagName("volume"):
+  name = volume.getAttribute("name")
+  size = volume.getAttribute("size")
+  base = volume.getAttribute("base")
+  if name == None:
+    nfail("name omitted in volume")
+  if size == None:
+    nfail("size omitted in volume %s" % name)
+  check_volume(name, base, size)
+
+# allocate fixed-address volumes
+for name in volumes.keys():
+  (base, size) = volumes[name]
+  if base != None:
+    allocate_at(name, base, size)
+
+# allocate movable volumes
+for name in volumes.keys():
+  (base, size) = volumes[name]
+  if base == None:
+    allocate(name, size)
+
+if len(volmap) == 0:
+  nfail("no volumes")
+
+(lastname, lastbase, lastsize) = volmap[len(volmap) - 1]
+if lastbase + lastsize > flash_size:
+  nfail("out of space (using %d bytes, have only %d)" %
+        ((lastbase + lastsize) * sector_size, flash_size * sector_size))
+
+# print some code
+print "#ifndef STORAGE_VOLUMES_H"
+print "#define STORAGE_VOLUMES_H"
+print
+print "enum {"
+for (vname, vbase, vsize) in volmap:
+  print "  VOLUME_%s, " % vname
+print "};"
+print
+print "#endif"
+
+print "#if defined(VS)"
+for (vname, vbase, vsize) in volmap:
+  print "VS(VOLUME_%s, %d)" % (vname, vsize)
+print "#undef VS"
+print "#endif"
+
+print "#if defined(VB)"
+for (vname, vbase, vsize) in volmap:
+  print "VB(VOLUME_%s, %d)" % (vname, vbase)
+print "#undef VB"
+print "#endif"
+
diff --git a/tools/tinyos/misc/tos-storage-stm25p.1 b/tools/tinyos/misc/tos-storage-stm25p.1
new file mode 100644
index 00000000..21253e79
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-stm25p.1
@@ -0,0 +1,24 @@
+.TH tos-storage-stm25p 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-storage-stm25p - Generate storage volume description code
+.SH SYNOPSIS
+
+\fBtos-storage-stm25p\fR
+.SH DESCRIPTION
+
+\fBtos-storage-stm25p\fR reads a user specification describing the layout
+of storage volumes on an ST M25P80 flash chip, and generates code
+describing that layout for use by the TinyOS 2.0 storage subsystem.  The
+user specification is in XML and is read from standard input. The code is
+written to standard output.
+
+This program is normally invoked automatically by the TinyOS build system
+when your application directory contains a \fBvolumes-stm25p.xml\fR file.
+.SH EXAMPLES
+
+  tos-storage-stm25p build/telosb/StorageVolumes.h
+.SH SEE ALSO
+
+.IR tos-storage-stm25p (1)
diff --git a/tools/tinyos/misc/tos-storage-stm25p.in b/tools/tinyos/misc/tos-storage-stm25p.in
new file mode 100644
index 00000000..c26793be
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-stm25p.in
@@ -0,0 +1,141 @@
+#!@pathpython@
+# -*- python -*-
+# Copyright (c) 2005-2006 Arched Rock Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the Arched Rock Corporation nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE
+#
+# @author Jonathan Hui 
+#
+# $Revision$
+# $Date$
+#
+                                  
+from re import match
+from sys import *
+from xml.dom import minidom
+
+NUM_SECTORS = 16
+SECTOR_SIZE = 65536
+
+volumes = {}
+
+volumeNames = []
+volumeSizes = []
+volumeOffsets = []
+freeSectors = NUM_SECTORS*[ True ]
+
+def error_exit( s ):
+    stderr.write( "ERROR: " + s + "\n" )
+    exit( 2 )
+
+try:
+    dom = minidom.parse( stdin )
+except xml.parsers.expat.ExpatError:
+    error_exit( "input invalid" )
+
+# extract information
+for volume in dom.documentElement.getElementsByTagName( "volume" ):
+    name = volume.getAttribute( "name" )
+    size = volume.getAttribute( "size" )
+    base = volume.getAttribute( "base" )
+    if name == "":
+        error_exit( "volume has no name" )
+    elif not match( "^[a-zA-Z0-9_]+$", name ):
+        error_exit( "volume has invalid name '%s'" % name )
+    elif volumes.has_key( name ):
+        error_exit( "duplicate volume definition '%s'" % name )
+    else:
+        volumes[ name ] = "blah"
+    
+    if size == "":
+        error_exit( "volume '%s' has no size" % name )
+    try:
+        size = int( size )
+    except ValueError:
+        error_exit( "volume '%s' has invalid size" % name )
+    if base != "":
+        try:
+            base = int( base )
+        except ValueError:
+            error_exit( "volume '%s' has invalid base" % name )
+    if ( size & ( SECTOR_SIZE - 1 ) ) != 0:
+        error_exit( "size of volume '%s' is not a multiple of %d" % \
+                    ( name, SECTOR_SIZE ) )
+    if base != "" and ( base & ( SECTOR_SIZE - 1 ) ) != 0:
+        error_exit( "base of volume '%s' is not a multiple of %d" % \
+                    ( name, SECTOR_SIZE ) )
+
+    volumeNames.append( "VOLUME_" + name )
+    volumeSizes.append( size / SECTOR_SIZE )
+    if base == "":
+        volumeOffsets.append( -1 )
+    else:
+        base = base / SECTOR_SIZE
+        volumeOffsets.append( base )
+        for i in range( size ):
+            freeSectors[ i + base ] = False
+
+# allocate with first fit policy
+for i in range( len( volumeOffsets ) ):
+    size = volumeSizes[ i ]
+    if volumeOffsets[ i ] == -1:
+        for j in range( NUM_SECTORS ):
+            if freeSectors[ j ]:
+                size -= 1
+                if size == 0:
+                    volumeOffsets[ i ] = j - ( volumeSizes[ i ] - 1 )
+                    break
+            else:
+                size = volumeSizes[ i ]
+        if volumeOffsets[ i ] == -1:
+            raise "Unable to satisfy allocation request."
+        else:
+            for j in range( volumeSizes[ i ] ):
+                freeSectors[ volumeOffsets[ i ] + j ] = False
+
+# output C file
+
+print "#ifndef __STORAGE_VOLUME_H__"
+print "#define __STORAGE_VOLUME_H__"
+print ""
+print "#include \"Stm25p.h\""
+print ""
+
+for i in range( len( volumeNames ) ):
+    print "#define %s %d" % ( volumeNames[ i ], i )
+print ""
+        
+print "static const stm25p_volume_info_t STM25P_VMAP[ %d ] = {" % \
+      len( volumeNames )
+for i in range( len( volumeNames ) ):
+    print "    { base : %d, size : %d }," % \
+          ( volumeOffsets[ i ], volumeSizes[ i ] )
+print "};"
+
+print ""
+print "#endif"
diff --git a/tools/tinyos/misc/tos-write-image.1 b/tools/tinyos/misc/tos-write-image.1
new file mode 100644
index 00000000..c1894ef3
--- /dev/null
+++ b/tools/tinyos/misc/tos-write-image.1
@@ -0,0 +1,20 @@
+.TH tos-write-image 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-write-image - Generate executable description for Deluge
+.SH SYNOPSIS
+
+\fBtos-write-image\fR [\fB-DIDENT_\fIname\fB=\fIvalue\fR...] [\fB--objdump=\fIobjdump\fR]
+                \fB--exe=\fIexefile\fR \fB--ihex=\fIhexfile\fR
+.SH DESCRIPTION
+
+\fBtos-write-image\fR writes an XML description of an executable file to
+standard output, based on the contents of a compiled file and the
+identifying options generated by \fBtos-ident-flags\fR.
+
+\fBtos-write-image\fR is normally invoked by the TinyOS build system. See
+the Deluge documentation for more details.
+.SH SEE ALSO
+
+.IR tos-ident-flags (1)
diff --git a/tools/tinyos/misc/tos-write-image.in b/tools/tinyos/misc/tos-write-image.in
new file mode 100644
index 00000000..387c4685
--- /dev/null
+++ b/tools/tinyos/misc/tos-write-image.in
@@ -0,0 +1,68 @@
+#!@pathperl@ -w
+#
+# This script generates an ihex binary image and XML description
+# from an srec binary image. These are used by the Deluge binary
+# image dissemination service.
+#
+#$Id$
+#@author Jonathan Hui 
+#
+use strict;
+
+my $MaxNameLength = 10;
+
+if ( @ARGV == 0 ) {
+  print "usage: tos-write-image [ident_flags] [exe_file]\n";
+  exit 0;
+}
+
+my %ident_flags = ();
+my $exe = "";
+my $ihex = "";
+my $objdump = "avr-objdump";
+
+for my $arg (@ARGV) {
+  if ($arg =~ /^-DIDENT_(.+)=0x(.+)$/) {
+    $ident_flags{lc($1)} = uc($2);
+  }
+  elsif ($arg =~ /^-DIDENT_(.+)=(.+)$/) {
+    $ident_flags{lc($1)} = $2;
+  }
+  elsif ($arg =~ /^--ihex=(.+)$/) {
+    $ihex = $1;
+  }
+  elsif ($arg =~ /^--exe=(.+)$/) {
+    $exe = $1;
+  }
+  elsif ($arg =~ /^--objdump=(.+)$/) {
+    $objdump = $1;
+  }
+}
+
+my $deluge_support = "no";
+# See if app has deluge included
+open( EXE, "$objdump -t $exe |") or die "Cannot open exe file: $!\n";
+while() {
+  if ( /Deluge/ ) {
+    $deluge_support = "yes";
+  }
+}
+close(EXE);
+$ident_flags{"deluge_support"} = $deluge_support;
+
+open ( IHEX, $ihex ) or die "Cannot open ihex file: $!\n";
+
+print "\n";
+print "  \n";
+for my $flag (keys %ident_flags) {
+  print "    <$flag>$ident_flags{$flag}\n";
+}
+print "  \n";
+print "  \n";
+
+while ( my $line =  ) {
+  print $line;
+}
+
+print "  \n";
+print "\n";
diff --git a/tools/tinyos/ncc/.cvsignore b/tools/tinyos/ncc/.cvsignore
new file mode 100644
index 00000000..9f7e8b9e
--- /dev/null
+++ b/tools/tinyos/ncc/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+mig
+ncc
+ncg
+nesdoc
diff --git a/tools/tinyos/ncc/Makefile.am b/tools/tinyos/ncc/Makefile.am
new file mode 100644
index 00000000..38a27c75
--- /dev/null
+++ b/tools/tinyos/ncc/Makefile.am
@@ -0,0 +1,15 @@
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = nesdoc-py
+
+dist_man_MANS = mig.1 ncc.1 ncg.1 nesdoc.1
+
+bin_SCRIPTS = mig ncg ncc nesdoc
diff --git a/tools/tinyos/ncc/mig.1 b/tools/tinyos/ncc/mig.1
new file mode 100644
index 00000000..4bf8d848
--- /dev/null
+++ b/tools/tinyos/ncc/mig.1
@@ -0,0 +1,30 @@
+.TH mig 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+mig - message interface generator for TinyOS
+.SH SYNOPSIS
+
+\fBmig\fR [any ncc option] [tool-specific options]
+    [\fB-o\fR \fIoutput-file\fR]
+    \fItool\fR \fImsg-format-file\fR \fImessage-type\fR
+.SH DESCRIPTION
+
+\fBmig\fR is a tool to generate code to process TinyOS messages (which
+are specified by C types). 
+
+\fBmig \fIoptions\fR is equivalent to \fBnescc-mig -nescc=ncc
+\fIoptions\fR. For details on \fBmig\fR's output and options, please read
+see the \fBnescc-mig\fR man page.
+
+.SH EXAMPLE
+
+    APPDIR=`ncc -print-tosdir`/../apps/Ident
+    mig java -I $APPDIR -target=mica2 \\
+      -java-classname=net.tinyos.ident.IdentMsg \\
+      $APPDIR/App.nc IdentMsg -o IdentMsg.java
+.SH SEE ALSO
+
+.IR ncc (1),
+.IR nescc-mig (1),
+.IR ncg (1)
diff --git a/tools/tinyos/ncc/mig.in b/tools/tinyos/ncc/mig.in
new file mode 100644
index 00000000..3dc87127
--- /dev/null
+++ b/tools/tinyos/ncc/mig.in
@@ -0,0 +1,16 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+
+prefix="@prefix@";
+exec_prefix="@exec_prefix@";
+exec "@nescc_prefix@/bin/nescc-mig" "-nescc=$exec_prefix/bin/ncc" "$@"
+err=$?
+echo "Couldn't execute @nescc_prefix@/bin/nescc-mig" >&2
+exit $err
diff --git a/tools/tinyos/ncc/ncc.1 b/tools/tinyos/ncc/ncc.1
new file mode 100644
index 00000000..f04e1433
--- /dev/null
+++ b/tools/tinyos/ncc/ncc.1
@@ -0,0 +1,154 @@
+.TH ncc 1 "April 27, 2004"
+.LO 1
+.SH NAME
+ncc - nesC compiler for TinyOS
+.SH SYNOPSIS
+
+\fBncc\fR [\fB-target=\fIpc|mica|mica2|mica2dot|...\fR] [\fB-tossim\fR]
+    [\fB-board=\fImicasb|basicsb|micawb|...\fR]
+    [\fB-tosdir=\fIdir\fR] [\fB-nostdinc\fR] 
+    [\fB--version\fR] [\fB-print-tosdir\fR] [\fB-print-platforms\fR] [\fB-print-target\fR]
+    [any nescc option] [any gcc option] \fIfiles\fR...
+.SH DESCRIPTION
+
+\fBncc\fR is an extension to \fBnescc\fR that knows how to compile nesC
+applications for a TinyOS environment. If invoked on regular C files, it
+behaves like \fBgcc\fR. When invoked on a nesC component or
+interface (\fB.nc\fR extension) file it compiles and links (except if the
+usual \fB-c\fR, \fB-S\fR, \fB-E\fR or \fB-fsyntax-only\fR options are used)
+that component with the other files specified on the command line.
+
+\fBncc\fR just invokes \fBnescc\fR with extra options based on the 
+selected platform and sensorboard(s). And \fBnescc\fR itself just
+invokes \fBgcc\fR. Thus, for a full understanding of possible \fBncc\fR
+options you should read the \fBnescc\fR and \fBgcc\fR man pages.
+.SH OPTIONS
+
+\fBncc\fR accepts all \fBgcc\fR and \fBnescc\fR options, and some additional 
+TinyOS specific options:
+.TP
+\fB-target=\fIX\fR 
+Specify the target architecture for this compilation. If \fB-tossim\fR is
+also specified, the compilation uses the tossim environment and produces a
+locally executable file. The default target is specified in the
+\fB.default-platform\fR file in your TinyOS directory (see \fB-tosdir\fR
+option), and defaults to \fBmica\fR if that file is absent. A platform that 
+is not in the TinyOS distribution can be used
+if its directory is specified with an explicit -I directive (the platform
+name is taken from the directory's name, platform directories are
+recognised by the presence of a \fB.platform\fR file).
+.TP
+\fB-tosdir=\fIdir\fR 
+Specify the location of TinyOS. This location can also be specified with
+the \fBTOSDIR\fR environment variable. If the variable and the option are both
+given, \fBncc\fR uses the value specified with the option. If neither the
+environment variable or option are specified, ncc uses its compiled-in
+TinyOS directory.
+.TP
+\fB-tossim\fR
+Compile for the TOSSIM environment rather than a native platform. Every
+directory in the search path will be duplicated, with the first copy having
+\fB/sim\fR appended to it.
+.TP
+\fB-print-tosdir\fR
+Print the TinyOS directory to be used and exit, taking into account the
+\fB-tosdir\fR option and \fBTOSDIR\fR environment variable. No compilation
+occurs when \fB-print-tosdir\fR is used.
+.TP
+\fB-print-platforms\fR
+Print the valid TinyOS platforms, including those made available by
+explicit \fB-I\fR directives (see \fB-target\fR option).
+.TP
+\fB-print-target\fR
+Print the name of the selected target. Most useful when \fB-target\fR is not
+specified.
+.TP
+\fB-nostdinc\fR
+Do not automatically include the TinyOS directories in the search path. See
+the discussion of search paths below for more details.
+.TP
+\fB-board=\fIY\fR
+Specify one (or more) sensor boards. This effects the search path and
+preprocessor symbols. The set of boards is set by the TinyOS distribution
+(see the \fBtos/sensorboards\fR directory). As with targets, a sensorboard
+directory can be made available via an explicit \fB-I\fR directive
+(sensorboard directories are recognised by the presence of a \fB.sensor\fR
+file).
+.TP
+\fB--version\fR
+Print the version of \fBncc\fR, \fBnescc\fR and of the gcc compiler
+used for the selected target.
+.SH EXAMPLES
+
+If you wish to compile a component Bar.nc to a C file, you can do:
+.IP
+ncc -c -o /dev/null -fnesc-cfile=Bar.c Bar.nc
+.SH SEARCH PATH
+
+\fBncc\fR performs the following substitutions on the directories specified
+with the \fB-I\fR option: \fB%T\fR is replaced by the TinyOS directory,
+\fB%p\fR is replaced by the selected target, \fB%%\fR is replaced by
+\fB%\fR.
+
+Except when \fB-nostdinc\fR is specified, the search path for nesC
+components is as follows, where \fItosdir\fR is the TinyOS directory
+requested and \fItarget\fR is the selected target:
+.IP *
+The current directory
+.IP *
+\fB-I\fR directives (in option order)
+.IP *
+%T/sensorboards/\fIboardname\fR, for each
+\fB-board=\fIboardname\fR option specified (in option order) -
+except if the sensorboard was found via an explicit -I directive
+.IP *
+%T/platform/%p  - except if the platform was found via an
+explicit -I directive
+.IP *
+Additional directories requested by the selected target (e.g.,
+%T/platform/avrmote for the mica target)
+.IP *
+%T/interfaces
+.IP *
+%T/system
+.IP *
+%T/lib
+.IP *
+\fBNESCPATH\fR environment variable directories (note that %T and %p
+subsitution is not performed on these directories).
+.PP
+When \fB-nostdinc\fR is specified, the search path is simply:
+.IP *
+The current directory
+.IP *
+\fB-I\fR directives
+.IP *
+\fBNESCPATH\fR environment variable directories
+.SH PREPROCESSOR SYMBOLS
+
+In addition to the preprocessor symbols defined by \fBgcc\fR and
+\fBnescc\fR, \fBncc\fR defines:
+.TP
+\fBPLATFORM_\fItarget\fR 
+where \fItarget\fR is the selected target name, converted to upper case
+.TP
+\fBBOARD_\fIboardname\fR 
+for each \fB-board=\fIboardname\fR option (the
+boardname is converted to upper case)
+.SH ENVIRONMENT VARIABLES
+
+.TP
+.B TOSDIR
+If the \fB-tosdir=\fIdir\fR option is not used, the \fBTOSDIR\fR
+environment variable specifies the location of TinyOS.
+.SH SEE ALSO
+
+.IR gcc (1),
+platform-specific gcc,
+.IR nescc (1)
+.SH NOTES
+
+\fBncc\fR is built over \fBnescc\fR, which handles the non-TinyOS-specific
+functionality of \fBncc\fR. Users of nesC in a non-TinyOS context may
+prefer to use \fBnescc\fR (see the source code of ncc and nescc for
+details).
diff --git a/tools/tinyos/ncc/ncc.in b/tools/tinyos/ncc/ncc.in
new file mode 100644
index 00000000..7ae3c0a2
--- /dev/null
+++ b/tools/tinyos/ncc/ncc.in
@@ -0,0 +1,306 @@
+#!@pathperl@
+# -*- perl -*-
+
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Configuration
+$TOSDIR = "@TOSDIR@";
+$TOSDIR = $ENV{"TOSDIR"} if defined($ENV{"TOSDIR"});
+$nescc = "@nescc_prefix@/bin/nescc";
+$tossim = 0;
+
+# Support platform directory renaming for 2.x
+if (-d "$TOSDIR/platform") {
+    $platform = "platform";
+}
+else {
+    $platform = "platforms";
+}
+
+# Have fun with the arguments
+
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $strip = 0;
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-target=(.*)/) {
+	    &fail("multiple targets specified") if defined($target);
+	    $target = $1;
+	    $strip = 1;
+	}
+	elsif (/^-tosdir=(.*)/) {
+	    $TOSDIR = $1;
+	    $strip = 1;
+	}
+	elsif (/^-nostdinc$/) {
+	    $nostdinc = 1;
+	}
+	elsif (/^-board=(.*)/) {
+	    push @boards, $1;
+	    $strip = 1;
+	}
+	elsif (/^-print-tosdir$/) {
+	    $print_tosdir = 1;
+	    $strip = 1;
+	}
+	elsif (/^-print-target$/) {
+	    $print_target = 1;
+	    $strip = 1;
+	}
+	elsif (/^-print-platforms$/) {
+	    $print_platforms = 1;
+	    $strip = 1;
+	}
+	elsif (/^-g$/) {
+	    $debugging = 1;
+	}
+	elsif (/^-v$/) {
+	    $verbose = 1;
+	}
+	elsif (/^-tossim$/) {
+	    $tossim = 1;
+            $strip = 1;
+	}
+	elsif (/^-I/) {
+	    ($i, $file) = &extractarg($i);
+	    $strip = 1;
+	    push @includes, $file;
+	}
+	elsif (/^--version$/) {
+	    $print_version = 1;
+	}
+    } 
+
+    push @new_args, $_ if !$strip;
+}
+
+if ($print_version) {
+    print "ncc: @PACKAGE_VERSION@\n";
+}
+
+# Remove trailing / from TOSDIR, if any (it confuses the topdir stuff)
+chop $TOSDIR if $TOSDIR =~ m!./$!;
+
+if ($print_tosdir)
+{
+    print $TOSDIR, "\n";
+    exit 0;
+}
+
+if ($print_platforms)
+{
+    print join(" ", all_platforms()), "\n";
+    exit 0;
+}
+
+if ($tossim) {
+  push @new_args, "-DTOSSIM";
+}
+
+if (!defined $target) {
+    if (open DEFTARGET, "$TOSDIR/.default-platform") {
+	$target = ;
+	chomp $target;
+    }
+    else {
+	$target = "@default_target@";
+    }
+}
+
+if ($print_target) {
+    print $target, "\n";
+    exit 0;
+}
+
+# First see if the directory for this platform was explicitly specified
+foreach $dir (@includes) {
+    if ($dir =~ m!/$target/?$! && -f "$dir/.platform") {
+	$platform_def = "$dir/.platform";
+	last;
+    }
+}
+
+if (!-f $platform_def) {
+    # Next, check if it's a "plain" platform
+    if (-f "$TOSDIR/$platform/$target/.platform") {
+	$platform_def = "$TOSDIR/$platform/$target/.platform";
+    }
+    else {
+	# Finally, see if it's in a platform family
+	opendir PLATFORMS, "$TOSDIR/$platform";
+	foreach $dir (readdir PLATFORMS) {
+	    if (-f "$TOSDIR/$platform/$dir/.family") {
+		if (-f "$TOSDIR/$platform/$dir/$target/.platform") {
+		    $platform_def = "$TOSDIR/$platform/$dir/$target/.platform";
+		    $family_def = "$TOSDIR/$platform/$dir/.family";
+		    last;
+		}
+	    }
+	}
+	closedir PLATFORMS;
+    }
+}
+
+# Use sim directory with tossim
+$platform_def =~ s!\.platform$!sim/.platform! if $tossim;
+$family_def =~ s!\.family$!sim/.family! if $tossim && $family_def;
+
+if (!-f $platform_def) {
+    print STDERR "Unknown target $target\n";
+    print STDERR "Known targets for TinyOS directory $TOSDIR\n";
+    print STDERR "and the specified include directories are:\n";
+
+    @platforms = all_platforms();
+    if (@platforms) {
+	print STDERR "  ", join(" ", @platforms);
+    }
+    else {
+	print STDERR "none.";
+    }
+    print STDERR "\n";
+    exit 2;
+}
+
+# Setup sensor boards
+push @includes, map "%T/sensorboards/$_", @boards unless $nostdinc;
+unshift @new_args, map "-DBOARD_\U$_", @boards;
+# Execute .sensor file in selected sensor board directories if it exists
+$i = 0;
+BOARD: while ($i <= $#boards) {
+    $board = $boards[$i];
+
+    # First check include path for a .sensor file for this board
+    foreach $dir (@includes) {
+	if ($dir =~ m!/$board/?$! && -f "$dir/.sensor") {
+	    # Remove from @boards so that we don't add sensorboards/$board
+	    # to the search path
+	    splice @boards, $i, 1;
+	    do "$dir/.sensor";
+	    next BOARD;
+	}
+    }
+
+    # If none found, check the standard sensorboards directory
+    $bspec = &idir_subst("%T/sensorboards/$board/.sensor");
+    do $bspec if -f $bspec;
+
+    $i++;
+}
+
+# Setup platform
+$platform_dir = $platform_def;
+$platform_dir =~ s!/\.platform$!!;
+push @includes, $platform_dir unless $nostdinc;
+do $platform_def;
+do $family_def if -f $family_def;
+unshift @new_args, "-DPLATFORM_\U$target";
+
+push @new_args, @opts;
+
+# old nesdoc: set the default topdir based on TOSDIR
+my ($tosparent) = ($TOSDIR =~ m!^(.*)/.*?$!);
+unshift @new_args, "-topdir=$tosparent";
+
+unshift @new_args, "-fnesc-include=tos";
+unshift @new_args, "$nescc";
+
+if (!$nostdinc) {
+    push @includes, map "%T/$platform/$_", @commonplatforms;
+    push @includes, "%T/interfaces";
+    push @includes, "%T/types";
+    push @includes, "%T/system";
+}
+
+
+if ($tossim) {
+  foreach $idir (@includes) {
+    $idir = &idir_subst($idir);
+    push @new_args, "-I$idir/sim";
+  }
+  $tossim_dir = &idir_subst("-I%T/lib/tossim");
+  push @new_args, $tossim_dir;
+}
+foreach $idir (@includes) {
+    $idir = &idir_subst($idir);
+    push @new_args, "-I$idir";
+}
+
+
+
+
+print STDERR join(' ', @new_args), "\n" if $verbose;
+
+exec @new_args;
+print STDERR "Couldn't execute nescc\n";
+exit 2;
+
+sub extractarg {
+    local ($i) = @_;
+
+    if (length($ARGV[$i]) == 2) {
+	$arg = $ARGV[++$i];
+    }
+    else {
+	$arg = substr($ARGV[$i], 2);
+    }
+    return ($i, $arg);
+}
+
+sub idir_subst {
+    local ($idir) = @_;
+    local $idx = 0;
+
+    while (($idx = index $idir, "%", $idx) >= 0) {
+	$char = substr $idir, $idx + 1, 1;
+	$rep = 0;
+	$rep = "%" if $char eq "%";
+	$rep = $TOSDIR if $char eq "T";
+	$rep = $target if $char eq "p";
+	&fail("unknown include-path substitution %" . $char) if !$rep;
+	substr($idir, $idx, 2) = $rep;
+	$idx += length $rep;
+    }
+    return $idir;
+}
+
+sub fail {
+    print STDERR "$_[0]\n";
+    exit 2;
+}
+
+sub push_platform {
+    my ($p) = @_;
+
+    push @platforms, $p unless grep $_ eq $p, @platforms;
+}
+
+sub all_platforms() {
+  local(@platforms);
+
+  foreach $dir (@includes) {
+    push_platform($1) if -f "$dir/.platform" && $dir =~ m!/([^/]*)/?$!;
+  }
+
+  if (opendir PLATFORMS, "$TOSDIR/$platform") {
+      foreach $d (readdir PLATFORMS) {
+	  push_platform($d) if (-f "$TOSDIR/$platform/$d/.platform");
+	  if (-f "$TOSDIR/$platform/$d/.family") {
+	      if (opendir SUBPLATFORMS, "$TOSDIR/$platform/$d") {
+		  foreach $subdir (readdir SUBPLATFORMS) {
+		      push_platform($subdir) if (-f "$TOSDIR/$platform/$d/$subdir/.platform");
+		  }
+	      }
+	      closedir SUBPLATFORMS;
+	  }
+      }
+      closedir PLATFORMS;
+  }
+
+  return @platforms;
+}
diff --git a/tools/tinyos/ncc/ncg.1 b/tools/tinyos/ncc/ncg.1
new file mode 100644
index 00000000..ef2bf896
--- /dev/null
+++ b/tools/tinyos/ncc/ncg.1
@@ -0,0 +1,30 @@
+.TH ncg 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+ncg - extract constants from TinyOS files
+.SH SYNOPSIS
+
+\fBncg\fR [any ncc option] [tool-specific options]
+    [\fB-o\fR \fIoutput-file\fR]
+    \fItool\fR \fInesC-file\fR \fIfilenames-or-constant-names...\fR
+.SH DESCRIPTION
+
+\fBnescc-ncg\fR is a tool to extract constants from TinyOS files for use with
+other applications. It is typically used in conjunction with
+\fBmig\fR (which generates code to process TinyOS messages) to extract
+constants that are used in particular messages (e.g., constants
+representing various commands).
+
+\fBncg \fIoptions\fR is equivalent to \fBnescc-ncg -nescc=ncc
+\fIoptions\fR. For details on \fBncg\fR's output and options, please read
+see the \fBnescc-ncg\fR man page.
+.SH EXAMPLE
+    APPDIR=`ncc -print-tosdir`/lib/FS
    
+    ncg -I%T/lib/FS -java-classname=net.tinyos.matchbox.FS \\
+      java $APPDIR/Remote.nc Matchbox.h Remote.h -oFS.java
+.SH SEE ALSO
+
+.IR ncc (1),
+.IR nescc-ncg (1),
+.IR mig (1)
diff --git a/tools/tinyos/ncc/ncg.in b/tools/tinyos/ncc/ncg.in
new file mode 100644
index 00000000..6bcb50d2
--- /dev/null
+++ b/tools/tinyos/ncc/ncg.in
@@ -0,0 +1,16 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+
+prefix="@prefix@";
+exec_prefix="@exec_prefix@";
+exec "@nescc_prefix@/bin/nescc-ncg" "-nescc=$exec_prefix/bin/ncc" "$@"
+err=$?
+echo "Couldn't execute @nescc_prefix@/bin/nescc-ncg" >&2
+exit $err
diff --git a/tools/tinyos/ncc/nesdoc-py/.cvsignore b/tools/tinyos/ncc/nesdoc-py/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/ncc/nesdoc-py/Makefile.am b/tools/tinyos/ncc/nesdoc-py/Makefile.am
new file mode 100644
index 00000000..28e01153
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/Makefile.am
@@ -0,0 +1,23 @@
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+AUTOMAKE_OPTIONS = foreign
+
+nesdocdir=$(libdir)/tinyos/nesdoc
+
+nesdoc_DATA = 	__init__.py 	\
+		archive.py	\
+		components.py	\
+		generators.py	\
+		genhtml.py	\
+		graph.py	\
+		html.py		\
+		index.py	\
+		interfaces.py	\
+		utils.py	\
+                nesdoc.css
diff --git a/tools/tinyos/ncc/nesdoc-py/__init__.py b/tools/tinyos/ncc/nesdoc-py/__init__.py
new file mode 100644
index 00000000..e69de29b
diff --git a/tools/tinyos/ncc/nesdoc-py/archive.py b/tools/tinyos/ncc/nesdoc-py/archive.py
new file mode 100644
index 00000000..d0acc400
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/archive.py
@@ -0,0 +1,247 @@
+# -*- python -*-
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Archive nesdoc information from a given compilation in a nesdoc repository.
+#
+# A nesdoc repository is a directory containing separate XML files for each
+# known interface and component (in the "interfaces" and "components"
+# subdirectories respectively). These files have basically the same format
+# as a single interfacedef and component element from the nesC XML dump
+# format, with the following changes:
+#  - all "interfacedef", "interfacedef-ref", "component" and "component-ref"
+#    elements have an extra "nicename" attribute which stores the full
+#    `package name' for the corresponding element (see below for details)
+#  - components have two extra sub-elements:
+#    o "specification": a list of the "interface" and "function"
+#       elements that form the components specification
+#    o "referenced": the "interface" and "function" elements referenced
+#      from the wiring graph
+#      the "component" elements referenced from these "interface" and
+#      "function" elements
+#      (but the "referenced" list excludes self-references, i.e., the
+#      component itself and the "interface" and "function" elements
+#      already found in "specification")
+
+# A `package name' is a component or interface name prefixed with its path
+# relative to a set of "top directories", and with path separators replaced
+# by dots. The root of a TinyOS installation is usually the single top
+# directory, but more can be specified with the -topdir option.
+
+
+from xml.dom import *
+from xml.dom.minidom import *
+from sys import *
+from getopt import getopt
+from string import *
+from nesdoc.utils import *
+import os
+
+def check(x):
+  if not x:
+    print "%s is not a nesC documentation file" % argv[1]
+    exit(2)
+  return x
+
+def get1(x, tag):
+  return check(xml_tagfind(x, tag))
+
+def usage():
+  print "Usage: %s [-t dir] [--topdir dir] [--preserve] repository" % argv[0]
+  print "  where -t/--topdir specify prefixes to remove from file names"
+  print "  to create nice, package-like names for interface and components"
+  print "  (based on their full filename)."
+  print "  If --preserve is specified, existing XML files are preserved."
+  print "  The XML input is read from stdin."
+
+# Return package name for elem, or None if no valid name is found
+# (i.e., if the element's file name does not match any known topdir)
+def packagename(elem):
+  loc = elem.getAttribute("loc")
+  colon = index(loc, ":")
+  filename = canonicalise(loc[colon + 1:])
+  for dir in topdirs:
+    dirlen = len(dir)
+    if filename[0:dirlen] == dir:
+      filename = filename[dirlen:]
+      break
+  if filename[0] == "/":
+    return None
+  else:
+    return replace(replace(filename, ".nc", ""), "/", ".")
+
+# simplify file names (for generating package names, so no need to
+# preserve path validity):
+#  empty strings become ./
+#  windows paths are made unix-like:
+#    c: becomes /c/
+#    all \ become /
+def canonicalise(name):
+  if name == "":
+    name = "."
+  if (name[1:2] == ":"): # windows disk names
+    name = "/%s/%s" %(name[0], name[2:])
+  name = replace(name, "\\", "/")
+  return name
+  
+# canonicalise a directory. like canonicalise, but ensures
+# there is trailing /
+def canonicalisedir(dirname):
+  dirname = canonicalise(dirname)
+  if dirname[-1] != "/":
+    return dirname + "/"
+  else:
+    return dirname
+
+# option processing. See usage string for details.
+(opts, args) = getopt(argv[1:], "t:", [ "topdir=", "preserve" ])
+topopts = filter(lambda (x): x[0] != "--preserve", opts)
+preserve = filter(lambda(x): x[0] == "--preserve", opts) != []
+topdirs = map(lambda (x): canonicalisedir(x[1]), topopts)
+if len(args) != 1:
+  usage()
+
+repository = args[0]
+try:
+  dom = parse(stdin)
+except xml.parsers.expat.ExpatError:
+  nfail("nesdoc failed: no valid input")
+creator = xml.dom.minidom.getDOMImplementation()
+check(dom.documentElement.tagName == "nesc")
+
+interfacedefs = get1(dom, "interfacedefs")
+components = get1(dom, "components")
+interfaces = get1(dom, "interfaces")
+functions = get1(dom, "functions")
+
+# index everything
+refidx = {}
+qnameidx = {}
+for x in interfaces.getElementsByTagName("interface"):
+  refidx[x.getAttribute("ref")] = x
+for x in functions.getElementsByTagName("function"):
+  refidx[x.getAttribute("ref")] = x
+for x in components.getElementsByTagName("component"):
+  qnameidx[x.getAttribute("qname")] = x
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  qnameidx[x.getAttribute("qname")] = x
+
+# collect specification elements by component
+speclist = {}
+# interfaces
+for x in interfaces.getElementsByTagName("interface"):
+  incomponent = get1(x, "component-ref").getAttribute("qname")
+  if speclist.has_key(incomponent):
+    speclist[incomponent].append(x)
+  else:
+    speclist[incomponent] = [x]
+# and bare commands, events
+for x in functions.getElementsByTagName("function"):
+  # hack: tasks don't show up with a command/event attribute
+  if x.hasAttribute("event") or x.hasAttribute("command"):
+    incomponent = get1(x, "component-ref").getAttribute("qname")
+    if speclist.has_key(incomponent):
+      speclist[incomponent].append(x)
+    else:
+      speclist[incomponent] = [x]
+
+# add nicename (i.e., with package prefix) attributes to all interfacedef,
+# interfacedef-ref, component and component-ref elements
+nicenames = {}
+def define_nicename(x):
+  name = x.getAttribute("qname")
+  nicename = packagename(x)
+  if nicename == None:
+    nicename = name
+  nicenames[name] = nicename
+def set_nicename(x):
+  x.setAttribute("nicename", nicenames[x.getAttribute("qname")])
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  define_nicename(x)
+  set_nicename(x)
+for x in components.getElementsByTagName("component"):
+  define_nicename(x)
+  set_nicename(x)
+for x in dom.getElementsByTagName("interfacedef-ref"):
+  set_nicename(x)
+for x in dom.getElementsByTagName("component-ref"):
+  set_nicename(x)
+
+# save xml information per-interface and per-component in the specified
+# repository
+nmkdir(repository)
+chdir(repository)
+nmkdir("interfaces")
+nmkdir("components")
+
+# save interface definitions
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  name = x.getAttribute("qname")
+  nicename = x.getAttribute("nicename")
+  filename = "interfaces/%s.xml" % nicename
+  if preserve and os.path.exists(filename):
+    continue
+  print "interface %s (%s)" % (name, nicename)
+  doc = creator.createDocument(None, None, None)
+  copy = x.cloneNode(True)
+  doc.appendChild(copy)
+  ifile = file(filename, "w")
+  doc.writexml(ifile)
+  doc.unlink()
+  ifile.close()
+
+# save component definitions, excluding instantiations
+for x in components.getElementsByTagName("component"):
+  if len(x.getElementsByTagName("instance")) == 0:
+    # not an instance
+    name = x.getAttribute("qname")
+    nicename = x.getAttribute("nicename")
+    filename = "components/%s.xml" % nicename
+    if preserve and os.path.exists(filename):
+      continue
+    
+    print "component %s (%s)" % (name, nicename)
+    doc = creator.createDocument(None, None, None)
+    # copy component and create its specification
+    copy = x.cloneNode(True)
+    spec = dom.createElement("specification")
+    copy.appendChild(spec)
+    try:
+      for intf in speclist[name]:
+        spec.appendChild(intf.cloneNode(True))
+    except KeyError:
+      0
+
+    # collect information used in wiring graph
+    allelems = {}
+    allcomps = {}
+    def addelem(wireref):
+      actualref = xml_tagset(wireref, ["interface-ref", "function-ref"])
+      elemref = actualref.getAttribute("ref")
+      elem = refidx[elemref]
+      compname = xml_tag(elem, "component-ref").getAttribute("qname")
+      # exclude self-references, those are in the specification already
+      if compname != name:
+        allelems[elemref] = True
+        allcomps[compname] = True
+    for wireref in x.getElementsByTagName("from"): addelem(wireref)
+    for wireref in x.getElementsByTagName("to"): addelem(wireref)
+
+    # create the referenced element which will store the wiring information
+    refd = dom.createElement("referenced")
+    copy.appendChild(refd)
+    for ref in allelems.keys():
+      refd.appendChild(refidx[ref].cloneNode(True))
+    for qname in allcomps.keys():
+      refd.appendChild(qnameidx[qname].cloneNode(True))
+    
+    doc.appendChild(copy)
+    ifile = file(filename, "w")
+    doc.writexml(ifile)
+    doc.unlink()
+    ifile.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/components.py b/tools/tinyos/ncc/nesdoc-py/components.py
new file mode 100644
index 00000000..f6ee41ac
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/components.py
@@ -0,0 +1,120 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate HTML file for a component
+
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+
+__all__ = [ "generate_component" ]
+
+# Output HTML describing a specification element
+def spec_signature_html(ht, elem):
+  if elem.tagName == "function":
+    ht.pfnsig(elem, lambda (name): "%s" % name)
+  else:
+    assert elem.tagName == "interface"
+    instance = xml_tag(elem, "instance")
+    idef = xml_tag(instance, "interfacedef-ref")
+    arguments = xml_tag(instance, "arguments")
+    parameters = xml_tag(elem, "interface-parameters")
+    instance_name = elem.getAttribute("name")
+    def_name = idef.getAttribute("qname")
+    fullname = idef.getAttribute("nicename")
+
+    sig = 'interface     %s' % (fullname, def_name)
+    if arguments:
+      iargs = join(map(lambda (arg): typename_str(arg, ""),
+                       xml_elements(arguments)), ", ")
+      sig += "<" + iargs + ">"
+    if instance_name != def_name:
+      sig += " as %s" % instance_name
+    if parameters:
+      iparms = join(map(lambda (arg): typename_str(arg, ""),
+                        xml_elements(parameters)),  ", ")
+      sig += "[" + iparms + "]"
+    ht.p(sig)
+
+# Output HTML for specification elements elems, with heading name
+# If elems list is empty, do nothing.
+def generate_speclist(ht, name, elems):
+  if len(elems) > 0:
+    ht.tag("p")
+    ht.heading(name)
+    for elem in elems:
+      ht.func_sig_start();
+      spec_signature_html(ht, elem)
+      doc = nd_doc_short(elem)
+      if doc != None:
+        ht.push("menu")
+        ht.pln(doc)
+        ht.popln()
+      ht.func_sig_stop();
+
+def interface_compare(x, y):
+  if cmp(x.getAttribute("qname").lower(), y.getAttribute("qname").lower()) == 0 :
+    return cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower())
+  return cmp(x.getAttribute("qname").lower(), y.getAttribute("qname").lower())
+
+def generate_component(comp):
+  nicename = comp.getAttribute("nicename")
+  ht = Html("chtml/%s.html" % nicename )
+  if xml_tag(comp, "module"):
+    kind = "module"
+  else:
+    kind = "configuration"
+  ht.title("Component: " + nicename)
+  ht.body()
+  ht.push("h2");
+  ht.p("Component: " + nicename)
+  ht.popln();
+  
+  # The source code name and documentation
+  ht.push("b")
+  parameters = xml_tag(comp, "parameters")
+  if parameters:
+    ht.p("generic ")
+  ht.p(kind + " " + comp.getAttribute("qname"))
+  if parameters:
+    ht.p(parameter_str(parameters))
+  ht.pop()
+  ht.startline()
+  idoc =  nd_doc_long(comp)
+  if idoc != None:
+    ht.tag("p")
+    ht.pdoc(idoc)
+  ht.tag("p")
+
+  spec = xml_tag(comp, "specification")
+  interfaces = spec.getElementsByTagName("interface")
+  functions = spec.getElementsByTagName("function")
+  spec = interfaces + functions
+  provided = filter(lambda (x): x.getAttribute("provided") == "1", spec)
+  used = filter(lambda (x): x.getAttribute("provided") == "0", spec)
+
+  # sort arrays
+  provided.sort(interface_compare)
+  used.sort(interface_compare)
+
+  generate_speclist(ht, "Provides", provided)
+  generate_speclist(ht, "Uses", used)
+
+  # wiring graph for configurations
+  if xml_tag(comp, "configuration"):
+    ht.tag("p")
+    ht.heading("Wiring")
+    ht.tag("p")
+    ht.pushln("map", 'name="comp"')
+    cmap = file("chtml/%s.cmap" % nicename)
+    for line in cmap.readlines():
+      ht.pln(line)
+    cmap.close()
+    ht.popln()
+    ht.tag("img", 'src="%s.gif"' % nicename, 'usemap="#comp"', 'id=imgwiring')
+  ht.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/generators.py b/tools/tinyos/ncc/nesdoc-py/generators.py
new file mode 100644
index 00000000..d89f4135
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/generators.py
@@ -0,0 +1,230 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Two groups of functions
+# A) Some functions to generate strings or HTML for various nesdoc entities
+#    (end in _str or _html respectively)
+# B) Utility functions and values for the nesdoc XML format
+
+from xml.dom.minidom import *
+from string import *
+from nesdoc.utils import *
+
+# All possible tags for types
+type_tags = [
+  "type-int",
+  "type-float",
+  "type-complex-int",
+  "type-complex-float",
+  "type-void",
+  "type-qualified",
+  "type-pointer",
+  "type-array",
+  "type-function",
+  "type-tag",
+  "type-interface",
+  "type-component",
+  "type-var" ]
+
+# Return the long nesdoc string in x. If none is present, return the short
+# nesdoc string. If no nesdoc string at all, return None.
+def nd_doc_long(x):
+  doc = xml_tag(x, "documentation")
+  if not doc:
+    return None
+  str = xml_tag(doc, "long")
+  if not str:
+    str = xml_tag(doc, "short")
+  return xml_text(str)
+
+# Return the short nesdoc string in x. None if none present.
+def nd_doc_short(x):
+  doc = xml_tag(x, "documentation")
+  if not doc:
+    return None
+  return xml_text(xml_tag(doc, "short"))
+
+# find the first docstring in 's' at or after 'index'
+# a docstring is an @ preceded by whitespace and followed by
+# at least one letter
+def _find_docstring_tag(s, index):
+  while True:
+    at = find(s, "@", index)
+    if at <= 0: return at
+    if at == len(s) - 1: return -1
+    if s[at - 1].isspace() and s[at + 1].isalpha(): return at
+    index = at + 1
+
+# process a docstring s. returns a tuple of
+#  - base documentation
+#  - list of (tag, description) pairs (in the same order as in s)
+def nd_docstring(s):
+  tags = []
+  at = _find_docstring_tag(s, 0)
+  if at < 0:
+    return (s, tags)
+  base = s[:at]
+  while at >= 0:
+    # find end of tag
+    tagend = at + 1
+    while tagend < len(s) and not s[tagend].isspace():
+      tagend += 1
+    nextat = _find_docstring_tag(s, tagend)
+    if nextat == -1:
+      tagvalend = len(s)
+    else:
+      tagvalend = nextat
+    tags.append((s[at + 1:tagend], s[tagend + 1:tagvalend]))
+    at = nextat
+  return (base, tags)
+
+# return a string for contstant cstr (from a nesdoc XML constant attribute)
+def nd_constant_str(cstr):
+  if cstr[0] == 'I' or cstr[0] == 'F':
+    return cstr[1:]
+  elif cstr[0] == 'S':
+    # XXX: should do a lot more.
+    s = cstr[1:].replace('"', '\\"')
+    return '"' + s + '"'
+  elif cstr[0] == 'U':
+    return "/* unknown */"
+  elif cstr[0] == 'V':
+    return "/* not-constant */"
+  else:
+    assert False
+
+# Type encoders for the various kinds of types
+
+def _typename_simple(xmltype, name, quals, isstar):
+  return (quals + xmltype.getAttribute("cname"), name)
+
+def _typename_void(xmltype, name, quals, isstar):
+  return (quals + "void", name)
+
+def _typename_qualified(xmltype, name, quals, isstar):
+  silly = [quals]
+  def add_qualifier(q):
+    if xmltype.hasAttribute(q):
+      silly[0] += q + " "
+  add_qualifier("volatile")
+  add_qualifier("const")
+  add_qualifier("__restrict")
+  return typename_full(xml_tagset(xmltype, type_tags), name, silly[0], isstar)
+
+def _typename_ptr(xmltype, name, quals, isstar):
+  name = "*" + quals + name
+  return typename_full(xml_tagset(xmltype, type_tags), name, "", True)
+
+def _typename_array(xmltype, name, quals, isstar):
+  assert quals == ""
+  if isstar:
+    name = "(" + name + ")"
+  size = xml_tag(xmltype, "elements")
+  if size == "V":
+    name += "[]"
+  else:
+    name += "[%s]" % constant_str(size)
+  return typename_full(xml_tagset(xmltype, type_tags), name, "", False)
+
+def _typename_tag(xmltype, name, quals, isstar):
+  tagref = xml_idx(xmltype, 0)
+  # the embedded element is named -ref
+  head = "%s %s" % (tagref.tagName[:-4], tagref.getAttribute("name"))
+  return (quals + head, name)
+
+def _typename_var(xmltype, name, quals, isstar):
+  varref = xml_idx(xmltype, 0)
+  return (quals + varref.getAttribute("name"), name)
+
+def _typename_fn(xmltype, name, quals, isstar):
+  returntype = xml_idx(xmltype, 0)
+  parameters = xml_idx(xmltype, 1)
+  if isstar:
+    name = "(" + name + ")"
+  args = ""
+  if parameters != None:
+    for x in parameters.childNodes:
+      if x.nodeType == Node.ELEMENT_NODE:
+        ptype = typename_str(x, "")
+        if args != "":
+          args = args + ", "
+        args += ptype
+    if xmltype.hasAttribute("varargs"):
+      args += ", ..."
+  name += "(" + args + ")"
+  if quals != "":
+    name += quals[:-1] # remove trailing space
+  return typename_full(returntype, name, "", False)
+
+_type_printers = {
+  "type-int" : _typename_simple,
+  "type-float" : _typename_simple,
+  "type-complex-int" : _typename_simple,
+  "type-complex-float" : _typename_simple,
+  "type-void" : _typename_void,
+  "type-qualified" : _typename_qualified,
+  "type-pointer" : _typename_ptr,
+  "type-array" : _typename_array,
+  "type-function" : _typename_fn,
+  "type-tag" : _typename_tag,
+  "type-interface" : _typename_tag,
+  "type-component" : _typename_tag,
+  "type-var" : _typename_var
+  };
+
+# Return a (head, body) pair for type xmltype, declaring name (a string)
+# with type qualifiers quals (a string). isstar should be true if name
+# starts with a *.
+# The user-friendly representation for this type is head + " " + body
+def typename_full(xmltype, name, quals, isstar):
+  # hack around nesC 1.2.1 schema bug (uses typedef, not typename here)
+  tdef = xml_tagset(xmltype, ["typedef", "typename"])
+  if tdef:
+    return (quals + xml_tag(tdef, "typedef-ref").getAttribute("name"), name)
+  else:
+    return _type_printers[xmltype.tagName](xmltype, name, quals, isstar)
+
+# Return a user-friendly string for a C declaration of name with type xmltype
+def typename_str(xmltype, name):
+  (head, body) = typename_full(xmltype, name, "", False)
+  if body == "":
+    return head
+  else:
+    return head + " " + body
+
+# Return a user-friendly string for a parameter list
+def parameter_str(xmlparameters):
+  args = ""
+  if xmlparameters != None:
+    for parm in xmlparameters.childNodes:
+      if parm.nodeType == Node.ELEMENT_NODE:
+        if args != "":
+          args = args + ", "
+        if parm.tagName == "variable" or parm.tagName == "constant":
+          vtype = xml_tagset(parm, type_tags)
+          args += typename_str(vtype, parm.getAttribute("name"))
+        elif parm.tagName == "typedef":
+          args += "typedef " + parm.getAttribute("name")
+        elif parm.tagName == "varargs":
+          args += ", ..."
+  return "(" + args + ")"
+
+# Return a user-friendly string for function xmlfn. The namedecorator
+# function is called with the xmlfn's name as argument to get the final
+# form of the function's name. Use this to, e.g., make the name an HTML link.
+def function_signature_str(xmlfn, namedecorator):
+  sig = ""
+  if xmlfn.hasAttribute("command"):
+    sig += "command "
+  if xmlfn.hasAttribute("event"):
+    sig += "event "
+  type = xml_tag(xmlfn, "type-function")
+  returntype = xml_idx(type, 0)
+  name = xmlfn.getAttribute("name")
+  parameters = xml_tag(xmlfn, "parameters")
+  return sig + typename_str(returntype, namedecorator(name) + parameter_str(parameters))
diff --git a/tools/tinyos/ncc/nesdoc-py/genhtml.py b/tools/tinyos/ncc/nesdoc-py/genhtml.py
new file mode 100644
index 00000000..6aa3e6d9
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/genhtml.py
@@ -0,0 +1,91 @@
+# -*- python -*-
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# HTML generation from the XML files in a nesdoc repository.
+#
+# The HTML files are placed in three directories:
+# - ihtml: HTML files for interfaces
+# - chtml: HTML (and support) files for components
+# - index: HTML index files
+#
+# HTML files for configurations include a wiring graph. Graphviz version 1.10
+# (and, hopefully, later versions) are supported.
+#
+# Only components and interfaces in "packages" (i.e., with a package prefix
+# in their nicename attribute - see nesdoc-archive) are indexed - files
+# from applications are skipped. However, these files are still present in
+# the ihtml and chtml directories
+
+from nesdoc.utils import *
+from nesdoc.interfaces import generate_interface
+from nesdoc.components import generate_component
+from nesdoc.graph import generate_graph
+from nesdoc.index import generate_indices
+from sys import *
+from re import search, compile
+from shutil import copyfile
+import os
+from nesdoc.html import *
+
+param_pattern = compile("^\s*([a-zA-Z0-9_]+)")
+
+# Print @param doc tags as Parameters:, and put parameter name as 
+def param_doctag(val):
+  name = param_pattern.search(val)
+  if name:
+    val = "" + name.group(1) + " - " + val[name.end():]
+  return ("parameters", val)
+
+# Print @return tags as Returns:
+def return_doctag(val):
+  return ("returns", val)
+  
+register_doctag("param", param_doctag)
+register_doctag("return", return_doctag)
+
+# Generate HTML files, and a global index for all interfaces and components
+# in the specified repository
+repository = argv[1]
+try:
+  chdir(repository)
+  
+  # set up directories
+  nmkdir("ihtml")
+  nmkdir("chtml")
+  nmkdir("index")
+
+  # copy stylesheet
+  pathname = os.path.abspath(os.path.dirname(argv[0]))
+  copyfile(pathname + "/nesdoc.css", "chtml/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "ihtml/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "index/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "nesdoc.css")
+
+  compfiles = listdir("components")
+  intffiles = listdir("interfaces")
+  
+except OSError:
+  nfail("Couldn't access nesdoc repository " + repository)
+
+for intf in intffiles:
+  if search("\\.xml$", intf):
+    stderr.write("interface " + intf + "\n")
+    ixml = parse("interfaces/" + intf)
+    generate_interface(ixml.documentElement)
+    ixml.unlink()
+
+for comp in compfiles:
+  if search("\\.xml$", comp):
+    stderr.write("component " + comp + "\n")
+    ixml = parse("components/" + comp)
+    generate_graph(ixml.documentElement)
+    generate_component(ixml.documentElement)
+    ixml.unlink()
+
+generate_indices(compfiles, intffiles)
diff --git a/tools/tinyos/ncc/nesdoc-py/graph.py b/tools/tinyos/ncc/nesdoc-py/graph.py
new file mode 100644
index 00000000..28766c87
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/graph.py
@@ -0,0 +1,153 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate the picture and cmap for a configuration's wiring
+
+from xml.dom.minidom import *
+from nesdoc.utils import *
+from nesdoc.generators import *
+from sys import *
+from os import system
+
+def generate_graph(comp):
+  name = comp.getAttribute("qname")
+  nicename = comp.getAttribute("nicename")
+  wiring = xml_tag(comp, "wiring")
+  if not wiring:
+    return
+  
+  # Return the element definition for a given wiring endpoint
+  def lookup_elem(endpoint):
+    elemref = xml_tagset(endpoint, [ "interface-ref", "function-ref" ])
+    return refidx[elemref.getAttribute("ref")]
+
+  # Define nodes in a dot graph file. Each node is given a name, a graphic
+  # style and a label. The elements map is updated to record the mapping
+  # from XML node names ("ref" attribute) and dot-file node names.
+  #   gf is the dot graph file
+  #   wire is a wiring graph edge
+  #   tag specifies which node to extract from wire (either "to" or "from")
+  # Does nothing if the node has already been added.
+  def add_node(gf, wire, tag):
+    endpoint = xml_tag(wire, tag)
+    elem = lookup_elem(endpoint)
+    ref = elem.getAttribute("ref")
+    if endpoints.has_key(ref): return
+    
+    compref = xml_tag(lookup_elem(endpoint), "component-ref")
+    if compref.getAttribute("qname") == name:
+      # reference to one's own interfaces become ellipses
+      endpoints[ref] = "n%s" % ref
+      gf.write('  %s [shape=ellipse, style=filled, label="%s", fontsize=12];\n' % (endpoints[ref], elem.getAttribute("name")))
+    else:
+      # references to interfaces or functions of other components become
+      # a reference to a box representing that component.
+      # each instance of a generic component gets a separate box.
+      # there is a link to the component's own HTML file.
+
+      ncompname = compref.getAttribute("qname")
+      ncomp = compidx[ncompname]
+      # Map this function or interface to the component (note that different
+      # instances of generic components have different qnames)
+      endpoints[ref] = ncompname
+
+      # Define the component style. We may define it several times, but all
+      # definitions are identical...
+      gf.write('  "%s" ' % ncompname)
+      styles = ["fontsize=12"]
+      if xml_tag(ncomp, "configuration"):
+        # configurations gets a double box
+        styles.append("shape=box,peripheries=2")
+      else:
+        styles.append("shape=box")
+
+      # Check for generic component instances
+      instance = xml_tag(ncomp, "instance")
+      if instance:
+        # Make these dashed, with a label showing the generic component
+        # and the instance name
+        styles.append("style=dashed")
+        iname = ncompname[find(ncompname, ".") + 1:]
+        instanceof = xml_tag(instance, "component-ref")
+        instanceof_name = instanceof.getAttribute("qname")
+        if iname == instanceof_name:
+          styles.append('label="%s"' % instanceof_name)
+        else:
+          styles.append('label="%s\\n(%s)"' % (instanceof_name, iname))
+        styles.append('URL="%s.html"' % instanceof.getAttribute("nicename"))
+      else:
+        # Just a regular component
+        styles.append('URL="%s.html"' % ncomp.getAttribute("nicename"))
+      if styles != []:
+        gf.write("[%s]" % join(styles, ", "))
+      gf.write(";\n")
+    
+  
+  def compname(endpoint):
+    return endpoints[lookup_elem(endpoint).getAttribute("ref")]
+
+  def wirestyle(endpoint):
+    elem = lookup_elem(endpoint)
+    if elem.tagName == "function":
+      # missing: bold style for parameterised functions
+      styles = ['label="%s"' % function_signature_str(elem, lambda (name): "X")]
+    else:
+      assert elem.tagName == "interface"
+      instance = xml_tag(elem, "instance")
+      idef = xml_tag(instance, "interfacedef-ref")
+      arguments = xml_tag(instance, "arguments")
+      parameters = xml_tag(elem, "interface-parameters")
+      def_name = idef.getAttribute("qname")
+
+      sig = def_name
+      if arguments:
+        iargs = join(map(lambda (arg): typename_str(arg, ""),
+                         xml_elements(arguments)), ", ")
+        sig += "<" + iargs + ">"
+      if parameters:
+        iparms = join(map(lambda (arg): typename_str(arg, ""),
+                          xml_elements(parameters)),  ", ")
+        sig += "[" + iparms + "]"
+      styles = [ 'label="%s"' % sig ]
+      if xml_tag(elem, "interface-parameters"):
+        styles.append('style=bold')
+      styles.append('URL="../ihtml/%s.html"' % idef.getAttribute("nicename"))
+    styles.append("fontsize=10")
+    return styles
+
+
+  # build indices from ref attribute values to the corresponding elements
+  refidx = {}
+  compidx = {}
+  for intf in comp.getElementsByTagName("interface"):
+    refidx[intf.getAttribute("ref")] = intf
+  for fn in comp.getElementsByTagName("function"):
+    refidx[fn.getAttribute("ref")] = fn
+  for ncomp in comp.getElementsByTagName("component"):
+    compidx[ncomp.getAttribute("qname")] = ncomp
+  
+  # create the dot graph specification
+  gf = file("chtml/%s.dot" % nicename, "w")
+  gf.write('digraph "%s" {\n' % nicename)
+  
+  endpoints = {}
+  for wire in wiring.getElementsByTagName("wire"):
+    add_node(gf, wire, "from")
+    add_node(gf, wire, "to")
+    
+  for wire in wiring.getElementsByTagName("wire"):
+    src = xml_tag(wire, "from")
+    dest = xml_tag(wire, "to")
+    gf.write('  "%s" -> "%s"' % (compname(src), compname(dest)))
+    gf.write(' [%s];\n' % join(wirestyle(src), ", "))
+  gf.write("}\n")
+  gf.close()
+
+  # Run dot twice to get a picture and cmap
+  system("dot -Tgif -ochtml/%s.gif chtml/%s.dot" % (nicename, nicename))
+  system("dot -Tcmap -ochtml/%s.cmap chtml/%s.dot" % (nicename, nicename))
diff --git a/tools/tinyos/ncc/nesdoc-py/html.py b/tools/tinyos/ncc/nesdoc-py/html.py
new file mode 100644
index 00000000..343c4b1d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/html.py
@@ -0,0 +1,172 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# An HTML output class, with convenience routines for handling tags and
+# indentation.
+
+from string import *
+from nesdoc.generators import *
+from re import search
+
+_doctags = {}
+
+def register_doctag(name, handler):
+  _doctags[name] = handler
+
+class Html:
+  # create a new HTML output file in filename
+  def __init__(self, filename):
+    self.f = file(filename, "w")
+    self.tags = []
+    self.ind = 0
+    self.at0 = True
+    self.pushln("html");
+    self.pushln("head");
+    # include stylesheet
+    self.tag("LINK", "rel=\"stylesheet\"", "href=\"nesdoc.css\"", "type=\"text/css\"", "media=\"screen\"")
+
+  # end of html generation. cleanup and close the underlying file.
+  def close(self):
+    self.popln()
+    self.popln()
+    assert self.ind == 0 and self.tags == []
+    self.f.close()
+
+  def indent(self):
+    self.ind += 2
+
+  def unindent(self, ):
+    self.ind -= 2
+
+  # print a string
+  def p(self, s):
+    if self.at0:
+      self.f.write(" " * self.ind)
+      self.at0 = False
+    self.f.write(s)
+
+  # print a string and end the line
+  def pln(self, s):
+    self.p(s)
+    self.f.write("\n")
+    self.at0 = True
+
+  # print a string, quoting the characters with meaning in HTML
+  def pq(self, s):
+    s.replace("<", "<")
+    s.replace(">", ">")
+    s.replace("&", "&")
+    s.replace('"', """)
+    self.p(s)
+
+  # newline if not at the start of a line
+  def startline(self):
+    if not self.at0:
+      self.pln("")
+
+  # start a new tag
+  def push(self, tag, *attrs):
+    self.tag(tag, *attrs)
+    self.tags.append(tag)
+    self.indent()
+
+  # start a new tag on a new line
+  def pushln(self, tag, *attrs):
+    self.startline();
+    self.tag(tag, *attrs)
+    self.pln("")
+    self.tags.append(tag)
+    self.indent()
+
+  # print a tag, but don't save it on the tag stack
+  def tag(self, tag, *attrs):
+    if attrs == ():
+      self.p("<%s>" % tag)
+    else:
+      self.p("<%s %s>" % (tag, join(attrs)))
+
+  # print a tag on a new line, but don't save it on the tag stack
+  def tagln(self, tag, *attrs):
+    self.tag(tag, *attrs)
+    self.pln("")
+    
+  # pop and print a terminator the most recent tag from the tag stack
+  def pop(self):
+    self.unindent()
+    self.p("" % self.tags.pop())
+
+  # pop and print (on a new line) a terminator the most recent tag from the
+  # tag stack
+  def popln(self):
+    self.unindent()
+    self.startline()
+    self.pln("" % self.tags.pop())
+
+  # print the HTML title
+  def title(self, s):
+    self.push("title");
+    self.pq(s);
+    self.pop();
+
+  # start the body section
+  def body(self):
+    self.popln() # pop head
+    self.pushln("body")
+
+  # Highlevel methods
+
+  # escape <> enclosed email addresses
+  def escape_email(self, s):
+    while True:
+      email = search("<\S+@\S+>", s)
+      if not email:
+        break
+      start = email.start()
+      end = email.end()
+      s = s[:start] + "<" + s[start + 1 : end - 1] + ">" + s[end:]
+    return s
+
+  # print a nesdoc string. @ entries go in a table
+  def pdoc(self, docstr):
+    (base, tags) = nd_docstring(docstr)
+    self.pln(self.escape_email(base))
+    if tags:
+      self.tag("p")
+      self.pushln("dl")
+      lasttag = None
+      for (tag, val) in tags:
+        if _doctags.has_key(tag):
+          (tag, val) = _doctags[tag](val)
+        if tag != lasttag:
+          self.tag("dt");
+          self.push("b"); self.pq(capitalize(tag) + ":"); self.pop()
+        self.pushln("dd");
+        self.p(self.escape_email(val))
+        self.popln() #dd
+        lasttag = tag
+      self.popln() #dl
+
+  # print a nice fancy heading
+  def heading(self, s):
+    self.push("div", "id=heading")
+    self.pq(s)
+    self.pop();
+
+  def func_sig_start(self) :
+    self.push("div", "id=funcsig")
+
+  def func_sig_stop(self) :
+    self.pop();
+
+  # print a function signature. namedecorator is called with the function
+  # name as argument so that you can decorate the actual function name
+  # (e.g., bold, a link)
+  def pfnsig(self, fn, namedecorator):
+    self.push("span", "id=funcnameshort")
+    self.pln(function_signature_str(fn, namedecorator))
+    self.pop()
diff --git a/tools/tinyos/ncc/nesdoc-py/index.py b/tools/tinyos/ncc/nesdoc-py/index.py
new file mode 100644
index 00000000..36cf51a1
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/index.py
@@ -0,0 +1,159 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate indices for all packages
+# Components and interfaces not in a package are ignored.
+
+from re import match
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+from sys import *
+from string import *
+
+def generate_indices(compfiles, intffiles):
+  # Add filename to the per-package (to) and global (all) lists
+  def add_page(filename, to, all):
+    fmatch = match("^(.*)\\.(.*)\\.xml$", filename)
+    if fmatch:
+      package = fmatch.group(1)
+      entity = fmatch.group(2)
+      packages[package] = True
+      if not to.has_key(package):
+        to[package] = []
+      to[package].append((package, entity))
+      all.append((package, entity))
+    else:
+      fmatch = match("^(.*)\\.xml$", filename)
+      if fmatch:
+        entity = fmatch.group(1)
+        all.append(('', entity))
+
+  # start a list (of interfaces, components or packages)
+  def tableforlist_start(ht):
+    ht.pushln("table", 'border="0"', 'width="100%"', 'summary=""')
+    ht.pushln("tr")
+    ht.pushln("td", "nowrap")
+
+  # end a list
+  def tableforlist_end(ht):
+    ht.popln()
+    ht.popln()
+    ht.popln()
+
+  # output a list (l) of interfaces or components (kind)
+  def entitylist(ht, l, kind):
+    tableforlist_start(ht)
+    ht.push('div', 'id="heading"')
+    ht.p(capitalize(kind))
+    ht.pop();
+    l.sort(lambda x, y: cmp(x[1].lower(), y[1].lower()))
+    ht.push('span', 'id="funcnameshort"')
+    for x in l:
+      if (x[0] != ''):
+        ht.push("a", 'href="../%shtml/%s.%s.html"' % (kind[0], x[0], x[1]),
+                'target="bodyFrame"')
+      else:
+        ht.push("a", 'href="../%shtml/%s.html"' % (kind[0], x[1]),
+                'target="bodyFrame"')
+      ht.p(x[1])
+      ht.pop()
+      ht.pln("")
+      ht.tagln("br")
+    ht.pop()
+    ht.tag("p")
+    tableforlist_end(ht)
+
+  # Per-package index
+  def pkglist(l, pkg, kind):
+    if l.has_key(pkg):
+      entitylist(pkgfile, l[pkg], kind)
+
+  # collect packages
+  allcomponents = []
+  allinterfaces = []
+  packages = {}
+  components = {}
+  interfaces = {}
+  for x in compfiles: add_page(x, components, allcomponents)
+  for x in intffiles: add_page(x, interfaces, allinterfaces)
+  packages = packages.keys()
+  packages.sort(lambda x, y: cmp(x.lower(), y.lower()))
+    
+  # Package index
+  idxfile = Html("index/packages.html")
+  idxfile.title("Package overview")
+  idxfile.body()
+  tableforlist_start(idxfile)
+  idxfile.push("a", 'href="all-.html"', 'target="packageFrame"')
+  idxfile.p("Everything")
+  idxfile.popln()
+  idxfile.tag("p")
+  idxfile.pln("Packages")
+  for pkg in packages:
+    idxfile.tagln("br")
+    idxfile.push("a", 'href="%s.html"' % pkg, 'target="packageFrame"')
+    idxfile.p(pkg)
+    idxfile.pop()
+    idxfile.pln("")
+  tableforlist_end(idxfile)
+  idxfile.close()
+
+  for pkg in packages:
+    pkgfile = Html("index/%s.html" % pkg)
+    pkgfile.title(pkg)
+    pkgfile.body()
+    pkgfile.pln(pkg)
+    pkgfile.tag("p")
+    pkglist(interfaces, pkg, "interfaces")
+    pkglist(components, pkg, "components")
+    pkgfile.close()
+
+  # Global index
+  allfile = Html("index/all-.html")
+  allfile.title("All interfaces and components")
+  allfile.body()
+  entitylist(allfile, allinterfaces, "interfaces")
+  entitylist(allfile, allcomponents, "components")
+  allfile.close()
+
+  # The actual index, with its three javadoc-style frames
+  frame = Html("index.html")
+  frame.title("Interfaces and components")
+  frame.popln()
+  frame.pushln("frameset", 'cols="20%,80%"')
+  frame.pushln("frameset", 'rows="30%,70%"')
+  frame.tagln("frame", 'src="index/packages.html"', 'name="packageListFrame"',
+              'title="Package List"')
+  frame.tagln("frame", 'src="index/all-.html"', 'name="packageFrame"',
+              'title="All interfaces and components"')
+  frame.popln()
+  # start on the main application
+  frame.tagln("frame", 'src="initial.html"', 'name="bodyFrame"',
+              'title="Summary"', 'scrolling="yes"')
+  frame.pushln("noframes")
+  frame.push("h2")
+  frame.p("Warning")
+  frame.popln()
+  frame.p("nesdoc is designed to be viewed using frames.")
+  frame.tag("p")
+  frame.p("Click ")
+  frame.push("a", 'href="index/packages.html"')
+  frame.p("here")
+  frame.pop()
+  frame.p(" for a minimalistic non-frame interface.")
+  frame.popln()
+  frame.close()
+
+  # Initial file
+  initial = Html("initial.html")
+  initial.title("nesdoc introduction")
+  initial.body()
+  initial.pln("Please select a package from the top-left frame, or an")
+  initial.pln("interface or componenent from the bottom-left frame.")
+  initial.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/interfaces.py b/tools/tinyos/ncc/nesdoc-py/interfaces.py
new file mode 100644
index 00000000..b299f1cb
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/interfaces.py
@@ -0,0 +1,85 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate HTML file for an interface
+
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+
+__all__ = [ "generate_interface" ]
+
+# A list of all functions with their short description, with links to the
+# long description
+def generate_fnlist_short(ht, name, fns):
+  if len(fns) > 0:
+    ht.tag("p")
+    ht.heading(name)
+    for fn in fns:
+      ht.func_sig_start();
+      ht.pfnsig(fn, lambda (name): '%s' % (name, name))
+      doc = nd_doc_short(fn)
+      if doc != None:
+        ht.push("menu")
+        ht.pln(doc)
+        ht.popln()
+      ht.func_sig_stop();
+
+# A list of all functions with their long description
+def generate_fnlist_long(ht, name, fns):
+  if len(fns) > 0:
+    ht.tag("p")
+    ht.heading(name + " - Details")
+    first = True
+    for fn in fns:
+      if not first:
+        ht.tag("hr")
+      ht.startline()
+      name = fn.getAttribute("name")
+      ht.pln('' % name)
+      ht.push("h4"); ht.p(name); ht.popln()
+      ht.pfnsig(fn, lambda (name): '%s' % name)
+      doc = nd_doc_long(fn)
+      if doc:
+        ht.startline(); ht.tag("p")
+        ht.pushln("menu")
+        ht.pdoc(doc)
+        ht.popln()
+      first = False
+
+def generate_interface(intf):
+  nicename = intf.getAttribute("nicename")
+  ht = Html("ihtml/%s.html" % nicename )
+  ht.title("Interface: " + nicename)
+  ht.body()
+  ht.push("h2");
+  ht.pq("Interface: " + nicename)
+  ht.pop()
+  ht.startline()
+  ht.push("b")
+  parameters = xml_tag(intf, "parameters")
+  ht.p("interface " + intf.getAttribute("qname"))
+  if parameters:
+    ht.p("<" + parameter_str(parameters)[1:-1] + ">")
+  ht.pop()
+  idoc =  nd_doc_long(intf)
+  if idoc != None:
+    ht.tag("p")
+    ht.pdoc(idoc)
+  ht.tag("p")
+
+  functions = intf.getElementsByTagName("function")
+  commands = filter(lambda (x): x.hasAttribute("command"), functions)
+  events = filter(lambda (x): x.hasAttribute("event"), functions)
+  commands.sort(lambda x, y: cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower()));
+  events.sort(lambda x, y: cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower()));
+  generate_fnlist_short(ht, "Commands", commands)
+  generate_fnlist_short(ht, "Events", events)
+  generate_fnlist_long(ht, "Commands", commands)
+  generate_fnlist_long(ht, "Events", events)
+  ht.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/nesdoc.css b/tools/tinyos/ncc/nesdoc-py/nesdoc.css
new file mode 100644
index 00000000..84014e5d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/nesdoc.css
@@ -0,0 +1,33 @@
+/* @author Joe Polastre  */
+
+body { background-color: #FFFFFF }
+
+#heading {
+  background-color: #CCCCFF;
+  font-size: 13pt;
+  font-weight: bold;
+  color: #000000;
+  border: 1px;
+  border-style: solid;
+  border-color: #000000;
+  padding: 3px;
+  width: 100%-8px;
+}
+
+#funcsig { 
+  background-color: #FFFFFF;
+  border: 1px;
+  border-style: solid;
+  border-color: #bbbbbb;
+  padding: 1px;
+  width: 100%-8px;
+}
+
+#funcnameshort { 
+  font-size: 11pt;
+  color: #000000;
+}
+
+#imgwiring { 
+  border: 0px;
+}
\ No newline at end of file
diff --git a/tools/tinyos/ncc/nesdoc-py/utils.py b/tools/tinyos/ncc/nesdoc-py/utils.py
new file mode 100644
index 00000000..9af06df2
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/utils.py
@@ -0,0 +1,79 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Miscellaneous utility functions (mostly for extracting information from XML)
+from os import *
+from xml.dom.minidom import *
+from sys import *
+
+# print an error message and exit
+def nfail(s):
+  stderr.write(s + "\n")
+  exit(2)
+
+# Create a directory without failing
+def nmkdir(dir):
+  try:
+    mkdir(dir)
+  except OSError:
+    0
+
+# Find the first element x of l for which f(x) is true
+def nfind(f, l):
+  for a in l:
+    if f(a):
+      return True
+  return False
+
+# True if a is in l
+def nmember(a, l):
+  return nfind(lambda (b): a == b, l)
+
+# Return a sub-element with the specified tag
+def xml_tag(x, tag):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE and child.tagName == tag:
+      return child
+  return None
+
+# Return some descendant with the specified tag
+def xml_tagfind(x, tag):
+  tmp = x.getElementsByTagName(tag)
+  if len(tmp) == 1:
+    return tmp[0]
+  else:
+    return None
+
+# Return a sub-element with one of the specified tags
+def xml_tagset(x, tags):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE and nmember(child.tagName, tags):
+      return child
+  return None
+
+# Return the ith sub-element
+def xml_idx(x, i):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE:
+      if i == 0:
+        return child
+      i = i - 1
+  return None
+
+# Return all element children
+def xml_elements(x):
+  return filter(lambda (child): child.nodeType == Node.ELEMENT_NODE, x.childNodes)
+
+# Join all CDATA children into a single string
+def xml_text(x):
+  str = ""
+  for child in x.childNodes:
+    if child.nodeType == Node.TEXT_NODE or child.nodeType == Node.CDATA_SECTION_NODE:
+      str += child.data
+  return str
+
diff --git a/tools/tinyos/ncc/nesdoc.1 b/tools/tinyos/ncc/nesdoc.1
new file mode 100644
index 00000000..ebb56493
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc.1
@@ -0,0 +1,79 @@
+.TH nesdoc 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+nesdoc - generate TinyOS documentation
+.SH SYNOPSIS
+
+TinyOS 1.x usage:
+.br
+\fBnesdoc\fR [\fIdocumentation-directory\fR] [\fIncc-options\fR] \fIfiles...\fR
+
+TinyOS 2.x: collect documentation from a program:
+.br
+\fBnesdoc\fR -o \fIdocumentation-directory\fR [\fB-preserve\fR]
+        [\fB-new\fR] [\fB-target=\fIplatform\fR] [\fB-topdir=\fIdirectory\fR]
+        [\fIncc-options\fR] \fIfiles...\fR
+
+TinyOS 2.x: generate nesdoc HTML pages:
+.br
+\fBnesdoc\fR -o \fIdocumentation-directory\fR  [\fB-new\fR] [\fB-target=\fIplatform\fR] \fB-html\fR
+
+.SH DESCRIPTION
+
+\fBnesdoc\fR is a tool to automatically extract documentation from nesC
+files and applications. There are two implementations of nesdoc: an old
+one that is used by default with TinyOS 1.x trees, and a new used with
+TinyOS 2.x trees or when the \fB-new\fR option is specified. It is not
+possible to use the old implementation with TinyOS 2.x.
+
+Documentation directories have a subdirectory for each platform, and
+contain HTML files describing the components and interfaces in TinyOS.
+nesdoc generates these files by compiling nesC programs and extracting the
+documentation information.
+
+When invoked, \fBnesdoc\fR generates documentation for the program that
+would be compiled with
+    \fBncc\fR \fIncc-options\fR \fIfiles...\fR
+
+The old nesdoc adds an HTML file for each component, interface in the
+compiled application to the documentation directory, and updates several
+indices. The old nesdoc does not support generic components or interfaces.
+
+The new nesdoc separates HTML generation into two phases. First, an
+application is compiled and XML descriptions of its components and 
+interfaces are added to the documentation directory. Once XML descriptions
+have been extracted for all components of interest, HTML pages are
+generated from this repository by running \fBnesdoc\fR with the \fB-html\fR
+option.
+
+For more details, see the separate \fBnesdoc\fR documentation.
+
+.SH OPTIONS
+
+.TP
+\fB-target=\fIplatform\fR
+Specify the platform for which documentation is generated.
+.TP
+\fB-preserve\fR
+By default, when collecting information, nesdoc overwrites existing XML
+descriptions of interfaces and components to ensure that they are up to 
+date. However, this is slow when generating documentation on a large 
+number of applications. If you pass the \fB-preserve\fR option, existing
+XML descriptions are not replaced.
+.TP
+\fB-html\fR
+Generate HTML pages for all the nesdoc information collected in 
+\fIdocumentation-directory\fR.
+\fB-new\fR
+Force the use of the new nesdoc even when using a TinyOS 1.x source tree.
+.TP
+\fB-topdir=\fIdir\fR 
+Specify directory paths that should be stripped from the source file names
+when generating "package names" for the documentation files.  The directory
+above \fBTOSDIR\fR is automatically added, so this option is only needed for
+directories outside the main TinyOS distribution.
+
+.SH SEE ALSO
+
+.IR ncc (1)
diff --git a/tools/tinyos/ncc/nesdoc.in b/tools/tinyos/ncc/nesdoc.in
new file mode 100644
index 00000000..783493b2
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc.in
@@ -0,0 +1,189 @@
+#!@pathperl@
+# -*- perl -*-
+
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# The new nesdoc implementation. When run with a TinyOS 1.x setup, just runs
+# the old nesdoc except if the -new option is given.
+#
+# The new nesdoc implementation is based on the XML dump facilities in nesC
+# 1.2 (version 1.2.1 of the nesC compiler is required). Documenation
+# generation is broken into two phases:
+# - nesdoc data collection: nesdoc information for all interfaces and 
+#   components is saved to a nesdoc repository, which is just a collection
+#   of XML files. See archive.py for more details.
+# - HTML generation from the XML files: once a repository is complete,
+#   you run nesdoc with the -html option to generate HTML files for
+#   each interface and component, along with an index. See genhtml.py
+#   for details.
+#
+# Differences between the old and new nesdocs (summary):
+# - the new nesdoc is currently only targeted at generating API documentation;
+#   it doesn't generate HTML files describing applications
+# - the old nesdoc does not support generic components or interfaces
+# - the per-component HTML files, the index and wiring graphs are hopefully
+#   more readable
+# - information on module implementations is not included (it should not
+#   be part of an API documentation)
+
+
+$prefix = "@prefix@";
+$exec_prefix = "@exec_prefix@";
+$libprogs = "@libdir@/tinyos";
+$python = "@pathpython@";
+
+$tosdir = `ncc -print-tosdir`;
+chomp($tosdir);
+
+# If using a TinyOS 1.x tree, assume old-style nesdoc except if there is a
+# -new argument somewhere.
+if (-d "$tosdir/platform" && !grep /^-new$/, @ARGV) {
+    # nesdoc for TinyOS 1.x, support old style docs
+    if ($#ARGV < 1) {
+	&fail("Usage: nesdoc  ");
+    }
+
+    $docdir = shift @ARGV;
+
+    unshift @ARGV, "-docdir=$docdir";
+    unshift @ARGV, "-fsyntax-only";
+    unshift @ARGV, "$exec_prefix/bin/ncc";
+
+    exec @ARGV;
+    fail("Couldn't execute $ARGV[0]");
+}
+
+# nesdoc for TinyOS 2.x 
+# parse arguments
+$target = `ncc -print-target`;
+chomp $target;
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $strip = 0;
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-topdir=(.*)/) {
+            push @archive_args, $1;
+	    $strip = 1;
+	}
+	elsif (/^--version$/) {
+	    $print_version = 1;
+	    $strip = 1;
+	}
+	elsif (/^-v$/) {
+	    $verbose = 1;
+	}
+	elsif (/^-target=(.*)/) {
+	    $target = $1;
+	}
+	elsif (/^-o/) {
+	    ($i, $docdir) = extractarg($i);
+	    $strip = 1;
+	}
+	elsif (/^-html$/) {
+	    $genhtml = 1;
+	    $strip = 1;
+	}
+	elsif (/^-preserve$/) {
+	    $preserve = 1;
+	    $strip = 1;
+	}
+    }
+    push @ncc_args, $_ if !$strip;
+}
+
+if ($print_version) {
+    print "nesdoc: @PACKAGE_VERSION@\n";
+    exit 0;
+}
+
+fail("No documentation directory specified") if !defined $docdir;
+$docdir = "$docdir/$target";
+
+if (defined $ENV{PYTHONPATH}) {
+    $ENV{PYTHONPATH} = "$libprogs:$PYTHONPATH";
+}
+else {
+    $ENV{PYTHONPATH} = "$libprogs";
+}
+
+if ($genhtml) {
+    execorfail($python, "$libprogs/nesdoc/genhtml.py", $docdir)
+}
+
+# Collecting nesdoc data. Run ncc, then process the results with
+# nesdoc-archive
+
+unshift @ncc_args, "-fsyntax-only";
+unshift @ncc_args, "-fnesc-dump=interfacedefs";
+unshift @ncc_args, "-fnesc-dump=components(wiring)";
+unshift @ncc_args, "-fnesc-dump=interfaces";
+unshift @ncc_args, "-fnesc-dump=functions(!global())";
+unshift @ncc_args, "-fnesc-dump=referenced(interfaces,components)";
+unshift @ncc_args, "$exec_prefix/bin/ncc";
+
+print STDERR join(' ', @ncc_args), "\n" if $verbose;
+
+pipe FORARCHIVE, FORNCC;
+
+if (!($pid = fork())) {
+    close STDOUT;
+    open STDOUT, ">&FORNCC";
+    execorfail(@ncc_args);
+}
+fail("fork failed") if $pid < 0;
+close STDIN;
+open STDIN, "<&FORARCHIVE";
+# Top of TinyOS tree is a default "topdir" (for package emulation)
+$toscontainer = `dirname $tosdir`;
+chomp $toscontainer;
+push @archive_args, "--topdir=$toscontainer";
+push @archive_args, "--preserve" if $preserve;
+push @archive_args, "$docdir";
+unshift @archive_args, "$libprogs/nesdoc/archive.py";
+unshift @archive_args, $python;
+
+print STDERR join(' ', @archive_args), "\n" if $verbose;
+
+fail("Couldn't create directory $docdir") if system("mkdir -p \"$docdir\"");
+execorfail(@archive_args);
+
+sub fail {
+    print STDERR "$_[0]\n";
+    exit 2;
+}
+
+sub execorfail {
+    exec @_;
+    fail("Couldn't execute $_[0]");
+}
+
+sub usage {
+    fail(< 
+         Compile specified files and archive the resulting nesdoc
+	 information in 
+         Note: This does not generate the nesdoc html pages.
+
+       nesdoc -o  -html
+	 Generate nesdoc html pages from archived nesdoc information.
+EOM
+)
+}
+
+sub extractarg {
+    local ($i) = @_;
+
+    if (length($ARGV[$i]) == 2) {
+	$arg = $ARGV[++$i];
+    }
+    else {
+	$arg = substr($ARGV[$i], 2);
+    }
+    return ($i, $arg);
+}
diff --git a/tos/.default-platform b/tos/.default-platform
new file mode 100644
index 00000000..19765bd5
--- /dev/null
+++ b/tos/.default-platform
@@ -0,0 +1 @@
+null
diff --git a/tos/chips/README b/tos/chips/README
new file mode 100644
index 00000000..d695d1b6
--- /dev/null
+++ b/tos/chips/README
@@ -0,0 +1,70 @@
+==============================================
+Directory Description:     tos/chips 
+==============================================
+:$Id$
+
+:TinyOS-Version: 2.0
+:Author: Martin Turon
+
+:Created: 14-Feb-2005
+:Version: $Revision$
+:Modified: $Date$
+
+1. Introduction
+====================================================================
+
+Platform dependant code independent of a specific platform
+----------------------------------------------------------
+
+The tos/chips directory is designed to house code to drive a 
+particular chip in a way that can be shared across disparate 
+platforms that share that particular chip.  
+
+One of the main issues in tinyos-1.x that limited portability 
+was that similar platforms would often copy code files hard-code 
+customizations, rather than rigorously share common code.  By
+placing chip-specific code here in a designated chips directory,
+and enforcing a policy of making this code specific to the chip
+but not the platform, code reuse will be promoted.
+
+2. Microcontrollers
+====================================================================
+
+ATmega128	
+---------
+    Part of the AVR 8-bit series by Atmel corporation.  Atmel's AVR® microcontrollers have a RISC core running single cycle instructions and a well-defined I/O structure that limits the need for external components. Internal oscillators, timers, UART, SPI, pull-up resistors, pulse width modulation, ADC, analog comparator and watch-dog timers are some of the features you will find in AVR devices.
+
+    	128-Kbyte self-programming Flash Program Memory, 
+	4-Kbyte SRAM, 4-Kbyte EEPROM, 8 Channel 10-bit A/D-converter. 
+	JTAG interface for on-chip-debug. Up to 16 MIPS throughput at 16 MHz. 
+	2.7 - 5.5 Volt operation.
+
+    http://atmel.com/dyn/products/product_card.asp?part_id=2018
+
+msp430
+------
+    The MSP430 family of ultra-low-power 16-bit RISC mixed-signal processors from Texas Instruments provides the ultimate solution for battery-powered measurement applications.
+
+    http://focus.ti.com/mcu/docs/overview.tsp?familyId=342&templateId=5246&navigationId=11466&path=templatedata/cm/mcuovw/data/msp430_ovw
+
+
+3. Radio Chips
+====================================================================
+
+cc2420
+------
+    The CC2420 is a low-cost transceiver designed specifically
+for low-power, low-voltage RF applications in the 2.4 GHz unlicensed ISM band. It is the first commercially available RF Transceiver compliant with the IEEE 802.15.4 standard and the first RF-IC that can be qualified for use in 2.4 GHz ZigBeetm products.
+
+    http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=115
+
+cc1000
+------
+    The CC1000 is a true ultra-low-power single-chip RF transceiver for e.g. the 315, 433, 868, 915 MHz bands. It has been specifically designed to comply with the most stringent demands of the low power radio market.  Based on a pure CMOS technology this is the first product in the market that offers a unique combination of low cost and high integration, performance and flexibility, thus setting a new standard for short-range wireless communication.
+
+    http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=14
+
+
+4. Volatile Flash Chips
+====================================================================
+
diff --git a/tos/chips/ad5200/AD5200C.nc b/tos/chips/ad5200/AD5200C.nc
new file mode 100644
index 00000000..9ad15816
--- /dev/null
+++ b/tos/chips/ad5200/AD5200C.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.

    
+ *
+ * This component provides the implementation of the ad5200 potentiometer
+ * chip.  It is currently the only chip of its type, and does not conform to
+ * any existing TEP standard.  This component will be updated as a TEP for
+ * potentiometers is developed in the near future.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration AD5200C {
+provides {
+  interface Pot;
+  interface Resource;
+  interface StdControl;
+}
+}
+
+implementation {
+  components AD5200P
+      , AD5200SpiC
+      , AD5200PotIO
+      , MainC
+      ;
+
+      StdControl = AD5200P;
+      Pot = AD5200P;
+      Resource = AD5200SpiC;
+
+
+      MainC.SoftwareInit-> AD5200P.Init;
+      AD5200P.ENPOT -> AD5200PotIO.AD5200PotENPOT;
+      AD5200P.SDPOT -> AD5200PotIO.AD5200PotSDPOT;
+      AD5200P.SpiByte -> AD5200SpiC;
+}
diff --git a/tos/chips/ad5200/AD5200P.nc b/tos/chips/ad5200/AD5200P.nc
new file mode 100644
index 00000000..f0c21e2a
--- /dev/null
+++ b/tos/chips/ad5200/AD5200P.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.

    
+ *
+ * This component provides the internal implementation of the ad5200 potentiometer
+ * chip.  It is currently the only chip of its type, and does not conform to
+ * any existing TEP standard.  This component will be updated as a TEP for
+ * potentiometers is developed in the near future.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+  module AD5200P {
+  provides {
+    interface Init;
+    interface Pot;
+    interface StdControl;
+  }
+  uses {
+    interface GeneralIO as ENPOT;
+    interface GeneralIO as SDPOT;
+    interface SpiByte;
+  }
+  }
+  implementation {
+    uint8_t Pot_value = -1;
+
+    /************** interface commands **************/
+    command error_t Init.init() {
+      call ENPOT.makeOutput();
+      call SDPOT.makeOutput();
+      call ENPOT.set();
+      call SDPOT.set();
+      return SUCCESS;
+    }
+
+    command error_t StdControl.start() {
+      call SDPOT.set();
+      call ENPOT.set();
+      return SUCCESS;
+    }
+    command error_t StdControl.stop() {
+      call ENPOT.set();
+      call SDPOT.clr();
+      return SUCCESS;
+    }
+
+    async command error_t Pot.set(uint8_t setting) {
+      call ENPOT.clr();
+      call SpiByte.write(setting, 0);
+      call ENPOT.set();
+      atomic Pot_value = setting;
+      return SUCCESS;
+    }
+
+    async command uint8_t Pot.get() {
+      return Pot_value;
+    }
+
+    async command error_t Pot.increase() {
+      if (Pot_value < 255 && Pot_value >= 0) {
+        Pot_value++;
+        return call Pot.set(Pot_value);
+      }
+      else return FAIL;
+    }
+
+    async command error_t Pot.decrease() {
+      if (Pot_value > 0) {
+        Pot_value--;
+        return call Pot.set(Pot_value);
+      }
+      else return FAIL;
+    }
+  }
diff --git a/tos/chips/ad5200/AD5200SpiC.nc b/tos/chips/ad5200/AD5200SpiC.nc
new file mode 100644
index 00000000..9de723b5
--- /dev/null
+++ b/tos/chips/ad5200/AD5200SpiC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing components of this type.

    
+ *
+ * Configuration file for using the default Spi implementation for writing
+ * a value to the Ad5200 Potentiometer. This file can be shadowed in the
+ * application or platform directory in order to use a different Spi
+ * implementation.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration AD5200SpiC {
+    provides {
+      interface Resource;
+      interface SpiByte;
+    }
+}
+
+implementation {
+  components new Spi0C() as Spi;
+  Resource = Spi;
+  SpiByte = Spi;
+}
diff --git a/tos/chips/ad5200/Pot.nc b/tos/chips/ad5200/Pot.nc
new file mode 100644
index 00000000..5b17320e
--- /dev/null
+++ b/tos/chips/ad5200/Pot.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+ 
+/**
+ * There is currently no TEP for describing this interface.

    
+ *
+ * This interface is an attempt at describing the HIL abstraction for
+ * potentiomter devices. Since there is currently no TEP describing the
+ * abstractions for potentiometers, this interface will need to be updated
+ * once one is created.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Kevin Klues (klues@tkn.tu-berlin.de) -- modified for TinyOS-2.x
+ */
+
+interface Pot {
+
+    /**
+     * Set the potentiometer value.
+     *
+     * @param setting -- The new value of the potentiometer.
+     * @return SUCCESS if the setting was successful
    
+     *         FAIL if the component has not been initialized or the desired
+     *              setting is outside of the valid range. 
+     */ 
+  async command error_t set(uint8_t setting);
+
+    /** 
+     * Increment the potentiometer value by 1. This function proves to be
+     * quite useful in active potentiometer control scenarios.
+     * 
+     * @return SUCCESS if the increment was successful.
    
+     *         FAIL if the component has not been initialized or if the
+     *              potentiometer cannot be incremented further.
+     */ 
+  async command error_t increase();
+
+    /** 
+     * Decrement the potentiometer value by 1. This function proves to be
+     * quite useful in active potentiometer control scenarios.
+     *
+     * @return SUCCESS if the decrement was successful.
+     *         FAIL if the component has not been initialized or if the
+     *              potentiometer cannot be decremented further.
+     */ 
+  async command error_t decrease();
+
+    /**
+     * Return the current setting of the potentiometer. 
+     * @return An unsigned 8-bit value denoting the current setting of the
+     *         potentiometer. 
+     */
+  async command uint8_t get();
+}
+
diff --git a/tos/chips/ad5200/PotC.nc b/tos/chips/ad5200/PotC.nc
new file mode 100644
index 00000000..73018847
--- /dev/null
+++ b/tos/chips/ad5200/PotC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.

    
+ *
+ * This component provides the HIL abstraction for the Ad5200 potentiomter.
+ * Since there is currently no TEP describing the abstractions for
+ * potentiometers, this component will need to be updated once one is created.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration PotC {
+    provides {
+      interface Resource;
+      interface Pot;
+      interface StdControl;
+    }
+}
+
+implementation {
+  components Ad5200C;
+
+  Pot = Ad5200C;
+  StdControl = Ad5200C;
+  Resource = Ad5200C;
+}
diff --git a/tos/chips/at45db/At45db.h b/tos/chips/at45db/At45db.h
new file mode 100644
index 00000000..d8d8df32
--- /dev/null
+++ b/tos/chips/at45db/At45db.h
@@ -0,0 +1,44 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef AT45DB_H
+#define AT45DB_H
+
+#define UQ_AT45DB "at45db.resource"
+
+#include 
+
+enum {
+  AT45_ERASE,
+  AT45_DONT_ERASE,
+  AT45_PREVIOUSLY_ERASED
+};
+
+#endif
diff --git a/tos/chips/at45db/At45db.nc b/tos/chips/at45db/At45db.nc
new file mode 100644
index 00000000..8f08ef4f
--- /dev/null
+++ b/tos/chips/at45db/At45db.nc
@@ -0,0 +1,184 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "At45db.h"
+
+/**
+ * HAL for Atmel's AT45DB family of serial dataflash chips. This provides
+ * reasonably high-level operations on AT45DB pages, including automatic
+ * buffer management. Writes are only guaranteed to happen after a flush,
+ * flushAll, sync or syncAll.
+ * 
    
+ * When buffers are flushed to the flash (either explicitly or implicitly),
+ * their contents are checked to ensure the write was succesful. If this
+ * check fails, the flush is retried some number of times. If this fails
+ * more than some number of times, all access to the flash is disabled
+ * (all requests will report FAIL in their completion event).
+ * 
    
+ * This interface only supports one operation at a time - components offering
+ * At45db should use the Resource interface for resource sharing.
+ *
+ * @author David Gay
+ */
+
+interface At45db {
+  /**
+   * Write some data to an AT45DB page. writeDone will be signaled.
+   * @param page Flash page to write to. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start writing - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Data to write. The buffer is "returned" at writeDone time.
+   * @param n Number of bytes to write (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void write(at45page_t page, at45pageoffset_t offset,
+		     void *PASS data, at45pageoffset_t n);
+  /**
+   * Signal completion of a write operation. The buffer passed to write
+   * is implictly returned.
+   * @param error SUCCESS for a successful write, FAIL otherwise
+   */
+  event void writeDone(error_t error);
+
+  /**
+   * Copy one flash page to another. copyDone will be signaled. If page
+   * from had been modified, it is first flushed to flash. Page
+   * to will only actually be written when the buffer holding
+   * it is flushed (see flush, flushAll, sync, syncAll).
+   *
+   * @param from Flash page to copy. Must be less than AT45_MAX_PAGES.
+   * @param to Flash page to overwrite. Must be less than AT45_MAX_PAGES.
+   */
+  command void copyPage(at45page_t from, at45page_t to);
+  /**
+   * Signal completion of a copyPage operation. 
+   * @param error SUCCESS if the copy was successful, FAIL otherwise
+   */
+  event void copyPageDone(error_t error);
+
+  /**
+   * Erase an AT45DB page. eraseDone will be signaled.
+   * @param page Flash page to erase. Must be less than AT45_MAX_PAGES.
+   * @param eraseKind How to handle the erase:
+   *   
    AT45_ERASE: actually erase the page in the flash chip
+   *   
    AT45_DONT_ERASE: don't erase the page in the flash 
+   *     chip, but reserve a buffer for this page - subsequent writes to this
+   *     page will be faster because the old contents need not be read
+   *   
    AT45_PREVIOUSLY_ERASED: assume the page was previously
+   *     erased in the flash and reserve a buffer for this page - subsequent
+   *     writes to page will be faster because the old contents need not be 
+   *     read and the write itself will be faster
+   */
+  command void erase(at45page_t page, uint8_t eraseKind);
+  /**
+   * Signal completion of an erase operation. 
+   * @param error SUCCESS if the erase was successful, FAIL otherwise
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Flush an AT45DB page from the buffers to the actual flash. syncDone
+   * will be signaled once the flush has been completed and the buffer 
+   * contents successfully compared with the flash. If the page is not
+   * in the buffers, syncDone will succeed "immediately".
+   * @param page Flash page to sync. Must be less than AT45_MAX_PAGES.
+   */
+  command void sync(at45page_t page);
+  /**
+   * Flush all AT45DB buffers to the actual flash. syncDone
+   * will be signaled once the flush has been completed and the buffer 
+   * contents successfully compared with the flash. 
+   */
+  command void syncAll();
+  /**
+   * Signal completion of a sync or syncAll operation. 
+   * @param error SUCCESS if the sync was successful, FAIL otherwise
+   */
+  event void syncDone(error_t error);
+
+  /**
+   * Flush an AT45DB page from the buffers to the actual flash. flushDone
+   * will be signaled once the flush has been initiated. If the page is not
+   * in the buffers, flushDone will succeed "immediately".
+   * @param page Flash page to sync. Must be less than AT45_MAX_PAGES.
+   */
+  command void flush(at45page_t page);
+  /**
+   * Flush all AT45DB buffers to the actual flash. flushDone
+   * will be signaled once the flushes have been initiated. 
+   */
+  command void flushAll();
+  /**
+   * Signal completion of an flush or flushAll operation. 
+   * @param error SUCCESS if the flush was successful, FAIL otherwise
+   */
+  event void flushDone(error_t error);
+
+  /**
+   * Read some data from an AT45DB page. readDone will be signaled.
+   * @param page Flash page to read from. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void read(at45page_t page, at45pageoffset_t offset,
+		    void *PASS data, at45pageoffset_t n);
+  /**
+   * Signal completion of a read operation. The buffer passed to read
+   * is implictly returned.
+   * @param error SUCCESS for a successful read, FAIL otherwise
+   */
+  event void readDone(error_t error);
+
+  /**
+   * Compute the CRC of some data from an AT45DB page (using the CRC
+   * function from crc.h). computeCrcDone will be signaled.
+   * @param page Flash page to read from. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   * @param baseCrc initial CRC value - use 0 if computing a "standalone"
+   *   CRC, or a previous computeCrc result if computing a CRC over several
+   *   flash pages
+   */
+  command void computeCrc(at45page_t page, at45pageoffset_t offset,
+			  at45pageoffset_t n, uint16_t baseCrc);
+  /**
+   * Signal completion of a CRC computation.
+   * @param error SUCCESS if the CRC was successfully computed, FAIL otherwise
+   * @param crc CRC value (valid only if error == SUCCESS)
+   */
+  event void computeCrcDone(error_t error, uint16_t crc);
+}
diff --git a/tos/chips/at45db/At45dbBlockConfig.nc b/tos/chips/at45db/At45dbBlockConfig.nc
new file mode 100644
index 00000000..aa9365d2
--- /dev/null
+++ b/tos/chips/at45db/At45dbBlockConfig.nc
@@ -0,0 +1,59 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private interface between the AT45DB implementations of config and block storage
+ *
+ * @author: David Gay 
+ */
+
+interface At45dbBlockConfig {
+  /**
+   * Check if this block is a config volumes
+   * @return TRUE for config volumes, FALSE for block volumes
+   */
+  command int isConfig();
+
+  /**
+   * Query which half of the block is used by the current config state
+   * @return TRUE for 2nd half, FALSE for 1st half
+   */
+  command int flipped();
+
+  /**
+   * Hook called by block storage just before the start of each write
+   * @return TRUE to delay the write until writeContinue
+   *    is called, FALSE to proceed immediately.
+   */
+  command int writeHook();
+  /**
+   * Continue or abort write suspended as a result of a writeHook
+   * event
+   * @param error SUCCESS to continue write, anything else to abort write 
+   *   returning that error code
+   */
+  event void writeContinue(error_t error);
+
+  /**
+   * Return size of a config volume in pages (half of the actual block)
+   * @return Config volume size
+   */
+  event at45page_t npages();
+
+  /**
+   * Map a volume-relative page to an absolute flash page, taking account
+   * of the current flipped status
+   * @param page Volume-relative page
+   * @return Actual flash page for page
+   */
+  event at45page_t remap(at45page_t page);
+}
diff --git a/tos/chips/at45db/At45dbC.nc b/tos/chips/at45db/At45dbC.nc
new file mode 100644
index 00000000..216e1ce0
--- /dev/null
+++ b/tos/chips/at45db/At45dbC.nc
@@ -0,0 +1,45 @@
+// $Id: HALAT45DBC.nc,v 1.1 2005/01/22 00:26:31 idgay Exp 
+/*									tab:4
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * HAL for Atmel's AT45DB family of serial dataflash chips. Access to the HAL
+ * is controlled by a parameterised Resource interface - client ids are 
+ * obtained with unique(UQ_AT45DB).
+ *
+ * @author David Gay
+ */
+
+#include "At45db.h"
+
+configuration At45dbC
+{
+  provides {
+    interface At45db;
+    interface Resource[uint8_t client];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+}
+implementation
+{
+  components At45dbP, HplAt45dbC, MainC, BusyWaitMicroC;
+  components new FcfsArbiterC(UQ_AT45DB) as Arbiter;
+
+  At45db = At45dbP;
+  Resource = Arbiter;
+  ResourceController = Arbiter;
+  ArbiterInfo = Arbiter;
+
+  MainC.SoftwareInit -> At45dbP;
+  MainC.SoftwareInit -> Arbiter;
+  At45dbP.HplAt45db -> HplAt45dbC;
+  At45dbP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/chips/at45db/At45dbP.nc b/tos/chips/at45db/At45dbP.nc
new file mode 100644
index 00000000..213573f2
--- /dev/null
+++ b/tos/chips/at45db/At45dbP.nc
@@ -0,0 +1,469 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "crc.h"
+#include "At45db.h"
+#include "Timer.h"
+
+/**
+ * Private componenent for the Atmel's AT45DB HAL.
+ *
+ * @author David Gay
+ */
+
+module At45dbP {
+  provides {
+    interface Init;
+    interface At45db;
+  }
+  uses {
+    interface HplAt45db;
+    interface BusyWait;
+  }
+}
+implementation
+{
+#define CHECKARGS
+
+#if 0
+  uint8_t work[20];
+  uint8_t woffset;
+
+  void wdbg(uint8_t x) {
+    work[woffset++] = x;
+    if (woffset == sizeof work)
+      woffset = 0;
+  }
+#else
+#define wdbg(n)
+#endif
+
+  enum { // requests
+    IDLE,
+    R_READ,
+    R_READCRC,
+    R_WRITE,
+    R_ERASE,
+    R_COPY,
+    R_SYNC,
+    R_SYNCALL,
+    R_FLUSH,
+    R_FLUSHALL,
+    BROKEN // Write failed. Fail all subsequent requests.
+  };
+  uint8_t request;
+  uint8_t *reqBuf;
+  at45pageoffset_t reqOffset, reqBytes;
+  at45page_t reqPage;
+
+  enum {
+    P_READ,
+    P_READCRC,
+    P_WRITE,
+    P_FLUSH,
+    P_FILL,
+    P_ERASE,
+    P_COMPARE,
+    P_COMPARE_CHECK
+  };
+  
+  struct {
+    at45page_t page;
+    bool busy : 1;
+    bool clean : 1;
+    bool erased : 1;
+    uint8_t unchecked : 2;
+  } buffer[2];
+  uint8_t selected; // buffer used by the current op
+  uint8_t checking;
+  bool flashBusy;
+
+  // Select a command for the current buffer
+#define OPN(n, name) ((n) ? name ## 1 : name ## 2)
+#define OP(name) OPN(selected, name)
+
+  command error_t Init.init() {
+    request = IDLE;
+    flashBusy = TRUE;
+      
+    // pretend we're on an invalid non-existent page
+    buffer[0].page = buffer[1].page = AT45_MAX_PAGES;
+    buffer[0].busy = buffer[1].busy = FALSE;
+    buffer[0].clean = buffer[1].clean = TRUE;
+    buffer[0].unchecked = buffer[1].unchecked = 0;
+    buffer[0].erased = buffer[1].erased = FALSE;
+
+    return SUCCESS;
+  }
+  
+  void flashIdle() {
+    flashBusy = buffer[0].busy = buffer[1].busy = FALSE;
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState);
+  void handleRWRequest();
+
+  task void taskSuccess() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+  task void taskFail() {
+    requestDone(FAIL, 0, IDLE);
+  }
+
+  void checkBuffer(uint8_t buf) {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.compare(OPN(buf, AT45_C_COMPARE_BUFFER), buffer[buf].page);
+    checking = buf;
+  }
+
+  void flushBuffer() {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.flush(buffer[selected].erased ?
+			 OP(AT45_C_QFLUSH_BUFFER) :
+			 OP(AT45_C_FLUSH_BUFFER), 
+			 buffer[selected].page);
+  }
+
+  event void HplAt45db.waitIdleDone() {
+    flashIdle();
+    // Eager compare - this steals the current command
+#if 0
+    if ((buffer[0].unchecked || buffer[1].unchecked) &&
+	cmdPhase != P_COMPARE)
+      checkBuffer(buffer[0].unchecked ? 0 : 1);
+    else
+#endif
+      handleRWRequest();
+  }
+
+  event void HplAt45db.waitCompareDone(bool ok) {
+    flashIdle();
+
+    if (ok)
+      buffer[checking].unchecked = 0;
+    else if (buffer[checking].unchecked < 2)
+      buffer[checking].clean = FALSE;
+    else
+      {
+	requestDone(FAIL, 0, BROKEN);
+	return;
+      }
+    handleRWRequest();
+  }
+
+  event void HplAt45db.readDone() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.writeDone() {
+    buffer[selected].clean = FALSE;
+    buffer[selected].unchecked = 0;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.crcDone(uint16_t crc) {
+    requestDone(SUCCESS, crc, IDLE);
+  }
+
+  event void HplAt45db.flushDone() {
+    flashBusy = TRUE;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].unchecked++;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.compareDone() {
+    flashBusy = TRUE;
+    buffer[checking].busy = TRUE;
+    // The 10us wait makes old mica motes (Atmega 103) happy, for
+    // some mysterious reason (w/o this wait, the first compare
+    // always fails, even though the compare after the rewrite
+    // succeeds...)
+    call BusyWait.wait(10);
+    call HplAt45db.waitCompare();
+  }
+
+  event void HplAt45db.fillDone() {
+    flashBusy = TRUE;
+    buffer[selected].page = reqPage;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.eraseDone() {
+    flashBusy = TRUE;
+    // The buffer contains garbage, but we don't care about the state
+    // of bits on this page anyway (if we do, we'll perform a 
+    // subsequent write)
+    buffer[selected].page = reqPage;
+    buffer[selected].clean = TRUE;
+    buffer[selected].erased = TRUE;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  void syncOrFlushAll(uint8_t newReq);
+
+  void handleRWRequest() {
+    if (reqPage == buffer[selected].page)
+      switch (request)
+	{
+	case R_ERASE:
+	  switch (reqOffset)
+	    {
+	    case AT45_ERASE:
+	      if (flashBusy)
+		call HplAt45db.waitIdle();
+	      else
+		call HplAt45db.erase(AT45_C_ERASE_PAGE, reqPage);
+	      break;
+	    case AT45_PREVIOUSLY_ERASED:
+	      // We believe the user...
+	      buffer[selected].erased = TRUE;
+	      /* Fallthrough */
+	    case AT45_DONT_ERASE:
+	      // The buffer contains garbage, but we don't care about the state
+	      // of bits on this page anyway (if we do, we'll perform a 
+	      // subsequent write)
+	      buffer[selected].clean = TRUE;
+	      requestDone(SUCCESS, 0, IDLE);
+	      break;
+	    }
+	  break;
+
+	case R_COPY:
+	  if (!buffer[selected].clean) // flush any modifications
+	    flushBuffer();
+	  else
+	    {
+	      // Just redesignate as destination page, and mark it dirty.
+	      // It will eventually be flushed, completing the copy.
+	      buffer[selected].page = reqOffset;
+	      buffer[selected].clean = FALSE;
+	      post taskSuccess();
+	    }
+	  break;
+
+	case R_SYNC: case R_SYNCALL:
+	  if (buffer[selected].clean && buffer[selected].unchecked)
+	    {
+	      checkBuffer(selected);
+	      return;
+	    }
+	  /* fall through */
+	case R_FLUSH: case R_FLUSHALL:
+	  if (!buffer[selected].clean)
+	    flushBuffer();
+	  else if (request == R_FLUSH || request == R_SYNC)
+	    post taskSuccess();
+	  else
+	    {
+	      // Check for more dirty pages
+	      uint8_t oreq = request;
+
+	      request = IDLE;
+	      syncOrFlushAll(oreq);
+	    }
+	  break;
+
+	case R_READ:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.readBuffer(OP(AT45_C_READ_BUFFER), reqOffset,
+				      reqBuf, reqBytes);
+	  break;
+
+	case R_READCRC:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    /* Hack: baseCrc was stored in reqBuf */
+	    call HplAt45db.crc(OP(AT45_C_READ_BUFFER), 0, reqOffset, reqBytes,
+			       (uint16_t)reqBuf);
+	  break;
+
+	case R_WRITE:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.write(OP(AT45_C_WRITE_BUFFER), 0, reqOffset,
+				 reqBuf, reqBytes);
+	  break;
+	}
+    else if (!buffer[selected].clean)
+      flushBuffer();
+    else if (buffer[selected].unchecked)
+      checkBuffer(selected);
+    else
+      {
+	// just get the new page (except for erase)
+	if (request == R_ERASE)
+	  {
+	    buffer[selected].page = reqPage;
+	    handleRWRequest();
+	  }
+	else if (flashBusy)
+	  call HplAt45db.waitIdle();
+	else
+	  call HplAt45db.fill(OP(AT45_C_FILL_BUFFER), reqPage);
+      }
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState) {
+    uint8_t orequest = request;
+
+    request = newState;
+    switch (orequest)
+      {
+      case R_READ: signal At45db.readDone(result); break;
+      case R_READCRC: signal At45db.computeCrcDone(result, computedCrc); break;
+      case R_WRITE: signal At45db.writeDone(result); break;
+      case R_SYNC: case R_SYNCALL: signal At45db.syncDone(result); break;
+      case R_FLUSH: case R_FLUSHALL: signal At45db.flushDone(result); break;
+      case R_ERASE: signal At45db.eraseDone(result); break;
+      case R_COPY: signal At45db.copyPageDone(result); break;
+      }
+  }
+
+  void newRequest(uint8_t req, at45page_t page, at45pageoffset_t offset,
+		  void *reqdata, at45pageoffset_t n) {
+    request = req;
+
+    reqBuf = reqdata;
+    reqBytes = n;
+    reqPage = page;
+    reqOffset = offset;
+
+    if (page == buffer[0].page)
+      selected = 0;
+    else if (page == buffer[1].page)
+      selected = 1;
+    else
+      selected = !selected; // LRU with 2 buffers...
+
+#ifdef CHECKARGS
+    if (page >= AT45_MAX_PAGES || offset >= AT45_PAGE_SIZE ||
+	n > AT45_PAGE_SIZE || offset + n > AT45_PAGE_SIZE)
+      post taskFail();
+    else
+#endif
+      handleRWRequest();
+  }
+
+  command void At45db.read(at45page_t page, at45pageoffset_t offset,
+				   void *reqdata, at45pageoffset_t n) {
+    newRequest(R_READ, page, offset, reqdata, n);
+  }
+
+  command void At45db.computeCrc(at45page_t page,
+					at45pageoffset_t offset,
+					at45pageoffset_t n,
+					uint16_t baseCrc) {
+    /* This is a hack (store crc in reqBuf), but it saves 2 bytes of RAM */
+    reqBuf = (uint8_t *)baseCrc;
+    newRequest(R_READCRC, page, offset, NULL, n);
+  }
+
+  command void At45db.write(at45page_t page, at45pageoffset_t offset,
+				    void *reqdata, at45pageoffset_t n) {
+    newRequest(R_WRITE, page, offset, reqdata, n);
+  }
+
+
+  command void At45db.erase(at45page_t page, uint8_t eraseKind) {
+    newRequest(R_ERASE, page, eraseKind, NULL, 0);
+  }
+
+  command void At45db.copyPage(at45page_t from, at45page_t to) {
+    /* Assumes at45pageoffset_t can hold an at45page_t. A little icky */
+    newRequest(R_COPY, from, to, NULL, 0);
+  }
+
+  void syncOrFlush(at45page_t page, uint8_t newReq) {
+    request = newReq;
+
+    if (buffer[0].page == page)
+      selected = 0;
+    else if (buffer[1].page == page)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.sync(at45page_t page) {
+    syncOrFlush(page, R_SYNC);
+  }
+
+  command void At45db.flush(at45page_t page) {
+    syncOrFlush(page, R_FLUSH);
+  }
+
+  void syncOrFlushAll(uint8_t newReq) {
+    request = newReq;
+
+    if (!buffer[0].clean)
+      selected = 0;
+    else if (!buffer[1].clean)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.syncAll() {
+    syncOrFlushAll(R_SYNCALL);
+  }
+
+  command void At45db.flushAll() {
+    syncOrFlushAll(R_FLUSHALL);
+  }
+}
diff --git a/tos/chips/at45db/At45dbStorageManagerC.nc b/tos/chips/at45db/At45dbStorageManagerC.nc
new file mode 100644
index 00000000..1d857d0d
--- /dev/null
+++ b/tos/chips/at45db/At45dbStorageManagerC.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * HAL component providing information on the flash volumes.
+ *
+ * @author: David Gay 
+ */
+
+module At45dbStorageManagerC {
+  provides interface At45dbVolume[volume_id_t volid];
+}
+implementation {
+  command at45page_t At45dbVolume.remap[volume_id_t volid](at45page_t volumePage) {
+    switch (volid)
+      {
+#define VB(id, base) case id: return volumePage + base;
+#include "StorageVolumes.h"
+      default: return AT45_MAX_PAGES;
+      }
+  }
+
+  command at45page_t At45dbVolume.volumeSize[volume_id_t volid]() {
+    switch (volid)
+      {
+#define VS(id, size) case id: return size;
+#include "StorageVolumes.h"
+      default: return 0;
+      }
+  }
+}
diff --git a/tos/chips/at45db/At45dbVolume.nc b/tos/chips/at45db/At45dbVolume.nc
new file mode 100644
index 00000000..8c8c8eb2
--- /dev/null
+++ b/tos/chips/at45db/At45dbVolume.nc
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "At45db.h"
+
+/**
+ * AT45DB interface for managing flash volumes.
+ *
+ * @author David Gay
+ */
+interface At45dbVolume {
+  /**
+   * Map a volume page to the corresponding page in the whole flash
+   * @return What flash page this volume page maps to, or 
+   *   AT45_MAX_PAGES for invalid volumes
+   */
+  command at45page_t remap(at45page_t volumePage);
+
+  /**
+   * Find the flash volume size
+   * @return Flash volume size in pages
+   */
+  command at45page_t volumeSize();
+}
diff --git a/tos/chips/at45db/BlockStorageC.nc b/tos/chips/at45db/BlockStorageC.nc
new file mode 100644
index 00000000..e1ad0479
--- /dev/null
+++ b/tos/chips/at45db/BlockStorageC.nc
@@ -0,0 +1,42 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the block storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for block storage
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration BlockStorageC(volume_id_t volid) {
+  provides {
+    interface BlockWrite;
+    interface BlockRead;
+  }
+}
+implementation {
+  enum {
+    BLOCK_ID = unique(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE),
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components BlockStorageP, WireBlockStorageP, At45dbStorageManagerC, At45dbC;
+
+  BlockWrite = BlockStorageP.BlockWrite[BLOCK_ID];
+  BlockRead = BlockStorageP.BlockRead[BLOCK_ID];
+
+  BlockStorageP.At45dbVolume[BLOCK_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  BlockStorageP.Resource[BLOCK_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/BlockStorageP.nc b/tos/chips/at45db/BlockStorageP.nc
new file mode 100644
index 00000000..d317e8e5
--- /dev/null
+++ b/tos/chips/at45db/BlockStorageP.nc
@@ -0,0 +1,493 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the block storage
+ * abstraction.
+ *
+ * @author: Jonathan Hui 
+ * @author: David Gay 
+ */
+
+#include "Storage.h"
+
+module BlockStorageP {
+  provides {
+    interface BlockWrite[uint8_t blockId];
+    interface BlockRead[uint8_t blockId];
+  }
+  uses {
+    interface At45db;
+    interface At45dbVolume[uint8_t blockId];
+    interface Resource[uint8_t blockId];
+    interface At45dbBlockConfig as BConfig[uint8_t blockId];
+  }
+}
+implementation 
+{
+  /* The AT45DB block storage implementation simply provides direct
+     read/write access to the underlying pages of the volume. Random
+     writes to the block storage will thus lead to pages being 
+     erased/programmed many times (there is a 2 page cache, but
+     random writes are unlikely to hit in it).
+
+     The cache is only flushed on commit.
+
+     The first page of a block storage volume stores the maximum address
+     written in the block and a CRC of the block's contents (up to that
+     maximum address). This CRC is written at commit time and verified at
+     validate time.
+
+     This BlockStorage code is reused in the implementation of
+     ConfigStorage.  See the ConfigStorageP component and the
+     At45dbBlockConfig interface for more discussion. If there are m
+     ConfigStorage volumes and n BlockStorage volumes, the ids 0..m-1 are
+     for ConfigStorage and m..m+n-1 are for BlockStorage.
+  */
+
+  enum {
+    R_IDLE,
+    R_WRITE,
+    R_ERASE,
+    R_COMMIT,
+    R_READ,
+    R_VERIFY, 
+    R_CRC,
+  };
+
+  enum {
+    META_IDLE,
+    META_COMMIT,
+    META_VERIFY
+  };
+
+  enum {
+    N = uniqueCount(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE),
+    NO_CLIENT = 0xff
+  };
+
+  uint8_t client = NO_CLIENT;
+  uint8_t metaState;
+  storage_addr_t bytesRemaining;
+  nx_struct {
+    nx_uint16_t crc;
+    nx_uint32_t maxAddr;
+  } sig;
+
+  struct {
+    /* The latest request made for this client, and it's arguments */
+    uint8_t request; /* automatically initialised to R_IDLE */
+    uint8_t *buf;
+    storage_addr_t addr;
+    storage_len_t len;
+
+    /* Maximum address written in this block */
+    storage_addr_t maxAddr;
+  } s[N];
+
+
+  /* ------------------------------------------------------------------ */
+  /* Interface with ConfigStorageP (see also writeHook call below)	*/
+  /* ------------------------------------------------------------------ */
+
+  at45page_t pageRemap(at45page_t p) {
+    return signal BConfig.remap[client](p);
+  }
+
+  event at45page_t BConfig.npages[uint8_t id]() {
+    return call At45dbVolume.volumeSize[id]() >> 1;
+  }
+
+  event at45page_t BConfig.remap[uint8_t id](at45page_t page) {
+    if (call BConfig.isConfig[id]() && call BConfig.flipped[id]())
+      page += signal BConfig.npages[id]();
+    return call At45dbVolume.remap[id](page);
+  }
+
+  default command int BConfig.isConfig[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  default command int BConfig.flipped[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Queue and initiate user requests					*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseStart();
+  void verifyStart();
+  void multipageStart(storage_len_t len, uint16_t crc);
+
+  void startRequest() {
+    switch (s[client].request)
+      {
+      case R_ERASE:
+	eraseStart();
+	break;
+      case R_VERIFY:
+	verifyStart();
+	break;
+      default:
+	multipageStart(s[client].len, (uint16_t)s[client].buf);
+      }
+  }
+
+  void endRequest(error_t result, uint16_t crc) {
+    uint8_t c = client;
+    uint8_t tmpState = s[c].request;
+    storage_addr_t actualLength = s[c].len - bytesRemaining;
+    storage_addr_t addr = s[c].addr - actualLength;
+    void *ptr = s[c].buf - actualLength;
+    
+    client = NO_CLIENT;
+    s[c].request = R_IDLE;
+    call Resource.release[c]();
+
+    switch(tmpState)
+      {
+      case R_READ:
+	signal BlockRead.readDone[c](addr, ptr, actualLength, result);
+	break;
+      case R_WRITE:
+	signal BlockWrite.writeDone[c](addr, ptr, actualLength, result);
+	break;
+      case R_ERASE:
+	signal BlockWrite.eraseDone[c](result);
+	break;
+      case R_CRC:
+	signal BlockRead.computeCrcDone[c](addr, actualLength, crc, result);
+	break;
+      case R_COMMIT:
+	signal BlockWrite.commitDone[c](result);
+	break;
+      case R_VERIFY: 
+	signal BlockRead.verifyDone[c](result);
+	break;
+      }
+  }
+
+  error_t newRequest(uint8_t newState, uint8_t id,
+		       storage_addr_t addr, uint8_t* buf, storage_len_t len) {
+    storage_len_t vsize;
+
+    if (s[id].request != R_IDLE)
+      return EBUSY;
+
+    vsize = call BlockRead.getSize[id]();
+    if (addr > vsize || len > vsize - addr)
+      return EINVAL;
+
+    s[id].request = newState;
+    s[id].addr = addr;
+    s[id].buf = buf;
+    s[id].len = len;
+
+    call Resource.request[id]();
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted[uint8_t blockId]() {
+    client = blockId;
+
+    if (s[blockId].request == R_WRITE)
+      {
+	if (s[blockId].addr + s[blockId].len > s[blockId].maxAddr)
+	  s[blockId].maxAddr = s[blockId].addr + s[blockId].len;
+
+	if (call BConfig.writeHook[blockId]())
+	  {
+	    /* Config write intercept. We'll get a writeContinue when it's
+	       time to resume. */
+	    client = NO_CLIENT;
+	    return;
+	  }
+      }
+    startRequest();
+  }
+
+  default command int BConfig.writeHook[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  event void BConfig.writeContinue[uint8_t blockId](error_t error) {
+    /* Config intercept complete. Resume operation. */
+    client = blockId;
+    if (error == SUCCESS)
+      startRequest();
+    else
+      endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Multipage operations            					*/
+  /* ------------------------------------------------------------------ */
+
+  void commitCrcDone(uint16_t crc);
+  void verifyCrcDone(uint16_t crc);
+
+  void multipageDone(uint16_t crc) {
+    switch (s[client].request)
+      {
+      default: endRequest(SUCCESS, crc); break;
+      case R_COMMIT: commitCrcDone(crc); break;
+      case R_VERIFY: verifyCrcDone(crc); break;
+      }
+  }
+
+  void calcRequest(storage_addr_t addr, at45page_t *page,
+		   at45pageoffset_t *offset, at45pageoffset_t *count) {
+    *page = pageRemap(addr >> AT45_PAGE_SIZE_LOG2);
+    *offset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1);
+    if (bytesRemaining < (1 << AT45_PAGE_SIZE_LOG2) - *offset)
+      *count = bytesRemaining;
+    else
+      *count = (1 << AT45_PAGE_SIZE_LOG2) - *offset;
+
+  }
+
+  void multipageContinue(uint16_t crc) {
+    at45page_t page;
+    at45pageoffset_t offset, count;
+    uint8_t *buf = s[client].buf;
+
+    if (bytesRemaining == 0)
+      {
+	multipageDone(crc);
+	return;
+      }
+
+    calcRequest(s[client].addr, &page, &offset, &count);
+    bytesRemaining -= count;
+    s[client].addr += count;
+    s[client].buf = buf + count;
+
+    switch (s[client].request)
+      {
+      case R_WRITE:
+	call At45db.write(page, offset, buf, count);
+	break;
+      case R_READ:
+	call At45db.read(page, offset, buf, count);
+	break;
+      default:
+	call At45db.computeCrc(page, offset, count, crc);
+	break;
+      }
+  }
+
+  void multipageStart(storage_len_t len, uint16_t crc) {
+    metaState = META_IDLE;
+    bytesRemaining = len;
+    multipageContinue(crc);
+  }
+
+  void multipageOpDone(error_t result, uint16_t crc) {
+    if (result != SUCCESS)
+      endRequest(result, 0);
+    else
+      multipageContinue(crc);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Erase								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.erase[uint8_t id]() {
+    return newRequest(R_ERASE, id, 0, NULL, 0);
+  }
+
+  void eraseStart() {
+    call At45db.erase(pageRemap(0), AT45_ERASE);
+  }
+
+  void eraseEraseDone(error_t error) {
+    endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return newRequest(R_WRITE, id, addr, buf, len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Commit								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.commit[uint8_t id]() {
+    return newRequest(R_COMMIT, id, 0, NULL, s[id].maxAddr);
+  }
+
+  /* Called once crc computed. Write crc + signature in block 0. */
+  void commitCrcDone(uint16_t crc) {
+    sig.crc = crc;
+    sig.maxAddr = s[client].maxAddr;
+    metaState = META_COMMIT;
+    call At45db.write(pageRemap(0), 1 << AT45_PAGE_SIZE_LOG2, &sig, sizeof sig);
+  }
+
+  void commitWriteDone(error_t error) {
+    if (error == SUCCESS)
+      call At45db.syncAll();
+    else
+      endRequest(error, 0);
+  }
+
+  void commitSyncDone(error_t error) {
+    endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Verify								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockRead.verify[uint8_t id]() {
+    return newRequest(R_VERIFY, id, 0, NULL, 0);
+  }
+
+  void verifyStart() {
+    metaState = META_VERIFY;
+    call At45db.read(pageRemap(0), 1 << AT45_PAGE_SIZE_LOG2, &sig, sizeof sig);
+  }
+
+  /* See signature written in commit */
+  void verifyReadDone(error_t error) {
+    if (error == SUCCESS)
+      {
+	storage_addr_t max = sig.maxAddr;
+
+	/* Ignore maxAddress values that are too large */
+	if (max <= call BlockRead.getSize[client]())
+	  {
+	    s[client].addr = 0;
+	    s[client].maxAddr = max;
+	    multipageStart(max, 0);
+	    return;
+	  }
+      }
+    endRequest(FAIL, 0);
+  }
+
+  void verifyCrcDone(uint16_t crc) {
+    if (crc == sig.crc)
+      endRequest(SUCCESS, 0);
+    else
+      {
+	s[client].maxAddr = 0;
+	endRequest(FAIL, 0);
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return newRequest(R_READ, id, addr, buf, len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Compute CRC							*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t basecrc) {
+    return newRequest(R_CRC, id, addr, (void *)basecrc, len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Get Size								*/
+  /* ------------------------------------------------------------------ */
+
+  command storage_len_t BlockRead.getSize[uint8_t blockId]() {
+    storage_len_t vsize;
+
+    if (call BConfig.isConfig[blockId]())
+      vsize = signal BConfig.npages[blockId]();
+    else
+      vsize = call At45dbVolume.volumeSize[blockId]();
+
+    return vsize << AT45_PAGE_SIZE_LOG2;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Dispatch HAL operations to current user op				*/
+  /* ------------------------------------------------------------------ */
+
+  event void At45db.writeDone(error_t result) {
+    if (client != NO_CLIENT)
+      if (metaState == META_IDLE)
+	multipageOpDone(result, 0);
+      else
+	commitWriteDone(result);
+  }
+
+  event void At45db.readDone(error_t result) {
+    if (client != NO_CLIENT)
+      if (metaState == META_IDLE)
+	multipageOpDone(result, 0);
+      else
+	verifyReadDone(result);
+  }
+
+  event void At45db.computeCrcDone(error_t result, uint16_t newCrc) {
+    if (client != NO_CLIENT)
+      multipageOpDone(result, newCrc);
+  }
+
+  event void At45db.eraseDone(error_t result) {
+    if (client != NO_CLIENT)
+      eraseEraseDone(result);
+  }
+
+  event void At45db.syncDone(error_t result) {
+    if (client != NO_CLIENT)
+      commitSyncDone(result);
+  }
+
+  event void At45db.flushDone(error_t result) { }
+  event void At45db.copyPageDone(error_t error) { }
+  default event void BlockWrite.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { }
+  default event void BlockWrite.eraseDone[uint8_t id](error_t result) { }
+  default event void BlockWrite.commitDone[uint8_t id](error_t result) { }
+  default event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { }
+  default event void BlockRead.verifyDone[uint8_t id](error_t result) { }
+  default event void BlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t x, error_t result) { }
+  
+  default command at45page_t At45dbVolume.remap[uint8_t id](at45page_t volumePage) { return 0; }
+  default command at45page_t At45dbVolume.volumeSize[uint8_t id]() { return 0; }
+  default async command error_t Resource.request[uint8_t id]() { return FAIL; }
+  default async command void Resource.release[uint8_t id]() { }
+}
diff --git a/tos/chips/at45db/ConfigStorageC.nc b/tos/chips/at45db/ConfigStorageC.nc
new file mode 100644
index 00000000..be719e97
--- /dev/null
+++ b/tos/chips/at45db/ConfigStorageC.nc
@@ -0,0 +1,43 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the config storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for config storage
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration ConfigStorageC(volume_id_t volid) {
+  provides {
+    interface Mount;
+    interface ConfigStorage;
+  }
+}
+implementation {
+  enum {
+    CONFIG_ID = unique(UQ_CONFIG_STORAGE),
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components ConfigStorageP, WireConfigStorageP, At45dbStorageManagerC, At45dbC;
+  components BlockStorageP, WireBlockStorageP;
+
+  Mount = ConfigStorageP.Mount[CONFIG_ID];
+  ConfigStorage = ConfigStorageP.ConfigStorage[CONFIG_ID];
+
+  BlockStorageP.At45dbVolume[CONFIG_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  BlockStorageP.Resource[CONFIG_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/ConfigStorageP.nc b/tos/chips/at45db/ConfigStorageP.nc
new file mode 100644
index 00000000..efe72bc3
--- /dev/null
+++ b/tos/chips/at45db/ConfigStorageP.nc
@@ -0,0 +1,356 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the config storage
+ * abstraction.
+ *
+ * @author: David Gay 
+ */
+
+#include "Storage.h"
+
+module ConfigStorageP {
+  provides {
+    interface Mount[uint8_t id];
+    interface ConfigStorage[uint8_t id];
+    interface At45dbBlockConfig as BConfig[uint8_t id];
+  }
+  uses {
+    interface At45db;
+    interface BlockRead[uint8_t id];
+    interface BlockWrite[uint8_t id];
+  }
+}
+implementation 
+{
+  /* A config storage is built on top of a block storage volume, with
+     the block storage volume divided into two and the first 4 bytes of
+     each half holding a (>0) version number. The valid half with the
+     highest version number is the current version.
+
+     Transactional behaviour is achieved by copying the current half
+     into the other, then increment its version number. Writes then
+     proceed in that new half until a commit, which just uses the 
+     underlying BlockStorage commit's operation.
+
+     Note: all of this depends on the at45db's implementation of 
+     BlockStorageP. It will not work over an arbitrary BlockStorageP
+     implementation (additionally, it uses hooks in BlockStorageP to
+     support the half-volume operation). Additionally, the code assumes
+     that the config volumes all have lower ids than the block volumes.
+  */
+
+  enum {
+    S_STOPPED,
+    S_MOUNT,
+    S_CLEAN,
+    S_DIRTY,
+    S_INVALID
+  };
+
+  enum {
+    N = uniqueCount(UQ_CONFIG_STORAGE),
+    NO_CLIENT = 0xff,
+  };
+
+  /* Per-client state */
+  uint8_t state[N];
+
+  /* Version numbers for lower and upper half */
+  uint32_t lowVersion[N], highVersion[N];
+
+  /* Bit n is true if client n is using upper block */
+  uint8_t flipState[(N + 7) / 8]; 
+
+  uint8_t client = NO_CLIENT;
+  at45page_t nextPage;
+
+  void setFlip(uint8_t id, bool flip) {
+    if (flip)
+      flipState[id >> 3] |= 1 << (id & 7);
+    else
+      flipState[id >> 3] &= ~(1 << (id & 7));
+  }
+
+  bool flipped(uint8_t id) {
+    return call BConfig.flipped[id]();
+  }
+
+  void flip(uint8_t id) {
+    setFlip(id, !flipped(id));
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Mounting								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t Mount.mount[uint8_t id]() {
+    /* Read version on both halves. Validate higher. Validate lower if
+       higher invalid. Use lower if both invalid. */
+    if (state[id] != S_STOPPED)
+      return FAIL;
+
+    state[id] = S_MOUNT;
+    setFlip(id, FALSE);
+    call BlockRead.read[id](0, &lowVersion[id], sizeof lowVersion[id]);
+
+    return SUCCESS;
+  }
+
+  void mountReadDone(uint8_t id, error_t error) {
+    if (error != SUCCESS)
+      {
+	state[id] = S_STOPPED;
+	signal Mount.mountDone[id](FAIL);
+      }
+    else if (!call BConfig.flipped[id]())
+      {
+	/* Just read low-half version. Read high-half version */
+	setFlip(id, TRUE);
+	call BlockRead.read[id](0, &highVersion[id], sizeof highVersion[id]);
+      }
+    else
+      {
+	/* Verify the half with the largest version */
+	setFlip(id, highVersion[id] > lowVersion[id]);
+	call BlockRead.verify[id]();
+      }
+  }
+
+  void mountVerifyDone(uint8_t id, error_t error) {
+    if (error == SUCCESS) 
+      state[id] = S_CLEAN;
+    else
+      {
+	// try the other half?
+	bool isflipped = call BConfig.flipped[id]();
+
+	if ((highVersion[id] > lowVersion[id]) == isflipped)
+	  {
+	    /* Verification of the half with the highest version failed. Try
+	       the other half. */
+	    setFlip(id, !isflipped);
+	    call BlockRead.verify[id]();
+	    return;
+	  }
+	/* both halves bad, just declare success and use the current half... */
+	state[id] = S_INVALID;
+	lowVersion[id] = highVersion[id] = 0;
+      }
+    signal Mount.mountDone[id](SUCCESS);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t ConfigStorage.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    /* Read from current half using BlockRead */
+    if (state[id] < S_CLEAN)
+      return EOFF;
+    if (state[id] == S_INVALID) // nothing to read
+      return FAIL;
+
+    return call BlockRead.read[id](addr + sizeof(uint32_t), buf, len);
+  }
+
+  void readReadDone(uint8_t id, storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    signal ConfigStorage.readDone[id](addr - sizeof(uint32_t), buf, len, error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t ConfigStorage.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    /* 1: If first write:
+         copy to other half with incremented version number
+       2: Write to other half using BlockWrite */
+
+    if (state[id] < S_CLEAN)
+      return EOFF;
+    return call BlockWrite.write[id](addr + sizeof(uint32_t), buf, len);
+  }
+
+  void copyCopyPageDone(error_t error);
+  void writeContinue(error_t error);
+
+  command int BConfig.writeHook[uint8_t id]() {
+    flip(id); /* We write to the non-current half... */
+    if (state[id] != S_CLEAN) // no copy if dirty or invalid
+      return FALSE;
+
+    /* Time to do the copy, version update dance */
+    client = id;
+    nextPage = signal BConfig.npages[id]();
+    copyCopyPageDone(SUCCESS);
+
+    return TRUE;
+  }
+
+  void copyCopyPageDone(error_t error) {
+    if (error != SUCCESS)
+      writeContinue(error);
+    else if (nextPage == 0) // copy done
+      {
+	uint32_t *version;
+
+	// Update the version number of the half indicated by flipped()
+	if (!flipped(client))
+	  {
+	    lowVersion[client] = highVersion[client] + 1;
+	    version = &lowVersion[client];
+	  }
+	else
+	  {
+	    highVersion[client] = lowVersion[client] + 1;
+	    version = &highVersion[client];
+	  }
+	call At45db.write(signal BConfig.remap[client](0), 0,
+			  version, sizeof *version);
+      }
+    else
+      {
+	// copy next page
+	at45page_t from, to, npages = signal BConfig.npages[client]();
+
+	to = from = signal BConfig.remap[client](--nextPage);
+	if (flipped(client))
+	  from -= npages;
+	else
+	  from += npages;
+
+	call At45db.copyPage(from, to);
+      }
+  }
+
+  void copyWriteDone(error_t error) {
+    if (error == SUCCESS)
+      state[client] = S_DIRTY;
+    writeContinue(error);
+  }
+
+  void writeContinue(error_t error) {
+    uint8_t id = client;
+
+    client = NO_CLIENT;
+    signal BConfig.writeContinue[id](error);
+  }
+
+  void writeWriteDone(uint8_t id, storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    flip(id); // flip back to current half
+    signal ConfigStorage.writeDone[id](addr - sizeof(uint32_t), buf, len, error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Commit								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t ConfigStorage.commit[uint8_t id]() {
+    /* Call BlockWrite.commit */
+    /* Could special-case attempt to commit clean block */
+    error_t ok;
+
+    if (state[id] < S_CLEAN)
+      return EOFF;
+    ok = call BlockWrite.commit[id]();
+    if (ok == SUCCESS)
+      flip(id); // switch to new block for commit
+    return ok;
+  }
+
+  void commitDone(uint8_t id, error_t error) {
+    if (error == SUCCESS)
+      state[id] = S_CLEAN;
+    else
+      flip(id); // revert to old block
+    signal ConfigStorage.commitDone[id](error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Get Size								*/
+  /* ------------------------------------------------------------------ */
+
+  command storage_len_t ConfigStorage.getSize[uint8_t id]() {
+    return call BlockRead.getSize[id]();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Valid								*/
+  /* ------------------------------------------------------------------ */
+
+  command bool ConfigStorage.valid[uint8_t id]() {
+    return state[id] != S_INVALID;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Interface with BlockStorageP					*/
+  /* ------------------------------------------------------------------ */
+
+  /* The config volumes use the low block volume numbers. So a volume is a
+     config volume iff its its id is less than N */
+
+  command int BConfig.isConfig[uint8_t id]() {
+    return id < N;
+  }
+
+  inline command int BConfig.flipped[uint8_t id]() {
+    return (flipState[id >> 3] & (1 << (id & 7))) != 0;
+  }
+
+  event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    if (id < N)
+      if (state[id] == S_MOUNT)
+	mountReadDone(id, error);
+      else
+	readReadDone(id, addr, buf, len, error);
+  }
+
+  event void BlockRead.verifyDone[uint8_t id]( error_t error ) {
+    if (id < N)
+      mountVerifyDone(id, error);
+  }
+
+  event void BlockWrite.writeDone[uint8_t id]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {
+    if (id < N)
+      writeWriteDone(id, addr, buf, len, error);
+  }
+
+  event void BlockWrite.commitDone[uint8_t id]( error_t error ) {
+    if (id < N)
+      commitDone(id, error);
+  }
+
+  event void At45db.writeDone(error_t error) {
+    if (client != NO_CLIENT)
+      copyWriteDone(error);
+  }
+
+  event void At45db.copyPageDone(error_t error) {
+    if (client != NO_CLIENT)
+      copyCopyPageDone(error);
+  }
+
+  event void BlockRead.computeCrcDone[uint8_t id]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {}
+  event void BlockWrite.eraseDone[uint8_t id]( error_t error ) {}
+  event void At45db.eraseDone(error_t error) {}
+  event void At45db.syncDone(error_t error) {}
+  event void At45db.flushDone(error_t error) {}
+  event void At45db.readDone(error_t error) {}
+  event void At45db.computeCrcDone(error_t error, uint16_t crc) {}
+
+  default event void Mount.mountDone[uint8_t id](error_t error) { }
+  default event void ConfigStorage.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void ConfigStorage.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void ConfigStorage.commitDone[uint8_t id](error_t error) {}
+}
diff --git a/tos/chips/at45db/HplAt45db.h b/tos/chips/at45db/HplAt45db.h
new file mode 100644
index 00000000..8c83bad0
--- /dev/null
+++ b/tos/chips/at45db/HplAt45db.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_H
+#define HPLAT45DB_H
+
+#include "HplAt45db_chip.h"
+
+enum { // commands we're executing (all SPI Mode 0 or 3)
+  AT45_C_READ_BUFFER1 = 0xd4,
+  AT45_C_READ_BUFFER2 = 0xd6,
+  AT45_C_READ_CONTINUOUS = 0xe8,
+  AT45_C_READ_PAGE = 0xd2,
+  AT45_C_WRITE_BUFFER1 = 0x84,
+  AT45_C_WRITE_BUFFER2 = 0x87,
+  AT45_C_WRITE_MEM_BUFFER1 = 0x82,
+  AT45_C_WRITE_MEM_BUFFER2 = 0x85,
+  AT45_C_FILL_BUFFER1 = 0x53, 
+  AT45_C_FILL_BUFFER2 = 0x55, 
+  AT45_C_FLUSH_BUFFER1 = 0x83,
+  AT45_C_FLUSH_BUFFER2 = 0x86,
+  AT45_C_QFLUSH_BUFFER1 = 0x88,
+  AT45_C_QFLUSH_BUFFER2 = 0x89,
+  AT45_C_COMPARE_BUFFER1 = 0x60,
+  AT45_C_COMPARE_BUFFER2 = 0x61,
+  AT45_C_REQ_STATUS = 0xd7,
+  AT45_C_ERASE_PAGE = 0x81,
+};
+
+
+#endif
diff --git a/tos/chips/at45db/HplAt45db.nc b/tos/chips/at45db/HplAt45db.nc
new file mode 100644
index 00000000..69cf5163
--- /dev/null
+++ b/tos/chips/at45db/HplAt45db.nc
@@ -0,0 +1,186 @@
+/*									tab:4
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * HPL for Atmel's AT45DB family of serial dataflash chips. 
+ * Provides access to all basic AT45DB operations plus operations to 
+ * wait for the flash to go idle or finish a comparison. See the AT45DB
+ * family datasheets for full details on these operations.
+ * 
    
+ * This interface only supports one operation at a time.
+ *
+ * @author David Gay
+ */
+
+#include "HplAt45db.h"
+
+interface HplAt45db {
+  /**
+   * Wait for a "Group A" operation to complete (essentially all non-buffer
+   * operations). You should use waitComapre if you are waiting for a
+   * comparison to complete. waitIdleDone will be signaled when the operation
+   * is complete.
+   */
+  command void waitIdle();
+
+  /**
+   * Signaled when the flash is idle.
+   */
+  event void waitIdleDone();
+
+  /**
+   * Wait for a buffer-flash comparison to complete. waitCompareDone will
+   * be signaled when that occurs.
+   */
+  command void waitCompare();
+
+  /**
+   * Signaled when the buffer-flash comparison is complete.
+   * @param compareOk TRUE if the comparison succeeded, FALSE otherwise.
+   */
+  event void waitCompareDone(bool compareOk);
+
+  /**
+   * Read a page from flash into a buffer. fillDone will be signaled.
+   * @param cmd AT45_C_FILL_BUFFER1 to read into buffer 1, 
+   *   AT45_C_FILL_BUFFER2 to read into buffer 2
+   * @param page Page to read (must be less than AT45_MAX_PAGES)
+   */
+  command void fill(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when fill command sent (use waitIdle to detect when
+   * fill command completes)
+   */
+  event void fillDone();
+
+  /**
+   * Write a buffer to a flash page. flushDone will be signaled.
+   * @param cmd AT45_C_FLUSH_BUFFER1 to write buffer 1 to flash,
+   *   AT45_C_FLUSH_BUFFER2 to write buffer 2 to flash,
+   *   AT45_C_QFLUSH_BUFFER1 to write buffer 1 to flash w/o erase
+   *   (page must have been previously erased),
+   *   AT45_C_QFLUSH_BUFFER2 to write buffer 2 to flash w/o erase
+   *   (page must have been previously erased),
+   * @param page Page to write (must be less than AT45_MAX_PAGES)
+   */
+  command void flush(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when flush command sent (use waitIdle to detect when
+   * flush command completes)
+   */
+  event void flushDone();
+
+  /**
+   * Compare a page from flash with a buffer. compareDone will be signaled.
+   * @param cmd AT45_C_COMPARE_BUFFER1 to compare buffer 1, 
+   *   AT45_C_COMPARE_BUFFER2 to compare buffer 2
+   * @param page Page to compare with (must be less than AT45_MAX_PAGES)
+   */
+  command void compare(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when compare command sent (use waitCompare to detect when
+   * compare command completes and find out comparison result)
+   */
+  event void compareDone();
+
+  /**
+   * Erase a flash page. eraseDone will be signaled.
+   * @param cmd must be AT45_C_ERASE_PAGE
+   * @param page Page to compare with (must be less than AT45_MAX_PAGES)
+   */
+  command void erase(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when erase command sent (use waitIdle to detect when
+   * erase command completes)
+   */
+  event void eraseDone();
+
+  /**
+   * Read from a flash buffer. readDone will be signaled.
+   * @param cmd AT45_C_READ_BUFFER1 to read from buffer 1,
+   *   AT45_C_READ_BUFFER2 to read from buffer 2
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void readBuffer(uint8_t cmd, at45pageoffset_t offset,
+		    uint8_t *PASS data, uint16_t n);
+
+  /**
+   * Read directly from flash. readDone will be signaled.
+   * @param cmd AT45_C_READ_CONTINUOUS or AT45_C_READ_PAGE. When the end of
+   *   a page is read, AT45_C_READ_CONTINUOUS continues on the next page,
+   *   while AT45_C_READ_PAGE continues at the start of the same page.
+   * @param page Page to read from
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0).
+   */
+  command void read(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+		    uint8_t *PASS data, at45pageoffset_t n);
+
+  /**
+   * Signaled when data has been read from the buffer. The data buffer
+   * is "returned".
+   */
+  event void readDone();
+
+  /**
+   * Compute CRC of data in a flash buffer (using the CRC function from crc.h).
+   * crcDone will be signaled.
+   * @param cmd AT45_C_READ_BUFFER1 to compute CRC from buffer 1,
+   *   AT45_C_READ_BUFFER2 to compute CRC from buffer 2
+   * @param page ignored (reserved for future use)
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   * @param baseCrc initial CRC value - use 0 if computing a "standalone"
+   *   CRC, or a previous crc result if computing a CRC over several
+   *   flash pages
+   */
+  command void crc(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+		   at45pageoffset_t n, uint16_t baseCrc);
+  /**
+   * Signaled when CRC has been computed.
+   * @param computedCrc CRC value
+   */
+  event void crcDone(uint16_t computedCrc);
+
+  /**
+   * Write some data to a flash buffer, and optionally the flash itself. 
+   * writeDone will be signaled.
+   * @param cmd One of AT45_C_WRITE_BUFFER1/2 or AT45_C_WRITE_MEM_BUFFER1/2
+   *   to write respectively to buffer 1/2, or to buffer 1/2 and the 
+   *   specified main memory page.
+   * @param page Page to write when cmd is AT45_C_WRITE_MEM_BUFFER1/2
+   * @param offset Offset in page at which to start writing - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Data to write. The buffer is "returned" at writeDone time.
+   * @param n Number of bytes to write (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void write(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+		     uint8_t *PASS data, at45pageoffset_t n);
+
+  /**
+   * Signaled when data has been written to the buffer. The data buffer
+   * is "returned".
+   */
+  event void writeDone();
+}
diff --git a/tos/chips/at45db/HplAt45dbByte.nc b/tos/chips/at45db/HplAt45dbByte.nc
new file mode 100644
index 00000000..047e4f27
--- /dev/null
+++ b/tos/chips/at45db/HplAt45dbByte.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Interface between generic byte-at-a-time AT45DB HPL implementation and
+ * its platform specific aspects.
+ * 
    
+ * Each platform must provide its own HPL implementation for its AT45DB
+ * flash chip. To simplify this task, this directory provides a generic HPL
+ * implementation (HplAt45dbByteC) which can easily be used to build an
+ * AT45DB HPL by connecting it to a byte-at-a-time SPI interface, and an
+ * implementation of the operations of this interface.
+ *
+ * @author David Gay
+ */
+
+interface HplAt45dbByte {
+  /**
+   * Wait for the flash chip to report that it is idle. This command is
+   * called immediately after sending a status request command to the
+   * flash, so it is sufficient to wait for the flash's data pin to go
+   * high.
+   */
+  command void waitIdle();
+  /**
+   * Signaled when the flash chip is idle.
+   */
+  event void idle();
+
+  /**
+   * This command may be called immediately after idle is signaled. It
+   * must report the flash's current compare status.
+   * @return TRUE if the last compare succeeded, FALSE if it failed.
+   */
+  command bool getCompareStatus();
+
+  /**
+   * Assert the flash's select pin.
+   */
+  command void select();
+
+  /**
+   * Deassert the flash's select pin.
+   */
+  command void deselect();
+}
diff --git a/tos/chips/at45db/HplAt45dbByteC.nc b/tos/chips/at45db/HplAt45dbByteC.nc
new file mode 100644
index 00000000..35e85e12
--- /dev/null
+++ b/tos/chips/at45db/HplAt45dbByteC.nc
@@ -0,0 +1,255 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Generic byte-at-a-time implementation of the AT45DB HPL.
+ * 
+ * Each platform must provide its own HPL implementation for its AT45DB
+ * flash chip. To simplify this task, this component can easily be used to
+ * build an AT45DB HPL by connecting it to a byte-at-a-time SPI interface,
+ * and an HplAt45dbByte interface.
+ *
+ * @param The number of bits needed to represent a sector size, e.g., 9
+ *   for the AT45DB041B.
+ *
+ * @author David Gay
+ */
+
+generic module HplAt45dbByteC(int sectorSizeLog2) {
+  provides interface HplAt45db;
+  uses {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation 
+{
+  enum {
+    P_IDLE,
+    P_SEND_CMD, 
+    P_READ,
+    P_READ_CRC,
+    P_WRITE,
+    P_WAIT_IDLE,
+    P_WAIT_COMPARE,
+    P_WAIT_COMPARE_OK,
+    P_FILL,
+    P_FLUSH,
+    P_COMPARE,
+    P_ERASE
+  };
+  uint8_t status = P_IDLE;
+  uint8_t flashCmd[4];
+  uint8_t *data;
+  at45pageoffset_t dataCount;
+  uint8_t dontCare;
+
+  void complete(uint16_t crc) {
+    uint8_t s = status;
+
+    status = P_IDLE;
+    switch (s)
+      {
+      default: break;
+      case P_READ_CRC:
+	signal HplAt45db.crcDone(crc);
+	break;
+      case P_FILL:
+	signal HplAt45db.fillDone();
+	break;
+      case P_FLUSH:
+	signal HplAt45db.flushDone();
+	break;
+      case P_COMPARE:
+	signal HplAt45db.compareDone();
+	break;
+      case P_ERASE:
+	signal HplAt45db.eraseDone();
+	break;
+      case P_READ:
+	signal HplAt45db.readDone();
+	break;
+      case P_WRITE:
+	signal HplAt45db.writeDone();
+	break;
+      }
+  }
+
+  void requestFlashStatus() {
+    uint8_t dummy;
+
+    call HplAt45dbByte.select();
+    call FlashSpi.write(AT45_C_REQ_STATUS, &dummy);
+    call HplAt45dbByte.waitIdle();
+  }
+
+  void doCommand() {
+    uint8_t in = 0, out = 0;
+    uint8_t *ptr;
+    at45pageoffset_t count;
+    uint8_t lphase;
+    uint16_t crc = (uint16_t)data;
+
+    if (dataCount) // skip 0-byte ops
+      {
+	/* For a 3% speedup, we could use labels and goto *.
+	   But: very gcc-specific. Also, need to do
+	   asm ("ijmp" : : "z" (state))
+	   instead of goto *state
+	*/
+
+	ptr = flashCmd;
+	lphase = P_SEND_CMD;
+	count = 4 + dontCare;
+
+	call HplAt45dbByte.select();
+	for (;;)
+	  {
+	    if (lphase == P_READ_CRC)
+	      {
+		crc = crcByte(crc, in);
+
+		--count;
+		if (!count)
+		  break;
+	      }
+	    else if (lphase == P_SEND_CMD)
+	      {
+		// Note: the dontCare bytes are read after the end of cmd...
+		out = *ptr++;
+		count--;
+		if (!count)
+		  {
+		    lphase = status;
+		    ptr = data;
+		    count = dataCount;
+		  }
+	      }
+	    else if (lphase == P_READ)
+	      {
+		*ptr++ = in;
+		--count;
+		if (!count)
+		  break;
+	      }
+	    else if (lphase == P_WRITE)
+	      {
+		if (!count)
+		  break;
+
+		out = *ptr++;
+		--count;
+	      }
+	    else /* P_COMMAND */
+	      break;
+	
+	    call FlashSpi.write(out, &in);
+	  }
+	call HplAt45dbByte.deselect();
+      }
+
+    call Resource.release();
+    complete(crc);
+  }
+
+  event void Resource.granted() {
+    switch (status)
+      {
+      case P_WAIT_COMPARE: case P_WAIT_IDLE:
+	requestFlashStatus();
+	break;
+      default:
+	doCommand();
+	break;
+      }
+  }
+
+  void execCommand(uint8_t op, uint8_t reqCmd, uint8_t reqDontCare,
+		   at45page_t reqPage, at45pageoffset_t reqOffset,
+		   uint8_t *reqData, at45pageoffset_t reqCount) {
+    status = op;
+
+    // page (2 bytes) and highest bit of offset
+    flashCmd[0] = reqCmd;
+    flashCmd[1] = reqPage >> (16 - sectorSizeLog2);
+    flashCmd[2] = reqPage << (sectorSizeLog2 - 8) | reqOffset >> 8;
+    flashCmd[3] = reqOffset; // low-order 8 bits
+    data = reqData;
+    dataCount = reqCount;
+    dontCare = reqDontCare;
+
+    call Resource.request();
+  }
+
+  command void HplAt45db.waitIdle() {
+    status = P_WAIT_IDLE;
+    call Resource.request();
+  }
+
+  command void HplAt45db.waitCompare() {
+    status = P_WAIT_COMPARE;
+    call Resource.request();
+  }
+
+  event void HplAt45dbByte.idle() {
+    if (status == P_WAIT_COMPARE)
+      {
+	bool cstatus = call HplAt45dbByte.getCompareStatus();
+	call HplAt45dbByte.deselect();
+	signal HplAt45db.waitCompareDone(cstatus);
+      }
+    else
+      {
+	call HplAt45dbByte.deselect();
+	signal HplAt45db.waitIdleDone();
+      }
+  }
+
+  command void HplAt45db.fill(uint8_t cmd, at45page_t page) {
+    execCommand(P_FILL, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.flush(uint8_t cmd, at45page_t page) {
+    execCommand(P_FLUSH, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.compare(uint8_t cmd, at45page_t page) {
+    execCommand(P_COMPARE, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.erase(uint8_t cmd, at45page_t page) {
+    execCommand(P_ERASE, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.read(uint8_t cmd,
+			      at45page_t page, at45pageoffset_t offset,
+			      uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_READ, cmd, 5, page, offset, pdata, count);
+  }
+
+  command void HplAt45db.readBuffer(uint8_t cmd, at45pageoffset_t offset,
+				    uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_READ, cmd, 2, 0, offset, pdata, count);
+  }
+
+  command void HplAt45db.crc(uint8_t cmd,
+			     at45page_t page, at45pageoffset_t offset,
+			     at45pageoffset_t count,
+			     uint16_t baseCrc) {
+    execCommand(P_READ_CRC, cmd, 2, page, offset, (uint8_t *)baseCrc, count);
+  }
+
+  command void HplAt45db.write(uint8_t cmd,
+			       at45page_t page, at45pageoffset_t offset,
+			       uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_WRITE, cmd, 0, page, offset, pdata, count);
+  }
+}
diff --git a/tos/chips/at45db/LogStorageC.nc b/tos/chips/at45db/LogStorageC.nc
new file mode 100644
index 00000000..c593bd15
--- /dev/null
+++ b/tos/chips/at45db/LogStorageC.nc
@@ -0,0 +1,44 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the log storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for log storage
+ * @param circular TRUE if you want a circular log, FALSE for a linear log
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration LogStorageC(volume_id_t volid, bool circular) {
+  provides {
+    interface LogWrite;
+    interface LogRead;
+  }
+}
+implementation {
+  enum {
+    LOG_ID = unique(UQ_LOG_STORAGE),
+    INTF_ID = LOG_ID << 1 | circular,
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components LogStorageP, WireLogStorageP, At45dbStorageManagerC, At45dbC;
+
+  LogWrite = LogStorageP.LogWrite[INTF_ID];
+  LogRead = LogStorageP.LogRead[INTF_ID];
+
+  LogStorageP.At45dbVolume[LOG_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  LogStorageP.Resource[LOG_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/LogStorageP.nc b/tos/chips/at45db/LogStorageP.nc
new file mode 100644
index 00000000..3cb8ab96
--- /dev/null
+++ b/tos/chips/at45db/LogStorageP.nc
@@ -0,0 +1,980 @@
+/*									tab:4
+ * "Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include 
+#include 
+
+/**
+ * Private component of the AT45DB implementation of the log storage
+ * abstraction.
+ *
+ * @author: David Gay 
+ * @author: Jonathan Hui 
+ */
+
+module LogStorageP {
+  provides {
+    interface LogRead[uint8_t logId];
+    interface LogWrite[uint8_t logId];
+  }
+  uses {
+    interface At45db;
+    interface At45dbVolume[uint8_t logId];
+    interface Resource[uint8_t logId];
+  }
+}
+implementation
+{
+  /* Some design notes.
+
+  - The logId's in the LogRead and LogWrites are shifted left by 1 bit.
+    The low-order bit is 1 for circular logs, 0 for linear ones
+    (see newRequest and endRequest, and the LogStorageC configuration)
+
+  - Data is written sequentially to the pages of a log volume. Each page
+    ends with a footer (nx_struct pageinfo) recording metadata on the
+    current page:
+    o a cookie
+    o the "position" of the current page in the log (see below)
+    o the offset of the last record on this page (i.e., the offset
+      at which the last append ended) - only valid if flags & F_LASTVALID
+    o flags: 
+      x F_SYNC page was synchronised - data after lastRecordOffset
+        is not log data; implies F_LASTVALID
+      x F_CIRCLED this page is not from the first run through the log's
+        pages (never set in linear logs)
+      x F_LASTVALID not set if no record ended on this page
+    o a CRC
+
+  - "Positions" are stored in the metadata, used as cookies by
+    currentOffset and seek, and stored in the wpos and rpos fields of the
+    volume state structure.  They represent the number of bytes that
+    writing has advanced in the log since the log was erased, with
+    PAGE_SIZE added. Note that this is basically the number of bytes
+    written, except that when a page is synchronised unused bytes in the
+    page count towards increasing the position.
+
+    As a result, on page p, the following equation holds:
+      (metadata(p).pos - PAGE_SIZE) % volume-size == p * PAGE_SIZE
+    (this also means that the "position" metadata field could be replaced
+    by a count of the number of times writing has cycled through the log,
+    reducing the metadata size)
+
+    The PAGE_SIZE offset on positions is caused by Invariant 2 below: to
+    ensure that Invariant 2 is respected, at flash erase time, we write a
+    valid page with position 0 to the last block of the flash. As a result,
+    the first writes to the flash, in page 0, are at "position" PAGE_SIZE.
+
+  - This code is designed to deal with "one-at-a-time" failures (i.e.,
+    the system will not modify any blocks after a previous failed
+    write). This should allow recovery from:
+    o arbitrary reboots
+    o write failure (the underlying PageEEPROM shuts down after any
+      write fails; all pages are flushed before moving on to the next
+      page)
+    It will not recover from arbitrary data corruption
+
+  - When sync is called, the current write page is written to flash with an
+    F_SYNC flag and writing continues on the next page (wasting on average
+    half a flasg page)
+
+  - We maintain the following invariants on log volumes, even in the face
+    of the "one-at-a-time" failures described above:
+    1) at least one of the first and last blocks are valid
+    2) the last block, if valid, has the F_SYNC flag
+
+  - Locating the log boundary page (the page with the greatest position):
+
+    Invariant 1, the one-at-a-time failure model and the metadata position
+    definition guarantees that the physical flash pages have the following
+    properties:
+      an initial set of V1 valid pages,
+      followed by a set of I invalid pages,
+      followed by a set of V2 valid pages
+    with V1+i+V2=total-number-of-pages, and V1, V2, I >= 0
+    Additionally, the position of all pages in V1 is greater than in V2,
+    and consecutive pages in V1 (respectively V2) have greater positions
+    than their predecessors.
+
+    From this, it's possible to locate the log boundary page (the page with
+    the greatest position) using the following algorithm:
+    o let basepos=metadata(lastpage).pos, or 0 if the last page is invalid
+    o locate (using a binary search) the page p with the largest position
+      greater than basepos
+      invalid pages can be assumed to have positions less than basepos
+      if there is no such page p, let p = lastpage
+
+    Once the log boundary page is known, we resume writing at the last
+    page before p with a record boundary (Invariant 2, combined with
+    limiting individual records to volumesize - PAGE_SIZE ensures there
+    will be such a page).
+
+  - The read pointer has a special "invalid" state which represents the
+    current beginning of the log. In that state, LogRead.currentOffset()
+    returns SEEK_BEGINNING rather than a regular position.
+
+    The read pointer is invalidated:
+    o at boot time
+    o after the volume is erased
+    o after the write position "catches up" with the read position
+    o after a failed seek
+
+    Reads from an invalid pointer:
+    o start reading from the beginning of the flash if we are on the
+      first run through the log volume
+    o start reading at the first valid page after the write page with
+      an F_LASTVALID flag; the read offset is set to the lastRecordOffset
+      value
+      if this page has the SYNC flag, we start at the beginning of the
+      next page
+  */
+             
+
+  enum {
+    F_SYNC = 1,
+    F_CIRCLED = 2,
+    F_LASTVALID = 4
+  };
+
+  nx_struct pageinfo {
+    nx_uint16_t magic;
+    nx_uint32_t pos;
+    nx_uint8_t lastRecordOffset;
+    nx_uint8_t flags;
+    nx_uint16_t crc;
+  };
+
+  enum {
+    N = uniqueCount(UQ_LOG_STORAGE),
+    NO_CLIENT = 0xff,
+    PAGE_SIZE = AT45_PAGE_SIZE - sizeof(nx_struct pageinfo),
+    PERSISTENT_MAGIC = 0x4256,
+  };
+
+  enum {
+    R_IDLE,
+    R_ERASE,
+    R_APPEND,
+    R_SYNC,
+    R_READ,
+    R_SEEK
+  };
+
+  enum {
+    META_IDLE,
+    META_LOCATEFIRST,
+    META_LOCATE,
+    META_LOCATELAST,
+    META_SEEK,
+    META_READ,
+    META_WRITE
+  };
+
+  uint8_t client = NO_CLIENT;
+  uint8_t metaState;
+  at45page_t firstPage, lastPage;
+  storage_len_t len;
+  nx_struct pageinfo metadata;
+
+  struct {
+    /* The latest request made for this client, and it's arguments */
+    uint8_t request; 
+    uint8_t *buf;
+    storage_len_t len;
+
+    /* Log r/w positions */
+    bool positionKnown : 1;
+    bool circular : 1;
+    bool circled : 1;
+    bool rvalid : 1;
+    uint32_t wpos;		/* Bytes since start of logging */
+    at45page_t wpage;		/* Current write page */
+    at45pageoffset_t woffset;	/* Offset on current write page */
+    uint32_t rpos;		/* Bytes since start of logging */
+    at45page_t rpage;		/* Current read page */
+    at45pageoffset_t roffset;	/* Offset on current read page */
+    at45pageoffset_t rend;	/* Last valid offset on current read page */
+  } s[N];
+
+  at45page_t firstVolumePage() {
+    return call At45dbVolume.remap[client](0);
+  }
+
+  at45page_t npages() {
+    return call At45dbVolume.volumeSize[client]();
+  }
+
+  at45page_t lastVolumePage() {
+    return call At45dbVolume.remap[client](npages());
+  }
+
+  void setWritePage(at45page_t page) {
+    if (s[client].circular && page == lastVolumePage())
+      {
+	s[client].circled = TRUE;
+	page = firstVolumePage();
+      }
+    s[client].wpage = page;
+    s[client].woffset = 0;
+  }
+
+  void invalidateReadPointer() {
+    s[client].rvalid = FALSE;
+  }
+
+  void crcPage(at45page_t page) {
+    call At45db.computeCrc(page, 0,
+			   PAGE_SIZE + offsetof(nx_struct pageinfo, crc), 0);
+  }
+
+  void readMetadata(at45page_t page) {
+    call At45db.read(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void writeMetadata(at45page_t page) {
+    call At45db.write(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void wmetadataStart();
+
+  void sync() {
+    metadata.flags = F_SYNC | F_LASTVALID;
+    metadata.lastRecordOffset = s[client].woffset;
+    wmetadataStart();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Queue and initiate user requests					*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseStart();
+  void appendStart();
+  void syncStart();
+  void readStart();
+  void locateStart();
+  void rmetadataStart();
+  void seekStart();
+
+  void startRequest() {
+    if (!s[client].positionKnown && s[client].request != R_ERASE)
+      {
+	locateStart();
+	return;
+      }
+
+    metaState = META_IDLE;
+    switch (s[client].request)
+      {
+      case R_ERASE: eraseStart(); break;
+      case R_APPEND: appendStart(); break;
+      case R_SYNC: syncStart(); break;
+      case R_READ: readStart(); break;
+      case R_SEEK: seekStart(); break;
+      }
+  }
+
+  void endRequest(error_t ok) {
+    uint8_t c = client;
+    uint8_t request = s[c].request;
+    storage_len_t actualLen = s[c].len - len;
+    void *ptr = s[c].buf - actualLen;
+    
+    client = NO_CLIENT;
+    s[c].request = R_IDLE;
+    call Resource.release[c]();
+
+    c = c << 1 | s[c].circular;
+    switch (request)
+      {
+      case R_ERASE: signal LogWrite.eraseDone[c](ok); break;
+      case R_APPEND: signal LogWrite.appendDone[c](ptr, actualLen, ok); break;
+      case R_SYNC: signal LogWrite.syncDone[c](ok); break;
+      case R_READ: signal LogRead.readDone[c](ptr, actualLen, ok); break;
+      case R_SEEK: signal LogRead.seekDone[c](ok); break;
+      }
+  }
+
+  /* Enqueue request and request the underlying flash */
+  error_t newRequest(uint8_t newRequest, uint8_t id,
+		     uint8_t *buf, storage_len_t length) {
+    s[id >> 1].circular = id & 1;
+    id >>= 1;
+
+    if (s[id].request != R_IDLE)
+      return EBUSY;
+
+    s[id].request = newRequest;
+    s[id].buf = buf;
+    s[id].len = length;
+    call Resource.request[id]();
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted[uint8_t id]() {
+    client = id;
+    len = s[client].len;
+    startRequest();
+  }
+
+  command error_t LogWrite.append[uint8_t id](void* buf, storage_len_t length) {
+    if (len > call LogRead.getSize[id]() - PAGE_SIZE)
+      /* Writes greater than the volume size are invalid.
+	 Writes equal to the volume size could break the log volume
+	 invariant (see next comment).
+	 Writes that span the whole volume could lead to problems
+	 at boot time (no valid block with a record boundary).
+	 Refuse them all. */
+      return EINVAL;
+    else
+      return newRequest(R_APPEND, id, buf, length);
+  }
+
+  command storage_cookie_t LogWrite.currentOffset[uint8_t id]() {
+    return s[id >> 1].wpos;
+  }
+
+  command error_t LogWrite.erase[uint8_t id]() {
+    return newRequest(R_ERASE, id, NULL, 0);
+  }
+
+  command error_t LogWrite.sync[uint8_t id]() {
+    return newRequest(R_SYNC, id, NULL, 0);
+  }
+
+  command error_t LogRead.read[uint8_t id](void* buf, storage_len_t length) {
+    return newRequest(R_READ, id, buf, length);
+  }
+
+  command storage_cookie_t LogRead.currentOffset[uint8_t id]() {
+    id >>= 1;
+    return s[id].rvalid ? s[id].rpos : SEEK_BEGINNING;
+  }
+
+  command error_t LogRead.seek[uint8_t id](storage_cookie_t offset) {
+    return newRequest(R_SEEK, id, (void *)(offset >> 16), offset);
+  }
+
+  command storage_len_t LogRead.getSize[uint8_t id]() {
+    return call At45dbVolume.volumeSize[id >> 1]() * (storage_len_t)PAGE_SIZE;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Erase								*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseMetadataDone() {
+    /* Set write pointer to the beginning of the flash */
+    s[client].wpos = PAGE_SIZE; // last page has offset 0 and is before us
+    s[client].circled = FALSE;
+    setWritePage(firstVolumePage()); 
+
+    invalidateReadPointer();
+
+    s[client].positionKnown = TRUE;
+    endRequest(SUCCESS);
+  }
+
+  void eraseEraseDone() {
+    if (firstPage == lastPage - 1)
+      {
+	/* We create a valid, synced last page (see invariants) */
+	metadata.flags = F_SYNC | F_LASTVALID;
+	metadata.lastRecordOffset = 0;
+	setWritePage(firstPage);
+	s[client].circled = FALSE;
+	s[client].wpos = 0;
+	wmetadataStart();
+      }
+    else
+      call At45db.erase(firstPage++, AT45_ERASE);
+  }
+
+  void eraseStart() {
+    s[client].positionKnown = FALSE; // in case erase fails
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage();
+    eraseEraseDone();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Locate log boundaries						*/
+  /* ------------------------------------------------------------------ */
+
+  void locateLastRecord();
+
+  void locateLastCrcDone(uint16_t crc) {
+    if (crc != metadata.crc)
+      {
+	locateLastRecord();
+	return;
+      }
+
+    /* We've found the last valid page with a record-end. Set up
+       the read and write positions. */
+    invalidateReadPointer();
+
+    if (metadata.flags & F_SYNC) /* must start on next page */
+      {
+	/* We need to special case the empty log, as we don't want
+	   to wrap around in the case of a full, non-circular log
+	   with a sync on its last page. */
+	if (firstPage == lastPage && !metadata.pos)
+	  setWritePage(firstVolumePage());
+	else
+	  setWritePage(firstPage + 1);
+	s[client].wpos = metadata.pos + PAGE_SIZE;
+      }
+    else
+      {
+	s[client].wpage = firstPage;
+	s[client].woffset = metadata.lastRecordOffset;
+	s[client].wpos = metadata.pos + metadata.lastRecordOffset;
+      }
+
+    s[client].circled = (metadata.flags & F_CIRCLED) != 0;
+    if (s[client].circled && !s[client].circular) // oops
+      {
+	endRequest(FAIL);
+	return;
+      }
+
+    /* And we can now proceed to the real request */
+    s[client].positionKnown = TRUE;
+    startRequest();
+  }
+
+  void locateLastReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && metadata.flags & F_LASTVALID)
+      crcPage(firstPage);
+    else
+      locateLastRecord();
+  }
+
+  void locateLastRecord() {
+    if (firstPage == lastPage)
+      {
+	/* We walked all the way back to the last page, and it's not 
+	   valid. The log-volume invariant is not holding. Fail out. */
+	endRequest(FAIL);
+	return;
+      }
+
+    if (firstPage == firstVolumePage())
+      firstPage = lastPage;
+    else
+      firstPage--;
+
+    readMetadata(firstPage);
+  }
+
+  void located() {
+    metaState = META_LOCATELAST;
+    /* firstPage is one after last valid page, but the last page with
+       a record end may be some pages earlier. Search for it. */
+    lastPage = lastVolumePage() - 1;
+    locateLastRecord();
+  }
+
+  at45page_t locateCurrentPage() {
+    return firstPage + ((lastPage - firstPage) >> 1);
+  }
+
+  void locateBinarySearch() {
+    if (lastPage <= firstPage)
+      located();
+    else
+      readMetadata(locateCurrentPage());
+  }
+
+  void locateGreaterThan() {
+    firstPage = locateCurrentPage() + 1;
+    locateBinarySearch();
+  }
+
+  void locateLessThan() {
+    lastPage = locateCurrentPage();
+    locateBinarySearch();
+  }
+
+  void locateCrcDone(uint16_t crc) {
+    if (crc == metadata.crc)
+      {
+	s[client].wpos = metadata.pos;
+	locateGreaterThan();
+      }
+    else
+      locateLessThan();
+  }
+
+  void locateReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && s[client].wpos < metadata.pos)
+      crcPage(locateCurrentPage());
+    else
+      locateLessThan();
+  }
+
+  void locateFirstCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc)
+      s[client].wpos = metadata.pos;
+    else
+      s[client].wpos = 0;
+
+    metaState = META_LOCATE;
+    locateBinarySearch();
+  }
+
+  void locateFirstReadDone() {
+    crcPage(lastPage);
+  }
+
+  /* Locate log beginning and ending. See description at top of file. */
+  void locateStart() {
+    metaState = META_LOCATEFIRST;
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage() - 1;
+    readMetadata(lastPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Append								*/
+  /* ------------------------------------------------------------------ */
+
+  void appendContinue() {
+    uint8_t *buf = s[client].buf;
+    at45pageoffset_t offset = s[client].woffset, count;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (s[client].wpage == lastVolumePage())
+      {
+	/* We reached the end of a linear log */
+	endRequest(ESIZE);
+	return;
+      }
+
+    if (offset + len <= PAGE_SIZE)
+      count = len;
+    else
+      count = PAGE_SIZE - offset;
+
+    s[client].buf += count;
+    s[client].wpos += count;
+    s[client].woffset += count;
+    len -= count;
+
+    call At45db.write(s[client].wpage, offset, buf, count);
+  }
+  
+  void appendWriteDone() {
+    if (s[client].woffset == PAGE_SIZE) /* Time to write metadata */
+      wmetadataStart();
+    else
+      endRequest(SUCCESS);
+  }
+
+  void appendMetadataDone() { // metadata of previous page flushed
+    /* Setup metadata in case we overflow this page too */
+    metadata.flags = 0;
+    appendContinue();
+  }
+
+  void appendSyncDone() {
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    appendStart();
+  }
+
+  void appendStart() {
+    storage_len_t vlen = (storage_len_t)npages() * PAGE_SIZE;
+
+    /* If request would span the end of the flash, sync, to maintain the
+       invariant that the last flash page is synced and that either
+       the first or last pages are valid.
+
+       Note that >= in the if below means we won't write a record that
+       would end on the last byte of the last page, as this would mean that
+       we would not sync the last page, breaking the log volume
+       invariant */
+    if (s[client].wpos % vlen >= vlen - len)
+      sync();
+    else
+      {
+	/* Set lastRecordOffset in case we need to write metadata (see
+	   wmetadataStart) */
+	metadata.lastRecordOffset = s[client].woffset;
+	metadata.flags = F_LASTVALID;
+	appendContinue();
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Sync								*/
+  /* ------------------------------------------------------------------ */
+
+  void syncStart() {
+    if (s[client].woffset == 0) /* we can't lose any writes */
+      endRequest(SUCCESS);
+    else
+      sync();
+  }
+
+  void syncMetadataDone() {
+    /* Write position reflect the absolute position in the flash, not
+       user-bytes written. So update wpos to reflect sync effects. */
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    endRequest(SUCCESS);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void wmetadataStart() {
+    /* The caller ensures that metadata.flags (except F_CIRCLED) and
+       metadata.lastRecordOffset are set correctly. */
+    metaState = META_WRITE;
+    firstPage = s[client].wpage; // remember page to commit
+    metadata.pos = s[client].wpos - s[client].woffset;
+    metadata.magic = PERSISTENT_MAGIC;
+    if (s[client].circled)
+      metadata.flags |= F_CIRCLED;
+
+    call At45db.computeCrc(firstPage, 0, PAGE_SIZE, 0);
+
+    /* We move to the next page now. If writing the metadata fails, we'll
+       simply leave the invalid page in place. Trying to recover seems
+       complicated, and of little benefit (note that in practice, At45dbC
+       shuts down after a failed write, so nothing is really going to
+       happen after that anyway). */
+    setWritePage(s[client].wpage + 1);
+
+    /* Invalidate read pointer if we reach it's page */
+    if (s[client].wpage == s[client].rpage)
+      invalidateReadPointer();
+  }
+
+  void wmetadataCrcDone(uint16_t crc) {
+    uint8_t i, *md;
+
+    // Include metadata in crc
+    md = (uint8_t *)&metadata;
+    for (i = 0; i < offsetof(nx_struct pageinfo, crc); i++)
+      crc = crcByte(crc, md[i]);
+    metadata.crc = crc;
+
+    // And save it
+    writeMetadata(firstPage);
+  }
+
+  void wmetadataWriteDone() {
+    metaState = META_IDLE;
+    if (metadata.flags & F_SYNC)
+      call At45db.sync(firstPage);
+    else
+      call At45db.flush(firstPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read 								*/
+  /* ------------------------------------------------------------------ */
+
+  void readContinue() {
+    uint8_t *buf = s[client].buf;
+    at45pageoffset_t offset = s[client].roffset, count;
+    at45pageoffset_t end = s[client].rend;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (!s[client].rvalid)
+      {
+	if (s[client].circled)
+	  /* Find a valid page after wpage, skipping invalid pages */
+	  s[client].rpage = s[client].wpage;
+	else
+	  {
+	    /* resume writing at the beginning of the first page */
+	    s[client].rvalid = TRUE;
+	    s[client].rpage = lastVolumePage() - 1;
+	  }
+
+	rmetadataStart();
+	return;
+      }
+
+    if (s[client].rpage == s[client].wpage)
+      end = s[client].woffset;
+
+    if (offset == end)
+      {
+	if ((s[client].rpage + 1 == lastVolumePage() && !s[client].circular) ||
+	    s[client].rpage == s[client].wpage)
+	  endRequest(SUCCESS); // end of log
+	else
+	  rmetadataStart();
+	return;
+      }
+
+    if (offset + len <= end)
+      count = len;
+    else
+      count = end - offset;
+
+    s[client].buf += count;
+    len -= count;
+    s[client].rpos += count;
+    s[client].roffset = offset + count;
+
+    call At45db.read(s[client].rpage, offset, buf, count);
+  }
+
+  void readStart() {
+    readContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void continueReadAt(at45pageoffset_t roffset) {
+    /* Resume reading at firstPage whose metadata is currently available
+       in the metadata variable */
+    metaState = META_IDLE;
+    s[client].rpos = metadata.pos + roffset;
+    s[client].rpage = firstPage;
+    s[client].roffset = roffset;
+    s[client].rend =
+      metadata.flags & F_SYNC ? metadata.lastRecordOffset : PAGE_SIZE;
+    s[client].rvalid = TRUE;
+    readContinue();
+  }
+
+  void rmetadataContinue() {
+    if (++firstPage == lastVolumePage())
+      firstPage = firstVolumePage();
+    if (firstPage == s[client].wpage)
+      if (!s[client].rvalid)
+	/* We cannot find a record boundary to start at (we've just
+	   walked through the whole log...). Give up. */
+	endRequest(SUCCESS);
+      else
+	{
+	  /* The current write page has no metadata yet, so we fake it */
+	  metadata.flags = 0;
+	  metadata.pos = s[client].wpos - s[client].woffset;
+	  continueReadAt(0);
+	}
+    else
+      readMetadata(firstPage);
+  }
+
+  void rmetadataReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC)
+      crcPage(firstPage);
+    else
+      endRequest(SUCCESS);
+  }
+
+  void rmetadataCrcDone(uint16_t crc) {
+    if (!s[client].rvalid)
+      if (crc == metadata.crc && metadata.flags & F_LASTVALID)
+	continueReadAt(metadata.lastRecordOffset);
+      else
+	rmetadataContinue();
+    else 
+      if (crc == metadata.crc)
+	continueReadAt(0);
+      else
+	endRequest(SUCCESS);
+  }
+
+  void rmetadataStart() {
+    metaState = META_READ;
+    firstPage = s[client].rpage;
+    rmetadataContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Seek.								*/
+  /* ------------------------------------------------------------------ */
+
+  void seekCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc &&
+	metadata.pos == s[client].rpos - s[client].roffset)
+      {
+	s[client].rvalid = TRUE;
+	if (metadata.flags & F_SYNC)
+	  s[client].rend = metadata.lastRecordOffset;
+      }
+    endRequest(SUCCESS);
+  }
+
+  void seekReadDone() {
+    crcPage(s[client].rpage);
+  }
+
+  /* Move to position specified by cookie. */
+  void seekStart() {
+    uint32_t offset = (uint32_t)(uint16_t)s[client].buf << 16 | s[client].len;
+
+    invalidateReadPointer(); // default to beginning of log
+
+    /* The write positions are offset by PAGE_SIZE (see emptyLog) */
+
+    if (offset == SEEK_BEGINNING)
+      offset = PAGE_SIZE;
+
+    if (offset > s[client].wpos || offset < PAGE_SIZE)
+      {
+	endRequest(EINVAL);
+	return;
+      }
+
+    /* Cookies are just flash positions which continue incrementing as
+       you circle around and around. So we can just check the requested
+       page's metadata.pos field matches the cookie's value */
+    s[client].rpos = offset;
+    s[client].roffset = (offset - PAGE_SIZE) % PAGE_SIZE;
+    s[client].rpage = firstVolumePage() + ((offset - PAGE_SIZE) / PAGE_SIZE) % npages();
+    s[client].rend = PAGE_SIZE; // default to no sync flag
+
+    // The last page's metadata isn't written to flash yet. Special case it.
+    if (s[client].rpage == s[client].wpage)
+      {
+	/* If we're seeking within the current write page, just go there.
+	   Otherwise, we're asking for an old version of the current page
+	   so just keep the invalidated read pointer, i.e., read from
+	   the beginning. */
+	if (offset >= s[client].wpos - s[client].woffset)
+	  s[client].rvalid = TRUE;
+	endRequest(SUCCESS);
+      }
+    else
+      {
+	metaState = META_SEEK;
+	readMetadata(s[client].rpage);
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Dispatch HAL operations to current user op				*/
+  /* ------------------------------------------------------------------ */
+
+  event void At45db.eraseDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	eraseEraseDone();
+  }
+
+  event void At45db.writeDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_WRITE: wmetadataWriteDone(); break;
+	  case META_IDLE: appendWriteDone(); break;
+	  }
+  }
+
+  event void At45db.syncDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else switch (s[client].request)
+	{
+	case R_ERASE: eraseMetadataDone(); break;
+	case R_APPEND: appendSyncDone(); break;
+	case R_SYNC: syncMetadataDone(); break;
+	}
+  }
+
+  event void At45db.flushDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	appendMetadataDone();
+  }
+
+  event void At45db.readDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstReadDone(); break;
+	  case META_LOCATE: locateReadDone(); break;
+	  case META_LOCATELAST: locateLastReadDone(); break;
+	  case META_SEEK: seekReadDone(); break;
+	  case META_READ: rmetadataReadDone(); break;
+	  case META_IDLE: readContinue(); break;
+	  }					    
+  }
+
+  event void At45db.computeCrcDone(error_t error, uint16_t crc) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstCrcDone(crc); break;
+	  case META_LOCATE: locateCrcDone(crc); break;
+	  case META_LOCATELAST: locateLastCrcDone(crc); break;
+	  case META_SEEK: seekCrcDone(crc); break;
+	  case META_WRITE: wmetadataCrcDone(crc); break;
+	  case META_READ: rmetadataCrcDone(crc); break;
+	  }
+  }
+
+  event void At45db.copyPageDone(error_t error) { }
+
+  default event void LogWrite.appendDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { }
+  default event void LogWrite.eraseDone[uint8_t logId](error_t error) { }
+  default event void LogWrite.syncDone[uint8_t logId](error_t error) { }
+  default event void LogRead.readDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { }
+  default event void LogRead.seekDone[uint8_t logId](error_t error) {}
+
+  default command at45page_t At45dbVolume.remap[uint8_t logId](at45page_t volumePage) {return 0;}
+  default command at45page_t At45dbVolume.volumeSize[uint8_t logId]() {return 0;}
+  default async command error_t Resource.request[uint8_t logId]() {return SUCCESS;}
+  default async command void Resource.release[uint8_t logId]() { }
+}
diff --git a/tos/chips/at45db/Storage_chip.h b/tos/chips/at45db/Storage_chip.h
new file mode 100644
index 00000000..d4cd3346
--- /dev/null
+++ b/tos/chips/at45db/Storage_chip.h
@@ -0,0 +1,12 @@
+// $Id$
+
+#ifndef STORAGE_CHIP_H
+#define STORAGE_CHIP_H
+
+#include "At45db.h"
+
+#define UQ_BLOCK_STORAGE "BlockStorageP.BlockRead"
+#define UQ_LOG_STORAGE "LogStorageP.LogRead"
+#define UQ_CONFIG_STORAGE "ConfigStorageP.ConfigRead"
+
+#endif
diff --git a/tos/chips/at45db/WireBlockStorageP.nc b/tos/chips/at45db/WireBlockStorageP.nc
new file mode 100644
index 00000000..6e745904
--- /dev/null
+++ b/tos/chips/at45db/WireBlockStorageP.nc
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the block storage
+ * abstraction.
+ *
+ * @author: David Gay 
+ */
+
+configuration WireBlockStorageP { }
+implementation {
+  components BlockStorageP, At45dbC;
+
+  BlockStorageP.At45db -> At45dbC;
+}
diff --git a/tos/chips/at45db/WireConfigStorageP.nc b/tos/chips/at45db/WireConfigStorageP.nc
new file mode 100644
index 00000000..26886f7c
--- /dev/null
+++ b/tos/chips/at45db/WireConfigStorageP.nc
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the config storage
+ * abstraction.
+ *
+ * @author: David Gay 
+ */
+
+configuration WireConfigStorageP { }
+implementation {
+  components ConfigStorageP, BlockStorageP, At45dbC;
+
+  ConfigStorageP.At45db -> At45dbC;
+  ConfigStorageP.BlockRead -> BlockStorageP;
+  ConfigStorageP.BlockWrite -> BlockStorageP;
+  ConfigStorageP.BConfig <- BlockStorageP;
+}
diff --git a/tos/chips/at45db/WireLogStorageP.nc b/tos/chips/at45db/WireLogStorageP.nc
new file mode 100644
index 00000000..c3de0fd2
--- /dev/null
+++ b/tos/chips/at45db/WireLogStorageP.nc
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the log storage
+ * abstraction.
+ *
+ * @author: David Gay 
+ */
+
+configuration WireLogStorageP { }
+implementation {
+  components LogStorageP, At45dbC;
+
+  LogStorageP.At45db -> At45dbC;
+}
diff --git a/tos/chips/atm128/Atm128Clock.h b/tos/chips/atm128/Atm128Clock.h
new file mode 100644
index 00000000..4fbbd28d
--- /dev/null
+++ b/tos/chips/atm128/Atm128Clock.h
@@ -0,0 +1,70 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_ATM128CLOCK_H
+#define _H_ATM128CLOCK_H
+
+//====================== Oscillators ==================================
+
+/* Timer Clock Select -- set via Fuses only through ISP */
+enum {
+  ATM128_CKSEL_EXT_CLK = 0,        //!< External clock source
+  ATM128_CKSEL_INT_1MHZ = 1,       //!< Internal RC oscillator
+  ATM128_CKSEL_INT_2MHZ,
+  ATM128_CKSEL_INT_4MHZ,
+  ATM128_CKSEL_INT_8MHZ,
+  ATM128_CKSEL_EXT_RC_1MHZ = 5,    //!< External RC oscillator
+  ATM128_CKSEL_EXT_RC_3MHZ,
+  ATM128_CKSEL_EXT_RC_8MHZ,
+  ATM128_CKSEL_EXT_RC_12MHZ,
+  ATM128_CKSEL_EXT_CRYSTAL = 9,     //!< External low freq crystal
+  ATM128_CKSEL_EXT_RES_1MHZ = 10,   //!< External resonator
+  ATM128_CKSEL_EXT_RES_3MHZ,
+  ATM128_CKSEL_EXT_RES_8MHZ
+};
+
+/* 
+ * Calibration Register for Internal Oscillator
+ *
+ * OSCCAL      Min Freq         Max Freq
+ * 0x00        50%              100%
+ * 0x7F        75%              150%
+ * 0xFF        100%             200%
+ */
+typedef uint8_t Atm128_OSCCAL_t;  //!< Internal Oscillator Calibration Register
+
+/* 8-bit Clock Divider Register */
+typedef struct
+{
+  uint8_t xdiven : 1;  //!< Enable clock divider
+  uint8_t xdiv   : 7;  //!< fCLK = Source Clock / 129 - xdiv
+} Atm128ClockDivider_t;
+
+typedef Atm128ClockDivider_t Atm128_XTAL_t;  //!< Asynchronous Clock Divider
+
+
+#endif //_H_ATM128CLOCK_H
+
diff --git a/tos/chips/atm128/Atm128I2C.h b/tos/chips/atm128/Atm128I2C.h
new file mode 100644
index 00000000..76bbae25
--- /dev/null
+++ b/tos/chips/atm128/Atm128I2C.h
@@ -0,0 +1,83 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128I2C_h
+#define _H_Atm128I2C_h
+
+//====================== I2C Bus ==================================
+
+/* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */
+enum {
+  ATM128_I2C_RATE_DIVIDE_16 = 0,
+  ATM128_I2C_RATE_DIVIDE_24 = 1,
+  ATM128_I2C_RATE_DIVIDE_80 = 2,
+}
+
+  typedef uint8_t Atm128_TWBR_t;  //!< Two Wire Bit Rate Register
+
+/* I2C Control Register */
+typedef struct
+{
+  uint8_t twie  : 1;  //!< Two Wire Interrupt Enable
+  uint8_t rsvd  : 1;  //!< Reserved
+  uint8_t twen  : 1;  //!< Two Wire Enable Bit
+  uint8_t twwc  : 1;  //!< Two Wire Write Collision Flag
+  uint8_t twsto : 1;  //!< Two Wire Stop Condition Bit
+  uint8_t twsta : 1;  //!< Two Wire Start Condition Bit
+  uint8_t twea  : 1;  //!< Two Wire Enable Acknowledge Bit
+  uint8_t twint : 1;  //!< Two Wire Interrupt Flag
+} Atm128I2CControl_t;
+
+
+typedef Atm128I2CControl_t Atm128_TWCR_t;  //!< Two Wire Control Register
+
+/* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */
+enum {
+  ATM128_I2C_PRESCALE_1 = 0,
+  ATM128_I2C_PRESCALE_4 = 1,
+  ATM128_I2C_PRESCALE_16 = 2,
+  ATM128_I2C_PRESCALE_64 = 3,
+};
+
+enum {
+  ATM128_I2C_STATUS_START = 1,
+};
+
+/* I2C Status Register */
+typedef struct
+{
+  uint8_t twps  : 2;  //!< Two Wire Prescaler Bits
+  uint8_t rsvd  : 1;  //!< Reserved
+  uint8_t tws   : 5;  //!< Two Wire Status
+} Atm128I2CStatus_t;
+
+
+typedef Atm128I2CStatus_t Atm128_TWCR_t;  //!< Two Wire Status Register
+
+typedef uint8_t Atm128_TWDR_t;  //!< Two Wire Data Register
+typedef uint8_t Atm128_TWAR_t;  //!< Two Wire Slave Address Register
+
+#endif //_H_Atm128I2C_h
diff --git a/tos/chips/atm128/Atm128Power.h b/tos/chips/atm128/Atm128Power.h
new file mode 100644
index 00000000..0b395696
--- /dev/null
+++ b/tos/chips/atm128/Atm128Power.h
@@ -0,0 +1,54 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128Power_h
+#define _H_Atm128Power_h
+
+//================== ATmega128 Power Management ==========================
+
+/* Sleep modes */
+enum {
+  ATM128_SLEEP_IDLE = 0, 
+  ATM128_SLEEP_ADC,
+  ATM128_SLEEP_POWER_DOWN,
+  ATM128_SLEEP_POWER_SAVE,
+  ATM128_SLEEP_STANDBY = 3,             //!< enable standby bit (sm2)
+  ATM128_SLEEP_EXTENDED_STANDBY = 4,    //!< enable standby bit (sm2)
+};
+
+/* MCU Control Register */
+typedef struct
+{
+  uint8_t ivce  : 1;  //!< Interrupt Vector Change Enable
+  uint8_t ivsel : 1;  //!< Interrupt Vector Select 
+  uint8_t stdby : 1;  //!< Standby Enable (sm2) 
+  uint8_t sm    : 2;  //!< Sleep Mode
+  uint8_t se    : 1;  //!< Sleep Enable
+  uint8_t srw10 : 1;  //!< SRAM wait state enable
+  uint8_t srw   : 1;  //!< External SRAM enable
+} Atm128_MCUCR_t;
+
+#endif //_H_Atm128Power_h
diff --git a/tos/chips/atm128/Atm128Uart.h b/tos/chips/atm128/Atm128Uart.h
new file mode 100644
index 00000000..63d49cde
--- /dev/null
+++ b/tos/chips/atm128/Atm128Uart.h
@@ -0,0 +1,132 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128Uart_h
+#define _H_Atm128Uart_h
+
+//====================== UART Bus ==================================
+
+typedef uint8_t Atm128_UDR0_t;  //!< USART0 I/O Data Register
+typedef uint8_t Atm128_UDR1_t;  //!< USART1 I/O Data Register
+
+/* UART Status Register */
+typedef union {
+  struct Atm128_UCSRA_t {
+    uint8_t mpcm : 1;  //!< UART Multiprocessor Communication Mode
+    uint8_t u2x  : 1;  //!< UART Double Transmission Speed 
+    uint8_t upe  : 1;  //!< UART Parity Error
+    uint8_t dor  : 1;  //!< UART Data Overrun
+    uint8_t fe   : 1;  //!< UART Frame Error
+    uint8_t udre : 1;  //!< USART Data Register Empty
+    uint8_t txc  : 1;  //!< USART Transfer Complete
+    uint8_t rxc  : 1;  //!< USART Receive Complete
+  } bits;
+  uint8_t flat;
+} Atm128UartStatus_t;
+
+typedef Atm128UartStatus_t Atm128_UCSR0A_t;  //!< UART 0 Status Register
+typedef Atm128UartStatus_t Atm128_UCSR1A_t;  //!< UART 1 Status Register
+
+/* UART Control Register */
+typedef union {
+  struct Atm128_UCSRB_t {
+    uint8_t txb8  : 1;  //!< UART Transmit Data Bit 8
+    uint8_t rxb8  : 1;  //!< UART Receive Data Bit 8
+    uint8_t ucsz2 : 1;  //!< UART Character Size (Bit 2)
+    uint8_t txen  : 1;  //!< UART Transmitter Enable
+    uint8_t rxen  : 1;  //!< UART Receiver Enable
+    uint8_t udrie : 1;  //!< USART Data Register Enable
+    uint8_t txcie : 1;  //!< UART TX Complete Interrupt Enable
+    uint8_t rxcie : 1;  //!< UART RX Complete Interrupt Enable 
+  } bits;
+  uint8_t flat;
+} Atm128UartControl_t;
+
+typedef Atm128UartControl_t Atm128_UCSR0B_t;  //!< UART 0 Control Register
+typedef Atm128UartControl_t Atm128_UCSR1B_t;  //!< UART 1 Control Register
+
+enum {
+  ATM128_UART_DATA_SIZE_5_BITS = 0,
+  ATM128_UART_DATA_SIZE_6_BITS = 1,
+  ATM128_UART_DATA_SIZE_7_BITS = 2,
+  ATM128_UART_DATA_SIZE_8_BITS = 3,
+};
+
+/* UART Control Register */
+typedef union {
+  uint8_t flat;
+  struct Atm128_UCSRC_t {
+    uint8_t ucpol : 1;  //!< UART Clock Polarity
+    uint8_t ucsz  : 2;  //!< UART Character Size (Bits 0 and 1)
+    uint8_t usbs  : 1;  //!< UART Stop Bit Select
+    uint8_t upm   : 2;  //!< UART Parity Mode
+    uint8_t umsel : 1;  //!< USART Mode Select
+    uint8_t rsvd  : 1;  //!< Reserved
+  } bits;
+} Atm128UartMode_t;
+
+typedef Atm128UartMode_t Atm128_UCSR0C_t;  //!< UART 0 Mode Register
+typedef Atm128UartMode_t Atm128_UCSR1C_t;  //!< UART 1 Mode Register
+
+/*
+ * ATmega1128 UART baud register settings:
+ *      ATM128__BAUD_
+ */
+enum {
+  ATM128_19200_BAUD_4MHZ  = 12,
+  ATM128_38400_BAUD_4MHZ  = 6,
+  ATM128_57600_BAUD_4MHZ  = 3,
+
+  ATM128_19200_BAUD_4MHZ_2X  = 25,
+  ATM128_38400_BAUD_4MHZ_2X  = 12,
+  ATM128_57600_BAUD_4MHZ_2X  = 8,
+
+  ATM128_19200_BAUD_7MHZ  = 23,
+  ATM128_38400_BAUD_7MHZ  = 11,
+  ATM128_57600_BAUD_7MHZ  = 7,
+
+  ATM128_19200_BAUD_7MHZ_2X  = 47,
+  ATM128_38400_BAUD_7MHZ_2X  = 23,
+  ATM128_57600_BAUD_7MHZ_2X  = 15,
+
+  ATM128_19200_BAUD_8MHZ  = 25,
+  ATM128_38400_BAUD_8MHZ  = 12,
+  ATM128_57600_BAUD_8MHZ  = 8,
+
+  ATM128_19200_BAUD_8MHZ_2X  = 51,
+  ATM128_38400_BAUD_8MHZ_2X  = 34,
+  ATM128_57600_BAUD_8MHZ_2X  = 11,
+};
+
+typedef uint8_t Atm128_UBRR0L_t;  //!< UART 0 Baud Register (Low)
+typedef uint8_t Atm128_UBRR0H_t;  //!< UART 0 Baud Register (High)
+
+typedef uint8_t Atm128_UBRR1L_t;  //!< UART 1 Baud Register (Low)
+typedef uint8_t Atm128_UBRR1H_t;  //!< UART 1 Baud Register (High)
+
+
+#endif //_H_Atm128UART_h
+
diff --git a/tos/chips/atm128/HplAtm128UartC.nc b/tos/chips/atm128/HplAtm128UartC.nc
new file mode 100644
index 00000000..5859d958
--- /dev/null
+++ b/tos/chips/atm128/HplAtm128UartC.nc
@@ -0,0 +1,64 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/// 
+
+#include 
+
+/**
+ * HPL for the Atmega 128 serial ports.
+ *
+ * @author Martin Turon 
+ * @author David Gay
+ */
+configuration HplAtm128UartC
+{
+  provides {
+    interface Init as Uart0Init;
+    interface StdControl as Uart0TxControl;
+    interface StdControl as Uart0RxControl;
+    interface SerialByteComm as Uart0;
+    
+    interface Init as Uart1Init;
+    interface StdControl as Uart1TxControl;
+    interface StdControl as Uart1RxControl;
+    interface SerialByteComm as Uart1;
+  }
+}
+implementation
+{
+  components HplAtm128UartP, PlatformC;
+
+  Uart0Init = HplAtm128UartP.Uart0Init;
+  Uart0TxControl = HplAtm128UartP.Uart0TxControl;
+  Uart0RxControl = HplAtm128UartP.Uart0RxControl;
+  Uart0 = HplAtm128UartP.Uart0;
+    
+  Uart1Init = HplAtm128UartP.Uart1Init;
+  Uart1TxControl = HplAtm128UartP.Uart1TxControl;
+  Uart1RxControl = HplAtm128UartP.Uart1RxControl;
+  Uart1 = HplAtm128UartP.Uart1;
+
+  HplAtm128UartP.Atm128Calibrate -> PlatformC;
+}
diff --git a/tos/chips/atm128/HplAtm128UartP.nc b/tos/chips/atm128/HplAtm128UartP.nc
new file mode 100644
index 00000000..db7eedce
--- /dev/null
+++ b/tos/chips/atm128/HplAtm128UartP.nc
@@ -0,0 +1,217 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include 
+
+/** 
+ * Private component of the Atmega128 serial port HPL.
+ *
+ * @author Martin Turon 
+ * @author David Gay
+ */
+
+module HplAtm128UartP
+{
+  provides {
+    interface Init as Uart0Init;
+    interface StdControl as Uart0TxControl;
+    interface StdControl as Uart0RxControl;
+    interface SerialByteComm as Uart0;
+    
+    interface Init as Uart1Init;
+    interface StdControl as Uart1TxControl;
+    interface StdControl as Uart1RxControl;
+    interface SerialByteComm as Uart1;
+  }
+  uses interface Atm128Calibrate;
+}
+implementation
+{
+  //=== Uart Init Commands. ====================================
+  command error_t Uart0Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr0;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR0L = ubrr0;
+    UBRR0H = ubrr0 >> 8;
+    UCSR0A = stts.flat;
+    UCSR0C = mode.flat;
+    UCSR0B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.start() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR0B;
+    ctrl.bits.txcie = 1;
+    ctrl.bits.txen  = 1;
+    UCSR0B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.stop() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR0B;
+    ctrl.bits.txcie = 0;
+    ctrl.bits.txen  = 0;
+    UCSR0B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.start() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR0B;
+    ctrl.bits.rxcie = 1;
+    ctrl.bits.rxen  = 1;
+    UCSR0B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.stop() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR0B;
+    ctrl.bits.rxcie = 0;
+    ctrl.bits.rxen  = 0;
+    UCSR0B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  
+  command error_t Uart1Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr1;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR1L = ubrr1;
+    UBRR1H = ubrr1 >> 8;
+    UCSR1A = stts.flat;
+    UCSR1C = mode.flat;
+    UCSR1B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.start() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR1B;
+    ctrl.bits.txcie = 1;
+    ctrl.bits.txen  = 1;
+    UCSR1B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.stop() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR1B;
+    ctrl.bits.txcie = 0;
+    ctrl.bits.txen  = 0;
+    UCSR1B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.start() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR1B;
+    ctrl.bits.rxcie = 1;
+    ctrl.bits.rxen  = 1;
+    UCSR1B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.stop() {
+    Atm128UartControl_t ctrl;
+    ctrl.flat = UCSR1B;
+    ctrl.bits.rxcie = 0;
+    ctrl.bits.rxen  = 0;
+    UCSR1B = ctrl.flat;
+    return SUCCESS;
+  }
+
+  /*   //=== Uart Stop Commands. ==================================== */
+  /*   async command error_t Uart0.stop() { */
+  /*       UCSR0A = 0; */
+  /*       UCSR0B = 0; */
+  /*       UCSR0C = 0; */
+  /*       return SUCCESS; */
+  /*   } */
+  /*   async command error_t Uart1.stop() { */
+  /*       UCSR0A = 0; */
+  /*       UCSR0B = 0; */
+  /*       UCSR0C = 0; */
+  /*       return SUCCESS; */
+  /*   } */
+
+  //=== Uart Put Commands. ====================================
+  async command error_t Uart0.put(uint8_t data) {
+    atomic{
+      UDR0 = data; 
+      SET_BIT(UCSR0A, TXC);
+    }
+    return SUCCESS;
+  }
+  async command error_t Uart1.put(uint8_t data) {
+    atomic{
+      UDR1 = data; 
+      SET_BIT(UCSR1A, TXC);
+    }
+    return SUCCESS;
+  }
+  
+  //=== Uart Get Events. ======================================
+  default async event void Uart0.get(uint8_t data) { return; }
+  AVR_ATOMIC_HANDLER(SIG_UART0_RECV) {
+    if (READ_BIT(UCSR0A, RXC))
+      signal Uart0.get(UDR0);
+  }
+  default async event void Uart1.get(uint8_t data) { return; }
+  AVR_ATOMIC_HANDLER(SIG_UART1_RECV) {
+    if (READ_BIT(UCSR1A, RXC))
+      signal Uart1.get(UDR1);
+  }
+
+  //=== Uart Put Done Events. =================================
+  default async event void Uart0.putDone() { return; }
+  AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) {
+    signal Uart0.putDone();
+  }
+  default async event void Uart1.putDone() { return; }
+  AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) {
+    signal Uart1.putDone();
+  }
+
+}
diff --git a/tos/chips/atm128/McuSleepC.nc b/tos/chips/atm128/McuSleepC.nc
new file mode 100644
index 00000000..e85bbd5b
--- /dev/null
+++ b/tos/chips/atm128/McuSleepC.nc
@@ -0,0 +1,125 @@
+/// $Id$
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the Atmega128. Power state calculation code copied from Rob
+ * Szewczyk's 1.x code in HPLPowerManagementM.nc.
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @author Robert Szewczyk
+ * @date   October 26, 2005
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  /* There is no dirty bit management because the sleep mode depends on
+     the amount of time remaining in timer0. */
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm128hardware.h and page 42 of the ATmeg128
+   * manual (figure 17).*/
+  const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = {
+    0,
+    (1 << SM0),
+    (1 << SM2) | (1 << SM1) | (1 << SM0),
+    (1 << SM1) | (1 << SM0),
+    (1 << SM2) | (1 << SM1),
+    (1 << SM1)};
+    
+  mcu_power_t getPowerState() {
+    uint8_t diff;
+    // Note: we go to sleep even if timer 1, 2, or 3's overflow interrupt
+    // is enabled - this allows using these timers as TinyOS "Alarm"s
+    // while still having power management.
+
+    // Are external timers running?  
+    if (TIMSK & ~(1 << OCIE0 | 1 << TOIE0 | 1 << TOIE1 | 1 << TOIE2) ||
+	ETIMSK & ~(1 << TOIE3)) {
+      return ATM128_POWER_IDLE;
+    }
+    // SPI (Radio stack on mica/micaZ
+    else if (bit_is_set(SPCR, SPIE)) { 
+      return ATM128_POWER_IDLE;
+    }
+    // UARTs are active
+    else if (UCSR0B & (1 << TXCIE | 1 << RXCIE)) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    else if (UCSR1B & (1 << TXCIE | 1 << RXCIE)) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    // ADC is enabled
+    else if (bit_is_set(ADCSR, ADEN)) { 
+      return ATM128_POWER_ADC_NR;
+    }
+    // How soon for the timer to go off?
+    else if (TIMSK & (1 << OCIE0 | 1 << TOIE0)) {
+      // force waiting for timer0 update (overflow glitches otherwise)
+      TCCR0 = TCCR0;
+      while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
+	;
+      diff = OCR0 - TCNT0;
+      if (diff < 16 || TCNT0 > 240) 
+	return ATM128_POWER_EXT_STANDBY;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+  
+  async command void McuSleep.sleep() {
+    uint8_t powerState;
+
+    powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState());
+    MCUCR =
+      (MCUCR & 0xe3) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]);
+
+    sei();
+    asm volatile ("sleep");
+    cli();
+  }
+
+  async command void McuPowerState.update() {
+  }
+
+  default async command mcu_power_t McuPowerOverride.lowestState() {
+    return ATM128_POWER_DOWN;
+  }
+}
diff --git a/tos/chips/atm128/adc/Adc.h b/tos/chips/atm128/adc/Adc.h
new file mode 100644
index 00000000..d1330706
--- /dev/null
+++ b/tos/chips/atm128/adc/Adc.h
@@ -0,0 +1,23 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * @author David Gay
+ */
+#ifndef ADC_H
+#define ADC_H
+
+#include "Atm128Adc.h"
+
+/* Read and ReadNow share client ids */
+#define UQ_ADC_READ "adc.read"
+#define UQ_ADC_READNOW UQ_ADC_READ
+#define UQ_ADC_READSTREAM "adc.readstream"
+
+#endif
diff --git a/tos/chips/atm128/adc/AdcP.nc b/tos/chips/atm128/adc/AdcP.nc
new file mode 100644
index 00000000..afb58823
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcP.nc
@@ -0,0 +1,151 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert ATmega128 HAL A/D interface to the HIL interfaces.
+ * @author David Gay
+ * @author Jan Hauer 
+ */
+#include "Timer.h"
+
+module AdcP {
+  provides {
+    interface Read[uint8_t client];
+    interface ReadNow[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcSingle;
+    interface Atm128AdcConfig[uint8_t client];
+  }
+}
+implementation {
+  enum {
+    IDLE,
+    ACQUIRE_DATA,
+    ACQUIRE_DATA_NOW,
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t state;
+  norace uint8_t client;
+  norace uint16_t val;
+
+  uint8_t channel() {
+    return call Atm128AdcConfig.getChannel[client]();
+  }
+
+  uint8_t refVoltage() {
+    return call Atm128AdcConfig.getRefVoltage[client]();
+  }
+
+  uint8_t prescaler() {
+    return call Atm128AdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call Atm128AdcSingle.getData(channel(), refVoltage(), TRUE, prescaler());
+  }
+
+  error_t startGet(uint8_t newState, uint8_t newClient) {
+    /* Note: we retry imprecise results in dataReady */
+    state = newState;
+    client = newClient;
+    sample();
+
+    return SUCCESS;
+  }
+
+  command error_t Read.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA, c);
+  }
+
+  async command error_t ReadNow.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA_NOW, c);
+  }
+
+  task void acquiredData() {
+    state = IDLE;
+    signal Read.readDone[client](SUCCESS, val);
+  }
+
+  async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+    switch (state)
+      {
+      case ACQUIRE_DATA:
+	if (!precise)
+	  sample();
+	else
+	  {
+	    val = data;
+	    post acquiredData();
+	  }
+	break;
+
+      case ACQUIRE_DATA_NOW:
+	if (!precise)
+	  sample();
+	else
+	  {
+	    state = IDLE;
+	    signal ReadNow.readDone[client](SUCCESS, data);
+	  }
+	break;
+
+      default:
+	break;
+      }
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() {
+    return ATM128_ADC_SNGL_GND;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() {
+    return ATM128_ADC_PRESCALE_2;
+  }
+
+  default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { }
+  default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { }
+}
diff --git a/tos/chips/atm128/adc/AdcReadClientC.nc b/tos/chips/atm128/adc/AdcReadClientC.nc
new file mode 100644
index 00000000..03640cac
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadClientC.nc
@@ -0,0 +1,40 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a Read interface to the
+ * Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadClientC() {
+  provides interface Read;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READ),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  Read = WireAdcP.Read[ID];
+  Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID];
+  WireAdcP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcReadNowClientC.nc b/tos/chips/atm128/adc/AdcReadNowClientC.nc
new file mode 100644
index 00000000..6bae7d65
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadNowClientC.nc
@@ -0,0 +1,43 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, Resource-based access to the Atmega128 ADC via a
+ * ReadNow interface.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow;
+  }
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READNOW),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  ReadNow = WireAdcP.ReadNow[ID];
+  Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID];
+  Resource = Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcReadStreamClientC.nc b/tos/chips/atm128/adc/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..1462a21f
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadStreamClientC.nc
@@ -0,0 +1,40 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a ReadStream interface to
+ * the Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadStreamClientC() {
+  provides interface ReadStream;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcStreamP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READSTREAM),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[ID];
+  Atm128AdcConfig = WireAdcStreamP.Atm128AdcConfig[ID];
+  WireAdcStreamP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcStreamP.nc b/tos/chips/atm128/adc/AdcStreamP.nc
new file mode 100644
index 00000000..1db0bfe1
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcStreamP.nc
@@ -0,0 +1,254 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert ATmega128 HAL A/D interface to the HIL interfaces.
+ * @author David Gay
+ * @author Jan Hauer 
+ */
+#include "Timer.h"
+
+module AdcStreamP {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcSingle;
+    interface Atm128AdcConfig[uint8_t client];
+    interface Atm128Calibrate;
+    interface Alarm;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(UQ_ADC_READSTREAM)
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t client = NSTREAM;
+
+  /* Stream data */
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t *next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t **bufferQueueEnd[NSTREAM];
+  uint16_t *lastBuffer, lastCount;
+
+  norace uint16_t *buffer, *pos, count;
+  norace uint32_t now, period;
+
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+    
+    return SUCCESS;
+  }
+
+  uint8_t channel() {
+    return call Atm128AdcConfig.getChannel[client]();
+  }
+
+  uint8_t refVoltage() {
+    return call Atm128AdcConfig.getRefVoltage[client]();
+  }
+
+  uint8_t prescaler() {
+    return call Atm128AdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call Atm128AdcSingle.getData(channel(), refVoltage(), TRUE, prescaler());
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    atomic
+      {
+	struct list_entry_t *newEntry = (struct list_entry_t *)buf;
+
+	if (!bufferQueueEnd[c]) // Can't post right now.
+	  return FAIL;
+
+	newEntry->count = n;
+	newEntry->next = NULL;
+	*bufferQueueEnd[c] = newEntry;
+	bufferQueueEnd[c] = &newEntry->next;
+      }
+    return SUCCESS;
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    uint32_t actualPeriod = call Atm128Calibrate.actualMicro(period);
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    /* By now, the pending bufferDone has been signaled (see readStream). */
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next)
+      signal ReadStream.bufferDone[c](FAIL, (uint16_t *)entry, entry->count);
+
+    atomic
+      {
+	bufferQueue[c] = NULL;
+	bufferQueueEnd[c] = &bufferQueue[c];
+      }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+      {
+	b = lastBuffer;
+	c = lastCount;
+	lastBuffer = NULL;
+      }
+
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    sample();
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    /* The first reading may be imprecise. So we just do a dummy read
+       to get things rolling - this is indicated by setting count to 0 */
+    count = 0;
+    period = call Atm128Calibrate.calibrateMicro(usPeriod);
+    client = c;
+    sample();
+
+    return SUCCESS;
+  }
+
+  void nextBuffer() {
+    atomic
+      {
+	struct list_entry_t *entry = bufferQueue[client];
+
+	if (!entry)
+	  {
+	    // all done
+	    bufferQueueEnd[client] = NULL; // prevent post
+	    post readStreamDone();
+	  }
+	else
+	  {
+	    bufferQueue[client] = entry->next;
+	    if (!bufferQueue[client])
+	      bufferQueueEnd[client] = &bufferQueue[client];
+	    pos = buffer = (uint16_t *)entry;
+	    count = entry->count;
+	    nextAlarm();
+	  }
+      }
+  }
+
+  async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+    if (client == NSTREAM)
+      return;
+
+    if (count == 0)
+      {
+	now = call Alarm.getNow();
+	nextBuffer();
+      }
+    else
+      {
+	*pos++ = data;
+	if (!--count)
+	  {
+	    atomic
+	      {
+		if (lastBuffer)
+		  {
+		    /* We failed to signal bufferDone in time. Fail. */
+		    bufferQueueEnd[client] = NULL; // prevent post
+		    post readStreamFail();
+		    return;
+		  }
+		else
+		  {
+		    lastBuffer = buffer;
+		    lastCount = pos - buffer;
+		  }
+	      }
+	    post bufferDone();
+	    nextBuffer();
+	  }
+	else
+	  nextAlarm();
+      }       
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() {
+    return ATM128_ADC_SNGL_GND;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() {
+    return ATM128_ADC_PRESCALE_2;
+  }
+}
diff --git a/tos/chips/atm128/adc/Atm128Adc.h b/tos/chips/atm128/adc/Atm128Adc.h
new file mode 100644
index 00000000..0cff50d1
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128Adc.h
@@ -0,0 +1,158 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+// @author Hu Siquan 
+
+#ifndef _H_Atm128ADC_h
+#define _H_Atm128ADC_h
+
+//================== 8 channel 10-bit ADC ==============================
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF   and VR- = GND
+    ATM128_ADC_VREF_AVCC = 1,//!< VR+ = AVcc   and VR- = GND
+    ATM128_ADC_VREF_RSVD,
+    ATM128_ADC_VREF_2_56 = 3,//!< VR+ = 2.56V  and VR- = GND
+};
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_RIGHT_ADJUST = 0, 
+    ATM128_ADC_LEFT_ADJUST = 1,
+};
+
+
+/* ADC Multiplexer Settings */
+enum {
+    ATM128_ADC_SNGL_ADC0 = 0,
+    ATM128_ADC_SNGL_ADC1,
+    ATM128_ADC_SNGL_ADC2,
+    ATM128_ADC_SNGL_ADC3,
+    ATM128_ADC_SNGL_ADC4,
+    ATM128_ADC_SNGL_ADC5,
+    ATM128_ADC_SNGL_ADC6,
+    ATM128_ADC_SNGL_ADC7,
+    ATM128_ADC_DIFF_ADC00_10x,
+    ATM128_ADC_DIFF_ADC10_10x,
+    ATM128_ADC_DIFF_ADC00_200x,
+    ATM128_ADC_DIFF_ADC10_200x,
+    ATM128_ADC_DIFF_ADC22_10x,
+    ATM128_ADC_DIFF_ADC32_10x,
+    ATM128_ADC_DIFF_ADC22_200x,
+    ATM128_ADC_DIFF_ADC32_200x,
+    ATM128_ADC_DIFF_ADC01_1x,
+    ATM128_ADC_DIFF_ADC11_1x,
+    ATM128_ADC_DIFF_ADC21_1x,
+    ATM128_ADC_DIFF_ADC31_1x,
+    ATM128_ADC_DIFF_ADC41_1x,
+    ATM128_ADC_DIFF_ADC51_1x,
+    ATM128_ADC_DIFF_ADC61_1x,
+    ATM128_ADC_DIFF_ADC71_1x,
+    ATM128_ADC_DIFF_ADC02_1x,
+    ATM128_ADC_DIFF_ADC12_1x,
+    ATM128_ADC_DIFF_ADC22_1x,
+    ATM128_ADC_DIFF_ADC32_1x,
+    ATM128_ADC_DIFF_ADC42_1x,
+    ATM128_ADC_DIFF_ADC52_1x,
+    ATM128_ADC_SNGL_1_23,
+    ATM128_ADC_SNGL_GND,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t mux   : 5;  //!< Analog Channel and Gain Selection Bits
+    uint8_t adlar : 1;  //!< ADC Left Adjust Result
+    uint8_t refs  : 2;  //!< Reference Selection Bits
+} Atm128Admux_t;
+
+/* ADC Prescaler Settings */
+/* Note: each platform must define ATM128_ADC_PRESCALE to the smallest
+   prescaler which guarantees full A/D precision. */
+enum {
+    ATM128_ADC_PRESCALE_2 = 0,
+    ATM128_ADC_PRESCALE_2b,
+    ATM128_ADC_PRESCALE_4,
+    ATM128_ADC_PRESCALE_8,
+    ATM128_ADC_PRESCALE_16,
+    ATM128_ADC_PRESCALE_32,
+    ATM128_ADC_PRESCALE_64,
+    ATM128_ADC_PRESCALE_128,
+
+    // This special value is used to ask the platform for the prescaler
+    // which gives full precision.
+    ATM128_ADC_PRESCALE
+};
+
+/* ADC Enable Settings */
+enum {
+    ATM128_ADC_ENABLE_OFF = 0,
+    ATM128_ADC_ENABLE_ON,
+};
+
+/* ADC Start Conversion Settings */
+enum {
+    ATM128_ADC_START_CONVERSION_OFF = 0,
+    ATM128_ADC_START_CONVERSION_ON,
+};
+
+/* ADC Free Running Select Settings */
+enum {
+    ATM128_ADC_FREE_RUNNING_OFF = 0,
+    ATM128_ADC_FREE_RUNNING_ON,
+};
+
+/* ADC Interrupt Flag Settings */
+enum {
+    ATM128_ADC_INT_FLAG_OFF = 0,
+    ATM128_ADC_INT_FLAG_ON,
+};
+
+/* ADC Interrupt Enable Settings */
+enum {
+    ATM128_ADC_INT_ENABLE_OFF = 0,
+    ATM128_ADC_INT_ENABLE_ON,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t adps  : 3;  //!< ADC Prescaler Select Bits
+    uint8_t adie  : 1;  //!< ADC Interrupt Enable
+    uint8_t adif  : 1;  //!< ADC Interrupt Flag
+    uint8_t adfr  : 1;  //!< ADC Free Running Select
+    uint8_t adsc  : 1;  //!< ADC Start Conversion
+    uint8_t aden  : 1;  //!< ADC Enable
+} Atm128Adcsra_t;
+
+typedef uint8_t Atm128_ADCH_t;         //!< ADC data register high
+typedef uint8_t Atm128_ADCL_t;         //!< ADC data register low
+
+// The resource identifier string for the ADC subsystem
+#define UQ_ATM128ADC_RESOURCE "atm128adc.resource"
+
+#endif //_H_Atm128ADC_h
+
diff --git a/tos/chips/atm128/adc/Atm128AdcC.nc b/tos/chips/atm128/adc/Atm128AdcC.nc
new file mode 100644
index 00000000..585375de
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcC.nc
@@ -0,0 +1,71 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HAL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+configuration Atm128AdcC
+{
+  provides {
+    interface Resource[uint8_t client];
+    interface Atm128AdcSingle;
+    interface Atm128AdcMultiple;
+  }
+  uses interface ResourceConfigure[uint8_t client];
+}
+implementation
+{
+  components Atm128AdcP, HplAtm128AdcC, PlatformC, MainC,
+    new RoundRobinArbiterC(UQ_ATM128ADC_RESOURCE) as AdcArbiter,
+    new StdControlPowerManagerC() as PM;
+
+  Resource = AdcArbiter;
+  ResourceConfigure = AdcArbiter;
+  Atm128AdcSingle = Atm128AdcP;
+  Atm128AdcMultiple = Atm128AdcP;
+
+  PlatformC.SubInit -> Atm128AdcP;
+
+  Atm128AdcP.HplAtm128Adc -> HplAtm128AdcC;
+  Atm128AdcP.Atm128Calibrate -> PlatformC;
+
+  PM.Init <- MainC;
+  PM.StdControl -> Atm128AdcP;
+  PM.ArbiterInit -> AdcArbiter;
+  PM.ResourceController -> AdcArbiter;
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcConfig.nc b/tos/chips/atm128/adc/Atm128AdcConfig.nc
new file mode 100644
index 00000000..0099c34f
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcConfig.nc
@@ -0,0 +1,40 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * Clients of the higher-level A/D system must implement this interface to
+ * specify which channel to sample, and with what parameters.
+ *
+ * @author David Gay
+ */
+interface Atm128AdcConfig {
+  /**
+   * Obtain channel.
+   * @return The A/D channel to use. Must be one of the ATM128_ADC_SNGL_xxx
+   *   or ATM128_ADC_DIFF_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getChannel();
+
+  /**
+   * Obtain reference voltage
+   * @return The reference voltage to use. Must be one of the 
+   *   ATM128_ADC_VREF_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getRefVoltage();
+
+  /**
+   * Obtain prescaler value.
+   * @return The prescaler value to use. Must be one of the 
+   *   ATM128_ADC_PRESCALE_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getPrescaler();
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcMultiple.nc b/tos/chips/atm128/adc/Atm128AdcMultiple.nc
new file mode 100644
index 00000000..8549eccb
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcMultiple.nc
@@ -0,0 +1,120 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of Atmega128 for acquiring data
+ * from multiple channels using the ATmega128's free-running mode.
+ * 
    
+ * Because of the possibility that samples may be imprecise after 
+ * switching channels and/or reference voltages, and because there
+ * is a one sample delay on swithcing channels and reference voltages,
+ * Atm128ADCMultiple is complex. Two straightforward uses are:
+ * 
      
+ * 
    1. Acquire N samples from channel C:
+ *    
        
+ *    
      1. call getData to start sampling on channel C at the desired rate
+ *       (note that the choice of prescalers is very limited, so you
+ *       don't have many choices for sampling rate)
+ *    
      2. ignore the first dataReady event
+ *    
      3. use the results of the next N dataReady() events, return FALSE
+ *       on the last one
+ *    
      
+ * 
    2. Acquire one sample each from channels C1, ..., Cn (this pseudocode
+ *    assumes that none of these channels are differential)
+ *    
        
+ *    
      1. call getData to start sampling on channel C1
+ *    
      2. on the ith dataReady event switch to channel Ci+1 by changing
+ *       *newChannel
+ *    
      3. the data passed to the ith dataReady event is for channel Ci-1
+ *       (the data from the first dataReady event is ignored)
+ *    
      
+ * 
    
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */        
+
+#include "Atm128Adc.h"
+
+interface Atm128AdcMultiple
+{
+  /**
+   * Initiates free-running ADC conversions, with the ability to switch 
+   * channels and reference-voltage with a one sample delay.
+   *
+   * @param channel Initial A/D conversion channel. The channel can 
+   *   be changed in the dataReady event, though these changes happen
+   *   with a one-sample delay (this is a hardware restriction).
+   * @param refVoltage Initial A/D reference voltage. See the
+   *   ATM128_ADC_VREF_xxx constants in Atm128ADC.h. Like the channel,
+   *   the reference voltage can be changed in the dataReady event with
+   *   a one-sample delay.
+   * @param leftJustify TRUE to place A/D result in high-order bits 
+   *   (i.e., shifted left by 6 bits), low to place it in the low-order bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the ATmega128 manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in reference voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t refVoltage,
+			     bool leftJustify, uint8_t prescaler);
+  
+  /**
+   * Returns the next sample in a free-running conversion. Allow the user
+   * to switch channels and/or reference voltages with a one sample delay.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if this conversion was precise, FALSE if it wasn't 
+   *   (we assume that the second conversion after a change of reference
+   *   voltage or after switching to a differential channel is precise)
+   * @param channel Channel this sample was from.
+   * @param newChannel Change this parameter to switch to a new channel
+   *   for the second next sample.
+   * @param newRefVoltage Change this parameter to change the reference 
+   *   voltage for the second next sample.
+   *
+   * @return TRUE to continue sampling, FALSE to stop.
+   */	
+  async event bool dataReady(uint16_t data, bool precise, uint8_t channel,
+			     uint8_t *newChannel, uint8_t *newRefVoltage);
+
+
+  /* Note: there is no cancel in free-running mode because you cannot tell
+     from a successful (or unsuccessful) cancellation whether there will
+     be another dataReady event. Thus you cannot tell when you can safely
+     reuse the ADC (short of waiting one ADC conversion period, in which
+     case you might as well use the result of dataReady to cancel).
+  */
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcP.nc b/tos/chips/atm128/adc/Atm128AdcP.nc
new file mode 100644
index 00000000..2510301a
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcP.nc
@@ -0,0 +1,246 @@
+/* $Id$
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * Internal component of the Atmega128 A/D HAL.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Phil Buonadonna
+ * @author Hu Siquan 
+ */
+
+module Atm128AdcP 
+{
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Atm128AdcSingle;
+    interface Atm128AdcMultiple;
+  }
+  uses {
+    interface HplAtm128Adc;
+    interface Atm128Calibrate;
+  }
+}
+implementation
+{  
+  /* State for the current and next (multiple-sampling only) conversion */
+  struct {
+    bool multiple : 1;		/* single and multiple-sampling mode */
+    bool precise : 1;		/* is this result going to be precise? */
+    uint8_t channel : 5;	/* what channel did this sample come from? */
+  } f, nextF;
+  
+  command error_t Init.init() {
+    atomic
+      {
+	Atm128Adcsra_t adcsr;
+
+	adcsr.aden = ATM128_ADC_ENABLE_OFF;
+	adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF;  
+	adcsr.adfr = ATM128_ADC_FREE_RUNNING_OFF; 
+	adcsr.adif = ATM128_ADC_INT_FLAG_OFF;               
+	adcsr.adie = ATM128_ADC_INT_ENABLE_OFF;       
+	adcsr.adps = ATM128_ADC_PRESCALE_2;
+	call HplAtm128Adc.setAdcsra(adcsr);
+      }
+    return SUCCESS;
+  }
+
+  /* We enable the A/D when start is called, and disable it when stop is
+     called. This drops A/D conversion latency by a factor of two (but
+     increases idle mode power consumption a little). 
+  */
+  command error_t StdControl.start() {
+    atomic call HplAtm128Adc.enableAdc();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic call HplAtm128Adc.disableAdc();
+
+    return SUCCESS;
+  }
+
+  /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage'
+     will give a precise result (the first sample after changing reference
+     voltage or switching to/between a differential channel is imprecise)
+  */
+  inline bool isPrecise(Atm128Admux_t admux, uint8_t channel, uint8_t refVoltage) {
+    return refVoltage == admux.refs &&
+      (channel <= ATM128_ADC_SNGL_ADC7 || channel >= ATM128_ADC_SNGL_1_23 || channel == admux.mux);
+  }
+
+  async event void HplAtm128Adc.dataReady(uint16_t data) {
+    bool precise, multiple;
+    uint8_t channel;
+
+    atomic 
+      {
+	channel = f.channel;
+	precise = f.precise;
+	multiple = f.multiple;
+      }
+
+    if (!multiple)
+      {
+	/* A single sample. Disable the ADC interrupt to avoid starting
+	   a new sample at the next "sleep" instruction. */
+	call HplAtm128Adc.disableInterruption();
+	signal Atm128AdcSingle.dataReady(data, precise);
+      }
+    else
+      {
+	/* Multiple sampling. The user can:
+	   - tell us to stop sampling
+	   - or, to continue sampling on a new channel, possibly with a
+	     new reference voltage; however this change applies not to
+	     the next sample (the hardware has already started working on
+	     that), but on the one after.
+	*/
+	bool cont;
+	uint8_t nextChannel, nextVoltage;
+	Atm128Admux_t admux;
+
+	atomic 
+	  {
+	    admux = call HplAtm128Adc.getAdmux();
+	    nextVoltage = admux.refs;
+	    nextChannel = admux.mux;
+	  }
+
+	cont = signal Atm128AdcMultiple.dataReady(data, precise, channel,
+						  &nextChannel, &nextVoltage);
+	atomic
+	  if (cont)
+	    {
+	      /* Switch channels and update our internal channel+precision
+		 tracking state (f and nextF). Note that this tracking will
+		 be incorrect if we take too long to get to this point. */
+	      admux.refs = nextVoltage;
+	      admux.mux = nextChannel;
+	      call HplAtm128Adc.setAdmux(admux);
+
+	      f = nextF;
+	      nextF.channel = nextChannel;
+	      nextF.precise = isPrecise(admux, nextChannel, nextVoltage);
+	    }
+	  else
+	    call HplAtm128Adc.cancel();
+      }
+  }
+
+  /* Start sampling based on request parameters */
+  void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) {
+    Atm128Admux_t admux;
+    Atm128Adcsra_t adcsr;
+
+    admux = call HplAtm128Adc.getAdmux();
+    f.precise = isPrecise(admux, channel, refVoltage);
+    f.channel = channel;
+
+    admux.refs = refVoltage;
+    admux.adlar = leftJustify;
+    admux.mux = channel;
+    call HplAtm128Adc.setAdmux(admux);
+
+    adcsr.aden = ATM128_ADC_ENABLE_ON;
+    adcsr.adsc = ATM128_ADC_START_CONVERSION_ON;
+    adcsr.adfr = f.multiple;
+    adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag
+    adcsr.adie = ATM128_ADC_INT_ENABLE_ON;
+    if (prescaler == ATM128_ADC_PRESCALE)
+      prescaler = call Atm128Calibrate.adcPrescaler();
+    adcsr.adps = prescaler;
+    call HplAtm128Adc.setAdcsra(adcsr);
+  }
+
+  async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage,
+					     bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = FALSE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+
+	return f.precise;
+      }
+  }
+
+  async command bool Atm128AdcSingle.cancel() {
+    /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that
+       interface */
+    return call HplAtm128Adc.cancel();
+  }
+
+  async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage,
+					       bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = TRUE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+	nextF = f;
+	/* We assume the 2nd sample is precise */
+	nextF.precise = TRUE;
+
+	return f.precise;
+      }
+  }
+
+  default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+  }
+
+  default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel,
+						       uint8_t *newChannel, uint8_t *newRefVoltage) {
+    return FALSE; // stop conversion if we somehow end up here.
+  }
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcSingle.nc b/tos/chips/atm128/adc/Atm128AdcSingle.nc
new file mode 100644
index 00000000..5fb89447
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcSingle.nc
@@ -0,0 +1,83 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of Atmega128 for acquiring
+ * a single sample from a channel.
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+#include "Atm128Adc.h"
+
+interface Atm128AdcSingle
+{
+  /**
+   * Initiates an ADC conversion on a given channel.
+   *
+   * @param channel A/D conversion channel.
+   * @param refVoltage Select reference voltage for A/D conversion. See
+   *   the ATM128_ADC_VREF_xxx constants in Atm128ADC.h
+   * @param leftJustify TRUE to place A/D result in high-order bits 
+   *   (i.e., shifted left by 6 bits), low to place it in the low-order bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the ATmega128 manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in refernce voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t refVoltage,
+			     bool leftJustify, uint8_t prescaler);
+  
+  /**
+   * Indicates a sample has been recorded by the ADC as the result
+   * of a getData() command.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if the conversion precise, FALSE if it wasn't. This
+   *   values matches the result from the getData call.
+   */	
+  async event void dataReady(uint16_t data, bool precise);
+
+  /**
+   * Cancel an outstanding getData operation. Use with care, to
+   * avoid problems with races between the dataReady event and cancel.
+   * @return TRUE if a conversion was in-progress or an interrupt
+   *   was pending. dataReady will not be signaled. FALSE if the
+   *   conversion was already complete. dataReady will be (or has
+   *   already been) signaled.
+   */
+  async command bool cancel();
+}
diff --git a/tos/chips/atm128/adc/HplAtm128Adc.nc b/tos/chips/atm128/adc/HplAtm128Adc.nc
new file mode 100644
index 00000000..e8be3ce9
--- /dev/null
+++ b/tos/chips/atm128/adc/HplAtm128Adc.nc
@@ -0,0 +1,148 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL interface to the Atmega128 A/D conversion subsystem. Please see the
+ * Atmega128 manual for full details on the functioning of this subsystem.
+ * 
    
+ * A word of warning: the Atmega128 SLEEP instruction initiates an A/D
+ * conversion when the ADC and ADC interrupt are enabled.
+ *
+ * @author Martin Turon 
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+interface HplAtm128Adc {
+  /**
+   * Read the ADMUX (ADC selection) register
+   * @return Current ADMUX value
+   */
+  async command Atm128Admux_t getAdmux();
+  /**
+   * Set the ADMUX (ADC selection) register
+   * @param admux New ADMUX value
+   */
+  async command void setAdmux(Atm128Admux_t admux);
+
+  /**
+   * Read the ADCSRA (ADC control) register
+   * @return Current ADCSRA value
+   */
+  async command Atm128Adcsra_t getAdcsra();
+  /**
+   * Set the ADCSRA (ADC control) register
+   * @param adcsra New ADCSRA value
+   */
+  async command void setAdcsra(Atm128Adcsra_t adcsra);
+
+  /**
+   * Read the latest A/D conversion result
+   * @return A/D value
+   */
+  async command uint16_t getValue();
+
+  /// A/D control utilities. All of these clear any pending A/D interrupt.
+
+  /**
+   * Enable ADC sampling
+   */
+  async command void enableAdc();
+  /**
+   * Disable ADC sampling
+   */
+  async command void disableAdc();
+
+  /**
+   * Enable ADC interrupt
+   */
+  async command void enableInterruption();
+  /**
+   * Disable ADC interrupt
+   */
+  async command void disableInterruption();
+  /**
+   * Clear the ADC interrupt flag
+   */
+  async command void resetInterrupt();
+
+  /**
+   * Start ADC conversion. If ADC interrupts are enabled, the dataReady event
+   * will be signaled once (in non-continuous mode) or repeatedly (in
+   * continuous mode).
+   */
+  async command void startConversion();
+  /**
+   * Enable continuous sampling
+   */
+  async command void setContinuous();
+  /**
+   * Disable continuous sampling
+   */
+  async command void setSingle();
+
+  /* A/D status checks */
+
+  /**
+   * Is ADC enabled?
+   * @return TRUE if the ADC is enabled, FALSE otherwise
+   */
+  async command bool isEnabled();
+  /**
+   * Is A/D conversion in progress?
+   * @return TRUE if the A/D conversion is in progress, FALSE otherwise
+   */
+  async command bool isStarted();
+  /**
+   * Is A/D conversion complete? Note that this flag is automatically
+   * cleared when an A/D interrupt occurs.
+   * @return TRUE if the A/D conversion is complete, FALSE otherwise
+   */
+  async command bool isComplete();
+
+  /**
+   * Set ADC prescaler selection bits
+   * @param scale New ADC prescaler. Must be one of the ATM128_ADC_PRESCALE_xxx
+   *   values from Atm128Adc.h
+   */
+  async command void setPrescaler(uint8_t scale);
+
+  /**
+   * Cancel A/D conversion and any pending A/D interrupt. Also disables the
+   * ADC interruption (otherwise a sample might start at the next sleep
+   * instruction). This command can assume that the A/D converter is enabled. 
+   * @return TRUE if an A/D conversion was in progress or an A/D interrupt
+   *   was pending, FALSE otherwise. In single conversion mode, a return
+   *   of TRUE implies that the dataReady event will not be signaled.
+   */
+  async command bool cancel();
+
+  /**
+   * A/D interrupt occured
+   * @param data Latest A/D conversion result
+   */
+  async event void dataReady(uint16_t data);     
+}
diff --git a/tos/chips/atm128/adc/HplAtm128AdcC.nc b/tos/chips/atm128/adc/HplAtm128AdcC.nc
new file mode 100644
index 00000000..08a3e916
--- /dev/null
+++ b/tos/chips/atm128/adc/HplAtm128AdcC.nc
@@ -0,0 +1,127 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Martin Turon 
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+module HplAtm128AdcC {
+  provides interface HplAtm128Adc;
+}
+implementation {
+  //=== Direct read of HW registers. =================================
+  async command Atm128Admux_t HplAtm128Adc.getAdmux() { 
+    return *(Atm128Admux_t*)&ADMUX; 
+  }
+  async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { 
+    return *(Atm128Adcsra_t*)&ADCSRA; 
+  }
+  async command uint16_t HplAtm128Adc.getValue() { 
+    return ADC; 
+  }
+
+  DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t);
+  DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { 
+    ADMUX = Admux2int(x); 
+  }
+  async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { 
+    ADCSRA = Adcsra2int(x); 
+  }
+
+  async command void HplAtm128Adc.setPrescaler(uint8_t scale){
+    Atm128Adcsra_t  current_val = call HplAtm128Adc.getAdcsra(); 
+    current_val.adif = FALSE;
+    current_val.adps = scale;
+    call HplAtm128Adc.setAdcsra(current_val);
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  // It's not clear these are that useful...
+  async command void HplAtm128Adc.enableAdc() { SET_BIT(ADCSRA, ADEN); }
+  async command void HplAtm128Adc.disableAdc() { CLR_BIT(ADCSRA, ADEN); }
+  async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.setContinuous() { SET_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); }
+  async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); }
+
+
+  /* A/D status checks */
+  async command bool HplAtm128Adc.isEnabled()     {       
+    return (call HplAtm128Adc.getAdcsra()).aden; 
+  }
+
+  async command bool HplAtm128Adc.isStarted()     {
+    return (call HplAtm128Adc.getAdcsra()).adsc; 
+  }
+  
+  async command bool HplAtm128Adc.isComplete()    {
+    return (call HplAtm128Adc.getAdcsra()).adif; 
+  }
+
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  AVR_ATOMIC_HANDLER(SIG_ADC) {
+    uint16_t data = call HplAtm128Adc.getValue();
+    
+    __nesc_enable_interrupt();
+    signal HplAtm128Adc.dataReady(data);
+  }
+
+  default async event void HplAtm128Adc.dataReady(uint16_t done) { }
+
+  async command bool HplAtm128Adc.cancel() { 
+    /* This is tricky */
+    atomic
+      {
+	Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr;
+
+	/* To cancel a conversion, first turn off ADEN, then turn off
+	   ADSC. We also cancel any pending interrupt.
+	   Finally we reenable the ADC.
+	*/
+	newSr = oldSr;
+	newSr.aden = FALSE;
+	newSr.adif = TRUE; /* This clears a pending interrupt... */
+	newSr.adie = FALSE; /* We don't want to start sampling again at the
+			       next sleep */
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.adsc = FALSE;
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.aden = TRUE;
+	call HplAtm128Adc.setAdcsra(newSr);
+
+	return oldSr.adif || oldSr.adsc;
+      }
+  }
+}
diff --git a/tos/chips/atm128/adc/WireAdcP.nc b/tos/chips/atm128/adc/WireAdcP.nc
new file mode 100644
index 00000000..540124ee
--- /dev/null
+++ b/tos/chips/atm128/adc/WireAdcP.nc
@@ -0,0 +1,37 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadClientC and AdcReadNowClientC.
+ *
+ * @author David Gay
+ */
+
+configuration WireAdcP {
+  provides {
+    interface Read[uint8_t client]; 
+    interface ReadNow[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components Atm128AdcC, AdcP,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ReadNow = AdcP;
+  Resource = ArbitrateRead.Resource;
+  Atm128AdcConfig = AdcP;
+
+  ArbitrateRead.Service -> AdcP.Read;
+  AdcP.Atm128AdcSingle -> Atm128AdcC;
+}
diff --git a/tos/chips/atm128/adc/WireAdcStreamP.nc b/tos/chips/atm128/adc/WireAdcStreamP.nc
new file mode 100644
index 00000000..d65bcbff
--- /dev/null
+++ b/tos/chips/atm128/adc/WireAdcStreamP.nc
@@ -0,0 +1,40 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadStreamClientC.
+ *
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream[uint8_t client];
+  uses {
+    interface Atm128AdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components Atm128AdcC, AdcStreamP, PlatformC, MainC,
+    new AlarmMicro32C(), 
+    new ArbitratedReadStreamC(uniqueCount(UQ_ADC_READSTREAM), uint16_t) as ArbitrateReadStream;
+
+  Resource = ArbitrateReadStream;
+  ReadStream = ArbitrateReadStream;
+  Atm128AdcConfig = AdcStreamP;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+  AdcStreamP.Init <- MainC;
+  AdcStreamP.Atm128AdcSingle -> Atm128AdcC;
+  AdcStreamP.Atm128Calibrate -> PlatformC;
+  AdcStreamP.Alarm -> AlarmMicro32C;
+}
diff --git a/tos/chips/atm128/atm128const.h b/tos/chips/atm128/atm128const.h
new file mode 100644
index 00000000..5dba6f8a
--- /dev/null
+++ b/tos/chips/atm128/atm128const.h
@@ -0,0 +1,41 @@
+// $Id$
+
+/* 
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * const_[u]int[8/16/32]_t types are used to declare single and array
+ * constants that should live in ROM/FLASH. These constants must be read
+ * via the corresponding read_[u]int[8/16/32]_t functions.
+ * 
+ * This file defines the ATmega128 version of these types and functions.
+ * @author David Gay
+ */
+
+#ifndef ATMEGA128CONST_H
+#define ATMEGA128CONST_H
+
+typedef uint8_t const_uint8_t PROGMEM;
+typedef uint16_t const_uint16_t PROGMEM;
+typedef uint32_t const_uint32_t PROGMEM;
+typedef int8_t const_int8_t PROGMEM;
+typedef int16_t const_int16_t PROGMEM;
+typedef int32_t const_int32_t PROGMEM;
+
+#define read_uint8_t(x) pgm_read_byte(x)
+#define read_uint16_t(x) pgm_read_word(x)
+#define read_uint32_t(x) pgm_read_dword(x)
+
+#define read_int8_t(x) ((int8_t)pgm_read_byte(x))
+#define read_int16_t(x) ((int16_t)pgm_read_word(x))
+#define read_int32_t(x) ((int32_t)pgm_read_dword(x))
+
+
+#endif
diff --git a/tos/chips/atm128/atm128hardware.h b/tos/chips/atm128/atm128hardware.h
new file mode 100644
index 00000000..7ef731ca
--- /dev/null
+++ b/tos/chips/atm128/atm128hardware.h
@@ -0,0 +1,132 @@
+//  $Id$
+
+/*                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Martin Turon 
+ */
+
+#ifndef _H_atmega128hardware_H
+#define _H_atmega128hardware_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "atm128const.h"
+
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((signal)) @atomic_hwevent() @C()
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((interrupt)) @hwevent() @C()
+
+/* Macro to create union casting functions. */
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x) { \
+  union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// Bit operators using bit number
+#define SET_BIT(port, bit)    ((port) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((port) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((port) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((port) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+   if (value) SET_BIT((port), (bit)); \
+   else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((port) |= (flag))
+#define CLR_FLAG(port, flag)  ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+/* Enables interrupts. */
+inline void __nesc_enable_interrupt() {
+    sei();
+}
+/* Disables all interrupts. */
+inline void __nesc_disable_interrupt() {
+    cli();
+}
+
+/* Defines data type for storing interrupt mask state during atomic. */
+typedef uint8_t __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t original_SREG);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions wheb binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+
+/* Saves current interrupt mask state and disables interrupts. */
+inline __nesc_atomic_t 
+__nesc_atomic_start(void) @spontaneous()
+{
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void 
+__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous()
+{
+  SREG = original_SREG;
+}
+#endif
+
+/* Defines the mcu_power_t type for atm128 power management. */
+typedef uint8_t mcu_power_t @combine("mcombine");
+
+
+enum {
+  ATM128_POWER_IDLE        = 0,
+  ATM128_POWER_ADC_NR      = 1,
+  ATM128_POWER_EXT_STANDBY = 2,
+  ATM128_POWER_SAVE        = 3,
+  ATM128_POWER_STANDBY     = 4,
+  ATM128_POWER_DOWN        = 5, 
+};
+
+/* Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2)? m1: m2;
+}
+
+#endif //_H_atmega128hardware_H
diff --git a/tos/chips/atm128/crc.h b/tos/chips/atm128/crc.h
new file mode 100644
index 00000000..4f93f460
--- /dev/null
+++ b/tos/chips/atm128/crc.h
@@ -0,0 +1,108 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef CRC_H
+#define CRC_H
+
+/* We don't want to duplicate this fairly large function inside binary
+   components. */
+#ifdef NESC_BUILD_BINARY
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte);
+#else
+uint16_t crcTable[256] PROGMEM = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+/*
+ * Optimised Atmega128 ITU-T CRC function.
+ *
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ */
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte) __attribute__((noinline))
+{
+#if 1
+  uint16_t *table = crcTable;
+  uint16_t newCrc;
+
+  asm ("eor %1,%B3\n"
+       "\tlsl %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tadd %A2, %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tlpm\n"
+       "\tmov %B0, %A3\n"
+       "\tmov %A0, r0\n"
+       "\tadiw r30,1\n"
+       "\tlpm\n"
+       "\teor %B0, r0"
+       : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc));
+  return newCrc;
+#else
+  uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte];
+
+  return PRG_RDB(magic) | ((uint8_t)oldCrc ^ PRG_RDB(magic + 1)) << 8;
+#endif
+}
+#endif
+
+#endif
diff --git a/tos/chips/atm128/i2c/Atm128I2C.h b/tos/chips/atm128/i2c/Atm128I2C.h
new file mode 100644
index 00000000..75fd6643
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2C.h
@@ -0,0 +1,50 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128I2C_h
+#define _H_Atm128I2C_h
+
+#define ATM128_I2C_SLA_WRITE 0x00
+#define ATM128_I2C_SLA_READ 0x01
+
+#define UQ_ATM128_I2CMASTER "Atm128I2CMasterC.I2CPacket"
+
+enum {
+    ATM128_I2C_BUSERROR         = 0x00,
+    ATM128_I2C_START            = 0x08,
+    ATM128_I2C_RSTART           = 0x10,
+    ATM128_I2C_MW_SLA_ACK       = 0x18,
+    ATM128_I2C_MW_SLA_NACK      = 0x20,
+    ATM128_I2C_MW_DATA_ACK      = 0x28,
+    ATM128_I2C_MW_DATA_NACK     = 0x30,
+    ATM128_I2C_M_ARB_LOST       = 0x38,
+    ATM128_I2C_MR_SLA_ACK       = 0x40,
+    ATM128_I2C_MR_SLA_NACK      = 0x48,
+    ATM128_I2C_MR_DATA_ACK      = 0x50,
+    ATM128_I2C_MR_DATA_NACK     = 0x58
+};
+
+#endif // _H_Atm128I2C_h
diff --git a/tos/chips/atm128/i2c/Atm128I2C.nc b/tos/chips/atm128/i2c/Atm128I2C.nc
new file mode 100644
index 00000000..20ac4382
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2C.nc
@@ -0,0 +1,47 @@
+/// $Id$
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * An interface for stopping the I2C bus. Needed by the resource
+ * reservation system, so that when a client releases you're sure
+ * there's a stop.
+ *
+ * @author Philip Levis
+ *
+ * @version  $Id$
+ */
+interface Atm128I2C {
+
+  async command void stop();
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMaster.nc b/tos/chips/atm128/i2c/Atm128I2CMaster.nc
new file mode 100644
index 00000000..6a47439b
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMaster.nc
@@ -0,0 +1,54 @@
+/// $Id$
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * Interface for non-blocking I2C master engine.
+ *
+ * @author Martin Turon 
+ */
+interface Atm128I2CMaster
+{
+    /** Ping the I2C device. */
+    command error_t ping  ();
+
+    /** Write the given data buffer the I2C device. */
+    command error_t write (uint8_t *data, uint8_t length);
+
+    /** Read from the I2C device. */
+    command error_t read  (uint8_t *data, uint8_t length);
+
+    /** Signal that the ping to the I2C device is done. */
+    event void pingDone  (error_t result);
+
+    /** Signal that the read from the I2C device is done. */
+    event void readDone  ();
+
+    /** Signal that the write to the I2C device is done. */
+    event void writeDone ();
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterC.nc b/tos/chips/atm128/i2c/Atm128I2CMasterC.nc
new file mode 100644
index 00000000..191a73ad
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD 
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The basic client abstraction of the I2C on the Atmega128. I2C
+ * device drivers should instantiate one of these to ensure
+ * exclusive access to the I2C bus.
+ *
+ * @author Philip Levis
+ * @date   May 28, 2006
+ */
+
+#include "Atm128I2C.h"
+
+generic configuration Atm128I2CMasterC() {
+  provides interface Resource;
+  provides interface I2CPacket;
+}
+implementation {
+  enum {
+    CLIENT_ID = unique(UQ_ATM128_I2CMASTER),
+  };
+  
+  components Atm128I2CMasterP as I2C; 
+  Resource = I2C.Resource[CLIENT_ID];
+  I2CPacket = I2C.I2CPacket[CLIENT_ID]; 
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc
new file mode 100644
index 00000000..f516ae43
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The configuration that takes the underlying I2C driver on the 
+ * Atmega128 and turns it into a shared abstraction.
+ *
+ * @date May 28 2006
+ * @author Philip Levis
+ */
+
+generic module Atm128I2CMasterImplP() {
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket[uint8_t client];
+  uses interface Resource as SubResource[uint8_t];
+  uses interface I2CPacket as SubPacket;
+  uses interface Atm128I2C;
+}
+implementation {
+
+  enum {
+    NO_CLIENT = 0xff
+  };
+  
+  uint8_t currentClient = NO_CLIENT;
+
+  async command error_t Resource.request[uint8_t id]() {
+    return call SubResource.request[id]();
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    error_t rval = call SubResource.request[id]();
+    if (rval == SUCCESS) {
+      atomic currentClient = id;
+    }
+    return rval;
+  }
+
+  event void SubResource.granted[uint8_t id]() {
+    atomic currentClient = id;
+    signal Resource.granted[id]();
+  }
+
+  async command void Resource.release[uint8_t id]() {
+    call Atm128I2C.stop(); // Always stop if someone has released.
+    call SubResource.release[id]();
+  }
+
+  async command bool Resource.isOwner[uint8_t id]() {
+    return call SubResource.isOwner[id]();
+  }
+  
+  async command error_t I2CPacket.write[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (currentClient != id) {
+	return FAIL;
+      }
+    }
+    return call SubPacket.write(flags, addr, len, data);
+  }
+  
+  async command error_t I2CPacket.read[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (currentClient != id) {
+	return FAIL;
+      }
+    }
+    return call SubPacket.read(flags, addr, len, data);
+  }
+
+  async event void SubPacket.readDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) {
+    signal I2CPacket.readDone[currentClient](error, addr, len, data);
+  }
+  async event void SubPacket.writeDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) {
+    signal I2CPacket.writeDone[currentClient](error, addr, len, data);
+  }
+  
+  default event void Resource.granted[uint8_t id]() {}
+ default async event void I2CPacket.writeDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {}
+ default async event void I2CPacket.readDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {}
+}
+
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterP.nc
new file mode 100644
index 00000000..346f62c5
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterP.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The configuration that takes the underlying I2C driver on the 
+ * Atmega128 and turns it into a shared abstraction.
+ *
+ * @date May 28 2006
+ * @author Philip Levis
+ */
+
+#include "Atm128I2C.h"
+
+
+
+configuration Atm128I2CMasterP {
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket[uint8_t client];
+}
+implementation {
+  enum {
+    ATM128_I2C_CLIENT_COUNT = uniqueCount(UQ_ATM128_I2CMASTER),
+  };
+  
+  components new FcfsArbiterC(UQ_ATM128_I2CMASTER) as Arbiter;
+  components new AsyncPowerManagerP() as Power;
+  components new Atm128I2CMasterImplP() as I2C;
+  components new Atm128I2CMasterPacketP() as Master;
+  components HplAtm128I2CBusC;
+  components LedsC, NoLedsC, MainC;
+    
+  Resource  = I2C;
+  I2CPacket = I2C;
+  MainC.SoftwareInit -> Power;
+  
+  I2C.SubResource -> Arbiter;
+  I2C.SubPacket   -> Master;
+  I2C.Atm128I2C -> Master;
+  
+  Power.AsyncStdControl -> Master;
+  Power.ResourceController -> Arbiter;
+  Power.ArbiterInit -> Arbiter;
+
+  Master.I2C -> HplAtm128I2CBusC;
+  Master.ReadDebugLeds -> NoLedsC;
+  Master.WriteDebugLeds -> NoLedsC;
+  
+}
+
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc
new file mode 100644
index 00000000..347853c6
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc
@@ -0,0 +1,344 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements an interupt driven I2C Master controller 
+ * Hardware Abstraction Layer (HAL) to the ATmega128 
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Philip Levis
+ *
+ * @version $Id$
+ */
+
+generic module Atm128I2CMasterPacketP() {
+  provides interface AsyncStdControl;
+  provides interface I2CPacket;
+  provides interface Atm128I2C;
+  
+  uses interface HplAtm128I2CBus as I2C;
+  uses interface Leds as ReadDebugLeds;
+  uses interface Leds as WriteDebugLeds;
+}
+implementation {
+
+  enum {
+    I2C_OFF          = 0,
+    I2C_IDLE         = 1,
+    I2C_BUSY         = 2,      
+    I2C_ADDR         = 3,
+    I2C_DATA         = 4,
+    I2C_STARTING     = 5,
+    I2C_STOPPING     = 6,
+  } atm128_i2c_state_t;
+
+  uint8_t state = I2C_OFF;
+  i2c_flags_t packetFlags; 
+  uint8_t* packetPtr;
+  uint8_t packetLen;
+  uint8_t index;
+  uint16_t packetAddr;
+  bool reading = FALSE;
+
+  void i2c_abort(error_t err) {
+    atomic {
+      // Cycle the I2C
+      call I2C.readCurrent();
+      call I2C.enableInterrupt(FALSE);
+      call I2C.enable(FALSE);
+      call I2C.sendCommand();
+      call I2C.readCurrent();
+      call I2C.enable(TRUE);
+      call I2C.sendCommand();
+      state = I2C_IDLE;
+      if (reading) {
+	signal I2CPacket.readDone(err, packetAddr, packetLen, packetPtr);
+      }
+      else {
+	signal I2CPacket.writeDone(err, packetAddr, packetLen, packetPtr);
+      }
+    }
+  }
+  
+  async command error_t AsyncStdControl.start() {
+    atomic {
+      if (state == I2C_OFF) {
+	call I2C.init(FALSE);
+	call I2C.readCurrent();
+	call I2C.enable(TRUE);
+	call I2C.enableInterrupt(FALSE);
+	call I2C.sendCommand();
+	state = I2C_IDLE;
+	return SUCCESS;
+      }
+      else {
+	return FAIL;
+      }
+    }
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic {
+      if (state == I2C_IDLE) {
+	call I2C.readCurrent();
+	call I2C.enable(FALSE);
+	call I2C.enableInterrupt(FALSE);
+	call I2C.setInterruptPending(FALSE);
+	call I2C.off();
+	state = I2C_OFF;
+	return SUCCESS;
+      }
+      else {
+	return FAIL;
+      }
+    }
+  }
+
+  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (state == I2C_IDLE) {
+	state = I2C_BUSY;
+      }
+      else if (state == I2C_OFF) {
+	return EOFF;
+      }
+      else {
+	return EBUSY;
+      }
+    }
+    /* This follows the procedure described on page 209 of the atmega128L
+     * data sheet. It is synchronous (does not handle interrupts).*/
+    atomic {
+      packetAddr = addr;
+      packetPtr = data;
+      packetLen = len;
+      packetFlags = flags;
+      index = 0;
+      reading = TRUE;
+    }
+    /* Clear interrupt pending, send the I2C start command and abort
+       if we're not in the start state.*/
+    call I2C.readCurrent();
+    atomic {
+      call I2C.enableInterrupt(TRUE);
+      call I2C.setInterruptPending(TRUE);
+      call I2C.enableAck(FALSE);
+      
+      if (flags & I2C_START) {
+        call I2C.setStart(TRUE);
+        state = I2C_STARTING;
+      }
+      else if (len > 1 || (len > 0 && flags & I2C_ACK_END)) {
+        call I2C.enableAck(TRUE);
+        state = I2C_DATA;
+      }
+      else if (len == 1) { // length is 1
+        state = I2C_DATA;
+      }
+      else if (flags & I2C_STOP) {
+        state = I2C_STOPPING;
+        call I2C.enableAck(FALSE);
+        call I2C.setStop(TRUE);
+      }
+      call I2C.sendCommand();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (state == I2C_IDLE) {
+	state = I2C_BUSY;
+      }
+      else if (state == I2C_OFF) {
+	return EOFF;
+      }
+      else {
+	return EBUSY;
+      }
+    }
+    /* This follows the procedure described on page 209 of the atmega128L
+     * data sheet. It is synchronous (does not handle interrupts).*/
+    atomic {
+      packetAddr = addr;
+      packetPtr = data;
+      packetLen = len;
+      packetFlags = flags;
+      index = 0;
+      reading = FALSE;
+    }
+    call I2C.readCurrent();
+    atomic {
+      call I2C.setInterruptPending(TRUE);
+      call I2C.enableAck(TRUE);
+      call I2C.enableInterrupt(TRUE);
+      
+      if (flags & I2C_START) {
+        call I2C.setStart(TRUE);
+	//	call WriteDebugLeds.led0On();
+        state = I2C_STARTING;
+      }
+      else if (len > 0) {
+        state = I2C_DATA;
+	call I2C.write(data[index]);
+      }
+      else if (flags & I2C_STOP) {
+        state = I2C_STOPPING;
+        call I2C.enableAck(FALSE);
+        call I2C.setStop(TRUE);
+      }
+      else { // A 0-length packet with no start and no stop....
+	state = I2C_IDLE;
+	return FAIL;
+      }
+      call I2C.sendCommand();
+    }
+    return SUCCESS;
+  }
+  
+  /**
+   * A command has been sent over the I2C.
+   * The diversity of I2C options and modes means that there are a
+   * plethora of cases to consider. To simplify reading the code,
+   * they're described here and the corresponding statements
+   * are only labelled with identifying comments.
+   *
+   * When reading:
+   *  R1) A start condition has been requested. This requires 
+   *      sending the start signal. When the interrupt comes in,
+   *      send the first byte of the packet. This driver
+   *      detects this condition by the START flag being set. 
+   *      A successful send of the start clears the local copy of
+   *      the flag. The driver does not distinguish between start
+   *      and repeated start.
+   *  R2) Sending the address byte with the read bit set.
+   *  R3) Sending the first byte of a two-byte address with the
+   *      read bit set. 
+   *  R4) Sending the second byte of a two-byte address.
+   *  R5) Reading any byte except the last byte of a packet.
+   *  R6) Reading the last byte of the packet, with ACK_END requested.
+   *  R7) Reading the last byte of the packet, with ACK_END cleared.
+   *  R8) Sending a stop condition.
+   */
+  async event void I2C.commandComplete() {
+    call I2C.readCurrent();
+    atomic {
+      if (state == I2C_DATA) {
+	if (reading == TRUE) {
+	  if (index < packetLen) {
+	    packetPtr[index] = call I2C.read();
+	    if (index == packetLen - 1 &&
+                !(packetFlags & I2C_ACK_END)) { 
+              call I2C.enableAck(FALSE);
+            }
+          }
+	  else {
+	    call I2C.enableInterrupt(FALSE);
+	    if (packetFlags & I2C_STOP) {
+	      packetFlags &= ~I2C_STOP;
+	      call I2C.setStop(TRUE);
+	      call I2C.status();
+	    }
+	    else {
+	      call I2C.setInterruptPending(FALSE);
+	    }
+	    call I2C.sendCommand();
+	    state = I2C_IDLE;
+	    signal I2CPacket.readDone(SUCCESS, packetAddr, packetLen, packetPtr);
+	    return;
+	  }
+	  index++;
+	  call I2C.sendCommand();
+	  return;
+        }
+        else { // Writing
+	  if (index < packetLen) {
+	    call I2C.write(packetPtr[index]);
+	    index++;
+	    call I2C.sendCommand();
+	  }
+	  else {
+	    call I2C.enableInterrupt(FALSE);
+	    if (packetFlags & I2C_STOP) {
+	      packetFlags &= ~I2C_STOP;
+	      call I2C.setStop(TRUE);
+	      call WriteDebugLeds.led1On();
+	    }
+	    else {
+	      call I2C.setInterruptPending(FALSE);
+	    }
+	    call I2C.sendCommand();
+	    state = I2C_IDLE;
+	    call WriteDebugLeds.led2On();
+	    signal I2CPacket.writeDone(SUCCESS, packetAddr, packetLen, packetPtr);
+	    return;
+	  }
+	}
+      }
+      else if (state == I2C_STARTING) {
+	packetFlags &= ~I2C_START;
+	call I2C.setStart(FALSE);
+	if (call I2C.status() != ATM128_I2C_START &&
+	    call I2C.status() != ATM128_I2C_RSTART) {
+	  if (reading) {
+	    //call ReadDebugLeds.set(call I2C.status() >> 4);
+	  }
+	  //call ReadDebugLeds.led2On();
+	  i2c_abort(FAIL);
+	  return;
+	}
+	state = I2C_ADDR;
+	call I2C.enableAck(TRUE);
+      }
+      if (state == I2C_ADDR) {
+	if (reading == TRUE) {
+	  call I2C.write((packetAddr & 0xff) | ATM128_I2C_SLA_READ);
+	}
+	else
+	  call I2C.write((packetAddr & 0xff) | ATM128_I2C_SLA_WRITE);
+	state = I2C_DATA;
+	call I2C.sendCommand();
+      }
+    }
+  }
+
+  async command void Atm128I2C.stop() {
+    atomic {
+      call I2C.readCurrent();
+      call I2C.enableInterrupt(FALSE);
+      call I2C.setStop(TRUE);
+      call I2C.setInterruptPending(TRUE);
+      call I2C.sendCommand();
+    }
+  }
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBus.nc b/tos/chips/atm128/i2c/HplAtm128I2CBus.nc
new file mode 100644
index 00000000..5269a483
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBus.nc
@@ -0,0 +1,86 @@
+/// $Id$
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon 
+ * @author Philip Levis
+ *
+ * @version  $Id$
+ */
+interface HplAtm128I2CBus {
+
+  async command void init(bool hasExternalPulldown);
+  async command void off();
+  
+  async command uint8_t status();
+
+  async command void readCurrent();
+  async command void sendCommand();
+  async event void commandComplete();
+
+  
+  // Transaction interface
+  async command void setStart(bool on);
+  async command bool hasStart();
+  async command void setStop(bool on);   
+  async command bool hasStop();
+  async command void enableAck(bool enable);
+  async command bool hasAcks();
+  
+  async command void enableInterrupt(bool enable);
+  async command bool isInterruptEnabled();
+
+  // Examines actual register. Included so that code which needs
+  // to spin in TWINT does not have to read out cached copies.
+  async command bool isRealInterruptPending();
+
+  // Operates on cached copy (from readCurrent)
+  async command bool isInterruptPending(); 
+  
+  // NOTE: writing a 1 in the interrupt pending bit (TWINT) of the
+  // atm128 I2C control register (TWCR) will *clear* the bit if it
+  // is set. This is how you tell the I2C to take the next action,
+  // as when the bit is cleared it starts the next operation.
+  async command void setInterruptPending(bool on);
+
+  async command void enable(bool on);
+  async command bool isEnabled();
+  async command bool hasWriteCollided();
+  
+  // Data interface to TWDR
+  async command void write(uint8_t data);
+  async command uint8_t read();
+  
+  
+
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc b/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc
new file mode 100644
index 00000000..57ddd820
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc
@@ -0,0 +1,49 @@
+/// $Id$
+
+/*
+ *  Copyright (c) 2004-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon 
+ * @author Philip Levis
+ *
+ * @version    $Id$
+ */
+
+configuration HplAtm128I2CBusC {
+  provides interface HplAtm128I2CBus as I2C;
+}
+implementation {
+
+  components HplAtm128GeneralIOC as IO, HplAtm128I2CBusP as Bus;
+  
+  I2C         = Bus.I2C;
+  Bus.I2CClk  -> IO.PortD0;
+  Bus.I2CData -> IO.PortD1;
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc b/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc
new file mode 100644
index 00000000..9a5688ea
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc
@@ -0,0 +1,185 @@
+/// $Id$
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define F_CPU       7372800
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon 
+ * @author Philip Levis
+ *
+ * @version $Id$
+ */
+module HplAtm128I2CBusP {
+  provides interface HplAtm128I2CBus as I2C;
+
+  uses {
+    interface GeneralIO as I2CClk;
+    interface GeneralIO as I2CData;
+  }
+}
+implementation {
+  uint8_t current;
+  
+  async command void I2C.init(bool hasExternalPulldown) {
+    // Set the internal pullup resisters
+    if (hasExternalPulldown) {
+      //call I2CClk.makeOutput();
+      //call I2CData.makeOutput();
+      call I2CClk.set();
+      call I2CData.set();
+    }
+    call I2CClk.makeInput();
+    call I2CData.makeInput();
+    TWSR = 0;                             // set prescaler == 0
+    TWBR = (F_CPU / 50000UL - 16) / 2;   // set I2C baud rate
+    //TWBR = 50;
+    TWAR = 0;
+    TWCR = 0;
+  }
+
+  async command void I2C.off() {
+    call I2CClk.clr();
+    call I2CData.clr();
+  }
+  
+  async command uint8_t I2C.status() {
+    return TWSR & 0xf8;
+  }
+
+  async command void I2C.sendCommand() {
+    atomic TWCR = current;
+  }
+
+  async command void I2C.readCurrent() {
+    atomic current = TWCR;
+  }
+  
+  /** Send START symbol and begin I2C bus transaction. */
+  async command void I2C.setStart(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTA);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTA);
+    }
+  }
+  async command bool I2C.hasStart() {
+    return READ_BIT(current, TWSTA);
+  }
+
+  async command void I2C.setStop(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTO);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTO);
+    }
+  }
+  async command bool I2C.hasStop() {
+    return READ_BIT(current, TWSTO);
+  }
+  
+  /** Write a byte to an I2C slave device. */
+  async command void I2C.write(uint8_t data) {
+    TWDR = data;
+  }
+
+  async command uint8_t I2C.read() {
+    return TWDR;
+  }
+
+  async command void I2C.enableAck(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEA);
+    }
+    else {
+      atomic CLR_BIT(current, TWEA);
+    }
+  }
+  
+  async command bool I2C.hasAcks() {
+    return READ_BIT(current, TWEA);
+  }
+  
+  async command void I2C.enableInterrupt(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWIE);
+    }
+    else {
+      atomic CLR_BIT(current, TWIE);
+    }
+  }
+
+  async command bool I2C.isInterruptEnabled() {
+    return READ_BIT(current, TWIE);
+  }
+  
+  async command bool I2C.isRealInterruptPending() {
+    return READ_BIT(TWCR, TWINT);
+  }
+
+  async command bool I2C.isInterruptPending() {
+    return READ_BIT(current, TWINT);
+  }
+
+  async command void I2C.setInterruptPending(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWINT);
+    }
+    else {
+      atomic CLR_BIT(current, TWINT);
+    }
+  }
+  
+  async command void I2C.enable(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEN);
+    }
+    else {
+      atomic CLR_BIT(current, TWEN);
+    }
+  }
+
+  async command bool I2C.isEnabled() {
+    return READ_BIT(current, TWEN);
+  }
+
+  async command bool I2C.hasWriteCollided() {
+    return READ_BIT(current, TWWC);
+  }
+
+  default async event void I2C.commandComplete() { }
+  AVR_ATOMIC_HANDLER(SIG_2WIRE_SERIAL) {
+    signal I2C.commandComplete();
+  }
+}
diff --git a/tos/chips/atm128/pins/Atm128GpioInterruptC.nc b/tos/chips/atm128/pins/Atm128GpioInterruptC.nc
new file mode 100644
index 00000000..cd168e6d
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128GpioInterruptC.nc
@@ -0,0 +1,42 @@
+/// $Id$
+
+/**
+ * @author Phil Levis
+ */
+generic module Atm128GpioInterruptC() {
+
+  provides interface GpioInterrupt as Interrupt;
+  uses interface HplAtm128Interrupt as Atm128Interrupt;
+
+}
+
+implementation {
+
+  error_t enable( bool rising ) {
+    atomic {
+      call Atm128Interrupt.disable();
+      call Atm128Interrupt.clear();
+      call Atm128Interrupt.edge( rising );
+      call Atm128Interrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Interrupt.enableRisingEdge() {
+    return enable( TRUE );
+  }
+
+  async command error_t Interrupt.enableFallingEdge() {
+    return enable( FALSE );
+  }
+
+  async command error_t Interrupt.disable() {
+    call Atm128Interrupt.disable();
+    return SUCCESS;
+  }
+
+  async event void Atm128Interrupt.fired() {
+    signal Interrupt.fired();
+  }
+
+}
diff --git a/tos/chips/atm128/pins/Atm128Interrupt.h b/tos/chips/atm128/pins/Atm128Interrupt.h
new file mode 100644
index 00000000..5e3298c2
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128Interrupt.h
@@ -0,0 +1,56 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128Interrupt_h
+#define _H_Atm128Interrupt_h
+
+//====================== External Interrupts ===============================
+
+/* Sleep modes */
+enum {
+  ATM128_IRQ_ON_LOW    = 0, 
+  ATM128_IRQ_ON_CHANGE = 1, 
+  ATM128_IRQ_ON_FALL   = 2, 
+  ATM128_IRQ_ON_RISE   = 3, 
+};
+
+/* Interrupt Control Register */
+typedef struct
+{
+  uint8_t isc0  : 2;  //!< Interrupt Sense Control
+  uint8_t isc1  : 2;  //!< Interrupt Sense Control
+  uint8_t isc2  : 2;  //!< Interrupt Sense Control
+  uint8_t isc3  : 2;  //!< Interrupt Sense Control
+} Atm128_InterruptCtrl_t;
+
+typedef Atm128_InterruptCtrl_t Atm128_EICRA_t;   //!< Ext Interrupt Control A
+typedef Atm128_InterruptCtrl_t Atm128_EICRB_t;   //!< Ext Interrupt Control B
+
+typedef uint8_t Atm128_EIMSK_t;         //!< External Interrupt Mask Register
+typedef uint8_t Atm128_EIFR_t;          //!< External Interrupt Flag Register
+
+#endif //_H_Atm128Interrupt_h
+
diff --git a/tos/chips/atm128/pins/Atm128InterruptC.nc b/tos/chips/atm128/pins/Atm128InterruptC.nc
new file mode 100644
index 00000000..8584a6d9
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128InterruptC.nc
@@ -0,0 +1,66 @@
+/// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+
+generic module Atm128InterruptC() {
+  provides interface Interrupt;
+  uses interface HplAtm128Interrupt;
+}
+implementation {
+  /**
+   * enable an edge interrupt on the Interrupt pin
+   */
+  async command error_t Interrupt.startWait(bool low_to_high) {
+    atomic {
+      call HplAtm128Interrupt.disable();
+      call HplAtm128Interrupt.clear();
+      call HplAtm128Interrupt.edge(low_to_high);
+      call HplAtm128Interrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * disables Interrupt interrupts
+   */
+  async command error_t Interrupt.disable() {
+    atomic {
+      call HplAtm128Interrupt.disable();
+      call HplAtm128Interrupt.clear();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * Event fired by lower level interrupt dispatch for Interrupt
+   */
+  async event void HplAtm128Interrupt.fired() {
+    call HplAtm128Interrupt.clear();
+    signal Interrupt.fired();
+  }
+
+  default async event void Interrupt.fired() { }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc
new file mode 100644
index 00000000..39965e8c
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc
@@ -0,0 +1,187 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include 
+
+/**
+ * Provide GeneralIO interfaces for all of the ATmega128's pins.
+ *
+ * @author Martin Turon 
+ */
+
+configuration HplAtm128GeneralIOC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as PortA0;
+    interface GeneralIO as PortA1;
+    interface GeneralIO as PortA2;
+    interface GeneralIO as PortA3;
+    interface GeneralIO as PortA4;
+    interface GeneralIO as PortA5;
+    interface GeneralIO as PortA6;
+    interface GeneralIO as PortA7;
+
+    interface GeneralIO as PortB0;
+    interface GeneralIO as PortB1;
+    interface GeneralIO as PortB2;
+    interface GeneralIO as PortB3;
+    interface GeneralIO as PortB4;
+    interface GeneralIO as PortB5;
+    interface GeneralIO as PortB6;
+    interface GeneralIO as PortB7;
+
+    interface GeneralIO as PortC0;
+    interface GeneralIO as PortC1;
+    interface GeneralIO as PortC2;
+    interface GeneralIO as PortC3;
+    interface GeneralIO as PortC4;
+    interface GeneralIO as PortC5;
+    interface GeneralIO as PortC6;
+    interface GeneralIO as PortC7;
+
+    interface GeneralIO as PortD0;
+    interface GeneralIO as PortD1;
+    interface GeneralIO as PortD2;
+    interface GeneralIO as PortD3;
+    interface GeneralIO as PortD4;
+    interface GeneralIO as PortD5;
+    interface GeneralIO as PortD6;
+    interface GeneralIO as PortD7;
+
+    interface GeneralIO as PortE0;
+    interface GeneralIO as PortE1;
+    interface GeneralIO as PortE2;
+    interface GeneralIO as PortE3;
+    interface GeneralIO as PortE4;
+    interface GeneralIO as PortE5;
+    interface GeneralIO as PortE6;
+    interface GeneralIO as PortE7;
+
+    interface GeneralIO as PortF0;
+    interface GeneralIO as PortF1;
+    interface GeneralIO as PortF2;
+    interface GeneralIO as PortF3;
+    interface GeneralIO as PortF4;
+    interface GeneralIO as PortF5;
+    interface GeneralIO as PortF6;
+    interface GeneralIO as PortF7;
+
+    interface GeneralIO as PortG0;
+    interface GeneralIO as PortG1;
+    interface GeneralIO as PortG2;
+    interface GeneralIO as PortG3;
+    interface GeneralIO as PortG4;
+  }
+}
+
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPortP((uint8_t)&PORTA, (uint8_t)&DDRA, (uint8_t)&PINA) as PortA,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTB, (uint8_t)&DDRB, (uint8_t)&PINB) as PortB,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTC, (uint8_t)&DDRC, (uint8_t)&PINC) as PortC,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTD, (uint8_t)&DDRD, (uint8_t)&PIND) as PortD,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTE, (uint8_t)&DDRE, (uint8_t)&PINE) as PortE,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF) as PortF,
+
+  // PortF cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 0) as F0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 1) as F1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 2) as F2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 3) as F3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 4) as F4,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 5) as F5,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 6) as F6,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 7) as F7,
+
+
+  // PortG only exposes 5 bits and cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 0) as G0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 1) as G1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 2) as G2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 3) as G3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 4) as G4
+    ;
+
+  PortA0 = PortA.Pin0;
+  PortA1 = PortA.Pin1;
+  PortA2 = PortA.Pin2;
+  PortA3 = PortA.Pin3;
+  PortA4 = PortA.Pin4;
+  PortA5 = PortA.Pin5;
+  PortA6 = PortA.Pin6;
+  PortA7 = PortA.Pin7;
+
+  PortB0 = PortB.Pin0;
+  PortB1 = PortB.Pin1;
+  PortB2 = PortB.Pin2;
+  PortB3 = PortB.Pin3;
+  PortB4 = PortB.Pin4;
+  PortB5 = PortB.Pin5;
+  PortB6 = PortB.Pin6;
+  PortB7 = PortB.Pin7;
+
+  PortC0 = PortC.Pin0;
+  PortC1 = PortC.Pin1;
+  PortC2 = PortC.Pin2;
+  PortC3 = PortC.Pin3;
+  PortC4 = PortC.Pin4;
+  PortC5 = PortC.Pin5;
+  PortC6 = PortC.Pin6;
+  PortC7 = PortC.Pin7;
+
+  PortD0 = PortD.Pin0;
+  PortD1 = PortD.Pin1;
+  PortD2 = PortD.Pin2;
+  PortD3 = PortD.Pin3;
+  PortD4 = PortD.Pin4;
+  PortD5 = PortD.Pin5;
+  PortD6 = PortD.Pin6;
+  PortD7 = PortD.Pin7;
+
+  PortE0 = PortE.Pin0;
+  PortE1 = PortE.Pin1;
+  PortE2 = PortE.Pin2;
+  PortE3 = PortE.Pin3;
+  PortE4 = PortE.Pin4;
+  PortE5 = PortE.Pin5;
+  PortE6 = PortE.Pin6;
+  PortE7 = PortE.Pin7;
+
+  PortF0 = PortF.Pin0;
+  PortF1 = PortF.Pin1;
+  PortF2 = PortF.Pin2;
+  PortF3 = PortF.Pin3;
+  PortF4 = PortF.Pin4;
+  PortF5 = PortF.Pin5;
+  PortF6 = PortF.Pin6;
+  PortF7 = PortF.Pin7;
+
+  PortG0 = G0;
+  PortG1 = G1;
+  PortG2 = G2;
+  PortG3 = G3;
+  PortG4 = G4;
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
new file mode 100644
index 00000000..81cb5cf5
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
@@ -0,0 +1,53 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Generic pin access for pins mapped into I/O space (for which the sbi, cbi
+ * instructions give atomic updates). This can be used for ports A-E.
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+generic module HplAtm128GeneralIOPinP (uint8_t port_addr, 
+				 uint8_t ddr_addr, 
+				 uint8_t pin_addr,
+				 uint8_t bit)
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin (*(volatile uint8_t *)pin_addr)
+#define port (*(volatile uint8_t *)port_addr)
+#define ddr (*(volatile uint8_t *)ddr_addr)
+
+  inline async command bool IO.get()        { return READ_BIT (pin, bit); }
+  inline async command void IO.set()        { SET_BIT  (port, bit); }
+  inline async command void IO.clr()        { CLR_BIT  (port, bit); }
+  async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { CLR_BIT  (ddr, bit);  }
+  inline async command void IO.makeOutput() { SET_BIT  (ddr, bit);  }
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc
new file mode 100644
index 00000000..21c941f9
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc
@@ -0,0 +1,65 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Generic component to expose a full 8-bit port of GPIO pins.
+ *
+ * @author Martin Turon 
+ */
+
+generic configuration HplAtm128GeneralIOPortP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr)
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as Pin0;
+    interface GeneralIO as Pin1;
+    interface GeneralIO as Pin2;
+    interface GeneralIO as Pin3;
+    interface GeneralIO as Pin4;
+    interface GeneralIO as Pin5;
+    interface GeneralIO as Pin6;
+    interface GeneralIO as Pin7;
+  }
+}
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 0) as Bit0,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 1) as Bit1,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 2) as Bit2,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 3) as Bit3,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 4) as Bit4,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 5) as Bit5,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 6) as Bit6,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 7) as Bit7;
+
+  Pin0 = Bit0;
+  Pin1 = Bit1;
+  Pin2 = Bit2;
+  Pin3 = Bit3;
+  Pin4 = Bit4;
+  Pin5 = Bit5;
+  Pin6 = Bit6;
+  Pin7 = Bit7;
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
new file mode 100644
index 00000000..5043095f
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
@@ -0,0 +1,53 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Generic pin access for pins not mapped into I/O space (for which the
+ * sbi, cbi instructions cannot be used). This can be used for ports F-G.
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+generic module HplAtm128GeneralIOSlowPinP (uint8_t port_addr, 
+				     uint8_t ddr_addr, 
+				     uint8_t pin_addr,
+				     uint8_t bit)
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin (*(volatile uint8_t *)pin_addr)
+#define port (*(volatile uint8_t *)port_addr)
+#define ddr (*(volatile uint8_t *)ddr_addr)
+
+  inline async command bool IO.get()        { return READ_BIT (pin, bit); }
+  inline async command void IO.set()        { atomic SET_BIT  (port, bit); }
+  inline async command void IO.clr()        { atomic CLR_BIT  (port, bit); }
+  inline async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { atomic CLR_BIT  (ddr, bit);  }
+  inline async command void IO.makeOutput() { atomic SET_BIT  (ddr, bit);  }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128Interrupt.nc b/tos/chips/atm128/pins/HplAtm128Interrupt.nc
new file mode 100644
index 00000000..74b3e7c4
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128Interrupt.nc
@@ -0,0 +1,65 @@
+/// $Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Interface to an Atmega128 external interrupt pin
+ *
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+
+interface HplAtm128Interrupt
+{
+  /** 
+   * Enables ATmega128 hardware interrupt on a particular port
+   */
+  async command void enable();
+
+  /** 
+   * Disables ATmega128 hardware interrupt on a particular port
+   */
+  async command void disable();
+
+  /** 
+   * Clears the ATmega128 Interrupt Pending Flag for a particular port
+   */
+  async command void clear();
+
+  /** 
+   * Gets the current value of the input voltage of a port
+   *
+   * @return TRUE if the pin is set high, FALSE if it is set low
+   */
+  async command bool getValue();
+
+  /** 
+   * Sets whether the edge should be high to low or low to high.
+   * @param TRUE if the interrupt should be triggered on a low to high
+   *        edge transition, false for interrupts on a high to low transition
+   */
+  async command void edge(bool low_to_high);
+
+  /**
+   * Signalled when an interrupt occurs on a port
+   */
+  async event void fired();
+}
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptC.nc b/tos/chips/atm128/pins/HplAtm128InterruptC.nc
new file mode 100644
index 00000000..4d1b3c70
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptC.nc
@@ -0,0 +1,81 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+#include 
+
+/**
+ * Component providing access to all external interrupt pins on ATmega128.
+ * @author Martin Turon 
+ */
+
+configuration HplAtm128InterruptC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface HplAtm128Interrupt as Int0;
+    interface HplAtm128Interrupt as Int1;
+    interface HplAtm128Interrupt as Int2;
+    interface HplAtm128Interrupt as Int3;
+    interface HplAtm128Interrupt as Int4;
+    interface HplAtm128Interrupt as Int5;
+    interface HplAtm128Interrupt as Int6;
+    interface HplAtm128Interrupt as Int7;
+  }
+}
+implementation
+{
+#define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit
+#define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit
+
+  components 
+    HplAtm128InterruptSigP as IrqVector,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7;
+  
+  Int0 = IntPin0;
+  Int1 = IntPin1;
+  Int2 = IntPin2;
+  Int3 = IntPin3;
+  Int4 = IntPin4;
+  Int5 = IntPin5;
+  Int6 = IntPin6;
+  Int7 = IntPin7;
+
+  IntPin0.IrqSignal -> IrqVector.IntSig0;
+  IntPin1.IrqSignal -> IrqVector.IntSig1;
+  IntPin2.IrqSignal -> IrqVector.IntSig2;
+  IntPin3.IrqSignal -> IrqVector.IntSig3;
+  IntPin4.IrqSignal -> IrqVector.IntSig4;
+  IntPin5.IrqSignal -> IrqVector.IntSig5;
+  IntPin6.IrqSignal -> IrqVector.IntSig6;
+  IntPin7.IrqSignal -> IrqVector.IntSig7;
+
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
new file mode 100644
index 00000000..ce4aa835
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
@@ -0,0 +1,64 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ *
+ * @author Martin Turon 
+ */
+generic module HplAtm128InterruptPinP (uint8_t ctrl_addr, 
+				 uint8_t edge0bit, 
+				 uint8_t edge1bit, 
+				 uint8_t bit)
+{
+  provides interface HplAtm128Interrupt as Irq;
+  uses interface HplAtm128InterruptSig as IrqSignal;
+}
+implementation
+{
+  inline async command bool Irq.getValue() { return (EIFR & (1 << bit)) != 0; }
+  inline async command void Irq.clear()    { EIFR = 1 << bit; }
+  inline async command void Irq.enable()   { EIMSK |= 1 << bit; }
+  inline async command void Irq.disable()  { EIMSK &= ~(1 << bit); }
+
+#define ctrl  (*(volatile uint8_t *)ctrl_addr)
+
+  inline async command void Irq.edge(bool low_to_high) {
+    ctrl |= 1 << edge1bit; // use edge mode
+    // and select rising vs falling
+    if (low_to_high)
+      ctrl |= 1 << edge0bit;
+    else
+      ctrl &= ~(1 << edge0bit);
+  }
+
+  /** 
+   * Forward the external interrupt event.  This ties the statically
+   * allocated interrupt vector SIG_INTERRUPT##bit to a particular
+   * pin passed in via the generic component instantiation.
+   */
+  async event void IrqSignal.fired() { signal Irq.fired(); }
+
+  default async event void Irq.fired() { }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptSig.nc b/tos/chips/atm128/pins/HplAtm128InterruptSig.nc
new file mode 100644
index 00000000..9cad23a4
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptSig.nc
@@ -0,0 +1,43 @@
+/// $Id$
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to an Atmega128 external interrupt pin that exposes just the
+ * interrupt vector routine for easy linking to generic components (see
+ * HplAtm128Interrupt for the full interface).
+ *
+ * @author Martin Turon 
+ * @see HplAtm128Interrupt
+ */
+interface HplAtm128InterruptSig
+{
+  /**
+   * Signalled when an interrupt occurs on a pin
+   */
+  async event void fired();
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc b/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc
new file mode 100644
index 00000000..b424cb6b
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc
@@ -0,0 +1,84 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ * Exposes just the interrupt vector routine for 
+ * easy linking to generic components.
+ *
+ * @author Martin Turon 
+ */
+module HplAtm128InterruptSigP
+{
+  provides interface HplAtm128InterruptSig as IntSig0;
+  provides interface HplAtm128InterruptSig as IntSig1;
+  provides interface HplAtm128InterruptSig as IntSig2;
+  provides interface HplAtm128InterruptSig as IntSig3;
+  provides interface HplAtm128InterruptSig as IntSig4;
+  provides interface HplAtm128InterruptSig as IntSig5;
+  provides interface HplAtm128InterruptSig as IntSig6;
+  provides interface HplAtm128InterruptSig as IntSig7;
+}
+implementation
+{
+  default async event void IntSig0.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT0 ) {
+    signal IntSig0.fired();
+  }
+
+  default async event void IntSig1.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT1 ) {
+    signal IntSig1.fired();
+  }
+
+  default async event void IntSig2.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT2 ) {
+    signal IntSig2.fired();
+  }
+
+  default async event void IntSig3.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT3 ) {
+    signal IntSig3.fired();
+  }
+
+  default async event void IntSig4.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT4 ) {
+    signal IntSig4.fired();
+  }
+
+  default async event void IntSig5.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT5 ) {
+    signal IntSig5.fired();
+  }
+
+  default async event void IntSig6.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT6 ) {
+    signal IntSig6.fired();
+  }
+
+  default async event void IntSig7.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT7 ) {
+    signal IntSig7.fired();
+  }
+}
diff --git a/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc
new file mode 100644
index 00000000..146126f0
--- /dev/null
+++ b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc
@@ -0,0 +1,187 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPATM128_PORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/// @author Martin Turon 
+
+/**
+ * Provide GeneralIO interfaces for all of the ATmega128's pins.
+ */
+
+#include 
+
+configuration HplAtm128GeneralIOC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as PortA0;
+    interface GeneralIO as PortA1;
+    interface GeneralIO as PortA2;
+    interface GeneralIO as PortA3;
+    interface GeneralIO as PortA4;
+    interface GeneralIO as PortA5;
+    interface GeneralIO as PortA6;
+    interface GeneralIO as PortA7;
+
+    interface GeneralIO as PortB0;
+    interface GeneralIO as PortB1;
+    interface GeneralIO as PortB2;
+    interface GeneralIO as PortB3;
+    interface GeneralIO as PortB4;
+    interface GeneralIO as PortB5;
+    interface GeneralIO as PortB6;
+    interface GeneralIO as PortB7;
+
+    interface GeneralIO as PortC0;
+    interface GeneralIO as PortC1;
+    interface GeneralIO as PortC2;
+    interface GeneralIO as PortC3;
+    interface GeneralIO as PortC4;
+    interface GeneralIO as PortC5;
+    interface GeneralIO as PortC6;
+    interface GeneralIO as PortC7;
+
+    interface GeneralIO as PortD0;
+    interface GeneralIO as PortD1;
+    interface GeneralIO as PortD2;
+    interface GeneralIO as PortD3;
+    interface GeneralIO as PortD4;
+    interface GeneralIO as PortD5;
+    interface GeneralIO as PortD6;
+    interface GeneralIO as PortD7;
+
+    interface GeneralIO as PortE0;
+    interface GeneralIO as PortE1;
+    interface GeneralIO as PortE2;
+    interface GeneralIO as PortE3;
+    interface GeneralIO as PortE4;
+    interface GeneralIO as PortE5;
+    interface GeneralIO as PortE6;
+    interface GeneralIO as PortE7;
+
+    interface GeneralIO as PortF0;
+    interface GeneralIO as PortF1;
+    interface GeneralIO as PortF2;
+    interface GeneralIO as PortF3;
+    interface GeneralIO as PortF4;
+    interface GeneralIO as PortF5;
+    interface GeneralIO as PortF6;
+    interface GeneralIO as PortF7;
+
+    interface GeneralIO as PortG0;
+    interface GeneralIO as PortG1;
+    interface GeneralIO as PortG2;
+    interface GeneralIO as PortG3;
+    interface GeneralIO as PortG4;
+  }
+}
+
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTA, (uint8_t)ATM128_DDRA, (uint8_t)ATM128_PINA) as PortA,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTB, (uint8_t)ATM128_DDRB, (uint8_t)ATM128_PINB) as PortB,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTC, (uint8_t)ATM128_DDRC, (uint8_t)ATM128_PINC) as PortC,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTD, (uint8_t)ATM128_DDRD, (uint8_t)ATM128_PIND) as PortD,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTE, (uint8_t)ATM128_DDRE, (uint8_t)ATM128_PINE) as PortE,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF) as PortF,
+
+  // PortF cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 0) as F0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 1) as F1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 2) as F2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 3) as F3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 4) as F4,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 5) as F5,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 6) as F6,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 7) as F7,
+
+
+  // PortG only exposes 5 bits and cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 0) as G0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 1) as G1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 2) as G2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 3) as G3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 4) as G4
+    ;
+
+  PortA0 = PortA.Pin0;
+  PortA1 = PortA.Pin1;
+  PortA2 = PortA.Pin2;
+  PortA3 = PortA.Pin3;
+  PortA4 = PortA.Pin4;
+  PortA5 = PortA.Pin5;
+  PortA6 = PortA.Pin6;
+  PortA7 = PortA.Pin7;
+
+  PortB0 = PortB.Pin0;
+  PortB1 = PortB.Pin1;
+  PortB2 = PortB.Pin2;
+  PortB3 = PortB.Pin3;
+  PortB4 = PortB.Pin4;
+  PortB5 = PortB.Pin5;
+  PortB6 = PortB.Pin6;
+  PortB7 = PortB.Pin7;
+
+  PortC0 = PortC.Pin0;
+  PortC1 = PortC.Pin1;
+  PortC2 = PortC.Pin2;
+  PortC3 = PortC.Pin3;
+  PortC4 = PortC.Pin4;
+  PortC5 = PortC.Pin5;
+  PortC6 = PortC.Pin6;
+  PortC7 = PortC.Pin7;
+
+  PortD0 = PortD.Pin0;
+  PortD1 = PortD.Pin1;
+  PortD2 = PortD.Pin2;
+  PortD3 = PortD.Pin3;
+  PortD4 = PortD.Pin4;
+  PortD5 = PortD.Pin5;
+  PortD6 = PortD.Pin6;
+  PortD7 = PortD.Pin7;
+
+  PortE0 = PortE.Pin0;
+  PortE1 = PortE.Pin1;
+  PortE2 = PortE.Pin2;
+  PortE3 = PortE.Pin3;
+  PortE4 = PortE.Pin4;
+  PortE5 = PortE.Pin5;
+  PortE6 = PortE.Pin6;
+  PortE7 = PortE.Pin7;
+
+  PortF0 = PortF.Pin0;
+  PortF1 = PortF.Pin1;
+  PortF2 = PortF.Pin2;
+  PortF3 = PortF.Pin3;
+  PortF4 = PortF.Pin4;
+  PortF5 = PortF.Pin5;
+  PortF6 = PortF.Pin6;
+  PortF7 = PortF.Pin7;
+
+  PortG0 = G0;
+  PortG1 = G1;
+  PortG2 = G2;
+  PortG3 = G3;
+  PortG4 = G4;
+}
diff --git a/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc
new file mode 100644
index 00000000..1fd57c4c
--- /dev/null
+++ b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc
@@ -0,0 +1,56 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/// @author Martin Turon 
+/// @author David Gay 
+
+/**
+ * Generic pin access for pins mapped into I/O space (for which the sbi, cbi
+ * instructions give atomic updates). This can be used for ports A-E.
+ */
+generic module HplAtm128GeneralIOPinP (uint8_t port_addr, 
+				 uint8_t ddr_addr, 
+				 uint8_t pin_addr,
+				 uint8_t bit)
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin  pin_addr
+#define port port_addr
+#define ddr  ddr_addr
+
+  inline async command bool IO.get()        { return READ_BIT (port, bit); }
+  inline async command void IO.set()        {
+    dbg("Pins", "Setting bit %i of port %i.\n", (int)bit, (int)port);
+    SET_BIT  (port, bit);
+  }
+  inline async command void IO.clr()        { CLR_BIT  (port, bit); }
+  inline async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { CLR_BIT  (ddr, bit);  }
+  inline async command void IO.makeOutput() { SET_BIT  (ddr, bit);  }
+}
+
diff --git a/tos/chips/atm128/sim/McuSleepC.nc b/tos/chips/atm128/sim/McuSleepC.nc
new file mode 100644
index 00000000..5919ea19
--- /dev/null
+++ b/tos/chips/atm128/sim/McuSleepC.nc
@@ -0,0 +1,125 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * TOSSIM Implementation of TEP 112 (Microcontroller Power Management)
+ * for the Atmega128. It currently does nothing.
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @date   October 26, 2005
+ *
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  bool dirty = TRUE;
+  mcu_power_t powerState = ATM128_POWER_IDLE;
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm128hardware.h and page 42 of the ATmeg128
+   * manual (figure 17).*/
+  // NOTE: This table should be in progmem.
+  const uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = {
+    0,
+    (1 << SM0),
+    (1 << SM2) | (1 << SM1) | (1 << SM0),
+    (1 << SM1) | (1 << SM0),
+    (1 << SM2) | (1 << SM1),
+    (1 << SM1)};
+    
+  mcu_power_t getPowerState() {
+    uint8_t diff;
+    // Are external timers running?  
+    if (TIMSK & ~((1 << OCIE0) | ( 1 << TOIE0))) {
+      return ATM128_POWER_IDLE;
+    }
+    // SPI (Radio stack on mica/micaZ
+    else if (READ_BIT(SPCR, SPIE)) { 
+      return ATM128_POWER_IDLE;
+    }
+    // UARTs are active
+    else if (UCSR0B & ((1 << TXCIE) | (1 << RXCIE))) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    else if (UCSR1B & ((1 << TXCIE) | (1 << RXCIE))) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    // ADC is enbaled
+    else if (READ_BIT(ADCSR, ADEN)) { 
+      return ATM128_POWER_ADC_NR;
+    }
+    // How soon for the timer to go off?
+    else if (TIMSK & ((1<
+ *
+ *  $Id$
+ */
+
+#ifndef _H_atmega128hardware_H
+#define _H_atmega128hardware_H
+
+#include 
+#include 
+
+uint8_t atm128RegFile[TOSSIM_MAX_NODES][0xa0];
+
+#define REG_ACCESS(x) atm128RegFile[sim_node()][x]
+
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((spontaneous, C))
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((spontaneous, C))
+
+/* Macro to create union casting functions. */
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x) { \
+  union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// Bit operators using bit number
+#define SET_BIT(port, bit)    ((REG_ACCESS(port)) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((REG_ACCESS(port)) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((REG_ACCESS(port)) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((REG_ACCESS(port)) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+   if (value) SET_BIT((port), (bit)); \
+   else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((REG_ACCESS(port)) |= (flag))
+#define CLR_FLAG(port, flag)  ((REG_ACCESS(port)) &= ~(flag))
+#define READ_FLAG(port, flag) ((REG_ACCESS(port)) & (flag))
+
+#define sei() (SET_BIT(SREG, 7))
+#define cli() (CLR_BIT(SREG, 7))
+
+/* Enables interrupts. */
+inline void __nesc_enable_interrupt() {
+    sei();
+}
+/* Disables all interrupts. */
+inline void __nesc_disable_interrupt() {
+    cli();
+}
+
+/* Defines data type for storing interrupt mask state during atomic. */
+typedef uint8_t __nesc_atomic_t;
+
+/* Saves current interrupt mask state and disables interrupts. */
+inline __nesc_atomic_t 
+__nesc_atomic_start(void) __attribute__((spontaneous))
+{
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void 
+__nesc_atomic_end(__nesc_atomic_t original_SREG) __attribute__((spontaneous))
+{
+  SREG = original_SREG;
+}
+
+inline void
+__nesc_atomic_sleep()
+{
+  //sbi(MCUCR, SE);  power manager will enable/disable sleep
+  sei();  // Make sure interrupts are on, so we can wake up!
+  asm volatile ("sleep");
+}
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+/* Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2)? m1: m2;
+}
+
+enum {
+  ATM128_POWER_IDLE        = 0,
+  ATM128_POWER_ADC_NR      = 1,
+  ATM128_POWER_EXT_STANDBY = 2,
+  ATM128_POWER_SAVE        = 3,
+  ATM128_POWER_STANDBY     = 4,
+  ATM128_POWER_DOWN        = 5, 
+};
+
+#endif //_H_atmega128hardware_H
diff --git a/tos/chips/atm128/sim/crc.h b/tos/chips/atm128/sim/crc.h
new file mode 100644
index 00000000..35387872
--- /dev/null
+++ b/tos/chips/atm128/sim/crc.h
@@ -0,0 +1,95 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef CRC_H
+#define CRC_H
+
+uint16_t crcTable[256] = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte)
+{
+#if 0
+  uint16_t *table = crcTable;
+  uint16_t newCrc;
+
+  asm ("eor %1,%B3\n"
+       "\tlsl %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tadd %A2, %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tlpm\n"
+       "\tmov %B0, %A3\n"
+       "\tmov %A0, r0\n"
+       "\tadiw r30,1\n"
+       "\tlpm\n"
+       "\teor %B0, r0"
+       : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc));
+  return newCrc;
+#else
+  uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte];
+
+  return *magic | ((uint8_t)oldCrc ^ *(magic + 1)) << 8;
+#endif
+}
+
+#endif
diff --git a/tos/chips/atm128/spi/Atm128Spi.h b/tos/chips/atm128/spi/Atm128Spi.h
new file mode 100644
index 00000000..37a7298b
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128Spi.h
@@ -0,0 +1,74 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+// @author Martin Turon 
+
+#ifndef _H_Atm128SPI_h
+#define _H_Atm128SPI_h
+
+//====================== SPI Bus ==================================
+
+enum {
+  ATM128_SPI_CLK_DIVIDE_4 = 0,
+  ATM128_SPI_CLK_DIVIDE_16 = 1,
+  ATM128_SPI_CLK_DIVIDE_64 = 2,
+  ATM128_SPI_CLK_DIVIDE_128 = 3,
+};
+
+/* SPI Control Register */
+typedef struct {
+  uint8_t spie  : 1;  //!< SPI Interrupt Enable
+  uint8_t spe   : 1;  //!< SPI Enable
+  uint8_t dord  : 1;  //!< SPI Data Order
+  uint8_t mstr  : 1;  //!< SPI Master/Slave Select
+  uint8_t cpol  : 1;  //!< SPI Clock Polarity
+  uint8_t cpha  : 1;  //!< SPI Clock Phase
+  uint8_t spr   : 2;  //!< SPI Clock Rate
+
+} Atm128SPIControl_s;
+typedef union {
+  uint8_t flat;
+  Atm128SPIControl_s bits;
+} Atm128SPIControl_t;
+
+typedef Atm128SPIControl_t Atm128_SPCR_t;  //!< SPI Control Register
+
+/* SPI Status Register */
+typedef struct {
+  uint8_t spif  : 1;  //!< SPI Interrupt Flag
+  uint8_t wcol  : 1;  //!< SPI Write COLision flag
+  uint8_t rsvd  : 5;  //!< Reserved
+  uint8_t spi2x : 1;  //!< Whether we are in double speed
+
+} Atm128SPIStatus_s;
+typedef union {
+  uint8_t flat;
+  Atm128SPIStatus_s bits;
+} Atm128SPIStatus_t;
+
+typedef Atm128SPIStatus_t Atm128_SPSR_t;  //!< SPI Status Register
+
+typedef uint8_t Atm128_SPDR_t;  //!< SPI Data Register
+
+#endif //_H_Atm128SPI_h
diff --git a/tos/chips/atm128/spi/Atm128Spi.nc b/tos/chips/atm128/spi/Atm128Spi.nc
new file mode 100644
index 00000000..b5c8b509
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128Spi.nc
@@ -0,0 +1,126 @@
+/// $Id$ 
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL-level access to the Atmega128 SPI bus. Refer to pages 162-9
+ * of the Atmega128 datasheet (rev. 2467M-AVR-11/04) for details.
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @author Martin Turon 
+ * @date   September 8 2005
+ */
+
+#include "Atm128Spi.h"
+
+interface Atm128Spi {
+
+  /* Modal functions */
+
+  /** Initialize the ATmega128 SPI bus into master mode. */
+  async command void initMaster();
+
+  /** Initialize the ATmega128 SPI bus into slave mode. */
+  async command void initSlave();
+
+  /** Disable and sleep the ATmega128 SPI bus. */
+  async command void sleep();
+  
+  /* SPDR: SPI Data Register */
+
+  /** 
+   * Read the SPI data register 
+   * @return last data byte
+   */
+  async command uint8_t read();
+
+  /** 
+   * Write the SPI data register 
+   * @param data   next data byte
+   */
+  async command void write(uint8_t data);
+
+  /**
+   * Interrupt signalling SPI data cycle is complete. 
+   * @param data   data byte from data register
+   */
+  async event   void dataReady(uint8_t data);
+  
+  /* SPCR: SPI Control Register */
+  /* SPIE bit */
+  async command void enableInterrupt(bool enabled);
+  async command bool isInterruptEnabled();
+  /* SPI bit */
+  async command void enableSpi(bool busOn);
+  async command bool isSpiEnabled();
+  /* DORD bit */
+  async command void setDataOrder(bool lsbFirst);
+  async command bool isOrderLsbFirst();
+  /* MSTR bit */
+  async command void setMasterBit(bool isMaster);
+  async command bool isMasterBitSet();
+  /* CPOL bit */
+  async command void setClockPolarity(bool highWhenIdle);
+  async command bool getClockPolarity();
+  /* CPHA bit */
+  async command void setClockPhase(bool sampleOnTrailing);
+  async command bool getClockPhase();
+  /* SPR1 and SPR0 bits */
+  async command void  setClock(uint8_t speed);
+  async command uint8_t getClock();
+  
+  /* SPSR: SPI Status Register */
+  
+  /* SPIF bit */
+  async command bool isInterruptPending();
+  /* WCOL bit */
+  async command bool hasWriteCollided();
+  /* SPI2X bit */
+  async command bool isMasterDoubleSpeed();
+  async command void setMasterDoubleSpeed(bool on);
+}
diff --git a/tos/chips/atm128/spi/Atm128SpiC.nc b/tos/chips/atm128/spi/Atm128SpiC.nc
new file mode 100644
index 00000000..ecb18d6a
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128SpiC.nc
@@ -0,0 +1,88 @@
+/// $Id$
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2000-2005 The Regents of the University  of California.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * The HAL of the SPI bus on the atm128.
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ * @author Joe Polastre
+ * @date   September 7 2005
+ */
+
+configuration Atm128SpiC {
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  provides interface Resource[uint8_t id];
+}
+implementation {
+  components Atm128SpiP as SpiMaster, HplAtm128SpiC as HplSpi;
+  components HplAtm128GeneralIOC as IO;
+  components new FcfsArbiterC("Atm128SpiC.Resource") as Arbiter;
+  components McuSleepC;
+  
+  Init         = SpiMaster;
+  Init         = Arbiter;
+  
+  SpiByte      = SpiMaster;
+  SpiPacket    = SpiMaster;
+  Resource     = SpiMaster;
+
+  SpiMaster.ResourceArbiter -> Arbiter;
+  SpiMaster.ArbiterInfo    -> Arbiter;
+  SpiMaster.Spi             -> HplSpi;
+  SpiMaster.McuPowerState   -> McuSleepC;
+}
diff --git a/tos/chips/atm128/spi/Atm128SpiP.nc b/tos/chips/atm128/spi/Atm128SpiP.nc
new file mode 100644
index 00000000..43b95f14
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128SpiP.nc
@@ -0,0 +1,313 @@
+/// $Id$
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2000-2005 The Regents of the University  of California.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+
+/**
+ * Primitives for accessing the SPI module on ATmega128
+ * microcontroller.  This module assumes the bus has been reserved and
+ * checks that the bus owner is in fact the person using the bus.
+ * SpiPacket provides an asynchronous send interface where the
+ * transmit data length is equal to the receive data length, while
+ * SpiByte provides an interface for sending a single byte
+ * synchronously. SpiByte allows a component to send a few bytes
+ * in a simple fashion: if more than a handful need to be sent,
+ * SpiPacket should be used.
+ *
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @author Martin Turon 
+ *
+ */
+
+module Atm128SpiP {
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface SpiPacket;
+    interface Resource[uint8_t id];
+  }
+  uses {
+    interface Atm128Spi as Spi;
+    interface Resource as ResourceArbiter[uint8_t id];
+    interface ArbiterInfo;
+    interface McuPowerState;
+  }
+}
+implementation {
+  uint8_t* txBuffer;
+  uint8_t* rxBuffer;
+  uint16_t len;
+  uint16_t pos;
+  
+  enum {
+    SPI_IDLE,
+    SPI_BUSY,
+    SPI_ATOMIC_SIZE = 10,
+  };
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+  bool started;
+  
+  void startSpi() {
+    call Spi.enableSpi(FALSE);
+    atomic {
+      call Spi.initMaster();
+      call Spi.enableInterrupt(FALSE);
+      call Spi.setMasterDoubleSpeed(TRUE);
+      call Spi.setClockPolarity(FALSE);
+      call Spi.setClockPhase(FALSE);
+      call Spi.setClock(0);
+      call Spi.enableSpi(TRUE);
+    }
+    call McuPowerState.update();
+  }
+
+  void stopSpi() {
+    call Spi.enableSpi(FALSE);
+    started = FALSE;
+    atomic {
+      call Spi.sleep();
+    }
+    call McuPowerState.update();
+  }
+  
+  async command void SpiByte.write( uint8_t tx, uint8_t* rx ) {
+    call Spi.write( tx );
+    while ( !( SPSR & 0x80 ) );
+    *rx = call Spi.read();
+  }
+
+
+  /**
+   * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE
+   * (which is normally 5). The tradeoff is between SPI performance
+   * (throughput) and how much the component limits concurrency in the
+   * rest of the system. Handling an interrupt on each byte is
+   * very expensive: the context saving/register spilling constrains
+   * the rate at which one can write out bytes. A more efficient
+   * approach is to write out a byte and wait for a few cycles until
+   * the byte is written (a tiny spin loop). This leads to greater
+   * throughput, but blocks the system and prevents it from doing
+   * useful work.
+   *
+   * This component takes a middle ground. When asked to transmit X
+   * bytes in a packet, it transmits those X bytes in 10-byte parts.
+   * sendNextPart() is responsible for sending one such
+   * part. It transmits bytes with the SpiByte interface, which
+   * disables interrupts and spins on the SPI control register for
+   * completion. On the last byte, however, sendNextPart
+   * re-enables SPI interrupts and sends the byte through the
+   * underlying split-phase SPI interface. When this component handles
+   * the SPI transmit completion event (handles the SPI interrupt),
+   * it calls sendNextPart() again. As the SPI interrupt does
+   * not disable interrupts, this allows processing in the rest of the
+   * system to continue.
+   */
+   
+  error_t sendNextPart() {
+    uint16_t end;
+    uint16_t tmpPos;
+    uint8_t* tx;
+    uint8_t* rx;
+    
+    atomic {
+      tx = txBuffer;
+      rx = rxBuffer;
+      tmpPos = pos;
+      end = pos + SPI_ATOMIC_SIZE;
+      end = (end > len)? len:end;
+    }
+
+    for (;tmpPos < (end - 1) ; tmpPos++) {
+      uint8_t val;
+      if (tx != NULL) 
+	call SpiByte.write( tx[tmpPos], &val );
+      else
+	call SpiByte.write( 0, &val );
+    
+      if (rx != NULL) {
+	rx[tmpPos] = val;
+      }
+    }
+
+    // For the last byte, we re-enable interrupts.
+
+   call Spi.enableInterrupt(TRUE);
+   atomic {
+     if (tx != NULL)
+       call Spi.write(tx[tmpPos]);
+     else
+       call Spi.write(0);
+     
+     pos = tmpPos;
+      // The final increment will be in the interrupt
+      // handler.
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * Send bufLen bytes in writeBuf and receive bufLen bytes
+   * into readBuf. If readBuf is NULL, bytes will be
+   * read out of the SPI, but they will be discarded. A byte is read
+   * from the SPI before writing and discarded (to clear any buffered
+   * bytes that might have been left around).
+   *
+   * This command only sets up the state variables and clears the SPI:
+   * sendNextPart() does the real work.
+   *
+   */
+  
+  
+  async command error_t SpiPacket.send(uint8_t* writeBuf, 
+				       uint8_t* readBuf, 
+				       uint16_t  bufLen) {
+    uint8_t discard;
+    atomic {
+      txBuffer = writeBuf;
+      rxBuffer = readBuf;
+      len = bufLen;
+      pos = 0;
+    }
+    
+    discard = call Spi.read();
+    
+    return sendNextPart();
+  }
+
+ default async event void SpiPacket.sendDone
+      (uint8_t* _txbuffer, uint8_t* _rxbuffer, 
+       uint16_t _length, error_t _success) { }
+
+ async event void Spi.dataReady(uint8_t data) {
+   bool again;
+   
+   atomic {
+     if (rxBuffer != NULL) {
+       rxBuffer[pos] = data;
+       // Increment position
+     }
+     pos++;
+   }
+   call Spi.enableInterrupt(FALSE);
+   
+   atomic {
+     again = (pos < len);
+   }
+   
+   if (again) {
+     sendNextPart();
+   }
+   else {
+     uint8_t* rx;
+     uint8_t* tx;
+     uint16_t  myLen;
+     uint8_t discard;
+     
+     atomic {
+       rx = rxBuffer;
+       tx = txBuffer;
+       myLen = len;
+       rxBuffer = NULL;
+       txBuffer = NULL;
+       len = 0;
+       pos = 0;
+     }
+     discard = call Spi.read();
+
+     signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS);
+   }
+ }
+
+ async command error_t Resource.immediateRequest[ uint8_t id ]() {
+   error_t result = call ResourceArbiter.immediateRequest[ id ]();
+   if ( result == SUCCESS ) {
+     startSpi();
+   }
+   return result;
+ }
+ 
+ async command error_t Resource.request[ uint8_t id ]() {
+   atomic {
+     if (!call ArbiterInfo.inUse()) {
+       startSpi();
+     }
+   }
+   return call ResourceArbiter.request[ id ]();
+ }
+
+ async command void Resource.release[ uint8_t id ]() {
+   call ResourceArbiter.release[ id ]();
+   atomic {
+     if (!call ArbiterInfo.inUse()) {
+       stopSpi();
+     }
+   }
+ }
+
+ async command uint8_t Resource.isOwner[uint8_t id]() {
+   return call ResourceArbiter.isOwner[id]();
+ }
+ 
+ event void ResourceArbiter.granted[ uint8_t id ]() {
+   signal Resource.granted[ id ]();
+ }
+ 
+ default event void Resource.granted[ uint8_t id ]() {}
+ 
+}
diff --git a/tos/chips/atm128/spi/HplAtm128SpiC.nc b/tos/chips/atm128/spi/HplAtm128SpiC.nc
new file mode 100644
index 00000000..5acef83f
--- /dev/null
+++ b/tos/chips/atm128/spi/HplAtm128SpiC.nc
@@ -0,0 +1,73 @@
+/// $Id$
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Configuration encapsulating the basic SPI HPL for the atm128.
+ *
+ * 
    + * $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @author Martin Turon 
+ */
+
+
+configuration HplAtm128SpiC {
+    provides interface Atm128Spi as SpiBus;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO, HplAtm128SpiP as HplSpi;
+  components McuSleepC;
+  
+  SpiBus = HplSpi;
+
+  HplSpi.Mcu -> McuSleepC;
+  HplSpi.SS   -> IO.PortB0;  // Slave set line
+  HplSpi.SCK  -> IO.PortB1;  // SPI clock line
+  HplSpi.MOSI -> IO.PortB2;  // Master out, slave in
+  HplSpi.MISO -> IO.PortB3;  // Master in, slave out
+}
diff --git a/tos/chips/atm128/spi/HplAtm128SpiP.nc b/tos/chips/atm128/spi/HplAtm128SpiP.nc
new file mode 100644
index 00000000..b29396d1
--- /dev/null
+++ b/tos/chips/atm128/spi/HplAtm128SpiP.nc
@@ -0,0 +1,222 @@
+/// $Id$
+
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Implementation of the SPI bus abstraction for the atm128
+ * microcontroller.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ */
+
+#include "Atm128Spi.h"
+
+module HplAtm128SpiP {
+  provides interface Atm128Spi as SPI;
+  provides interface AsyncStdControl;
+  
+  uses {
+    interface GeneralIO as SS;   // Slave set line
+    interface GeneralIO as SCK;  // SPI clock line
+    interface GeneralIO as MOSI; // Master out, slave in
+    interface GeneralIO as MISO; // Master in, slave out
+    interface McuPowerState as Mcu;
+  }
+}
+implementation {
+
+  async command error_t AsyncStdControl.start() {
+    call SPI.enableSpi(TRUE);
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call SPI.enableInterrupt(FALSE);
+    call SPI.enableSpi(FALSE);
+  }
+  
+  async command void SPI.initMaster() {
+    call MOSI.makeOutput();
+    call MISO.makeInput();
+    call SCK.makeOutput();
+    call SS.makeOutput();
+    call SPI.setMasterBit(TRUE);
+    call SS.clr();
+  }
+  async command void SPI.initSlave() {
+    call MISO.makeOutput();
+    call MOSI.makeInput();
+    call SCK.makeInput();
+    call SS.makeInput();
+    call SPI.setMasterBit(FALSE);
+  }
+  
+  async command void SPI.sleep() {
+    call SS.set();
+  }
+  
+  async command uint8_t SPI.read()        { return SPDR; }
+  async command void SPI.write(uint8_t d) { SPDR = d; }
+    
+  default async event void SPI.dataReady(uint8_t d) {}
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+      signal SPI.dataReady(call SPI.read());
+  }
+
+  //=== SPI Bus utility routines. ====================================
+  async command bool SPI.isInterruptPending() {
+    return READ_BIT(SPSR, SPIF);
+  }
+
+  async command bool SPI.isInterruptEnabled () {                
+    return READ_BIT(SPCR, SPIE);
+  }
+
+  async command void SPI.enableInterrupt(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+  }
+
+  async command bool SPI.isSpiEnabled() {
+    return READ_BIT(SPCR, SPE);
+  }
+  
+  async command void SPI.enableSpi(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+  }
+
+  /* DORD bit */
+  async command void SPI.setDataOrder(bool lsbFirst) {
+    if (lsbFirst) {
+      SET_BIT(SPCR, DORD);
+    }
+    else {
+      CLR_BIT(SPCR, DORD);
+    }
+  }
+  
+  async command bool SPI.isOrderLsbFirst() {
+    return READ_BIT(SPCR, DORD);
+  }
+  
+  /* MSTR bit */
+  async command void SPI.setMasterBit(bool isMaster) {
+    if (isMaster) {
+      SET_BIT(SPCR, MSTR);
+    }
+    else {
+      CLR_BIT(SPCR, MSTR);
+    }
+  }
+  async command bool SPI.isMasterBitSet() {
+    return READ_BIT(SPCR, MSTR);
+  }
+  
+  /* CPOL bit */
+  async command void SPI.setClockPolarity(bool highWhenIdle) {
+    if (highWhenIdle) {
+      SET_BIT(SPCR, CPOL);
+    }
+    else {
+      CLR_BIT(SPCR, CPOL);
+    }
+  }
+  
+  async command bool SPI.getClockPolarity() {
+    return READ_BIT(SPCR, CPOL);
+  }
+  
+  /* CPHA bit */
+  async command void SPI.setClockPhase(bool sampleOnTrailing) {
+    if (sampleOnTrailing) {
+      SET_BIT(SPCR, CPHA);
+    }
+    else {
+      CLR_BIT(SPCR, CPHA);
+    }
+  }
+  async command bool SPI.getClockPhase() {
+    return READ_BIT(SPCR, CPHA);
+  }
+
+  
+  async command uint8_t SPI.getClock () {                
+    return READ_FLAG(SPCR, ((1 << SPR1) | (1 <
+ *  $Id$
+ * 
+ *
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+configuration Atm128SpiC {
+  provides interface Init;
+  provides interface SPIByte;
+  provides interface SPIPacket;
+  provides interface Resource[uint8_t id];
+}
+implementation {
+  components SimAtm128SpiDeviceC as Device;
+  components new FcfsArbiterC("Atm128SpiC.Resource") as Arbiter;
+  components McuSleepC;
+  
+  Init         = Device;
+  Init         = Arbiter;
+  
+  SPIByte      = Device;
+  SPIPacket    = Device;
+  Resource     = Arbiter;
+
+  Device.McuPowerState   -> McuSleepC;
+}
diff --git a/tos/chips/atm128/timer/Atm128AlarmC.nc b/tos/chips/atm128/timer/Atm128AlarmC.nc
new file mode 100644
index 00000000..4cbd6337
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128AlarmC.nc
@@ -0,0 +1,130 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Build a TEP102 Alarm from an Atmega128 hardware timer and one of its
+ * compare registers.
+ * @param frequency_tag The frequency tag for this Alarm
+ * @param timer_size The width of this Alarm
+ * @param mindt The shortest time in the future this Alarm can be set
+ *   (in its own time units). Has to be at least 2, as setting a compare
+ *   register one above the current counter value is unreliable. Has to be
+ *   large enough that the Alarm time does not pass between the computation
+ *   of expires and actually setting the compare register.
+ *   Check this (for high-frequency timers) by inspecting the generated
+ *   assembly code...
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+generic module Atm128AlarmC(typedef frequency_tag, 
+			    typedef timer_size @integer(),
+			    int mindt)
+{
+  provides interface Alarm as Alarm @atmostonce();
+
+  uses interface HplAtm128Timer;
+  uses interface HplAtm128Compare;
+}
+implementation
+{
+  async command timer_size Alarm.getNow() {
+    return call HplAtm128Timer.get();
+  }
+
+  async command timer_size Alarm.getAlarm() {
+    return call HplAtm128Compare.get();
+  }
+
+  async command bool Alarm.isRunning() {
+    return call HplAtm128Compare.isOn();
+  }
+
+  async command void Alarm.stop() {
+    call HplAtm128Compare.stop();
+  }
+
+  async command void Alarm.start( timer_size dt ) 
+  {
+    call Alarm.startAt( call HplAtm128Timer.get(), dt);
+  }
+
+  async command void Alarm.startAt( timer_size t0, timer_size dt ) {
+    timer_size now;
+    timer_size expires, guardedExpires;
+
+    now = call HplAtm128Timer.get();
+    dbg("Atm128AlarmC", "   starting timer at %llu with dt %llu\n", (uint64_t)t0, (uint64_t) dt);
+    /* We require dt >= mindt to avoid setting an interrupt which is in
+       the past by the time we actually set it. mindt should always be
+       at least 2, because you cannot set an interrupt one cycle in the
+       future. It should be more than 2 if the timer's clock rate is
+       very high (e.g., equal to the processor clock). */
+    if (dt < mindt)
+      dt = mindt;
+
+    expires = t0 + dt;
+
+    guardedExpires = expires - mindt;
+
+    /* t0 is assumed to be in the past. If it's numerically greater than
+       now, that just represents a time one wrap-around ago. This requires
+       handling the t0 <= now and t0 > now cases separately. 
+
+       Note also that casting compared quantities to timer_size produces
+       predictable comparisons (the C integer promotion rules would make it
+       hard to write correct code for the possible timer_size size's) */
+    if (t0 <= now)
+      {
+	/* if it's in the past or the near future, fire now (i.e., test
+	   guardedExpires <= now in wrap-around arithmetic). */
+	if (guardedExpires >= t0 && // if it wraps, it's > now
+	    guardedExpires <= now) 
+	  call HplAtm128Compare.set(call HplAtm128Timer.get() + mindt);
+	else
+	  call HplAtm128Compare.set(expires);
+      }
+    else
+      {
+	/* again, guardedExpires <= now in wrap-around arithmetic */
+	if (guardedExpires >= t0 || // didn't wrap so < now
+	    guardedExpires <= now)
+	  call HplAtm128Compare.set(call HplAtm128Timer.get() + mindt);
+	else
+	  call HplAtm128Compare.set(expires);
+      }
+    call HplAtm128Compare.reset();
+    call HplAtm128Compare.start();
+  }
+
+  async event void HplAtm128Compare.fired() {
+    call HplAtm128Compare.stop();
+    dbg("Atm128AlarmC", " Compare fired, signal alarm above.\n");
+    signal Alarm.fired();
+  }
+
+  async event void HplAtm128Timer.overflow() {
+  }
+}
diff --git a/tos/chips/atm128/timer/Atm128Calibrate.nc b/tos/chips/atm128/timer/Atm128Calibrate.nc
new file mode 100644
index 00000000..d83fd673
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128Calibrate.nc
@@ -0,0 +1,61 @@
+// $Id$
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * This interface provides functions to compute ATmega128 configuration
+ * values that are clock-rate dependent. These include:
      
+ * 
    • the ADC prescaler value necessary for full precision
+ * 
    • values for the UBRR registers to achieve a specific baud rate
+ * 
    • any adjustment necessary to values passed to some platform-provided
+ *   AlarmMicroXXC components to get more accurate timing
+ * 
    • the number of cycles per 1/32768s (a typical implementation of this
+ *   interface will measure this value at boot time and use it to compute
+ *   the values above)
+ * 
    
+ *
+ * @author David Gay
+ */
+
+interface Atm128Calibrate {
+  /**
+   * Return CPU cycles per 1/32768s.
+   * @return CPU cycles.
+   */
+  async command uint16_t cyclesPerJiffy();
+
+  /**
+   * Convert n microseconds into a value suitable for use with
+   * AlarmMicro32C Alarms.
+   * @param n Time in microseconds.
+   * @return AlarmMicro argument that best approximates n microseconds.
+   */
+  async command uint32_t calibrateMicro(uint32_t n);
+
+  /**
+   * Convert values used by AlarmMicro32C Alarms into actual microseconds.
+   * @param n A time expressed in AlarmMicro time units.
+   * @return Time in microseconds that corresponds to AlarmMicro argument n.
+   */
+  async command uint32_t actualMicro(uint32_t n);
+
+  /**
+   * Return the smallest ADC prescaler value which guaranteers full
+   * ADC precision.
+   * @return ADC prescaler value.
+   */
+  async command uint8_t adcPrescaler();
+
+  /**
+   * Return the value to use for the baudrate register to achieve a
+   * particular baud rate. Assumes U2X=1 (the USART is being run at
+   * double speed).
+   */
+  async command uint16_t baudrateRegister(uint32_t baudrate);
+}
diff --git a/tos/chips/atm128/timer/Atm128CaptureC.nc b/tos/chips/atm128/timer/Atm128CaptureC.nc
new file mode 100644
index 00000000..20ff46a6
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128CaptureC.nc
@@ -0,0 +1,97 @@
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  $Id$
+ */
+
+/**
+ * Exposes Capture capability of hardware as general interface, 
+ * with some ATmega128 specific dependencies including:
+ *     Only available with the two 16-bit timers.
+ *     Each Timer has only one dedicated capture pin.
+ *         Timer1 == PortD.Pin4 [D4]
+ *         Timer3 == PortE.Pin7 [E7]
+ * So selection of 16-bit timer gives implicit wiring of actual Pin to capture.
+ *
+ *  @author Alan Broad, Crossbow 
+ *  @author Matt Miller, Crossbow 
+ *  @author Martin Turon, Crossbow 
+ */
+generic module Atm128CaptureP () 
+{
+  provides {
+    interface Capture as CapturePin;
+  }
+  uses {
+    interface HplAtm128Capture;
+    // interface HplAtm128Timer as Timer;
+    // interface GeneralIO as PinToCapture;       // implicit to timer used
+  }
+}
+implementation
+{
+  // ************* CapturePin Interrupt handlers and dispatch *************
+
+  /**
+   *  CapturePin.enableCapture
+   *
+   * Configure Atmega128 TIMER to capture edge input of CapturePin signal.
+   * This will cause an interrupt and save TIMER count.
+   * TIMER Timebase is set by stdControl.start
+   *  -- see HplAtm128Capture interface and HplAtm128TimerM implementation
+   */
+  async command error_t CapturePin.enableCapture(bool low_to_high) {
+    atomic {
+      call HplAtm128Capture.stop();  // clear any capture interrupt
+      call HplAtm128Capture.setEdge(low_to_high);
+      call HplAtm128Capture.reset();
+      call HplAtm128Capture.start();
+    }
+    return SUCCESS;
+  }
+    
+  async command error_t CapturePin.disable() {
+    call HplAtm128Capture.stop();
+    return SUCCESS;
+  }
+    
+  /**
+   * Handle signal from HplAtm128Capture interface indicating an external 
+   * event has been timestamped. 
+   * Signal client with time and disable capture timer if nolonger needed.
+   */
+  async event void HplAtm128Capture.captured(uint16_t time) {
+    // first, signal client
+    error_t val = signal CapturePin.captured(time);     
+
+    if (val == FAIL) {
+      // if client returns failure, stop time capture
+      call HplAtm128Capture.stop();
+    } else { 
+      // otherwise, time capture keeps running, reset if needed
+      if (call HplAtm128Capture.test()) 
+	call HplAtm128Capture.reset();
+    }         
+  }
+}
diff --git a/tos/chips/atm128/timer/Atm128CounterC.nc b/tos/chips/atm128/timer/Atm128CounterC.nc
new file mode 100644
index 00000000..b34fd8a9
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128CounterC.nc
@@ -0,0 +1,61 @@
+//$Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Build a TEP102 Counter from an Atmega128 hardware timer.
+ * @param frequency_tag The frequency tag for this Counter
+ * @param timer_size The width of this Counter
+ *
+ * @author Martin Turon 
+ */
+
+generic module Atm128CounterC(typedef frequency_tag,
+			      typedef timer_size @integer())
+{
+  provides interface Counter as Counter;
+  uses interface HplAtm128Timer as Timer;
+}
+implementation
+{
+  async command timer_size Counter.get()
+  {
+    return call Timer.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call Timer.test();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call Timer.reset();
+  }
+
+  async event void Timer.overflow()
+  {
+    signal Counter.overflow();
+  }
+}
+
diff --git a/tos/chips/atm128/timer/Atm128GpioCaptureC.nc b/tos/chips/atm128/timer/Atm128GpioCaptureC.nc
new file mode 100644
index 00000000..a6c37572
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128GpioCaptureC.nc
@@ -0,0 +1,69 @@
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  $Id$
+ */
+
+/**
+ * Expose capture capability as a GpioCapture interface from TEP117.
+ *
+ * @author Martin Turon, Crossbow 
+ */
+generic module Atm128GpioCaptureC() {
+
+  provides interface GpioCapture as Capture;
+  uses interface HplAtm128Capture as Atm128Capture;
+
+}
+
+implementation {
+
+  error_t enableCapture( uint8_t mode ) {
+    atomic {
+      call Atm128Capture.stop();
+      call Atm128Capture.reset();
+      call Atm128Capture.setEdge( mode );
+      call Atm128Capture.start();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Capture.captureRisingEdge() {
+    return enableCapture( TRUE );
+  }
+
+  async command error_t Capture.captureFallingEdge() {
+    return enableCapture( FALSE );
+  }
+
+  async command void Capture.disable() {
+    call Atm128Capture.stop();
+  }
+
+  async event void Atm128Capture.captured( uint16_t time ) {
+    call Atm128Capture.reset();
+    signal Capture.captured( time );
+  }
+
+}
diff --git a/tos/chips/atm128/timer/Atm128Timer.h b/tos/chips/atm128/timer/Atm128Timer.h
new file mode 100644
index 00000000..9cf0c4e9
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128Timer.h
@@ -0,0 +1,322 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/*
+ * This file contains the configuration constants for the Atmega128
+ * clocks and timers.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ * @date   September 21 2005
+ */
+
+#ifndef _H_Atm128Timer_h
+#define _H_Atm128Timer_h
+
+//====================== 8 bit Timers ==================================
+
+// Timer0 and Timer2 are 8-bit timers.
+
+/* 8-bit Timer0 clock source select bits CS02, CS01, CS0 (page 103,
+   ATmega128L data sheet Rev. 2467M-AVR-11/04 */
+enum {
+  ATM128_CLK8_OFF         = 0x0,
+  ATM128_CLK8_NORMAL      = 0x1,
+  ATM128_CLK8_DIVIDE_8    = 0x2,
+  ATM128_CLK8_DIVIDE_32   = 0x3,
+  ATM128_CLK8_DIVIDE_64   = 0x4,
+  ATM128_CLK8_DIVIDE_128  = 0x5,
+  ATM128_CLK8_DIVIDE_256  = 0x6,
+  ATM128_CLK8_DIVIDE_1024 = 0x7,
+};
+
+enum {
+  ATM128_CLK16_OFF           = 0x0,
+  ATM128_CLK16_NORMAL        = 0x1,
+  ATM128_CLK16_DIVIDE_8      = 0x2,
+  ATM128_CLK16_DIVIDE_64     = 0x3,
+  ATM128_CLK16_DIVIDE_256    = 0x4,
+  ATM128_CLK16_DIVIDE_1024   = 0x5,
+  ATM128_CLK16_EXTERNAL_FALL = 0x6,
+  ATM128_CLK16_EXTERNAL_RISE = 0x7,
+};
+
+/* Common scales across both 8-bit and 16-bit clocks. */
+enum {
+    AVR_CLOCK_OFF = 0,
+    AVR_CLOCK_ON  = 1,
+    AVR_CLOCK_DIVIDE_8 = 2,
+};
+
+/* 8-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE8_NORMAL = 0,
+    ATM128_WAVE8_PWM,
+    ATM128_WAVE8_CTC,
+    ATM128_WAVE8_PWM_FAST,
+};
+
+/* 8-bit Timer compare settings */
+enum {
+    ATM128_COMPARE_OFF = 0,  //!< compare disconnected
+    ATM128_COMPARE_TOGGLE,   //!< toggle on match (PWM reserved
+    ATM128_COMPARE_CLEAR,    //!< clear on match  (PWM downcount)
+    ATM128_COMPARE_SET,      //!< set on match    (PWN upcount)
+};
+
+/* 8-bit Timer Control Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3;  //!< Clock Source Select
+    uint8_t wgm1  : 1;  //!< Waveform generation mode (high bit)
+    uint8_t com   : 2;  //!< Compare Match Output
+    uint8_t wgm0  : 1;  //!< Waveform generation mode (low bit)
+    uint8_t foc   : 1;  //!< Force Output Compare
+  } bits;
+} Atm128TimerControl_t;
+
+typedef Atm128TimerControl_t Atm128_TCCR0_t;  //!< Timer0 Control Register
+typedef uint8_t Atm128_TCNT0_t;               //!< Timer0 Control Register
+typedef uint8_t Atm128_OCR0_t;         //!< Timer0 Output Compare Register
+
+typedef Atm128TimerControl_t Atm128_TCCR2_t;  //!< Timer2 Control Register
+typedef uint8_t Atm128_TCNT2_t;               //!< Timer2 Control Register
+typedef uint8_t Atm128_OCR2_t;         //!< Timer2 Output Compare Register
+// Timer2 shares compare lines with Timer1C
+
+/* Asynchronous Status Register -- Timer0 */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tcr0ub : 1;  //!< Timer0 Control Resgister Update Busy
+    uint8_t ocr0ub : 1;  //!< Timer0 Output Compare Register Update Busy
+    uint8_t tcn0ub : 1;  //!< Timer0 Update Busy
+    uint8_t as0    : 1;  //!< Asynchronous Timer/Counter (off=CPU,on=32KHz osc)
+    uint8_t rsvd   : 4;  //!< Reserved
+  } bits;
+} Atm128_ASSR_t;
+
+/* Timer/Counter Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t toie0 : 1; //!< Timer0 Overflow Interrupt Enable
+    uint8_t ocie0 : 1; //!< Timer0 Output Compare Interrupt Enable
+    uint8_t toie1 : 1; //!< Timer1 Overflow Interrupt Enable
+    uint8_t ocie1b: 1; //!< Timer1 Output Compare B Interrupt Enable
+    uint8_t ocie1a: 1; //!< Timer1 Output Compare A Interrupt Enable
+    uint8_t ticie1: 1; //!< Timer1 Input Capture Enable
+    uint8_t toie2 : 1; //!< Timer2 Overflow Interrupt Enable
+    uint8_t ocie2 : 1; //!< Timer2 Output Compare Interrupt Enable
+  } bits;
+} Atm128_TIMSK_t;
+// + Note: Contains some 16-bit Timer flags
+
+/* Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tov0  : 1; //!< Timer0 Overflow Flag
+    uint8_t ocf0  : 1; //!< Timer0 Output Compare Flag
+    uint8_t tov1  : 1; //!< Timer1 Overflow Flag
+    uint8_t ocf1b : 1; //!< Timer1 Output Compare B Flag
+    uint8_t ocf1a : 1; //!< Timer1 Output Compare A Flag
+    uint8_t icf1  : 1; //!< Timer1 Input Capture Flag 
+    uint8_t tov2  : 1; //!< Timer2 Overflow Flag
+    uint8_t ocf2  : 1; //!< Timer2 Output Compare Flag
+  } bits;
+} Atm128_TIFR_t;
+// + Note: Contains some 16-bit Timer flags
+
+/* Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t psr321 : 1; //!< Prescaler Reset Timer1,2,3
+    uint8_t psr0   : 1; //!< Prescaler Reset Timer0
+    uint8_t pud    : 1; //!< 
+    uint8_t acme   : 1; //!< 
+    uint8_t rsvd   : 3; //!< Reserved
+    uint8_t tsm    : 1; //!< Timer/Counter Synchronization Mode
+  } bits;
+} Atm128_SFIOR_t;
+
+
+//====================== 16 bit Timers ==================================
+
+// Timer1 and Timer3 are both 16-bit, and have three compare channels: (A,B,C)
+
+enum {
+    ATM128_TIMER_COMPARE_NORMAL = 0,
+    ATM128_TIMER_COMPARE_TOGGLE,
+    ATM128_TIMER_COMPARE_CLEAR,
+    ATM128_TIMER_COMPARE_SET
+};
+
+/* Timer/Counter Control Register A Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t wgm10 : 2;   //!< Waveform generation mode
+    uint8_t comC  : 2;   //!< Compare Match Output C
+    uint8_t comB  : 2;   //!< Compare Match Output B
+    uint8_t comA  : 2;   //!< Compare Match Output A
+  } bits;
+} Atm128TimerCtrlCompare_t;
+
+/* Timer1 Compare Control Register A */
+typedef Atm128TimerCtrlCompare_t Atm128_TCCR1A_t;
+
+/* Timer3 Compare Control Register A */
+typedef Atm128TimerCtrlCompare_t Atm128_TCCR3A_t;
+
+/* 16-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE16_NORMAL = 0,
+    ATM128_WAVE16_PWM_8BIT,
+    ATM128_WAVE16_PWM_9BIT,
+    ATM128_WAVE16_PWM_10BIT,
+    ATM128_WAVE16_CTC_COMPARE,
+    ATM128_WAVE16_PWM_FAST_8BIT,
+    ATM128_WAVE16_PWM_FAST_9BIT,
+    ATM128_WAVE16_PWM_FAST_10BIT,
+    ATM128_WAVE16_PWM_CAPTURE_LOW,
+    ATM128_WAVE16_PWM_COMPARE_LOW,
+    ATM128_WAVE16_PWM_CAPTURE_HIGH,
+    ATM128_WAVE16_PWM_COMPARE_HIGH,
+    ATM128_WAVE16_CTC_CAPTURE,
+    ATM128_WAVE16_RESERVED,
+    ATM128_WAVE16_PWM_FAST_CAPTURE,
+    ATM128_WAVE16_PWM_FAST_COMPARE,
+};
+
+/* Timer/Counter Control Register B Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3;   //!< Clock Source Select
+    uint8_t wgm32 : 2;   //!< Waveform generation mode
+    uint8_t rsvd  : 1;   //!< Reserved
+    uint8_t ices1 : 1;   //!< Input Capture Edge Select (1=rising, 0=falling)
+    uint8_t icnc1 : 1;   //!< Input Capture Noise Canceler
+  } bits;
+} Atm128TimerCtrlCapture_t;
+
+/* Timer1 Control Register B */
+typedef Atm128TimerCtrlCapture_t Atm128_TCCR1B_t;
+
+/* Timer3 Control Register B */
+typedef Atm128TimerCtrlCapture_t Atm128_TCCR3B_t;
+
+/* Timer/Counter Control Register C Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t rsvd  : 5;   //!< Reserved
+    uint8_t focC  : 1;   //!< Force Output Compare Channel C
+    uint8_t focB  : 1;   //!< Force Output Compare Channel B
+    uint8_t focA  : 1;   //!< Force Output Compare Channel A
+  } bits;
+} Atm128TimerCtrlClock_t;
+
+/* Timer1 Control Register B */
+typedef Atm128TimerCtrlClock_t Atm128_TCCR1C_t;
+
+/* Timer3 Control Register B */
+typedef Atm128TimerCtrlClock_t Atm128_TCCR3C_t;
+
+// Read/Write these 16-bit Timer registers according to p.112:
+// Access as bytes.  Read low before high.  Write high before low. 
+typedef uint8_t Atm128_TCNT1H_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT1L_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT3H_t;  //!< Timer3 Register
+typedef uint8_t Atm128_TCNT3L_t;  //!< Timer3 Register
+
+/* Contains value to continuously compare with Timer1 */
+typedef uint8_t Atm128_OCR1AH_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1AL_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1BH_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1BL_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1CH_t;  //!< Output Compare Register 1C
+typedef uint8_t Atm128_OCR1CL_t;  //!< Output Compare Register 1C
+
+/* Contains value to continuously compare with Timer3 */
+typedef uint8_t Atm128_OCR3AH_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3AL_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3BH_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3BL_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3CH_t;  //!< Output Compare Register 3C
+typedef uint8_t Atm128_OCR3CL_t;  //!< Output Compare Register 3C
+
+/* Contains counter value when event occurs on ICPn pin. */
+typedef uint8_t Atm128_ICR1H_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR1L_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR3H_t;  //!< Input Capture Register 3
+typedef uint8_t Atm128_ICR3L_t;  //!< Input Capture Register 3
+
+/* Extended Timer/Counter Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t ocie1c: 1; //!< Timer1 Output Compare C Interrupt Enable
+    uint8_t ocie3c: 1; //!< Timer3 Output Compare C Interrupt Enable
+    uint8_t toie3 : 1; //!< Timer3 Overflow Interrupt Enable
+    uint8_t ocie3b: 1; //!< Timer3 Output Compare B Interrupt Enable
+    uint8_t ocie3a: 1; //!< Timer3 Output Compare A Interrupt Enable
+    uint8_t ticie3: 1; //!< Timer3 Input Capture Interrupt Enable
+    uint8_t rsvd  : 2; //!< Timer2 Output Compare Interrupt Enable
+  } bits;
+} Atm128_ETIMSK_t;
+
+/* Extended Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t ocf1c : 1; //!< Timer1 Output Compare C Flag
+    uint8_t ocf3c : 1; //!< Timer3 Output Compare C Flag
+    uint8_t tov3  : 1; //!< Timer/Counter Overflow Flag
+    uint8_t ocf3b : 1; //!< Timer3 Output Compare B Flag
+    uint8_t ocf3a : 1; //!< Timer3 Output Compare A Flag
+    uint8_t icf3  : 1; //!< Timer3 Input Capture Flag 
+    uint8_t rsvd  : 2; //!< Reserved
+  } bits;
+} Atm128_ETIFR_t;
+
+/* Resource strings for timer 1 and 3 compare registers */
+#define UQ_TIMER1_COMPARE "atm128.timer1"
+#define UQ_TIMER3_COMPARE "atm128.timer3"
+
+#endif //_H_Atm128Timer_h
+
diff --git a/tos/chips/atm128/timer/Atm128TimerInitC.nc b/tos/chips/atm128/timer/Atm128TimerInitC.nc
new file mode 100644
index 00000000..dd309340
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128TimerInitC.nc
@@ -0,0 +1,53 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Initialise an Atmega128 timer to a particular prescaler. Expected to be
+ * used at boot time.
+ * @param timer_size Integer type of the timer
+ * @param prescaler Desired prescaler value
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+generic module Atm128TimerInitC(typedef timer_size @integer(), uint8_t prescaler)
+{
+  provides interface Init @atleastonce();
+  uses interface HplAtm128Timer as Timer;
+}
+implementation
+{
+  command error_t Init.init() {
+    atomic {
+      call Timer.set(0);
+      call Timer.start();
+      call Timer.setScale(prescaler);
+    }
+    return SUCCESS;
+  }
+
+  async event void Timer.overflow() {
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Capture.nc b/tos/chips/atm128/timer/HplAtm128Capture.nc
new file mode 100644
index 00000000..0f5992fc
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Capture.nc
@@ -0,0 +1,80 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL Interface to Atmega128 capture capabilities.
+ * @param size_type Integer type of capture register
+ *
+ * @author Martin Turon 
+ */
+interface HplAtm128Capture
+{
+  // ==== Capture value register: Direct access ======================
+  /** 
+   * Get the time to be captured.
+   * @return  the capture time
+   */
+  async command size_type get();
+
+  /** 
+   * Set the time to be captured.
+   * @param t     the time of the next capture event
+   */
+  async command void      set(size_type t);
+
+  // ==== Interrupt signals ==========================================
+  /** 
+   * Signalled on capture interrupt.
+   * @param t     the time of the capture event
+   */
+  async event void captured(size_type t);
+
+  // ==== Interrupt flag utilites: Bit level set/clr =================
+  /** Clear the capture interrupt flag. */
+  async command void reset();
+
+  /** Enable the capture interrupt. */
+  async command void start();          
+
+  /** Turn off capture interrupts. */
+  async command void stop();
+
+  /** 
+   * Did a capture interrupt occur?
+   * @return TRUE if capture triggered, FALSE otherwise
+   */
+  async command bool test();           
+
+  /** 
+   * Is capture interrupt on? 
+   * @return TRUE if capture enabled, FALSE otherwise
+   */
+  async command bool isOn();           
+
+  /** 
+   * Sets the capture edge.
+   * @param up   TRUE = detect rising edge, FALSE = detect falling edge
+   */
+  async command void setEdge(bool up);
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Compare.nc b/tos/chips/atm128/timer/HplAtm128Compare.nc
new file mode 100644
index 00000000..731531a4
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Compare.nc
@@ -0,0 +1,73 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL Interface to Atmega128 compare registers.
+ * @param size_type Integer type of compare register
+ *
+ * @author Martin Turon 
+ */
+
+interface HplAtm128Compare
+{
+  // ==== Compare value register: Direct access ======================
+  /** 
+   * Get the compare time to fire on.
+   * @return  the compare time value
+   */
+  async command size_type get();
+
+  /** 
+   * Set the compare time to fire on.
+   * @param t     the compare time to set
+   */
+  async command void set(size_type t);
+
+  // ==== Interrupt signals ==========================================
+  /** Signalled on  interrupt. */
+  async event void fired();           //
+ * This interface is designed to be independent of whether the underlying 
+ * hardware is an 8-bit or 16-bit wide counter.  As such, timer_size is 
+ * specified via a generics parameter.  Because this is exposing a common 
+ * subset of functionality that all ATmega128 hardware timers share, all 
+ * that is exposed is access to the overflow capability.  Compare and capture
+ * functionality are exposed on separate interfaces to allow easy 
+ * configurability via wiring.
+ * 
    
+ * This interface provides four major groups of functionality:
      
+ *      
    1. Timer Value: get/set current time
+ *      
    2. Overflow Interrupt event
+ *      
    3. Control of Overflow Interrupt: start/stop/clear...
+ *      
    4. Timer Initialization: turn on/off clock source
+ * 
    
+ *
+ * @author Martin Turon 
+ */
+
+interface HplAtm128Timer
+{
+  /** 
+   * Get the current time.
+   * @return  the current time
+   */
+  async command timer_size get();
+
+  /** 
+   * Set the current time.
+   * @param t     the time to set
+   */
+  async command void       set( timer_size t );
+
+  /** Signalled on timer overflow interrupt. */
+  async event void overflow();
+
+  // ==== Interrupt flag utilites: Bit level set/clr =================
+
+  /** Clear the overflow interrupt flag. */
+  async command void reset();
+
+  /** Enable the overflow interrupt. */
+  async command void start();
+
+  /** Turn off overflow interrupts. */
+  async command void stop();
+
+  /** 
+   * Did an overflow interrupt occur?
+   * @return TRUE if overflow triggered, FALSE otherwise
+   */
+  async command bool test();
+
+  /** 
+   * Is overflow interrupt on? 
+   * @return TRUE if overflow enabled, FALSE otherwise
+   */
+  async command bool isOn();
+
+  // ==== Clock initialization interface =============================
+
+  /** Turn off the clock. */
+  async command void    off();
+
+  /** 
+   * Turn on the clock.
+   * @param scale   Prescaler setting of clock -- see Atm128Timer.h
+   */
+  async command void    setScale( uint8_t scale);
+
+  /** 
+   * Get prescaler setting.
+   * @return  Prescaler setting of clock -- see Atm128Timer.h
+   */
+  async command uint8_t getScale();
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc b/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..ee180972
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,176 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 0 in ASYNC mode. This is a specialised
+ * HPL component that assumes that timer 0 is used in ASYNC mode and
+ * includes some workarounds for some of the weirdnesses (delayed overflow
+ * interrupt) of that mode.
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+#include 
+
+module HplAtm128Timer0AsyncC
+{
+  provides {
+    interface Init @atleastonce();
+    // 8-bit Timers
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare as Compare;
+  }
+}
+implementation
+{
+  bool inOverflow;
+
+  command error_t Init.init() {
+    SET_BIT(ASSR, AS0);  // set Timer/Counter0 to asynchronous mode
+    return SUCCESS;
+  }
+
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT0; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  {
+    while (ASSR & 1 << TCN0UB)
+      ;
+    TCNT0 = t;
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR0 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    while (ASSR & 1 << TCR0UB)
+      ;
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV0; }
+  async command void Timer.start() { SET_BIT(TIMSK, TOIE0); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK, TOIE0); }
+
+  bool overflowed() {
+    return (call TimerCtrl.getInterruptFlag()).bits.tov0; 
+  }
+
+  async command bool Timer.test()  { 
+    return overflowed();
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie0; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF0; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE0); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE0); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR0; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { 
+    atomic
+      {
+	while (ASSR & 1 << OCR0UB)
+	  ;
+	OCR0 = t; 
+      }
+  }
+
+  //=== Timer interrupts signals ========================================
+  void stabiliseTimer0() {
+    TCCR0 = TCCR0;
+    while (ASSR & 1 << TCR0UB)
+      ;
+  }
+
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    stabiliseTimer0();
+    __nesc_enable_interrupt();
+    signal Compare.fired();
+  }
+
+  default async event void Timer.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    stabiliseTimer0();
+    inOverflow = TRUE;
+    signal Timer.overflow();
+    inOverflow = FALSE;
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer1C.nc b/tos/chips/atm128/timer/HplAtm128Timer1C.nc
new file mode 100644
index 00000000..a0f5f2b4
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer1C.nc
@@ -0,0 +1,55 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture as Capture;
+    interface HplAtm128Compare as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer0AsyncC, HplAtm128Timer1P;
+
+  Timer = HplAtm128Timer1P;
+  TimerCtrl = HplAtm128Timer1P;
+  Capture = HplAtm128Timer1P;
+
+  Compare[0] = HplAtm128Timer1P.CompareA; 
+  Compare[1] = HplAtm128Timer1P.CompareB;
+  Compare[2] = HplAtm128Timer1P.CompareC;
+
+  HplAtm128Timer1P.Timer0Ctrl -> HplAtm128Timer0AsyncC;
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer1P.nc b/tos/chips/atm128/timer/HplAtm128Timer1P.nc
new file mode 100644
index 00000000..adaa66de
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer1P.nc
@@ -0,0 +1,214 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon 
+ */
+
+#include 
+
+module HplAtm128Timer1P
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture as Capture;
+    interface HplAtm128Compare as CompareA;
+    interface HplAtm128Compare as CompareB;
+    interface HplAtm128Compare as CompareC;
+  }
+  uses interface HplAtm128TimerCtrl8     as Timer0Ctrl;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR1B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*)&TCCR1A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*)&TCCR1B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*)&TCCR1C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR1A_t x ) { 
+    TCCR1A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR1B_t x ) { 
+    TCCR1B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR1C_t x ) { 
+    TCCR1C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR = 1 << TOV1; }
+  async command void Capture.reset()  { TIFR = 1 << ICF1; }
+  async command void CompareA.reset() { TIFR = 1 << OCF1A; }
+  async command void CompareB.reset() { TIFR = 1 << OCF1B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF1C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK,TOIE1); }
+  async command void Capture.start()  { SET_BIT(TIMSK,TICIE1); }
+  async command void CompareA.start() { SET_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.start() { SET_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE1C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK,TOIE1); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK,TICIE1); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE1C); }
+
+  // Note: Many Timer interrupt flags are on Timer0 register
+  async command bool Timer.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.tov1; 
+  }
+  async command bool Capture.test()  { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.icf1; 
+  }
+  async command bool CompareA.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1a; 
+  }
+  async command bool CompareB.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf1c; 
+  }
+
+  // Note: Many Timer interrupt mask bits are on Timer0 register
+  async command bool Timer.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie1;
+  }
+  async command bool Capture.isOn()  {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ticie1;
+  }
+  async command bool CompareA.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1a;
+  }
+  async command bool CompareB.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie1c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR1A; }
+  async command uint16_t CompareB.get() { return OCR1B; }
+  async command uint16_t CompareC.get() { return OCR1C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR1A = t; }
+  async command void CompareB.set(uint16_t t) { OCR1B = t; }
+  async command void CompareC.set(uint16_t t) { OCR1C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR1; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR1 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) {
+    signal Capture.captured(call Timer.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer2C.nc b/tos/chips/atm128/timer/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..f4bb3a5a
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer2C.nc
@@ -0,0 +1,136 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon 
+ */
+
+#include 
+
+module HplAtm128Timer2C
+{
+  provides {
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare as Compare;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT2; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  { TCNT2 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR2 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompareint, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV2; }
+  async command void Timer.start() { SET_BIT(TIMSK,TOIE2); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK,TOIE2); }
+  async command bool Timer.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov2; 
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie2; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF2; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE2); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE2); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf2; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie2; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR2; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { OCR2 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE2) {
+    signal Compare.fired();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW2) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer3C.nc b/tos/chips/atm128/timer/HplAtm128Timer3C.nc
new file mode 100644
index 00000000..e2363ef7
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer3C.nc
@@ -0,0 +1,53 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+configuration HplAtm128Timer3C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture as Capture;
+    interface HplAtm128Compare as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer3P;
+
+  Timer = HplAtm128Timer3P;
+  TimerCtrl = HplAtm128Timer3P;
+  Capture = HplAtm128Timer3P;
+
+  Compare[0] = HplAtm128Timer3P.CompareA; 
+  Compare[1] = HplAtm128Timer3P.CompareB;
+  Compare[2] = HplAtm128Timer3P.CompareC;
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer3P.nc b/tos/chips/atm128/timer/HplAtm128Timer3P.nc
new file mode 100644
index 00000000..77edfdd7
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer3P.nc
@@ -0,0 +1,208 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Internal componentr of the HPL interface to Atmega128 timer 3.
+ *
+ * @author Martin Turon 
+ */
+
+#include 
+
+module HplAtm128Timer3P
+{
+  provides {
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture as Capture;
+    interface HplAtm128Compare as CompareA;
+    interface HplAtm128Compare as CompareB;
+    interface HplAtm128Compare as CompareC;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT3; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT3 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR3B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*)&TCCR3A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*)&TCCR3B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*)&TCCR3C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR3A_t x ) { 
+    TCCR3A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR3B_t x ) { 
+    TCCR3B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR3C_t x ) { 
+    TCCR3C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B,ICES3, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { ETIFR = 1 << TOV3; }
+  async command void Capture.reset()  { ETIFR = 1 << ICF3; }
+  async command void CompareA.reset() { ETIFR = 1 << OCF3A; }
+  async command void CompareB.reset() { ETIFR = 1 << OCF3B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF3C; }
+
+  async command void Timer.start()    { SET_BIT(ETIMSK,TOIE3); }
+  async command void Capture.start()  { SET_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.start() { SET_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.start() { SET_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE3C); }
+
+  async command void Timer.stop()    { CLR_BIT(ETIMSK,TOIE3); }
+  async command void Capture.stop()  { CLR_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.stop() { CLR_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.stop() { CLR_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE3C); }
+
+  async command bool Timer.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov3; 
+  }
+  async command bool Capture.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.icf3; 
+  }
+  async command bool CompareA.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3a; 
+  }
+  async command bool CompareB.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3c; 
+  }
+
+  async command bool Timer.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.toie3;
+  }
+  async command bool Capture.isOn()  {
+    return (call TimerCtrl.getInterruptMask()).bits.ticie3;
+  }
+  async command bool CompareA.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3a;
+  }
+  async command bool CompareB.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR3A; }
+  async command uint16_t CompareB.get() { return OCR3B; }
+  async command uint16_t CompareC.get() { return OCR3C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR3A = t; }
+  async command void CompareB.set(uint16_t t) { OCR3B = t; }
+  async command void CompareC.set(uint16_t t) { OCR3C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR3; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR3 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) {
+    signal Capture.captured(call Timer.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc b/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc
new file mode 100644
index 00000000..1bea865e
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc
@@ -0,0 +1,52 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL Interface to Atmega128 16-bit timer control registers
+ *
+ * @author Martin Turon 
+ */
+
+#include 
+
+interface HplAtm128TimerCtrl16
+{
+  /// Timer control registers: Direct access
+  async command Atm128TimerCtrlCompare_t getCtrlCompare();
+  async command Atm128TimerCtrlCapture_t getCtrlCapture();
+  async command Atm128TimerCtrlClock_t   getCtrlClock();
+
+  async command void setCtrlCompare( Atm128TimerCtrlCompare_t control );
+  async command void setCtrlCapture( Atm128TimerCtrlCapture_t control );
+  async command void setCtrlClock  ( Atm128TimerCtrlClock_t   control );
+
+  /// Interrupt mask register: Direct access
+  async command Atm128_ETIMSK_t getInterruptMask();
+  async command void setInterruptMask( Atm128_ETIMSK_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command Atm128_ETIFR_t getInterruptFlag();
+  async command void setInterruptFlag( Atm128_ETIFR_t flags );
+}
+
diff --git a/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc b/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc
new file mode 100644
index 00000000..8307bf73
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc
@@ -0,0 +1,46 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * HPL Interface to Atmega128 8-bit timer control registers
+ *
+ * @author Martin Turon 
+ */
+
+#include 
+
+interface HplAtm128TimerCtrl8
+{
+  /// Timer control register: Direct access
+  async command Atm128TimerControl_t getControl();
+  async command void setControl( Atm128TimerControl_t control );
+
+  /// Interrupt mask register: Direct access
+  async command Atm128_TIMSK_t getInterruptMask();
+  async command void setInterruptMask( Atm128_TIMSK_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command Atm128_TIFR_t getInterruptFlag();
+  async command void setInterruptFlag( Atm128_TIFR_t flags );
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc b/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc
new file mode 100644
index 00000000..cae3c539
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc
@@ -0,0 +1,280 @@
+/// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Basic compare abstraction that builds on top of a counter.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+#include 
+
+generic module HplAtm128CompareC(typedef width_t @integer(),
+				 uint8_t valueRegister,
+				 uint8_t interruptRegister,
+				 uint8_t interruptBit,
+				 uint8_t flagRegister,
+				 uint8_t flagBit) 
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Compare as Compare;
+  }
+  uses {
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128TimerNotify as Notify;
+  }
+}
+implementation {
+  /* lastZero keeps track of the phase of the clock. It denotes the sim
+   * time at which the underlying clock started, which is needed to
+   * calculate when compares will occur. */
+  sim_time_t lastZero = 0;
+
+  /** This variable is needed to keep track of when the underlying
+   *  timer starts, in order to reset lastZero. When oldScale is
+   *  AVR_CLOCK_OFF and the scale is set to something else, the
+   *  clock starts ticking. */
+  uint8_t oldScale = AVR_CLOCK_OFF;
+  
+  void adjust_zero(width_t currentCounter);
+
+  void cancel_compare();
+  sim_event_t* allocate_compare();
+  void configure_compare(sim_event_t* e);
+  void schedule_new_compare();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+
+
+  async event void Notify.changed() {
+    uint8_t newScale = call Timer.getScale();
+    if (newScale != AVR_CLOCK_OFF &&
+	oldScale == AVR_CLOCK_OFF) {
+      lastZero = sim_time();
+    }
+    oldScale = newScale;
+    
+    schedule_new_compare();
+  }
+  
+  async command void Compare.reset() { REG_ACCESS(flagRegister) &= ~(1 << flagBit); }
+  async command void Compare.start() { SET_BIT(interruptRegister,interruptBit); }
+  async command void Compare.stop()  { CLR_BIT(interruptRegister,interruptBit); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command width_t Compare.get()   { return (width_t)REG_ACCESS(valueRegister); }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(width_t t)   { 
+    atomic {
+	/* Re the comment above: it's a bad idea to wake up at time 0, as
+	   we'll just spin when setting the next deadline. Try and reduce
+	   the likelihood by delaying the interrupt...
+	*/
+      if (t == 0 || t >= 0xfe)
+	t = 1;
+      
+      if (t != REG_ACCESS(valueRegister)) {
+	REG_ACCESS(valueRegister) = t;
+	schedule_new_compare();
+      }
+    }
+  }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    signal Compare.fired();
+  }
+
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then lastZero
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(width_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* compare;
+
+  void timer0_compare_handle(sim_event_t* evt) {
+    dbg("HplAtm128CompareC", "Beginning compare at 0x%p\n", evt);
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char time[128];
+      sim_print_now(time, 128);
+      dbg("HplAtm128CompareC", "Handling compare at 0x%p @ %s\n", evt, sim_time_string());
+	    
+      if (READ_BIT(interruptRegister, interruptBit)) {
+	CLR_BIT(flagRegister, flagBit);
+	dbg("HplAtm128CompareC", "Compare interrupt @ %s\n", time);
+	SIG_OUTPUT_COMPARE0();
+      }
+      else {
+	SET_BIT(flagRegister, flagBit);
+      }
+      // If we haven't been cancelled
+      if (!evt->cancelled) {
+	configure_compare(evt);
+	sim_queue_insert(evt);
+      }
+    }
+  }
+
+  sim_event_t* allocate_compare() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+    dbg("HplAtm128CompareC", "Allocated compare at 0x%p\n", newEvent);
+    newEvent->handle = timer0_compare_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_compare(sim_event_t* evt) {
+    sim_time_t compareTime = 0;
+    sim_time_t phaseOffset = 0;
+    uint8_t timerVal = call Timer.get();
+    uint8_t compareVal = call Compare.get();
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    compareTime = ((compareVal - timerVal) & 0xff);
+    if (compareTime == 0) {
+      compareTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    compareTime = compareTime << shiftFromScale();
+    compareTime = clock_to_sim(compareTime);
+    compareTime += sim_time();
+
+    // How long into a timer tick was the clock actually reset?
+    // This covers the case when the compare is set midway between
+    // a tick, so it will go off a little early
+    phaseOffset = sim_time();
+    phaseOffset -= last_zero();
+    phaseOffset %= clock_to_sim(1 << shiftFromScale());
+    compareTime -= phaseOffset;
+      
+    dbg("HplAtm128CompareC", "Configuring new compare of %i for %i at time %llu  (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time());
+    
+    evt->time = compareTime;    
+  }
+  
+  void schedule_new_compare() {
+    if (compare != NULL) {
+      cancel_compare();
+    }
+    if (call Timer.getScale() != AVR_CLOCK_OFF) {
+      sim_event_t* newEvent = allocate_compare();
+      configure_compare(newEvent);
+
+      compare = newEvent;
+      sim_queue_insert(newEvent);
+    }
+  }
+
+  void cancel_compare() {
+    dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare);
+    if (compare != NULL) {
+      compare->cancelled = 1;
+      compare->cleanup = sim_queue_cleanup_total;
+    }
+  }
+
+  async event void Timer.overflow() {}
+  
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc b/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc
new file mode 100644
index 00000000..999b79e9
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc
@@ -0,0 +1,378 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis 
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+// $Id$/// $Id: HplAtm128Timer2C.nc,
+
+#include 
+#include 
+
+module HplAtm128Counter0C {
+  provides {
+    interface Init @atleastonce();
+    // 8-bit Timers
+    interface HplAtm128Timer   as Timer0;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer0Ctrl;
+  }
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  command error_t Init.init() {
+    /* Do nothing. On a standard mote this configures Timer0 to
+     * operating in asynchronous mode off an external crystal. Here in
+     * TOSSIM it's assumed that's the case. */
+    return SUCCESS;
+  }
+    
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER0_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer0.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter0C", "HplAtm128Counter0C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer0.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer0.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer0.getScale() {
+    return TCCR0 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer0.off() {
+    call Timer0.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer0.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer0.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer0.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter0C", "Timer0 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer0.get();
+    }
+    
+    ctrl = call Timer0Ctrl.getControl();
+    ctrl.flat &= ~(0x7);
+    ctrl.flat |= (s & 0x7);
+    call Timer0Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer0Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer0.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV0);
+  }
+  async command void Timer0.start() {
+    SET_BIT(ATM128_TIMSK, TOIE0);
+    dbg("HplAtm128Counter0C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer0.stop()  {
+    dbg("HplAtm128Counter0C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE0);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV0); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer0.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer0.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie0; 
+  }
+
+  default async event void Timer0.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    inOverflow = TRUE;
+    signal Timer0.overflow();
+    inOverflow = FALSE;
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then lastZero
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer0.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer0_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      if (READ_BIT(ATM128_TIMSK, TOIE0)) {
+	CLR_BIT(ATM128_TIFR, TOV0);
+	dbg("HplAtm128Counter0C", "Overflow interrupt at %s\n", sim_time_string());
+	SIG_OVERFLOW0();
+      }
+      else {
+	dbg("HplAtm128Counter0C", "Setting overflow bit at %s\n", sim_time_string());
+	SET_BIT(ATM128_TIFR, TOV0);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer0_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter0C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter0C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc b/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc
new file mode 100644
index 00000000..4a1de55c
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc
@@ -0,0 +1,376 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis 
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+// $Id$/// $Id: HplAtm128Timer2C.nc,
+
+#include 
+#include 
+
+enum {
+  ATM128_TIMER2_TICKSPPS = (1 << 13)
+};
+
+module HplAtm128Counter2C {
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer   as Timer2;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+  }
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER2_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer2.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter2C", "HplAtm128Counter2C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer2.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer2.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer2.getScale() {
+    return TCCR2 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer2.off() {
+    call Timer2.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer2.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer2.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer2.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter2C", "Timer2 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer2.get();
+    }
+    
+    ctrl = call Timer2Ctrl.getControl();
+    ctrl.bits.cs = s;
+    call Timer2Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer2Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer2Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer2Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer2Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer2.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV2);
+  }
+  async command void Timer2.start() {
+    SET_BIT(ATM128_TIMSK, TOIE2);
+    dbg("HplAtm128Counter2C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer2.stop()  {
+    dbg("HplAtm128Counter2C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE2);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV2); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer2.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer2.isOn()  { 
+    return (call Timer2Ctrl.getInterruptMask()).bits.toie2; 
+  }
+
+  default async event void Timer2.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) {
+    inOverflow = TRUE;
+    signal Timer2.overflow();
+    inOverflow = FALSE;
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then lastZero
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer2.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer2_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char time[128];
+      sim_print_now(time, 128);
+      if (READ_BIT(ATM128_TIMSK, TOIE2)) {
+	CLR_BIT(ATM128_TIFR, TOV2);
+	dbg("HplAtm128Counter2C", "Overflow interrupt at %s\n", time);
+	SIG_OVERFLOW2();
+      }
+      else {
+	dbg("HplAtm128Counter2C", "Setting overflow bit at %s\n", time);
+	SET_BIT(ATM128_TIFR, TOV2);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer2_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer2.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter2C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter2C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..dc32120e
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,69 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis 
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+// $Id$/// $Id: HplAtm128Timer2C.nc,
+
+#include 
+
+configuration HplAtm128Timer0AsyncC
+{
+  provides {
+    interface Init @atleastonce();
+    // 8-bit Timers
+    interface HplAtm128Timer   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare as Compare;
+  }
+}
+implementation {
+  components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t,
+						 ATM128_OCR0,
+						 ATM128_TIMSK,
+						 OCIE0,
+						 ATM128_TIFR,
+						 OCF0);
+
+  Init = HplAtm128Counter0C;
+  Timer = HplAtm128Counter0C;
+  TimerCtrl = HplAtm128Counter0C;
+  Compare = HplAtm128CompareC;
+
+  HplAtm128CompareC.Timer -> HplAtm128Counter0C;
+  HplAtm128CompareC.TimerCtrl -> HplAtm128Counter0C;
+  HplAtm128CompareC.Notify -> HplAtm128Counter0C;
+  
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc b/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..58c4b9e2
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc
@@ -0,0 +1,68 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis 
+ * @author Martin Turon 
+ * @author David Gay 
+ */
+
+// $Id$/// $Id: HplAtm128Timer2C.nc,
+
+
+#include 
+
+configuration HplAtm128Timer2C
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer   as Timer2;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+    interface HplAtm128Compare as Compare2;
+  }
+}
+implementation {
+  components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t,
+						 ATM128_OCR2,
+						 ATM128_TIMSK,
+						 OCIE2,
+						 ATM128_TIFR,
+						 OCF2);
+
+  Timer2 = HplAtm128Counter2C;
+  Timer2Ctrl = HplAtm128Counter2C;
+  Compare2 = HplAtm128CompareC;
+
+  HplAtm128CompareC.Timer -> HplAtm128Counter2C;
+  HplAtm128CompareC.TimerCtrl -> HplAtm128Counter2C;
+  HplAtm128CompareC.Notify -> HplAtm128Counter2C;
+  
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc b/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc
new file mode 100644
index 00000000..59d4cec5
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc
@@ -0,0 +1,54 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM-specific timer interface needed to notify when the state
+ * of the underlying timer has changed. E.g., if a compare is built on top
+ * of the timer, but someone sets the counter register, the compare will need
+ * adjust its event timing.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis 
+ */
+
+// $Id$/// $Id: HplAtm128Timer2C.nc,
+
+
+interface HplAtm128TimerNotify {
+
+  /**
+   * Signaled whenever the state of the counter has changed. Dependent
+   * abstractions should recalculate.
+   */
+   
+  async event void changed();
+
+  /**
+   * Basic utility function so the counter itself can specify the
+   * ticks pps. */
+  
+  async command sim_time_t clockTicksPerSec();
+
+}
+
diff --git a/tos/chips/cc1000/ByteRadio.nc b/tos/chips/cc1000/ByteRadio.nc
new file mode 100644
index 00000000..d35547e9
--- /dev/null
+++ b/tos/chips/cc1000/ByteRadio.nc
@@ -0,0 +1,95 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Radio logic is split between Csma (media-access control, low-power
+ * listening and general control) and SendReceive (packet reception and
+ * transmission). This interface specifies the interaction between these
+ * two components.
+ *
+ * @author David Gay
+ */
+  
+interface ByteRadio
+{
+  /**
+   * SendReceive wants to send a packet.
+   */
+  event void rts();
+
+  /**
+   * Access to the media granted. Start sending. SendReceive must signal
+   * sendDone when transmission is complete. Note: the media-access-contro
+   * layer must have enabled listening before calling cts().
+   */
+  async command void cts();
+
+  /**
+   * Between the rts() and sendDone() events, this must return the
+   * message under transmission.
+   * @return Message being transmitted.
+   */
+  async command message_t *getTxMessage();
+
+  /**
+   * Transmission complete.
+   */
+  async event void sendDone();
+
+  /**
+   * Set message preamble length.
+   * @param bytes Preamble length in bytes
+   */
+  async command void setPreambleLength(uint16_t bytes);
+
+  /**
+   * Get message preamble length.
+   * @return Preamble length in bytes
+   */
+  async command uint16_t getPreambleLength();
+
+  /**
+   * Enable listening for incoming packets.
+   */
+  async command void listen();
+
+  /**
+   * Disable listening for incoming packets.
+   */
+  async command void off();
+
+  /**
+   * SendReceive signals this event for every radio-byte-time while
+   * listening is enabled and a message isn't being received or
+   * transmitted.
+   * @param preamble TRUE if a message preamble byte has been received
+   */
+  async event void idleByte(bool preamble);
+
+  /**
+   * Detect if SendReceive is attempting to sync with an incoming packet.
+   * During sync, idleByte events are not signaled. If sync is successful,
+   * an rx() event will be signaled, if it fails, idleByte events will
+   * resume. If syncing() returns TRUE, the last idleByte() event must
+   * have had preamble = TRUE.
+   *
+   * @return TRUE if a sync attempt is in progress, FALSE if not.
+   */
+  async command bool syncing();
+
+  /**
+   * A message is being received
+   */
+  async event void rx();
+
+  /**
+   * Message reception is complete.
+   */
+  async event void rxDone();
+}
diff --git a/tos/chips/cc1000/CC1000ActiveMessageC.nc b/tos/chips/cc1000/CC1000ActiveMessageC.nc
new file mode 100644
index 00000000..a7f4d7ab
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ActiveMessageC.nc
@@ -0,0 +1,73 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer for the CC1000 radio. This configuration
+ * just layers the AM dispatch (CC1000ActiveMessageM) on top of the
+ * underlying CC1000 radio packet (CC1000CsmaRadioC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group).
+ * 
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration CC1000ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+
+  components CC1000ActiveMessageP as AM, CC1000CsmaRadioC as Radio;
+  components ActiveMessageAddressC as Address;
+  
+  SplitControl = Radio;
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+
+  AMSend   = AM;
+  Receive  = AM.Receive;
+  Snoop    = AM.Snoop;
+  AMPacket = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.amAddress -> Address;
+  AM.Packet     -> Radio;
+}
diff --git a/tos/chips/cc1000/CC1000ActiveMessageP.nc b/tos/chips/cc1000/CC1000ActiveMessageP.nc
new file mode 100644
index 00000000..09bbe0a8
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ActiveMessageP.nc
@@ -0,0 +1,158 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implementation component for CC1000ActiveMessageC.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+module CC1000ActiveMessageP {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as Packet;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  cc1000_header_t* getHeader(message_t* amsg) {
+    return (cc1000_header_t*)(amsg->data - sizeof(cc1000_header_t));
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = id;
+    header->addr = addr;
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(amsg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->addr = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+  
+  //command am_group_t AMPacket.group(message_t* amsg) {
+  //  return amsg->header.group;
+  //}
+  
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+  
+
+}
diff --git a/tos/chips/cc1000/CC1000Const.h b/tos/chips/cc1000/CC1000Const.h
new file mode 100644
index 00000000..e2c08e46
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Const.h
@@ -0,0 +1,491 @@
+// $Id$
+
+/* -*- Mode: C; c-basic-indent: 2; indent-tabs-mode: nil -*- */ 
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/*
+ * Constants for CC1000 radio
+ *
+ * @author Phil Buonadonna
+ */
+
+#ifndef CC1000CONST_H
+#define CC1000CONST_H
+
+/* Constants defined for CC1K */
+/* Register addresses */
+
+enum {
+  CC1K_MAIN =           0x00,
+  CC1K_FREQ_2A =        0x01,
+  CC1K_FREQ_1A =        0x02,
+  CC1K_FREQ_0A =        0x03,
+  CC1K_FREQ_2B =        0x04,
+  CC1K_FREQ_1B =        0x05,
+  CC1K_FREQ_0B =        0x06,
+  CC1K_FSEP1 =          0x07,
+  CC1K_FSEP0 =          0x08,
+  CC1K_CURRENT =        0x09,
+  CC1K_FRONT_END =      0x0A, //10
+  CC1K_PA_POW =         0x0B, //11
+  CC1K_PLL =            0x0C, //12
+  CC1K_LOCK =           0x0D, //13
+  CC1K_CAL =            0x0E, //14
+  CC1K_MODEM2 =         0x0F, //15
+  CC1K_MODEM1 =         0x10, //16
+  CC1K_MODEM0 =         0x11, //17
+  CC1K_MATCH =          0x12, //18
+  CC1K_FSCTRL =         0x13, //19
+  CC1K_FSHAPE7 =        0x14, //20
+  CC1K_FSHAPE6 =        0x15, //21
+  CC1K_FSHAPE5 =        0x16, //22
+  CC1K_FSHAPE4 =        0x17, //23
+  CC1K_FSHAPE3 =        0x18, //24
+  CC1K_FSHAPE2 =        0x19, //25
+  CC1K_FSHAPE1 =        0x1A, //26
+  CC1K_FSDELAY =        0x1B, //27
+  CC1K_PRESCALER =      0x1C, //28
+  CC1K_TEST6 =          0x40, //64
+  CC1K_TEST5 =          0x41, //66
+  CC1K_TEST4 =          0x42, //67
+  CC1K_TEST3 =          0x43, //68
+  CC1K_TEST2 =          0x44, //69
+  CC1K_TEST1 =          0x45, //70
+  CC1K_TEST0 =          0x46, //71
+
+  // MAIN Register Bit Posititions
+  CC1K_RXTX =		7,
+  CC1K_F_REG =		6,
+  CC1K_RX_PD =		5,
+  CC1K_TX_PD =		4,
+  CC1K_FS_PD =		3,
+  CC1K_CORE_PD =	2,
+  CC1K_BIAS_PD =	1,
+  CC1K_RESET_N =	0,
+
+  // CURRENT Register Bit Positions
+  CC1K_VCO_CURRENT =	4,
+  CC1K_LO_DRIVE =	2,
+  CC1K_PA_DRIVE =	0,
+
+  // FRONT_END Register Bit Positions
+  CC1K_BUF_CURRENT =	5,
+  CC1K_LNA_CURRENT =	3,
+  CC1K_IF_RSSI =	1,
+  CC1K_XOSC_BYPASS =	0,
+
+  // PA_POW Register Bit Positions
+  CC1K_PA_HIGHPOWER =	4,
+  CC1K_PA_LOWPOWER =	0,
+
+  // PLL Register Bit Positions
+  CC1K_EXT_FILTER =	7,
+  CC1K_REFDIV =		3,
+  CC1K_ALARM_DISABLE =	2,
+  CC1K_ALARM_H =	1,
+  CC1K_ALARM_L =	0,
+
+  // LOCK Register Bit Positions
+  CC1K_LOCK_SELECT =		4,
+  CC1K_PLL_LOCK_ACCURACY =	3,
+  CC1K_PLL_LOCK_LENGTH =	2,
+  CC1K_LOCK_INSTANT =		1,
+  CC1K_LOCK_CONTINUOUS =	0,
+
+  // CAL Register Bit Positions
+  CC1K_CAL_START =	7,
+  CC1K_CAL_DUAL =	6,
+  CC1K_CAL_WAIT =	5,
+  CC1K_CAL_CURRENT =	4,
+  CC1K_CAL_COMPLETE =	3,
+  CC1K_CAL_ITERATE =	0,
+
+  // MODEM2 Register Bit Positions
+  CC1K_PEAKDETECT =		7,
+  CC1K_PEAK_LEVEL_OFFSET =	0,
+
+  // MODEM1 Register Bit Positions
+  CC1K_MLIMIT =		5,
+  CC1K_LOCK_AVG_IN =	4,
+  CC1K_LOCK_AVG_MODE =	3,
+  CC1K_SETTLING =	1,
+  CC1K_MODEM_RESET_N =	0,
+
+  // MODEM0 Register Bit Positions
+  CC1K_BAUDRATE =	4,
+  CC1K_DATA_FORMAT =	2,
+  CC1K_XOSC_FREQ =	0,
+
+  // MATCH Register Bit Positions
+  CC1K_RX_MATCH =	4,
+  CC1K_TX_MATCH =	0,
+
+  // FSCTLR Register Bit Positions
+  CC1K_DITHER1 =	3,
+  CC1K_DITHER0 =	2,
+  CC1K_SHAPE =		1,
+  CC1K_FS_RESET_N =	0,
+
+  // PRESCALER Register Bit Positions
+  CC1K_PRE_SWING =	6,
+  CC1K_PRE_CURRENT =	4,
+  CC1K_IF_INPUT =	3,
+  CC1K_IF_FRONT =	2,
+
+  // TEST6 Register Bit Positions
+  CC1K_LOOPFILTER_TP1 =	7,
+  CC1K_LOOPFILTER_TP2 =	6,
+  CC1K_CHP_OVERRIDE =	5,
+  CC1K_CHP_CO =		0,
+
+  // TEST5 Register Bit Positions
+  CC1K_CHP_DISABLE =	5,
+  CC1K_VCO_OVERRIDE =	4,
+  CC1K_VCO_AO =		0,
+
+  // TEST3 Register Bit Positions
+  CC1K_BREAK_LOOP =	4,
+  CC1K_CAL_DAC_OPEN =	0,
+
+
+  /* 
+   * CC1K Register Parameters Table
+   *
+   * This table follows the same format order as the CC1K register 
+   * set EXCEPT for the last entry in the table which is the 
+   * CURRENT register value for TX mode.
+   *  
+   * NOTE: To save RAM space, this table resides in program memory (flash). 
+   * This has two important implications:
+   *	1) You can't write to it (duh!)
+   *	2) You must read it using the PRG_RDB(addr) macro. IT CANNOT BE ACCESSED AS AN ORDINARY C ARRAY.  
+   * 
+   * Add/remove individual entries below to suit your RF tastes.
+   * 
+   */
+  CC1K_433_002_MHZ =	0x00,
+  CC1K_915_998_MHZ =	0x01,
+  CC1K_434_845_MHZ =    0x02,
+  CC1K_914_077_MHZ =    0x03,
+  CC1K_315_178_MHZ =    0x04,
+
+  //#define CC1K_SquelchInit        0x02F8 // 0.90V using the bandgap reference
+  CC1K_SquelchInit =        0x120,
+  CC1K_SquelchTableSize =   9,
+  CC1K_MaxRSSISamples =     5,
+  CC1K_Settling =           1,
+  CC1K_ValidPrecursor =     2,
+  CC1K_SquelchIntervalFast = 128,
+  CC1K_SquelchIntervalSlow = 2560,
+  CC1K_SquelchCount =       30,
+  CC1K_SquelchBuffer =      12,
+
+  CC1K_LPL_STATES =         9,
+
+  CC1K_LPL_PACKET_TIME =    16
+};
+
+#ifdef CC1K_DEFAULT_FREQ
+#define CC1K_DEF_PRESET (CC1K_DEFAULT_FREQ)
+#endif
+#ifdef CC1K_MANUAL_FREQ
+#define CC1K_DEF_FREQ (CC1K_MANUAL_FREQ)
+#endif
+
+#ifndef CC1K_DEF_PRESET
+#define CC1K_DEF_PRESET	(CC1K_434_845_MHZ)
+#endif 
+
+
+static const_uint8_t CC1K_LPL_PreambleLength[CC1K_LPL_STATES*2] = {
+    0, 6,       // Always on, 6 byte preamble
+    0x0, 48,    // 10ms check interval
+    0x0, 60,    // 25ms 
+    0x0, 144,   // 50ms 
+    0x1, 0x0f,  // 100ms
+    0x1, 0xf8,  // 200ms
+    0x3, 0xd9,  // 400ms
+    0x7, 0x9b,  // 800ms
+    0xf, 0x06,  // 1600ms
+};
+
+static const_uint8_t CC1K_LPL_SleepTime[CC1K_LPL_STATES*2] = {
+    0, 0,       //0
+    0x0, 10,    // 10ms
+    0x0, 25,    // 25ms
+    0x0, 50,    // 50ms
+    0x0, 100,   // 100ms
+    0x0, 200,   // 200ms
+    0x1, 0x90,  // 400ms
+    0x3, 0x20,  // 800ms
+    0x6, 0x40,  // 1600ms
+};
+
+static const_uint8_t CC1K_LPL_SleepPreamble[CC1K_LPL_STATES] = {
+    0, 
+    8,
+    8,
+    8, 
+    8,
+    8,
+    8,
+    8
+};
+
+static const_uint8_t CC1K_Params[6][20] = {
+  // (0) 433.002 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x58,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x57,0xf6,0x85,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x55,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    12 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    0 << CC1K_PEAKDETECT | 28 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+  // 1 915.9988 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00 
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x7c,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x7b,0xf9,0xae,					
+    // FSEP1, FSEP0     0x07-0x8
+    0x02,0x38,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE,
+    //0x8C,	
+    // FRONT_END  0x0a
+    1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI,
+    //0x32,
+    // PA_POW  0x0b
+    0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, 
+    //0xff,
+    // PLL  0xc
+    8 << CC1K_REFDIV,		
+    //0x40,
+    // LOCK  0xd
+    0x1 << CC1K_LOCK_SELECT,
+    //0x10,
+    // CAL  0xe
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    //0x26,
+    // MODEM2  0xf
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    //0xA1,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    //0x6f, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    //0x55,
+    // MATCH 0x12
+    0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE,
+  },
+
+  // 2 434.845200 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x51,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x50,0xf7,0x4F,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x0E,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    11 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+ 
+  // 3 914.077 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00 
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x5c,0xe0,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x5c,0xdb,0x42,					
+    // FSEP1, FSEP0     0x07-0x8
+    0x01,0xAA,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE,
+    //0x8C,	
+    // FRONT_END  0x0a
+    1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI,
+    //0x32,
+    // PA_POW  0x0b
+    0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, 
+    //0xff,
+    // PLL  0xc
+    6 << CC1K_REFDIV,		
+    //0x40,
+    // LOCK  0xd
+    0x1 << CC1K_LOCK_SELECT,
+    //0x10,
+    // CAL  0xe
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    //0x26,
+    // MODEM2  0xf
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    //0xA1,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    //0x6f, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    //0x55,
+    // MATCH 0x12
+    0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE,
+  },
+
+  // 4 315.178985 MHz channel, 38.4 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x45,0x60,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x45,0x55,0xBB,
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x9C,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 0 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    13 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 0 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+  // 5 Spare
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x58,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x57,0xf6,0x85,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x55,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 4 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    12 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N,    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+};
+
+#define UQ_CC1000_RSSI "CC1000RssiP.Rssi"
+
+#endif /* CC1000CONST_H */
diff --git a/tos/chips/cc1000/CC1000Control.nc b/tos/chips/cc1000/CC1000Control.nc
new file mode 100644
index 00000000..f52902fb
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Control.nc
@@ -0,0 +1,137 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * CC1000 internal radio control interface.
+ * @author Philip Buonadonna
+ * @aythor Jaein Jeong
+ */
+interface CC1000Control
+{
+  /**
+   * Initialise the radio to its default state.
+   */
+  command void init();
+
+  /**
+   * Tune the radio to one of the frequencies available in the CC1K_Params
+   * table.  Calling Tune will allso reset the rfpower and LockVal
+   * selections to the table values.
+   * 
+   * @param freq The index into the CC1K_Params table that holds the
+   * desired preset frequency parameters.
+   */
+  command void tunePreset(uint8_t freq); 
+
+  /**
+   * Tune the radio to a given frequency. Since the CC1000 uses a digital
+   * frequency synthesizer, it cannot tune to just an arbitrary frequency.
+   * This routine will determine the closest achievable channel, compute
+   * the necessary parameters and tune the radio.
+   * 
+   * @param The desired channel frequency, in Hz.
+   * 
+   * @return The actual computed channel frequency, in Hz.  A return value
+   * of '0' indicates that no frequency was computed and the radio was not
+   * tuned.
+   */
+  command uint32_t tuneManual(uint32_t DesiredFreq);
+
+  /**
+   * Turn the CC1000 off
+   */
+  async command void off();
+
+  /**
+   * Shift the CC1000 Radio into transmit mode.
+   */
+  async command void txMode();
+
+  /**
+   * Shift the CC1000 Radio in receive mode.
+   */
+  async command void rxMode();
+
+  /**
+   * Turn off the bias power on the CC1000 radio, but leave the core and
+   * crystal oscillator powered.  This will result in approximately a 750
+   * uA power savings.
+   */
+  async command void coreOn();			
+
+  /**
+   * Turn the bias power on. This function must be followed by a call to
+   * either rxMode() or txMode() to place the radio in a recieve/transmit
+   * state respectively. There is approximately a 200us delay when
+   * restoring bias power.
+   */
+  async command void biasOn();
+
+  /**
+   * Set the transmit RF power value.  The input value is simply an
+   * arbitrary index that is programmed into the CC1000 registers.  Consult
+   * the CC1000 datasheet for the resulting power output/current
+   * consumption values.
+   *
+   * @param power A power index between 1 and 255.
+   */
+  command void setRFPower(uint8_t power);	
+
+  /**
+   * Get the present RF power index.
+   *
+   * @return The power index value.
+   */
+  command uint8_t getRFPower();		
+
+  /** 
+   * Select the signal to monitor at the CHP_OUT pin of the CC1000.  See
+   * the CC1000 data sheet for the available signals.
+   * 
+   * @param LockVal The index of the signal to monitor at the CHP_OUT pin
+   */
+  command void selectLock(uint8_t LockVal); 
+
+  /**
+   * Get the binary value from the CHP_OUT pin.  Analog signals cannot be
+   * read using function.
+   *
+   * @return 1 - Pin is high or 0 - Pin is low
+   */
+  command uint8_t getLock();
+
+  /**
+   * Returns whether the present frequency set is using high-side LO
+   * injection or not.  This information is used to determine if the data
+   * from the CC1000 needs to be inverted or not.
+   *
+   * @return TRUE if high-side LO injection is being used (i.e. data does NOT need to be inverted
+   * at the receiver.
+   */
+  command bool getLOStatus();
+}
diff --git a/tos/chips/cc1000/CC1000ControlP.nc b/tos/chips/cc1000/CC1000ControlP.nc
new file mode 100644
index 00000000..a56b904d
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ControlP.nc
@@ -0,0 +1,385 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "CC1000Const.h"
+#include "Timer.h"
+
+/**
+ * This module provides the CONTROL functionality for the Chipcon1000
+ * series radio.  It exports a custom interface to control CC1000
+ * operation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author David Gay
+ */
+module CC1000ControlP {
+  provides {
+    interface CC1000Control;
+  }
+  uses {
+    interface HplCC1000 as CC;
+    interface BusyWait;
+  }
+}
+implementation
+{
+  uint8_t txCurrent, rxCurrent, power;
+
+  enum {
+    IF = 150000,
+    FREQ_MIN = 4194304,
+    FREQ_MAX = 16751615
+  };
+
+  const_uint32_t fRefTbl[9] = {2457600,
+			       2106514,
+			       1843200,
+			       1638400,
+			       1474560,
+			       1340509,
+			       1228800,
+			       1134277,
+			       1053257};
+  
+  const_uint16_t corTbl[9] = {1213,
+			      1416,
+			      1618,
+			      1820,
+			      2022,
+			      2224,
+			      2427,
+			      2629,
+			      2831};
+  
+  const_uint16_t fSepTbl[9] = {0x1AA,
+			       0x1F1,
+			       0x238,
+			       0x280,
+			       0x2C7,
+			       0x30E,
+			       0x355,
+			       0x39C,
+			       0x3E3};
+  
+  void calibrateNow() {
+    // start cal
+    call CC.write(CC1K_CAL,
+		  1 << CC1K_CAL_START |
+		  1 << CC1K_CAL_WAIT |
+		  6 << CC1K_CAL_ITERATE);
+    while ((call CC.read(CC1K_CAL) & 1 << CC1K_CAL_COMPLETE) == 0)
+      ;
+
+    //exit cal mode
+    call CC.write(CC1K_CAL, 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE);
+  }
+
+  void calibrate() {
+    call CC.write(CC1K_PA_POW, 0x00);  // turn off rf amp
+    call CC.write(CC1K_TEST4, 0x3f);   // chip rate >= 38.4kb
+
+    // RX - configure main freq A
+    call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N);
+
+    calibrateNow();
+
+    // TX - configure main freq B
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RXTX |
+		  1 << CC1K_F_REG |
+		  1 << CC1K_RX_PD | 
+		  1 << CC1K_RESET_N);
+    // Set TX current
+    call CC.write(CC1K_CURRENT, txCurrent);
+    call CC.write(CC1K_PA_POW, 0);
+
+    calibrateNow();
+  }
+
+  /*
+   * cc1000ComputeFreq(uint32_t desiredFreq);
+   *
+   * Compute an achievable frequency and the necessary CC1K parameters from
+   * a given desired frequency (Hz). The function returns the actual achieved
+   * channel frequency in Hz.
+   *
+   * This routine assumes the following:
+   *  - Crystal Freq: 14.7456 MHz
+   *  - LO Injection: High
+   *  - Separation: 64 KHz
+   *  - IF: 150 KHz
+   * 
+   * Approximate costs for this function:
+   *  - ~870 bytes FLASH
+   *  - ~32 bytes RAM
+   *  - 9400 cycles
+   */
+  uint32_t cc1000SetFrequency(uint32_t desiredFreq) {
+    uint32_t ActualChannel = 0;
+    uint32_t RXFreq = 0, TXFreq = 0;
+    int32_t Offset = 0x7fffffff;
+    uint16_t FSep = 0;
+    uint8_t RefDiv = 0;
+    uint8_t i, match, frontend;
+
+    for (i = 0; i < 9; i++)
+      {
+	uint32_t NRef = desiredFreq + IF;
+	uint32_t FRef = read_uint32_t(&fRefTbl[i]);
+	uint32_t Channel = 0;
+	uint32_t RXCalc = 0, TXCalc = 0;
+	int32_t  diff;
+
+	NRef = ((desiredFreq + IF)  <<  2) / FRef;
+	if (NRef & 0x1)
+	  NRef++;
+
+	if (NRef & 0x2)
+	  {
+	    RXCalc = 16384 >> 1;
+	    Channel = FRef >> 1;
+	  }
+
+	NRef >>= 2;
+
+	RXCalc += (NRef * 16384) - 8192;
+	if ((RXCalc < FREQ_MIN) || (RXCalc > FREQ_MAX)) 
+	  continue;
+    
+	TXCalc = RXCalc - read_uint16_t(&corTbl[i]);
+	if (TXCalc < FREQ_MIN || TXCalc > FREQ_MAX)
+	  continue;
+
+	Channel += NRef * FRef;
+	Channel -= IF;
+
+	diff = Channel - desiredFreq;
+	if (diff < 0)
+	  diff = -diff;
+
+	if (diff < Offset)
+	  {
+	    RXFreq = RXCalc;
+	    TXFreq = TXCalc;
+	    ActualChannel = Channel;
+	    FSep = read_uint16_t(&fSepTbl[i]);
+	    RefDiv = i + 6;
+	    Offset = diff;
+	  }
+      }
+
+    if (RefDiv != 0)
+      {
+	call CC.write(CC1K_FREQ_0A, RXFreq);
+	call CC.write(CC1K_FREQ_1A, RXFreq >> 8);
+	call CC.write(CC1K_FREQ_2A, RXFreq >> 16);
+
+	call CC.write(CC1K_FREQ_0B, TXFreq);
+	call CC.write(CC1K_FREQ_1B, TXFreq >> 8);
+	call CC.write(CC1K_FREQ_2B, TXFreq >> 16);
+
+	call CC.write(CC1K_FSEP0, FSep);
+	call CC.write(CC1K_FSEP1, FSep >> 8);
+
+	if (ActualChannel < 500000000)
+	  {
+	    if (ActualChannel < 400000000)
+	      {
+		rxCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE;
+		txCurrent = 9 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE;
+	      }
+	    else
+	      {
+		rxCurrent = 4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE;
+		txCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE;
+	      }
+	    frontend = 1 << CC1K_IF_RSSI;
+	    match = 7 << CC1K_RX_MATCH;
+	  }
+	else
+	  {
+	    rxCurrent = 8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE;
+	    txCurrent = 15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE;
+
+	    frontend =
+	      1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 
+	      1 << CC1K_IF_RSSI;
+	    match = 2 << CC1K_RX_MATCH; // datasheet says to use 1...
+	  }
+	call CC.write(CC1K_CURRENT, rxCurrent);
+	call CC.write(CC1K_MATCH, match);
+	call CC.write(CC1K_FRONT_END, frontend);
+	call CC.write(CC1K_PLL, RefDiv << CC1K_REFDIV);
+      }
+
+    return ActualChannel;
+  }
+
+  command void CC1000Control.init() {
+    call CC.init();
+
+    // wake up xtal and reset unit
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD | 1 << CC1K_BIAS_PD); 
+    // clear reset.
+    call CC1000Control.coreOn();
+    call BusyWait.wait(2000);
+
+    // Set default parameter values
+    // POWER: 0dbm (~900MHz), 6dbm (~430MHz)
+    power = 8 << CC1K_PA_HIGHPOWER | 0 << CC1K_PA_LOWPOWER;
+    call CC.write(CC1K_PA_POW, power);
+
+    // select Manchester Violation for CHP_OUT
+    call CC.write(CC1K_LOCK_SELECT, 9 << CC1K_LOCK_SELECT);
+
+    // Default modem values = 19.2 Kbps (38.4 kBaud), Manchester encoded
+    call CC.write(CC1K_MODEM2, 0);
+    call CC.write(CC1K_MODEM1, 
+		  3 << CC1K_MLIMIT |
+		  1 << CC1K_LOCK_AVG_MODE | 
+		  3 << CC1K_SETTLING |
+		  1 << CC1K_MODEM_RESET_N);
+    call CC.write(CC1K_MODEM0, 
+		  5 << CC1K_BAUDRATE |
+		  1 << CC1K_DATA_FORMAT | 
+		  1 << CC1K_XOSC_FREQ);
+
+    call CC.write(CC1K_FSCTRL, 1 << CC1K_FS_RESET_N);
+
+#ifdef CC1K_DEF_FREQ
+    call CC1000Control.tuneManual(CC1K_DEF_FREQ);
+#else
+    call CC1000Control.tunePreset(CC1K_DEF_PRESET);
+#endif
+    call CC1000Control.off();
+  }
+
+  command void CC1000Control.tunePreset(uint8_t freq) {
+    int i;
+
+    // FREQA, FREQB, FSEP, CURRENT(RX), FRONT_END, POWER, PLL
+    for (i = CC1K_FREQ_2A; i <= CC1K_PLL; i++)
+      call CC.write(i, read_uint8_t(&CC1K_Params[freq][i]));
+    call CC.write(CC1K_MATCH, read_uint8_t(&CC1K_Params[freq][CC1K_MATCH]));
+    rxCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_CURRENT]);
+    txCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_MATCH + 1]);
+    power = read_uint8_t(&CC1K_Params[freq][CC1K_PA_POW]);
+
+    calibrate();
+  }
+
+  command uint32_t CC1000Control.tuneManual(uint32_t DesiredFreq) {
+    uint32_t actualFreq;
+
+    actualFreq = cc1000SetFrequency(DesiredFreq);
+
+    calibrate();
+
+    return actualFreq;
+  }
+
+  async command void CC1000Control.txMode() {
+    // MAIN register to TX mode
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RXTX |
+		  1 << CC1K_F_REG |
+		  1 << CC1K_RX_PD | 
+		  1 << CC1K_RESET_N);
+    // Set the TX mode VCO Current
+    call CC.write(CC1K_CURRENT, txCurrent);
+    call BusyWait.wait(250);
+    call CC.write(CC1K_PA_POW, power);
+    call BusyWait.wait(20);
+  }
+
+  async command void CC1000Control.rxMode() {
+    // MAIN register to RX mode
+    // Powerup Freqency Synthesizer and Receiver
+    call CC.write(CC1K_CURRENT, rxCurrent);
+    call CC.write(CC1K_PA_POW, 0); // turn off power amp
+    call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N);
+    call BusyWait.wait(125);
+  }
+
+  async command void CC1000Control.coreOn() {
+    // MAIN register to SLEEP mode
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD |
+		  1 << CC1K_BIAS_PD |
+		  1 << CC1K_RESET_N);
+  }
+
+  async command void CC1000Control.biasOn() {
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD | 
+		  1 << CC1K_RESET_N);
+  }
+
+
+  async command void CC1000Control.off() {
+    // MAIN register to power down mode. Shut everything off
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD |
+		  1 << CC1K_CORE_PD |
+		  1 << CC1K_BIAS_PD |
+		  1 << CC1K_RESET_N);
+    call CC.write(CC1K_PA_POW, 0);  // turn off rf amp
+  }
+
+  command void CC1000Control.setRFPower(uint8_t newPower) {
+    power = newPower;
+  }
+
+  command uint8_t CC1000Control.getRFPower() {
+    return power;
+  }
+
+  command void CC1000Control.selectLock(uint8_t fn) {
+    // Select function of CHP_OUT pin (readable via getLock)
+    call CC.write(CC1K_LOCK, fn << CC1K_LOCK_SELECT);
+  }
+
+  command uint8_t CC1000Control.getLock() {
+    return call CC.getLOCK(); 
+  }
+
+  command bool CC1000Control.getLOStatus() {
+    // We use a high-side LO (local oscillator) frequency -> data will be
+    // inverted. See cc1000ComputeFreq and CC1000 datasheet p.23.
+    return TRUE;
+  }
+}
diff --git a/tos/chips/cc1000/CC1000CsmaP.nc b/tos/chips/cc1000/CC1000CsmaP.nc
new file mode 100644
index 00000000..8449652e
--- /dev/null
+++ b/tos/chips/cc1000/CC1000CsmaP.nc
@@ -0,0 +1,549 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "message.h"
+#include "crc.h"
+#include "CC1000Const.h"
+#include "Timer.h"
+
+/**
+ * A rewrite of the low-power-listening CC1000 radio stack.
+ * This file contains the CSMA and low-power listening logic. Actual
+ * packet transmission and reception is in SendReceive.
+ * 
    
+ * This code has some degree of platform-independence, via the
+ * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided
+ * by the platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ */
+  
+module CC1000CsmaP {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface CsmaControl;
+    interface CsmaBackoff;
+    interface LowPowerListening;
+  }
+  uses {
+    interface Init as ByteRadioInit;
+    interface StdControl as ByteRadioControl;
+    interface ByteRadio;
+
+    //interface PowerManagement;
+    interface CC1000Control;
+    interface CC1000Squelch;
+    interface Random;
+    interface Timer as WakeupTimer;
+    interface BusyWait;
+
+    interface ReadNow as RssiNoiseFloor;
+    interface ReadNow as RssiCheckChannel;
+    interface ReadNow as RssiPulseCheck;
+    async command void cancelRssi();
+  }
+}
+implementation 
+{
+  enum {
+    DISABLED_STATE,
+    IDLE_STATE,
+    RX_STATE,
+    TX_STATE,
+    POWERDOWN_STATE,
+    PULSECHECK_STATE
+  };
+
+  enum {
+    TIME_AFTER_CHECK =  30,
+  };
+
+  uint8_t radioState = DISABLED_STATE;
+  struct {
+    uint8_t ccaOff : 1;
+    uint8_t txPending : 1;
+  } f; // f for flags
+  uint8_t count;
+  uint8_t clearCount;
+
+  int16_t macDelay;
+
+  uint8_t lplTxPower, lplRxPower;
+  uint16_t sleepTime;
+
+  uint16_t rssiForSquelch;
+
+  task void setWakeupTask();
+
+  void enterIdleState() {
+    call cancelRssi();
+    radioState = IDLE_STATE;
+  }
+
+  void enterIdleStateSetWakeup() {
+    enterIdleState();
+    post setWakeupTask();
+  }
+
+  void enterDisabledState() {
+    call cancelRssi();
+    radioState = DISABLED_STATE;
+  }
+
+  void enterPowerDownState() {
+    call cancelRssi();
+    radioState = POWERDOWN_STATE;
+  }
+
+  void enterPulseCheckState() {
+    radioState = PULSECHECK_STATE;
+    count = 0;
+  }
+
+  void enterRxState() {
+    call cancelRssi();
+    radioState = RX_STATE;
+  }
+
+  void enterTxState() {
+    radioState = TX_STATE;
+  }
+
+  /* Basic radio power control */
+
+  void radioOn() {
+    call CC1000Control.coreOn();
+    call BusyWait.wait(2000);
+    call CC1000Control.biasOn();
+    call BusyWait.wait(200);
+    atomic call ByteRadio.listen();
+  }
+
+  void radioOff() {
+    call ByteRadio.off();
+    call CC1000Control.off();
+  }
+
+  /* LPL preamble length and sleep time computation */
+
+  void setPreambleLength() {
+    uint16_t len =
+      (uint16_t)read_uint8_t(&CC1K_LPL_PreambleLength[lplTxPower * 2]) << 8
+      | read_uint8_t(&CC1K_LPL_PreambleLength[lplTxPower * 2 + 1]);
+    call ByteRadio.setPreambleLength(len);
+  }
+
+  void setSleepTime() {
+    sleepTime =
+      (uint16_t)read_uint8_t(&CC1K_LPL_SleepTime[lplRxPower *2 ]) << 8 |
+      read_uint8_t(&CC1K_LPL_SleepTime[lplRxPower * 2 + 1]);
+  }
+
+  /* Initialisation, startup and stopping */
+  /*--------------------------------------*/
+
+  command error_t Init.init() {
+    call ByteRadioInit.init();
+    call CC1000Control.init();
+
+    return SUCCESS;
+  }
+
+  task void startStopDone() {
+    uint8_t s;
+
+    // Save a byte of RAM by sharing start/stopDone task
+    atomic s = radioState;
+    if (s == DISABLED_STATE)
+      signal SplitControl.stopDone(SUCCESS);
+    else
+      signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.start() {
+    atomic 
+      if (radioState == DISABLED_STATE)
+	{
+	  call ByteRadioControl.start();
+	  enterIdleStateSetWakeup();
+	  f.txPending = FALSE;
+	  setPreambleLength();
+	  setSleepTime();
+	}
+      else
+	return SUCCESS;
+
+    radioOn();
+
+    post startStopDone();
+
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    atomic 
+      {
+	call ByteRadioControl.stop();
+	enterDisabledState();
+	radioOff();
+      }
+    call WakeupTimer.stop();
+    post startStopDone();
+    return SUCCESS;
+  }
+
+  /* Wakeup timer */
+  /*-------------*/
+
+  /* All timer setting code is placed in setWakeup, for consistency. */
+  void setWakeup() {
+    switch (radioState)
+      {
+      case IDLE_STATE:
+	/* Timer already running means that we have a noise floor
+	   measurement scheduled. */
+	if (!call WakeupTimer.isRunning())
+	  if (call CC1000Squelch.settled())
+	    {
+	      if (lplRxPower == 0 || f.txPending)
+		call WakeupTimer.startOneShot(CC1K_SquelchIntervalSlow);
+	      else
+		// timeout for receiving a message after an lpl check
+		// indicates channel activity.
+		call WakeupTimer.startOneShot(TIME_AFTER_CHECK);
+	    }
+	  else
+	    call WakeupTimer.startOneShot(CC1K_SquelchIntervalFast);
+	break;
+      case PULSECHECK_STATE:
+	// Radio warm-up time.
+	call WakeupTimer.startOneShot(1);
+	break;
+      case POWERDOWN_STATE:
+	// low-power listening check interval
+	call WakeupTimer.startOneShot(sleepTime);
+	break;
+      }
+  }
+
+  task void setWakeupTask() {
+    atomic setWakeup();
+  }
+
+  event void WakeupTimer.fired() {
+    atomic 
+      {
+	switch (radioState)
+	  {
+	  case IDLE_STATE:
+	    /* If we appear to be receiving a packet we don't check the
+	       noise floor. For LPL, this means that going to sleep will
+	       be delayed by another TIME_AFTER_CHECK ms. */
+	    if (!call ByteRadio.syncing())
+	      {
+		call cancelRssi();
+		call RssiNoiseFloor.read();
+	      }
+	    break;
+
+	  case POWERDOWN_STATE:
+	    // Turn radio on, wait for 1ms
+	    enterPulseCheckState();
+	    call CC1000Control.biasOn();
+	    break;
+
+	  case PULSECHECK_STATE:
+	    // Switch to RX mode and get RSSI output
+	    call CC1000Control.rxMode();
+	    call RssiPulseCheck.read();
+	    call BusyWait.wait(80);
+	    return; // don't set wakeup timer
+	  }
+	setWakeup();
+      }
+  }
+
+  /* Low-power listening stuff */
+  /*---------------------------*/
+
+  /* Should we go to sleep, or turn the radio fully on? */
+  task void sleepCheck() {
+    bool turnOn = FALSE;
+
+    atomic
+      if (f.txPending)
+	{
+	  if (radioState == PULSECHECK_STATE || radioState == POWERDOWN_STATE)
+	    {
+	      enterIdleStateSetWakeup();
+	      turnOn = TRUE;
+	    }
+	}
+      else if (lplRxPower > 0 && call CC1000Squelch.settled() &&
+	       !call ByteRadio.syncing())
+	{
+	  radioOff();
+	  enterPowerDownState();
+	  setWakeup();
+	}
+
+    if (turnOn)
+      radioOn();
+  }
+
+  task void adjustSquelch();
+
+  async event void RssiPulseCheck.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* Just give up on this interval. */
+	post sleepCheck();
+	return;
+      }
+
+    /* We got some RSSI data for our LPL check. Decide whether to:
+       - go back to sleep (quiet)
+       - wake up (channel active)
+       - get more RSSI data
+    */
+    if (data > call CC1000Squelch.get() - (call CC1000Squelch.get() >> 2))
+      {
+	// don't be too agressive (ignore really quiet thresholds).
+	if (data < call CC1000Squelch.get() + (call CC1000Squelch.get() >> 3))
+	  {
+	    // adjust the noise floor level, go back to sleep.
+	    rssiForSquelch = data;
+	    post adjustSquelch();
+	  }
+	post sleepCheck();
+      }
+    else if (count++ > 5)
+      {
+	//go to the idle state since no outliers were found
+	enterIdleStateSetWakeup();
+	call ByteRadio.listen();
+      }
+    else
+      {
+	call RssiPulseCheck.read();
+	call BusyWait.wait(80);
+      }
+  }
+
+  /* CSMA */
+  /*------*/
+
+  event void ByteRadio.rts() {
+    atomic
+      {
+	f.txPending = TRUE;
+
+	if (radioState == POWERDOWN_STATE)
+	  post sleepCheck();
+	if (!f.ccaOff)
+	  macDelay = signal CsmaBackoff.initial(call ByteRadio.getTxMessage());
+	else
+	  macDelay = 1;
+      }
+  }
+
+  async event void ByteRadio.sendDone() {
+    f.txPending = FALSE;
+    enterIdleStateSetWakeup();
+  }
+
+  void congestion() {
+    macDelay = signal CsmaBackoff.congestion(call ByteRadio.getTxMessage());
+  }
+
+  async event void ByteRadio.idleByte(bool preamble) {
+    if (f.txPending)
+      {
+	if (!f.ccaOff && preamble)
+	  congestion();
+	else if (macDelay && !--macDelay)
+	  {
+	    call cancelRssi();
+	    count = 0;
+	    call RssiCheckChannel.read();
+	  }
+      }
+  }
+
+  async event void RssiCheckChannel.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* We'll retry the transmission at the next SPI event. */
+	atomic macDelay = 1;
+	return;
+      }
+
+    count++;
+    if (data > call CC1000Squelch.get() + CC1K_SquelchBuffer)
+      clearCount++;
+    else
+      clearCount = 0;
+
+    // if the channel is clear or CCA is disabled, GO GO GO!
+    if (clearCount >= 1 || f.ccaOff)
+      {
+	enterTxState();
+	call ByteRadio.cts();
+      }
+    else if (count == CC1K_MaxRSSISamples)
+      congestion();
+    else 
+      call RssiCheckChannel.read();
+  }
+
+  /* Message being received. We basically just go inactive. */
+  /*--------------------------------------------------------*/
+
+  async event void ByteRadio.rx() {
+    enterRxState();
+  }
+
+  async event void ByteRadio.rxDone() {
+    if (radioState == RX_STATE)
+      enterIdleStateSetWakeup();
+  }
+
+  /* Noise floor */
+  /*-------------*/
+
+  task void adjustSquelch() {
+    uint16_t squelchData;
+
+    atomic squelchData = rssiForSquelch;
+    call CC1000Squelch.adjust(squelchData);
+  }
+
+  async event void RssiNoiseFloor.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* We just ignore failed noise floor measurements */
+	post sleepCheck();
+	return;
+      }
+
+    rssiForSquelch = data;
+    post adjustSquelch();
+    post sleepCheck();
+  }
+
+  /* Options */
+  /*---------*/
+
+  async command error_t CsmaControl.enableCca() {
+    atomic f.ccaOff = FALSE;
+    return SUCCESS;
+  }
+
+  async command error_t CsmaControl.disableCca() {
+    atomic f.ccaOff = TRUE;
+    return SUCCESS;
+  }
+
+  async command error_t LowPowerListening.setListeningMode(uint8_t power) {
+    if (power >= CC1K_LPL_STATES)
+      return FAIL;
+
+    atomic
+      {
+	if (radioState != DISABLED_STATE)
+	  return FAIL;
+	lplTxPower = power;
+	lplRxPower = power;
+      }
+    return SUCCESS;
+  }
+
+  async command uint8_t LowPowerListening.getListeningMode() {
+    atomic return lplRxPower;
+  }
+
+  async command error_t LowPowerListening.setTransmitMode(uint8_t power) {
+    if (power >= CC1K_LPL_STATES)
+      return FAIL;
+
+    atomic
+      {
+	lplTxPower = power;
+	setPreambleLength();
+      }
+    return SUCCESS;
+  }
+
+  async command uint8_t LowPowerListening.getTransmitMode() {
+    atomic return lplTxPower;
+  }
+
+  async command error_t LowPowerListening.setPreambleLength(uint16_t bytes) {
+    call ByteRadio.setPreambleLength(bytes);
+    return SUCCESS;
+  }
+
+  async command uint16_t LowPowerListening.getPreambleLength() {
+    return call ByteRadio.getPreambleLength();
+  }
+
+  async command error_t LowPowerListening.setCheckInterval(uint16_t ms) {
+    atomic 
+      {
+	if (lplRxPower == 0)
+	  return FAIL;
+
+	sleepTime = ms;
+      }
+    return SUCCESS;
+  }
+
+  async command uint16_t LowPowerListening.getCheckInterval() {
+    atomic return sleepTime;
+  }
+
+  /* Default MAC backoff parameters */
+  /*--------------------------------*/
+
+  default async event uint16_t CsmaBackoff.initial(message_t *m) { 
+    // initially back off [1,32] bytes (approx 2/3 packet)
+    return (call Random.rand16() & 0x1F) + 1;
+  }
+
+  default async event uint16_t CsmaBackoff.congestion(message_t *m) { 
+    return (call Random.rand16() & 0xF) + 1;
+  }
+}
diff --git a/tos/chips/cc1000/CC1000CsmaRadioC.nc b/tos/chips/cc1000/CC1000CsmaRadioC.nc
new file mode 100644
index 00000000..b5a169c2
--- /dev/null
+++ b/tos/chips/cc1000/CC1000CsmaRadioC.nc
@@ -0,0 +1,113 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A low-power-listening CC1000 radio stack.
+ *
+ * Radio logic is split between Csma (media-access control, low-power
+ * listening and general control) and SendReceive (packet reception and
+ * transmission). 
+ *
+ * CC1000RssiP (RSSI sharing), CC1000SquelchP (noise-floor estimation)
+ * and CC1000ControlP (radio configuration) provide supporting roles.
+ *
+ * This code has some degree of platform-independence, via the HplCC1000,
+ * RssiAdc and HplCC1000Spi interfaces which must be provided by the
+ * platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Joe Polastre
+ * @author David Gay
+ */
+
+#include "CC1000Const.h"
+#include "message.h"
+
+configuration CC1000CsmaRadioC {
+  provides {
+    interface SplitControl;
+    interface Send;
+    interface Receive;
+
+    interface Packet;    
+    interface CsmaControl;
+    interface CsmaBackoff;
+    interface RadioTimeStamping;
+    interface PacketAcknowledgements;
+
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC1000CsmaP as Csma;
+  components CC1000SendReceiveP as SendReceive;
+  components CC1000RssiP as Rssi;
+  components CC1000SquelchP as Squelch;
+  components CC1000ControlP as Control;
+  components HplCC1000C as Hpl;
+
+  components MainC, RandomC, new TimerMilliC(), ActiveMessageAddressC, BusyWaitMicroC;
+
+  MainC.SoftwareInit -> Csma;
+  MainC.SoftwareInit -> Squelch;
+
+  SplitControl = Csma;
+  Send = SendReceive;
+  Receive = SendReceive;
+  Packet = SendReceive;
+
+  CsmaControl = Csma;
+  CsmaBackoff = Csma;
+  LowPowerListening = Csma;
+  RadioTimeStamping = SendReceive;
+  PacketAcknowledgements = SendReceive;
+
+  Csma.CC1000Control -> Control;
+  Csma.Random -> RandomC;
+  Csma.CC1000Squelch -> Squelch;
+  Csma.WakeupTimer -> TimerMilliC;
+  Csma.ByteRadio -> SendReceive;
+  Csma.ByteRadioInit -> SendReceive;
+  Csma.ByteRadioControl -> SendReceive;
+
+  SendReceive.CC1000Control -> Control;
+  SendReceive.HplCC1000Spi -> Hpl;
+  SendReceive.amAddress -> ActiveMessageAddressC;
+  SendReceive.RssiRx -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  
+  Csma.RssiNoiseFloor -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.RssiCheckChannel -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.RssiPulseCheck -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.cancelRssi -> Rssi;
+  Csma.BusyWait -> BusyWaitMicroC;
+
+  Rssi.ActualRssi -> Hpl;
+  Control.CC -> Hpl;
+  Control.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/chips/cc1000/CC1000Msg.h b/tos/chips/cc1000/CC1000Msg.h
new file mode 100644
index 00000000..282a7433
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Msg.h
@@ -0,0 +1,25 @@
+#ifndef CC1K_RADIO_MSG_H
+#define CC1K_RADIO_MSG_H
+
+#include "AM.h"
+
+typedef nx_struct CC1KHeader {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} cc1000_header_t;
+
+typedef nx_struct CC1KFooter {
+  nxle_uint16_t crc;  
+} cc1000_footer_t;
+
+typedef nx_struct CC1KMetadata {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;  
+} cc1000_metadata_t;
+
+#endif
diff --git a/tos/chips/cc1000/CC1000RssiP.nc b/tos/chips/cc1000/CC1000RssiP.nc
new file mode 100644
index 00000000..7b768d50
--- /dev/null
+++ b/tos/chips/cc1000/CC1000RssiP.nc
@@ -0,0 +1,109 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *   RSSI fun. It's used for lots of things, and a request to read it
+ *   for one purpose may have to be discarded if conditions change. For
+ *   example, if we've initiated a noise-floor measure, but start 
+ *   receiving a packet, we have to:
      
+ *   
    • cancel the noise-floor measure (we don't know if the value will
+ *     reflect the received packet or the previous idle state)
+ *   
    • start an RSSI measurement so that we can report signal strength
+ *     to the application
+ *   
    
+ *   This module hides the complexities of cancellation from the rest of
+ *   the stack.
+ */
+
+module CC1000RssiP
+{
+  provides {
+    interface ReadNow as Rssi[uint8_t reason];
+    async command void cancel();
+  }
+  uses interface Read as ActualRssi;
+}
+implementation
+{
+  enum {
+    IDLE = unique(UQ_CC1000_RSSI),
+    CANCELLED = unique(UQ_CC1000_RSSI)
+  };
+
+  /* All commands are called within atomic sections */
+  uint8_t currentOp = IDLE;
+  uint8_t nextOp;
+
+  async command void cancel() {
+    if (currentOp != IDLE)
+      currentOp = CANCELLED;
+  }
+
+  void startNextOp() {
+    if (nextOp != IDLE)
+      {
+	currentOp = nextOp;
+	nextOp = IDLE;
+	call ActualRssi.read();
+      }
+    else
+      currentOp = IDLE;
+  }
+
+  task void startOpTask() {
+    atomic startNextOp();
+  }
+
+  async command error_t Rssi.read[uint8_t reason]() {
+    if (currentOp == IDLE)
+      {
+	nextOp = reason;
+	post startOpTask();
+      }
+    else // We should only come here with currentOp = CANCELLED
+      nextOp = reason;
+    return SUCCESS;
+  }
+
+  event void ActualRssi.readDone(error_t result, uint16_t data) {
+    atomic
+      {
+	uint8_t op = currentOp;
+
+	/* The code assumes that RSSI measurements are 10-bits 
+	   (legacy effect) */
+	data >>= 6;
+	startNextOp();
+
+	signal Rssi.readDone[op](result, data);
+      }
+  }
+
+  default async event void Rssi.readDone[uint8_t reason](error_t result, uint16_t data) { }
+}
diff --git a/tos/chips/cc1000/CC1000SendReceiveP.nc b/tos/chips/cc1000/CC1000SendReceiveP.nc
new file mode 100644
index 00000000..ec2e8513
--- /dev/null
+++ b/tos/chips/cc1000/CC1000SendReceiveP.nc
@@ -0,0 +1,677 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "message.h"
+#include "crc.h"
+#include "CC1000Const.h"
+#include "Timer.h"
+
+/**
+ * A rewrite of the low-power-listening CC1000 radio stack.
+ * This file contains the send and receive logic for the CC1000 radio.
+ * It does not do any media-access control. It requests the channel
+ * via the ready-to-send event (rts) and starts transmission on reception
+ * of the clear-to-send command (cts). It listens for packets if the
+ * listen() command is called, and stops listening when off() is called.
+ * 
    
+ * This code has some degree of platform-independence, via the
+ * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided
+ * by the platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ */
+  
+module CC1000SendReceiveP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Send;
+    interface Receive;
+    interface RadioTimeStamping;
+    interface Packet;
+    interface ByteRadio;
+    interface PacketAcknowledgements;
+  }
+  uses {
+    //interface PowerManagement;
+    interface CC1000Control;
+    interface HplCC1000Spi;
+
+    interface ReadNow as RssiRx;
+    async command am_addr_t amAddress();
+  }
+}
+implementation 
+{
+  enum {
+    OFF_STATE,
+
+    INACTIVE_STATE,		/* Not listening, but will accept sends */
+
+    LISTEN_STATE,		/* Listening for packets */
+
+    /* Reception states */
+    SYNC_STATE,
+    RX_STATE,
+    RECEIVED_STATE,
+    SENDING_ACK,
+
+    /* Transmission states */
+    TXPREAMBLE_STATE,
+    TXSYNC_STATE,
+    TXDATA_STATE,
+    TXCRC_STATE,
+    TXFLUSH_STATE,
+    TXWAITFORACK_STATE,
+    TXREADACK_STATE,
+    TXDONE_STATE,
+  };
+
+  enum {
+    SYNC_BYTE1 =	0x33,
+    SYNC_BYTE2 =	0xcc,
+    SYNC_WORD =		SYNC_BYTE1 << 8 | SYNC_BYTE2,
+    ACK_BYTE1 =		0xba,
+    ACK_BYTE2 =		0x83,
+    ACK_WORD = 		ACK_BYTE1 << 8 | ACK_BYTE2,
+    ACK_LENGTH =	16,
+    MAX_ACK_WAIT =	18
+  };
+
+  uint8_t radioState;
+  struct {
+    uint8_t ack : 1; 		/* acks enabled? */
+    uint8_t txBusy : 1;		/* send pending? */
+    uint8_t invert : 1;		/* data inverted? (see cc1000 datasheet) */
+    uint8_t rxBitOffset : 3;	/* bit-offset of received bytes */
+  } f; // f for flags
+  uint16_t count;
+  uint16_t runningCrc;
+
+  uint16_t rxShiftBuf;
+  message_t rxBuf;
+  message_t *rxBufPtr = &rxBuf;
+
+  uint16_t preambleLength;
+  message_t *txBufPtr;
+  uint8_t nextTxByte;
+
+  const_uint8_t ackCode[5] = { 0xab, ACK_BYTE1, ACK_BYTE2, 0xaa, 0xaa };
+
+  /* Packet structure accessor functions. Note that everything is
+   * relative to the data field. */
+  cc1000_header_t *getHeader(message_t *amsg) {
+    return (cc1000_header_t *)(amsg->data - sizeof(cc1000_header_t));
+  }
+
+  cc1000_footer_t *getFooter(message_t *amsg) {
+    return (cc1000_footer_t *)(amsg->footer);
+  }
+  
+  cc1000_metadata_t *getMetadata(message_t *amsg) {
+    return (cc1000_metadata_t *)((uint8_t *)amsg->footer + sizeof(cc1000_footer_t));
+  }
+  
+  /* State transition functions */
+  /*----------------------------*/
+
+  void enterOffState() {
+    radioState = OFF_STATE;
+  }
+
+  void enterInactiveState() {
+    radioState = INACTIVE_STATE;
+  }
+
+  void enterListenState() {
+    radioState = LISTEN_STATE;
+    count = 0;
+  }
+
+  void enterSyncState() {
+    radioState = SYNC_STATE;
+    count = 0;
+    rxShiftBuf = 0;
+  }
+
+  void enterRxState() {
+    cc1000_header_t *header = getHeader(rxBufPtr);
+    radioState = RX_STATE;
+    header->length = sizeof rxBufPtr->data;
+    count = sizeof(message_header_t) - sizeof(cc1000_header_t);
+    runningCrc = 0;
+  }
+
+  void enterReceivedState() {
+    radioState = RECEIVED_STATE;
+  }
+
+  void enterAckState() {
+    radioState = SENDING_ACK;
+    count = 0;
+  }
+
+  void enterTxPreambleState() {
+    radioState = TXPREAMBLE_STATE;
+    count = 0;
+    runningCrc = 0;
+    nextTxByte = 0xaa;
+  }
+
+  void enterTxSyncState() {
+    radioState = TXSYNC_STATE;
+  }
+
+  void enterTxDataState() {
+    radioState = TXDATA_STATE;
+    // The count increment happens before the first byte is read from the
+    // packet, so we subtract one from the real packet start point to
+    // compensate.
+    count = (sizeof(message_header_t) - sizeof(cc1000_header_t)) -1; 
+  }
+
+  void enterTxCrcState() {
+    radioState = TXCRC_STATE;
+  }
+    
+  void enterTxFlushState() {
+    radioState = TXFLUSH_STATE;
+    count = 0;
+  }
+    
+  void enterTxWaitForAckState() {
+    radioState = TXWAITFORACK_STATE;
+    count = 0;
+  }
+    
+  void enterTxReadAckState() {
+    radioState = TXREADACK_STATE;
+    rxShiftBuf = 0;
+    count = 0;
+  }
+    
+  void enterTxDoneState() {
+    radioState = TXDONE_STATE;
+  }
+
+  command error_t Init.init() {
+    f.ack = TRUE; /* We always ack, for now at least */
+    call HplCC1000Spi.initSlave();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    atomic 
+      {
+	enterInactiveState();
+	f.txBusy = FALSE;
+	f.invert = call CC1000Control.getLOStatus();
+      }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic enterOffState();
+    return SUCCESS;
+  }
+
+  /* Send side. Outside requests, SPI handlers for each state */
+  /*----------------------------------------------------------*/
+
+  command error_t Send.send(message_t *msg, uint8_t len) {
+    atomic
+      {
+	if (f.txBusy || radioState == OFF_STATE)
+	  return FAIL;
+	else {
+	  cc1000_header_t *header = getHeader(msg);
+
+	  f.txBusy = TRUE;
+	  header->length = len;
+	  txBufPtr = msg;
+	}
+      }
+    signal ByteRadio.rts();
+
+    return SUCCESS;
+  }
+
+  async command void ByteRadio.cts() {
+    /* We're set to go! Start with our exciting preamble... */
+    enterTxPreambleState();
+    call HplCC1000Spi.writeByte(0xaa);
+    call CC1000Control.txMode();
+    call HplCC1000Spi.txMode();
+  }
+
+  command error_t Send.cancel(message_t *msg) {
+    /* We simply ignore cancellations. */
+    return FAIL;
+  }
+
+  void sendNextByte() {
+    call HplCC1000Spi.writeByte(nextTxByte);
+    count++;
+  }
+
+  void txPreamble() {
+    sendNextByte();
+    if (count >= preambleLength)
+      {
+	nextTxByte = SYNC_BYTE1;
+	enterTxSyncState();
+      }
+  }
+
+  void txSync() {
+    sendNextByte();
+    nextTxByte = SYNC_BYTE2;
+    enterTxDataState();
+    signal RadioTimeStamping.transmittedSFD(0, txBufPtr); 
+  }
+
+  void txData() {
+    cc1000_header_t *txHeader = getHeader(txBufPtr);
+    sendNextByte();
+    
+    if (count < txHeader->length + sizeof(message_header_t))
+      {
+	nextTxByte = ((uint8_t *)txBufPtr)[count];
+	runningCrc = crcByte(runningCrc, nextTxByte);
+      }
+    else
+      {
+	nextTxByte = runningCrc;
+	enterTxCrcState();
+      }
+  }
+
+  void txCrc() {
+    sendNextByte();
+    nextTxByte = runningCrc >> 8;
+    enterTxFlushState();
+  }
+
+  void txFlush() {
+    sendNextByte();
+    if (count > 3)
+      if (f.ack)
+	enterTxWaitForAckState();
+      else
+	{
+	  call HplCC1000Spi.rxMode();
+	  call CC1000Control.rxMode();
+	  enterTxDoneState();
+	}
+  }
+
+  void txWaitForAck() {
+    sendNextByte();
+    if (count == 1)
+      {
+	call HplCC1000Spi.rxMode();
+	call CC1000Control.rxMode();
+      }
+    else if (count > 3)
+      enterTxReadAckState();
+  }
+
+  void txReadAck(uint8_t in) {
+    uint8_t i;
+
+    sendNextByte();
+
+    for (i = 0; i < 8; i ++)
+      {
+	rxShiftBuf <<= 1;
+	if (in & 0x80)
+	  rxShiftBuf |=  0x1;
+	in <<= 1;
+
+	if (rxShiftBuf == ACK_WORD)
+	  {
+	    getMetadata(txBufPtr)->ack = 1;
+	    enterTxDoneState();
+	    return;
+	  }
+      }
+    if (count >= MAX_ACK_WAIT)
+      {
+	getMetadata(txBufPtr)->ack = 0;
+	enterTxDoneState();
+      }
+  }
+
+  task void signalPacketSent() {
+    message_t *pBuf;
+
+    atomic
+      {
+	pBuf = txBufPtr;
+	f.txBusy = FALSE;
+	enterListenState();
+      }
+    signal Send.sendDone(pBuf, SUCCESS);
+  }
+
+  void txDone() {
+    post signalPacketSent();
+    signal ByteRadio.sendDone();
+  }
+
+  /* Receive */
+  /*---------*/
+
+  void packetReceived();
+  void packetReceiveDone();
+
+  async command void ByteRadio.listen() {
+    enterListenState();
+    call CC1000Control.rxMode();
+    call HplCC1000Spi.rxMode();
+    call HplCC1000Spi.enableIntr();
+  }
+
+  async command void ByteRadio.off() {
+    enterInactiveState();
+    call HplCC1000Spi.disableIntr();
+  }
+
+  void listenData(uint8_t in) {
+    bool preamble = in == 0xaa || in == 0x55;
+
+    // Look for enough preamble bytes
+    if (preamble)
+      {
+	count++;
+	if (count > CC1K_ValidPrecursor)
+	  enterSyncState();
+      }
+    else
+      count = 0;
+
+    signal ByteRadio.idleByte(preamble);
+  }
+
+  void syncData(uint8_t in) {
+    // draw in the preamble bytes and look for a sync byte
+    // save the data in a short with last byte received as msbyte
+    //    and current byte received as the lsbyte.
+    // use a bit shift compare to find the byte boundary for the sync byte
+    // retain the shift value and use it to collect all of the packet data
+    // check for data inversion, and restore proper polarity 
+    // XXX-PB: Don't do this.
+
+    if (in == 0xaa || in == 0x55)
+      // It is actually possible to have the LAST BIT of the incoming
+      // data be part of the Sync Byte.  SO, we need to store that
+      // However, the next byte should definitely not have this pattern.
+      // XXX-PB: Do we need to check for excessive preamble?
+      rxShiftBuf = in << 8;
+    else if (count++ == 0)
+      rxShiftBuf |= in;
+    else if (count <= 6)
+      {
+	// TODO: Modify to be tolerant of bad bits in the preamble...
+	uint16_t tmp;
+	uint8_t i;
+
+	// bit shift the data in with previous sample to find sync
+	tmp = rxShiftBuf;
+	rxShiftBuf = rxShiftBuf << 8 | in;
+
+	for(i = 0; i < 8; i++)
+	  {
+	    tmp <<= 1;
+	    if (in & 0x80)
+	      tmp  |=  0x1;
+	    in <<= 1;
+	    // check for sync bytes
+	    if (tmp == SYNC_WORD)
+	      {
+		enterRxState();
+		signal ByteRadio.rx();
+		f.rxBitOffset = 7 - i;
+		signal RadioTimeStamping.receivedSFD(0);
+		call RssiRx.read();
+	      }
+	  }
+      }
+    else // We didn't find it after a reasonable number of tries, so....
+      enterListenState();
+  }
+  
+  async event void RssiRx.readDone(error_t result, uint16_t data) {
+    cc1000_metadata_t *rxMetadata = getMetadata(rxBufPtr);
+
+    if (result != SUCCESS)
+      rxMetadata->strength = 0;
+    else
+      rxMetadata->strength = data;
+  }
+
+  void rxData(uint8_t in) {
+    uint8_t nextByte;
+    cc1000_header_t *rxHeader = getHeader(rxBufPtr);
+
+    // rxLength is the offset into a message_t at which the packet
+    // data ends: it is NOT equal to the number of bytes received,
+    // as there may be padding in the message_t before the packet.
+    uint8_t rxLength = rxHeader->length + offsetof(message_t, data);
+
+    // Reject invalid length packets
+    if (rxLength > TOSH_DATA_LENGTH + offsetof(message_t, data))
+      {
+	// The packet's screwed up, so just dump it
+	enterListenState();
+	signal ByteRadio.rxDone();
+	return;
+      }
+
+    rxShiftBuf = rxShiftBuf << 8 | in;
+    nextByte = rxShiftBuf >> f.rxBitOffset;
+    ((uint8_t *)rxBufPtr)[count++] = nextByte;
+
+    if (count <= rxLength)
+      runningCrc = crcByte(runningCrc, nextByte);
+
+    // Jump to CRC when we reach the end of data
+    if (count == rxLength) {
+      count = offsetof(message_t, footer) + offsetof(cc1000_footer_t, crc);
+    }
+
+    if (count == (offsetof(message_t, footer) + sizeof(cc1000_footer_t)))
+      packetReceived();
+  }
+
+  void packetReceived() {
+    cc1000_footer_t *rxFooter = getFooter(rxBufPtr);
+    cc1000_header_t *rxHeader = getHeader(rxBufPtr);
+    // Packet filtering based on bad CRC's is done at higher layers.
+    // So sayeth the TOS weenies.
+    rxFooter->crc = (rxFooter->crc == runningCrc);
+
+    if (f.ack &&
+	rxFooter->crc &&
+	rxHeader->addr == call amAddress())
+      {
+	enterAckState();
+	call CC1000Control.txMode();
+	call HplCC1000Spi.txMode();
+	call HplCC1000Spi.writeByte(0xaa);
+      }
+    else
+      packetReceiveDone();
+  }
+
+  void ackData(uint8_t in) {
+    if (++count >= ACK_LENGTH)
+      { 
+	call CC1000Control.rxMode();
+	call HplCC1000Spi.rxMode();
+	packetReceiveDone();
+      }
+    else if (count >= ACK_LENGTH - sizeof ackCode)
+      call HplCC1000Spi.writeByte(read_uint8_t(&ackCode[count + sizeof ackCode - ACK_LENGTH]));
+  }
+
+  task void signalPacketReceived() {
+    message_t *pBuf;
+    cc1000_header_t *pHeader;
+    atomic
+      {
+	if (radioState != RECEIVED_STATE)
+	  return;
+
+	pBuf = rxBufPtr;
+      }
+    pHeader = getHeader(pBuf);
+    pBuf = signal Receive.receive(pBuf, pBuf->data, pHeader->length);
+    atomic
+      {
+	if (pBuf) 
+	  rxBufPtr = pBuf;
+	if (radioState == RECEIVED_STATE) // receiver might've done something
+	  enterListenState();
+	signal ByteRadio.rxDone();
+      }
+  }
+
+  void packetReceiveDone() {
+    post signalPacketReceived();
+    enterReceivedState();
+  }
+
+  async event void HplCC1000Spi.dataReady(uint8_t data) {
+    if (f.invert)
+      data = ~data;
+
+    switch (radioState)
+      {
+      default: break;
+      case TXPREAMBLE_STATE: txPreamble(); break;
+      case TXSYNC_STATE: txSync(); break;
+      case TXDATA_STATE: txData(); break;
+      case TXCRC_STATE: txCrc(); break;
+      case TXFLUSH_STATE: txFlush(); break;
+      case TXWAITFORACK_STATE: txWaitForAck(); break;
+      case TXREADACK_STATE: txReadAck(data); break;
+      case TXDONE_STATE: txDone(); break;
+
+      case LISTEN_STATE: listenData(data); break;
+      case SYNC_STATE: syncData(data); break;
+      case RX_STATE: rxData(data); break;
+      case SENDING_ACK: ackData(data); break;
+      }
+  }
+
+  /* Interaction with rest of stack */
+  /*--------------------------------*/
+
+  async command void ByteRadio.setPreambleLength(uint16_t bytes) {
+    atomic preambleLength = bytes;
+  }
+
+  async command uint16_t ByteRadio.getPreambleLength() {
+    atomic return preambleLength;
+  }
+
+  async command message_t *ByteRadio.getTxMessage() {
+    return txBufPtr;
+  }
+
+  async command bool ByteRadio.syncing() {
+    return radioState == SYNC_STATE;
+  }
+
+  /* Abstract packet layout */
+
+  command void Packet.clear(message_t *msg) {
+    memset(msg, 0, sizeof(message_t));
+  }
+
+  command uint8_t Packet.payloadLength(message_t *msg) {
+    cc1000_header_t *header = getHeader(msg);
+    return header->length;
+  }
+ 
+  command void Packet.setPayloadLength(message_t *msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  command void* Packet.getPayload(message_t *msg, uint8_t *len) {
+    if (len != NULL) {
+      cc1000_header_t *header = getHeader(msg);
+
+      *len = header->length;
+    }
+    return (void*)msg->data;
+  }
+
+  async command error_t PacketAcknowledgements.requestAck(message_t *msg) {
+    return SUCCESS;		/* We always ack. */
+  }
+
+  async command error_t PacketAcknowledgements.noAck(message_t *msg) {
+    return FAIL;		/* We always ack */
+  }
+
+  command void* Receive.getPayload(message_t *m, uint8_t *len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength(message_t *m) {
+    return call Packet.payloadLength(m);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t *m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  async command bool PacketAcknowledgements.wasAcked(message_t *msg) {
+    return getMetadata(msg)->ack;
+  }
+  // Default events for radio send/receive coordinators do nothing.
+  // Be very careful using these, or you'll break the stack.
+  default async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t *msgBuff) { }
+  default async event void RadioTimeStamping.receivedSFD(uint16_t time) { }
+}
diff --git a/tos/chips/cc1000/CC1000Squelch.nc b/tos/chips/cc1000/CC1000Squelch.nc
new file mode 100644
index 00000000..1c02293d
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Squelch.nc
@@ -0,0 +1,54 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * CC1000 internal noise floor (aka squelch value) interface
+ * @author David Gay
+ */
+interface CC1000Squelch
+{
+  /**
+   * Adjust noise floor based on new noise measurement
+   * @param data noise measurement
+   */
+  command void adjust(uint16_t data);
+
+  /**
+   * Return current estimated noise floor
+   * @return Noise floor value
+   */
+  async command uint16_t get();
+
+  /**
+   * Check if noise floor estimate is considered stable (typically after
+   * some number of measurements)
+   * @return TRUE if noise floor estimate considered stable, FALSE otherwise
+   */
+  command bool settled();
+}
diff --git a/tos/chips/cc1000/CC1000SquelchP.nc b/tos/chips/cc1000/CC1000SquelchP.nc
new file mode 100644
index 00000000..5a31cde3
--- /dev/null
+++ b/tos/chips/cc1000/CC1000SquelchP.nc
@@ -0,0 +1,98 @@
+/* $Id$
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "CC1000Const.h"
+
+/**
+ * Clear threshold estimation based on RSSI measurements.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ */
+  
+module CC1000SquelchP
+{
+  provides {
+    interface Init;
+    interface CC1000Squelch;
+  }
+}
+implementation
+{
+  uint16_t clearThreshold = CC1K_SquelchInit;
+  uint16_t squelchTable[CC1K_SquelchTableSize];
+  uint8_t squelchIndex, squelchCount;
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i < CC1K_SquelchTableSize; i++)
+      squelchTable[i] = CC1K_SquelchInit;
+
+    return SUCCESS;
+  }
+
+  command void CC1000Squelch.adjust(uint16_t data) {
+    uint16_t squelchTab[CC1K_SquelchTableSize];
+    uint8_t i, j, min; 
+    uint32_t newThreshold;
+
+    squelchTable[squelchIndex++] = data;
+    if (squelchIndex >= CC1K_SquelchTableSize)
+      squelchIndex = 0;
+    if (squelchCount <= CC1K_SquelchCount)
+      squelchCount++;  
+
+    // Find 3rd highest (aka lowest signal strength) value
+    memcpy(squelchTab, squelchTable, sizeof squelchTable);
+    for (j = 0; ; j++)
+      {
+	min = 0;
+	for (i = 1; i < CC1K_SquelchTableSize; i++)
+	  if (squelchTab[i] > squelchTab[min])
+	    min = i;
+	if (j == 3)
+	  break;
+	squelchTab[min] = 0;
+      }
+
+    newThreshold = ((uint32_t)clearThreshold << 5) +
+      ((uint32_t)squelchTab[min] << 1);
+    atomic clearThreshold = newThreshold / 34;
+  }
+
+  async command uint16_t CC1000Squelch.get() {
+    return clearThreshold;
+  }
+
+  command bool CC1000Squelch.settled() {
+    return squelchCount > CC1K_SquelchCount;
+  }
+}
diff --git a/tos/chips/cc1000/CsmaControl.nc b/tos/chips/cc1000/CsmaControl.nc
new file mode 100644
index 00000000..ff2b594c
--- /dev/null
+++ b/tos/chips/cc1000/CsmaControl.nc
@@ -0,0 +1,41 @@
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/**
+ * Interface for activating/deactivating congestion control.
+ *
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   August 31 2005
+ */
+interface CsmaControl {
+  /**
+   * Enable congestion control.
+   * @return SUCCESS if congestion control enabled, FAIL otherwise.
+   */
+  async command error_t enableCca();
+
+  /**
+   * Disable congestion control.
+   * @return SUCCESS if congestion control disabled, FAIL otherwise.
+   */
+  async command error_t disableCca();
+}
diff --git a/tos/chips/cc1000/HplCC1000.nc b/tos/chips/cc1000/HplCC1000.nc
new file mode 100644
index 00000000..f4da4aa9
--- /dev/null
+++ b/tos/chips/cc1000/HplCC1000.nc
@@ -0,0 +1,73 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * Authors:		Jason Hill, David Gay, Philip Levis
+ * Date last modified:  6/25/02
+ *
+ *
+ */
+
+/**
+ * Low-level CC1000 radio-access operations that must be provided by a
+ * platform wishing to use this CC1000 implementation.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+
+interface HplCC1000 {
+  /**
+   * Initialize CC1K pins
+   */
+  command void init();
+
+  /**
+   * Write a value to a CC1000 register.
+   * @param addr Which CC1000 register
+   * @param data Value to write
+   */
+  async command void write(uint8_t addr, uint8_t data);
+
+  /**
+   * Read a value from a CC1000 register.
+   * @param addr Which CC1000 register
+   * @return Value of register
+   */
+  async command uint8_t read(uint8_t addr);
+
+  /**
+   * Read the state of the CHP_OUT pin
+   * @return State of CHP_OUT as a boolean (TRUE for high)
+   */
+  async command bool getLOCK();
+}
diff --git a/tos/chips/cc1000/HplCC1000Spi.nc b/tos/chips/cc1000/HplCC1000Spi.nc
new file mode 100644
index 00000000..5d6126b2
--- /dev/null
+++ b/tos/chips/cc1000/HplCC1000Spi.nc
@@ -0,0 +1,93 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Interface to the CC1000 chip's serial bus. This isn't really an SPI,
+ * but the mica2 interface was done using the Atmega128 SPI hardware. Hence
+ * the name.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ */
+interface HplCC1000Spi
+{
+  /**
+   * Write a byte to the CC1000 bus.
+   * @param data Byte to write.
+   */
+  async command void writeByte(uint8_t data);
+
+  /**
+   * Is write buffer busy with the last transmission?
+   * @return TRUE if the buffer is busy, FALSE otherwise.
+   */
+  async command bool isBufBusy();
+
+  /**
+   * Get the last byte received from the CC1000 bus.
+   * @return Last byte received.
+   */
+  async command uint8_t readByte();
+
+  /**
+   * Enable dataReady events on every byte sent or received from the CC1000
+   * bus. After this is called, dataReady events will be signaled every
+   * 8 CC1000 data clocks.
+   */
+  async command void enableIntr();
+
+  /**
+   * Disable CC1000 bus interrupts.
+   */
+  async command void disableIntr();
+
+  /**
+   * Initialise the interface to the CC1000 bus.
+   */
+  async command void initSlave();
+
+  /**
+   * Switch the interface to the CC1000 bus "transmit" mode.
+   */
+  async command void txMode();
+
+  /**
+   * Switch the interface to the CC1000 bus to "receive" mode.
+   */
+  async command void rxMode();
+
+  /**
+   * If enableIntr() is called, this event will be signaled every 8 CC1000
+   * data clocks. 
+   * @param data In "receive" mode, the last value received from the CC1000 
+   *   bus.
+   */
+  async event void dataReady(uint8_t data);
+}
diff --git a/tos/chips/cc1000/LowPowerListening.nc b/tos/chips/cc1000/LowPowerListening.nc
new file mode 100644
index 00000000..600ebb68
--- /dev/null
+++ b/tos/chips/cc1000/LowPowerListening.nc
@@ -0,0 +1,109 @@
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/**
+ * Low Power Listening control interface
+ *
+ * @author Joe Polastre
+ */
+interface LowPowerListening
+{
+  /**
+   * Set the current Low Power Listening mode.
+   * Setting the LPL mode sets both the check interval and preamble length.
+   * The listening mode can only be set while the radio is stopped.
+   *
+   * Modes include:
+   *  0 = Radio fully on
+   *  1 = 10ms check interval
+   *  2 = 25ms check interval
+   *  3 = 50ms check interval
+   *  4 = 100ms check interval (recommended)
+   *  5 = 200ms check interval
+   *  6 = 400ms check interval
+   *  7 = 800ms check interval
+   *  8 = 1600ms check interval
+   *
+   * @param mode the mode number
+   * @return SUCCESS if the mode was successfully changed, FAIL otherwise
+   */
+  async command error_t setListeningMode(uint8_t mode);
+
+  /**
+   * Get the current Low Power Listening mode
+   * @return mode number (see SetListeningMode)
+   */
+  async command uint8_t getListeningMode();
+
+  /**
+   * Set the transmit mode.  This allows for hybrid schemes where
+   * the transmit mode is different than the receive mode.
+   * Use SetListeningMode first, then change the mode with SetTransmitMode.
+   *
+   * @param mode mode number (see SetListeningMode)
+   * @return SUCCESS if the mode was successfully changed, FAIL otherwise
+   */
+  async command error_t setTransmitMode(uint8_t mode);
+
+  /**
+   * Get the current Low Power Listening transmit mode
+   * @return mode number (see SetListeningMode)
+   */
+  async command uint8_t getTransmitMode();
+
+  /**
+   * Set the preamble length of outgoing packets. Note that this overrides
+   * the value set by setListeningMode or setTransmitMode.
+   *
+   * @param bytes length of the preamble in bytes
+   * @return SUCCESS if the preamble length was successfully changed, FAIL
+   *   otherwise
+   */
+  async command error_t setPreambleLength(uint16_t bytes);
+
+  /**
+   * Get the preamble length of outgoing packets
+   *
+   * @return length of the preamble in bytes
+   */
+  async command uint16_t getPreambleLength();
+
+  /**
+   * Set the check interval (time between waking up and sampling
+   * the radio for activity in low power listening). The sleep time
+   * can only be changed if low-power-listening is enabled 
+   * (setListeningMode called with a non-zero value).
+   *
+   * @param ms check interval in milliseconds
+   * @return SUCCESS if the check interval was successfully changed,
+   *   FAIL otherwise.
+   */
+  async command error_t setCheckInterval(uint16_t ms);
+
+  /**
+   * Get the check interval currently used by low power listening
+   *
+   * @return length of the check interval in milliseconds
+   */
+  async command uint16_t getCheckInterval();
+}
diff --git a/tos/chips/cc2420/AlarmMultiplexC.nc b/tos/chips/cc2420/AlarmMultiplexC.nc
new file mode 100644
index 00000000..a63a9253
--- /dev/null
+++ b/tos/chips/cc2420/AlarmMultiplexC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * A component that multiplexes the use of an alarm. The assumption is
+ * that its use is mutually exclusive and users check whether the
+ * events are for them.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+
+configuration AlarmMultiplexC {
+
+  provides interface Init;
+  provides interface Alarm as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new HplCC2420AlarmC() as Alarm;
+
+  Init = Alarm;
+  Alarm32khz32 = Alarm;
+
+}
diff --git a/tos/chips/cc2420/CC2420.h b/tos/chips/cc2420/CC2420.h
new file mode 100644
index 00000000..788b700c
--- /dev/null
+++ b/tos/chips/cc2420/CC2420.h
@@ -0,0 +1,319 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef __CC2420_H__
+#define __CC2420_H__
+
+//#include "message.h"
+
+typedef uint8_t cc2420_status_t;
+
+typedef nx_struct cc2420_header_t {
+  nxle_uint8_t length;
+  nxle_uint16_t fcf;
+  nxle_uint8_t dsn;
+  nxle_uint16_t destpan;
+  nxle_uint16_t dest;
+  nxle_uint16_t src;
+  nxle_uint8_t type;
+} cc2420_header_t;
+
+typedef nx_struct cc2420_footer_t {
+} cc2420_footer_t;
+
+typedef nx_struct cc2420_metadata_t {
+  nx_uint8_t tx_power;
+  nx_uint8_t rssi;
+  nx_uint8_t lqi;
+  nx_bool crc;
+  nx_bool ack;
+  nx_uint16_t time;
+} cc2420_metadata_t;
+
+typedef nx_struct cc2420_packet_t {
+  cc2420_header_t packet;
+  nx_uint8_t data[];
+} cc2420_packet_t;
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+#ifndef CC2420_DEF_CHANNEL
+#define CC2420_DEF_CHANNEL 26
+#endif
+
+#ifndef CC2420_DEF_RFPOWER
+#define CC2420_DEF_RFPOWER 31
+#endif
+
+enum {
+  // size of the header not including the length byte
+  MAC_HEADER_SIZE = sizeof( cc2420_header_t ) - 1,
+  // size of the footer (FCS field)
+  MAC_FOOTER_SIZE = sizeof( uint16_t ),
+  // MDU
+  MAC_PACKET_SIZE = MAC_HEADER_SIZE + TOSH_DATA_LENGTH + MAC_FOOTER_SIZE,
+};
+
+enum cc2420_enums {
+  CC2420_TIME_ACK_TURNAROUND = 7, // jiffies
+  CC2420_TIME_VREN = 20,          // jiffies
+  CC2420_TIME_SYMBOL = 2,         // 2 symbols / jiffy
+  CC2420_BACKOFF_PERIOD = ( 20 / CC2420_TIME_SYMBOL ), // symbols
+  CC2420_ACK_WAIT_DELAY = 128,    // jiffies
+};
+
+enum cc2420_status_enums {
+  CC2420_STATUS_RSSI_VALID = 1 << 1,
+  CC2420_STATUS_LOCK = 1 << 2,
+  CC2420_STATUS_TX_ACTIVE = 1 << 3,
+  CC2420_STATUS_ENC_BUSY = 1 << 4,
+  CC2420_STATUS_TX_UNDERFLOW = 1 << 5,
+  CC2420_STATUS_XOSC16M_STABLE = 1 << 6,
+};
+
+enum cc2420_config_reg_enums {
+  CC2420_SNOP = 0x00,
+  CC2420_SXOSCON = 0x01,
+  CC2420_STXCAL = 0x02,
+  CC2420_SRXON = 0x03,
+  CC2420_STXON = 0x04,
+  CC2420_STXONCCA = 0x05,
+  CC2420_SRFOFF = 0x06,
+  CC2420_SXOSCOFF = 0x07,
+  CC2420_SFLUSHRX = 0x08,
+  CC2420_SFLUSHTX = 0x09,
+  CC2420_SACK = 0x0a,
+  CC2420_SACKPEND = 0x0b,
+  CC2420_SRXDEC = 0x0c,
+  CC2420_SRXENC = 0x0d,
+  CC2420_SAES = 0x0e,
+  CC2420_MAIN = 0x10,
+  CC2420_MDMCTRL0 = 0x11,
+  CC2420_MDMCTRL1 = 0x12,
+  CC2420_RSSI = 0x13,
+  CC2420_SYNCWORD = 0x14,
+  CC2420_TXCTRL = 0x15,
+  CC2420_RXCTRL0 = 0x16,
+  CC2420_RXCTRL1 = 0x17,
+  CC2420_FSCTRL = 0x18,
+  CC2420_SECCTRL0 = 0x19,
+  CC2420_SECCTRL1 = 0x1a,
+  CC2420_BATTMON = 0x1b,
+  CC2420_IOCFG0 = 0x1c,
+  CC2420_IOCFG1 = 0x1d,
+  CC2420_MANFIDL = 0x1e,
+  CC2420_MANFIDH = 0x1f,
+  CC2420_FSMTC = 0x20,
+  CC2420_MANAND = 0x21,
+  CC2420_MANOR = 0x22,
+  CC2420_AGCCTRL = 0x23,
+  CC2420_AGCTST0 = 0x24,
+  CC2420_AGCTST1 = 0x25,
+  CC2420_AGCTST2 = 0x26,
+  CC2420_FSTST0 = 0x27,
+  CC2420_FSTST1 = 0x28,
+  CC2420_FSTST2 = 0x29,
+  CC2420_FSTST3 = 0x2a,
+  CC2420_RXBPFTST = 0x2b,
+  CC2420_FMSTATE = 0x2c,
+  CC2420_ADCTST = 0x2d,
+  CC2420_DACTST = 0x2e,
+  CC2420_TOPTST = 0x2f,
+  CC2420_TXFIFO = 0x3e,
+  CC2420_RXFIFO = 0x3f,
+};
+
+enum cc2420_ram_addr_enums {
+  CC2420_RAM_TXFIFO = 0x000,
+  CC2420_RAM_RXFIFO = 0x080,
+  CC2420_RAM_KEY0 = 0x100,
+  CC2420_RAM_RXNONCE = 0x110,
+  CC2420_RAM_SABUF = 0x120,
+  CC2420_RAM_KEY1 = 0x130,
+  CC2420_RAM_TXNONCE = 0x140,
+  CC2420_RAM_CBCSTATE = 0x150,
+  CC2420_RAM_IEEEADR = 0x160,
+  CC2420_RAM_PANID = 0x168,
+  CC2420_RAM_SHORTADR = 0x16a,
+};
+
+enum cc2420_nonce_enums {
+  CC2420_NONCE_BLOCK_COUNTER = 0,
+  CC2420_NONCE_KEY_SEQ_COUNTER = 2,
+  CC2420_NONCE_FRAME_COUNTER = 3,
+  CC2420_NONCE_SOURCE_ADDRESS = 7,
+  CC2420_NONCE_FLAGS = 15,
+};
+
+enum cc2420_main_enums {
+  CC2420_MAIN_RESETn = 15,
+  CC2420_MAIN_ENC_RESETn = 14,
+  CC2420_MAIN_DEMOD_RESETn = 13,
+  CC2420_MAIN_MOD_RESETn = 12,
+  CC2420_MAIN_FS_RESETn = 11,
+  CC2420_MAIN_XOSC16M_BYPASS = 0,
+};
+
+enum cc2420_mdmctrl0_enums {
+  CC2420_MDMCTRL0_RESERVED_FRAME_MODE = 13,
+  CC2420_MDMCTRL0_PAN_COORDINATOR = 12,
+  CC2420_MDMCTRL0_ADR_DECODE = 11,
+  CC2420_MDMCTRL0_CCA_HYST = 8,
+  CC2420_MDMCTRL0_CCA_MOD = 6,
+  CC2420_MDMCTRL0_AUTOCRC = 5,
+  CC2420_MDMCTRL0_AUTOACK = 4,
+  CC2420_MDMCTRL0_PREAMBLE_LENGTH = 0,
+};
+
+enum cc2420_mdmctrl1_enums {
+  CC2420_MDMCTRL1_CORR_THR = 6,
+  CC2420_MDMCTRL1_DEMOD_AVG_MODE = 5,
+  CC2420_MDMCTRL1_MODULATION_MODE = 4,
+  CC2420_MDMCTRL1_TX_MODE = 2,
+  CC2420_MDMCTRL1_RX_MODE = 0,
+};
+
+enum cc2420_rssi_enums {
+  CC2420_RSSI_CCA_THR = 8,
+  CC2420_RSSI_RSSI_VAL = 0,
+};
+
+enum cc2420_syncword_enums {
+  CC2420_SYNCWORD_SYNCWORD = 0,
+};
+
+enum cc2420_txctrl_enums {
+  CC2420_TXCTRL_TXMIXBUF_CUR = 14,
+  CC2420_TXCTRL_TX_TURNAROUND = 13,
+  CC2420_TXCTRL_TXMIX_CAP_ARRAY = 11,
+  CC2420_TXCTRL_TXMIX_CURRENT = 9,
+  CC2420_TXCTRL_PA_CURRENT = 6,
+  CC2420_TXCTRL_RESERVED = 5,
+  CC2420_TXCTRL_PA_LEVEL = 0,
+};
+
+enum cc2420_rxctrl0_enums {
+  CC2420_RXCTRL0_RXMIXBUF_CUR = 12,
+  CC2420_RXCTRL0_HIGH_LNA_GAIN = 10,
+  CC2420_RXCTRL0_MED_LNA_GAIN = 8,
+  CC2420_RXCTRL0_LOW_LNA_GAIN = 6,
+  CC2420_RXCTRL0_HIGH_LNA_CURRENT = 4,
+  CC2420_RXCTRL0_MED_LNA_CURRENT = 2,
+  CC2420_RXCTRL0_LOW_LNA_CURRENT = 0,
+};
+
+enum cc2420_rxctrl1_enums {
+  CC2420_RXCTRL1_RXBPF_LOCUR = 13,
+  CC2420_RXCTRL1_RXBPF_MIDCUR = 12,
+  CC2420_RXCTRL1_LOW_LOWGAIN = 11,
+  CC2420_RXCTRL1_MED_LOWGAIN = 10,
+  CC2420_RXCTRL1_HIGH_HGM = 9,
+  CC2420_RXCTRL1_MED_HGM = 8,
+  CC2420_RXCTRL1_LNA_CAP_ARRAY = 6,
+  CC2420_RXCTRL1_RXMIX_TAIL = 4,
+  CC2420_RXCTRL1_RXMIX_VCM = 2,
+  CC2420_RXCTRL1_RXMIX_CURRENT = 0,
+};
+
+enum cc2420_rsctrl_enums {
+  CC2420_FSCTRL_LOCK_THR = 14,
+  CC2420_FSCTRL_CAL_DONE = 13,
+  CC2420_FSCTRL_CAL_RUNNING = 12,
+  CC2420_FSCTRL_LOCK_LENGTH = 11,
+  CC2420_FSCTRL_LOCK_STATUS = 10,
+  CC2420_FSCTRL_FREQ = 0,
+};
+
+enum cc2420_secctrl0_enums {
+  CC2420_SECCTRL0_RXFIFO_PROTECTION = 9,
+  CC2420_SECCTRL0_SEC_CBC_HEAD = 8,
+  CC2420_SECCTRL0_SEC_SAKEYSEL = 7,
+  CC2420_SECCTRL0_SEC_TXKEYSEL = 6,
+  CC2420_SECCTRL0_SEC_RXKEYSEL = 5,
+  CC2420_SECCTRL0_SEC_M = 2,
+  CC2420_SECCTRL0_SEC_MODE = 0,
+};
+
+enum cc2420_secctrl1_enums {
+  CC2420_SECCTRL1_SEC_TXL = 8,
+  CC2420_SECCTRL1_SEC_RXL = 0,
+};
+
+enum cc2420_battmon_enums {
+  CC2420_BATTMON_BATT_OK = 6,
+  CC2420_BATTMON_BATTMON_EN = 5,
+  CC2420_BATTMON_BATTMON_VOLTAGE = 0,
+};
+
+enum cc2420_iocfg0_enums {
+  CC2420_IOCFG0_BCN_ACCEPT = 11,
+  CC2420_IOCFG0_FIFO_POLARITY = 10,
+  CC2420_IOCFG0_FIFOP_POLARITY = 9,
+  CC2420_IOCFG0_SFD_POLARITY = 8,
+  CC2420_IOCFG0_CCA_POLARITY = 7,
+  CC2420_IOCFG0_FIFOP_THR = 0,
+};
+
+enum cc2420_iocfg1_enums {
+  CC2420_IOCFG1_HSSD_SRC = 10,
+  CC2420_IOCFG1_SFDMUX = 5,
+  CC2420_IOCFG1_CCAMUX = 0,
+};
+
+enum cc2420_manfidl_enums {
+  CC2420_MANFIDL_PARTNUM = 12,
+  CC2420_MANFIDL_MANFID = 0,
+};
+
+enum cc2420_manfidh_enums {
+  CC2420_MANFIDH_VERSION = 12,
+  CC2420_MANFIDH_PARTNUM = 0,
+};
+
+enum cc2420_fsmtc_enums {
+  CC2420_FSMTC_TC_RXCHAIN2RX = 13,
+  CC2420_FSMTC_TC_SWITCH2TX = 10,
+  CC2420_FSMTC_TC_PAON2TX = 6,
+  CC2420_FSMTC_TC_TXEND2SWITCH = 3,
+  CC2420_FSMTC_TC_TXEND2PAOFF = 0,
+};
+
+enum cc2420_sfdmux_enums {
+  CC2420_SFDMUX_SFD = 0,
+  CC2420_SFDMUX_XOSC16M_STABLE = 24,
+};
+
+#endif
diff --git a/tos/chips/cc2420/CC2420ActiveMessageC.nc b/tos/chips/cc2420/CC2420ActiveMessageC.nc
new file mode 100644
index 00000000..ef78e86e
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ActiveMessageC.nc
@@ -0,0 +1,74 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The Active Message layer for the CC2420 radio. This configuration
+ * just layers the AM dispatch (CC2420ActiveMessageM) on top of the
+ * underlying CC2420 radio packet (CC2420CsmaRadioC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group). Note that snooping may not work, due to CC2420
+ * early packet rejection if acknowledgements are enabled.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+
+configuration CC2420ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface CC2420Packet;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+
+  components CC2420ActiveMessageP as AM;
+  components CC2420CsmaC as Radio;
+  components ActiveMessageAddressC as Address;
+  
+  SplitControl = Radio;
+  Packet       = AM;
+
+  AMSend   = AM;
+  Receive  = AM.Receive;
+  Snoop    = AM.Snoop;
+  AMPacket = AM;
+  
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.amAddress -> Address;
+  Radio.AMPacket -> AM;
+
+  components CC2420PacketC;
+  CC2420Packet = CC2420PacketC;
+  PacketAcknowledgements = CC2420PacketC;
+
+
+}
diff --git a/tos/chips/cc2420/CC2420ActiveMessageP.nc b/tos/chips/cc2420/CC2420ActiveMessageP.nc
new file mode 100644
index 00000000..d261e20b
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ActiveMessageP.nc
@@ -0,0 +1,183 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+
+/**
+ * Active message implementation on top of the CC2420 radio. This
+ * implementation uses the 16-bit addressing mode of 802.15.4: the
+ * only additional byte it adds is the AM id byte, as the first byte
+ * of the data payload.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+module CC2420ActiveMessageP {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  enum {
+    CC2420_SIZE = MAC_HEADER_SIZE + MAC_FOOTER_SIZE,
+  };
+  
+  cc2420_header_t* getHeader( message_t* msg ) {
+    return (cc2420_header_t*)( msg->data - sizeof(cc2420_header_t) );
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* msg,
+					  uint8_t len) {
+    cc2420_header_t* header = getHeader( msg );
+    header->type = id;
+    header->dest = addr;
+    header->destpan = TOS_AM_GROUP;
+
+    return call SubSend.send( msg, len + CC2420_SIZE );
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len - CC2420_SIZE);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len - CC2420_SIZE);
+    }
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc2420_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc2420_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  //command void AMPacket.setDestination(am_addr_t dest, message_t* amsg){
+  //  cc2420_header_t* header = getHeader(amsg);
+  //  header->dest = dest;
+  //}
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc2420_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc2420_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+ 
+ command void Packet.clear(message_t* msg) {}
+ 
+ command uint8_t Packet.payloadLength(message_t* msg) {
+   return getHeader(msg)->length - CC2420_SIZE;
+ }
+
+
+ command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+   getHeader(msg)->length  = len + CC2420_SIZE;
+ }
+
+ command uint8_t Packet.maxPayloadLength() {
+   return TOSH_DATA_LENGTH;
+ }
+ 
+ command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+   if (len != NULL) {
+     *len = call Packet.payloadLength(msg);
+   }
+   return msg->data;
+ }
+
+
+}
diff --git a/tos/chips/cc2420/CC2420Config.nc b/tos/chips/cc2420/CC2420Config.nc
new file mode 100644
index 00000000..2d935888
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Config.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio configurations. All get() and set()
+ * commands are single-phase. After setting some values, a call to
+ * sync() is required for the changes to propagate to the cc2420
+ * hardware chip. This interface allows setting multiple parameters
+ * before calling sync().
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Config {
+
+  /**
+   * Sync configuration changes with the radio hardware. This only
+   * applies to set commands below.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  command error_t sync();
+  event void syncDone( error_t error );
+
+  /**
+   * Change the channel of the radio.
+   */
+  command uint8_t getChannel();
+  command void setChannel( uint8_t channel );
+
+  /**
+   * Change the short address of the radio.
+   */
+  command uint16_t getShortAddr();
+  command void setShortAddr( uint16_t address );
+
+  /**
+   * Change the PAN address of the radio.
+   */
+  command uint16_t getPanAddr();
+  command void setPanAddr( uint16_t address );
+
+}
diff --git a/tos/chips/cc2420/CC2420ControlC.nc b/tos/chips/cc2420/CC2420ControlC.nc
new file mode 100644
index 00000000..a453770e
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ControlC.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation for configuring a ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration CC2420ControlC {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+
+  uses interface AMPacket;
+
+}
+
+implementation {
+  
+  components CC2420ControlP;
+  Init = CC2420ControlP;
+  Resource = CC2420ControlP;
+  CC2420Config = CC2420ControlP;
+  CC2420Power = CC2420ControlP;
+  AMPacket = CC2420ControlP;
+
+  components AlarmMultiplexC as Alarm;
+  CC2420ControlP.StartupTimer -> Alarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420ControlP.CSN -> Pins.CSN;
+  CC2420ControlP.RSTN -> Pins.RSTN;
+  CC2420ControlP.VREN -> Pins.VREN;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA;
+
+  components new CC2420SpiC() as Spi;
+  CC2420ControlP.SpiResource -> Spi;
+  CC2420ControlP.SRXON -> Spi.SRXON;
+  CC2420ControlP.SRFOFF -> Spi.SRFOFF;
+  CC2420ControlP.SXOSCON -> Spi.SXOSCON;
+  CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF;
+  CC2420ControlP.FSCTRL -> Spi.FSCTRL;
+  CC2420ControlP.IOCFG0 -> Spi.IOCFG0;
+  CC2420ControlP.IOCFG1 -> Spi.IOCFG1;
+  CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0;
+  CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1;
+  CC2420ControlP.PANID -> Spi.PANID;
+
+  components new CC2420SpiC() as SyncSpiC;
+  CC2420ControlP.SyncResource -> SyncSpiC;
+
+  components LedsC as Leds;
+  CC2420ControlP.Leds -> Leds;
+
+}
+
diff --git a/tos/chips/cc2420/CC2420ControlP.nc b/tos/chips/cc2420/CC2420ControlP.nc
new file mode 100644
index 00000000..bb0803f3
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ControlP.nc
@@ -0,0 +1,285 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Timer.h"
+
+module CC2420ControlP {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+
+  uses interface Alarm as StartupTimer;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as RSTN;
+  uses interface GeneralIO as VREN;
+  uses interface GpioInterrupt as InterruptCCA;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Ram as PANID;
+  uses interface CC2420Register as FSCTRL;
+  uses interface CC2420Register as IOCFG0;
+  uses interface CC2420Register as IOCFG1;
+  uses interface CC2420Register as MDMCTRL0;
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SRFOFF;
+  uses interface CC2420Strobe as SXOSCOFF;
+  uses interface CC2420Strobe as SXOSCON;
+  uses interface AMPacket;
+
+  uses interface Resource as SyncResource;
+
+  uses interface Leds;
+
+}
+
+implementation {
+
+  typedef enum {
+    S_VREG_STOPPED,
+    S_VREG_STARTING,
+    S_VREG_STARTED,
+    S_XOSC_STARTING,
+    S_XOSC_STARTED,
+  } cc2420_control_state_t;
+
+  uint8_t m_channel = CC2420_DEF_CHANNEL;
+  uint8_t m_tx_power = CC2420_DEF_RFPOWER;
+  uint16_t m_pan = TOS_AM_GROUP;
+  uint16_t m_short_addr;
+  bool m_sync_busy;
+  task void syncDone_task();
+
+  norace cc2420_control_state_t m_state = S_VREG_STOPPED;
+
+  command error_t Init.init() {
+    call CSN.makeOutput();
+    call RSTN.makeOutput();
+    call VREN.makeOutput();
+    m_short_addr = call AMPacket.address();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error == SUCCESS )
+      call CSN.clr();
+    return error;
+  }
+
+  async command error_t Resource.request() {
+    return call SpiResource.request();
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  async command void Resource.release() {
+    atomic {
+      call CSN.set();
+      call SpiResource.release();
+    }
+  }
+
+  event void SpiResource.granted() {
+    call CSN.clr();
+    signal Resource.granted();
+  }
+
+  async command error_t CC2420Power.startVReg() {
+    atomic {
+      if ( m_state != S_VREG_STOPPED )
+	return FAIL;
+      m_state = S_VREG_STARTING;
+    }
+    call VREN.set();
+    call StartupTimer.start( CC2420_TIME_VREN );
+    return SUCCESS;
+  }
+
+  async event void StartupTimer.fired() {
+    if ( m_state == S_VREG_STARTING ) {
+      m_state = S_VREG_STARTED;
+      call RSTN.clr();
+      call RSTN.set();
+      signal CC2420Power.startVRegDone();
+    }
+  }
+
+  async command error_t CC2420Power.stopVReg() {
+    m_state = S_VREG_STOPPED;
+    call RSTN.clr();
+    call VREN.clr();
+    call RSTN.set();
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.startOscillator() {
+    atomic {
+      if ( m_state != S_VREG_STARTED )
+	return FAIL;
+	
+      m_state = S_XOSC_STARTING;
+      call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << 
+			 CC2420_IOCFG1_CCAMUX );
+      call InterruptCCA.enableRisingEdge();
+      call SXOSCON.strobe();
+      call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) |
+			 ( 127 << CC2420_IOCFG0_FIFOP_THR ) );
+      call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+			 ( ( (m_channel - 11)*5+357 ) 
+			   << CC2420_FSCTRL_FREQ ) );
+      call MDMCTRL0.write( ( 1 << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) |
+			   ( 1 << CC2420_MDMCTRL0_ADR_DECODE ) |
+			   ( 2 << CC2420_MDMCTRL0_CCA_HYST ) |
+			   ( 3 << CC2420_MDMCTRL0_CCA_MOD ) |
+			   ( 1 << CC2420_MDMCTRL0_AUTOCRC ) |
+			   ( 1 << CC2420_MDMCTRL0_AUTOACK ) |
+			   ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) );
+    }
+    return SUCCESS;
+  }
+
+  async event void InterruptCCA.fired() {
+    nxle_uint16_t id[ 2 ];
+    m_state = S_XOSC_STARTED;
+    id[ 0 ] = m_pan;
+    id[ 1 ] = m_short_addr;
+    call InterruptCCA.disable();
+    call IOCFG1.write( 0 );
+    call PANID.write( 0, (uint8_t*)&id, 4 );
+    call CSN.set();
+    call CSN.clr();
+    signal CC2420Power.startOscillatorDone();
+  }
+
+  async command error_t CC2420Power.stopOscillator() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED )
+	return FAIL;
+      m_state = S_VREG_STARTED;
+      call SXOSCOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rxOn() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED )
+	return FAIL;
+      call SRXON.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rfOff() {
+    atomic {  
+      if ( m_state != S_XOSC_STARTED )
+	return FAIL;
+      call SRFOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  command uint8_t CC2420Config.getChannel() {
+    atomic return m_channel;
+  }
+
+  command void CC2420Config.setChannel( uint8_t channel ) {
+    atomic m_channel = channel;
+  }
+
+  command uint16_t CC2420Config.getShortAddr() {
+    atomic return m_short_addr;
+  }
+
+  command void CC2420Config.setShortAddr( uint16_t addr ) {
+    atomic m_short_addr = addr;
+  }
+
+  command uint16_t CC2420Config.getPanAddr() {
+    return m_pan;
+  }
+
+  command void CC2420Config.setPanAddr( uint16_t pan ) {
+    atomic m_pan = pan;
+  }
+
+  command error_t CC2420Config.sync() {
+    atomic {
+      if ( m_sync_busy )
+        return FAIL;
+      m_sync_busy = TRUE;
+      if ( m_state == S_XOSC_STARTED )
+        call SyncResource.request();
+      else
+        post syncDone_task();
+    }
+    return SUCCESS;
+  }
+
+  event void SyncResource.granted() {
+
+    nxle_uint16_t id[ 2 ];
+    uint8_t channel;
+
+    atomic {
+      channel = m_channel;
+      id[ 0 ] = m_pan;
+      id[ 1 ] = m_short_addr;
+    }
+
+    call CSN.clr();
+    call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+		       ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) );
+    call PANID.write( 0, (uint8_t*)id, sizeof( id ) );
+    call CSN.set();
+    
+    post syncDone_task();
+    
+  }
+
+  task void syncDone_task() {
+    atomic m_sync_busy = FALSE;
+    signal CC2420Config.syncDone( SUCCESS );
+  }
+
+  default event void CC2420Config.syncDone( error_t error ) {}
+
+}
diff --git a/tos/chips/cc2420/CC2420CsmaC.nc b/tos/chips/cc2420/CC2420CsmaC.nc
new file mode 100644
index 00000000..34620ba8
--- /dev/null
+++ b/tos/chips/cc2420/CC2420CsmaC.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Basic implementation of a CSMA MAC for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration CC2420CsmaC {
+
+  provides interface SplitControl;
+
+  provides interface Send;
+  provides interface Receive;
+
+  uses interface AMPacket;
+
+}
+
+implementation {
+
+  components CC2420CsmaP as CsmaP;
+
+  SplitControl = CsmaP;
+  Send = CsmaP;
+  AMPacket = CsmaP;
+
+  components CC2420ControlC;
+  AMPacket = CC2420ControlC;
+  CsmaP.Resource -> CC2420ControlC;
+  CsmaP.CC2420Power -> CC2420ControlC;
+
+  components CC2420TransmitC;
+
+  CsmaP.SubControl -> CC2420TransmitC;
+  CsmaP.CC2420Transmit -> CC2420TransmitC;
+  CsmaP.CsmaBackoff -> CC2420TransmitC;
+
+  components CC2420ReceiveC;
+  Receive = CC2420ReceiveC;
+  CsmaP.SubControl -> CC2420ReceiveC;
+
+  components RandomC;
+  CsmaP.Random -> RandomC;
+
+  components LedsC as Leds;
+  CsmaP.Leds -> Leds;
+
+  components MainC;
+  MainC.SoftwareInit -> CsmaP;
+  MainC.SoftwareInit -> CC2420ControlC;
+  MainC.SoftwareInit -> CC2420TransmitC;
+  MainC.SoftwareInit -> CC2420ReceiveC;
+}
diff --git a/tos/chips/cc2420/CC2420CsmaP.nc b/tos/chips/cc2420/CC2420CsmaP.nc
new file mode 100644
index 00000000..1bef0633
--- /dev/null
+++ b/tos/chips/cc2420/CC2420CsmaP.nc
@@ -0,0 +1,212 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module CC2420CsmaP {
+
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface Send;
+
+  uses interface Resource;
+  uses interface CC2420Power;
+  uses interface AsyncStdControl as SubControl;
+  uses interface CC2420Transmit;
+  uses interface CsmaBackoff;
+  uses interface Random;
+  uses interface AMPacket;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    S_PREINIT,
+    S_STOPPED,
+    S_STARTING,
+    S_STARTED,
+    S_STOPPING,
+    S_TRANSMIT,
+  };
+
+  message_t* m_msg;
+  uint8_t m_state = S_PREINIT;
+  uint8_t m_dsn;
+  error_t sendErr = SUCCESS;
+  
+  task void startDone_task();
+  task void stopDone_task();
+  task void sendDone_task();
+
+  cc2420_header_t* getHeader( message_t* msg ) {
+    return (cc2420_header_t*)( msg->data - sizeof( cc2420_header_t ) );
+  }
+
+  cc2420_metadata_t* getMetadata( message_t* msg ) {
+    return (cc2420_metadata_t*)msg->metadata;
+  }
+
+  command error_t Init.init() {
+    
+    if ( m_state != S_PREINIT )
+      return FAIL;
+
+    m_state = S_STOPPED;
+
+    return SUCCESS;
+
+  }
+
+  command error_t SplitControl.start() {
+
+    if ( m_state != S_STOPPED ) 
+      return FAIL;
+
+    m_state = S_STARTING;
+
+    m_dsn = call Random.rand16();
+    call CC2420Power.startVReg();
+
+    return SUCCESS;
+
+  }
+
+  async event void CC2420Power.startVRegDone() {
+    call Resource.request();
+  }
+
+  event void Resource.granted() {
+    call CC2420Power.startOscillator();
+  }
+
+  async event void CC2420Power.startOscillatorDone() {
+    call SubControl.start();
+    call CC2420Power.rxOn();
+    call Resource.release();
+    post startDone_task();
+  }
+
+  task void startDone_task() {
+    m_state = S_STARTED;
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+
+    if ( m_state != S_STARTED )
+      return FAIL;
+
+    m_state = S_STOPPING;
+
+    call SubControl.stop();
+    call CC2420Power.stopVReg();
+    post stopDone_task();
+
+    return SUCCESS;
+
+  }
+
+  task void stopDone_task() {
+    m_state = S_STOPPED;
+    signal SplitControl.stopDone( SUCCESS );
+  }
+
+  command error_t Send.cancel( message_t* p_msg ) {
+    return FAIL;
+  }
+
+  command error_t Send.send( message_t* p_msg, uint8_t len ) {
+    
+    cc2420_header_t* header = getHeader( p_msg );
+    cc2420_metadata_t* metadata = getMetadata( p_msg );
+
+    atomic {
+      if ( m_state != S_STARTED )
+        return FAIL;
+      m_state = S_TRANSMIT;
+      m_msg = p_msg;
+      header->dsn = ++m_dsn;
+    }
+
+    header->length = len;
+    header->fcf = ( ( IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE ) |
+                    ( 1 << IEEE154_FCF_INTRAPAN ) |
+                    ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) |
+                    ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) );
+    if ( header->dest != AM_BROADCAST_ADDR )
+      header->fcf |= 1 << IEEE154_FCF_ACK_REQ;
+    header->src = call AMPacket.address();
+    metadata->ack = FALSE;
+    metadata->rssi = 0;
+    metadata->lqi = 0;
+    metadata->time = 0;
+
+    call CC2420Transmit.sendCCA( m_msg );
+
+    return SUCCESS;
+
+  }
+
+  command void* Send.getPayload(message_t* m) {
+    return m->data;
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  async event uint16_t CsmaBackoff.initial( message_t* m ) {
+    return ( call Random.rand16() & 0x1f ) + 1;
+  }
+
+  async event uint16_t CsmaBackoff.congestion( message_t* m ) {
+    return ( call Random.rand16() & 0x7 ) + 1;
+  }
+
+  async event void CC2420Transmit.sendDone( message_t* p_msg, error_t err ) {
+    atomic sendErr = err;
+    post sendDone_task();
+  }
+
+  task void sendDone_task() {
+    error_t packetErr;
+    atomic packetErr = sendErr;
+    m_state = S_STARTED;
+    signal Send.sendDone( m_msg, packetErr );
+  }
+
+}
+
diff --git a/tos/chips/cc2420/CC2420Fifo.nc b/tos/chips/cc2420/CC2420Fifo.nc
new file mode 100644
index 00000000..115a0d39
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Fifo.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL abstraction for accessing the FIFO registers of a ChipCon
+ * CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Fifo {
+
+  /**
+   * Start reading from the FIFO. The readDone event will
+   * be signalled upon completion.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t beginRead( uint8_t* data, uint8_t length );
+
+  /**
+   * Continue reading from the FIFO without having to send the address
+   * byte again. The readDone event will be signalled
+   * upon completion.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return SUCCESS always.
+   */
+  async command error_t continueRead( uint8_t* data, uint8_t length );
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes read.
+   * @param error notification of how the operation went
+   */
+  async event void readDone( uint8_t* data, uint8_t length, error_t error );
+
+  /**
+   * Start writing the FIFO. The writeDone event will be
+   * signalled upon completion.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes to write.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t write( uint8_t* data, uint8_t length );
+
+  /**
+   * Signals the completion of a write operation.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes written.
+   * @param error notification of how the operation went
+   */
+  async event void writeDone( uint8_t* data, uint8_t length, error_t error );
+
+}
diff --git a/tos/chips/cc2420/CC2420Packet.nc b/tos/chips/cc2420/CC2420Packet.nc
new file mode 100644
index 00000000..009faa62
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Packet.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Packet {
+  
+  /**
+   * Get transmission power setting for current packet.
+   *
+   * @param the message
+   */
+  async command uint8_t getPower( message_t* p_msg );
+
+  /**
+   * Set transmission power for a given packet. Valid ranges are
+   * between 0 and 31.
+   *
+   * @param p_msg the message.
+   * @param power transmission power.
+   */
+  async command void setPower( message_t* p_msg, uint8_t power );
+  
+  /**
+   * Get rssi value for a given packet. For received packets, it is
+   * the received signal strength when receiving that packet. For sent
+   * packets, it is the received signal strength of the ack if an ack
+   * was received.
+   */
+  async command int8_t getRssi( message_t* p_msg );
+
+  /**
+   * Get lqi value for a given packet. For received packets, it is the
+   * link quality indicator value when receiving that packet. For sent
+   * packets, it is the link quality indicator value of the ack if an
+   * ack was received.
+   */
+  async command uint8_t getLqi( message_t* p_msg );
+  
+}
diff --git a/tos/chips/cc2420/CC2420PacketC.nc b/tos/chips/cc2420/CC2420PacketC.nc
new file mode 100644
index 00000000..ab991682
--- /dev/null
+++ b/tos/chips/cc2420/CC2420PacketC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module CC2420PacketC {
+
+  provides interface CC2420Packet;
+  provides interface PacketAcknowledgements as Acks;
+
+}
+
+implementation {
+
+  cc2420_header_t* getHeader( message_t* msg ) {
+    return (cc2420_header_t*)( msg->data - sizeof( cc2420_header_t ) );
+  }
+
+  cc2420_metadata_t* getMetadata( message_t* msg ) {
+    return (cc2420_metadata_t*)msg->metadata;
+  }
+
+  async command error_t Acks.requestAck( message_t* p_msg ) {
+    getHeader( p_msg )->fcf |= 1 << IEEE154_FCF_ACK_REQ;
+    return SUCCESS;
+  }
+
+  async command error_t Acks.noAck( message_t* p_msg ) {
+    getHeader( p_msg )->fcf &= ~(1 << IEEE154_FCF_ACK_REQ);
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked( message_t* p_msg ) {
+    return getMetadata( p_msg )->ack;
+  }
+
+  async command void CC2420Packet.setPower( message_t* p_msg, uint8_t power ) {
+    if ( power > 31 )
+      power = 31;
+    getMetadata( p_msg )->tx_power = power;
+  }
+
+  async command uint8_t CC2420Packet.getPower( message_t* p_msg ) {
+    return getMetadata( p_msg )->tx_power;
+  }
+   
+  async command int8_t CC2420Packet.getRssi( message_t* p_msg ) {
+    return getMetadata( p_msg )->rssi;
+  }
+
+  async command error_t CC2420Packet.getLqi( message_t* p_msg ) {
+    return getMetadata( p_msg )->lqi;
+  }
+
+}
diff --git a/tos/chips/cc2420/CC2420Power.nc b/tos/chips/cc2420/CC2420Power.nc
new file mode 100644
index 00000000..74012e5b
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Power.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio power operations (e.g. voltage
+ * regulator, oscillator, etc). However, it does not include
+ * transmission power, see the CC2420Config interface.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Power {
+
+  /**
+   * Start the voltage regulator on the CC2420. On SUCCESS,
+   * startVReg() will be signalled when the voltage
+   * regulator is fully on.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startVReg();
+
+  /**
+   * Signals that the voltage regulator has been started.
+   */
+  async event void startVRegDone();
+  
+  /**
+   * Stop the voltage regulator immediately.
+   *
+   * @return SUCCESS always
+   */
+  async command error_t stopVReg();
+
+  /**
+   * Start the oscillator. On SUCCESS, startOscillator
+   * will be signalled when the oscillator has been started.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startOscillator();
+
+  /**
+   * Signals that the oscillator has been started.
+   */
+  async event void startOscillatorDone();
+
+  /**
+   * Stop the oscillator.
+   *
+   * @return SUCCESS if the oscillator was stopped, FAIL otherwise.
+   */
+  async command error_t stopOscillator();
+
+  /**
+   * Enable RX.
+   *
+   * @return SUCCESS if receive mode has been enabled, FAIL otherwise.
+   */
+  async command error_t rxOn();
+
+  /**
+   * Disable RX.
+   *
+   * @return SUCCESS if receive mode has been disabled, FAIL otherwise.
+   */
+  async command error_t rfOff();
+
+}
diff --git a/tos/chips/cc2420/CC2420Ram.nc b/tos/chips/cc2420/CC2420Ram.nc
new file mode 100644
index 00000000..a41712d5
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Ram.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL abstraction for accessing theRAM of a ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+
+interface CC2420Ram {
+
+  /**
+   * Read data from a RAM. This operation is sychronous.
+   *
+   * @param offset within the field.
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return status byte returned when sending the last byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t read( uint8_t offset, uint8_t* data, uint8_t length );
+
+  /**
+   * Write data to RAM. This operation is sychronous.
+   *
+   * @param offset within the field.
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes to write.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t write( uint8_t offset, uint8_t* data, uint8_t length );
+
+}
diff --git a/tos/chips/cc2420/CC2420Receive.nc b/tos/chips/cc2420/CC2420Receive.nc
new file mode 100644
index 00000000..70230b02
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Receive.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low-level abstraction of the receive path implementation for the
+ * ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Receive {
+
+  /**
+   * Notification that an SFD capture has occured.
+   *
+   * @param time at which the capture happened.
+   */
+  async command void sfd( uint16_t time );
+
+  /**
+   * Notification that the packet has been dropped by the radio
+   * (e.g. due to address rejection).
+   */
+  async command void sfd_dropped();
+
+  /**
+   * Signals that a message has been received.
+   *
+   * @param type of the message received.
+   * @param message pointer to message received.
+   */
+  async event void receive( uint8_t type, message_t* message );
+
+}
+
diff --git a/tos/chips/cc2420/CC2420ReceiveC.nc b/tos/chips/cc2420/CC2420ReceiveC.nc
new file mode 100644
index 00000000..b1762e88
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ReceiveC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the receive path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration CC2420ReceiveC {
+
+  provides interface Init;
+  provides interface AsyncStdControl;
+  provides interface CC2420Receive;
+  provides interface Receive;
+
+}
+
+implementation {
+
+  components CC2420ReceiveP;
+  components new CC2420SpiC() as Spi;
+
+  components HplCC2420PinsC as Pins;
+  components HplCC2420InterruptsC as InterruptsC;
+
+  components LedsC as Leds;
+  CC2420ReceiveP.Leds -> Leds;
+
+  Init = CC2420ReceiveP;
+  AsyncStdControl = CC2420ReceiveP;
+  CC2420Receive = CC2420ReceiveP;
+  Receive = CC2420ReceiveP;
+
+  CC2420ReceiveP.CSN -> Pins.CSN;
+  CC2420ReceiveP.FIFO -> Pins.FIFO;
+  CC2420ReceiveP.FIFOP -> Pins.FIFOP;
+  CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP;
+
+  CC2420ReceiveP.SpiResource -> Spi;
+  CC2420ReceiveP.RXFIFO -> Spi.RXFIFO;
+  CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX;
+
+}
diff --git a/tos/chips/cc2420/CC2420ReceiveP.nc b/tos/chips/cc2420/CC2420ReceiveP.nc
new file mode 100644
index 00000000..c318e1d8
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ReceiveP.nc
@@ -0,0 +1,278 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module CC2420ReceiveP {
+
+  provides interface Init;
+  provides interface AsyncStdControl;
+  provides interface CC2420Receive;
+  provides interface Receive;
+
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as FIFO;
+  uses interface GeneralIO as FIFOP;
+  uses interface GpioInterrupt as InterruptFIFOP;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Fifo as RXFIFO;
+  uses interface CC2420Strobe as SACK;
+  uses interface CC2420Strobe as SFLUSHRX;
+
+  uses interface Leds;
+
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_RX_HEADER,
+    S_RX_PAYLOAD,
+  } cc2420_receive_state_t;
+
+  enum {
+    RXFIFO_SIZE = 128,
+    TIMESTAMP_QUEUE_SIZE = 8,
+  };
+
+  uint16_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ];
+  uint8_t m_timestamp_head, m_timestamp_size;
+  uint8_t m_missed_packets;
+
+  norace uint8_t m_bytes_left;
+  norace message_t* m_p_rx_buf;
+
+  message_t m_rx_buf;
+  cc2420_receive_state_t m_state;
+
+  void beginReceive();
+  void receive();
+  void waitForNextPacket();
+  task void receiveDone_task();
+
+  cc2420_header_t* getHeader( message_t* msg ) {
+    return (cc2420_header_t*)( msg->data - sizeof( cc2420_header_t ) );
+  }
+  
+  cc2420_metadata_t* getMetadata( message_t* msg ) {
+    return (cc2420_metadata_t*)msg->metadata;
+  }
+  
+  command error_t Init.init() {
+    m_p_rx_buf = &m_rx_buf;
+    return SUCCESS;
+  }
+
+  void reset_state() {
+    m_bytes_left = RXFIFO_SIZE;
+    m_timestamp_head = m_timestamp_size = 0;
+    m_missed_packets = 0;
+  }
+
+  async command error_t AsyncStdControl.start() {
+    atomic {
+      reset_state();
+      m_state = S_STARTED;
+      call InterruptFIFOP.enableFallingEdge();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      call InterruptFIFOP.disable();
+    }
+    return SUCCESS;
+  }
+
+  async command void CC2420Receive.sfd( uint16_t time ) {
+    if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) {
+      uint8_t tail =  ( ( m_timestamp_head + m_timestamp_size ) % 
+			TIMESTAMP_QUEUE_SIZE );
+      m_timestamp_queue[ tail ] = time;
+      m_timestamp_size++;
+    }
+  }
+
+  async command void CC2420Receive.sfd_dropped() {
+    if ( m_timestamp_size )
+      m_timestamp_size--;
+  }
+
+  async event void InterruptFIFOP.fired() {
+    if ( m_state == S_STARTED )
+      beginReceive();
+    else
+      m_missed_packets++;
+  }
+  
+  void beginReceive() { 
+    m_state = S_RX_HEADER;
+    if ( call SpiResource.immediateRequest() == SUCCESS )
+      receive();
+    else
+      call SpiResource.request();
+  }
+  
+  event void SpiResource.granted() {
+    receive();
+  }
+
+  void receive() {
+    call CSN.clr();
+    call RXFIFO.beginRead( (uint8_t*)getHeader( m_p_rx_buf ), 1 );
+  }
+
+  async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len,
+				    error_t error ) {
+
+    cc2420_header_t* header = getHeader( m_p_rx_buf );
+    cc2420_metadata_t* metadata = getMetadata( m_p_rx_buf );
+    uint8_t* buf = (uint8_t*)header;
+    uint8_t length = buf[ 0 ];
+
+    switch( m_state ) {
+
+    case S_RX_HEADER:
+      m_state = S_RX_PAYLOAD;
+      if ( length + 1 > m_bytes_left ) {
+	reset_state();
+	call CSN.set();
+	call CSN.clr();
+	call SFLUSHRX.strobe();
+	call SFLUSHRX.strobe();
+	call CSN.set();
+	call SpiResource.release();
+	waitForNextPacket();
+      }
+      else {
+	if ( !call FIFO.get() && !call FIFOP.get() )
+	  m_bytes_left -= length + 1;
+	call RXFIFO.continueRead( (length <= MAC_PACKET_SIZE) ? buf + 1 : NULL,
+				  length );
+      }
+      break;
+      
+    case S_RX_PAYLOAD:
+      
+      call CSN.set();
+      call SpiResource.release();
+      
+      if ( m_timestamp_size ) {
+	if ( length > 10 ) {
+	  metadata->time = m_timestamp_queue[ m_timestamp_head ];
+	  m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE;
+	  m_timestamp_size--;
+	}
+      }
+      else {
+	metadata->time = 0xffff;
+      }
+      
+      // pass packet up if crc is good
+      if ( ( buf[ length ] >> 7 ) && rx_buf ) {
+	uint8_t type = ( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7;
+	signal CC2420Receive.receive( type, m_p_rx_buf );
+	if ( type == IEEE154_TYPE_DATA ) {
+	  post receiveDone_task();
+	  return;
+	}
+      }
+      
+      waitForNextPacket();
+      break;
+
+    default:
+      call CSN.set();
+      call SpiResource.release();
+      break;
+      
+    }
+    
+  }
+
+  task void receiveDone_task() {
+    
+    cc2420_header_t* header = getHeader( m_p_rx_buf );
+    cc2420_metadata_t* metadata = getMetadata( m_p_rx_buf );
+    uint8_t* buf = (uint8_t*)header;
+    uint8_t length = buf[ 0 ];
+    
+    metadata->crc = buf[ length ] >> 7;
+    metadata->rssi = buf[ length - 1 ];
+    metadata->lqi = buf[ length ] & 0x7f;
+    m_p_rx_buf = signal Receive.receive( m_p_rx_buf, m_p_rx_buf->data, 
+					 length );
+
+    waitForNextPacket();
+
+  }
+
+  void waitForNextPacket() {
+
+    atomic {
+      if ( m_state == S_STOPPED )
+	return;
+
+      if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) {
+	if ( m_missed_packets )
+	  m_missed_packets--;
+	beginReceive();
+      }
+      else {
+	m_state = S_STARTED;
+	m_missed_packets = 0;
+      }
+    }      
+    
+  }
+
+  command void* Receive.getPayload(message_t* m, uint8_t* len) {
+    if (len != NULL) {
+      *len = TOSH_DATA_LENGTH;
+    }
+    return m->data;
+  }
+
+  command uint8_t Receive.payloadLength(message_t* m) {
+    uint8_t* buf = (uint8_t*)getHeader( m_p_rx_buf );
+    return buf[0];
+  }
+
+  async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {}  
+}
diff --git a/tos/chips/cc2420/CC2420Register.nc b/tos/chips/cc2420/CC2420Register.nc
new file mode 100644
index 00000000..a5cc3c6b
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Register.nc
@@ -0,0 +1,57 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Interface representing one of the Read/Write registers on the
+ * CC2420 radio. The return values (when appropriate) refer to the
+ * status byte returned on the CC2420 SO pin. A full list of RW
+ * registers can be found on page 61 of the CC2420 datasheet (rev
+ * 1.2). Page 25 of the same document describes the protocol for
+ * interacting with these registers over the CC2420 SPI bus.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+
+interface CC2420Register {
+
+  /**
+   * Read a 16-bit data word from the register.
+   *
+   * @param data pointer to place the register value.
+   * @return status byte from the read.
+   */
+  async command cc2420_status_t read(uint16_t* data);
+
+  /**
+   * Write a 16-bit data word to the register.
+   * 
+   * @param data value to write to register.
+   * @return status byte from the write.
+   */
+  async command cc2420_status_t write(uint16_t data);
+
+}
diff --git a/tos/chips/cc2420/CC2420SpiC.nc b/tos/chips/cc2420/CC2420SpiC.nc
new file mode 100644
index 00000000..c2c70c49
--- /dev/null
+++ b/tos/chips/cc2420/CC2420SpiC.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of basic SPI primitives for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration CC2420SpiC() {
+
+  provides interface Resource;
+
+  // commands
+  provides interface CC2420Strobe as SFLUSHRX;
+  provides interface CC2420Strobe as SFLUSHTX;
+  provides interface CC2420Strobe as SNOP;
+  provides interface CC2420Strobe as SRXON;
+  provides interface CC2420Strobe as SRFOFF;
+  provides interface CC2420Strobe as STXON;
+  provides interface CC2420Strobe as STXONCCA;
+  provides interface CC2420Strobe as SXOSCON;
+  provides interface CC2420Strobe as SXOSCOFF;
+
+  // registers
+  provides interface CC2420Register as FSCTRL;
+  provides interface CC2420Register as IOCFG0;
+  provides interface CC2420Register as IOCFG1;
+  provides interface CC2420Register as MDMCTRL0;
+  provides interface CC2420Register as MDMCTRL1;
+  provides interface CC2420Register as TXCTRL;
+
+  // ram
+  provides interface CC2420Ram as IEEEADR;
+  provides interface CC2420Ram as PANID;
+  provides interface CC2420Ram as SHORTADR;
+  provides interface CC2420Ram as TXFIFO_RAM;
+
+  // fifos
+  provides interface CC2420Fifo as RXFIFO;
+  provides interface CC2420Fifo as TXFIFO;
+
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( "CC2420Spi.Resource" ),
+  };
+
+  components HplCC2420PinsC as Pins;
+  components CC2420SpiP as Spi;
+  
+  Resource = Spi.Resource[ CLIENT_ID ];
+
+  // commands
+  SFLUSHRX = Spi.Strobe[ CC2420_SFLUSHRX ];
+  SFLUSHTX = Spi.Strobe[ CC2420_SFLUSHTX ];
+  SNOP = Spi.Strobe[ CC2420_SNOP ];
+  SRXON = Spi.Strobe[ CC2420_SRXON ];
+  SRFOFF = Spi.Strobe[ CC2420_SRFOFF ];
+  STXON = Spi.Strobe[ CC2420_STXON ];
+  STXONCCA = Spi.Strobe[ CC2420_STXONCCA ];
+  SXOSCON = Spi.Strobe[ CC2420_SXOSCON ];
+  SXOSCOFF = Spi.Strobe[ CC2420_SXOSCOFF ];
+
+  // registers
+  FSCTRL = Spi.Reg[ CC2420_FSCTRL ];
+  IOCFG0 = Spi.Reg[ CC2420_IOCFG0 ];
+  IOCFG1 = Spi.Reg[ CC2420_IOCFG1 ];
+  MDMCTRL0 = Spi.Reg[ CC2420_MDMCTRL0 ];
+  MDMCTRL1 = Spi.Reg[ CC2420_MDMCTRL1 ];
+  TXCTRL = Spi.Reg[ CC2420_TXCTRL ];
+
+  // ram
+  IEEEADR = Spi.Ram[ CC2420_RAM_IEEEADR ];
+  PANID = Spi.Ram[ CC2420_RAM_PANID ];
+  SHORTADR = Spi.Ram[ CC2420_RAM_SHORTADR ];
+  TXFIFO_RAM = Spi.Ram[ CC2420_RAM_TXFIFO ];
+
+  // fifos
+  RXFIFO = Spi.Fifo[ CC2420_RXFIFO ];
+  TXFIFO = Spi.Fifo[ CC2420_TXFIFO ];
+
+}
+
diff --git a/tos/chips/cc2420/CC2420SpiImplP.nc b/tos/chips/cc2420/CC2420SpiImplP.nc
new file mode 100644
index 00000000..3d27b748
--- /dev/null
+++ b/tos/chips/cc2420/CC2420SpiImplP.nc
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module CC2420SpiImplP {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface CC2420Fifo as Fifo[ uint8_t id ];
+  provides interface CC2420Ram as Ram[ uint16_t id ];
+  provides interface CC2420Register as Reg[ uint8_t id ];
+  provides interface CC2420Strobe as Strobe[ uint8_t id ];
+
+  uses interface Resource as SpiResource;
+  uses interface SpiByte;
+  uses interface SpiPacket;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    RESOURCE_COUNT = uniqueCount( "CC2420Spi.Resource" ),
+    NO_HOLDER = 0xff,
+  };
+
+  norace uint16_t m_addr;
+  bool m_resource_busy = FALSE;
+  uint8_t m_requests = 0;
+  uint8_t m_holder = NO_HOLDER;
+
+  default event void Resource.granted[ uint8_t id ]() {
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    atomic {
+      if ( m_resource_busy )
+	m_requests |= 1 << id;
+      else {
+	m_holder = id;
+	m_resource_busy = TRUE;
+	call SpiResource.request();
+      }
+    }
+    return SUCCESS;
+  }
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t error;
+    atomic {
+      if ( m_resource_busy )
+	return EBUSY;
+      error = call SpiResource.immediateRequest();
+      if ( error == SUCCESS ) {
+	m_holder = id;
+	m_resource_busy = TRUE;
+      }
+    }
+    return error;
+  }
+
+  async command void Resource.release[ uint8_t id ]() {
+    uint8_t i;
+    atomic {
+      if ( m_holder != id )
+	return;
+      m_holder = NO_HOLDER;
+      call SpiResource.release();
+      if ( !m_requests ) {
+	m_resource_busy = FALSE;
+      }
+      else {
+	for ( i = m_holder + 1; ; i++ ) {
+	  if ( i >= RESOURCE_COUNT )
+	    i = 0;
+	  if ( m_requests & ( 1 << i ) ) {
+	    m_holder = i;
+	    m_requests &= ~( 1 << i );
+	    call SpiResource.request();
+	    return;
+	  }
+	}
+      }
+    }
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    atomic return m_holder == id;
+  }
+
+  event void SpiResource.granted() {
+    uint8_t holder;
+    atomic holder = m_holder;
+    signal Resource.granted[ holder ]();
+  }
+
+  async command cc2420_status_t Fifo.beginRead[ uint8_t addr ]( uint8_t* data, 
+								uint8_t len ) {
+    
+    cc2420_status_t status;
+    
+    m_addr = addr | 0x40;
+    
+    call SpiByte.write( m_addr, &status );
+    call Fifo.continueRead[ addr ]( data, len );
+    
+    return status;
+    
+  }
+
+  async command error_t Fifo.continueRead[ uint8_t addr ]( uint8_t* data,
+							   uint8_t len ) {
+    call SpiPacket.send( NULL, data, len );
+    return SUCCESS;
+  }
+
+  async command cc2420_status_t Fifo.write[ uint8_t addr ]( uint8_t* data, 
+							    uint8_t len ) {
+
+    uint8_t status;
+
+    m_addr = addr;
+
+    call SpiByte.write( m_addr, &status );
+    call SpiPacket.send( data, NULL, len );
+
+    return status;
+
+  }
+
+  async command cc2420_status_t Ram.read[ uint16_t addr ]( uint8_t offset,
+							   uint8_t* data, 
+							   uint8_t len ) {
+
+    cc2420_status_t status;
+
+    addr += offset;
+
+    call SpiByte.write( addr | 0x80, &status );
+    call SpiByte.write( ( ( addr >> 1 ) & 0xc0 ) | 0x20, &status );
+    for ( ; len; len-- )
+      call SpiByte.write( 0, data++ );
+
+    return status;
+
+  }
+
+  async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, 
+				       uint16_t len, error_t error ) {
+    if ( m_addr & 0x40 )
+      signal Fifo.readDone[ m_addr & ~0x40 ]( rx_buf, len, error );
+    else
+      signal Fifo.writeDone[ m_addr ]( tx_buf, len, error );
+  }
+
+  async command cc2420_status_t Ram.write[ uint16_t addr ]( uint8_t offset,
+							    uint8_t* data, 
+							    uint8_t len ) {
+
+    cc2420_status_t status;
+
+    addr += offset;
+
+    call SpiByte.write( addr | 0x80, &status );
+    call SpiByte.write( ( addr >> 1 ) & 0xc0, &status );
+    for ( ; len; len-- )
+      call SpiByte.write( *data++, &status );
+
+    return status;
+
+  }
+
+  async command cc2420_status_t Reg.read[ uint8_t addr ]( uint16_t* data ) {
+
+    cc2420_status_t status;
+    uint8_t tmp;
+
+    call SpiByte.write( addr | 0x40, &status );
+    call SpiByte.write( 0, &tmp );
+    *data = (uint16_t)tmp << 8;
+    call SpiByte.write( 0, &tmp );
+    *data |= tmp;
+
+    return status;
+
+  }
+
+  async command cc2420_status_t Reg.write[ uint8_t addr ]( uint16_t data ) {
+
+    cc2420_status_t status;
+
+    call SpiByte.write( addr, &status );
+    call SpiByte.write( data >> 8, &status );
+    call SpiByte.write( data & 0xff, &status );
+
+    return status;
+
+  }
+
+  async command cc2420_status_t Strobe.strobe[ uint8_t addr ]() {
+
+    cc2420_status_t status;
+
+    call SpiByte.write( addr, &status );
+
+    return status;
+
+  }
+
+  default async event void Fifo.readDone[ uint8_t addr ]( uint8_t* rx_buf, uint8_t rx_len, error_t error ) {}
+  default async event void Fifo.writeDone[ uint8_t addr ]( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {}
+
+}
diff --git a/tos/chips/cc2420/CC2420SpiP.nc b/tos/chips/cc2420/CC2420SpiP.nc
new file mode 100644
index 00000000..2b80ae4f
--- /dev/null
+++ b/tos/chips/cc2420/CC2420SpiP.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration CC2420SpiP {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface CC2420Fifo as Fifo[ uint8_t id ];
+  provides interface CC2420Ram as Ram[ uint16_t id ];
+  provides interface CC2420Register as Reg[ uint8_t id ];
+  provides interface CC2420Strobe as Strobe[ uint8_t id ];
+
+}
+
+implementation {
+
+  components CC2420SpiImplP as SpiP;
+  Resource = SpiP;
+  Fifo = SpiP;
+  Ram = SpiP;
+  Reg = SpiP;
+  Strobe = SpiP;
+
+  components new HplCC2420SpiC();
+  SpiP.SpiResource -> HplCC2420SpiC;
+  SpiP.SpiByte -> HplCC2420SpiC;
+  SpiP.SpiPacket -> HplCC2420SpiC;
+
+  components LedsC;
+  SpiP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cc2420/CC2420Strobe.nc b/tos/chips/cc2420/CC2420Strobe.nc
new file mode 100644
index 00000000..0e2a6667
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Strobe.nc
@@ -0,0 +1,47 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Interface representing one of the CC2420 command strobe registers.
+ * Writing to one of these registers enacts a command on the CC2420,
+ * such as power-up, transmission, or clear a FIFO.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+#include "CC2420.h"
+
+interface CC2420Strobe {
+
+  /**
+   * Send a command strobe to the register. The return value is the
+   * CC2420 status register. Table 5 on page 27 of the CC2420
+   * datasheet (v1.2) describes the contents of this register.
+   * 
+   * @return Status byte from the CC2420.
+   */
+  async command cc2420_status_t strobe();
+
+}
diff --git a/tos/chips/cc2420/CC2420Transmit.nc b/tos/chips/cc2420/CC2420Transmit.nc
new file mode 100644
index 00000000..e556f77a
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Transmit.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low-level abstraction for the transmit path implementaiton of the
+ * ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface CC2420Transmit {
+
+  /**
+   * Send a message with CCA enabled.
+   *
+   * @param p_msg message to send.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t sendCCA( message_t* p_msg );
+
+  /**
+   * Send a message with CCA disabled.
+   *
+   * @param p_msg message to send.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t send( message_t* p_msg );
+
+  /**
+   * Send the previous message again with CCA enabled.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t resendCCA();
+
+  /**
+   * Send the previous message again with CCA disabled.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t resend();
+
+  /**
+   * Cancel sending of the message.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t cancel();
+
+  /**
+   * Signal that a message has been sent
+   *
+   * @param p_msg message to send.
+   * @param error notifaction of how the operation went.
+   */
+  async event void sendDone( message_t* p_msg, error_t error );
+
+  /**
+   * Modify the contents of a packet. This command can only be used
+   * when an SFD capture event for the sending packet is signalled.
+   *
+   * @param offset in the message to start modifying.
+   * @param buf to data to write
+   * @param len of bytes to write
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t modify( uint8_t offset, uint8_t* buf, uint8_t len );
+
+}
+
diff --git a/tos/chips/cc2420/CC2420TransmitC.nc b/tos/chips/cc2420/CC2420TransmitC.nc
new file mode 100644
index 00000000..5e076608
--- /dev/null
+++ b/tos/chips/cc2420/CC2420TransmitC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the transmit path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration CC2420TransmitC {
+
+  provides interface Init;
+  provides interface AsyncStdControl;
+  provides interface CC2420Transmit;
+  provides interface CsmaBackoff;
+  provides interface RadioTimeStamping;
+
+}
+
+implementation {
+
+  components CC2420TransmitP;
+  Init = Alarm;
+  Init = CC2420TransmitP;
+  AsyncStdControl = CC2420TransmitP;
+  CC2420Transmit = CC2420TransmitP;
+  CsmaBackoff = CC2420TransmitP;
+  RadioTimeStamping = CC2420TransmitP;
+
+  components AlarmMultiplexC as Alarm;
+  CC2420TransmitP.BackoffTimer -> Alarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420TransmitP.CCA -> Pins.CCA;
+  CC2420TransmitP.CSN -> Pins.CSN;
+  CC2420TransmitP.SFD -> Pins.SFD;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD;
+
+  components new CC2420SpiC() as Spi;
+  CC2420TransmitP.SpiResource -> Spi;
+  CC2420TransmitP.SNOP        -> Spi.SNOP;
+  CC2420TransmitP.STXON       -> Spi.STXON;
+  CC2420TransmitP.STXONCCA    -> Spi.STXONCCA;
+  CC2420TransmitP.SFLUSHTX    -> Spi.SFLUSHTX;
+  CC2420TransmitP.TXCTRL      -> Spi.TXCTRL;
+  CC2420TransmitP.TXFIFO      -> Spi.TXFIFO;
+  CC2420TransmitP.TXFIFO_RAM  -> Spi.TXFIFO_RAM;
+
+  components CC2420ReceiveC;
+  CC2420TransmitP.CC2420Receive -> CC2420ReceiveC;
+
+  components LedsC as Leds;
+  CC2420TransmitP.Leds -> Leds;
+
+}
diff --git a/tos/chips/cc2420/CC2420TransmitP.nc b/tos/chips/cc2420/CC2420TransmitP.nc
new file mode 100644
index 00000000..98e8b192
--- /dev/null
+++ b/tos/chips/cc2420/CC2420TransmitP.nc
@@ -0,0 +1,450 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module CC2420TransmitP {
+
+  provides interface Init;
+  provides interface AsyncStdControl;
+  provides interface CC2420Transmit as Send;
+  provides interface CsmaBackoff;
+  provides interface RadioTimeStamping as TimeStamp;
+
+  uses interface Alarm as BackoffTimer;
+  uses interface GpioCapture as CaptureSFD;
+  uses interface GeneralIO as CCA;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as SFD;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Fifo as TXFIFO;
+  uses interface CC2420Ram as TXFIFO_RAM;
+  uses interface CC2420Register as TXCTRL;
+  uses interface CC2420Strobe as SNOP;
+  uses interface CC2420Strobe as STXON;
+  uses interface CC2420Strobe as STXONCCA;
+  uses interface CC2420Strobe as SFLUSHTX;
+
+  uses interface CC2420Receive;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_LOAD,
+    S_SAMPLE_CCA,
+    S_BEGIN_TRANSMIT,
+    S_SFD,
+    S_EFD,
+    S_ACK_WAIT,
+    S_CANCEL,
+  } cc2420_transmit_state_t;
+
+  // This specifies how many jiffies the stack should wait after a
+  // TXACTIVE to receive an SFD interrupt before assuming something is
+  // wrong and aborting the send. There seems to be a condition
+  // on the micaZ where the SFD interrupt is never handled.
+  enum {
+    CC2420_ABORT_PERIOD = 320
+  };
+  
+  norace message_t* m_msg;
+  norace bool m_cca;
+  norace uint8_t m_tx_power;
+  cc2420_transmit_state_t m_state = S_STOPPED;
+  bool m_receiving = FALSE;
+  uint16_t m_prev_time;
+
+  void loadTXFIFO();
+  void attemptSend();
+
+  cc2420_header_t* getHeader( message_t* msg ) {
+    return (cc2420_header_t*)( msg->data - sizeof( cc2420_header_t ) );
+  }
+
+  cc2420_metadata_t* getMetadata( message_t* msg ) {
+    return (cc2420_metadata_t*)msg->metadata;
+  }
+
+  void startBackoffTimer(uint16_t time) {
+    call BackoffTimer.start(time);
+  }
+
+  void stopBackoffTimer() {
+    call BackoffTimer.stop();
+  }
+
+  error_t acquireSpiResource() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error != SUCCESS )
+      call SpiResource.request();
+    return error;
+  }
+
+  void releaseSpiResource() {
+    call SpiResource.release();
+  }
+
+  void signalDone( error_t err ) {
+    atomic m_state = S_STARTED;
+    signal Send.sendDone( m_msg, err );
+  }
+
+  command error_t Init.init() {
+    call CCA.makeInput();
+    call CSN.makeOutput();
+    call SFD.makeInput();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.start() {
+    atomic {
+      call CaptureSFD.captureRisingEdge();
+      m_state = S_STARTED;
+      m_receiving = FALSE;
+      m_tx_power = 0;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      stopBackoffTimer();
+      call CaptureSFD.disable();
+    }
+    return SUCCESS;
+  }
+
+  error_t send( message_t* p_msg, bool cca ) {
+
+    atomic {
+      if ( m_state != S_STARTED )
+	return FAIL;
+      m_state = S_LOAD;
+      m_cca = cca;
+      m_msg = p_msg;
+    }
+
+    if ( acquireSpiResource() == SUCCESS )
+      loadTXFIFO();
+
+    return SUCCESS;
+
+  }
+
+  async command error_t Send.sendCCA( message_t* p_msg ) {
+    return send( p_msg, TRUE );
+  }
+
+  async command error_t Send.send( message_t* p_msg ) {
+    return send( p_msg, FALSE );
+  }
+
+  error_t resend( bool cca ) {
+
+    atomic {
+      if ( m_state != S_STARTED )
+	return FAIL;
+      m_cca = cca;
+      m_state = cca ? S_SAMPLE_CCA : S_BEGIN_TRANSMIT;
+    }
+
+    if ( m_cca ) {
+      startBackoffTimer( signal CsmaBackoff.initial( m_msg ) * 
+			       CC2420_BACKOFF_PERIOD );
+    }
+    else if ( acquireSpiResource() == SUCCESS ) {
+      attemptSend();
+    }
+    
+    return SUCCESS;
+  
+  }
+  
+  async command error_t Send.resendCCA() {
+    return resend( TRUE );
+  }
+
+  async command error_t Send.resend() {
+    return resend( FALSE );
+  }
+
+  async command error_t Send.cancel() {
+
+    stopBackoffTimer();
+
+    atomic {
+      switch( m_state ) {
+      case S_LOAD:
+	m_state = S_CANCEL;
+	break;
+      case S_SAMPLE_CCA: case S_BEGIN_TRANSMIT:
+	m_state = S_STARTED;
+	break;
+      default:
+	// cancel not allowed while radio is busy transmitting
+	return FAIL;
+      }
+    }
+
+    return SUCCESS;
+
+  }
+
+  void loadTXFIFO() {
+    cc2420_header_t* header = getHeader( m_msg );
+    uint8_t tx_power = getMetadata( m_msg )->tx_power;
+    if ( !tx_power )
+      tx_power = CC2420_DEF_RFPOWER;
+    call CSN.clr();
+    if ( m_tx_power != tx_power )
+      call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) |
+			 ( 3 << CC2420_TXCTRL_PA_CURRENT ) |
+			 ( 1 << CC2420_TXCTRL_RESERVED ) |
+			 ( tx_power << CC2420_TXCTRL_PA_LEVEL ) );
+    m_tx_power = tx_power;
+    call TXFIFO.write( (uint8_t*)header, header->length - 1 );
+  }
+  
+  async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len,
+				     error_t error ) {
+
+    call CSN.set();
+
+    if ( m_state == S_CANCEL ) {
+      m_state = S_STARTED;
+    }
+    else if ( !m_cca ) {
+      m_state = S_BEGIN_TRANSMIT;
+      attemptSend();
+    }
+    else {
+      releaseSpiResource();
+      m_state = S_SAMPLE_CCA;
+      startBackoffTimer( signal CsmaBackoff.initial( m_msg ) * 
+			 CC2420_BACKOFF_PERIOD );
+    }
+
+  }
+
+  void congestionBackoff() {
+    atomic {
+      uint16_t time = signal CsmaBackoff.congestion( m_msg );
+      if ( time )
+	startBackoffTimer( time * CC2420_BACKOFF_PERIOD );
+      else
+	m_state = S_STARTED;
+    }
+  }
+
+  async event void BackoffTimer.fired() {
+
+    atomic {
+      switch( m_state ) {
+	
+      case S_SAMPLE_CCA :
+	// sample CCA and wait a little longer if free, just in case we
+	// sampled during the ack turn-around window
+	if ( call CCA.get() ) {
+	  m_state = S_BEGIN_TRANSMIT;
+	  startBackoffTimer( CC2420_TIME_ACK_TURNAROUND );
+	}
+	else {
+	  congestionBackoff();
+	}
+	break;
+	
+      case S_BEGIN_TRANSMIT :
+	if ( acquireSpiResource() == SUCCESS )
+	  attemptSend();
+	break;
+	
+      case S_ACK_WAIT :
+	signalDone( SUCCESS );
+	break;
+	
+#ifdef PLATFORM_MICAZ
+      case S_SFD:
+	// We didn't receive an SFD interrupt within CC2420_ABORT_PERIOD
+	// jiffies. Assume something is wrong.
+	call SFLUSHTX.strobe();
+	call CaptureSFD.disable();
+	call CaptureSFD.captureRisingEdge();
+	signalDone( ERETRY );
+	break;
+#endif
+      default:
+	break;
+      }
+    }
+
+  }
+  
+  void attemptSend() {
+
+    uint8_t status;
+    bool congestion = TRUE;
+
+    call CSN.clr();
+
+    status = m_cca ? call STXONCCA.strobe() : call STXON.strobe();
+    if ( !( status & CC2420_STATUS_TX_ACTIVE ) ) {
+      status = call SNOP.strobe();
+      if ( status & CC2420_STATUS_TX_ACTIVE )
+	congestion = FALSE;
+    }
+    atomic m_state = congestion ? S_SAMPLE_CCA : S_SFD;
+    
+    call CSN.set();
+
+    if ( congestion ) {
+      releaseSpiResource();
+      congestionBackoff();
+    }
+#ifdef PLATFORM_MICAZ
+    else {
+      startBackoffTimer(CC2420_ABORT_PERIOD);
+    }
+#endif
+
+  }
+
+  async command error_t Send.modify( uint8_t offset, uint8_t* buf, 
+				     uint8_t len ) {
+    call CSN.clr();
+    call TXFIFO_RAM.write( offset, buf, len );
+    call CSN.set();
+    return SUCCESS;
+  }
+
+  async event void CaptureSFD.captured( uint16_t time ) {
+
+    atomic {
+      switch( m_state ) {
+	
+      case S_SFD:
+	call CaptureSFD.captureFallingEdge();
+	signal TimeStamp.transmittedSFD( time, m_msg );
+	releaseSpiResource();
+	stopBackoffTimer();
+	m_state = S_EFD;
+	if ( ( ( getHeader( m_msg )->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7 ) == 
+	     IEEE154_TYPE_DATA )
+	  getMetadata( m_msg )->time = time;
+	if ( call SFD.get() )
+	  break;
+	
+      case S_EFD:
+	call CaptureSFD.captureRisingEdge();
+	if ( getHeader( m_msg )->fcf & ( 1 << IEEE154_FCF_ACK_REQ ) ) {
+	  m_state = S_ACK_WAIT;
+	  startBackoffTimer( CC2420_ACK_WAIT_DELAY );
+	}
+	else {
+	  signalDone(SUCCESS);
+	}
+	if ( !call SFD.get() )
+	  break;
+	
+      default:
+	if ( !m_receiving ) {
+	  call CaptureSFD.captureFallingEdge();
+	  signal TimeStamp.receivedSFD( time );
+	  call CC2420Receive.sfd( time );
+	  m_receiving = TRUE;
+	  m_prev_time = time;
+	  if ( call SFD.get() )
+	    return;
+	}
+	if ( m_receiving ) {
+	  call CaptureSFD.captureRisingEdge();
+	  m_receiving = FALSE;
+	  if ( time - m_prev_time < 10 )
+	    call CC2420Receive.sfd_dropped();
+	}
+	break;
+      
+      }
+    }
+  }
+
+  async event void CC2420Receive.receive( uint8_t type, message_t* ack_msg ) {
+
+    if ( type == IEEE154_TYPE_ACK ) {
+      cc2420_header_t* ack_header = getHeader( ack_msg );
+      cc2420_header_t* msg_header = getHeader( m_msg );
+      cc2420_metadata_t* msg_metadata = getMetadata( m_msg );
+      uint8_t* ack_buf = (uint8_t*)ack_header;
+      uint8_t length = ack_header->length;
+      
+      if ( m_state == S_ACK_WAIT &&
+	   msg_header->dsn == ack_header->dsn ) {
+	stopBackoffTimer();
+	msg_metadata->ack = TRUE;
+	msg_metadata->rssi = ack_buf[ length - 1 ];
+	msg_metadata->lqi = ack_buf[ length ] & 0x7f;
+	signalDone(SUCCESS);
+      }
+    }
+
+  }
+
+  event void SpiResource.granted() {
+
+    uint8_t cur_state;
+
+    atomic {
+      cur_state = m_state;
+    }
+
+    switch( cur_state ) {
+    case S_LOAD: loadTXFIFO(); break;
+    case S_BEGIN_TRANSMIT: attemptSend(); break;
+    default: releaseSpiResource(); break;
+    }
+
+  }
+
+  async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {}
+
+  default async event void TimeStamp.transmittedSFD( uint16_t time, message_t* p_msg ) {}
+  default async event void TimeStamp.receivedSFD( uint16_t time ) {}
+
+}
diff --git a/tos/chips/cc2420/IEEE802154.h b/tos/chips/cc2420/IEEE802154.h
new file mode 100644
index 00000000..63290340
--- /dev/null
+++ b/tos/chips/cc2420/IEEE802154.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef __IEEE802154_H__
+#define __IEEE802154_H__
+
+enum ieee154_fcf_enums {
+  IEEE154_FCF_FRAME_TYPE = 0,
+  IEEE154_FCF_SECURITY_ENABLED = 3,
+  IEEE154_FCF_FRAME_PENDING = 4,
+  IEEE154_FCF_ACK_REQ = 5,
+  IEEE154_FCF_INTRAPAN = 6,
+  IEEE154_FCF_DEST_ADDR_MODE = 10,
+  IEEE154_FCF_SRC_ADDR_MODE = 14,
+};
+
+enum ieee154_fcf_type_enums {
+  IEEE154_TYPE_BEACON = 0,
+  IEEE154_TYPE_DATA = 1,
+  IEEE154_TYPE_ACK = 2,
+  IEEE154_TYPE_MAC_CMD = 3,
+};
+
+enum iee154_fcf_addr_mode_enums {
+  IEEE154_ADDR_NONE = 0,
+  IEEE154_ADDR_SHORT = 2,
+  IEEE154_ADDR_EXT = 3,
+};
+
+#endif
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc b/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc
new file mode 100644
index 00000000..b3aa3926
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc
@@ -0,0 +1,57 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "LIS3L02DQ.h"
+
+interface HalLIS3L02DQAdvanced {
+  command error_t setDecimation(uint8_t factor);
+  event void setDecimationDone(error_t error);
+  command error_t enableAxis(bool bX, bool bY, bool bZ);
+  event void enableAxisDone(error_t error);
+  command error_t enableAlert(lis_alertflags_t xFlags, 
+                      lis_alertflags_t yFlags, 
+                      lis_alertflags_t zFlags, 
+                      bool requireAll);
+  event void enableAlertDone(error_t error);
+  command error_t getAlertSource();
+  event void getAlertSourceDone(error_t error, uint8_t vector);
+  command error_t setTLow(uint8_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint8_t val);
+  event void setTHighDone(error_t error);
+
+  event void alertThreshold();
+}
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc b/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc
new file mode 100644
index 00000000..dab924c3
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc
@@ -0,0 +1,172 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "LIS3L02DQ.h"
+
+module HalLIS3L02DQControlP {
+  provides interface HalLIS3L02DQAdvanced as Advanced;
+
+  uses interface Resource;
+  uses interface HplLIS3L02DQ as Hpl;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_DECIMATION,
+    S_ENAXIS,
+    S_TLOW,
+    S_THIGH,
+  };
+  uint8_t state = S_IDLE;
+
+  uint8_t ctrlReg1Shadow = 0x7;
+  
+  error_t clientResult;
+  uint8_t clientRegAddr;
+  uint8_t clientVal;
+
+  task void signal_Task() {
+    switch(state) {
+    case S_DECIMATION:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setDecimationDone(clientResult);
+      break;
+    case S_ENAXIS:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.enableAxisDone(clientResult);
+      break;
+    case S_TLOW:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setTLowDone(clientResult);
+      break;
+    case S_THIGH:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setTHighDone(clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  event void Resource.granted() {
+    // intentionally left blank
+  }
+  
+  command error_t Advanced.setDecimation(uint8_t factor) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_DECIMATION;
+    ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(3);
+    ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(factor);
+    call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
+    return SUCCESS;
+  }
+
+ command error_t Advanced.enableAxis(bool bX, bool bY, bool bZ) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_ENAXIS;
+    ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(7);
+    // if any of them on, power it on
+    if(bZ || bY || bX)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_PD(1);
+
+    // enable all the relevant axes
+    if(bZ)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_ZEN);
+    if(bY)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_YEN);
+    if(bX)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_XEN);
+    call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
+    return SUCCESS;
+  }
+
+  command error_t Advanced.setTLow(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_TLOW;
+    call Hpl.setReg(LIS3L02DQ_THS_L, val);
+    return SUCCESS;
+  }
+
+  command error_t Advanced.setTHigh(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_THIGH;
+    call Hpl.setReg(LIS3L02DQ_THS_H, val);
+    return SUCCESS;
+  }
+
+  async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {}
+  async event void Hpl.alertThreshold() {}
+  
+  async event void Hpl.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    clientResult = error;
+    clientRegAddr = regAddr;
+    clientVal = val;
+    post signal_Task();
+  }
+
+  command error_t Advanced.enableAlert(lis_alertflags_t xFlags,
+				       lis_alertflags_t yFlags,
+				       lis_alertflags_t zFlags,
+				       bool requireAll) {
+    return FAIL;
+  }
+  command error_t Advanced.getAlertSource() { return FAIL; }
+}
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc b/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc
new file mode 100644
index 00000000..c4170716
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc
@@ -0,0 +1,157 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "LIS3L02DQ.h"
+
+generic module HalLIS3L02DQReaderP() {
+  provides interface Read as AccelX;
+  provides interface Read as AccelY;
+  provides interface Read as AccelZ;
+
+  uses interface Resource as AccelXResource;
+  uses interface Resource as AccelYResource;
+  uses interface Resource as AccelZResource;
+  uses interface HplLIS3L02DQ as Hpl;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_GET_XL,
+    S_GET_XH,
+    S_GET_YL,
+    S_GET_YH,
+    S_GET_ZL,
+    S_GET_ZH,
+  };
+  uint8_t state = S_IDLE;
+  uint16_t readResult;
+  uint8_t byteResult;
+  uint8_t errorResult;
+
+  task void complete_Task() {
+    switch(state) {
+    case S_GET_XL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelXResource.release();
+      signal AccelX.readDone(errorResult, readResult);
+      break;
+    case S_GET_XH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_XL;
+      call Hpl.getReg(LIS3L02DQ_OUTX_L);
+      break;
+    case S_GET_YL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelYResource.release();
+      signal AccelY.readDone(errorResult, readResult);
+      break;
+    case S_GET_YH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_YL;
+      call Hpl.getReg(LIS3L02DQ_OUTY_L);
+      break;
+    case S_GET_ZL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelZResource.release();
+      signal AccelZ.readDone(errorResult, readResult);
+      break;
+    case S_GET_ZH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_ZL;
+      call Hpl.getReg(LIS3L02DQ_OUTZ_L);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t AccelX.read() {
+    return call AccelXResource.request();
+  }
+  command error_t AccelY.read() {
+    return call AccelYResource.request();
+  }
+  command error_t AccelZ.read() {
+    return call AccelZResource.request();
+  }
+  
+  event void AccelXResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTX_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_XL;
+      post complete_Task();
+    }
+    state = S_GET_XH;
+  }
+
+  event void AccelYResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTY_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_YL;
+      post complete_Task();
+    }
+    state = S_GET_YH;
+  }
+
+  event void AccelZResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTZ_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_ZL;
+      post complete_Task();
+    }
+    state = S_GET_ZH;
+  }
+
+  async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    errorResult |= error;
+    byteResult = val;
+    post complete_Task();
+  }
+
+  async event void Hpl.setRegDone( error_t error , uint8_t regAddr, uint8_t val) {
+    // intentionally left blank
+  }
+
+  async event void Hpl.alertThreshold() { }
+}
diff --git a/tos/chips/lis3l02dq/HplLIS3L02DQ.nc b/tos/chips/lis3l02dq/HplLIS3L02DQ.nc
new file mode 100644
index 00000000..1d4378f3
--- /dev/null
+++ b/tos/chips/lis3l02dq/HplLIS3L02DQ.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Hpl interface for the ST LIS3L02DQ 3-Axis Accelerometer
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+interface HplLIS3L02DQ {
+
+  command error_t getReg(uint8_t regAddr);
+  async event void getRegDone( error_t error, uint8_t regAddr, uint8_t val);
+
+  command error_t setReg( uint8_t regAddr, uint8_t val);
+  async event void setRegDone( error_t error , uint8_t regAddr, uint8_t val);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc b/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc
new file mode 100644
index 00000000..610cbbab
--- /dev/null
+++ b/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * This module is the driver components for the ST LIS3L02DQ 3-axis 
+ * accelerometer in the 4 wire SPI mode. It requires the SPI packet
+ * interface and provides the HplLIS3L02DQ HPL interface.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+module HplLIS3L02DQLogicSPIP
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplLIS3L02DQ;
+
+  uses interface SpiPacket;
+  uses interface GpioInterrupt as InterruptAlert;
+
+  uses interface HplPXA27xGPIOPin as SPIRxD;
+  uses interface HplPXA27xGPIOPin as SPITxD;
+  uses interface HplPXA27xGPIOPin as SPICLK;
+  uses interface HplPXA27xGPIOPin as SPIFRM;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_GETREG,
+    STATE_SETREG,
+    STATE_ERROR
+  };
+
+  uint8_t mSPIRxBuf[4],mSPITxBuf[4];
+  uint8_t mState;
+  bool misInited = FALSE;
+  norace error_t mSSError;
+
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(SUCCESS);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    atomic {
+      if (!misInited) {
+	misInited = TRUE;
+	mState = STATE_STOPPED;
+      }
+      call SPICLK.setGAFRpin(SSP1_SCLK_ALTFN);
+      call SPICLK.setGPDRbit(TRUE);
+
+      // Control CS pin manually
+      call SPIFRM.setGPSRbit(); // CS HIGH
+      call SPIFRM.setGPDRbit(TRUE);
+      //call SPIFRM.setGAFRpin(SSP1_SFRM_ALTFN);
+
+      call SPIRxD.setGAFRpin(SSP1_RXD_ALTFN);
+      call SPIRxD.setGPDRbit(FALSE);
+      call SPITxD.setGAFRpin(SSP1_TXD_ALTFN);
+      call SPITxD.setGPDRbit(TRUE);
+    }
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) 
+      return error;
+
+    mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1;
+    mSPITxBuf[1] = 0;
+    mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(1) | /*LIS3L01DQ_CTRL_REG1_ST |*/ LIS3L01DQ_CTRL_REG1_XEN | LIS3L01DQ_CTRL_REG1_YEN | LIS3L01DQ_CTRL_REG1_ZEN);
+    call SPIFRM.setGPCRbit(); // CS LOW
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+    return error;
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_STOPPING;
+      }
+      else { 
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    return post StopDone();
+  }
+  
+  command error_t HplLIS3L02DQ.getReg(uint8_t regAddr) {
+    error_t error = SUCCESS;
+
+    if((regAddr < 0x16) || (regAddr > 0x2F)) {
+      error = EINVAL;
+      return error;
+    }
+    mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit
+    mSPIRxBuf[1] = 0;
+    mState = STATE_GETREG;
+    call SPIFRM.setGPCRbit(); // CS LOW
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+
+    return error;
+
+  }
+  
+  command error_t HplLIS3L02DQ.setReg(uint8_t regAddr, uint8_t val) {
+    error_t error = SUCCESS;
+
+    if((regAddr < 0x16) || (regAddr > 0x2F)) {
+      error = EINVAL;
+      return error;
+    }
+    mSPITxBuf[0] = regAddr;
+    mSPITxBuf[1] = val;
+    mState = STATE_SETREG;
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+
+    return error;
+  }
+
+  async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) {
+    error_t error = spi_error;
+
+    switch (mState) {
+    case STATE_GETREG:
+      mState = STATE_IDLE;
+      call SPIFRM.setGPSRbit(); // CS HIGH
+      signal HplLIS3L02DQ.getRegDone(error, (txBuf[0] & 0x7F) , rxBuf[1]);
+      break;
+    case STATE_SETREG:
+      mState = STATE_IDLE;
+      signal HplLIS3L02DQ.setRegDone(error, (txBuf[0] & 0x7F), txBuf[1]);
+      break;
+    case STATE_STARTING:
+      mState = STATE_IDLE;
+      call SPIFRM.setGPSRbit();
+      post StartDone();
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the MAX136x is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplLIS3L02DQ.alertThreshold();
+    return;
+  }
+
+  async event void SPITxD.interruptGPIOPin() {}
+  async event void SPIRxD.interruptGPIOPin() {}
+  async event void SPICLK.interruptGPIOPin() {}
+  async event void SPIFRM.interruptGPIOPin() {}
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+
+  default async event void HplLIS3L02DQ.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/lis3l02dq/LIS3L02DQ.h b/tos/chips/lis3l02dq/LIS3L02DQ.h
new file mode 100644
index 00000000..2a578edd
--- /dev/null
+++ b/tos/chips/lis3l02dq/LIS3L02DQ.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the ST LIS3L02DQ 3-axis Accelerometer
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef _LIS3L02DQ_H
+#define _LIS3L02DQ_H
+
+#define LIS3L02DQ_OFFSET_X		(0x16)
+#define LIS3L02DQ_OFFSET_Y		(0x17)
+#define LIS3L02DQ_OFFSET_Z		(0x18)
+#define LIS3L02DQ_GAIN_X		(0x19)
+#define LIS3L02DQ_GAIN_Y		(0x1A)
+#define LIS3L02DQ_GAIN_Z		(0x1B)
+
+#define LIS3L02DQ_CTRL_REG1		(0x20)
+#define LIS3L02DQ_CTRL_REG2		(0x21)
+
+#define LIS3L02DQ_WAKE_UP_CFG		(0x23)
+#define LIS3L02DQ_WAKE_UP_SRC		(0x24)
+#define LIS3L02DQ_WAKE_UP_ACK		(0x25)
+
+#define LIS3L02DQ_STATUS_REG		(0x27)
+
+#define LIS3L02DQ_OUTX_L		(0x28)
+#define LIS3L02DQ_OUTX_H		(0x29)
+#define LIS3L02DQ_OUTY_L		(0x2A)
+#define LIS3L02DQ_OUTY_H		(0x2B)
+#define LIS3L02DQ_OUTZ_L		(0x2C)
+#define LIS3L02DQ_OUTZ_H		(0x2D)
+
+#define LIS3L02DQ_THS_L			(0x2E)
+#define LIS3L02DQ_THS_H			(0x2F)
+
+#define LIS3L01DQ_CTRL_REG1_PD(_x)	(((_x) & 0x3) << 6)
+#define LIS3L01DQ_CTRL_REG1_DF(_x)	(((_x) & 0x3) << 4)
+#define LIS3L01DQ_CTRL_REG1_ST		(1 << 3)
+#define LIS3L01DQ_CTRL_REG1_ZEN		(1 << 2)
+#define LIS3L01DQ_CTRL_REG1_YEN		(1 << 1)
+#define LIS3L01DQ_CTRL_REG1_XEN		(1 << 1)
+
+#define LIS3L01DQ_CTRL_REG2_RES		(1 << 7)
+#define LIS3L01DQ_CTRL_REG2_BDU		(1 << 6)
+#define LIS3L01DQ_CTRL_REG2_BLE		(1 << 5)
+#define LIS3L01DQ_CTRL_REG2_BOOT	(1 << 4)
+#define LIS3L01DQ_CTRL_REG2_IEN		(1 << 3)
+#define LIS3L01DQ_CTRL_REG2_DRDY	(1 << 2)
+#define LIS3L01DQ_CTRL_REG2_SIM		(1 << 1)
+#define LIS3L01DQ_CTRL_REG2_DAS		(1 << 0)
+
+#define LIS3L02DQ_WAKE_UP_CFG_AOI	(1 << 7)
+#define LIS3L02DQ_WAKE_UP_CFG_LIR	(1 << 6)
+#define LIS3L02DQ_WAKE_UP_CFG_ZHIE	(1 << 5)
+#define LIS3L02DQ_WAKE_UP_CFG_ZLIE	(1 << 4)
+#define LIS3L02DQ_WAKE_UP_CFG_YHIE	(1 << 3)
+#define LIS3L02DQ_WAKE_UP_CFG_YLIE	(1 << 2)
+#define LIS3L02DQ_WAKE_UP_CFG_XHIE	(1 << 1)
+#define LIS3L02DQ_WAKE_UP_CFG_XLIE	(1 << 0)
+
+typedef enum {
+  LIS_AFLAGS_NONE,
+  LIS_AFLAGS_HIGH,
+  LIS_AFLAGS_LOW,
+  LIS_AFLAGS_BOTH
+} lis_alertflags_t;
+
+#endif /* _LIS3L02DQ_H */
diff --git a/tos/chips/max136x/HalMAX136xAdvanced.nc b/tos/chips/max136x/HalMAX136xAdvanced.nc
new file mode 100644
index 00000000..9513efe6
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xAdvanced.nc
@@ -0,0 +1,57 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+interface HalMAX136xAdvanced {
+  command error_t setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh);
+  event void setScanModeDone(error_t error);
+  command error_t setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]); 
+  event void setMonitorModeDone(error_t error);
+  command error_t setConversionMode(bool bDifferential, bool bBipolar);
+  event void setConversionModeDone(error_t error);  
+  command error_t setClock(bool bExtClk);
+  event void setClockDone(error_t error); 
+  command error_t setRef(max136x_selflag_t sel, bool bInRefPwr);
+  event void setRefDone(error_t error);
+  command error_t getStatus();
+  event void getStatusDone(error_t error, uint8_t status, 
+                           max136x_data_t data);
+  command error_t enableAlert(bool bEnable);
+  event void enableAlertDone(error_t error);
+  event void alertThreshold();
+
+}
diff --git a/tos/chips/max136x/HalMAX136xControlP.nc b/tos/chips/max136x/HalMAX136xControlP.nc
new file mode 100644
index 00000000..1ada0311
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xControlP.nc
@@ -0,0 +1,224 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+module HalMAX136xControlP {
+  provides interface HalMAX136xAdvanced;
+
+  uses interface Resource;
+  uses interface HplMAX136x;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_SETSCANMODE,
+    S_SETMONMODE,
+    S_SETCONVMODE,
+    S_SETCLK,
+    S_SETREF,
+  };
+  uint8_t state = S_IDLE;
+
+  uint8_t mI2CBuffer[8];
+  uint8_t configByteShadow = 0x01;
+  uint8_t setupByteShadow = 0x83; // 0x82 actually, but we want extended monitor write
+  uint8_t monitorByteShadow = 0x0;
+
+  error_t clientResult;
+
+  task void signalDone_Task() {
+    switch(state) {
+    case S_SETSCANMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setScanModeDone(clientResult);
+      break;
+    case S_SETMONMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setMonitorModeDone(clientResult);
+      break;
+    case S_SETCONVMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setConversionModeDone(clientResult);
+      break;
+    case S_SETCLK:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setClockDone(clientResult);
+      break;
+    case S_SETREF:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setRefDone(clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t HalMAX136xAdvanced.setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh) {
+    // chanlow is always 0 no matter what client says
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETSCANMODE;
+
+    configByteShadow &= ~MAX136X_CONFIG_SCAN(3);
+    configByteShadow |= MAX136X_CONFIG_SCAN(mode);
+
+    configByteShadow &= ~MAX136X_CONFIG_CS(3);
+    configByteShadow |= MAX136X_CONFIG_CS(chanhigh);
+
+    mI2CBuffer[0] = configByteShadow;
+
+    call HplMAX136x.setConfig(mI2CBuffer, 1);
+    return SUCCESS;
+  }
+
+  command error_t HalMAX136xAdvanced.setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]) {
+    // chanlow is always 0 no matter what client says
+    uint8_t i;
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETMONMODE;
+
+    configByteShadow &= ~MAX136X_CONFIG_CS(3);
+    configByteShadow |= MAX136X_CONFIG_CS(chanhigh);
+
+    monitorByteShadow &= ~MAX136X_MONITOR_DELAY(7);
+    monitorByteShadow |= MAX136X_MONITOR_DELAY(delay);
+
+    mI2CBuffer[0] = configByteShadow;
+    mI2CBuffer[1] = setupByteShadow;
+    mI2CBuffer[2] = monitorByteShadow;
+    for(i = 0; i < 12; i++)
+      mI2CBuffer[i+3] = thresholds[i];
+    
+    call HplMAX136x.setConfig(mI2CBuffer, 15);
+    return SUCCESS;
+  } 
+
+  command error_t HalMAX136xAdvanced.setConversionMode(bool bDifferential, bool bBipolar) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETCONVMODE;
+
+    if(bDifferential)
+      configByteShadow &= ~MAX136X_CONFIG_SE;
+    else
+      configByteShadow |= MAX136X_CONFIG_SE;
+
+    if(bBipolar)
+      setupByteShadow |= MAX136X_SETUP_BIP;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_BIP;
+
+    mI2CBuffer[0] = configByteShadow;
+    mI2CBuffer[1] = setupByteShadow;
+    call HplMAX136x.setConfig(mI2CBuffer, 2);
+    return SUCCESS;
+  }
+
+  command error_t HalMAX136xAdvanced.setClock(bool bExtClk) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETCLK;
+
+    if(bExtClk)
+      setupByteShadow |= MAX136X_SETUP_EXTCLK;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_EXTCLK;
+
+    mI2CBuffer[0] = setupByteShadow;
+    call HplMAX136x.setConfig(mI2CBuffer, 1);
+    return SUCCESS;
+  }
+  
+  command error_t HalMAX136xAdvanced.setRef(max136x_selflag_t sel, bool bInRefPwr) {    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETREF;
+    
+    if(bInRefPwr)
+      setupByteShadow |= MAX136X_SETUP_INTREFOFF;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_INTREFOFF;
+
+    setupByteShadow &=  ~MAX136X_SETUP_REFAIN3SEL(3);
+    setupByteShadow |= MAX136X_SETUP_REFAIN3SEL(sel);
+  }
+
+  command error_t HalMAX136xAdvanced.getStatus() {
+    // STUB
+  }
+
+  command error_t HalMAX136xAdvanced.enableAlert(bool bEnable) {
+    // STUB
+  }
+
+  event void Resource.granted() {
+    // intentionally left blank
+  }
+
+  async event void HplMAX136x.measureChannelsDone( error_t error, uint8_t *buf, uint8_t len ) { /* intentionally left blank */ }
+  async event void HplMAX136x.setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len) {
+    clientResult = error;
+    post signalDone_Task();
+  }
+  async event void HplMAX136x.alertThreshold() {}
+}
diff --git a/tos/chips/max136x/HalMAX136xReaderP.nc b/tos/chips/max136x/HalMAX136xReaderP.nc
new file mode 100644
index 00000000..05867cbf
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xReaderP.nc
@@ -0,0 +1,87 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+generic module HalMAX136xReaderP()
+{
+  provides interface Read as ADC;
+
+  uses interface HplMAX136x;
+  uses interface Resource as MAX136xResource;
+}
+
+implementation {
+
+  uint8_t channelBuf[2];
+  
+  command error_t ADC.read() {
+    return call MAX136xResource.request();
+  }
+
+  event void MAX136xResource.granted() {
+    error_t error;
+
+    error = call HplMAX136x.measureChannels(channelBuf, 2);
+    if (error) {
+      call MAX136xResource.release();
+      signal ADC.readDone(error,0);
+    }
+  }
+
+  async event void HplMAX136x.measureChannelsDone(error_t error,
+						  uint8_t *buf,
+						  uint8_t len)
+  {
+    uint16_t result = 0;
+    result = buf[0];
+    result <<= 8;
+    result += buf[1];
+    call MAX136xResource.release();
+    signal ADC.readDone(error,result);
+    return;
+  }
+
+  async event void HplMAX136x.setConfigDone(error_t error,
+					    uint8_t *cfgbuf,
+					    uint8_t len)
+  {
+    // intentionally left blank
+  }
+
+  async event void HplMAX136x.alertThreshold() {}
+
+}
diff --git a/tos/chips/max136x/HplMAX136x.nc b/tos/chips/max136x/HplMAX136x.nc
new file mode 100644
index 00000000..be109b78
--- /dev/null
+++ b/tos/chips/max136x/HplMAX136x.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Hpl interface for the MAXIM 136x series ADC chips.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+interface HplMAX136x {
+
+  command error_t measureChannels(uint8_t *buf,uint8_t len);
+  async event void measureChannelsDone( error_t error, uint8_t *buf, uint8_t len );
+
+  command error_t setConfig( uint8_t *cfgbuf, uint8_t len);
+  async event void setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/max136x/HplMAX136xLogicP.nc b/tos/chips/max136x/HplMAX136xLogicP.nc
new file mode 100644
index 00000000..071f0742
--- /dev/null
+++ b/tos/chips/max136x/HplMAX136xLogicP.nc
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * MAX136xLogicP is the driver for the MAXIM 136x series ADC chip. 
+ * It requires an I2C packet interface and provides the HplMAX136x HPL
+ * interface.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#include "I2C.h"
+
+generic module HplMAX136xLogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplMAX136x;
+
+  uses interface I2CPacket;
+  uses interface GpioInterrupt as InterruptAlert;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READCH,
+    STATE_SETCONFIG,
+    STATE_ERROR
+  };
+
+  uint8_t mState;
+  bool mStopRequested;
+  norace error_t mSSError;
+
+  static error_t doWrite(uint8_t nextState, uint8_t *buf, uint8_t len) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) { 
+	mState = nextState;
+      }
+      else {
+	error = EBUSY; 
+      }
+    }
+    if (error)
+      return error;
+
+    error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr,len,buf);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doRead(uint8_t nextState, uint8_t *buf, uint8_t len) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,len,buf);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(SUCCESS);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    atomic {
+      mStopRequested = FALSE;
+      mState = STATE_STOPPED;
+    }
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) 
+      return error;
+    
+    return post StartDone();
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_STOPPING;
+      }
+      else { 
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    return post StopDone();
+  }
+
+  
+  command error_t HplMAX136x.measureChannels(uint8_t *buf, uint8_t len) { 
+    return doRead(STATE_READCH,buf,len);
+  }
+
+  command error_t HplMAX136x.setConfig(uint8_t *configbuf, uint8_t len) {
+    return doWrite(STATE_SETCONFIG,configbuf,len);
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_READCH:
+      mState = STATE_IDLE;
+      signal HplMAX136x.measureChannelsDone(error, buf, len);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_SETCONFIG:
+      mState = STATE_IDLE;
+      signal HplMAX136x.setConfigDone(error,buf,len);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the MAX136x is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplMAX136x.alertThreshold();
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+
+  default async event void HplMAX136x.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/max136x/MAX136x.h b/tos/chips/max136x/MAX136x.h
new file mode 100644
index 00000000..32a391c6
--- /dev/null
+++ b/tos/chips/max136x/MAX136x.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Maxim 136x general purpose ADC chip
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef _MAX136X_H
+#define _MAX136X_H
+
+#define MAX136X_CONFIG_SCAN(_x)		(((_x) & 0x3) << 5)
+#define MAX136X_CONFIG_CS(_x)		(((_x) & 0xF) << 1)
+#define MAX136X_CONFIG_SE		(1 << 0)
+
+#define MAX136X_SETUP_REFAIN3SEL(_x)	(((_x) & 0x3) << 5)
+#define MAX136X_SETUP_INTREFOFF		(1 << 4)
+#define MAX136X_SETUP_EXTCLK		(1 << 3)
+#define MAX136X_SETUP_BIP		(1 << 2)
+#define MAX136X_SETUP_NRESET		(1 << 1)
+#define MAX136X_SETUP_MONSETUP		(1 << 0)
+
+#define MAX136X_MONITOR_DELAY(_x)       (((_x) & 0x7) << 1)
+
+typedef uint16_t max136x_data_t;
+
+typedef enum {
+  MAX136X_SCAN_RANGE = 0,
+  MAX136X_SCAN_REPEATED = 1,
+  MAX136X_SCAN_SINGLE = 3,
+} max136x_scanflag_t;
+
+typedef enum {
+  MAX136X_SEL_VDDREF,  		// SEL1 = 0, SEL0 = 0
+  MAX136X_SEL_EXTREF,		// SEL1 = 0, SEL0 = 1
+  MAX136X_SEL_INTREF_AIN3IN,	// SEL1 = 1, SEL0 = 0
+  MAX136X_SEL_INTREF_AIN3OUT	// SEL1 = 1, SEL0 = 1
+} max136x_selflag_t;
+
+typedef enum {
+  MAX136X_DELAY_133_0,
+  MAX136X_DELAY_66_5,
+  MAX136X_DELAY_33_3,
+  MAX136X_DELAY_16_6,
+  MAX136X_DELAY_8_3,
+  MAX136X_DELAY_4_2,
+  MAX136X_DELAY_2_0,
+  MAX136X_DELAY_1_0
+} max136x_delayflag_t;
+
+
+#endif /* _MAX136X_H */
diff --git a/tos/chips/mm74hc595/MM74HC595C.nc b/tos/chips/mm74hc595/MM74HC595C.nc
new file mode 100644
index 00000000..a5cce551
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595C.nc
@@ -0,0 +1,130 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * This configuration provides 'virtual' output pins using the 
+ * mm74hc595 Serial-In Parallel-Out (SIPO) chip from Fairchild Semiconductor.
+ *
+ * This driver expects to find a HPL module called HplMM74HC595PinsC (that should 
+ * be implemented for a platform or sensorboard) providing GeneralIO interfaces for 
+ * the three physical pins of the MM74HC595 that it uses.
+ *
+ * These virtual output pins are presented as implementing the 
+ * GeneralIO interface. Calling GeneralIO.makeOutput() or GeneralIO.makeInput() 
+ * has no effect -- these pins are always outputs.
+ * 
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration MM74HC595C {
+  provides interface GeneralIO as VirtualPin0; // Q_A on MM74HC595 datasheet
+  provides interface GeneralIO as VirtualPin1; // Q_B
+  provides interface GeneralIO as VirtualPin2; // Q_C
+  provides interface GeneralIO as VirtualPin3; // Q_D
+  provides interface GeneralIO as VirtualPin4; // Q_E
+  provides interface GeneralIO as VirtualPin5; // Q_F
+  provides interface GeneralIO as VirtualPin6; // Q_G
+  provides interface GeneralIO as VirtualPin7; // Q_H
+}
+implementation {
+
+  components MM74HC595ImplP, HplMM74HC595PinsC;
+  MM74HC595ImplP.Ser -> HplMM74HC595C.Ser;
+  MM74HC595ImplP.Sck -> HplMM74HC595C.Sck;
+  MM74HC595ImplP.Rck -> HplMM74HC595C.Rck;
+
+  components MainC;
+  MainC.SoftwareInit -> MM74HC595ImplP.Init;
+
+  components BusyWaitMicroC;
+  MM74HC595ImplP.BusyWait -> BusyWaitMicroC;
+
+  components new MM74HC595P(0) as VPin0;
+  VPin0.set -> MM74HC595ImplP.set;
+  VPin0.get -> MM74HC595ImplP.get;
+  VPin0.toggle -> MM74HC595ImplP.toggle;
+  VPin0.clr -> MM74HC595ImplP.clr;
+  VirtualPin0 = VPin0;
+
+  components new MM74HC595P(1) as VPin1;
+  VPin1.set -> MM74HC595ImplP.set;
+  VPin1.get -> MM74HC595ImplP.get;
+  VPin1.toggle -> MM74HC595ImplP.toggle;
+  VPin1.clr -> MM74HC595ImplP.clr;
+  VirtualPin1 = VPin1;
+
+  components new MM74HC595P(2) as VPin2;
+  VPin2.set -> MM74HC595ImplP.set;
+  VPin2.get -> MM74HC595ImplP.get;
+  VPin2.toggle -> MM74HC595ImplP.toggle;
+  VPin2.clr -> MM74HC595ImplP.clr;
+  VirtualPin2 = VPin2;
+
+  components new MM74HC595P(3) as VPin3;
+  VPin3.set -> MM74HC595ImplP.set;
+  VPin3.get -> MM74HC595ImplP.get;
+  VPin3.toggle -> MM74HC595ImplP.toggle;
+  VPin3.clr -> MM74HC595ImplP.clr;
+  VirtualPin3 = VPin3;
+
+  components new MM74HC595P(4) as VPin4;
+  VPin4.set -> MM74HC595ImplP.set;
+  VPin4.get -> MM74HC595ImplP.get;
+  VPin4.toggle -> MM74HC595ImplP.toggle;
+  VPin4.clr -> MM74HC595ImplP.clr;
+  VirtualPin4 = VPin4;
+
+  components new MM74HC595P(5) as VPin5;
+  VPin5.set -> MM74HC595ImplP.set;
+  VPin5.get -> MM74HC595ImplP.get;
+  VPin5.toggle -> MM74HC595ImplP.toggle;
+  VPin5.clr -> MM74HC595ImplP.clr;
+  VirtualPin5 = VPin5;
+
+  components new MM74HC595P(6) as VPin6;
+  VPin6.set -> MM74HC595ImplP.set;
+  VPin6.get -> MM74HC595ImplP.get;
+  VPin6.toggle -> MM74HC595ImplP.toggle;
+  VPin6.clr -> MM74HC595ImplP.clr;
+  VirtualPin6 = VPin6;
+
+  components new MM74HC595P(7) as VPin7;
+  VPin7.set -> MM74HC595ImplP.set;
+  VPin7.get -> MM74HC595ImplP.get;
+  VPin7.toggle -> MM74HC595ImplP.toggle;
+  VPin7.clr -> MM74HC595ImplP.clr;
+  VirtualPin7 = VPin7;
+
+}
+  
diff --git a/tos/chips/mm74hc595/MM74HC595ImplP.nc b/tos/chips/mm74hc595/MM74HC595ImplP.nc
new file mode 100644
index 00000000..b5cddcde
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595ImplP.nc
@@ -0,0 +1,124 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * mm74hc595 driver internals.
+ * 
+ * @author Henri Dubois-Ferriere
+ *
+ */
+ 
+
+module MM74HC595ImplP
+{
+  provides interface Init @atleastonce();
+  provides async command void set(uint8_t pin);
+  provides async command bool get(uint8_t pin);
+  provides async command void clr(uint8_t pin);
+  provides async command void toggle(uint8_t pin);
+  uses interface GeneralIO as Ser;
+  uses interface GeneralIO as Rck;
+  uses interface GeneralIO as Sck;
+  uses interface BusyWait;
+}
+
+implementation
+{
+  enum {
+    npins = 8
+  };
+
+  uint8_t state;
+
+  void writeState() {
+    uint8_t i, s;    
+    atomic s = state;
+
+    call Rck.clr();
+    for (i = 0; i < npins; i++) {
+      call Sck.clr();
+      if (s & 0x80) {
+	call Ser.set();
+      } else {
+	call Ser.clr();
+      }
+      call Sck.set();
+      s <<= 1;
+    }
+    call Rck.set();
+    call Sck.clr();
+    call Ser.clr();
+    call Rck.clr();
+  }
+
+
+  command error_t Init.init() {
+    state  = 0;
+
+    call Ser.makeOutput();
+    call Sck.makeOutput();
+    call Rck.makeOutput();
+
+    call Sck.clr();
+    call Rck.clr();
+    call Ser.clr();
+    writeState();
+    return SUCCESS;
+  }
+
+
+  async command void set(uint8_t pin) {
+    atomic {
+      state |= (1 << pin);
+      writeState();
+    }
+  }
+
+  async command bool get(uint8_t pin) {
+    atomic return (state >> pin) & 1;
+  }
+
+  async command void clr(uint8_t pin) {
+    atomic {
+      state &=  ~(1 << pin);
+      writeState();
+    }
+  }
+
+  async command void toggle(uint8_t pin) {
+    if (call get(pin))
+      call clr(pin);
+    else
+      call set(pin);
+  }
+}  
diff --git a/tos/chips/mm74hc595/MM74HC595P.nc b/tos/chips/mm74hc595/MM74HC595P.nc
new file mode 100644
index 00000000..8e1abeb4
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595P.nc
@@ -0,0 +1,69 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ * This is an internal module of the mm74hc595 Serial-In Parallel-Out (SIPO) driver.
+ * Do not wire to this -- use MM74HC595C instead.
+ *
+ */
+generic module MM74HC595P(uint8_t outaddr) 
+{
+  provides interface GeneralIO;
+  uses async command void set(uint8_t pin);
+  uses async command bool get(uint8_t pin);
+  uses async command void clr(uint8_t pin);
+  uses async command void toggle(uint8_t pin);
+
+}
+
+implementation
+{
+  async command void GeneralIO.set() {
+    call set(outaddr);
+  }
+  async command bool GeneralIO.get() {
+    return call get(outaddr);
+  }
+  async command void GeneralIO.clr() {
+    call clr(outaddr);
+  }
+  async command void GeneralIO.toggle() {
+    call toggle(outaddr);
+  }
+  async command void GeneralIO.makeInput() {
+  }
+  async command void GeneralIO.makeOutput() {
+  }
+}  
diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/McuSleepC.nc
new file mode 100644
index 00000000..dd9f5e17
--- /dev/null
+++ b/tos/chips/msp430/McuSleepC.nc
@@ -0,0 +1,125 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the MSP430. Code for low power calculation copied from older
+ * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp.
+ *
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski
+ * @author Joe Polastre
+ * @author Cory Sharp
+ * @date   October 26, 2005
+ * @see  Please refer to TEP 112 for more information about this component and its
+ *          intended use.
+ *
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  bool dirty = TRUE;
+  mcu_power_t powerState = MSP430_POWER_ACTIVE;
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm128hardware.h and page 42 of the ATmeg128
+   * manual (figure 17).*/
+  // NOTE: This table should be in progmem.
+  const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = {
+    0,                                       // ACTIVE
+    SR_CPUOFF,                               // LPM0
+    SR_SCG0+SR_CPUOFF,                       // LPM1
+    SR_SCG1+SR_CPUOFF,                       // LPM2
+    SR_SCG1+SR_SCG0+SR_CPUOFF,               // LPM3
+    SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF,     // LPM4
+  };
+    
+  mcu_power_t getPowerState() {
+    mcu_power_t pState = MSP430_POWER_LPM3;
+    // TimerA, USART0, USART1 check
+    if ((((TACCTL0 & CCIE) ||
+	  (TACCTL1 & CCIE) ||
+	  (TACCTL2 & CCIE)) &&
+	 ((TACTL & TASSEL_3) == TASSEL_2)) ||
+	((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
+	((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
+#ifdef __msp430_have_usart0_with_i2c
+	 // registers end in "nr" to prevent nesC race condition detection
+	 || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
+	     (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
+#endif
+	)
+      pState = MSP430_POWER_LPM1;
+    // ADC12 check
+    if (ADC12CTL1 & ADC12BUSY){
+      if (!(ADC12CTL0 & MSC) && ((TACTL & TASSEL_3) == TASSEL_2))
+	pState = MSP430_POWER_LPM1;
+      else
+        switch (ADC12CTL1 & ADC12SSEL_3) {
+	case ADC12SSEL_2:
+	  pState = MSP430_POWER_ACTIVE;
+	  break;
+	case ADC12SSEL_3:
+	  pState = MSP430_POWER_LPM1;
+	  break;
+        }
+    }
+    return pState;
+  }
+  
+  void computePowerState() {
+    powerState = mcombine(getPowerState(),
+			  call McuPowerOverride.lowestState());
+  }
+  
+  async command void McuSleep.sleep() {
+    uint16_t temp;
+    if (dirty) {
+      computePowerState();
+      //dirty = 0;
+    }
+    temp = msp430PowerBits[powerState] | SR_GIE;
+    __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
+    __nesc_disable_interrupt();
+  }
+
+  async command void McuPowerState.update() {
+    atomic dirty = 1;
+  }
+
+ default async command mcu_power_t McuPowerOverride.lowestState() {
+   return MSP430_POWER_LPM4;
+ }
+
+}
diff --git a/tos/chips/msp430/adc12/AdcC.nc b/tos/chips/msp430/adc12/AdcC.nc
new file mode 100644
index 00000000..27fa2df7
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcC.nc
@@ -0,0 +1,310 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component represents the HAL2 of the MSP430 ADC12
+ * subsystem. Clients SHOULD NOT wire to AdcC directly but should
+ * go via AdcReadClientC, AdcReadNowClientC or
+ * AdcReadStreamClientC.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+module AdcC {
+  provides {
+    interface Read as Read[uint8_t client];
+    interface ReadNow as ReadNow[uint8_t client];
+    interface ReadStream as ReadStream[uint8_t rsClient];
+  }
+  uses {
+    // for Read only:
+    interface Resource as Resource[uint8_t client];
+    // for Read and ReadNow:
+    interface Msp430Adc12Config as Config[uint8_t client];
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client];
+    // for ReadStream only:
+    interface Msp430Adc12Config as ConfigReadStream[uint8_t rsClient];
+    interface Msp430Adc12SingleChannel as SingleChannelReadStream[uint8_t rsClient];
+    interface Resource as ResourceReadStream[uint8_t rsClient];
+  }
+}
+implementation
+{
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t *next;
+  };
+  
+  // Resource interface makes norace declaration safe
+  norace bool readSync;
+  norace uint8_t owner;
+  norace uint16_t value;
+  norace uint16_t *resultBuf; 
+  // atomic section in postBuffer() makes norace safe
+  norace struct list_entry_t *streamBuf[uniqueCount(ADCC_READ_STREAM_SERVICE)];
+  norace uint32_t usPeriod[uniqueCount(ADCC_READ_STREAM_SERVICE)];
+  msp430adc12_channel_config_t streamSettings;
+    
+  void task finishStreamRequest();
+  void task signalBufferDone();
+  void nextReadStreamRequest(uint8_t rsClient);
+  
+  command error_t Read.read[uint8_t client]()
+  {
+    return call Resource.request[client]();
+  }
+  
+  async command error_t ReadNow.read[uint8_t client]()
+  {
+    msp430adc12_channel_config_t settings;
+    error_t hal1request;
+    
+    settings = call Config.getChannelSettings[client]();
+    if (settings.inch == INPUT_CHANNEL_NONE)
+      return EINVAL; // Config not wired ?!
+    
+    // There is no automatic Resource reservation for ReadNow, 
+    // but getSingleData() will fail if the client has not
+    // reserved, because HAL1 checks ownership at runtime
+    hal1request = call SingleChannel.getSingleData[client](&settings);
+    return hal1request;
+  }
+
+  event void Resource.granted[uint8_t client]() 
+  {
+    // signalled only for Read
+    msp430adc12_channel_config_t settings;
+    error_t hal1request;
+    
+    settings = call Config.getChannelSettings[client]();
+    if (settings.inch == INPUT_CHANNEL_NONE){
+      call Resource.release[client]();
+      signal Read.readDone[client](EINVAL, 0);
+      return;
+    }
+    readSync = TRUE;
+    hal1request = call SingleChannel.getSingleData[client](&settings);
+    if (hal1request != SUCCESS){
+      readSync = FALSE;
+      call Resource.release[client]();
+      signal Read.readDone[client](FAIL, 0);
+    }
+  }
+  
+  void task readDone()
+  {
+    call Resource.release[owner]();
+    signal Read.readDone[owner](SUCCESS, value);
+  }
+
+  async event error_t SingleChannel.singleDataReady[uint8_t client](uint16_t data)
+  {
+    if (readSync){ // was Read.read request
+      readSync = FALSE;
+      owner = client;
+      value = data;
+      post readDone();
+    } else { // was ReadNow.read request
+      signal ReadNow.readDone[client](SUCCESS, data);
+    }
+    return SUCCESS;
+  }
+
+  async event uint16_t* SingleChannel.multipleDataReady[uint8_t client](
+      uint16_t *buf, uint16_t length)
+  {
+    // won't happen
+    return 0;
+  }
+  
+  
+  command error_t ReadStream.postBuffer[uint8_t rsClient]( uint16_t* buf, uint16_t count )
+  {
+    struct list_entry_t *newEntry = (struct list_entry_t *) buf;
+    
+    newEntry->count = count;
+    newEntry->next = 0;
+    atomic {
+      if (!streamBuf[rsClient])
+        streamBuf[rsClient] = newEntry;
+      else {
+        struct list_entry_t *tmp = streamBuf[rsClient];
+        while (tmp->next)
+          tmp = tmp->next;
+        tmp->next = newEntry;
+      }
+    }
+    return SUCCESS;
+  }
+  
+  command error_t ReadStream.read[uint8_t rsClient]( uint32_t _usPeriod )
+  {
+    error_t requested = call ResourceReadStream.request[rsClient]();
+    if (requested != SUCCESS || !streamBuf[rsClient])
+      return FAIL;
+    usPeriod[rsClient] = _usPeriod;
+    return SUCCESS;
+  }
+  
+  event void ResourceReadStream.granted[uint8_t rsClient]() 
+  {
+    error_t hal1request;
+    struct list_entry_t *entry = streamBuf[rsClient];
+    msp430adc12_channel_config_t settings = 
+      call ConfigReadStream.getChannelSettings[rsClient]();
+    
+    if (!entry || settings.inch == INPUT_CHANNEL_NONE){
+      // no buffers available
+      call ResourceReadStream.release[rsClient]();
+      signal ReadStream.readDone[rsClient]( FAIL, 0 );
+      return;
+    }
+    owner = rsClient;
+    streamSettings = settings;
+    streamSettings.sampcon_ssel = SAMPCON_SOURCE_SMCLK; // assumption: SMCLK runs at 1 MHz
+    streamSettings.sampcon_id = SAMPCON_CLOCK_DIV_1; 
+    streamBuf[rsClient] = entry->next;
+    hal1request = call SingleChannelReadStream.getMultipleData[rsClient](
+      &streamSettings, (uint16_t *) entry, entry->count, usPeriod[rsClient]);
+    if (hal1request != SUCCESS){
+      streamBuf[rsClient] = entry;
+      post finishStreamRequest();
+      return;
+    }
+  }
+
+  void task finishStreamRequest()
+  {
+    call ResourceReadStream.release[owner]();
+    if (!streamBuf[owner])
+      // all posted buffers were filled
+      signal ReadStream.readDone[owner]( SUCCESS, usPeriod[owner] );
+    else {
+      // not all buffers were filled
+      do {
+        signal ReadStream.bufferDone[owner]( FAIL, (uint16_t *) streamBuf[owner], 0);
+        streamBuf[owner] = streamBuf[owner]->next;
+      } while (streamBuf[owner]);
+      signal ReadStream.readDone[owner]( FAIL, 0 );
+    }
+  }
+
+  async event uint16_t* SingleChannelReadStream.multipleDataReady[uint8_t rsClient](
+      uint16_t *buf, uint16_t length)
+  {
+    error_t nextRequest;
+    
+    if (!resultBuf){
+      value = length;
+      resultBuf = buf;
+      post signalBufferDone();
+      if (!streamBuf[rsClient])
+        post finishStreamRequest();
+      else {
+        // fill next buffer (this is the only async code dealing with buffers)
+        struct list_entry_t *entry = streamBuf[rsClient];
+        streamBuf[rsClient] = streamBuf[rsClient]->next;
+        nextRequest = call SingleChannelReadStream.getMultipleData[rsClient](
+          &streamSettings, (uint16_t *) entry, entry->count, usPeriod[rsClient]);
+        if (nextRequest != SUCCESS){
+          streamBuf[owner] = entry;
+          post finishStreamRequest();
+        }
+      }
+    } else {
+      // overflow: can't signal data fast enough
+      struct list_entry_t *entry = (struct list_entry_t *) buf;
+      entry->next = streamBuf[rsClient];
+      streamBuf[rsClient] = entry; // what a waste
+      post finishStreamRequest();
+    }
+    return 0;
+  }
+
+  void task signalBufferDone()
+  {
+    signal ReadStream.bufferDone[owner]( SUCCESS, resultBuf, value);
+    resultBuf = 0;
+  }
+  
+  async event error_t SingleChannelReadStream.singleDataReady[uint8_t rsClient](uint16_t data)
+  {
+    // won't happen
+    return SUCCESS;
+  }
+
+  default async command error_t Resource.request[uint8_t client]() { return FAIL; }
+  default async command error_t Resource.immediateRequest[uint8_t client]() { return FAIL; }
+  default async command void Resource.release[uint8_t client]() { }
+  default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){}
+  default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){}
+  
+  default async command error_t ResourceReadStream.request[uint8_t rsClient]() { return FAIL; }
+  default async command void ResourceReadStream.release[uint8_t rsClient]() { }
+  default event void ReadStream.bufferDone[uint8_t rsClient]( error_t result, 
+			 uint16_t* buf, uint16_t count ){}
+  default event void ReadStream.readDone[uint8_t rsClient]( error_t result, uint32_t actualPeriod ){ } 
+
+  default async command error_t 
+    SingleChannel.getSingleData[uint8_t client](const msp430adc12_channel_config_t *config)
+  {
+    return EINVAL;
+  }
+
+  default async command msp430adc12_channel_config_t 
+    Config.getChannelSettings[uint8_t client]()
+  { 
+    msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; 
+    return defaultConfig;
+  }
+
+  default async command error_t 
+    SingleChannelReadStream.getMultipleData[uint8_t client](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint16_t length, uint16_t jiffies)
+  {
+    return EINVAL;
+  }
+
+  default async command msp430adc12_channel_config_t 
+    ConfigReadStream.getChannelSettings[uint8_t client]()
+  { 
+    msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; 
+    return defaultConfig;
+  }
+}
+
diff --git a/tos/chips/msp430/adc12/AdcReadClientC.nc b/tos/chips/msp430/adc12/AdcReadClientC.nc
new file mode 100644
index 00000000..739c72ad
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadClientC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component allows a client to access the MSP430 ADC12
+ * (12-bit analog-to-digital converter) via the Read interface. A
+ * client must wire the Msp430Adc12Config interface to a component
+ * that returns its ADC12 configuration data. Depending on the
+ * REF_VOLT_AUTO_CONFIGURE switch (defined in Msp430Adc12.h) the internal
+ * reference voltage generator is automatically enabled if and only if the
+ * configuration data includes VREF as reference voltage.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include 
+generic configuration AdcReadClientC() {
+  provides interface Read;
+  uses interface Msp430Adc12Config;
+} implementation {
+  components AdcC,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             new Msp430Adc12RefVoltAutoClientC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  Read = AdcC.Read[CLIENT];
+  Msp430Adc12Config = AdcC.Config[CLIENT];
+  AdcC.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  AdcC.Resource[CLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  Msp430Adc12Config = Msp430AdcClient.Msp430Adc12Config;
+#endif 
+}
+  
diff --git a/tos/chips/msp430/adc12/AdcReadNowClientC.nc b/tos/chips/msp430/adc12/AdcReadNowClientC.nc
new file mode 100644
index 00000000..debb5061
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadNowClientC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component allows a client to access the MSP430 ADC12
+ * (12-bit analog-to-digital converter) via the ReadNow and
+ * Resource interface. According to TEP 108 a client must reserve
+ * the ADC before using it via the Resource interface (otherwise
+ * the request will fail).  A client must wire the
+ * Msp430Adc12Config interface to a component that returns its
+ * ADC12 configuration data. Depending on the REF_VOLT_AUTO_CONFIGURE switch
+ * (defined in Msp430Adc12.h) the internal reference voltage generator is
+ * automatically enabled if and only if the configuration data includes VREF as
+ * reference voltage. Then the Resource.granted() event implies
+ * that the reference voltage is stable. 
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include 
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow;
+  }
+  uses interface Msp430Adc12Config;
+} implementation {
+  components AdcC,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             new Msp430Adc12RefVoltAutoClientC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+  
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  ReadNow = AdcC.ReadNow[CLIENT];
+  Msp430Adc12Config = AdcC.Config[CLIENT];
+  AdcC.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  Resource = Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  Msp430Adc12Config = Msp430AdcClient.Msp430Adc12Config;
+#endif 
+}
+
diff --git a/tos/chips/msp430/adc12/AdcReadStreamClientC.nc b/tos/chips/msp430/adc12/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..da95a414
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadStreamClientC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component allows a client to access the MSP430 ADC12
+ * (12-bit analog-to-digital converter) via the ReadStream
+ * interface. A client must wire the Msp430Adc12Config interface
+ * to a component that returns its ADC12 configuration data. Depending on the
+ * REF_VOLT_AUTO_CONFIGURE switch (defined in Msp430Adc12.h) the internal
+ * reference voltage generator is automatically enabled if and only if the
+ * configuration data includes VREF as reference voltage.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include 
+generic configuration AdcReadStreamClientC() {
+  provides interface ReadStream;
+  uses interface Msp430Adc12Config;
+} implementation {
+  components AdcC,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             new Msp430Adc12RefVoltAutoClientC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    RSCLIENT = unique(ADCC_READ_STREAM_SERVICE),
+  };
+
+  ReadStream = AdcC.ReadStream[RSCLIENT];
+  Msp430Adc12Config = AdcC.ConfigReadStream[RSCLIENT];
+  AdcC.SingleChannelReadStream[RSCLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  AdcC.ResourceReadStream[RSCLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  Msp430Adc12Config = Msp430AdcClient.Msp430Adc12Config;
+#endif
+}
+  
diff --git a/tos/chips/msp430/adc12/HplAdc12.nc b/tos/chips/msp430/adc12/HplAdc12.nc
new file mode 100644
index 00000000..e3b57278
--- /dev/null
+++ b/tos/chips/msp430/adc12/HplAdc12.nc
@@ -0,0 +1,222 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+        
+/**
+ * The HplAdc12 interface exports low-level access to the ADC12 registers
+ * of the MSP430 MCU.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+#include 
+interface HplAdc12
+{
+  /** 
+   * Sets the ADC12 control register ADC12CTL0.
+   * @param control0 ADC12CTL0 register data.
+   **/
+  async command void setCtl0(adc12ctl0_t control0); 
+  
+  /** 
+   * Sets the ADC12 control register ADC12CTL1. 
+   * @param control1 ADC12CTL1 register data.
+   **/
+  async command void setCtl1(adc12ctl1_t control1);
+
+  /** 
+   * Returns the ADC12 control register ADC12CTL0.
+   * @return ADC12CTL0
+   **/
+  async command adc12ctl0_t getCtl0(); 
+
+  /** Returns the ADC12 control register ADC12CTL1. 
+   *  @return ADC12CTL1
+   **/
+  async command adc12ctl1_t getCtl1(); 
+  
+  /** 
+   * Sets the ADC12 conversion memory control register ADC12MCTLx.
+   * @param index The register index (the 'x' in ADC12MCTLx) [0..15] 
+   * @param memControl ADC12MCTLx register data.
+   */
+  async command void setMCtl(uint8_t index, adc12memctl_t memControl); 
+  
+  /** 
+   * Returns the ADC12 conversion memory control register ADC12MCTLx.
+   * @param index The register index (the 'x' in ADC12MCTLx) [0..15] 
+   * @return memControl ADC12MCTLx register data.
+   */
+  async command adc12memctl_t getMCtl(uint8_t index); 
+
+  /** 
+   * Returns the ADC12 conversion memory register ADC12MEMx.
+   * @param index The register index (the 'x' in ADC12MEMx) [0..15] 
+   * @return ADC12MEMx 
+   */  
+  async command uint16_t getMem(uint8_t index); 
+
+  /** 
+   * Sets the ADC12 interrupt enable register, ADC12IE.
+   * @param mask Bitmask (0 means interrupt disabled, 1 menas interrupt enabled) 
+   */
+  async command void setIEFlags(uint16_t mask); 
+
+  /** 
+   * Returns the ADC12 interrupt enable register, ADC12IE.
+   * @return ADC12IE
+   */  
+  async command uint16_t getIEFlags(); 
+  
+  /** 
+   * Resets the ADC12 interrupt flag register, ADC12IFG.
+   */
+  async command void resetIFGs(); 
+
+  /** 
+   * Returns the ADC12 interrupt flag register, ADC12IFG.
+   * @return ADC12IFG
+   */  
+  async command uint16_t getIFGs(); 
+
+  /** 
+   * Signals an ADC12MEMx overflow.
+   */ 
+  async event void memOverflow();
+
+  /** 
+   * Signals a Conversion time overflow.
+   */ 
+  async event void conversionTimeOverflow();
+
+  /** 
+   * Signals a conversion result. 
+   * @param iv ADC12 interrupt vector value 0x6, 0x8, ... , 0x24
+   */ 
+  async event void conversionDone(uint16_t iv);
+
+  /** 
+   * Returns the ADC12 BUSY flag.
+   * @return ADC12BUSY 
+   */ 
+  async command bool isBusy();
+
+  /** 
+   * Sets the Sample-and-hold time flags, SHT0x and SHT1x.
+   * Requires ENC-flag to be reset (disableConversion) !
+   * @param sht Sample-and-hold, top 4 bits = SHT1x, lower 4 bits = SHT0x
+   */
+  async command void setSHT(uint8_t sht);
+
+  /** 
+   * Sets the multiple sample and conversion flag, MSC in ADC12CTL0. 
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void setMSC();
+ 
+  /** 
+   * Resets the multiple sample and conversion flag, MSC in ADC12CTL0.
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void resetMSC();
+
+  /** 
+   * Sets the REFON in ADC12CTL0. 
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void setRefOn();
+
+  /** 
+   * Resets the REFON in ADC12CTL0. 
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void resetRefOn();
+
+  /** 
+   * Returns the REFON flag in ADC12CTL0. 
+   * @return REFON
+   */
+  async command uint8_t getRefon();     
+
+  /** 
+   * Sets the reference generator voltage to 1.5V. 
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void setRef1_5V();
+
+  /** 
+   * Sets the reference generator voltage to 2.5V. 
+   * Requires ENC-flag to be reset (disableConversion) !
+   */
+  async command void setRef2_5V();
+
+  /** 
+   * Returns reference voltage level (REF2_5V flag). 
+   * @return 0 if reference generator voltage is 1.5V, 
+   * 1 if  reference generator voltage is 2.5V
+   */
+  async command uint8_t isRef2_5V(); 
+   
+  /**
+   * Enables a conversion (sets the ENC flag).
+   */
+  async command void enableConversion();
+
+  /**
+   * Disables a conversion (resets the ENC flag).
+   */
+  async command void disableConversion();
+
+  /**
+   * Starts a conversion.
+   */
+  async command void startConversion();
+
+  /**
+   * Stops a conversion.
+   */  
+  async command void stopConversion();
+  
+  /**
+   * Switches the ADC12 off (ADC12ON flag).
+   */  
+  async command void adcOff();
+
+  /**
+   * Switches the ADC12 off (ADC12ON flag).
+   */    
+  async command void adcOn();
+}
+
diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc
new file mode 100644
index 00000000..157d65cf
--- /dev/null
+++ b/tos/chips/msp430/adc12/HplAdc12P.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/**
+ * The HplAdc12 interface exports low-level access to the ADC12 registers
+ * of the MSP430 MCU.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+module HplAdc12P {
+  provides interface HplAdc12;
+}
+implementation
+{
+ 
+  MSP430REG_NORACE(ADC12CTL0);
+  MSP430REG_NORACE(ADC12CTL1);
+  MSP430REG_NORACE(ADC12IFG);
+  MSP430REG_NORACE(ADC12IE);
+  MSP430REG_NORACE(ADC12IV);
+  
+  async command void HplAdc12.setCtl0(adc12ctl0_t control0){
+    ADC12CTL0 = *(uint16_t*)&control0; 
+  }
+  
+  async command void HplAdc12.setCtl1(adc12ctl1_t control1){
+    ADC12CTL1 = *(uint16_t*)&control1; 
+  }
+  
+  async command adc12ctl0_t HplAdc12.getCtl0(){ 
+    return *(adc12ctl0_t*) &ADC12CTL0; 
+  }
+  
+  async command adc12ctl1_t HplAdc12.getCtl1(){
+    return *(adc12ctl1_t*) &ADC12CTL1; 
+  }
+  
+  async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memControl){
+    uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL;
+    memCtlPtr += i;
+    *memCtlPtr = *(uint8_t*)&memControl; 
+  }
+   
+  async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){
+    adc12memctl_t x = {inch: 0, sref: 0, eos: 0 };    
+    uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL;
+    memCtlPtr += i;
+    x = *(adc12memctl_t*) memCtlPtr;
+    return x;
+  }  
+  
+  async command uint16_t HplAdc12.getMem(uint8_t i){
+    return *((uint16_t*) ADC12MEM + i);
+  }
+
+  async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } 
+  async command uint16_t HplAdc12.getIEFlags(){ return (uint16_t) ADC12IE; } 
+  
+  async command void HplAdc12.resetIFGs(){ 
+    if (!ADC12IFG)
+      return;
+    else {
+      // workaround, because ADC12IFG is not writable 
+      uint8_t i;
+      volatile uint16_t tmp;
+      for (i=0; i<16; i++)
+        tmp = call HplAdc12.getMem(i);
+    }
+  } 
+  
+  async command uint16_t HplAdc12.getIFGs(){ return (uint16_t) ADC12IFG; } 
+
+  async command bool HplAdc12.isBusy(){ return ADC12CTL1 & ADC12BUSY; }
+  
+  async command void HplAdc12.enableConversion(){ ADC12CTL0 |= ENC;}
+  async command void HplAdc12.disableConversion(){ ADC12CTL0 &= ~ENC; }
+  async command void HplAdc12.startConversion(){ ADC12CTL0 |= ADC12SC + ENC; }
+  async command void HplAdc12.stopConversion(){ 
+    ADC12CTL1 &= ~(CONSEQ_1 | CONSEQ_3); 
+    ADC12CTL0 &= ~ENC; 
+  }
+  
+  async command void HplAdc12.setMSC(){ ADC12CTL0 |= MSC; }
+  async command void HplAdc12.resetMSC(){ ADC12CTL0 &= ~MSC; }
+  
+  async command void HplAdc12.setRefOn(){ ADC12CTL0 |= REFON;}
+  async command void HplAdc12.resetRefOn(){ ADC12CTL0 &= ~REFON;}
+  async command uint8_t HplAdc12.getRefon(){ return (ADC12CTL0 & REFON) >> 5;}
+  async command void HplAdc12.setRef1_5V(){ ADC12CTL0 &= ~REF2_5V;}
+  async command void HplAdc12.setRef2_5V(){ ADC12CTL0 |= REF2_5V;}
+  async command uint8_t HplAdc12.isRef2_5V(){ return (ADC12CTL0 & REF2_5V) >> 6;}
+  
+  async command void HplAdc12.setSHT(uint8_t sht){
+    uint16_t ctl0 = ADC12CTL0;
+    uint16_t shttemp = sht & 0x0F;    
+    ctl0 &= 0x00FF;
+    ctl0 |= (shttemp << 8);
+    ctl0 |= (shttemp << 12);
+    ADC12CTL0 = ctl0; 
+  }
+  
+  async command void HplAdc12.adcOff(){ ADC12CTL0 &= ~ADC12ON; }
+  async command void HplAdc12.adcOn(){ ADC12CTL0 |= ADC12ON; }
+
+  TOSH_SIGNAL(ADC_VECTOR) {
+    uint16_t iv = ADC12IV;
+    switch(iv)
+    {
+      case  2: signal HplAdc12.memOverflow(); return;
+      case  4: signal HplAdc12.conversionTimeOverflow(); return;
+    }
+    signal HplAdc12.conversionDone(iv);
+  }
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h
new file mode 100644
index 00000000..a8f9aa67
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12.h
@@ -0,0 +1,250 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+ 
+#ifndef MSP430ADC12_H
+#define MSP430ADC12_H
+#include "Msp430RefVoltGenerator.h"
+
+#define P6PIN_AUTO_CONFIGURE
+#define REF_VOLT_AUTO_CONFIGURE
+#define CHECK_ARGS
+
+/*
+ * The msp430adc12_channel_config_t encapsulates all relevant flags for
+ * sampling a single ADC12 channel on a per-client basis.  They are taken from
+ * the following MSP430 registers: ADC12CTL0, ADC12CTL1, ADC12MCTLx and TACTL
+ * of TimerA (if applicable) and named according to section "17.3 ADC12
+ * Registers" of the "MSP430x1xx Family User's Guide",
+ * http://focus.ti.com/lit/ug/slau049e/slau049e.pdf).
+ *
+ * .inch: ADC12 input channel (ADC12MCTLx register). An (external) input channel 
+ *        maps to one of msp430's A0-A7 pins (see device specific data sheet).
+ *
+ * .sref: reference voltage (ADC12MCTLx register). If
+ *        REFERENCE_VREFplus_AVss or REFERENCE_VREFplus_VREFnegterm is chosen
+ *        AND the client wires to Msp430Adc12RefVoltAutoClientC (or
+ *        REF_VOLT_AUTO_CONFIGURE is defined and the client wires to
+ *        AdcReadClientC, AdcReadNowClientC or AdcReadStreamClientC) then the
+ *        reference voltage generator is automatically switched on to the
+ *        voltage level defined by the "ref2_5v" flag (see below) whenever the
+ *        client accesses the ADC12. Otherwise both flags are ignored.
+ * 
+ * .ref2_5v: Reference generator voltage level (ADC12CTL0 register). See
+ *        explanation to "sref" flag.
+ * 
+ * .adc12ssel: ADC12 clock source select for the sample-hold-time
+ *        (ADC12CTL1 register). In combination the "adc12ssel", "adc12div" and
+ *        "sht" define the sample-hold-time: "adc12ssel" defines the clock
+ *        source, "adc12div" defines the ADC12 clock divider and "sht" define
+ *        the time expressed in jiffies.
+ *
+ * .adc12div: ADC12 clock divider (ADC12CTL1 register). See "adc12ssel".
+ *
+ * .sht: Sample-and-hold time (ADC12CTL1 register). See "adc12ssel".
+ * 
+ * .sampcon_ssel: In combination with "sampcon_id" and the "jiffies"
+ *        parameter in the Msp430Adc12SingleChannel interface commands the
+ *        "sampcon_ssel" defines the sampling rate (TASSEL in TACTL register,
+ *        TimerA). It is the clock source for the SAMPCON signal, which
+ *        triggers the actual sampling. It is ignored when
+ *        Msp430Adc12SingleChannel.getSingleData() is used or the "jiffies"
+ *        parameter is zero; otherwise the SAMPCON signal is sourced from
+ *        TimerA, so that the multiple conversion mode can be made with the
+ *        user defined sampling rate.
+ * 
+ * .sampcon_id: Input divider for "sampcon_ssel"  (IDx in TACTL
+ *        register, TimerA). See "sampcon_ssel".
+ *
+ * 
+ *                   **********************************
+ *                    
+ * EXAMPLE: Assuming that SMCLK runs at 1 MHz the following command fills the
+ * user buffer with 2000 conversion results sampled on channel A2 with a
+ * sampling rate of 4000 Hz, i.e. the multipleDataReady() event is signalled
+ * after 500 ms. Note that the sampling rate is defined by the combination of
+ * SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 and the "jiffies" parameter of
+ * 250.  
+ *
+ * 
+ * uint16_t buffer[2000];
+ * msp430adc12_channel_config_t config = {
+ *   INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+ *   SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+ *   SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 
+ * };
+ * 
+ * event void Resource.granted() 
+ * { 
+ *  if (call SingleChannel.getMultipleData(&config, buffer, 2000, 250)
+ *       == SUCCESS)
+ *   {
+ *     // .. multipleDataReady() event will be signalled in 500ms
+ *   } else {
+ *     // check error
+ *   } 
+ * }
+ */
+
+ 
+typedef struct { 
+  unsigned int inch: 4;            // input channel 
+  unsigned int sref: 3;            // reference voltage 
+  unsigned int ref2_5v: 1;         // reference voltage level 
+  unsigned int adc12ssel: 2;       // clock source sample-hold-time 
+  unsigned int adc12div: 3;        // clock divider sample-hold-time 
+  unsigned int sht: 4;             // sample-hold-time
+  unsigned int sampcon_ssel: 2;    // clock source sampcon signal 
+  unsigned int sampcon_id: 2;      // clock divider sampcon 
+  unsigned int : 0;                // align to a word boundary 
+} msp430adc12_channel_config_t;
+
+enum inch_enum
+{  
+   // see device specific data sheet which pin Ax is mapped to
+   INPUT_CHANNEL_A0 = 0,                    // input channel A0 
+   INPUT_CHANNEL_A1 = 1,                    // input channel A1
+   INPUT_CHANNEL_A2 = 2,                    // input channel A2
+   INPUT_CHANNEL_A3 = 3,                    // input channel A3
+   INPUT_CHANNEL_A4 = 4,                    // input channel A4
+   INPUT_CHANNEL_A5 = 5,                    // input channel A5
+   INPUT_CHANNEL_A6 = 6,                    // input channel A6
+   INPUT_CHANNEL_A7 = 7,                    // input channel A7
+   EXTERNAL_REF_VOLTAGE_CHANNEL = 8,        // VeREF+ (input channel 8)
+   REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9,    // VREF-/VeREF- (input channel 9)
+   TEMPERATURE_DIODE_CHANNEL = 10,          // Temperature diode (input channel 10)
+   SUPPLY_VOLTAGE_HALF_CHANNEL = 11,        // (AVcc-AVss)/2 (input channel 11-15)
+   INPUT_CHANNEL_NONE = 12                  // illegal (identifies invalid settings)
+};
+
+enum sref_enum
+{
+   REFERENCE_AVcc_AVss = 0,                 // VR+ = AVcc   and VR-= AVss
+   REFERENCE_VREFplus_AVss = 1,             // VR+ = VREF+  and VR-= AVss
+   REFERENCE_VeREFplus_AVss = 2,            // VR+ = VeREF+ and VR-= AVss
+   REFERENCE_AVcc_VREFnegterm = 4,          // VR+ = AVcc   and VR-= VREF-/VeREF- 
+   REFERENCE_VREFplus_VREFnegterm = 5,      // VR+ = VREF+  and VR-= VREF-/VeREF-   
+   REFERENCE_VeREFplus_VREFnegterm = 6      // VR+ = VeREF+ and VR-= VREF-/VeREF-
+};
+
+enum ref2_5v_enum
+{
+  REFVOLT_LEVEL_1_5 = 0,                    // reference voltage of 1.5 V
+  REFVOLT_LEVEL_2_5 = 1,                    // reference voltage of 2.5 V
+  REFVOLT_LEVEL_NONE = 0,                   // if e.g. AVcc is chosen 
+};
+
+enum adc12ssel_enum
+{
+   SHT_SOURCE_ADC12OSC = 0,                // ADC12OSC
+   SHT_SOURCE_ACLK = 1,                    // ACLK
+   SHT_SOURCE_MCLK = 2,                    // MCLK
+   SHT_SOURCE_SMCLK = 3                    // SMCLK
+};
+
+enum adc12div_enum
+{
+   SHT_CLOCK_DIV_1 = 0,                         // ADC12 clock divider of 1
+   SHT_CLOCK_DIV_2 = 1,                         // ADC12 clock divider of 2
+   SHT_CLOCK_DIV_3 = 2,                         // ADC12 clock divider of 3
+   SHT_CLOCK_DIV_4 = 3,                         // ADC12 clock divider of 4
+   SHT_CLOCK_DIV_5 = 4,                         // ADC12 clock divider of 5
+   SHT_CLOCK_DIV_6 = 5,                         // ADC12 clock divider of 6
+   SHT_CLOCK_DIV_7 = 6,                         // ADC12 clock divider of 7
+   SHT_CLOCK_DIV_8 = 7,                         // ADC12 clock divider of 8
+};
+
+enum sht_enum
+{
+   SAMPLE_HOLD_4_CYCLES = 0,         // sampling duration is 4 clock cycles
+   SAMPLE_HOLD_8_CYCLES = 1,         // ...
+   SAMPLE_HOLD_16_CYCLES = 2,         
+   SAMPLE_HOLD_32_CYCLES = 3,         
+   SAMPLE_HOLD_64_CYCLES = 4,         
+   SAMPLE_HOLD_96_CYCLES = 5,        
+   SAMPLE_HOLD_123_CYCLES = 6,        
+   SAMPLE_HOLD_192_CYCLES = 7,        
+   SAMPLE_HOLD_256_CYCLES = 8,        
+   SAMPLE_HOLD_384_CYCLES = 9,        
+   SAMPLE_HOLD_512_CYCLES = 10,        
+   SAMPLE_HOLD_768_CYCLES = 11,        
+   SAMPLE_HOLD_1024_CYCLES = 12       
+};
+
+enum sampcon_ssel_enum
+{
+   SAMPCON_SOURCE_TACLK = 0,        // Timer A clock source is (external) TACLK
+   SAMPCON_SOURCE_ACLK = 1,         // Timer A clock source ACLK
+   SAMPCON_SOURCE_SMCLK = 2,        // Timer A clock source SMCLK
+   SAMPCON_SOURCE_INCLK = 3,        // Timer A clock source is (external) INCLK
+};
+
+enum sampcon_id_enum
+{
+   SAMPCON_CLOCK_DIV_1 = 0,             // SAMPCON clock divider of 1
+   SAMPCON_CLOCK_DIV_2 = 1,             // SAMPCON clock divider of 2
+   SAMPCON_CLOCK_DIV_3 = 2,             // SAMPCON clock divider of 3
+   SAMPCON_CLOCK_DIV_4 = 3,             // SAMPCON clock divider of 4
+};
+
+// The unique string for allocating ADC resource interfaces
+#define MSP430ADC12_RESOURCE "Msp430Adc12C.Resource"
+
+// The unique string for accessing HAL2
+#define ADCC_SERVICE "AdcC.Service"
+
+// The unique string for accessing HAL2 via ReadStream
+#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client"
+
+
+typedef struct 
+{
+  volatile unsigned
+  inch: 4,                                     // input channel
+  sref: 3,                                     // reference voltage
+  eos: 1;                                      // end of sequence flag
+} __attribute__ ((packed)) adc12memctl_t;
+
+/* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */
+// check: is this relevant anymore ?
+#define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__)
+#if GCC_VERSION == 332
+#error "The msp430-gcc version (3.3.2) contains a bug which results in false accessing \
+of bitfields in structs and makes MSP430ADC12M.nc fail ! Use version 3.2.3 instead."
+#elif GCC_VERSION != 323
+#warning "This version of msp430-gcc might contain a bug which results in false accessing \
+of bitfields in structs (MSP430ADC12M.nc would fail). Use version 3.2.3 instead."
+#endif  
+
+#endif
diff --git a/tos/chips/msp430/adc12/Msp430Adc12C.nc b/tos/chips/msp430/adc12/Msp430Adc12C.nc
new file mode 100644
index 00000000..85ec5253
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12C.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component represents the HAL1 of the MSP430 ADC12
+ * subsystem. Clients SHOULD NOT wire to Msp430Adc12C directly but
+ * should go via Msp430Adc12ClientC or
+ * Msp430Adc12RefVoltAutoClientC.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include  
+configuration Msp430Adc12C 
+{ 
+  provides interface Resource[uint8_t id]; 
+  provides interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; 
+  provides interface Msp430Adc12FastSingleChannel as FastSingleChannel[uint8_t id]; 
+} implementation { 
+  components Msp430Adc12P,HplAdc12P, Msp430TimerC, MainC, HplMsp430GeneralIOC, 
+             new RoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter;
+
+  Resource = Arbiter;
+  SingleChannel = Msp430Adc12P.SingleChannel;
+  FastSingleChannel = Msp430Adc12P.FastSingleChannel;
+  
+  Arbiter.Init <- MainC;
+  Msp430Adc12P.Init <- MainC;
+  Msp430Adc12P.ADCArbiterInfo -> Arbiter;
+  Msp430Adc12P.HplAdc12 -> HplAdc12P;
+  Msp430Adc12P.Port60 -> HplMsp430GeneralIOC.Port60;
+  Msp430Adc12P.Port61 -> HplMsp430GeneralIOC.Port61;
+  Msp430Adc12P.Port62 -> HplMsp430GeneralIOC.Port62;
+  Msp430Adc12P.Port63 -> HplMsp430GeneralIOC.Port63;
+  Msp430Adc12P.Port64 -> HplMsp430GeneralIOC.Port64;
+  Msp430Adc12P.Port65 -> HplMsp430GeneralIOC.Port65;
+  Msp430Adc12P.Port66 -> HplMsp430GeneralIOC.Port66;
+  Msp430Adc12P.Port67 -> HplMsp430GeneralIOC.Port67;
+
+  // exclusive access to TimerA expected
+  Msp430Adc12P.TimerA -> Msp430TimerC.TimerA;
+  Msp430Adc12P.ControlA0 -> Msp430TimerC.ControlA0;
+  Msp430Adc12P.ControlA1 -> Msp430TimerC.ControlA1;
+  Msp430Adc12P.CompareA0 -> Msp430TimerC.CompareA0;
+  Msp430Adc12P.CompareA1 -> Msp430TimerC.CompareA1;
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc b/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc
new file mode 100644
index 00000000..524344b7
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc
@@ -0,0 +1,64 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component realizes the HAL1 representation and allows an
+ * MSP430-specific client to access the MSP430 ADC12 (12-bit analog-to-digital
+ * converter) via the Msp430Adc12SingleChannel and
+ * Resource interface.  According to TEP 108 a client must reserve
+ * the ADC before using it via the Resource interface (otherwise
+ * the request will fail). In contrast to the
+ * Msp430Adc12RefVoltAutoClientC the
+ * Msp430Adc12ClientC does not enable internal reference voltage
+ * generator.  
+ * 
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Msp430Adc12ClientC()
+{
+  provides interface Resource;
+  provides interface Msp430Adc12SingleChannel;
+} implementation {
+  components Msp430Adc12C;
+   
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430Adc12C.Resource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12C.SingleChannel[ID];
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12Config.nc b/tos/chips/msp430/adc12/Msp430Adc12Config.nc
new file mode 100644
index 00000000..a4293b75
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12Config.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This interface is used by the ADC subsystem to pull a client's
+ * ADC12 configuration in order to prepare the hardware.
+ * 
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include 
+interface Msp430Adc12Config {
+  /** 
+   * Returns the configuration data for an ADC12 client (single channel).
+   * @return Configuration data.
+   */
+  async command msp430adc12_channel_config_t getChannelSettings();
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12FastClientC.nc b/tos/chips/msp430/adc12/Msp430Adc12FastClientC.nc
new file mode 100644
index 00000000..0ebf3e76
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12FastClientC.nc
@@ -0,0 +1,59 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component realizes a HAL1 representation and allows an
+ * MSP430-specific client to access the MSP430 ADC12 (12-bit analog-to-digital
+ * converter) via the Msp430Adc12FastSingleChannel and
+ * Resource interface. 
+ * 
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Msp430Adc12FastClientC()
+{
+  provides interface Resource;
+  provides interface Msp430Adc12FastSingleChannel;
+} implementation {
+  components Msp430Adc12C;
+   
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430Adc12C.Resource[ID];
+  Msp430Adc12FastSingleChannel = Msp430Adc12C.FastSingleChannel[ID];
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12FastSingleChannel.nc b/tos/chips/msp430/adc12/Msp430Adc12FastSingleChannel.nc
new file mode 100644
index 00000000..5779c468
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12FastSingleChannel.nc
@@ -0,0 +1,84 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * In contrast to the Msp430Adc12SingleChannel interface this interface
+ * separates between configuration and sampling of the ADC and therefore allows
+ * to minimize the time between the call to getSingleData and the start of
+ * the sampling.
+ * 
+ * @author Jan Hauer 
+ * @see  Please refer to TEP 101.
+ */
+
+#include  
+interface Msp430Adc12FastSingleChannel 
+{   
+
+  /** 
+   * Configures the ADC hardware. If SUCCESS is returned, every subsequent call
+   * to getSingleData() will start the sampling immediately with
+   * the specified configuration.  However, the configuration is valid only
+   * until the ADC is released via the Resource interface (which is provided in
+   * conjunction with this interface), i.e. it must be configured every time
+   * the Resource interface grants access to the ADC (otherwise the
+   * configuration state is undefined).
+   * 
+   * @param config ADC12 configuration data.  
+   *
+   * @return SUCCESS means subsequent calls to getSingleData()
+   * will use the configuration.
+   */
+  async command error_t configure(const msp430adc12_channel_config_t *config);
+  
+  /** 
+   * Samples an ADC channel once with the configuration passed in
+   * configure(). If SUCCESS is returned, an event
+   * singleDataReady() will be signalled with the conversion
+   * result. Otherwise singleDataReady() will not be signalled.
+   *
+   * @param config ADC12 configuration data.  @return SUCCESS means conversion
+   * data will be signalled in singleDataReady().
+   */
+  async command error_t getSingleData(); 
+  
+   /** 
+    * Data from a call to getSingleData() is ready.
+    * 
+    * @param data Conversion result (lower 12 bit).  
+    */  
+  async event void singleDataReady(uint16_t data); 
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12P.nc b/tos/chips/msp430/adc12/Msp430Adc12P.nc
new file mode 100644
index 00000000..e1aad394
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12P.nc
@@ -0,0 +1,545 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+#include 
+module Msp430Adc12P 
+{
+  provides {
+    interface Init;
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
+    interface Msp430Adc12FastSingleChannel as FastSingleChannel[uint8_t id]; 
+	}
+	uses {
+    interface ArbiterInfo as ADCArbiterInfo;
+	  interface HplAdc12;
+    interface Msp430Timer as TimerA;
+    interface Msp430TimerControl as ControlA0;
+    interface Msp430TimerControl as ControlA1;
+    interface Msp430Compare as CompareA0;
+    interface Msp430Compare as CompareA1;
+    interface HplMsp430GeneralIO as Port60;
+    interface HplMsp430GeneralIO as Port61;
+    interface HplMsp430GeneralIO as Port62;
+    interface HplMsp430GeneralIO as Port63;
+    interface HplMsp430GeneralIO as Port64;
+    interface HplMsp430GeneralIO as Port65;
+    interface HplMsp430GeneralIO as Port66;
+    interface HplMsp430GeneralIO as Port67;
+    
+	}
+}
+implementation
+{ 
+  enum { // conversionMode
+    SINGLE_DATA,
+    SINGLE_DATA_REPEAT,
+    MULTIPLE_DATA,
+    MULTIPLE_DATA_REPEAT,
+  };
+  enum { // flags
+    ADC_BUSY = 1,               /* request pending */
+    TIMERA_USED = 2,            /* TimerA used for SAMPCON signal */
+    FAST_MODE = 4,
+  };
+
+  uint16_t *resultBuffer;        /* result buffer */
+  uint16_t resultBufferLength;   /* length of buffer */
+  uint16_t resultBufferIndex;    /* offset into buffer */
+  norace uint8_t clientID;              /* ID of interface that issued current request */
+  norace uint8_t flags;                 /* current state, see above */
+
+  // norace is safe, because Resource interface resolves conflicts  
+  norace uint8_t conversionMode; /* current conversion conversionMode, see above */
+
+  command error_t Init.init()
+  {
+    call HplAdc12.disableConversion();
+    call HplAdc12.adcOff();
+    return SUCCESS;
+  }
+  
+  error_t clientAccessRequest(uint8_t id)
+  {
+    atomic {
+      if (call ADCArbiterInfo.userId() == id){
+        if (flags & ADC_BUSY)
+          return EBUSY;
+        flags = ADC_BUSY;
+        clientID = id;
+        return SUCCESS;
+      }
+    }
+    return ERESERVE;
+  }
+
+  inline void clientAccessFinished()
+  {
+    atomic flags = 0;
+  }
+
+  void prepareTimerA(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON)
+  {
+    msp430_compare_control_t ccResetSHI = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+
+    call TimerA.setMode(MSP430TIMER_STOP_MODE);
+    call TimerA.clear();
+    call TimerA.disableEvents();
+    call TimerA.setClockSource(csSAMPCON);
+    call TimerA.setInputDivider(cdSAMPCON);
+    call ControlA0.setControl(ccResetSHI);
+    call CompareA0.setEvent(interval-1);
+    call CompareA1.setEvent((interval-1)/2);
+  }
+    
+  void startTimerA()
+  {
+    msp430_compare_control_t ccSetSHI = {
+      ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    msp430_compare_control_t ccResetSHI = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    msp430_compare_control_t ccRSOutmod = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    // manually trigger first conversion, then switch to Reset/set conversionMode
+    call ControlA1.setControl(ccResetSHI);
+    call ControlA1.setControl(ccSetSHI);   
+    //call ControlA1.setControl(ccResetSHI); 
+    call ControlA1.setControl(ccRSOutmod);
+    call TimerA.setMode(MSP430TIMER_UP_MODE); // go!
+  }   
+  
+  void configureAdcPin( uint8_t inch )
+  {
+#ifdef P6PIN_AUTO_CONFIGURE
+    switch (inch)
+    {
+      case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break;
+      case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break;
+      case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break;
+      case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break;
+      case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break;
+      case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break;
+      case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break;
+      case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break;
+    }
+#endif
+  }
+  
+  void resetAdcPin( uint8_t inch )
+  {
+#ifdef P6PIN_AUTO_CONFIGURE
+    switch (inch)
+    {
+      case 0: call Port60.selectIOFunc(); break;
+      case 1: call Port61.selectIOFunc(); break;
+      case 2: call Port62.selectIOFunc(); break;
+      case 3: call Port63.selectIOFunc(); break;
+      case 4: call Port64.selectIOFunc(); break;
+      case 5: call Port65.selectIOFunc(); break;
+      case 6: call Port66.selectIOFunc(); break;
+      case 7: call Port67.selectIOFunc(); break;
+    }
+#endif
+  }
+    
+  void stopConversionSingleChannel()
+  {
+    adc12memctl_t memctl = call HplAdc12.getMCtl(0);
+    if (flags & TIMERA_USED){
+      call TimerA.setMode(MSP430TIMER_STOP_MODE);
+    }
+    resetAdcPin( memctl.inch );
+    call HplAdc12.stopConversion();
+    call HplAdc12.adcOff();
+    call HplAdc12.setIEFlags(0);
+    call HplAdc12.resetIFGs();
+    clientAccessFinished();
+  }
+
+  error_t configureSingleData(uint8_t id, const msp430adc12_channel_config_t *config)
+  {
+    error_t result;
+#ifdef CHECK_ARGS
+    if (!config)
+      return EINVAL;
+#endif
+    if ((result = clientAccessRequest(id)) == SUCCESS)
+    {
+      adc12ctl0_t ctl0 = { 
+        adc12sc: 0,
+        enc: 0,
+        adc12tovie: 0,
+        adc12ovie: 0,
+        adc12on: 1,
+        refon: call HplAdc12.getRefon(),
+        r2_5v: call HplAdc12.isRef2_5V(),
+        msc: 1,
+        sht0: config->sht,
+        sht1: config->sht
+      };
+      adc12ctl1_t ctl1 = {
+        adc12busy: 0,
+        conseq: 0,
+        adc12ssel: config->adc12ssel,
+        adc12div: config->adc12div,
+        issh: 0,
+        shp: 1,
+        shs: 0,
+        cstartadd: 0
+      };
+      adc12memctl_t memctl = {
+        inch: config->inch,
+        sref: config->sref,
+        eos: 1
+      };        
+      conversionMode = SINGLE_DATA;
+      configureAdcPin( config->inch );
+      call HplAdc12.setCtl0(ctl0);
+      call HplAdc12.setCtl1(ctl1);
+      call HplAdc12.setMCtl(0, memctl);
+      call HplAdc12.setIEFlags(0x01);
+      //call HplAdc12.startConversion();
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.getSingleData[uint8_t id](
+      const msp430adc12_channel_config_t *config)
+  {
+    error_t result = configureSingleData(id, config);
+    if (result == SUCCESS)
+      call HplAdc12.startConversion();
+    return result;
+  }
+
+  async command error_t FastSingleChannel.configure[uint8_t id](const msp430adc12_channel_config_t *config)
+  {
+    return configureSingleData(id, config);
+  }
+  
+  async command error_t FastSingleChannel.getSingleData[uint8_t id]()
+  {
+    if (clientID == id){
+      flags |= FAST_MODE;
+      call HplAdc12.startConversion();
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  async command error_t SingleChannel.getSingleDataRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t jiffies)
+  {
+    error_t result;
+#ifdef CHECK_ARGS
+    if (!config || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    if ((result = clientAccessRequest(id)) == SUCCESS)
+    {
+      adc12ctl0_t ctl0 = { 
+        adc12sc: 0,
+        enc: 0,
+        adc12tovie: 0,
+        adc12ovie: 0,
+        adc12on: 1,
+        refon: call HplAdc12.getRefon(),
+        r2_5v: call HplAdc12.isRef2_5V(),
+        msc: (jiffies == 0) ? 1 : 0,
+        sht0: config->sht,
+        sht1: config->sht
+      };
+      adc12ctl1_t ctl1 = {
+        adc12busy: 0,
+        conseq: 2,
+        adc12ssel: config->adc12ssel,
+        adc12div: config->adc12div,
+        issh: 0,
+        shp: 1,
+        shs: (jiffies == 0) ? 0 : 1,
+        cstartadd: 0
+      };
+      adc12memctl_t memctl = {
+        inch: config->inch,
+        sref: config->sref,
+        eos: 1
+      };        
+      conversionMode = SINGLE_DATA_REPEAT;
+      configureAdcPin( config->inch );
+      call HplAdc12.setCtl0(ctl0);
+      call HplAdc12.setCtl1(ctl1);
+      call HplAdc12.setMCtl(0, memctl);
+      call HplAdc12.setIEFlags(0x01);
+      if (jiffies){
+        atomic flags |= TIMERA_USED;   
+        prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+      }     
+      call HplAdc12.startConversion();
+      if (jiffies)
+        startTimerA(); // go!
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.getMultipleData[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint16_t length, uint16_t jiffies)
+  {
+    error_t result;
+#ifdef CHECK_ARGS
+    if (!config || !buf || !length || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    if ((result = clientAccessRequest(id)) == SUCCESS)
+    {
+      adc12ctl0_t ctl0 = { 
+        adc12sc: 0,
+        enc: 0,
+        adc12tovie: 0,
+        adc12ovie: 0,
+        adc12on: 1,
+        refon: call HplAdc12.getRefon(),
+        r2_5v: call HplAdc12.isRef2_5V(),
+        msc: (jiffies == 0) ? 1 : 0,
+        sht0: config->sht,
+        sht1: config->sht
+      };
+      adc12ctl1_t ctl1 = {
+        adc12busy: 0,
+        conseq: (length > 16) ? 3 : 1,
+        adc12ssel: config->adc12ssel,
+        adc12div: config->adc12div,
+        issh: 0,
+        shp: 1,
+        shs: (jiffies == 0) ? 0 : 1,
+        cstartadd: 0
+      };
+      adc12memctl_t memctl = {
+        inch: config->inch,
+        sref: config->sref,
+        eos: 0
+      };        
+      uint16_t i, mask = 1;
+      conversionMode = MULTIPLE_DATA;
+      atomic {
+        resultBuffer = buf;
+        resultBufferLength = length;
+        resultBufferIndex = 0;
+      }    
+      configureAdcPin( config->inch );
+      call HplAdc12.setCtl0(ctl0);
+      call HplAdc12.setCtl1(ctl1);
+      for (i=0; i<(length-1) && i < 15; i++)
+        call HplAdc12.setMCtl(i, memctl);
+      memctl.eos = 1;  
+      call HplAdc12.setMCtl(i, memctl);
+      call HplAdc12.setIEFlags(mask << i);        
+      
+      if (jiffies){
+        atomic flags |= TIMERA_USED;
+        prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+      }      
+      call HplAdc12.startConversion();
+      if (jiffies)
+        startTimerA(); // go!
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.getMultipleDataRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint8_t length, uint16_t jiffies)
+  {
+    error_t result;
+#ifdef CHECK_ARGS
+    if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    if ((result = clientAccessRequest(id)) == SUCCESS)
+    {
+      adc12ctl0_t ctl0 = { 
+        adc12sc: 0,
+        enc: 0,
+        adc12tovie: 0,
+        adc12ovie: 0,
+        adc12on: 1,
+        refon: call HplAdc12.getRefon(),
+        r2_5v: call HplAdc12.isRef2_5V(),
+        msc: (jiffies == 0) ? 1 : 0,
+        sht0: config->sht,
+        sht1: config->sht
+      };
+      adc12ctl1_t ctl1 = {
+        adc12busy: 0,
+        ctl1.conseq = 3,
+        adc12ssel: config->adc12ssel,
+        adc12div: config->adc12div,
+        issh: 0,
+        shp: 1,
+        shs: (jiffies == 0) ? 0 : 1,
+        cstartadd: 0
+      };
+      adc12memctl_t memctl = {
+        inch: config->inch,
+        sref: config->sref,
+        eos: 0
+      };        
+      uint16_t i, mask = 1;
+      conversionMode = MULTIPLE_DATA_REPEAT;
+      atomic { 
+        resultBuffer = buf;
+        resultBufferLength = length;
+        resultBufferIndex = 0;            
+      }
+      configureAdcPin( config->inch );
+      call HplAdc12.setCtl0(ctl0);
+      call HplAdc12.setCtl1(ctl1);
+      for (i=0; i<(length-1) && i < 15; i++)
+        call HplAdc12.setMCtl(i, memctl);
+      memctl.eos = 1;  
+      call HplAdc12.setMCtl(i, memctl);
+      call HplAdc12.setIEFlags(mask << i);        
+      
+      if (jiffies){
+        atomic flags |= TIMERA_USED;
+        prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+      }      
+      call HplAdc12.startConversion();
+      if (jiffies)
+        startTimerA(); // go!
+    }
+    return result;
+  }
+
+  async event void TimerA.overflow(){}
+  async event void CompareA0.fired(){}
+  async event void CompareA1.fired(){}
+
+  
+  async event void HplAdc12.conversionDone(uint16_t iv)
+  {
+    switch (conversionMode) 
+    { 
+      case SINGLE_DATA:
+        if (flags & FAST_MODE){
+#ifdef P6PIN_AUTO_CONFIGURE
+          adc12memctl_t memctl = call HplAdc12.getMCtl(0);
+          resetAdcPin( memctl.inch );
+#endif
+          clientAccessFinished();
+          // stopConversionSingleChannel()
+          signal FastSingleChannel.singleDataReady[clientID](call HplAdc12.getMem(0));
+        } else {
+          stopConversionSingleChannel();
+          signal SingleChannel.singleDataReady[clientID](call HplAdc12.getMem(0));
+        }
+        break;
+      case SINGLE_DATA_REPEAT:
+        {
+          error_t repeatContinue;
+          repeatContinue = signal SingleChannel.singleDataReady[clientID](
+                call HplAdc12.getMem(0));
+          if (repeatContinue == FAIL)
+            stopConversionSingleChannel();
+          break;
+        }
+      case MULTIPLE_DATA:
+        {
+          uint16_t i = 0, length;
+          if (resultBufferLength - resultBufferIndex > 16) 
+            length = 16;
+          else
+            length = resultBufferLength - resultBufferIndex;
+          do {
+            *resultBuffer++ = call HplAdc12.getMem(i);
+          } while (++i < length);
+          resultBufferIndex += length;
+              
+          if (resultBufferLength - resultBufferIndex > 15)
+            return;
+          else if (resultBufferLength - resultBufferIndex > 0){
+            adc12memctl_t memctl = call HplAdc12.getMCtl(0);
+            memctl.eos = 1;
+            call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl);
+          } else {
+            stopConversionSingleChannel();
+            signal SingleChannel.multipleDataReady[clientID](
+                resultBuffer - resultBufferLength, resultBufferLength);
+          }
+        }
+        break;
+      case MULTIPLE_DATA_REPEAT:
+        {
+          uint8_t i = 0;
+          do {
+            *resultBuffer++ = call HplAdc12.getMem(i);
+          } while (++i < resultBufferLength);
+          
+          resultBuffer = signal SingleChannel.multipleDataReady[clientID](
+              resultBuffer-resultBufferLength,
+                    resultBufferLength);
+          if (!resultBuffer)  
+            stopConversionSingleChannel();
+          break;
+        }
+      } // switch
+  }
+
+  default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data)
+  {
+    return FAIL;
+  }
+  
+  default async event void FastSingleChannel.singleDataReady[uint8_t id](uint16_t data)
+  {
+    return;
+  }
+  
+  default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id](
+      uint16_t *buf, uint16_t length)
+  {
+    return 0;
+  }
+  
+  async event void HplAdc12.memOverflow(){}
+  async event void HplAdc12.conversionTimeOverflow(){}
+
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12RefVoltAutoClientC.nc b/tos/chips/msp430/adc12/Msp430Adc12RefVoltAutoClientC.nc
new file mode 100644
index 00000000..3ccd5f8b
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12RefVoltAutoClientC.nc
@@ -0,0 +1,67 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$ $Date$ @author: Jan Hauer
+ * 
+ * ========================================================================
+ */
+ 
+/** 
+ * This component realizes the HAL1 representation and allows an
+ * MSP430-specific client to access the MSP430 ADC12 (12-bit analog-to-digital
+ * converter) via the Msp430Adc12SingleChannel and
+ * Resource interface.  According to TEP 108 a client must reserve
+ * the ADC before using it via the Resource interface (otherwise
+ * the request will fail). In contrast to the Msp430Adc12ClientC
+ * the Msp430Adc12RefVoltAutoClientC automatically enables the
+ * internal reference voltage generator if and only if the configuration data
+ * defined via the Msp430Adc12Config interface includes VREF as
+ * reference voltage. I.e. the Resource.granted() event implies
+ * that the reference voltage is stable. 
+ * 
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Msp430Adc12RefVoltAutoClientC()
+{
+  provides interface Resource;
+  provides interface Msp430Adc12SingleChannel;
+  uses interface Msp430Adc12Config;
+} implementation {
+  components Msp430Adc12C, Msp430RefVoltArbiterC;
+
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430RefVoltArbiterC.ClientResource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12C.SingleChannel[ID];
+  
+  Msp430RefVoltArbiterC.AdcResource[ID] -> Msp430Adc12C.Resource[ID];
+  Msp430Adc12Config = Msp430RefVoltArbiterC.Config[ID]; 
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc
new file mode 100644
index 00000000..66c25aa3
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc
@@ -0,0 +1,169 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This interface exports access to the ADC12 on the level of
+ * HAL1 on a per-channel basis. It allows to sample a channel once or
+ * repeatedly (and signal an event per conversion result) or perform multiple
+ * conversions for the same channel once or repeatedly (and signal an event per
+ * multiple conversion results). It does not allow to sample different channels
+ * with the same command.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+#include  
+interface Msp430Adc12SingleChannel 
+{   
+  /** 
+   * Samples an ADC channel once. If SUCCESS is returned, an event
+   * singleDataReady() will be signalled with the conversion
+   * result. Otherwise singleDataReady() will not be signalled.
+   *
+   * @param config ADC12 configuration data.  
+   * @return SUCCESS means conversion data will be signalled in
+   * singleDataReady().
+   */
+  async command error_t getSingleData(const msp430adc12_channel_config_t *config);
+
+  /** Samples an ADC channel repeatedly and signals an event
+   * singleDataReady() after every single conversion.  Conversion
+   * result are signalled, until the client returns FAIL in the
+   * singleDataReady() event handler.  If this command does not
+   * return SUCCESS then singleDataReady() will not be
+   * signalled.

     Successive conversions are performed as quickly as
+   * possible if jiffies equals zero. Otherwise
+   * jiffies define the time between successive conversions in
+   * terms of clock ticks of "sampcon_ssel" and input divider "sampcon_id" as
+   * specified in the config parameter.
+   * 
+   * @param config ADC12 configuration data.  
+   * @param jiffies Sampling rate in terms of clock ticks of
+   * "sampcon_ssel" and input divider "sampcon_id".
+   * @return SUCCESS means conversion data will be signalled in
+   * singleDataReady() until the client returns FAIL.
+   */
+  async command error_t getSingleDataRepeat(const msp430adc12_channel_config_t *config, 
+      uint16_t jiffies);
+
+ /** 
+  *
+  * Samples an ADC channel multiple times and signals one event
+  * multipleDataReady() with all conversion results.  If SUCCESS
+  * is returned, the event multipleDataReady is signalled after
+  * the buffer is filled with conversion results, otherwise
+  * multipleDataReady() will not be signalled.  

    
+  * Successive conversions are performed as quickly as possible if
+  * jiffies equals zero. Otherwise jiffies define the
+  * time between successive conversions in terms of clock ticks of
+  * "sampcon_ssel" and input divider "sampcon_id" as specified in the
+  * config parameter.
+  *
+  * @param config ADC12 configuration data.  
+  * @param jiffies Sampling rate in terms of clock ticks of
+  * "sampcon_ssel" and input divider "sampcon_id".
+  * @param buffer The buffer to store the conversion results. It must have a
+  * minimum size of numSamples * 2 byte !  
+  * @param numSamples Number of samples to take, buffer size must be greater or
+  * equal than numSamples * 2 byte !  
+  * @return SUCCESS means conversion data will be signalled in
+  * singleDataReady().
+  */ 
+  async command error_t getMultipleData( const msp430adc12_channel_config_t *config,
+      uint16_t *buffer, uint16_t numSamples, uint16_t jiffies);
+
+ /** 
+  *
+  * Samples an ADC channel up to 16 times and signals an event
+  * multipleDataReady() with all conversion results repeatedly.
+  * If SUCCESS is returned, the event multipleDataReady is
+  * signalled after the buffer is filled with the first (up to 16) conversion
+  * results, otherwise multipleDataReady() will not be signalled.
+  * The conversion result are signalled repeatedly, until the client returns
+  * FAIL in the multipleDataReady() event handler.
+  * 

     Successive conversions are performed as quickly as possible if
+  * jiffies equals zero. Otherwise jiffies define the
+  * time between successive conversions in terms of clock ticks of
+  * "sampcon_ssel" and input divider "sampcon_id" as specified in the
+  * config parameter.
+  *
+  * @param config ADC12 configuration data.  @param jiffies Jiffies in terms of
+  * clock ticks of "sampcon_ssel" and input divider "sampcon_id".  @param
+  * buffer The buffer to store the conversion results. It must have a minimum
+  * size of numSamples * 2 byte !  
+  * @param jiffies Sampling rate in terms of clock ticks of
+  * "sampcon_ssel" and input divider "sampcon_id".
+  * @param numSamples Number of samples to take, 1 <= numSamples <= 16, buffer
+  * size must be greater or equal than numSamples * 2 byte !  
+  * @return SUCCESS means conversion data will be signalled in
+  * singleDataReady() until the client returns FAIL.
+  */
+  async command error_t getMultipleDataRepeat(const msp430adc12_channel_config_t *config, 
+      uint16_t *buffer, uint8_t numSamples, uint16_t jiffies);
+
+  /** 
+   * Data from a call to getSingleData() or
+   * getSingleDataRepeat() is ready. In the first case the return
+   * value is ignored, in the second it defines whether another conversion
+   * takes place (SUCCESS()) or not (FAIL).
+   * 
+   * @param data Conversion result (lower 12 bit).  
+   * @return If this event is signalled as response to a call to
+   * getSingleDataRepeat() then SUCCESS results in
+   * another sampling and FAIL stops the repeated sampling.
+   * Otherwise the return value is ignored.
+   */  
+  async event error_t singleDataReady(uint16_t data);
+
+  /** 
+   * Data from a call to getMultipleData() or
+   * getMultipleDataRepeat() is ready. In the first case the
+   * return value is ignored, in the second a non-zero pointer defines where to
+   * store the next numSamples conversion results and a null
+   * pointer stops the repeated conversion mode. 
+   * 
+   * @param buffer Conversion results (lower 12 bit are valid).  
+   * @param numSamples Number of samples stored in buffer 
+   * @return A null pointer stops a repeated conversion mode. Any non-zero
+   * value is interpreted as the next buffer, which must have size
+   * numSamples 2 byte!). Ignored if this event is a response to
+   * getMultipleData().
+   */    
+  async event uint16_t* multipleDataReady(uint16_t *buffer, uint16_t
+      numSamples); 
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterC.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterC.nc
new file mode 100644
index 00000000..432a2e77
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ * This component is meant to intercept requests to the Resource
+ * interface on their way to the arbiter. It checks whether the client requires
+ * the internal reference voltage generator of the MSP430 to be switched on by
+ * pulling its configuration data via Msp430Adc12Config. If (and
+ * only if) this is the case it enables the generator and forwards the
+ * Resource.granted() event from the arbiter when the reference
+ * voltage is stable.  Clients SHOULD NOT wire to
+ * Msp430RefVoltArbiterC but wire to
+ * Msp430Adc12RefVoltAutoClientC.
+ * 
+ * @author Jan Hauer
+ */
+
+configuration Msp430RefVoltArbiterC
+{
+  provides interface Resource as ClientResource[uint8_t client];
+  uses {
+    interface Resource as AdcResource[uint8_t client];
+    interface Msp430Adc12Config as Config[uint8_t client];
+  }
+} implementation {
+  components Msp430RefVoltGeneratorP, Msp430RefVoltArbiterP,
+             new TimerMilliC() as SwitchOnDelayTimer, 
+             new TimerMilliC() as SwitchOffDelayTimer,
+             HplAdc12P;
+
+  ClientResource = Msp430RefVoltArbiterP.ClientResource;
+  AdcResource = Msp430RefVoltArbiterP.AdcResource;
+  Config = Msp430RefVoltArbiterP;
+
+  Msp430RefVoltArbiterP.RefVolt_1_5V -> Msp430RefVoltGeneratorP.RefVolt_1_5V;
+  Msp430RefVoltArbiterP.RefVolt_2_5V -> Msp430RefVoltGeneratorP.RefVolt_2_5V;
+  Msp430RefVoltGeneratorP.SwitchOnTimer -> SwitchOnDelayTimer;
+  Msp430RefVoltGeneratorP.SwitchOffTimer -> SwitchOffDelayTimer;
+  Msp430RefVoltGeneratorP.HplAdc12 -> HplAdc12P;
+}  
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc
new file mode 100644
index 00000000..ca5ca060
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+module Msp430RefVoltArbiterP
+{
+  provides interface Resource as ClientResource[uint8_t client];
+  uses {
+    interface Resource as AdcResource[uint8_t client];
+    interface SplitControl as RefVolt_1_5V;
+    interface SplitControl as RefVolt_2_5V;  
+    interface Msp430Adc12Config as Config[uint8_t client];
+  }
+} implementation {
+  enum {
+    NO_OWNER = 0xFF,
+  };
+  norace uint8_t owner = NO_OWNER;
+
+  task void switchOff();
+  
+  async command error_t ClientResource.request[uint8_t client]()
+  {
+    return call AdcResource.request[client]();
+  }
+   
+  async command error_t ClientResource.immediateRequest[uint8_t client]()
+  {
+    msp430adc12_channel_config_t settings = call Config.getChannelSettings[client]();
+    if (settings.sref == REFERENCE_VREFplus_AVss ||
+        settings.sref == REFERENCE_VREFplus_VREFnegterm)
+      // always fails, because of the possible start-up delay (and async-sync transition)
+      return FAIL;
+    else {
+      error_t request = call AdcResource.immediateRequest[client]();
+      if (request == SUCCESS)
+        owner = client;
+      return request;
+    }
+  }
+
+  event void AdcResource.granted[uint8_t client]()
+  {
+    msp430adc12_channel_config_t settings = call Config.getChannelSettings[client]();
+    owner = client;
+    if (settings.sref == REFERENCE_VREFplus_AVss ||
+        settings.sref == REFERENCE_VREFplus_VREFnegterm){
+      error_t started;
+      if (settings.ref2_5v == REFVOLT_LEVEL_1_5)
+        started = call RefVolt_1_5V.start();
+      else
+        started = call RefVolt_2_5V.start();
+      if (started != SUCCESS){
+        owner = NO_OWNER;
+        call AdcResource.release[client]();
+        call AdcResource.request[client]();
+      }
+    } else 
+      signal ClientResource.granted[client]();
+  }
+   
+  event void RefVolt_1_5V.startDone(error_t error)
+  {
+    if (owner != NO_OWNER){
+      // Note that it can still not be guaranteed that ClientResource.granted()
+      // is not signalled after ClientResource.release() has been called.
+      signal ClientResource.granted[owner]();
+    }
+  }
+   
+  event void RefVolt_2_5V.startDone(error_t error)
+  {
+    if (owner != NO_OWNER){
+      // Note that it can still not be guaranteed that ClientResource.granted()
+      // is not signalled after ClientResource.release() has been called.
+      signal ClientResource.granted[owner]();
+    }
+  }
+
+  async command void ClientResource.release[uint8_t client]()
+  {
+    atomic {
+      if (owner == client){
+        owner = NO_OWNER;
+        post switchOff();
+      }
+    }
+    call AdcResource.release[client]();
+  }
+
+  task void switchOff()
+  {
+    if (owner == NO_OWNER)
+      if (call RefVolt_1_5V.stop() != SUCCESS)
+        post switchOff();
+  }
+
+  event void RefVolt_1_5V.stopDone(error_t error)
+  {
+  }
+  
+  event void RefVolt_2_5V.stopDone(error_t error)
+  {
+  }
+
+  async command uint8_t ClientResource.isOwner[uint8_t client]()
+  {
+    return call AdcResource.isOwner[client]();
+  }
+
+  default event void ClientResource.granted[uint8_t client](){}
+  default async command error_t AdcResource.request[uint8_t client]()
+  {
+    return FAIL;
+  }
+  default async command error_t AdcResource.immediateRequest[uint8_t client]()
+  {
+    return FAIL;
+  }
+
+  default async command void AdcResource.release[uint8_t client](){}
+  default async command msp430adc12_channel_config_t 
+    Config.getChannelSettings[uint8_t client]()
+  { 
+    msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; 
+    return defaultConfig;
+  }
+}  
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h b/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h
new file mode 100644
index 00000000..cf7bc197
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+#ifndef REFVOLTGENERATOR_H
+#define REFVOLTGENERATOR_H
+
+// Time for generator to become stable (don't change).
+#define STABILIZE_INTERVAL 17
+
+// Delay before generator is switched off after it has been stopped (in ms). 
+// This avoids having to wait the 17ms in case the generator is needed again
+// shortly after it has been stopped (value may be modified).
+#define SWITCHOFF_INTERVAL 100
+
+#endif
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc b/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc
new file mode 100644
index 00000000..a3efeaa4
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc
@@ -0,0 +1,277 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+#include 
+module Msp430RefVoltGeneratorP
+{
+  provides interface SplitControl as RefVolt_1_5V;
+  provides interface SplitControl as RefVolt_2_5V;
+  uses {
+    interface HplAdc12;
+    interface Timer as SwitchOnTimer;
+    interface Timer as SwitchOffTimer;
+  }
+} implementation {
+  
+  enum
+  {
+    GENERATOR_OFF,
+    REFERENCE_1_5V_PENDING, 
+    REFERENCE_2_5V_PENDING,
+    REFERENCE_1_5V_STABLE,
+    REFERENCE_2_5V_STABLE,
+  };
+
+  uint8_t state;
+
+  error_t switchOn(uint8_t level)
+  {
+    atomic {
+      if (call HplAdc12.isBusy())
+        return FAIL;
+      else {
+        call HplAdc12.disableConversion();
+        call HplAdc12.setRefOn();
+        if (level == REFERENCE_1_5V_PENDING)
+          call HplAdc12.setRef1_5V();
+        else
+          call HplAdc12.setRef2_5V();
+        return SUCCESS;
+      }
+    }
+  }
+    
+  error_t switchOff()
+  {
+    atomic {
+      if (call HplAdc12.isBusy())
+        return FAIL;
+      else {
+        call HplAdc12.disableConversion();
+        call HplAdc12.resetRefOn();
+        return SUCCESS;
+      }
+    }
+  }  
+    
+  command error_t RefVolt_1_5V.start()
+  {
+    switch (state)
+    {
+      case REFERENCE_1_5V_STABLE:
+        call SwitchOffTimer.stop();
+        signal RefVolt_1_5V.startDone(SUCCESS);
+        return SUCCESS;
+      case GENERATOR_OFF:
+        if (switchOn(REFERENCE_1_5V_PENDING) == SUCCESS){
+          call SwitchOnTimer.startOneShot(STABILIZE_INTERVAL);
+          state = REFERENCE_1_5V_PENDING;
+          return SUCCESS;
+        } else
+          return FAIL;
+      case REFERENCE_2_5V_STABLE:
+        if (switchOn(REFERENCE_1_5V_PENDING) == SUCCESS){
+          call SwitchOffTimer.stop();
+          state = REFERENCE_1_5V_STABLE;
+          signal RefVolt_1_5V.startDone(SUCCESS);
+          return SUCCESS;
+        } else
+          return FAIL;         
+      case REFERENCE_1_5V_PENDING:
+        // fall through
+      case REFERENCE_2_5V_PENDING:
+        // fall through
+      default:
+        // illegal state
+        return FAIL;
+    }
+  }
+
+  command error_t RefVolt_1_5V.stop()
+  {
+    switch (state)
+    {
+      case REFERENCE_1_5V_PENDING:
+        // fall through
+      case REFERENCE_2_5V_PENDING:
+        if (switchOff() == SUCCESS){
+          call SwitchOnTimer.stop();
+          state = GENERATOR_OFF;
+          if (state == REFERENCE_1_5V_PENDING)
+            signal RefVolt_1_5V.stopDone(SUCCESS);
+          else
+            signal RefVolt_2_5V.stopDone(SUCCESS);
+          return SUCCESS;
+        } else 
+          return FAIL;
+      case REFERENCE_1_5V_STABLE:
+        // fall through
+      case REFERENCE_2_5V_STABLE:
+        call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL);
+        return SUCCESS;
+      case GENERATOR_OFF:
+        // fall through
+      default:
+        // illegal state
+        return FAIL;
+    }
+  }
+
+  command error_t RefVolt_2_5V.start()
+  {
+    switch (state)
+    {
+      case REFERENCE_2_5V_STABLE:
+        call SwitchOffTimer.stop();
+        signal RefVolt_2_5V.startDone(SUCCESS);
+        return SUCCESS;
+      case GENERATOR_OFF:
+        if (switchOn(REFERENCE_2_5V_PENDING) == SUCCESS){
+          call SwitchOnTimer.startOneShot(STABILIZE_INTERVAL);
+          state = REFERENCE_2_5V_PENDING;
+          return SUCCESS;
+        } else
+          return FAIL;
+      case REFERENCE_1_5V_STABLE:
+        if (switchOn(REFERENCE_2_5V_PENDING) == SUCCESS){
+          call SwitchOffTimer.stop();
+          state = REFERENCE_2_5V_STABLE;
+          signal RefVolt_2_5V.startDone(SUCCESS);
+          return SUCCESS;
+        } else
+          return FAIL;         
+      case REFERENCE_2_5V_PENDING:
+        // fall through
+      case REFERENCE_1_5V_PENDING:
+        // fall through
+      default:
+        // illegal state
+        return FAIL;
+    }
+  }
+  
+  command error_t RefVolt_2_5V.stop()
+  {
+    switch (state)
+    {
+      case REFERENCE_2_5V_PENDING:
+        // fall through
+      case REFERENCE_1_5V_PENDING:
+        if (switchOff() == SUCCESS){
+          call SwitchOnTimer.stop();
+          state = GENERATOR_OFF;
+          if (state == REFERENCE_2_5V_PENDING)
+            signal RefVolt_2_5V.stopDone(SUCCESS);
+          else
+            signal RefVolt_1_5V.stopDone(SUCCESS);
+          return SUCCESS;
+        } else 
+          return FAIL;
+      case REFERENCE_2_5V_STABLE:
+        // fall through
+      case REFERENCE_1_5V_STABLE:
+        call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL);
+        return SUCCESS;
+      case GENERATOR_OFF:
+        // fall through
+      default:
+        // illegal state
+        return FAIL;
+    }
+  }
+
+  event void SwitchOnTimer.fired() 
+  {
+    switch (state)
+    {
+      case REFERENCE_1_5V_PENDING:
+        state = REFERENCE_1_5V_STABLE;
+        signal RefVolt_1_5V.startDone(SUCCESS);
+        break;
+      case REFERENCE_2_5V_PENDING:
+         state = REFERENCE_2_5V_STABLE;
+        signal RefVolt_2_5V.startDone(SUCCESS);
+        break;
+      case REFERENCE_1_5V_STABLE:
+        // fall through
+      case GENERATOR_OFF:
+        // fall through
+      case REFERENCE_2_5V_STABLE:
+        // fall through
+      default:
+        // illegal state
+        return;
+    }
+  }
+    
+  event void SwitchOffTimer.fired() 
+  {
+    switch (state)
+    {
+      case REFERENCE_1_5V_STABLE:
+        if (switchOff() == SUCCESS){
+          state = GENERATOR_OFF;
+          signal RefVolt_1_5V.stopDone(SUCCESS);
+        } else
+          call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL);
+        break;
+      case REFERENCE_2_5V_STABLE:
+        if (switchOff() == SUCCESS){
+          state = GENERATOR_OFF;
+          signal RefVolt_2_5V.stopDone(SUCCESS);
+        } else
+          call SwitchOffTimer.startOneShot(SWITCHOFF_INTERVAL);
+        break;
+      case GENERATOR_OFF:
+        // fall through
+      case REFERENCE_1_5V_PENDING:
+        // fall through
+      case REFERENCE_2_5V_PENDING:
+        // fall through
+      default:
+        // illegal state
+        return;
+    }
+  }
+
+  async event void HplAdc12.memOverflow(){}
+  async event void HplAdc12.conversionTimeOverflow(){}
+  async event void HplAdc12.conversionDone(uint16_t iv){}
+
+  default event void RefVolt_1_5V.startDone(error_t error){}
+  default event void RefVolt_2_5V.startDone(error_t error){}
+  default event void RefVolt_1_5V.stopDone(error_t error){}
+  default event void RefVolt_2_5V.stopDone(error_t error){}
+}
+
diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc
new file mode 100644
index 00000000..259d81a9
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplMsp430DmaC {
+
+  provides interface HplMsp430DmaControl as Control;
+  provides interface HplMsp430DmaChannel as Channel0;
+  provides interface HplMsp430DmaChannel as Channel1;
+  provides interface HplMsp430DmaChannel as Channel2;
+
+}
+
+implementation {
+
+  components HplMsp430DmaP;
+  components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_,
+				 DMA0SZ_, DMA0TSEL_MASK, 
+				 DMA0TSEL_SHIFT ) as Dma0;
+  components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_,
+				 DMA1SZ_, DMA1TSEL_MASK, 
+				 DMA1TSEL_SHIFT ) as Dma1;
+  components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_,
+				 DMA2SZ_, DMA2TSEL_MASK, 
+				 DMA2TSEL_SHIFT ) as Dma2;
+
+  Control = HplMsp430DmaP;
+  Channel0 = Dma0;
+  Channel1 = Dma1;
+  Channel2 = Dma2;
+  Dma0.Interrupt -> HplMsp430DmaP;
+  Dma1.Interrupt -> HplMsp430DmaP;
+  Dma2.Interrupt -> HplMsp430DmaP;
+
+}
+
diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc
new file mode 100644
index 00000000..59323e8f
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc
@@ -0,0 +1,75 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @version $Revision$ $Date$
+ */
+
+interface HplMsp430DmaChannel {
+  async command error_t setTrigger(dma_trigger_t trigger);
+  async command void clearTrigger();
+  async command void setSingleMode();
+  async command void setBlockMode();
+  async command void setBurstMode();
+  async command void setRepeatedSingleMode();
+  async command void setRepeatedBlockMode();
+  async command void setRepeatedBurstMode();
+  async command void setSrcNoIncrement();
+  async command void setSrcDecrement();
+  async command void setSrcIncrement();
+  async command void setDstNoIncrement();
+  async command void setDstDecrement();
+  async command void setDstIncrement();
+  async command void setWordToWord(); 
+  async command void setByteToWord(); 
+  async command void setWordToByte(); 
+  async command void setByteToByte(); 
+  async command void setEdgeSensitive();
+  async command void setLevelSensitive();
+
+  async command void enableDMA();
+  async command void disableDMA();
+
+  async command void enableInterrupt() ; 
+  async command void disableInterrupt() ; 
+
+  async command bool interruptPending();
+
+  async command bool aborted();
+  async command void triggerDMA();
+
+  async command void setSrc(void *saddr);
+  async command void setDst(void *daddr);
+  async command void setSize(uint16_t sz);
+
+  async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size);
+  async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size);
+  async command dma_channel_state_t getState();
+  async command void* getSource();
+  async command void* getDestination();
+  async command uint16_t getSize();
+  async command dma_channel_trigger_t getTrigger();
+
+  async command void reset();
+
+  async event void transferDone(error_t success);
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc
new file mode 100644
index 00000000..5798a2c0
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc
@@ -0,0 +1,40 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @version $Revision$ $Date$
+ */
+
+#include "Msp430Dma.h"
+
+interface HplMsp430DmaControl {
+
+  async command void setOnFetch();
+  async command void clearOnFetch();
+  async command void setRoundRobin();
+  async command void clearRoundRobin();
+  async command void setENNMI();
+  async command void clearENNMI();
+  async command void setState(dma_state_t s);
+  async command dma_state_t getState();
+  async command void reset();
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc
new file mode 100644
index 00000000..b50d1e30
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc
@@ -0,0 +1,29 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @version $Revision$ $Date$
+ */
+
+interface HplMsp430DmaInterrupt {
+  async event void fired();
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc
new file mode 100644
index 00000000..6b581606
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+module HplMsp430DmaP {
+
+  provides interface HplMsp430DmaControl as DmaControl;
+  provides interface HplMsp430DmaInterrupt as Interrupt;
+
+}
+
+implementation {
+
+  MSP430REG_NORACE( DMACTL0 );
+  MSP430REG_NORACE( DMACTL1 );
+
+  TOSH_SIGNAL( DACDMA_VECTOR ) {
+    signal Interrupt.fired();
+  }
+
+  async command void DmaControl.setOnFetch(){
+    DMACTL1 |= DMAONFETCH;
+  }
+
+  async command void DmaControl.clearOnFetch(){
+    DMACTL1 &= ~DMAONFETCH;
+  }
+
+  async command void DmaControl.setRoundRobin(){
+    DMACTL1 |= ROUNDROBIN;
+  }
+  async command void DmaControl.clearRoundRobin(){
+    DMACTL1 &= ~ROUNDROBIN;
+  }
+
+  async command void DmaControl.setENNMI(){
+    DMACTL1 |= ENNMI;
+  }
+
+  async command void DmaControl.clearENNMI(){
+    DMACTL1 &= ~ENNMI;
+  }
+
+  async command void DmaControl.setState(dma_state_t s){
+    DMACTL1 = *(int*)&s;
+  }
+
+  async command dma_state_t DmaControl.getState(){
+    dma_state_t s;
+    s = *(dma_state_t*)&DMACTL1;
+    return s;
+  }
+
+  async command void DmaControl.reset(){
+    DMACTL0 = 0;
+    DMACTL1 = 0;
+  }
+
+}
+
diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc
new file mode 100644
index 00000000..aced3ed3
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaXP.nc
@@ -0,0 +1,274 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr,
+			       uint16_t DMAxSA_addr,
+			       uint16_t DMAxDA_addr,
+			       uint16_t DMAxSZ_addr,
+			       uint16_t DMAxTSEL_mask,
+			       uint16_t DMAxTSEL_shift ) {
+  
+  provides interface HplMsp430DmaChannel as DMA;
+  uses interface HplMsp430DmaInterrupt as Interrupt;
+
+}
+
+implementation {
+
+  MSP430REG_NORACE( DMACTL0 );
+
+#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr)
+#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr)
+#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr)
+#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr)
+
+  async event void Interrupt.fired() {
+    error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS;
+    if ( DMAxCTL & DMAIFG ) {
+      DMAxCTL &= ~DMAIFG;
+      DMAxCTL &= ~DMAABORT;
+      signal DMA.transferDone( error );
+    }
+  }
+
+  async error_t command DMA.setTrigger( dma_trigger_t trigger ) {
+
+    if ( DMAxCTL & DMAEN )
+      return FAIL;
+
+    DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) |
+		( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) );
+
+    return SUCCESS;
+
+  }
+
+  async command void DMA.clearTrigger() {
+    DMACTL0 &= ~DMAxTSEL_mask;
+  }
+
+  async command void DMA.setSingleMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+  }
+
+  async command void DMA.setBlockMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMADT0;
+  }
+
+  async command void DMA.setBurstMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMADT1;
+  }
+
+  async command void DMA.setRepeatedSingleMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMADT2;
+  }
+
+  async command void DMA.setRepeatedBlockMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= ( DMADT2 | DMADT0 );
+  }
+
+  async command void DMA.setRepeatedBurstMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= ( DMADT2 | DMADT1 );
+  }
+
+  async command void DMA.setSrcNoIncrement() {
+    DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 );
+  }
+
+  async command void DMA.setSrcDecrement() {
+    DMAxCTL |= DMASRCINCR1;
+  }
+
+  async command void DMA.setSrcIncrement() {
+    DMAxCTL |= ( DMASRCINCR0 | DMASRCINCR1 );
+  }
+
+  async command void DMA.setDstNoIncrement() {
+    DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 );
+  }          
+
+  async command void DMA.setDstDecrement() {
+    DMAxCTL |= DMADSTINCR1;
+  }
+
+  async command void DMA.setDstIncrement() {
+    DMAxCTL |= ( DMADSTINCR0 | DMADSTINCR1 );
+  }
+
+  async command void DMA.setWordToWord() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASWDW;
+  }
+  async command void DMA.setByteToWord() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASBDW;
+  }
+  async command void DMA.setWordToByte() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASWDB;
+  }
+  async command void DMA.setByteToByte() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASBDB;
+  }
+
+  async command void DMA.setEdgeSensitive() {
+    DMAxCTL &= ~DMALEVEL;
+  }
+
+  async command void DMA.setLevelSensitive() {
+    DMAxCTL |= DMALEVEL;
+  }
+
+  async command void DMA.enableDMA() { 
+    DMAxCTL |= DMAEN; 
+  }
+
+  async command void DMA.disableDMA() { 
+    DMAxCTL &= ~DMAEN; 
+  }
+
+  async command void DMA.enableInterrupt() {
+    DMAxCTL  |= DMAIE;
+  }
+
+  async command void DMA.disableInterrupt() {
+    DMAxCTL  &= ~DMAIE;
+  }
+
+  async command bool DMA.interruptPending() {
+    return !!( DMAxCTL & DMAIFG );
+  }
+
+  async command bool DMA.aborted() {
+    return !!( DMAxCTL & DMAABORT );
+  }
+  
+  async command void DMA.triggerDMA() { 
+    DMAxCTL |= DMAREQ; 
+  }
+  
+  async command void DMA.setSrc( void *saddr ) {
+    DMAxSA = (uint16_t)saddr;
+  }
+  
+  async command void DMA.setDst( void *daddr ) {
+    DMAxDA = (uint16_t)daddr;
+  }
+  
+  async command void DMA.setSize( uint16_t sz ) {
+    DMAxSZ = sz;
+  }
+
+  async command void DMA.setState( dma_channel_state_t s, 
+				   dma_channel_trigger_t t, 
+				   void* src, void* dest, 
+				   uint16_t size ) {
+    call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t,
+			  src, dest, size);
+  }
+
+  async command void DMA.setStateRaw( uint16_t s, uint16_t t, 
+				      void* src, void* dest, 
+				      uint16_t size ) {
+    DMAxSA = (uint16_t)src;
+    DMAxDA = (uint16_t)dest;
+    DMAxSZ = size;
+    DMACTL0 = ( DMACTL0 & ~DMAxTSEL_mask ) | ( t << DMAxTSEL_shift );
+    DMAxCTL = s;
+  }
+
+  async command dma_channel_state_t DMA.getState() {
+    dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL;
+    return s;
+  }
+
+  async command void* DMA.getSource() {
+    return (void*)DMAxSA;
+  }
+
+  async command void* DMA.getDestination() {
+    return (void*)DMAxDA;
+  }
+
+  async command uint16_t DMA.getSize() {
+    return DMAxSZ;
+  }
+
+  async command dma_channel_trigger_t DMA.getTrigger() {
+    dma_channel_trigger_t t;
+    t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift;
+    return t;
+  }
+
+  async command void DMA.reset() {
+    DMAxCTL = 0;
+    DMAxSA = 0;
+    DMAxDA = 0;
+    DMAxSZ = 0;
+  }
+
+
+}
+
diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h
new file mode 100644
index 00000000..51c3bbde
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430Dma.h
@@ -0,0 +1,182 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * $Revision$ $Date$
+ */
+
+#ifndef MSP430DMA_H
+#define MSP430DMA_H
+
+enum {
+  DMA_CHANNELS = 3
+};
+enum {
+  DMA_CHANNEL0 = 0,
+  DMA_CHANNEL1 = 1,
+  DMA_CHANNEL2 = 2,
+  DMA_CHANNEL_UNKNOWN = 3
+};
+enum { 
+  DMA_CHANNEL_AVAILABLE = 0,
+  DMA_CHANNEL_IN_USE = 1
+};
+
+// HPL constants
+
+enum {
+  DMA0TSEL_SHIFT = 0,
+  DMA1TSEL_SHIFT = 4,
+  DMA2TSEL_SHIFT = 8,
+  DMATSEL_MASK   = (uint16_t)0xf,
+  DMA0TSEL_MASK  = ( 0xf ),
+  DMA1TSEL_MASK  = ( 0xf0 ),
+  DMA2TSEL_MASK  = ( 0xf00 ),
+};
+enum {
+  DMASRCINCR_SHIFT = (8),
+  DMADSTINCR_SHIFT = (10),
+  DMAINCR_MASK = (0x3)
+};
+enum {
+  DMADT_SHIFT = (12),
+  DMADT_MASK = (0x3)
+};
+typedef enum {
+  DMA_TRIGGER_DMAREQ =          0x0, // software trigger
+  DMA_TRIGGER_TACCR2 =          0x1,            
+  DMA_TRIGGER_TBCCR2 =          0x2,
+  DMA_TRIGGER_USARTRX =         0x3, // URXIFG0 (UART/SPI), data received (I2C)
+  DMA_TRIGGER_USARTTX =         0x4, // UTXIFG0 (UART/SPI), transmit ready (I2C)
+  DMA_TRIGGER_DAC12IFG =        0x5, // DAC12_0CTL DAC12IFG bit
+  DMA_TRIGGER_ADC12IFGx =       0x6, 
+  DMA_TRIGGER_TACCR0 =          0x7, // CCIFG bit
+  DMA_TRIGGER_TBCCR0 =          0x8, // CCIFG bit
+  DMA_TRIGGER_URXIFG1 =         0x9,            
+  DMA_TRIGGER_UTXIFG1 =         0xa,
+  DMA_TRIGGER_MULT =            0xb, // Hardware Multiplier Ready
+  DMA_TRIGGER_DMAxIFG =         0xe, // DMA0IFG triggers DMA channel 1
+                                     // DMA1IFG triggers DMA channel 2
+                                     // DMA2IFG triggers DMA channel 0
+  DMA_TRIGGER_DMAE0 =           0xf  // External Trigger DMAE0
+} dma_trigger_t;
+
+enum {
+  DISABLE_NMI = 0,
+  ENABLE_NMI = 1
+};
+
+enum {
+  NOT_ROUND_ROBIN = 0,
+  ROUND_ROBIN = 1,
+};
+
+enum {
+  NOT_ON_FETCH = 0,
+  ON_FETCH = 1
+};
+
+typedef enum {
+  DMA_EDGE_SENSITIVE = 0x0,
+  DMA_LEVEL_SENSITIVE = 0x1
+} dma_level_t;
+
+typedef enum {
+  DMA_WORD = 0x0,
+  DMA_BYTE = 0x1
+} dma_byte_t;
+
+typedef enum {
+  DMA_ADDRESS_UNCHANGED = 0x0,
+  DMA_ADDRESS_DECREMENTED = 0x2,
+  DMA_ADDRESS_INCREMENTED = 0x3
+} dma_incr_t;
+
+typedef enum {
+  DMA_SINGLE_TRANSFER = 0x0,
+  DMA_BLOCK_TRANSFER = 0x1,
+  DMA_BURST_BLOCK_TRANSFER = 0x2,
+  DMA_REPEATED_SINGLE_TRANSFER = 0x4,
+  DMA_REPEATED_BLOCK_TRANSFER = 0x5,
+  DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7
+} dma_transfer_mode_t;
+
+typedef struct dma_state_s {
+  unsigned int enableNMI : 1;
+  unsigned int roundRobin : 1;
+  unsigned int onFetch : 1;
+  unsigned int reserved : 13;
+} __attribute__ ((packed)) dma_state_t;
+
+typedef struct dma_channel_trigger_s {
+  unsigned int trigger : 4; 
+  unsigned int reserved : 12;
+} __attribute__ ((packed)) dma_channel_trigger_t;
+
+typedef struct dma_channel_state_s {
+  unsigned int request : 1;
+  unsigned int abort : 1;
+  unsigned int interruptEnable : 1;
+  unsigned int interruptFlag : 1;
+  unsigned int enable : 1;
+  unsigned int level : 1;            /* or edge- triggered */
+  unsigned int srcByte : 1;          /* or word */
+  unsigned int dstByte : 1;
+  unsigned int srcIncrement : 2;     /* or no-increment, decrement */
+  unsigned int dstIncrement : 2;
+  unsigned int transferMode : 3;
+  unsigned int reserved2 : 1;
+} __attribute__ ((packed)) dma_channel_state_t;
+
+#endif
diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc
new file mode 100644
index 00000000..7ce704ac
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaC.nc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of the HAL level component for the MSP430 DMA module.
+ * This configuration provides the available DMA channels through the
+ * MSP430DMA parameterized interface.  If more channels are requested
+ * than available through unique("DMA"), there will be no mapping for
+ * that channel and compilation will fail.
+ *
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+configuration Msp430DmaC {
+
+  provides interface Msp430DmaControl as Control;
+  provides interface Msp430DmaChannel as Channel0;
+  provides interface Msp430DmaChannel as Channel1;
+  provides interface Msp430DmaChannel as Channel2;
+
+}
+implementation {
+
+  components HplMsp430DmaC as HplDmaC;
+
+  components new Msp430DmaChannelP() as Channel0P;
+  Channel0 = Channel0P;
+  Channel0P.HplChannel -> HplDmaC.Channel0;
+
+  components new Msp430DmaChannelP() as Channel1P;
+  Channel1 = Channel1P;
+  Channel1P.HplChannel -> HplDmaC.Channel1;
+
+  components new Msp430DmaChannelP() as Channel2P;
+  Channel2 = Channel2P;
+  Channel2P.HplChannel -> HplDmaC.Channel2;
+
+  components Msp430DmaControlP as ControlP;
+  Control = ControlP;
+  ControlP.HplControl -> HplDmaC;
+  ControlP.HplChannel0 -> HplDmaC.Channel0;
+  ControlP.HplChannel1 -> HplDmaC.Channel1;
+  ControlP.HplChannel2 -> HplDmaC.Channel2;
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc
new file mode 100644
index 00000000..3ca58ea3
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc
@@ -0,0 +1,98 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+#include "Msp430Dma.h"
+
+interface Msp430DmaChannel {
+
+  /**
+   * Setup a transfer using explicit argument (most robust and simple
+   * mechanism and recommended for novice users)
+   *
+   * See MSP430DMA.h for parameter options
+   */
+  async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, 
+				       dma_trigger_t trigger, 
+				       dma_level_t level,
+				       void *src_addr, 
+				       void *dst_addr, 
+				       uint16_t size,
+				       dma_byte_t src_byte, 
+				       dma_byte_t dst_byte,
+				       dma_incr_t src_incr, 
+				       dma_incr_t dst_incr );
+  
+  /**
+   * Raw interface for setting up a DMA transfer.  This function is
+   * intended to provide as much raw performance as possible but
+   * sacrifices type checking in the process.  Recommended ONLY for
+   * advanced users that have very intricate knowledge of the MSP430
+   * DMA module described in the user's guide.
+   *
+   * @param state The control register value, as specified by 
+   *              dma_control_state_t in MSP430DMA.h
+   * @param trigger The trigger for the DMA transfer.  Should be one
+   *                of the options from dma_trigger_t in MSP430DMA.h
+   * @param src Pointer to the source address
+   * @param dest Pointer to the destination address
+   * @param size Size of the DMA transfer
+   *
+   * See MSP430DMA.h for parameter options
+   */
+  async command void setupTransferRaw( uint16_t state, uint16_t trigger,
+				       void* src, void* dest, int size );
+
+  /**
+   * Enable the DMA module.  Equivalent to setting the DMA enable bit.
+   * This function does not force a transfer.
+   */
+  async command error_t startTransfer();
+
+  /**
+   * Repeat a DMA transfer using previous settings but new pointers
+   * and transfer size.  Automatically starts the transfer (sets the
+   * enable bit).
+   */
+  async command error_t repeatTransfer( void *src_addr, void *dst_addr, 
+					uint16_t size );
+
+  /**
+   * Trigger a DMA transfer using software
+   */
+  async command error_t softwareTrigger();
+
+  /**
+   * Stop a DMA transfer in progress
+   */
+  async command error_t stopTransfer();
+
+  /**
+   * Notification that the transfer has completed
+   */
+  async event void transferDone(error_t success);
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc
new file mode 100644
index 00000000..7a06214b
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+#include "Msp430Dma.h"
+
+generic module Msp430DmaChannelP() {
+
+  provides interface Msp430DmaChannel as Channel;
+  uses interface HplMsp430DmaChannel as HplChannel;
+
+}
+
+implementation {
+
+  norace dma_channel_state_t gChannelState;
+  norace dma_channel_trigger_t gChannelTrigger;
+  
+  async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, 
+					       void* src, void* dest, 
+					       int size ) {
+    call HplChannel.setStateRaw( s, t, src, dest, size );
+  }
+  
+  async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, 
+					   dma_trigger_t trigger, 
+					   dma_level_t level,
+					   void *src_addr, 
+					   void *dst_addr, 
+					   uint16_t size,
+					   dma_byte_t src_byte, 
+					   dma_byte_t dst_byte,
+					   dma_incr_t src_incr, 
+					   dma_incr_t dst_incr ) {
+    
+    gChannelState.request = 0;
+    gChannelState.abort = 0;
+    gChannelState.interruptEnable = 1;
+    gChannelState.interruptFlag = 0;
+    gChannelState.enable = 0;          /* don't start an xfer */
+    gChannelState.level = level;
+    gChannelState.srcByte = src_byte;
+    gChannelState.dstByte = dst_byte;
+    gChannelState.srcIncrement = src_incr;
+    gChannelState.dstIncrement = dst_incr;
+    gChannelState.transferMode = transfer_mode;
+    
+    gChannelTrigger.trigger = trigger;
+    
+    call HplChannel.setState( gChannelState, gChannelTrigger,
+			      src_addr, dst_addr, size );
+    
+    return SUCCESS;
+    
+  }
+  
+  async command error_t Channel.startTransfer() {
+    call HplChannel.enableDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.repeatTransfer( void *src_addr, 
+						void *dst_addr, 
+						uint16_t size ) {
+    call HplChannel.setSrc( src_addr );
+    call HplChannel.setDst(dst_addr);
+    call HplChannel.setSize(size);
+    call HplChannel.enableDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.softwareTrigger() {
+    if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) 
+      return FAIL;
+    call HplChannel.triggerDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.stopTransfer() {
+    if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER ||
+	 gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER)
+      return FAIL;
+    call HplChannel.disableDMA();
+    return SUCCESS;
+    
+  }
+  
+  async event void HplChannel.transferDone( error_t error ) {
+    signal Channel.transferDone( error );
+  }
+
+  default async event void Channel.transferDone( error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc
new file mode 100644
index 00000000..056876e6
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaControl.nc
@@ -0,0 +1,33 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @version $Revision$ $Date$
+ */
+
+#include "Msp430Dma.h"
+
+interface Msp430DmaControl {
+  async command void init();
+  async command void setFlags( bool enable_nmi, bool round_robin, 
+			       bool on_fetch);
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc
new file mode 100644
index 00000000..6ab9f7c0
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Ben Greenstein 
+ * @author Jonathan Hui 
+ * @author Joe Polastre 
+ * @version $Revision$ $Date$
+ */
+
+#include "Msp430Dma.h"
+
+module Msp430DmaControlP {
+
+  provides interface Msp430DmaControl as Control;
+
+  uses interface HplMsp430DmaControl as HplControl;
+  uses interface HplMsp430DmaChannel as HplChannel0;
+  uses interface HplMsp430DmaChannel as HplChannel1;
+  uses interface HplMsp430DmaChannel as HplChannel2;
+
+}
+
+implementation {
+  
+  async command void Control.init() {
+    call HplControl.reset();
+    call HplChannel0.reset();
+    call HplChannel1.reset();
+    call HplChannel2.reset();
+  } 
+  
+  async command void Control.setFlags( bool enable_nmi, bool round_robin,
+				       bool on_fetch ) {
+    
+    // NOTE: on_fetch must be true when dst addr is flash
+    
+    if (enable_nmi) call HplControl.setENNMI();
+    else call HplControl.clearENNMI();
+    if (round_robin) call HplControl.setRoundRobin();
+    else call HplControl.clearRoundRobin();
+    if (on_fetch) call HplControl.setOnFetch();
+    else call HplControl.clearOnFetch();
+    
+  }
+
+  async event void HplChannel0.transferDone( error_t error ) {}
+  async event void HplChannel1.transferDone( error_t error ) {}
+  async event void HplChannel2.transferDone( error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h
new file mode 100644
index 00000000..cf1b18e5
--- /dev/null
+++ b/tos/chips/msp430/msp430hardware.h
@@ -0,0 +1,214 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+// @author Vlado Handziski 
+// @author Joe Polastre 
+// @author Cory Sharp 
+
+#ifndef _H_msp430hardware_h
+#define _H_msp430hardware_h
+
+#include 
+#include 
+#include "msp430regtypes.h"
+
+
+// CPU memory-mapped register access will cause nesc to issue race condition
+// warnings.  Race conditions are a significant conern when accessing CPU
+// memory-mapped registers, because they can change even while interrupts
+// are disabled.  This means that the standard nesc tools for resolving race
+// conditions, atomic statements that disable interrupt handling, do not
+// resolve CPU register race conditions.  So, CPU registers access must be
+// treated seriously and carefully.
+
+// The macro MSP430REG_NORACE allows individual modules to internally
+// redeclare CPU registers as norace, eliminating nesc's race condition
+// warnings for their access.  This macro should only be used after the
+// specific CPU register use has been verified safe and correct.  Example
+// use:
+//
+//    module MyLowLevelModule
+//    {
+//      // ...
+//    }
+//    implementation
+//    {
+//      MSP430REG_NORACE(TACCTL0);
+//      // ...
+//    }
+
+#undef norace
+
+#define MSP430REG_NORACE_EXPAND(type,name,addr) \
+norace static volatile type name asm(#addr)
+
+#define MSP430REG_NORACE3(type,name,addr) \
+MSP430REG_NORACE_EXPAND(type,name,addr)
+
+// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
+// type, name, and addr, which are defined in the local header
+// msp430regtypes.h and mspgcc's header io.h and its children.
+
+#define MSP430REG_NORACE2(rename,name) \
+MSP430REG_NORACE3(TYPE_##name,rename,name##_)
+
+#define MSP430REG_NORACE(name) \
+MSP430REG_NORACE3(TYPE_##name,name,name##_)
+
+// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
+// creating potentially broken object code.  Union casts are the appropriate work
+// around.  Unfortunately, they require a function definiton.
+#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
+to_type func_name(from_type x) { union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// redefine ugly defines from msp-gcc
+#ifndef DONT_REDEFINE_SR_FLAGS
+#undef C
+#undef Z
+#undef N
+#undef V
+#undef GIE
+#undef CPUOFF
+#undef OSCOFF
+#undef SCG0
+#undef SCG1
+#undef LPM0_bits
+#undef LPM1_bits
+#undef LPM2_bits
+#undef LPM3_bits
+#undef LPM4_bits
+#define SR_C       0x0001
+#define SR_Z       0x0002
+#define SR_N       0x0004
+#define SR_V       0x0100
+#define SR_GIE     0x0008
+#define SR_CPUOFF  0x0010
+#define SR_OSCOFF  0x0020
+#define SR_SCG0    0x0040
+#define SR_SCG1    0x0080
+#define LPM0_bits           SR_CPUOFF
+#define LPM1_bits           SR_SCG0+SR_CPUOFF
+#define LPM2_bits           SR_SCG1+SR_CPUOFF
+#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
+#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
+#endif//DONT_REDEFINE_SR_FLAGS
+
+#ifdef interrupt
+#undef interrupt
+#endif
+
+#ifdef wakeup
+#undef wakeup
+#endif
+
+#ifdef signal
+#undef signal
+#endif
+
+// I2CBusy flag is not defined by current MSP430-GCC
+#ifdef __msp430_have_usart0_with_i2c
+#ifndef I2CBUSY
+#define I2CBUSY   (0x01 << 5)
+#endif
+MSP430REG_NORACE2(U0CTLnr,U0CTL);
+MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
+MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
+#endif
+
+// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
+#define TOSH_SIGNAL(signame) \
+void sig_##signame() __attribute__((interrupt (signame), wakeup, C))
+
+// TOSH_INTERRUPT allows nested interrupts
+#define TOSH_INTERRUPT(signame) \
+void isr_##signame() __attribute__((interrupt (signame), signal, wakeup, C))
+
+
+#define SET_FLAG(port, flag) ((port) |= (flag))
+#define CLR_FLAG(port, flag) ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+// TOSH_ASSIGN_PIN creates functions that are effectively marked as
+// "norace".  This means race conditions that result from their use will not
+// be detectde by nesc.
+
+#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
+void TOSH_SET_##name##_PIN() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
+void TOSH_CLR_##name##_PIN() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
+void TOSH_TOGGLE_##name##_PIN() { MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
+uint8_t TOSH_READ_##name##_PIN() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
+void TOSH_MAKE_##name##_OUTPUT() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
+void TOSH_MAKE_##name##_INPUT() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
+void TOSH_SEL_##name##_MODFUNC() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
+void TOSH_SEL_##name##_IOFUNC() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2) ? m1: m2;
+}
+enum {
+  MSP430_POWER_ACTIVE = 0,
+  MSP430_POWER_LPM0   = 1,
+  MSP430_POWER_LPM1   = 2,
+  MSP430_POWER_LPM2   = 3,
+  MSP430_POWER_LPM3   = 4,
+  MSP430_POWER_LPM4   = 5
+};
+
+void __nesc_disable_interrupt(void)
+{
+  dint();
+  nop();
+}
+
+void __nesc_enable_interrupt(void)
+{
+  eint();
+}
+
+typedef bool __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions wheb binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+__nesc_atomic_t __nesc_atomic_start(void) @spontaneous()
+{
+  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
+  __nesc_disable_interrupt();
+  return result;
+}
+
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous()
+{
+  if( reenable_interrupts )
+    __nesc_enable_interrupt();
+}
+#endif
+
+#endif//_H_msp430hardware_h
+
diff --git a/tos/chips/msp430/msp430regtypes.h b/tos/chips/msp430/msp430regtypes.h
new file mode 100644
index 00000000..ee68d221
--- /dev/null
+++ b/tos/chips/msp430/msp430regtypes.h
@@ -0,0 +1,313 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+#ifndef _H_msp430regtypes_h
+#define _H_msp430regtypes_h
+
+/*
+  To generate the primary contents of this file seen below, in
+  mspgcc/msp430/include/, execute the following command:
+
+    find . | xargs perl -ne '
+      BEGIN { %t = qw(b uint8_t w uint16_t); }
+      print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/;
+    ' | sort -u
+*/
+
+#define TYPE_ACTL uint16_t
+#define TYPE_ADAT uint16_t
+#define TYPE_ADC10AE uint8_t
+#define TYPE_ADC10CTL0 uint16_t
+#define TYPE_ADC10CTL1 uint16_t
+#define TYPE_ADC10DTC0 uint8_t
+#define TYPE_ADC10DTC1 uint8_t
+#define TYPE_ADC10MEM uint16_t
+#define TYPE_ADC10SA uint16_t
+#define TYPE_ADC12CTL0 uint16_t
+#define TYPE_ADC12CTL1 uint16_t
+#define TYPE_ADC12IE uint16_t
+#define TYPE_ADC12IFG uint16_t
+#define TYPE_ADC12IV uint16_t
+#define TYPE_ADC12MCTL0 uint8_t
+#define TYPE_ADC12MCTL1 uint8_t
+#define TYPE_ADC12MCTL10 uint8_t
+#define TYPE_ADC12MCTL11 uint8_t
+#define TYPE_ADC12MCTL12 uint8_t
+#define TYPE_ADC12MCTL13 uint8_t
+#define TYPE_ADC12MCTL14 uint8_t
+#define TYPE_ADC12MCTL15 uint8_t
+#define TYPE_ADC12MCTL2 uint8_t
+#define TYPE_ADC12MCTL3 uint8_t
+#define TYPE_ADC12MCTL4 uint8_t
+#define TYPE_ADC12MCTL5 uint8_t
+#define TYPE_ADC12MCTL6 uint8_t
+#define TYPE_ADC12MCTL7 uint8_t
+#define TYPE_ADC12MCTL8 uint8_t
+#define TYPE_ADC12MCTL9 uint8_t
+#define TYPE_ADC12MEM0 uint16_t
+#define TYPE_ADC12MEM1 uint16_t
+#define TYPE_ADC12MEM10 uint16_t
+#define TYPE_ADC12MEM11 uint16_t
+#define TYPE_ADC12MEM12 uint16_t
+#define TYPE_ADC12MEM13 uint16_t
+#define TYPE_ADC12MEM14 uint16_t
+#define TYPE_ADC12MEM15 uint16_t
+#define TYPE_ADC12MEM2 uint16_t
+#define TYPE_ADC12MEM3 uint16_t
+#define TYPE_ADC12MEM4 uint16_t
+#define TYPE_ADC12MEM5 uint16_t
+#define TYPE_ADC12MEM6 uint16_t
+#define TYPE_ADC12MEM7 uint16_t
+#define TYPE_ADC12MEM8 uint16_t
+#define TYPE_ADC12MEM9 uint16_t
+#define TYPE_AEN uint16_t
+#define TYPE_AIN uint16_t
+#define TYPE_BCSCTL1 uint8_t
+#define TYPE_BCSCTL2 uint8_t
+#define TYPE_BTCNT1 uint8_t
+#define TYPE_BTCNT2 uint8_t
+#define TYPE_BTCTL uint8_t
+#define TYPE_CACTL1 uint8_t
+#define TYPE_CACTL2 uint8_t
+#define TYPE_CAPD uint8_t
+#define TYPE_CBCTL uint8_t
+#define TYPE_CCR0 uint16_t
+#define TYPE_CCR1 uint16_t
+#define TYPE_CCR2 uint16_t
+#define TYPE_CCTL0 uint16_t
+#define TYPE_CCTL1 uint16_t
+#define TYPE_CCTL2 uint16_t
+#define TYPE_DAC12CTL0 uint16_t
+#define TYPE_DAC12IFG uint16_t
+#define TYPE_DAC12_0CTL uint16_t
+#define TYPE_DAC12_1CTL uint16_t
+#define TYPE_DCOCTL uint8_t
+#define TYPE_DMA0CTL uint16_t
+#define TYPE_DMA0DA uint16_t
+#define TYPE_DMA0SA uint16_t
+#define TYPE_DMA0SZ uint16_t
+#define TYPE_DMA1CTL uint16_t
+#define TYPE_DMA1DA uint16_t
+#define TYPE_DMA1SA uint16_t
+#define TYPE_DMA1SZ uint16_t
+#define TYPE_DMA2CTL uint16_t
+#define TYPE_DMA2DA uint16_t
+#define TYPE_DMA2SA uint16_t
+#define TYPE_DMA2SZ uint16_t
+#define TYPE_DMACTL0 uint16_t
+#define TYPE_DMACTL1 uint16_t
+#define TYPE_EPCTL uint8_t
+#define TYPE_FCTL1 uint16_t
+#define TYPE_FCTL2 uint16_t
+#define TYPE_FCTL3 uint16_t
+#define TYPE_FLL_CTL0 uint8_t
+#define TYPE_FLL_CTL1 uint8_t
+#define TYPE_I2CDCTL uint8_t
+#define TYPE_I2CDR uint8_t
+#define TYPE_I2CIE uint8_t
+#define TYPE_I2CIFG uint8_t
+#define TYPE_I2CIV uint16_t
+#define TYPE_I2CNDAT uint8_t
+#define TYPE_I2COA uint16_t
+#define TYPE_I2CPSC uint8_t
+#define TYPE_I2CSA uint16_t
+#define TYPE_I2CSCLH uint8_t
+#define TYPE_I2CSCLL uint8_t
+#define TYPE_I2CTCTL uint8_t
+#define TYPE_IE1 uint8_t
+#define TYPE_IE2 uint8_t
+#define TYPE_IFG1 uint8_t
+#define TYPE_IFG2 uint8_t
+#define TYPE_LCDCTL uint8_t
+#define TYPE_LCDM1 uint8_t
+#define TYPE_LCDM10 uint8_t
+#define TYPE_LCDM11 uint8_t
+#define TYPE_LCDM12 uint8_t
+#define TYPE_LCDM13 uint8_t
+#define TYPE_LCDM14 uint8_t
+#define TYPE_LCDM15 uint8_t
+#define TYPE_LCDM16 uint8_t
+#define TYPE_LCDM17 uint8_t
+#define TYPE_LCDM18 uint8_t
+#define TYPE_LCDM19 uint8_t
+#define TYPE_LCDM2 uint8_t
+#define TYPE_LCDM20 uint8_t
+#define TYPE_LCDM3 uint8_t
+#define TYPE_LCDM4 uint8_t
+#define TYPE_LCDM5 uint8_t
+#define TYPE_LCDM6 uint8_t
+#define TYPE_LCDM7 uint8_t
+#define TYPE_LCDM8 uint8_t
+#define TYPE_LCDM9 uint8_t
+#define TYPE_LCDMA uint8_t
+#define TYPE_LCDMB uint8_t
+#define TYPE_LCDMC uint8_t
+#define TYPE_LCDMD uint8_t
+#define TYPE_LCDME uint8_t
+#define TYPE_LCDMF uint8_t
+#define TYPE_MAC uint16_t
+#define TYPE_MACS uint16_t
+#define TYPE_ME1 uint8_t
+#define TYPE_ME2 uint8_t
+#define TYPE_MPY uint16_t
+#define TYPE_MPYS uint16_t
+#define TYPE_OP2 uint16_t
+#define TYPE_PORT_OUT uint8_t
+#define TYPE_PORT_IN uint8_t
+#define TYPE_PORT_DIR uint8_t
+#define TYPE_PORT_SEL uint8_t
+#define TYPE_P0DIR uint8_t
+#define TYPE_P0IE uint8_t
+#define TYPE_P0IES uint8_t
+#define TYPE_P0IFG uint8_t
+#define TYPE_P0IN uint8_t
+#define TYPE_P0OUT uint8_t
+#define TYPE_P1DIR uint8_t
+#define TYPE_P1IE uint8_t
+#define TYPE_P1IES uint8_t
+#define TYPE_P1IFG uint8_t
+#define TYPE_P1IN uint8_t
+#define TYPE_P1OUT uint8_t
+#define TYPE_P1SEL uint8_t
+#define TYPE_P2DIR uint8_t
+#define TYPE_P2IE uint8_t
+#define TYPE_P2IES uint8_t
+#define TYPE_P2IFG uint8_t
+#define TYPE_P2IN uint8_t
+#define TYPE_P2OUT uint8_t
+#define TYPE_P2SEL uint8_t
+#define TYPE_P3DIR uint8_t
+#define TYPE_P3IN uint8_t
+#define TYPE_P3OUT uint8_t
+#define TYPE_P3SEL uint8_t
+#define TYPE_P4DIR uint8_t
+#define TYPE_P4IN uint8_t
+#define TYPE_P4OUT uint8_t
+#define TYPE_P4SEL uint8_t
+#define TYPE_P5DIR uint8_t
+#define TYPE_P5IN uint8_t
+#define TYPE_P5OUT uint8_t
+#define TYPE_P5SEL uint8_t
+#define TYPE_P6DIR uint8_t
+#define TYPE_P6IN uint8_t
+#define TYPE_P6OUT uint8_t
+#define TYPE_P6SEL uint8_t
+#define TYPE_RESHI uint16_t
+#define TYPE_RESLO uint16_t
+#define TYPE_RXBUF uint8_t
+#define TYPE_RXBUF0 uint8_t
+#define TYPE_RXBUF1 uint8_t
+#define TYPE_RXBUF_0 uint8_t
+#define TYPE_RXBUF_1 uint8_t
+#define TYPE_SCFI0 uint8_t
+#define TYPE_SCFI1 uint8_t
+#define TYPE_SCFQCTL uint8_t
+#define TYPE_SUMEXT uint16_t
+#define TYPE_SVSCTL uint8_t
+#define TYPE_TACCR0 uint16_t
+#define TYPE_TACCR1 uint16_t
+#define TYPE_TACCR2 uint16_t
+#define TYPE_TACCTL0 uint16_t
+#define TYPE_TACCTL1 uint16_t
+#define TYPE_TACCTL2 uint16_t
+#define TYPE_TACTL uint16_t
+#define TYPE_TAIV uint16_t
+#define TYPE_TAR uint16_t
+#define TYPE_TBCCR0 uint16_t
+#define TYPE_TBCCR1 uint16_t
+#define TYPE_TBCCR2 uint16_t
+#define TYPE_TBCCR3 uint16_t
+#define TYPE_TBCCR4 uint16_t
+#define TYPE_TBCCR5 uint16_t
+#define TYPE_TBCCR6 uint16_t
+#define TYPE_TBCCTL0 uint16_t
+#define TYPE_TBCCTL1 uint16_t
+#define TYPE_TBCCTL2 uint16_t
+#define TYPE_TBCCTL3 uint16_t
+#define TYPE_TBCCTL4 uint16_t
+#define TYPE_TBCCTL5 uint16_t
+#define TYPE_TBCCTL6 uint16_t
+#define TYPE_TBCTL uint16_t
+#define TYPE_TBIV uint16_t
+#define TYPE_TBR uint16_t
+#define TYPE_TCCTL uint8_t
+#define TYPE_TPCNT1 uint8_t
+#define TYPE_TPCNT2 uint8_t
+#define TYPE_TPCTL uint8_t
+#define TYPE_TPD uint8_t
+#define TYPE_TPE uint8_t
+#define TYPE_TXBUF uint8_t
+#define TYPE_TXBUF0 uint8_t
+#define TYPE_TXBUF1 uint8_t
+#define TYPE_TXBUF_0 uint8_t
+#define TYPE_TXBUF_1 uint8_t
+#define TYPE_U0BR0 uint8_t
+#define TYPE_U0BR1 uint8_t
+#define TYPE_U0CTL uint8_t
+#define TYPE_U0MCTL uint8_t
+#define TYPE_U0RCTL uint8_t
+#define TYPE_U0RXBUF uint8_t
+#define TYPE_U0TCTL uint8_t
+#define TYPE_U0TXBUF uint8_t
+#define TYPE_U1BR0 uint8_t
+#define TYPE_U1BR1 uint8_t
+#define TYPE_U1CTL uint8_t
+#define TYPE_U1MCTL uint8_t
+#define TYPE_U1RCTL uint8_t
+#define TYPE_U1RXBUF uint8_t
+#define TYPE_U1TCTL uint8_t
+#define TYPE_U1TXBUF uint8_t
+#define TYPE_UBR0 uint8_t
+#define TYPE_UBR00 uint8_t
+#define TYPE_UBR01 uint8_t
+#define TYPE_UBR0_0 uint8_t
+#define TYPE_UBR0_1 uint8_t
+#define TYPE_UBR1 uint8_t
+#define TYPE_UBR10 uint8_t
+#define TYPE_UBR11 uint8_t
+#define TYPE_UBR1_0 uint8_t
+#define TYPE_UBR1_1 uint8_t
+#define TYPE_UCTL uint8_t
+#define TYPE_UCTL0 uint8_t
+#define TYPE_UCTL1 uint8_t
+#define TYPE_UCTL_0 uint8_t
+#define TYPE_UCTL_1 uint8_t
+#define TYPE_UMCTL uint8_t
+#define TYPE_UMCTL0 uint8_t
+#define TYPE_UMCTL1 uint8_t
+#define TYPE_UMCTL_0 uint8_t
+#define TYPE_UMCTL_1 uint8_t
+#define TYPE_URCTL uint8_t
+#define TYPE_URCTL0 uint8_t
+#define TYPE_URCTL1 uint8_t
+#define TYPE_URCTL_0 uint8_t
+#define TYPE_URCTL_1 uint8_t
+#define TYPE_UTCTL uint8_t
+#define TYPE_UTCTL0 uint8_t
+#define TYPE_UTCTL1 uint8_t
+#define TYPE_UTCTL_0 uint8_t
+#define TYPE_UTCTL_1 uint8_t
+#define TYPE_WDTCTL uint16_t
+
+#endif//_H_msp430regtypes_h
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc
new file mode 100644
index 00000000..0539b7d7
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc
@@ -0,0 +1,81 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for general-purpose I/O.
+ *
+ * @author Cory Sharp 
+ */
+
+interface HplMsp430GeneralIO
+{
+  /**
+   * Set pin to high.
+   */
+  async command void set();
+
+  /**
+   * Set pin to low.
+   */
+  async command void clr();
+
+  /**
+   * Toggle pin status.
+   */
+  async command void toggle();
+
+  /**
+   * Get the port status that contains the pin.
+   *
+   * @return Status of the port that contains the given pin. The x'th
+   * pin on the port will be represented in the x'th bit.
+   */
+  async command uint8_t getRaw();
+
+  /**
+   * Read pin value.
+   *
+   * @return TRUE if pin is high, FALSE otherwise.
+   */
+  async command bool get();
+
+  /**
+   * Set pin direction to input.
+   */
+  async command void makeInput();
+
+  /**
+   * Set pin direction to output.
+   */
+  async command void makeOutput();
+
+  /**
+   * Set pin for module specific functionality.
+   */
+  async command void selectModuleFunc();
+
+  /**
+   * Set pin for I/O functionality.
+   */
+  async command void selectIOFunc();
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc
new file mode 100644
index 00000000..1f4569b9
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc
@@ -0,0 +1,353 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for general-purpose I/O.
+ *
+ * @author Joe Polastre
+ */
+
+configuration HplMsp430GeneralIOC
+{
+  // provides all the ports as raw ports
+#ifdef __msp430_have_port1
+  provides interface HplMsp430GeneralIO as Port10;
+  provides interface HplMsp430GeneralIO as Port11;
+  provides interface HplMsp430GeneralIO as Port12;
+  provides interface HplMsp430GeneralIO as Port13;
+  provides interface HplMsp430GeneralIO as Port14;
+  provides interface HplMsp430GeneralIO as Port15;
+  provides interface HplMsp430GeneralIO as Port16;
+  provides interface HplMsp430GeneralIO as Port17;
+#endif
+
+#ifdef __msp430_have_port2
+  provides interface HplMsp430GeneralIO as Port20;
+  provides interface HplMsp430GeneralIO as Port21;
+  provides interface HplMsp430GeneralIO as Port22;
+  provides interface HplMsp430GeneralIO as Port23;
+  provides interface HplMsp430GeneralIO as Port24;
+  provides interface HplMsp430GeneralIO as Port25;
+  provides interface HplMsp430GeneralIO as Port26;
+  provides interface HplMsp430GeneralIO as Port27;
+#endif
+
+#ifdef __msp430_have_port3
+  provides interface HplMsp430GeneralIO as Port30;
+  provides interface HplMsp430GeneralIO as Port31;
+  provides interface HplMsp430GeneralIO as Port32;
+  provides interface HplMsp430GeneralIO as Port33;
+  provides interface HplMsp430GeneralIO as Port34;
+  provides interface HplMsp430GeneralIO as Port35;
+  provides interface HplMsp430GeneralIO as Port36;
+  provides interface HplMsp430GeneralIO as Port37;
+#endif
+
+#ifdef __msp430_have_port4
+  provides interface HplMsp430GeneralIO as Port40;
+  provides interface HplMsp430GeneralIO as Port41;
+  provides interface HplMsp430GeneralIO as Port42;
+  provides interface HplMsp430GeneralIO as Port43;
+  provides interface HplMsp430GeneralIO as Port44;
+  provides interface HplMsp430GeneralIO as Port45;
+  provides interface HplMsp430GeneralIO as Port46;
+  provides interface HplMsp430GeneralIO as Port47;
+#endif
+
+#ifdef __msp430_have_port5
+  provides interface HplMsp430GeneralIO as Port50;
+  provides interface HplMsp430GeneralIO as Port51;
+  provides interface HplMsp430GeneralIO as Port52;
+  provides interface HplMsp430GeneralIO as Port53;
+  provides interface HplMsp430GeneralIO as Port54;
+  provides interface HplMsp430GeneralIO as Port55;
+  provides interface HplMsp430GeneralIO as Port56;
+  provides interface HplMsp430GeneralIO as Port57;
+#endif
+
+#ifdef __msp430_have_port6
+  provides interface HplMsp430GeneralIO as Port60;
+  provides interface HplMsp430GeneralIO as Port61;
+  provides interface HplMsp430GeneralIO as Port62;
+  provides interface HplMsp430GeneralIO as Port63;
+  provides interface HplMsp430GeneralIO as Port64;
+  provides interface HplMsp430GeneralIO as Port65;
+  provides interface HplMsp430GeneralIO as Port66;
+  provides interface HplMsp430GeneralIO as Port67;
+#endif
+
+  // provides special ports explicitly 
+  // this section of HplMsp430GeneralIOC supports the F14x series
+#ifdef __msp430x14x
+  provides interface HplMsp430GeneralIO as STE0;
+  provides interface HplMsp430GeneralIO as SIMO0;
+  provides interface HplMsp430GeneralIO as SOMI0;
+  provides interface HplMsp430GeneralIO as UCLK0;
+  provides interface HplMsp430GeneralIO as UTXD0;
+  provides interface HplMsp430GeneralIO as URXD0;
+
+  provides interface HplMsp430GeneralIO as STE1;
+  provides interface HplMsp430GeneralIO as SIMO1;
+  provides interface HplMsp430GeneralIO as SOMI1;
+  provides interface HplMsp430GeneralIO as UCLK1;
+  provides interface HplMsp430GeneralIO as UTXD1;
+  provides interface HplMsp430GeneralIO as URXD1;
+
+  provides interface HplMsp430GeneralIO as ADC0;
+  provides interface HplMsp430GeneralIO as ADC1;
+  provides interface HplMsp430GeneralIO as ADC2;
+  provides interface HplMsp430GeneralIO as ADC3;
+  provides interface HplMsp430GeneralIO as ADC4;
+  provides interface HplMsp430GeneralIO as ADC5;
+  provides interface HplMsp430GeneralIO as ADC6;
+  provides interface HplMsp430GeneralIO as ADC7;
+#endif
+
+  // this section of HplMsp430GeneralIOC supports the F16x series
+#ifdef __msp430x16x
+  provides interface HplMsp430GeneralIO as STE0;
+  provides interface HplMsp430GeneralIO as SIMO0;
+  provides interface HplMsp430GeneralIO as SDA;
+  provides interface HplMsp430GeneralIO as SOMI0;
+  provides interface HplMsp430GeneralIO as UCLK0;
+  provides interface HplMsp430GeneralIO as SCL;
+  provides interface HplMsp430GeneralIO as UTXD0;
+  provides interface HplMsp430GeneralIO as URXD0;
+
+  provides interface HplMsp430GeneralIO as STE1;
+  provides interface HplMsp430GeneralIO as SIMO1;
+  provides interface HplMsp430GeneralIO as SOMI1;
+  provides interface HplMsp430GeneralIO as UCLK1;
+  provides interface HplMsp430GeneralIO as UTXD1;
+  provides interface HplMsp430GeneralIO as URXD1;
+
+  provides interface HplMsp430GeneralIO as ADC0;
+  provides interface HplMsp430GeneralIO as ADC1;
+  provides interface HplMsp430GeneralIO as ADC2;
+  provides interface HplMsp430GeneralIO as ADC3;
+  provides interface HplMsp430GeneralIO as ADC4;
+  provides interface HplMsp430GeneralIO as ADC5;
+  provides interface HplMsp430GeneralIO as ADC6;
+  provides interface HplMsp430GeneralIO as ADC7;
+
+  provides interface HplMsp430GeneralIO as DAC0;
+  provides interface HplMsp430GeneralIO as DAC1;
+
+  provides interface HplMsp430GeneralIO as SVSIN;
+  provides interface HplMsp430GeneralIO as SVSOUT;
+#endif
+}
+implementation
+{
+  components 
+#ifdef __msp430_have_port1
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 2) as P12,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 3) as P13,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 4) as P14,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 5) as P15,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 6) as P16,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17,
+#endif
+
+#ifdef __msp430_have_port2
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 0) as P20,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 1) as P21,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 2) as P22,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 3) as P23,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 4) as P24,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 5) as P25,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 6) as P26,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27,
+#endif
+
+#ifdef __msp430_have_port3
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 0) as P30,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 1) as P31,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 2) as P32,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 3) as P33,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 4) as P34,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 5) as P35,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 6) as P36,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37,
+#endif
+
+#ifdef __msp430_have_port4
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 0) as P40,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 1) as P41,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 2) as P42,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 3) as P43,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 4) as P44,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 5) as P45,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 6) as P46,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47,
+#endif
+
+#ifdef __msp430_have_port5
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 0) as P50,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 1) as P51,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 2) as P52,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 3) as P53,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 4) as P54,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 5) as P55,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 6) as P56,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57,
+#endif
+
+#ifdef __msp430_have_port6
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 0) as P60,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 1) as P61,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 2) as P62,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 3) as P63,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 4) as P64,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 5) as P65,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 6) as P66,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67
+#endif
+    ;
+
+#ifdef __msp430_have_port1
+  Port10 = P10;
+  Port11 = P11;
+  Port12 = P12;
+  Port13 = P13;
+  Port14 = P14;
+  Port15 = P15;
+  Port16 = P16;
+  Port17 = P17;
+#endif
+
+#ifdef __msp430_have_port2
+  Port20 = P20;
+  Port21 = P21;
+  Port22 = P22;
+  Port23 = P23;
+  Port24 = P24;
+  Port25 = P25;
+  Port26 = P26;
+  Port27 = P27;
+#endif
+
+#ifdef __msp430_have_port3
+  Port30 = P30;
+  Port31 = P31;
+  Port32 = P32;
+  Port33 = P33;
+  Port34 = P34;
+  Port35 = P35;
+  Port36 = P36;
+  Port37 = P37;
+#endif
+
+#ifdef __msp430_have_port4
+  Port40 = P40;
+  Port41 = P41;
+  Port42 = P42;
+  Port43 = P43;
+  Port44 = P44;
+  Port45 = P45;
+  Port46 = P46;
+  Port47 = P47;
+#endif
+ 
+#ifdef __msp430_have_port5
+  Port50 = P50;
+  Port51 = P51;
+  Port52 = P52;
+  Port53 = P53;
+  Port54 = P54;
+  Port55 = P55;
+  Port56 = P56;
+  Port57 = P57;
+#endif
+
+#ifdef __msp430_have_port6
+  Port60 = P60;
+  Port61 = P61;
+  Port62 = P62;
+  Port63 = P63;
+  Port64 = P64;
+  Port65 = P65;
+  Port66 = P66;
+  Port67 = P67;
+#endif
+
+#ifdef __msp430x14x
+  STE0 = P30;
+  SIMO0 = P31;
+  SOMI0 = P32;
+  UCLK0 = P33;
+  UTXD0 = P34;
+  URXD0 = P35;
+
+  STE1 = P50;
+  SIMO1 = P51;
+  SOMI1 = P52;
+  UCLK1 = P53;
+  UTXD1 = P36;
+  URXD1 = P37;
+
+  ADC0 = P60;
+  ADC1 = P61;
+  ADC2 = P62;
+  ADC3 = P63;
+  ADC4 = P64;
+  ADC5 = P65;
+  ADC6 = P66;
+  ADC7 = P67;
+#endif
+
+#ifdef __msp430x16x
+  STE0 = P30;
+  SIMO0 = P31;
+  SDA = P31;
+  SOMI0 = P32;
+  UCLK0 = P33;
+  SCL = P33;
+  UTXD0 = P34;
+  URXD0 = P35;
+
+  STE1 = P50;
+  SIMO1 = P51;
+  SOMI1 = P52;
+  UCLK1 = P53;
+  UTXD1 = P36;
+  URXD1 = P37;
+
+  ADC0 = P60;
+  ADC1 = P61;
+  ADC2 = P62;
+  ADC3 = P63;
+  ADC4 = P64;
+  ADC5 = P65;
+  ADC6 = P66;
+  ADC7 = P67;
+
+  DAC0 = P66;
+  DAC1 = P67;
+
+  SVSIN = P67;
+  SVSOUT = P57;
+#endif
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
new file mode 100644
index 00000000..b683b743
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
@@ -0,0 +1,54 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "msp430regtypes.h"
+
+generic module HplMsp430GeneralIOP(
+				uint8_t port_in_addr,
+				uint8_t port_out_addr,
+				uint8_t port_dir_addr,
+				uint8_t port_sel_addr,
+				uint8_t pin
+				)
+{
+  provides interface HplMsp430GeneralIO as IO;
+}
+implementation
+{
+  #define PORTxIN (*(volatile TYPE_PORT_IN*)port_in_addr)
+  #define PORTx (*(volatile TYPE_PORT_OUT*)port_out_addr)
+  #define PORTxDIR (*(volatile TYPE_PORT_DIR*)port_dir_addr)
+  #define PORTxSEL (*(volatile TYPE_PORT_SEL*)port_sel_addr)
+
+  async command void IO.set() { atomic PORTx |= (0x01 << pin); }
+  async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
+  async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+  async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); }
+  async command bool IO.get() { return (call IO.getRaw() != 0); }
+  async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); }
+  async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); }
+  async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); }
+  async command void IO.selectIOFunc() { atomic PORTxSEL &= ~(0x01 << pin); }
+}
diff --git a/tos/chips/msp430/pins/HplMsp430Interrupt.nc b/tos/chips/msp430/pins/HplMsp430Interrupt.nc
new file mode 100644
index 00000000..1f37cb37
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430Interrupt.nc
@@ -0,0 +1,63 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+interface HplMsp430Interrupt
+{
+  /** 
+   * Enables MSP430 hardware interrupt on a particular port.
+   */
+  async command void enable();
+
+  /** 
+   * Disables MSP430 hardware interrupt on a particular port.
+   */
+  async command void disable();
+
+  /** 
+   * Clears the MSP430 Interrupt Pending Flag for a particular port.
+   */
+  async command void clear();
+
+  /** 
+   * Gets the current value of the input voltage of a port.
+   *
+   * @return TRUE if the pin is set high, FALSE if it is set low.
+   */
+  async command bool getValue();
+
+  /** 
+   * Sets whether the edge should be high to low or low to high.
+   *
+   * @param TRUE if the interrupt should be triggered on a low to high
+   *        edge transition, false for interrupts on a high to low transition.
+   */
+  async command void edge(bool low_to_high);
+
+  /**
+   * Signalled when an interrupt occurs on a port.
+   */
+  async event void fired();
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptC.nc b/tos/chips/msp430/pins/HplMsp430InterruptC.nc
new file mode 100644
index 00000000..50ec746a
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptC.nc
@@ -0,0 +1,74 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for GPIO interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptC
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+}
+implementation
+{
+  components HplMsp430InterruptP as HplInterruptP;
+#ifdef __msp430_have_port1
+  Port10 = HplInterruptP.Port10;
+  Port11 = HplInterruptP.Port11;
+  Port12 = HplInterruptP.Port12;
+  Port13 = HplInterruptP.Port13;
+  Port14 = HplInterruptP.Port14;
+  Port15 = HplInterruptP.Port15;
+  Port16 = HplInterruptP.Port16;
+  Port17 = HplInterruptP.Port17;
+#endif
+#ifdef __msp430_have_port2
+  Port20 = HplInterruptP.Port20;
+  Port21 = HplInterruptP.Port21;
+  Port22 = HplInterruptP.Port22;
+  Port23 = HplInterruptP.Port23;
+  Port24 = HplInterruptP.Port24;
+  Port25 = HplInterruptP.Port25;
+  Port26 = HplInterruptP.Port26;
+  Port27 = HplInterruptP.Port27;
+#endif
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc b/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc
new file mode 100644
index 00000000..0acdbbb0
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc
@@ -0,0 +1,41 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for non-maskable interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptNMIC
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+}
+implementation
+{
+  components HplMsp430InterruptNMIP as HplInterruptP;
+
+  NMI = HplInterruptP.NMI;
+  OF = HplInterruptP.OF;
+  ACCV = HplInterruptP.ACCV;
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc b/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc
new file mode 100644
index 00000000..f364395f
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc
@@ -0,0 +1,93 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptNMIP
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+}
+implementation
+{
+  TOSH_SIGNAL(NMI_VECTOR)
+  {
+    volatile int n = IFG1;
+    if (n & NMIIFG) { signal NMI.fired(); return; }
+    if (n & OFIFG)  { signal OF.fired();  return; }
+    if (FCTL3 & ACCVIFG) { signal ACCV.fired(); return; }
+  }
+
+  default async event void NMI.fired() { call NMI.clear(); }
+  default async event void OF.fired() { call OF.clear(); }
+  default async event void ACCV.fired() { call ACCV.clear(); }
+
+  async command void NMI.enable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog |= WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 |= NMIIE;
+    }
+  }
+  async command void OF.enable() { atomic IE1 |= OFIE; }
+  async command void ACCV.enable() { atomic IE1 |= ACCVIE; }
+
+  async command void NMI.disable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog &= ~WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 &= ~NMIIE;
+    }
+  }
+  async command void OF.disable() { atomic IE1 &= ~OFIE; }
+  async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; }
+
+  async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; }
+  async command void OF.clear() { atomic IFG1 &= ~OFIFG; }
+  async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; }
+
+  async command bool NMI.getValue() { bool b; atomic b=(IFG1 >> NMIIFG) & 0x01; return b; }
+  async command bool OF.getValue() { bool b; atomic b=(IFG1 >> OFIFG) & 0x01; return b; }
+  async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 >> ACCVIFG) & 0x01; return b; }
+
+  async command void NMI.edge(bool l2h) { 
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      if (l2h)  _watchdog &= ~(WDTNMIES); 
+      else      _watchdog |=  (WDTNMIES);
+      WDTCTL = _watchdog;
+    }
+  }
+  // edge does not apply to oscillator faults
+  async command void OF.edge(bool l2h) { }
+  // edge does not apply to flash access violations
+  async command void ACCV.edge(bool l2h) { }
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptP.nc b/tos/chips/msp430/pins/HplMsp430InterruptP.nc
new file mode 100644
index 00000000..9b1b1f21
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptP.nc
@@ -0,0 +1,262 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptP
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+
+}
+implementation
+{
+
+#ifdef __msp430_have_port1
+  TOSH_SIGNAL(PORT1_VECTOR)
+  {
+    volatile int n = P1IFG & P1IE;
+
+    if (n & (1 << 0)) { signal Port10.fired(); return; }
+    if (n & (1 << 1)) { signal Port11.fired(); return; }
+    if (n & (1 << 2)) { signal Port12.fired(); return; }
+    if (n & (1 << 3)) { signal Port13.fired(); return; }
+    if (n & (1 << 4)) { signal Port14.fired(); return; }
+    if (n & (1 << 5)) { signal Port15.fired(); return; }
+    if (n & (1 << 6)) { signal Port16.fired(); return; }
+    if (n & (1 << 7)) { signal Port17.fired(); return; }
+  }
+
+  default async event void Port10.fired() { call Port10.clear(); }
+  default async event void Port11.fired() { call Port11.clear(); }
+  default async event void Port12.fired() { call Port12.clear(); }
+  default async event void Port13.fired() { call Port13.clear(); }
+  default async event void Port14.fired() { call Port14.clear(); }
+  default async event void Port15.fired() { call Port15.clear(); }
+  default async event void Port16.fired() { call Port16.clear(); }
+  default async event void Port17.fired() { call Port17.clear(); }
+  async command void Port10.enable() { P1IE |= (1 << 0); }
+  async command void Port11.enable() { P1IE |= (1 << 1); }
+  async command void Port12.enable() { P1IE |= (1 << 2); }
+  async command void Port13.enable() { P1IE |= (1 << 3); }
+  async command void Port14.enable() { P1IE |= (1 << 4); }
+  async command void Port15.enable() { P1IE |= (1 << 5); }
+  async command void Port16.enable() { P1IE |= (1 << 6); }
+  async command void Port17.enable() { P1IE |= (1 << 7); }
+  async command void Port10.disable() { P1IE &= ~(1 << 0); }
+  async command void Port11.disable() { P1IE &= ~(1 << 1); }
+  async command void Port12.disable() { P1IE &= ~(1 << 2); }
+  async command void Port13.disable() { P1IE &= ~(1 << 3); }
+  async command void Port14.disable() { P1IE &= ~(1 << 4); }
+  async command void Port15.disable() { P1IE &= ~(1 << 5); }
+  async command void Port16.disable() { P1IE &= ~(1 << 6); }
+  async command void Port17.disable() { P1IE &= ~(1 << 7); }
+  async command void Port10.clear() { P1IFG &= ~(1 << 0); }
+  async command void Port11.clear() { P1IFG &= ~(1 << 1); }
+  async command void Port12.clear() { P1IFG &= ~(1 << 2); }
+  async command void Port13.clear() { P1IFG &= ~(1 << 3); }
+  async command void Port14.clear() { P1IFG &= ~(1 << 4); }
+  async command void Port15.clear() { P1IFG &= ~(1 << 5); }
+  async command void Port16.clear() { P1IFG &= ~(1 << 6); }
+  async command void Port17.clear() { P1IFG &= ~(1 << 7); }
+  async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; }
+  async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; }
+  async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; }
+  async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; }
+  async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; }
+  async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; }
+  async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; }
+  async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; }
+  async command void Port10.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 0); 
+      else      P1IES |=  (1 << 0);
+    }
+  }
+  async command void Port11.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 1); 
+      else      P1IES |=  (1 << 1);
+    }
+  }
+  async command void Port12.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 2); 
+      else      P1IES |=  (1 << 2);
+    }
+  }
+  async command void Port13.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 3); 
+      else      P1IES |=  (1 << 3);
+    }
+  }
+  async command void Port14.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 4); 
+      else      P1IES |=  (1 << 4);
+    }
+  }
+  async command void Port15.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 5); 
+      else      P1IES |=  (1 << 5);
+    }
+  }
+  async command void Port16.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 6); 
+      else      P1IES |=  (1 << 6);
+    }
+  }
+  async command void Port17.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 7); 
+      else      P1IES |=  (1 << 7);
+    }
+  }
+#endif
+
+#ifdef __msp430_have_port2
+  TOSH_SIGNAL(PORT2_VECTOR)
+  {
+    volatile int n = P2IFG & P2IE;
+
+    if (n & (1 << 0)) { signal Port20.fired(); return; }
+    if (n & (1 << 1)) { signal Port21.fired(); return; }
+    if (n & (1 << 2)) { signal Port22.fired(); return; }
+    if (n & (1 << 3)) { signal Port23.fired(); return; }
+    if (n & (1 << 4)) { signal Port24.fired(); return; }
+    if (n & (1 << 5)) { signal Port25.fired(); return; }
+    if (n & (1 << 6)) { signal Port26.fired(); return; }
+    if (n & (1 << 7)) { signal Port27.fired(); return; }
+  }
+  default async event void Port20.fired() { call Port20.clear(); }
+  default async event void Port21.fired() { call Port21.clear(); }
+  default async event void Port22.fired() { call Port22.clear(); }
+  default async event void Port23.fired() { call Port23.clear(); }
+  default async event void Port24.fired() { call Port24.clear(); }
+  default async event void Port25.fired() { call Port25.clear(); }
+  default async event void Port26.fired() { call Port26.clear(); }
+  default async event void Port27.fired() { call Port27.clear(); }
+  async command void Port20.enable() { P2IE |= (1 << 0); }
+  async command void Port21.enable() { P2IE |= (1 << 1); }
+  async command void Port22.enable() { P2IE |= (1 << 2); }
+  async command void Port23.enable() { P2IE |= (1 << 3); }
+  async command void Port24.enable() { P2IE |= (1 << 4); }
+  async command void Port25.enable() { P2IE |= (1 << 5); }
+  async command void Port26.enable() { P2IE |= (1 << 6); }
+  async command void Port27.enable() { P2IE |= (1 << 7); }
+  async command void Port20.disable() { P2IE &= ~(1 << 0); }
+  async command void Port21.disable() { P2IE &= ~(1 << 1); }
+  async command void Port22.disable() { P2IE &= ~(1 << 2); }
+  async command void Port23.disable() { P2IE &= ~(1 << 3); }
+  async command void Port24.disable() { P2IE &= ~(1 << 4); }
+  async command void Port25.disable() { P2IE &= ~(1 << 5); }
+  async command void Port26.disable() { P2IE &= ~(1 << 6); }
+  async command void Port27.disable() { P2IE &= ~(1 << 7); }
+  async command void Port20.clear() { P2IFG &= ~(1 << 0); }
+  async command void Port21.clear() { P2IFG &= ~(1 << 1); }
+  async command void Port22.clear() { P2IFG &= ~(1 << 2); }
+  async command void Port23.clear() { P2IFG &= ~(1 << 3); }
+  async command void Port24.clear() { P2IFG &= ~(1 << 4); }
+  async command void Port25.clear() { P2IFG &= ~(1 << 5); }
+  async command void Port26.clear() { P2IFG &= ~(1 << 6); }
+  async command void Port27.clear() { P2IFG &= ~(1 << 7); }
+  async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; }
+  async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; }
+  async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; }
+  async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; }
+  async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; }
+  async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; }
+  async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; }
+  async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; }
+  async command void Port20.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 0);
+      else      P2IES |=  (1 << 0);
+    }
+  }
+  async command void Port21.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 1);
+      else      P2IES |=  (1 << 1);
+    }
+  }  
+  async command void Port22.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 2);
+      else      P2IES |=  (1 << 2);
+    }
+  }  
+  async command void Port23.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 3);
+      else      P2IES |=  (1 << 3);
+    }
+  }  
+  async command void Port24.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 4);
+      else      P2IES |=  (1 << 4);
+    }
+  }
+  async command void Port25.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 5);
+      else      P2IES |=  (1 << 5);
+    }
+  }
+  async command void Port26.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 6);
+      else      P2IES |=  (1 << 6);
+    }
+  }
+  async command void Port27.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 7);
+      else      P2IES |=  (1 << 7);
+    }
+  }
+#endif
+
+
+}
diff --git a/tos/chips/msp430/pins/Msp430GpioC.nc b/tos/chips/msp430/pins/Msp430GpioC.nc
new file mode 100644
index 00000000..6215f450
--- /dev/null
+++ b/tos/chips/msp430/pins/Msp430GpioC.nc
@@ -0,0 +1,44 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of the general-purpose I/O abstraction
+ * for the TI MSP430 microcontroller.
+ *
+ * @author Joe Polastre
+ * @see  Please refer to TEP 117 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430GpioC() {
+  provides interface GeneralIO;
+  uses interface HplMsp430GeneralIO as HplGeneralIO;
+}
+implementation {
+
+  async command void GeneralIO.set() { call HplGeneralIO.set(); }
+  async command void GeneralIO.clr() { call HplGeneralIO.clr(); }
+  async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); }
+  async command bool GeneralIO.get() { return call HplGeneralIO.get(); }
+  async command void GeneralIO.makeInput() { call HplGeneralIO.makeInput(); }
+  async command void GeneralIO.makeOutput() { call HplGeneralIO.makeOutput(); }
+
+}
diff --git a/tos/chips/msp430/pins/Msp430InterruptC.nc b/tos/chips/msp430/pins/Msp430InterruptC.nc
new file mode 100644
index 00000000..cc10f0c5
--- /dev/null
+++ b/tos/chips/msp430/pins/Msp430InterruptC.nc
@@ -0,0 +1,71 @@
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of the GPIO interrupt abstraction for
+ * the TI MSP430 microcontroller.
+ *
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * @see  Please refer to TEP 117 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430InterruptC() {
+
+  provides interface GpioInterrupt as Interrupt;
+  uses interface HplMsp430Interrupt as HplInterrupt;
+
+}
+
+implementation {
+
+  error_t enable( bool rising ) {
+    atomic {
+      call Interrupt.disable();
+      call HplInterrupt.edge( rising );
+      call HplInterrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Interrupt.enableRisingEdge() {
+    return enable( TRUE );
+  }
+
+  async command error_t Interrupt.enableFallingEdge() {
+    return enable( FALSE );
+  }
+
+  async command error_t Interrupt.disable() {
+    atomic {
+      call HplInterrupt.disable();
+      call HplInterrupt.clear();
+    }
+    return SUCCESS;
+  }
+
+  async event void HplInterrupt.fired() {
+    call HplInterrupt.clear();
+    signal Interrupt.fired();
+  }
+
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc b/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc
new file mode 100644
index 00000000..2252c3f1
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalTemperatureC is the temperature sensor available on
+ * the msp430-based platforms.
+ *
+ * To convert from ADC counts to temperature, convert to voltage by
+ * dividing by 4096 and multiplying by Vref (1.5V). Then subtract
+ * 0.986 from voltage and divide by 0.00355 to get degrees C.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration Msp430InternalTemperatureC() {
+  provides interface Read;
+  provides interface ReadStream;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components Msp430InternalTemperatureP;
+  AdcReadClientC.Msp430Adc12Config -> Msp430InternalTemperatureP;
+  AdcReadStreamClientC.Msp430Adc12Config -> Msp430InternalTemperatureP;
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc b/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc
new file mode 100644
index 00000000..4c1a991a
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+module Msp430InternalTemperatureP {
+  provides interface Msp430Adc12Config;
+}
+implementation {
+
+  async command msp430adc12_channel_config_t Msp430Adc12Config.getChannelSettings() {
+    msp430adc12_channel_config_t config = {
+      inch: TEMPERATURE_DIODE_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+    };
+
+    return config;
+  }
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc b/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc
new file mode 100644
index 00000000..ffd4dd76
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalVoltageC is the voltage sensor available on the
+ * msp430-based platforms.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration Msp430InternalVoltageC() {
+  provides interface Read;
+  provides interface ReadStream;
+
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components Msp430InternalVoltageP;
+  AdcReadClientC.Msp430Adc12Config -> Msp430InternalVoltageP;
+  AdcReadStreamClientC.Msp430Adc12Config -> Msp430InternalVoltageP;
+
+  components new AdcReadNowClientC();
+  Resource = AdcReadNowClientC;
+  ReadNow = AdcReadNowClientC;
+  
+  AdcReadNowClientC.Msp430Adc12Config -> Msp430InternalVoltageP;
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc b/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc
new file mode 100644
index 00000000..8d478414
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+module Msp430InternalVoltageP {
+  provides interface Msp430Adc12Config;
+}
+implementation {
+
+  async command msp430adc12_channel_config_t Msp430Adc12Config.getChannelSettings() {
+    msp430adc12_channel_config_t config = {
+      inch: SUPPLY_VOLTAGE_HALF_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+    };
+
+    return config;
+  }
+}
diff --git a/tos/chips/msp430/timer/Alarm32khzC.nc b/tos/chips/msp430/timer/Alarm32khzC.nc
new file mode 100644
index 00000000..50a31dd3
--- /dev/null
+++ b/tos/chips/msp430/timer/Alarm32khzC.nc
@@ -0,0 +1,56 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Alarm32khzC is the alarm for async 32khz alarms
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Alarm32khzC()
+{
+  provides interface Init;
+  provides interface Alarm as Alarm32khz16;
+  provides interface Alarm as Alarm32khz32;
+}
+implementation
+{
+  components new Msp430Timer32khzC() as Msp430Timer
+           , new Msp430AlarmC(T32khz) as Msp430Alarm
+           , new TransformAlarmC(T32khz,uint32_t,T32khz,uint16_t,0) as Transform
+           , Counter32khzC as Counter
+           ;
+
+  Init = Msp430Alarm;
+
+  Alarm32khz16 = Msp430Alarm;
+  Alarm32khz32 = Transform;
+
+  Transform.AlarmFrom -> Msp430Alarm;
+  Transform.Counter -> Counter;
+
+  Msp430Alarm.Msp430Timer -> Msp430Timer;
+  Msp430Alarm.Msp430TimerControl -> Msp430Timer;
+  Msp430Alarm.Msp430Compare -> Msp430Timer;
+}
+
diff --git a/tos/chips/msp430/timer/AlarmMilliC.nc b/tos/chips/msp430/timer/AlarmMilliC.nc
new file mode 100644
index 00000000..12ff90d4
--- /dev/null
+++ b/tos/chips/msp430/timer/AlarmMilliC.nc
@@ -0,0 +1,54 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * AlarmMilliC is the alarm for async millisecond alarms
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration AlarmMilliC()
+{
+  provides interface Init;
+  provides interface Alarm as AlarmMilli32;
+}
+implementation
+{
+  components new Msp430Timer32khzC() as Msp430Timer
+           , new Msp430AlarmC(T32khz) as Msp430Alarm
+           , new TransformAlarmC(TMilli,uint32_t,T32khz,uint16_t,5) as Transform
+           , CounterMilliC as Counter
+           ;
+
+  Init = Msp430Alarm;
+
+  AlarmMilli32 = Transform;
+
+  Transform.AlarmFrom -> Msp430Alarm;
+  Transform.Counter -> Counter;
+
+  Msp430Alarm.Msp430Timer -> Msp430Timer;
+  Msp430Alarm.Msp430TimerControl -> Msp430Timer;
+  Msp430Alarm.Msp430Compare -> Msp430Timer;
+}
+
diff --git a/tos/chips/msp430/timer/BusyWait32khzC.nc b/tos/chips/msp430/timer/BusyWait32khzC.nc
new file mode 100644
index 00000000..d4b7cf89
--- /dev/null
+++ b/tos/chips/msp430/timer/BusyWait32khzC.nc
@@ -0,0 +1,41 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration BusyWait32khzC
+{
+  provides interface BusyWait;
+}
+implementation
+{
+  components new BusyWaitCounterC(T32khz,uint16_t)
+           , Msp430Counter32khzC
+           ;
+
+  BusyWait = BusyWaitCounterC;
+  BusyWaitCounter.Counter -> Msp430Counter32khzC;
+}
+
diff --git a/tos/chips/msp430/timer/BusyWaitMicroC.nc b/tos/chips/msp430/timer/BusyWaitMicroC.nc
new file mode 100644
index 00000000..cfcdfd42
--- /dev/null
+++ b/tos/chips/msp430/timer/BusyWaitMicroC.nc
@@ -0,0 +1,41 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait;
+}
+implementation
+{
+  components new BusyWaitCounterC(TMicro,uint16_t)
+           , Msp430CounterMicroC
+           ;
+
+  BusyWait = BusyWaitCounterC;
+  BusyWaitCounterC.Counter -> Msp430CounterMicroC;
+}
+
diff --git a/tos/chips/msp430/timer/Counter32khzC.nc b/tos/chips/msp430/timer/Counter32khzC.nc
new file mode 100644
index 00000000..7a73da3c
--- /dev/null
+++ b/tos/chips/msp430/timer/Counter32khzC.nc
@@ -0,0 +1,53 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Counter32khzC is the counter to be used for all 32khzs.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+#include "Timer.h"
+
+configuration Counter32khzC
+{
+  provides interface Counter as Counter32khz16;
+  provides interface Counter as Counter32khz32;
+  provides interface LocalTime as LocalTime32khz;
+}
+implementation
+{
+  components Msp430TimerC
+           , Msp430Counter32khzC
+           , new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform
+           , new CounterToLocalTimeC(T32khz)
+           ;
+
+  Counter32khz16 = Msp430Counter32khzC;
+  Counter32khz32 = Transform.Counter;
+  LocalTime32khz = CounterToLocalTimeC;
+
+  CounterToLocalTimeC.Counter -> Transform;
+  Transform.CounterFrom -> Msp430Counter32khzC;
+}
+
diff --git a/tos/chips/msp430/timer/CounterMilliC.nc b/tos/chips/msp430/timer/CounterMilliC.nc
new file mode 100644
index 00000000..7b925697
--- /dev/null
+++ b/tos/chips/msp430/timer/CounterMilliC.nc
@@ -0,0 +1,49 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Counter3MilliC is the counter to be used for all Millis
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+    
+configuration CounterMilliC
+{
+  provides interface Counter as CounterMilli32;
+  provides interface LocalTime as LocalTimeMilli;
+}
+implementation
+{
+  components Msp430TimerC
+           , Msp430Counter32khzC
+           , new TransformCounterC(TMilli,uint32_t,T32khz,uint16_t,5,uint32_t) as Transform
+           , new CounterToLocalTimeC(TMilli)
+           ;
+
+  CounterMilli32 = Transform.Counter;
+  LocalTimeMilli = CounterToLocalTimeC;
+
+  CounterToLocalTimeC.Counter -> Transform;
+  Transform.CounterFrom -> Msp430Counter32khzC;
+}
+
diff --git a/tos/chips/msp430/timer/GpioCaptureC.nc b/tos/chips/msp430/timer/GpioCaptureC.nc
new file mode 100644
index 00000000..37190d22
--- /dev/null
+++ b/tos/chips/msp430/timer/GpioCaptureC.nc
@@ -0,0 +1,71 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ */
+
+generic module GpioCaptureC() {
+
+  provides interface GpioCapture as Capture;
+  uses interface Msp430TimerControl;
+  uses interface Msp430Capture;
+  uses interface HplMsp430GeneralIO as GeneralIO;
+
+}
+
+implementation {
+
+  error_t enableCapture( uint8_t mode ) {
+    atomic {
+      call Msp430TimerControl.disableEvents();
+      call GeneralIO.selectModuleFunc();
+      call Msp430TimerControl.clearPendingInterrupt();
+      call Msp430Capture.clearOverflow();
+      call Msp430TimerControl.setControlAsCapture( mode );
+      call Msp430TimerControl.enableEvents();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Capture.captureRisingEdge() {
+    return enableCapture( MSP430TIMER_CM_RISING );
+  }
+
+  async command error_t Capture.captureFallingEdge() {
+    return enableCapture( MSP430TIMER_CM_FALLING );
+  }
+
+  async command void Capture.disable() {
+    atomic {
+      call Msp430TimerControl.disableEvents();
+      call GeneralIO.selectIOFunc();
+    }
+  }
+
+  async event void Msp430Capture.captured( uint16_t time ) {
+    call Msp430TimerControl.clearPendingInterrupt();
+    call Msp430Capture.clearOverflow();
+    signal Capture.captured( time );
+  }
+
+}
diff --git a/tos/chips/msp430/timer/HilTimerMilliC.nc b/tos/chips/msp430/timer/HilTimerMilliC.nc
new file mode 100644
index 00000000..1144de4f
--- /dev/null
+++ b/tos/chips/msp430/timer/HilTimerMilliC.nc
@@ -0,0 +1,52 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * TimerMilliC is the TinyOS TimerMilli component.  OSKI will expect
+ * TimerMilliC to exist.  It's in the platform directory so that the platform
+ * can directly manage how it chooses to implement the timer.  It is fully
+ * expected that the standard TinyOS MultiplexTimerM component will be used for
+ * all platforms, and that this configuration only specifies (implicitly or
+ * explicitly) how precisely to use the hardware resources.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer as TimerMilli[ uint8_t num ];
+}
+implementation
+{
+  components new AlarmMilliC(), new AlarmToTimerC(TMilli),
+             new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
+
+  Init = AlarmMilliC;
+  TimerMilli = VirtualizeTimerC;
+
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmMilliC;
+}
diff --git a/tos/chips/msp430/timer/Msp430AlarmC.nc b/tos/chips/msp430/timer/Msp430AlarmC.nc
new file mode 100644
index 00000000..1a781107
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430AlarmC.nc
@@ -0,0 +1,107 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Msp430Alarm is a generic component that wraps the MSP430 HPL timers and
+ * compares into a TinyOS Alarm.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430AlarmC(typedef frequency_tag)
+{
+  provides interface Init;
+  provides interface Alarm as Alarm;
+  uses interface Msp430Timer;
+  uses interface Msp430TimerControl;
+  uses interface Msp430Compare;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call Msp430TimerControl.disableEvents();
+    call Msp430TimerControl.setControlAsCompare();
+    return SUCCESS;
+  }
+
+  async command void Alarm.start( uint16_t dt )
+  {
+    call Alarm.startAt( call Alarm.getNow(), dt );
+  }
+
+  async command void Alarm.stop()
+  {
+    call Msp430TimerControl.disableEvents();
+  }
+
+  async event void Msp430Compare.fired()
+  {
+    call Msp430TimerControl.disableEvents();
+    signal Alarm.fired();
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call Msp430TimerControl.areEventsEnabled();
+  }
+
+  async command void Alarm.startAt( uint16_t t0, uint16_t dt )
+  {
+    atomic
+    {
+      uint16_t now = call Msp430Timer.get();
+      uint16_t elapsed = now - t0;
+      if( elapsed >= dt )
+      {
+        call Msp430Compare.setEventFromNow(2);
+      }
+      else
+      {
+        uint16_t remaining = dt - elapsed;
+        if( remaining <= 2 )
+          call Msp430Compare.setEventFromNow(2);
+        else
+          call Msp430Compare.setEvent( now+remaining );
+      }
+      call Msp430TimerControl.clearPendingInterrupt();
+      call Msp430TimerControl.enableEvents();
+    }
+  }
+
+  async command uint16_t Alarm.getNow()
+  {
+    return call Msp430Timer.get();
+  }
+
+  async command uint16_t Alarm.getAlarm()
+  {
+    return call Msp430Compare.getEvent();
+  }
+
+  async event void Msp430Timer.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Capture.nc b/tos/chips/msp430/timer/Msp430Capture.nc
new file mode 100644
index 00000000..1dd39c1d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Capture.nc
@@ -0,0 +1,78 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "Msp430Timer.h"
+
+interface Msp430Capture
+{
+  /**
+   * Reads the value of the last capture event in TxCCRx
+   */
+  async command uint16_t getEvent();
+
+  /**
+   * Set the edge that the capture should occur
+   *
+   * @param cm Capture Mode for edge capture.
+   * enums exist for:
+   *   MSP430TIMER_CM_NONE is no capture.
+   *   MSP430TIMER_CM_RISING is rising edge capture.
+   *   MSP430TIMER_CM_FALLING is a falling edge capture.
+   *   MSP430TIMER_CM_BOTH captures on both rising and falling edges.
+   */
+  async command void setEdge(uint8_t cm);
+
+  /**
+   * Determine if a capture overflow is pending.
+   *
+   * @return TRUE if the capture register has overflowed
+   */
+  async command bool isOverflowPending();
+
+  /**
+   * Clear the capture overflow flag for when multiple captures occur
+   */
+  async command void clearOverflow();
+
+  /**
+   * Set whether the capture should occur synchronously or asynchronously.
+   * TinyOS default is synchronous captures.
+   * WARNING: if the capture signal is asynchronous to the timer clock,
+   *          it could case a race condition (see Timer documentation
+   *          in MSP430F1xx user guide)
+   * @param synchronous TRUE to synchronize the timer capture with the
+   *        next timer clock instead of occurring asynchronously.
+   */
+  async command void setSynchronous(bool synchronous);
+
+  /**
+   * Signalled when an event is captured.
+   *
+   * @param time The time of the capture event
+   */
+  async event void captured(uint16_t time);
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockC.nc b/tos/chips/msp430/timer/Msp430ClockC.nc
new file mode 100644
index 00000000..158fad6c
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockC.nc
@@ -0,0 +1,40 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+configuration Msp430ClockC
+{
+  provides interface Init;
+  provides interface Msp430ClockInit;
+}
+implementation
+{
+  components Msp430ClockP
+           , Msp430DcoCalibC  //perpetual recalibration with each ACLK overflow
+           ;
+
+  Init = Msp430ClockP;
+  Msp430ClockInit = Msp430ClockP;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockInit.nc b/tos/chips/msp430/timer/Msp430ClockInit.nc
new file mode 100644
index 00000000..0c0e24e8
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockInit.nc
@@ -0,0 +1,36 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+interface Msp430ClockInit
+{
+  event void initClocks();
+  event void initTimerA();
+  event void initTimerB();
+
+  command void defaultInitClocks();
+  command void defaultInitTimerA();
+  command void defaultInitTimerB();
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockP.nc b/tos/chips/msp430/timer/Msp430ClockP.nc
new file mode 100644
index 00000000..1e1a7704
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockP.nc
@@ -0,0 +1,224 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+#include "Msp430Timer.h"
+
+module Msp430ClockP
+{
+  provides interface Init;
+  provides interface Msp430ClockInit;
+}
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(TACTL);
+  MSP430REG_NORACE(TAIV);
+  MSP430REG_NORACE(TBCTL);
+  MSP430REG_NORACE(TBIV);
+
+  enum
+  {
+    ACLK_CALIB_PERIOD = 8,
+    ACLK_KHZ = 32,
+    TARGET_DCO_KHZ = 4096, // prescribe the cpu clock rate in kHz
+    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
+  };
+
+  command void Msp430ClockInit.defaultInitClocks()
+  {
+    // BCSCTL1
+    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
+    // .XTS = 0; set low frequency mode for LXFT1
+    // .DIVA = 0; set the divisor on ACLK to 1
+    // .RSEL, do not modify
+    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+
+    // BCSCTL2
+    // .SELM = 0; select DCOCLK as source for MCLK
+    // .DIVM = 0; set the divisor of MCLK to 1
+    // .SELS = 0; select DCOCLK as source for SCLK
+    // .DIVS = 2; set the divisor of SCLK to 4
+    // .DCOR = 0; select internal resistor for DCO
+    BCSCTL2 = DIVS1;
+
+    // IE1.OFIE = 0; no interrupt for oscillator fault
+    CLR_FLAG( IE1, OFIE );
+  }
+
+  command void Msp430ClockInit.defaultInitTimerA()
+  {
+    TAR = 0;
+
+    // TACTL
+    // .TACLGRP = 0; each TACL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TASSEL = 2; source SMCLK = DCO/4
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TACLR = 0; reset timer A
+    // .TAIE = 1; enable timer A interrupts
+    TACTL = TASSEL1 | TAIE;
+  }
+
+  command void Msp430ClockInit.defaultInitTimerB()
+  {
+    TBR = 0;
+
+    // TBCTL
+    // .TBCLGRP = 0; each TBCL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TBSSEL = 1; source ACLK
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TBCLR = 0; reset timer B
+    // .TBIE = 1; enable timer B interrupts
+    TBCTL = TBSSEL0 | TBIE;
+  }
+
+  default event void Msp430ClockInit.initClocks()
+  {
+    call Msp430ClockInit.defaultInitClocks();
+  }
+
+  default event void Msp430ClockInit.initTimerA()
+  {
+    call Msp430ClockInit.defaultInitTimerA();
+  }
+
+  default event void Msp430ClockInit.initTimerB()
+  {
+    call Msp430ClockInit.defaultInitTimerB();
+  }
+
+
+  void startTimerA()
+  {
+    // TACTL.MC = 2; continuous mode
+    TACTL = MC1 | (TACTL & ~(MC1|MC0));
+  }
+
+  void stopTimerA()
+  {
+    //TACTL.MC = 0; stop timer B
+    TACTL = TACTL & ~(MC1|MC0);
+  }
+
+  void startTimerB()
+  {
+    // TBCTL.MC = 2; continuous mode
+    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
+  }
+
+  void stopTimerB()
+  {
+    //TBCTL.MC = 0; stop timer B
+    TBCTL = TBCTL & ~(MC1|MC0);
+  }
+
+  void set_dco_calib( int calib )
+  {
+    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
+    DCOCTL = calib & 0xff;
+  }
+
+  uint16_t test_calib_busywait_delta( int calib )
+  {
+    int8_t aclk_count = 2;
+    uint16_t dco_prev = 0;
+    uint16_t dco_curr = 0;
+
+    set_dco_calib( calib );
+
+    while( aclk_count-- > 0 )
+    {
+      TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt
+      TBCCTL0 &= ~CCIFG; // clear pending interrupt
+      while( (TBCCTL0 & CCIFG) == 0 ); // busy wait
+      dco_prev = dco_curr;
+      dco_curr = TAR;
+    }
+
+    return dco_curr - dco_prev;
+  }
+
+  // busyCalibrateDCO
+  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
+  // DCOCTL and BCSCTL1 are calibrated when done.
+  void busyCalibrateDco()
+  {
+    // --- variables ---
+    int calib;
+    int step;
+
+    // --- setup ---
+
+    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
+    TBCTL = TBSSEL0 | MC1;
+    BCSCTL1 = XT2OFF | RSEL2;
+    BCSCTL2 = 0;
+    TBCCTL0 = CM0;
+
+    // --- calibrate ---
+
+    // Binary search for RSEL,DCO,DCOMOD.
+    // It's okay that RSEL isn't monotonic.
+
+    for( calib=0,step=0x800; step!=0; step>>=1 )
+    {
+      // if the step is not past the target, commit it
+      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
+        calib |= step;
+    }
+
+    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
+    if( (calib & 0x0e0) == 0x0e0 )
+      calib &= ~0x01f;
+
+    set_dco_calib( calib );
+  }
+
+  command error_t Init.init()
+  {
+    // Reset timers and clear interrupt vectors
+    TACTL = TACLR;
+    TAIV = 0;
+    TBCTL = TBCLR;
+    TBIV = 0;
+
+    atomic
+    {
+      busyCalibrateDco();
+      signal Msp430ClockInit.initClocks();
+      signal Msp430ClockInit.initTimerA();
+      signal Msp430ClockInit.initTimerB();
+      startTimerA();
+      startTimerB();
+    }
+
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Compare.nc b/tos/chips/msp430/timer/Msp430Compare.nc
new file mode 100644
index 00000000..5c2571fd
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Compare.nc
@@ -0,0 +1,37 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+#include "Msp430Timer.h"
+
+interface Msp430Compare
+{
+  async command uint16_t getEvent();
+  async command void setEvent( uint16_t time );
+  async command void setEventFromPrev( uint16_t delta );
+  async command void setEventFromNow( uint16_t delta );
+
+  async event void fired();
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Counter32khzC.nc b/tos/chips/msp430/timer/Msp430Counter32khzC.nc
new file mode 100644
index 00000000..14fe3812
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Counter32khzC.nc
@@ -0,0 +1,45 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+#include "Timer.h"
+
+configuration Msp430Counter32khzC
+{
+  provides interface Counter as Msp430Counter32khz;
+}
+implementation
+{
+  components Msp430TimerC
+           , new Msp430CounterC(T32khz) as Counter
+           ;
+
+  Msp430Counter32khz = Counter;
+  Counter.Msp430Timer -> Msp430TimerC.TimerB;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430CounterC.nc b/tos/chips/msp430/timer/Msp430CounterC.nc
new file mode 100644
index 00000000..c6f31ffa
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430CounterC.nc
@@ -0,0 +1,58 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Msp430Counter is a generic component that wraps the MSP430 HPL timers into a
+ * TinyOS Counter.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module Msp430CounterC( typedef frequency_tag )
+{
+  provides interface Counter as Counter;
+  uses interface Msp430Timer;
+}
+implementation
+{
+  async command uint16_t Counter.get()
+  {
+    return call Msp430Timer.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call Msp430Timer.isOverflowPending();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call Msp430Timer.clearOverflow();
+  }
+
+  async event void Msp430Timer.overflow()
+  {
+    signal Counter.overflow();
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430CounterMicroC.nc b/tos/chips/msp430/timer/Msp430CounterMicroC.nc
new file mode 100644
index 00000000..d43f22f4
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430CounterMicroC.nc
@@ -0,0 +1,43 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
+ *
+ * @author Cory Sharp 
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Msp430CounterMicroC
+{
+  provides interface Counter as Msp430CounterMicro;
+}
+implementation
+{
+  components Msp430TimerC
+           , new Msp430CounterC(TMicro) as Counter
+           ;
+
+  Msp430CounterMicro = Counter;
+  Counter.Msp430Timer -> Msp430TimerC.TimerA;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430DcoCalibC.nc b/tos/chips/msp430/timer/Msp430DcoCalibC.nc
new file mode 100644
index 00000000..78e4e9e4
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430DcoCalibC.nc
@@ -0,0 +1,36 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+configuration Msp430DcoCalibC
+{
+}
+implementation
+{
+  components Msp430DcoCalibP, Msp430TimerC;
+
+  Msp430DcoCalibP.TimerMicro -> Msp430TimerC.TimerA;
+  Msp430DcoCalibP.Timer32khz -> Msp430TimerC.TimerB;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430DcoCalibP.nc b/tos/chips/msp430/timer/Msp430DcoCalibP.nc
new file mode 100644
index 00000000..b0127eed
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430DcoCalibP.nc
@@ -0,0 +1,80 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+module Msp430DcoCalibP
+{
+  uses interface Msp430Timer as TimerMicro;
+  uses interface Msp430Timer as Timer32khz;
+}
+implementation
+{
+  uint16_t m_prev;
+
+  enum
+  {
+    TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mhz
+    MAX_DEVIATION = 7, // about 0.35% error
+  };
+
+  // this gets executed 32 times a second
+  async event void TimerMicro.overflow()
+  {
+    uint16_t now = call Timer32khz.get();
+    uint16_t delta = now - m_prev;
+    m_prev = now;
+
+    if( delta > (TARGET_DELTA+MAX_DEVIATION) )
+    {
+      // too many 32khz ticks means the DCO is running too slow, speed it up
+      if( DCOCTL < 0xe0 )
+      {
+        DCOCTL++;
+      }
+      else if( (BCSCTL1 & 7) < 7 )
+      {
+        BCSCTL1++;
+        DCOCTL = 96;
+      }
+    }
+    else if( delta < (TARGET_DELTA-MAX_DEVIATION) )
+    {
+      // too few 32khz ticks means the DCO is running too fast, slow it down
+      if( DCOCTL > 0 )
+      {
+        DCOCTL--;
+      }
+      else if( (BCSCTL1 & 7) > 0 )
+      {
+        BCSCTL1--;
+        DCOCTL = 128;
+      }
+    }
+  }
+
+  async event void Timer32khz.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer.h b/tos/chips/msp430/timer/Msp430Timer.h
new file mode 100644
index 00000000..6c077045
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer.h
@@ -0,0 +1,94 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+#ifndef _H_Msp430Timer_h
+#define _H_Msp430Timer_h
+
+enum {
+  MSP430TIMER_CM_NONE = 0,
+  MSP430TIMER_CM_RISING = 1,
+  MSP430TIMER_CM_FALLING = 2,
+  MSP430TIMER_CM_BOTH = 3,
+
+  MSP430TIMER_STOP_MODE = 0,
+  MSP430TIMER_UP_MODE = 1,
+  MSP430TIMER_CONTINUOUS_MODE = 2,
+  MSP430TIMER_UPDOWN_MODE = 3,
+
+  MSP430TIMER_TACLK = 0,
+  MSP430TIMER_TBCLK = 0,
+  MSP430TIMER_ACLK = 1,
+  MSP430TIMER_SMCLK = 2,
+  MSP430TIMER_INCLK = 3,
+
+  MSP430TIMER_CLOCKDIV_1 = 0,
+  MSP430TIMER_CLOCKDIV_2 = 1,
+  MSP430TIMER_CLOCKDIV_4 = 2,
+  MSP430TIMER_CLOCKDIV_8 = 3,
+};
+
+typedef struct
+{
+  int ccifg : 1;    // capture/compare interrupt flag
+  int cov : 1;      // capture overflow flag
+  int out : 1;      // output value
+  int cci : 1;      // capture/compare input value
+  int ccie : 1;     // capture/compare interrupt enable
+  int outmod : 3;   // output mode
+  int cap : 1;      // 1=capture mode, 0=compare mode
+  int clld : 2;     // compare latch load
+  int scs : 1;      // synchronize capture source
+  int ccis : 2;     // capture/compare input select: 0=CCIxA, 1=CCIxB, 2=GND, 3=VCC
+  int cm : 2;       // capture mode: 0=none, 1=rising, 2=falling, 3=both
+} msp430_compare_control_t;
+
+typedef struct
+{
+  int taifg : 1;    // timer A interrupt flag
+  int taie : 1;     // timer A interrupt enable
+  int taclr : 1;    // timer A clear: resets TAR, .id, and .mc
+  int _unused0 : 1; // unused
+  int mc : 2;       // mode control: 0=stop, 1=up, 2=continuous, 3=up/down
+  int id : 2;       // input divisor: 0=/1, 1=/2, 2=/4, 3=/8
+  int tassel : 2;   // timer A source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK
+  int _unused1 : 6; // unused
+} msp430_timer_a_control_t;
+
+typedef struct
+{
+  int tbifg : 1;    // timer B interrupt flag
+  int tbie : 1;     // timer B interrupt enable
+  int tbclr : 1;    // timer B clear: resets TAR, .id, and .mc
+  int _unused0 : 1; // unused
+  int mc : 2;       // mode control: 0=stop, 1=up, 2=continuous, 3=up/down
+  int id : 2;       // input divisor: 0=/1, 1=/2, 2=/4, 3=/8
+  int tbssel : 2;   // timer B source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK
+  int _unused1 : 1; // unused
+  int cntl : 2;     // counter length: 0=16-bit, 1=12-bit, 2=10-bit, 3=8-bit
+  int tbclgrp : 2;  // tbclx group: 0=independent, 1=0/12/34/56, 2=0/123/456, 3=all
+  int _unused2 : 1; // unused
+} msp430_timer_b_control_t;
+
+#endif//_H_Msp430Timer_h
+
diff --git a/tos/chips/msp430/timer/Msp430Timer.nc b/tos/chips/msp430/timer/Msp430Timer.nc
new file mode 100644
index 00000000..d9ba87c3
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer.nc
@@ -0,0 +1,48 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ * @author Jan Hauer 
+ */
+
+//@author Cory Sharp 
+//@author Jan Hauer 
+
+#include "Msp430Timer.h"
+
+interface Msp430Timer
+{
+  async command uint16_t get();
+  async command bool isOverflowPending();
+  async command void clearOverflow();
+  async event void overflow();
+
+  async command void setMode( int mode );
+  async command int getMode();
+  async command void clear();
+  async command void enableEvents();
+  async command void disableEvents();
+  async command void setClockSource( uint16_t clockSource );
+  async command void setInputDivider( uint16_t inputDivider );
+  // partial timer management, add more commands here as appropriate
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer32khzC.nc b/tos/chips/msp430/timer/Msp430Timer32khzC.nc
new file mode 100644
index 00000000..e4b723a4
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer32khzC.nc
@@ -0,0 +1,42 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+generic configuration Msp430Timer32khzC()
+{
+  provides interface Msp430Timer;
+  provides interface Msp430TimerControl;
+  provides interface Msp430Compare;
+}
+implementation
+{
+  components Msp430Timer32khzMapC as Map;
+
+  enum { ALARM_ID = unique("Msp430Timer32khzMapC") };
+
+  Msp430Timer = Map.Msp430Timer[ ALARM_ID ];
+  Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ];
+  Msp430Compare = Map.Msp430Compare[ ALARM_ID ];
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..5ce92682
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc
@@ -0,0 +1,73 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz
+ * hardware timers on the MSP430 that are available for compile time allocation
+ * by "new Alarm32khzC()", "new AlarmMilliC()", and so on.
+ *
+ * Platforms based on the MSP430 are encouraged to copy in and override this
+ * file, presenting only the hardware timers that are available for allocation
+ * on that platform.
+ *
+ * @author Cory Sharp 
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerC.nc b/tos/chips/msp430/timer/Msp430TimerC.nc
new file mode 100644
index 00000000..65b23cd8
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerC.nc
@@ -0,0 +1,163 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+ 
+/**
+ * @author Cory Sharp 
+ */
+
+configuration Msp430TimerC
+{
+  provides interface Msp430Timer as TimerA;
+  provides interface Msp430TimerControl as ControlA0;
+  provides interface Msp430TimerControl as ControlA1;
+  provides interface Msp430TimerControl as ControlA2;
+  provides interface Msp430Compare as CompareA0;
+  provides interface Msp430Compare as CompareA1;
+  provides interface Msp430Compare as CompareA2;
+  provides interface Msp430Capture as CaptureA0;
+  provides interface Msp430Capture as CaptureA1;
+  provides interface Msp430Capture as CaptureA2;
+
+  provides interface Msp430Timer as TimerB;
+  provides interface Msp430TimerControl as ControlB0;
+  provides interface Msp430TimerControl as ControlB1;
+  provides interface Msp430TimerControl as ControlB2;
+  provides interface Msp430TimerControl as ControlB3;
+  provides interface Msp430TimerControl as ControlB4;
+  provides interface Msp430TimerControl as ControlB5;
+  provides interface Msp430TimerControl as ControlB6;
+  provides interface Msp430Compare as CompareB0;
+  provides interface Msp430Compare as CompareB1;
+  provides interface Msp430Compare as CompareB2;
+  provides interface Msp430Compare as CompareB3;
+  provides interface Msp430Compare as CompareB4;
+  provides interface Msp430Compare as CompareB5;
+  provides interface Msp430Compare as CompareB6;
+  provides interface Msp430Capture as CaptureB0;
+  provides interface Msp430Capture as CaptureB1;
+  provides interface Msp430Capture as CaptureB2;
+  provides interface Msp430Capture as CaptureB3;
+  provides interface Msp430Capture as CaptureB4;
+  provides interface Msp430Capture as CaptureB5;
+  provides interface Msp430Capture as CaptureB6;
+}
+implementation
+{
+  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
+               TASSEL0, TASSEL1, FALSE ) as Msp430TimerA
+           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
+               TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB
+           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
+           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
+           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
+           , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0
+           , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1
+           , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2
+           , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3
+           , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4
+           , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5
+           , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6
+           , Msp430TimerCommonP as Common
+           ;
+
+  // Timer A
+  TimerA = Msp430TimerA.Timer;
+  Msp430TimerA.Overflow -> Msp430TimerA.Event[5];
+  Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0;
+  Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1;
+
+  // Timer A0
+  ControlA0 = Msp430TimerA0.Control;
+  CompareA0 = Msp430TimerA0.Compare;
+  CaptureA0 = Msp430TimerA0.Capture;
+  Msp430TimerA0.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA0.Event -> Msp430TimerA.Event[0];
+
+  // Timer A1
+  ControlA1 = Msp430TimerA1.Control;
+  CompareA1 = Msp430TimerA1.Compare;
+  CaptureA1 = Msp430TimerA1.Capture;
+  Msp430TimerA1.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA1.Event -> Msp430TimerA.Event[1];
+
+  // Timer A2
+  ControlA2 = Msp430TimerA2.Control;
+  CompareA2 = Msp430TimerA2.Compare;
+  CaptureA2 = Msp430TimerA2.Capture;
+  Msp430TimerA2.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA2.Event -> Msp430TimerA.Event[2];
+
+  // Timer B
+  TimerB = Msp430TimerB.Timer;
+  Msp430TimerB.Overflow -> Msp430TimerB.Event[7];
+  Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0;
+  Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1;
+
+  // Timer B0
+  ControlB0 = Msp430TimerB0.Control;
+  CompareB0 = Msp430TimerB0.Compare;
+  CaptureB0 = Msp430TimerB0.Capture;
+  Msp430TimerB0.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB0.Event -> Msp430TimerB.Event[0];
+
+  // Timer B1
+  ControlB1 = Msp430TimerB1.Control;
+  CompareB1 = Msp430TimerB1.Compare;
+  CaptureB1 = Msp430TimerB1.Capture;
+  Msp430TimerB1.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB1.Event -> Msp430TimerB.Event[1];
+
+  // Timer B2
+  ControlB2 = Msp430TimerB2.Control;
+  CompareB2 = Msp430TimerB2.Compare;
+  CaptureB2 = Msp430TimerB2.Capture;
+  Msp430TimerB2.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB2.Event -> Msp430TimerB.Event[2];
+
+  // Timer B3
+  ControlB3 = Msp430TimerB3.Control;
+  CompareB3 = Msp430TimerB3.Compare;
+  CaptureB3 = Msp430TimerB3.Capture;
+  Msp430TimerB3.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB3.Event -> Msp430TimerB.Event[3];
+
+  // Timer B4
+  ControlB4 = Msp430TimerB4.Control;
+  CompareB4 = Msp430TimerB4.Compare;
+  CaptureB4 = Msp430TimerB4.Capture;
+  Msp430TimerB4.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB4.Event -> Msp430TimerB.Event[4];
+
+  // Timer B5
+  ControlB5 = Msp430TimerB5.Control;
+  CompareB5 = Msp430TimerB5.Compare;
+  CaptureB5 = Msp430TimerB5.Capture;
+  Msp430TimerB5.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB5.Event -> Msp430TimerB.Event[5];
+
+  // Timer B6
+  ControlB6 = Msp430TimerB6.Control;
+  CompareB6 = Msp430TimerB6.Compare;
+  CaptureB6 = Msp430TimerB6.Capture;
+  Msp430TimerB6.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB6.Event -> Msp430TimerB.Event[6];
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerCapComP.nc b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
new file mode 100644
index 00000000..71511600
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
@@ -0,0 +1,189 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+#include "Msp430Timer.h"
+
+generic module Msp430TimerCapComP(
+    uint16_t TxCCTLx_addr,
+    uint16_t TxCCRx_addr
+  )
+{
+  provides interface Msp430TimerControl as Control;
+  provides interface Msp430Compare as Compare;
+  provides interface Msp430Capture as Capture;
+  uses interface Msp430Timer as Timer;
+  uses interface Msp430TimerEvent as Event;
+}
+implementation
+{
+  #define TxCCTLx (*(volatile TYPE_TACCTL0*)TxCCTLx_addr)
+  #define TxCCRx (*(volatile TYPE_TACCR0*)TxCCRx_addr)
+
+  typedef msp430_compare_control_t cc_t;
+
+  DEFINE_UNION_CAST(CC2int,uint16_t,cc_t)
+  DEFINE_UNION_CAST(int2CC,cc_t,uint16_t)
+
+  uint16_t compareControl()
+  {
+    cc_t x = {
+      cm : 1,    // capture on rising edge
+      ccis : 0,  // capture/compare input select
+      clld : 0,  // TBCL1 loads on write to TBCCR1
+      cap : 0,   // compare mode
+      ccie : 0,  // capture compare interrupt enable
+    };
+    return CC2int(x);
+  }
+
+  uint16_t captureControl(uint8_t l_cm)
+  {
+    cc_t x = {
+      cm : l_cm & 0x03,    // capture on rising edge
+      ccis : 0,  // capture/compare input select
+      clld : 0,  // TBCL1 loads on write to TBCCR1
+      cap : 1,   // compare mode
+      scs : 1,   // synchronous capture mode
+      ccie : 0,  // capture compare interrupt enable
+    };
+    return CC2int(x);
+  }
+
+  async command cc_t Control.getControl()
+  {
+    return int2CC(TxCCTLx);
+  }
+
+  async command bool Control.isInterruptPending()
+  {
+    return TxCCTLx & CCIFG;
+  }
+
+  async command void Control.clearPendingInterrupt()
+  {
+    CLR_FLAG(TxCCTLx,CCIFG);
+  }
+
+  async command void Control.setControl( cc_t x )
+  {
+    TxCCTLx = CC2int(x);
+  }
+
+  async command void Control.setControlAsCompare()
+  {
+    TxCCTLx = compareControl();
+  }
+
+  async command void Control.setControlAsCapture( uint8_t cm )
+  {
+    TxCCTLx = captureControl( cm );
+  }
+
+  async command void Capture.setEdge(uint8_t cm)
+  {
+    cc_t t = call Control.getControl();
+    t.cm = cm & 0x03;
+    TxCCTLx = CC2int(t);
+  }
+
+  async command void Capture.setSynchronous( bool sync )
+  {
+    if( sync )
+      SET_FLAG( TxCCTLx, SCS );
+    else
+      CLR_FLAG( TxCCTLx, SCS );
+  }
+
+  async command void Control.enableEvents()
+  {
+    SET_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command void Control.disableEvents()
+  {
+    CLR_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command bool Control.areEventsEnabled()
+  {
+    return READ_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command uint16_t Compare.getEvent()
+  {
+    return TxCCRx;
+  }
+
+  async command uint16_t Capture.getEvent()
+  {
+    return TxCCRx;
+  }
+
+  async command void Compare.setEvent( uint16_t x )
+  {
+    TxCCRx = x;
+  }
+
+  async command void Compare.setEventFromPrev( uint16_t x )
+  {
+    TxCCRx += x;
+  }
+
+  async command void Compare.setEventFromNow( uint16_t x )
+  {
+    TxCCRx = call Timer.get() + x;
+  }
+
+  async command bool Capture.isOverflowPending()
+  {
+    return READ_FLAG( TxCCTLx, COV );
+  }
+
+  async command void Capture.clearOverflow()
+  {
+    CLR_FLAG( TxCCTLx, COV );
+  }
+
+  async event void Event.fired()
+  {
+    if( (call Control.getControl()).cap )
+      signal Capture.captured( call Capture.getEvent() );
+    else
+      signal Compare.fired();
+  }
+
+  default async event void Capture.captured( uint16_t n )
+  {
+  }
+
+  default async event void Compare.fired()
+  {
+  }
+
+  async event void Timer.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/timer/Msp430TimerCommonP.nc
new file mode 100644
index 00000000..64c27704
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerCommonP.nc
@@ -0,0 +1,16 @@
+
+module Msp430TimerCommonP
+{
+  provides interface Msp430TimerEvent as VectorTimerA0;
+  provides interface Msp430TimerEvent as VectorTimerA1;
+  provides interface Msp430TimerEvent as VectorTimerB0;
+  provides interface Msp430TimerEvent as VectorTimerB1;
+}
+implementation
+{
+  TOSH_SIGNAL(TIMERA0_VECTOR) { signal VectorTimerA0.fired(); }
+  TOSH_SIGNAL(TIMERA1_VECTOR) { signal VectorTimerA1.fired(); }
+  TOSH_SIGNAL(TIMERB0_VECTOR) { signal VectorTimerB0.fired(); }
+  TOSH_SIGNAL(TIMERB1_VECTOR) { signal VectorTimerB1.fired(); }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerControl.nc b/tos/chips/msp430/timer/Msp430TimerControl.nc
new file mode 100644
index 00000000..6d8c6d6d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerControl.nc
@@ -0,0 +1,44 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ * @author Joe Polastre
+ */
+
+#include "Msp430Timer.h"
+
+interface Msp430TimerControl
+{
+  async command msp430_compare_control_t getControl();
+  async command bool isInterruptPending();
+  async command void clearPendingInterrupt();
+
+  async command void setControl(msp430_compare_control_t control );
+  async command void setControlAsCompare();
+  async command void setControlAsCapture(bool low_to_high);
+
+  async command void enableEvents();
+  async command void disableEvents();
+  async command bool areEventsEnabled();
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerEvent.nc b/tos/chips/msp430/timer/Msp430TimerEvent.nc
new file mode 100644
index 00000000..2aa0e856
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerEvent.nc
@@ -0,0 +1,30 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+interface Msp430TimerEvent
+{
+  async event void fired();
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerP.nc b/tos/chips/msp430/timer/Msp430TimerP.nc
new file mode 100644
index 00000000..f9f090c1
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerP.nc
@@ -0,0 +1,139 @@
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Cory Sharp 
+ */
+
+#include "msp430regtypes.h"
+
+generic module Msp430TimerP(
+  uint16_t TxIV_addr,
+  uint16_t TxR_addr,
+  uint16_t TxCTL_addr,
+  uint16_t TxIFG,
+  uint16_t TxCLR,
+  uint16_t TxIE,
+  uint16_t TxSSEL0,
+  uint16_t TxSSEL1,
+  bool isClockSourceAsync )
+{
+  provides interface Msp430Timer as Timer;
+  provides interface Msp430TimerEvent as Event[uint8_t n];
+  uses interface Msp430TimerEvent as Overflow;
+  uses interface Msp430TimerEvent as VectorTimerX0;
+  uses interface Msp430TimerEvent as VectorTimerX1;
+}
+implementation
+{
+  #define TxIV (*(volatile TYPE_TAIV*)TxIV_addr)
+  #define TxR (*(volatile TYPE_TAR*)TxR_addr)
+  #define TxCTL (*(volatile TYPE_TACTL*)TxCTL_addr)
+
+  async command uint16_t Timer.get()
+  {
+    // CSS 10 Feb 2006: Brano Kusy notes MSP430 User's Guide, Section 12.2.1,
+    // Note says reading a counter may return garbage if its clock source is
+    // async.  The noted work around is to take a majority vote.
+
+    if( isClockSourceAsync ) {
+      atomic {
+        uint16_t t0;
+        uint16_t t1=TxR;
+        do { t0=t1; t1=TxR; } while( t0 != t1 );
+        return t1;
+      }
+    }
+    else {
+      return TxR;
+    }
+  }
+
+  async command bool Timer.isOverflowPending()
+  {
+    return TxCTL & TxIFG;
+  }
+
+  async command void Timer.clearOverflow()
+  {
+    CLR_FLAG(TxCTL,TxIFG);
+  }
+
+  async command void Timer.setMode( int mode )
+  {
+    TxCTL = (TxCTL & ~(MC1|MC0)) | ((mode<<4) & (MC1|MC0));
+  }
+
+  async command int Timer.getMode()
+  {
+    return (TxCTL & (MC1|MC0)) >> 4;
+  }
+
+  async command void Timer.clear()
+  {
+    TxCTL |= TxCLR;
+  }
+
+  async command void Timer.enableEvents()
+  {
+    TxCTL |= TxIE;
+  }
+
+  async command void Timer.disableEvents()
+  {
+    TxCTL &= ~TxIE;
+  }
+
+  async command void Timer.setClockSource( uint16_t clockSource )
+  {
+    TxCTL = (TxCTL & ~(TxSSEL0|TxSSEL1)) | ((clockSource << 8) & (TxSSEL0|TxSSEL1));
+  }
+
+  async command void Timer.setInputDivider( uint16_t inputDivider )
+  {
+    TxCTL = (TxCTL & ~(ID_1|ID_3)) | ((inputDivider << 8) & (ID_1|ID_3));
+  }
+
+  async event void VectorTimerX0.fired()
+  {
+    signal Event.fired[0]();
+  }
+
+  async event void VectorTimerX1.fired()
+  {
+    uint8_t n = TxIV;
+    signal Event.fired[ n >> 1 ]();
+  }
+
+  async event void Overflow.fired()
+  {
+    signal Timer.overflow();
+  }
+
+  default async event void Timer.overflow()
+  {
+  }
+
+  default async event void Event.fired[uint8_t n]()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/usart/HplMsp430Usart.nc b/tos/chips/msp430/usart/HplMsp430Usart.nc
new file mode 100644
index 00000000..1882f5bd
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart.nc
@@ -0,0 +1,222 @@
+/*
+ * Copyright (c) 2004-2005, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Byte-level interface to control a USART. 
+ * 
    The USART can be switched to SPI- or UART-mode. The interface follows
+ * the convention of being stateless, thus a higher layer has to maintain
+ * state information. I.e. calling tx will transmit a byte of
+ * data in the mode (SPI or UART) the USART has been set to before.
+ *
+ * @author Jan Hauer (hauer@tkn.tu-berlin.de)
+ * @author Joe Polastre
+ * @version $Revision$ $Date$
+ */
+ 
+#include "msp430usart.h"
+
+interface HplMsp430Usart {
+
+  /**
+   * Returns an enum value corresponding to the current mode of the
+   * USART module.  Allows one to read the module mode, change it, and
+   * then reset it back to its original state after use.
+   */
+  async command msp430_usartmode_t getMode();
+
+  /**
+   * Sets the USART mode to one of the options from msp430_usartmode_t
+   * defined in MSP430USART.h
+   *
+   * @return SUCCESS if the mode was changed
+   */
+  async command void setMode(msp430_usartmode_t mode);
+
+  /**
+   * Returns TRUE if the USART has UART TX mode enabled
+   */
+  async command bool isUARTtx();
+
+  /**
+   * Returns TRUE if the USART has UART RX mode enabled
+   */
+  async command bool isUARTrx();
+
+  /**
+   * Returns TRUE if the USART is set to UART mode (both RX and TX)
+   */
+  async command bool isUART();
+
+ /**
+   * Enables both the Rx and the Tx UART modules.
+   */
+  async command void enableUART();
+  
+ /**
+   * Disables both the Rx and the Tx UART modules.
+   */
+  async command void disableUART();
+ 
+ /**
+   * Enables the UART TX functionality of the USART module.
+   */
+  async command void enableUARTTx();
+
+ /**
+   * Disables the UART TX module.
+   */
+  async command void disableUARTTx();
+
+ /**
+   * Enables the UART RX functionality of the USART module.
+   */
+  async command void enableUARTRx();
+
+ /**
+   * Disables the UART RX module.
+   */
+  async command void disableUARTRx();
+  
+ /**
+   * Enables the USART when in SPI mode.
+   */
+  async command void enableSPI();
+  
+ /**
+   * Disables the USART when in SPI mode.
+   */
+  async command void disableSPI();
+  
+  /**
+   * Enables the I2C module (register flags)
+   */
+  async command void enableI2C();
+
+  /**
+   * Disables the I2C module
+   */
+  async command void disableI2C();
+
+  /**
+   * Returns TRUE if the USART is set to SPI mode
+   */
+  async command bool isSPI();
+
+ /**
+   * Switches USART to SPI mode.
+   */
+  async command void setModeSPI();
+	
+ /**
+   * Switches USART to UART TX mode (RX pins disabled).
+   * Interrupts disabled by default.
+   */	
+  async command void setModeUART_TX();
+	
+ /**
+   * Switches USART to UART RX mode (TX pins disabled)..
+   * Interrupts disabled by default.
+   */	
+  async command void setModeUART_RX();
+
+ /**
+   * Switches USART to UART mode (RX and TX enabled)
+   * Interrupts disabled by default.
+   */	
+  async command void setModeUART();
+
+  /**
+   * Returns TRUE if the module is set to I2C mode for MSP430 parts
+   * that support hardware I2C.
+   */
+  async command bool isI2C();
+
+  /**
+   * Switches USART to I2C mode for MSP430 parts that support hardware
+   * I2C. Interrupts disabled by default.
+   */
+  async command void setModeI2C();
+ 
+  async command void setClockSource(uint8_t source);
+
+  async command void setClockRate(uint16_t baudrate, uint8_t mctl);
+
+  /* Dis/enabling of UTXIFG / URXIFG */
+  async command void disableRxIntr();
+  async command void disableTxIntr();
+  async command void enableRxIntr();
+  async command void enableTxIntr();
+ 
+  /**
+   * TRUE if TX interrupt pending, flag must be cleared explicitly
+   */
+  async command bool isTxIntrPending();
+
+  /**
+   * TRUE if RX interrupt pending, flag must be cleared explicitly
+   */
+  async command bool isRxIntrPending();
+
+  /**
+   * Clears RX interrupt pending flag
+  */
+  async command error_t clrRxIntr();
+
+  /**
+   * Clears TX interrupt pending flag
+   */
+  async command error_t clrTxIntr();
+
+
+  /** 
+   * SUCCESS if the TX buffer is empty and all of the bits have been
+   * shifted out
+   */
+  async command bool isTxEmpty();
+
+ /**
+   * Transmit a byte of data. When the transmission is completed,
+   * txDone is generated. Only then a new byte may be
+   * transmitted, otherwise the previous byte will be overwritten.
+   * The mode of transmission (UART or SPI) depends on the current
+   * state of the USART, which must be managed by a higher layer.
+   *
+   * @return SUCCESS always.
+   */
+  async command void tx(uint8_t data);
+
+  /**
+   * Get current value from RX-buffer.
+   *
+   * @return SUCCESS always.
+   */
+  async command uint8_t rx();
+
+}
+
diff --git a/tos/chips/msp430/usart/HplMsp430Usart0C.nc b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
new file mode 100644
index 00000000..8fa43237
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT,
+ * UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * An HPL abstraction of USART0 on the MSP430.
+ *
+ * @author Jonathan Hui 
+ * @author Joe Polastre
+ * @version $Revision$ $Date$
+ */
+
+#include "msp430UsartResource.h"
+
+configuration HplMsp430Usart0C {
+
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+
+}
+
+implementation {
+  
+  components HplMsp430Usart0P as HplUsartP;
+  components HplMsp430GeneralIOC as GIO;
+  
+  AsyncStdControl = HplUsartP;
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+  
+  HplUsartP.SIMO -> GIO.SIMO0;
+  HplUsartP.SOMI -> GIO.SOMI0;
+  HplUsartP.UCLK -> GIO.UCLK0;
+  HplUsartP.URXD -> GIO.URXD0;
+  HplUsartP.UTXD -> GIO.UTXD0;
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart0P.nc b/tos/chips/msp430/usart/HplMsp430Usart0P.nc
new file mode 100644
index 00000000..46a72e2a
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart0P.nc
@@ -0,0 +1,507 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2004-2005, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of USART0 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer 
+ * @author: Jonathan Hui 
+ * @author: Joe Polastre
+ * @version $Revision$ $Date$
+ */
+
+module HplMsp430Usart0P {
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+}
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(ME1);
+  MSP430REG_NORACE(IFG1);
+  MSP430REG_NORACE(U0TCTL);
+  MSP430REG_NORACE(U0TXBUF);
+
+  uint16_t l_br;
+  uint8_t l_mctl;
+  uint8_t l_ssel;
+  
+  TOSH_SIGNAL(UART0RX_VECTOR) {
+    uint8_t temp = U0RXBUF;
+    signal Interrupts.rxDone(temp);
+  }
+  
+  TOSH_SIGNAL(UART0TX_VECTOR) {
+    signal Interrupts.txDone();
+  }
+  
+  async command error_t AsyncStdControl.start() {
+    return SUCCESS;
+  }
+  
+  async command error_t AsyncStdControl.stop() {
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+    return SUCCESS;
+  }
+
+  async command bool Usart.isSPI() {
+    atomic {
+      return (U0CTL & SYNC) && (ME1 & USPIE0);
+    }
+  }
+
+  async command bool Usart.isUART() {
+    atomic {
+      return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0));
+    }
+  }
+
+  async command bool Usart.isUARTtx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & UTXE0);
+    }
+  }
+
+  async command bool Usart.isUARTrx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & URXE0);
+    }
+  }
+
+  async command bool Usart.isI2C() {
+    atomic {
+      return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUART())
+      return USART_UART;
+    else if (call Usart.isUARTrx())
+      return USART_UART_RX;
+    else if (call Usart.isUARTtx())
+      return USART_UART_TX;
+    else if (call Usart.isSPI())
+      return USART_SPI;
+    else if (call Usart.isI2C())
+      return USART_I2C;
+    else
+      return USART_NONE;
+  }
+
+  /**
+   * Sets the USART mode to one of the options from msp430_usartmode_t
+   * defined in MSP430Usart.h
+   */
+  async command void Usart.setMode(msp430_usartmode_t _mode) {
+    switch (_mode) {
+    case USART_UART:
+      call Usart.setModeUART();
+      break;
+    case USART_UART_RX:
+      call Usart.setModeUART_RX();
+      break;
+    case USART_UART_TX:
+      call Usart.setModeUART_TX();
+      break;
+    case USART_SPI:
+      call Usart.setModeSPI();
+      break;
+    case USART_I2C:
+      call Usart.setModeI2C();
+      break;
+    default:
+      break;
+    }
+  }
+
+  async command void Usart.enableUART() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME1 |= (UTXE0 | URXE0);   // USART0 UART module enable
+  }
+
+  async command void Usart.disableUART() {
+    ME1 &= ~(UTXE0 | URXE0);   // USART0 UART module enable
+    atomic {
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUARTTx() {
+    call UTXD.selectModuleFunc();
+    ME1 |= UTXE0;   // USART0 UART Tx module enable
+  }
+
+  async command void Usart.disableUARTTx() {
+    ME1 &= ~UTXE0;   // USART0 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUARTRx() {
+    call URXD.selectModuleFunc();
+    ME1 |= URXE0;   // USART0 UART Rx module enable
+  }
+
+  async command void Usart.disableUARTRx() {
+    ME1 &= ~URXE0;  // USART0 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSPI() {
+    ME1 |= USPIE0;   // USART0 SPI module enable
+    //FIXME: Set pins in ModuleFunction?
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+  }
+
+  async command void Usart.disableSPI() {
+    ME1 &= ~USPIE0;   // USART0 SPI module disable
+    atomic {
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+
+  async command void Usart.enableI2C() {
+    atomic U0CTL |= I2C | I2CEN | SYNC;
+  }
+
+  async command void Usart.disableI2C() {
+    atomic U0CTL &= ~(I2C | I2CEN | SYNC);
+  }
+
+  async command void Usart.setModeSPI() {
+    // check if we are already in SPI mode
+    if (call Usart.isSPI())
+      return;
+
+    call Usart.disableUART();
+    call Usart.disableI2C();
+
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+
+      U0CTL = SWRST;
+      U0CTL |= CHAR | SYNC | MM;  // 8-bit char, SPI-mode, USART as master
+      U0CTL &= ~(0x20);
+
+      U0TCTL = STC ;     // 3-pin
+      U0TCTL |= CKPH;    // half-cycle delayed UCLK
+
+      U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+      if (l_ssel & 0x80)
+        U0TCTL |= (l_ssel & 0x7F);
+      else
+        U0TCTL |= SSEL_SMCLK; // use SMCLK, assuming 1MHz
+
+      if (l_br != 0) {
+        U0BR0 = l_br & 0x0FF;
+        U0BR1 = (l_br >> 8) & 0x0FF;
+      }
+      else {
+        U0BR0 = 0x02;   // as fast as possible
+        U0BR1 = 0x00;
+      }
+      U0MCTL = 0;
+
+      ME1 |= USPIE0;   // USART SPI module enable
+      U0CTL &= ~SWRST;
+
+      IFG1 &= ~(UTXIFG0 | URXIFG0);
+      IE1 &= ~(UTXIE0 | URXIE0);  // interrupt disabled
+    }
+    return;
+  }
+
+  void setUARTModeCommon() {
+    atomic {
+      U0CTL = SWRST;
+      U0CTL |= CHAR;  // 8-bit char, UART-mode
+
+      U0RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts
+
+
+      U0CTL = SWRST;
+      U0CTL |= CHAR;  // 8-bit char, UART-mode
+
+      if (l_ssel & 0x80) {
+        U0TCTL &= ~SSEL_3;
+        U0TCTL |= (l_ssel & 0x7F);
+      }
+      else {
+        U0TCTL &= ~SSEL_3;
+        U0TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
+      }
+
+      if ((l_mctl != 0) || (l_br != 0)) {
+        U0BR0 = l_br & 0x0FF;
+        U0BR1 = (l_br >> 8) & 0x0FF;
+        U0MCTL = l_mctl;
+      }
+      else {
+        U0BR0 = 0x03;   // 9600 baud
+        U0BR1 = 0x00;
+        U0MCTL = 0x4A;
+      }
+
+      ME1 &= ~USPIE0;   // USART0 SPI module disable
+      ME1 |= (UTXE0 | URXE0); //USART0 UART module enable;
+
+      U0CTL &= ~SWRST;
+
+      IFG1 &= ~(UTXIFG0 | URXIFG0);
+      IE1 &= ~(UTXIE0 | URXIE0);  // interrupt disabled
+    }
+    return;
+  }
+
+  async command void Usart.setModeUART_TX() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART_TX)
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {
+      call UTXD.selectModuleFunc();
+      call URXD.selectIOFunc();
+    }
+    setUARTModeCommon();
+    return;
+  }
+
+  async command void Usart.setModeUART_RX() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART_RX)
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {
+      call UTXD.selectIOFunc();
+      call URXD.selectModuleFunc();
+    }
+    setUARTModeCommon();
+    return;
+  }
+
+  async command void Usart.setModeUART() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART)
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    setUARTModeCommon();
+    return;
+  }
+
+  // i2c enable bit is not set by default
+  async command void Usart.setModeI2C() {
+    // check if we are already in I2C mode
+    if (call Usart.getMode() == USART_I2C)
+      return;
+
+    call Usart.disableUART();
+    call Usart.disableSPI();
+
+    atomic {
+      call SIMO.makeInput();
+      call UCLK.makeInput();
+      call SIMO.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+
+      IE1 &= ~(UTXIE0 | URXIE0);  // interrupt disable
+
+      U0CTL = SWRST;
+      U0CTL |= SYNC | I2C;  // 7-bit addr, I2C-mode, USART as master
+      U0CTL &= ~I2CEN;
+
+      U0CTL |= MST;
+
+      I2CTCTL = I2CSSEL_2;        // use 1MHz SMCLK as the I2C reference
+
+      I2CPSC = 0x00;              // I2C CLK runs at 1MHz/10 = 100kHz
+      I2CSCLH = 0x03;
+      I2CSCLL = 0x03;
+
+      I2CIE = 0;                 // clear all I2C interrupt enables
+      I2CIFG = 0;                // clear all I2C interrupt flags
+    }
+    return;
+  }
+
+  async command void Usart.setClockSource(uint8_t source) {
+    atomic {
+      l_ssel = source | 0x80;
+      U0TCTL &= ~SSEL_3;
+      U0TCTL |= (l_ssel & 0x7F);
+    }
+  }
+
+  async command void Usart.setClockRate(uint16_t baudrate, uint8_t mctl) {
+    atomic {
+      l_br = baudrate;
+      l_mctl = mctl;
+      U0BR0 = baudrate & 0x0FF;
+      U0BR1 = (baudrate >> 8) & 0x0FF;
+      U0MCTL = mctl;
+    }
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG1 & UTXIFG0){
+      IFG1 &= ~UTXIFG0;
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U0TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG1 & URXIFG0){
+//      IFG1 &= ~URXIFG0;
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command error_t Usart.clrTxIntr(){
+    IFG1 &= ~UTXIFG0;
+    return SUCCESS;
+  }
+
+  async command error_t Usart.clrRxIntr() {
+    IFG1 &= ~URXIFG0;
+    return SUCCESS;
+  }
+
+  async command void Usart.disableRxIntr(){
+    IE1 &= ~URXIE0;
+  }
+
+  async command void Usart.disableTxIntr(){
+    IE1 &= ~UTXIE0;
+  }
+
+  async command void Usart.enableRxIntr(){
+    atomic {
+      IFG1 &= ~URXIFG0;
+      IE1 |= URXIE0;
+    }
+  }
+
+  async command void Usart.enableTxIntr(){
+    atomic {
+      IFG1 &= ~UTXIFG0;
+      IE1 |= UTXIE0;
+    }
+  }
+
+  async command void Usart.tx(uint8_t data){
+    atomic U0TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx(){
+    uint8_t value;
+    atomic value = U0RXBUF;
+    return value;
+  }
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart1C.nc b/tos/chips/msp430/usart/HplMsp430Usart1C.nc
new file mode 100644
index 00000000..cf31c950
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart1C.nc
@@ -0,0 +1,61 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT,
+ * UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "msp430UsartResource.h"
+
+configuration HplMsp430Usart1C {
+  provides interface Init;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceController;
+  provides interface ArbiterInfo;
+}
+
+implementation {
+
+  components HplMsp430Usart1P as HplUsartP;
+  components HplMsp430GeneralIOC as GIO;
+  components new FcfsArbiterC(MSP430_HPLUSART1_RESOURCE) as Arbiter;
+
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+
+  Init = Arbiter;
+  Resource = Arbiter;
+  ResourceController = Arbiter;
+  ArbiterInfo = Arbiter;
+
+  HplUsartP.SIMO -> GIO.SIMO1;
+  HplUsartP.SOMI -> GIO.SOMI1;
+  HplUsartP.UCLK -> GIO.UCLK1;
+  HplUsartP.URXD -> GIO.URXD1;
+  HplUsartP.UTXD -> GIO.UTXD1;
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart1P.nc b/tos/chips/msp430/usart/HplMsp430Usart1P.nc
new file mode 100644
index 00000000..a2241b7d
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart1P.nc
@@ -0,0 +1,459 @@
+/*
+ * Copyright (c) 2004-2005, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * Implementation of USART0 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author Jan Hauer (hauer@tkn.tu-berlin.de)
+ * @author Joe Polastre
+ */
+
+module HplMsp430Usart1P {
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+}
+implementation
+{
+  MSP430REG_NORACE(IE2);
+  MSP430REG_NORACE(ME2);
+  MSP430REG_NORACE(IFG2);
+  MSP430REG_NORACE(U1TCTL);
+  MSP430REG_NORACE(U1TXBUF);
+  
+  uint16_t l_br;
+  uint8_t l_mctl;
+  uint8_t l_ssel;
+  
+  TOSH_SIGNAL(UART1RX_VECTOR) {
+    uint8_t temp = U1RXBUF;
+    signal UsartInterrupts.rxDone(temp);
+  }
+
+  TOSH_SIGNAL(UART1TX_VECTOR) {
+    signal UsartInterrupts.txDone();
+  }
+
+  async command bool Usart.isSPI() {
+    bool _ret = FALSE;
+    atomic{
+      if (ME2 & USPIE1)
+	_ret = TRUE;
+    }
+    return _ret;
+  }
+  
+  async command bool Usart.isUART() {
+    bool _ret = FALSE;
+    atomic {
+      if ((ME2 & UTXE1) && (ME2 & URXE1))
+	_ret = TRUE;
+    }
+    return _ret;
+  }
+  
+  async command bool Usart.isUARTtx() {
+    bool _ret = FALSE;
+    atomic {
+      if (ME2 & UTXE1)
+	_ret = TRUE;
+    }
+    return _ret;
+  }
+  
+  async command bool Usart.isUARTrx() {
+    bool _ret = FALSE;
+    atomic {
+      if (ME2 & URXE1)
+	_ret = TRUE;
+    }
+    return _ret;
+  }
+  
+  async command bool Usart.isI2C() {
+    return FALSE;
+  }
+  
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUART())
+      return USART_UART;
+    else if (call Usart.isUARTrx())
+      return USART_UART_RX;
+    else if (call Usart.isUARTtx())
+      return USART_UART_TX;
+    else if (call Usart.isSPI())
+      return USART_SPI;
+    else if (call Usart.isI2C())
+      return USART_I2C;
+    else
+      return USART_NONE;
+  }
+  
+  /**
+   * Sets the USART mode to one of the options from msp430_usartmode_t
+   * defined in MSP430Usart.h
+   */
+  async command void Usart.setMode(msp430_usartmode_t _mode) {
+    switch (_mode) {
+    case USART_UART:
+      call Usart.setModeUART();
+      break;
+    case USART_UART_RX:
+      call Usart.setModeUART_RX();
+      break;
+    case USART_UART_TX:
+      call Usart.setModeUART_TX();
+      break;
+    case USART_SPI:
+      call Usart.setModeSPI();
+      break;
+    default:
+      break;
+    }
+  }
+  
+  async command void Usart.enableUART() {
+//    TOSH_SEL_UTXD1_MODFUNC();
+//    TOSH_SEL_URXD1_MODFUNC();
+    ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+  }
+  
+  async command void Usart.disableUART() {
+    ME2 &= ~(UTXE1 | URXE1);   // USART0 UART module enable
+    call UTXD.selectIOFunc();
+    call URXD.selectIOFunc();
+  }
+  
+  async command void Usart.enableUARTTx() {
+    ME2 |= UTXE1;   // USART0 UART Tx module enable
+  }
+  
+  async command void Usart.disableUARTTx() {
+    ME2 &= ~UTXE1;   // USART0 UART Tx module enable
+    call UTXD.selectIOFunc();
+  }
+  
+  async command void Usart.enableUARTRx() {
+    ME2 |= URXE1;   // USART0 UART Rx module enable
+  }
+  
+  async command void Usart.disableUARTRx() {
+    ME2 &= ~URXE1;  // USART0 UART Rx module disable
+    call URXD.selectIOFunc();
+  }
+
+  async command void Usart.enableSPI() {
+    ME2 |= USPIE1;   // USART0 SPI module enable
+  }
+  
+  async command void Usart.disableSPI() {
+    ME2 &= ~USPIE1;   // USART0 SPI module disable
+    call SIMO.selectIOFunc();
+    call SOMI.selectIOFunc();
+    call UCLK.selectIOFunc();
+  }
+  
+  async command void Usart.enableI2C() { }
+  
+  async command void Usart.disableI2C() { }
+
+  async command void Usart.setModeSPI() {
+    // check if we are already in SPI mode
+    if (call Usart.getMode() == USART_SPI) 
+      return;
+    
+    call Usart.disableUART();
+    call Usart.disableI2C();
+    
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+
+      IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disable    
+
+      U1CTL = SWRST;
+      U1CTL |= CHAR | SYNC | MM;  // 8-bit char, SPI-mode, USART as master
+      U1CTL &= ~(0x20); 
+
+      U1TCTL = STC ;     // 3-pin
+      U1TCTL |= CKPH;    // half-cycle delayed UCLK
+
+      if (l_ssel & 0x80) {
+        U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+        U1TCTL |= (l_ssel & 0x7F); 
+      }
+      else {
+        U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+        U1TCTL |= SSEL_SMCLK; // use SMCLK, assuming 1MHz
+      }
+
+      if (l_br != 0) {
+        U1BR0 = l_br & 0x0FF;
+        U1BR1 = (l_br >> 8) & 0x0FF;
+      }
+      else {
+        U1BR0 = 0x02;   // as fast as possible
+        U1BR1 = 0x00;
+      }
+      U1MCTL = 0;
+
+      ME2 &= ~(UTXE1 | URXE1); //USART UART module disable
+      ME2 |= USPIE1;   // USART SPI module enable
+      U1CTL &= ~SWRST;  
+
+      IFG2 &= ~(UTXIFG1 | URXIFG1);
+      IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled    
+    }
+    return;
+  }
+  
+  void setUARTModeCommon() {
+    atomic {
+      U1CTL = SWRST;  
+      U1CTL |= CHAR;  // 8-bit char, UART-mode
+
+      U1RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts
+
+      
+      U1CTL = SWRST;
+      U1CTL |= CHAR;  // 8-bit char, UART-mode
+
+      if (l_ssel & 0x80) {
+        U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+        U1TCTL |= (l_ssel & 0x7F); 
+      }
+      else {
+        U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+        U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
+      }
+
+      if ((l_mctl != 0) || (l_br != 0)) {
+        U1BR0 = l_br & 0x0FF;
+        U1BR1 = (l_br >> 8) & 0x0FF;
+        U1MCTL = l_mctl;
+      }
+      else {
+        U1BR0 = 0x03;   // 9600 baud
+        U1BR1 = 0x00;
+        U1MCTL = 0x4A;
+      }
+
+      ME2 &= ~USPIE1;   // USART0 SPI module disable
+      ME2 |= (UTXE1 | URXE1); //USART0 UART module enable;
+      
+      U1CTL &= ~SWRST;
+
+      IFG2 &= ~(UTXIFG1 | URXIFG1);
+      IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled
+    }
+    return;
+  }
+  
+  async command void Usart.setModeUART_TX() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART_TX) 
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {   
+      call UTXD.selectModuleFunc();
+      call URXD.selectIOFunc();
+    }
+    setUARTModeCommon();  
+    return;
+  }
+  
+  async command void Usart.setModeUART_RX() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART_RX) 
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {
+      call UTXD.selectIOFunc();
+      call URXD.selectModuleFunc();
+    }
+    setUARTModeCommon(); 
+    return;
+  }
+
+  async command void Usart.setModeUART() {
+    // check if we are already in UART mode
+    if (call Usart.getMode() == USART_UART) 
+      return;
+
+    call Usart.disableSPI();
+    call Usart.disableI2C();
+    call Usart.disableUART();
+
+    atomic {
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    setUARTModeCommon();
+    return;
+  }
+
+  // i2c enable bit is not set by default
+  async command void Usart.setModeI2C() {
+    // check if we are already in I2C mode
+    if (call Usart.getMode() == USART_I2C) 
+      return;
+
+    call Usart.disableUART();
+    call Usart.disableSPI();
+
+    atomic {
+      call SIMO.makeInput();
+      call UCLK.makeInput();
+      call SIMO.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+
+      IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disable    
+
+      U1CTL = SWRST;
+      U1CTL |= SYNC | I2C;  // 7-bit addr, I2C-mode, USART as master
+      U1CTL &= ~I2CEN;
+
+      U1CTL |= MST;
+
+      I2CTCTL = I2CSSEL_2;        // use 1MHz SMCLK as the I2C reference
+
+      I2CPSC = 0x00;              // I2C CLK runs at 1MHz/10 = 100kHz
+      I2CSCLH = 0x03;
+      I2CSCLL = 0x03;
+      
+      I2CIE = 0;                 // clear all I2C interrupt enables
+      I2CIFG = 0;                // clear all I2C interrupt flags
+    }
+    return;
+  }
+ 
+  async command void Usart.setClockSource(uint8_t source) {
+    atomic {
+      l_ssel = source | 0x80;
+      U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+      U1TCTL |= (l_ssel & 0x7F); 
+    }
+  }
+  
+  async command void Usart.setClockRate(uint16_t baudrate, uint8_t mctl) {
+    atomic {
+      l_br = baudrate;
+      l_mctl = mctl;
+      U1BR0 = baudrate & 0x0FF;
+      U1BR1 = (baudrate >> 8) & 0x0FF;
+      U1MCTL = mctl;
+    }
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG2 & UTXIFG1){
+      IFG2 &= ~UTXIFG1;
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U1TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+  
+  async command bool Usart.isRxIntrPending(){
+    if (IFG2 & URXIFG1){
+      IFG2 &= ~URXIFG1;
+      return TRUE;
+    }
+    return FALSE;
+  }
+  
+  async command error_t Usart.clrTxIntr(){
+    IFG1 &= ~UTXIFG0;
+    return SUCCESS;
+  }
+
+  async command error_t Usart.clrRxIntr() {
+    IFG1 &= ~URXIFG0;
+    return SUCCESS;
+  }
+  
+  async command void Usart.disableRxIntr(){
+    IE2 &= ~URXIE1;    
+  }
+  
+  async command void Usart.disableTxIntr(){
+    IE2 &= ~UTXIE1;  
+  }
+  
+  async command void Usart.enableRxIntr(){
+    atomic {
+      IFG2 &= ~URXIFG1;
+      IE2 |= URXIE1;  
+    }
+  }
+
+  async command void Usart.enableTxIntr(){
+    atomic {
+      IFG2 &= ~UTXIFG1;
+      IE2 |= UTXIE1;
+    }
+  }
+  
+  async command void Usart.tx(uint8_t data){
+    atomic U1TXBUF = data;
+  }
+  
+  async command uint8_t Usart.rx(){
+    uint8_t value;
+    atomic value = U1RXBUF;
+    return value;
+  }
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc b/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc
new file mode 100644
index 00000000..9e89fe6d
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2004-2005, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Byte-level interface to control a USART. 
+ * 
    The USART can be switched to SPI- or UART-mode. The interface follows
+ * the convention of being stateless, thus a higher layer has to maintain
+ * state information.
+ *
+ * @author Jan Hauer (hauer@tkn.tu-berlin.de)
+ * @author Joe Polastre
+ * @version $Revision$ $Date$
+ */
+ 
+#include "msp430usart.h"
+
+interface HplMsp430UsartInterrupts {
+
+  /**
+   * A byte of data is about to be transmitted, ie. the TXBuffer is
+   * empty and ready to accept next byte.
+   */
+  async event void txDone();
+
+  /**
+   * A byte of data has been received.
+   */
+  async event void rxDone(uint8_t data);
+
+}
+
diff --git a/tos/chips/msp430/usart/Msp430Spi0C.nc b/tos/chips/msp430/usart/Msp430Spi0C.nc
new file mode 100644
index 00000000..882b6110
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Spi0C.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An implementation of the SPI on USART0 for the MSP430. The current
+ * implementation defaults not using the DMA and performing the SPI
+ * transfers in software. To utilize the DMA, use Msp430SpiDma0P in
+ * place of Msp430SpiNoDma0P.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "msp430UsartResource.h"
+
+generic configuration Msp430Spi0C() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+  
+  enum {
+    CLIENT_ID = unique( MSP430_SPIO_BUS ),
+  };
+  
+  components Msp430SpiNoDma0P as SpiP;
+  Resource = SpiP.Resource[ CLIENT_ID ];
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+
+  components new Msp430Usart0C() as UsartC;
+  SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiDma0P.nc b/tos/chips/msp430/usart/Msp430SpiDma0P.nc
new file mode 100644
index 00000000..5de8d386
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiDma0P.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration Msp430SpiDma0P {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  
+}
+
+implementation {
+  
+  components new Msp430SpiDmaP() as SpiP;
+  Resource = SpiP.Resource;
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+  
+  components HplMsp430Usart0C as UsartC;
+  SpiP.Usart -> UsartC;
+  
+  components Msp430DmaC as DmaC;
+  SpiP.DmaChannel1 -> DmaC.Channel1;
+  SpiP.DmaChannel2 -> DmaC.Channel2;
+  
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc
new file mode 100644
index 00000000..863f5a99
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+
+generic module Msp430SpiDmaP() {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+  
+  uses interface Msp430DmaChannel as DmaChannel1;
+  uses interface Msp430DmaChannel as DmaChannel2;
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  MSP430REG_NORACE( IFG1 );
+
+  uint8_t* m_tx_buf;
+  uint8_t* m_rx_buf;
+  uint16_t m_len;
+  uint8_t m_client;
+  uint8_t m_dump;
+
+  void signalDone( error_t error );
+  task void signalDone_task();
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t error = call UsartResource.immediateRequest[ id ]();
+    if ( error == SUCCESS )
+      call Usart.setModeSPI();
+    return error;
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+
+  async command void Resource.release[ uint8_t id ]() {
+    call UsartResource.release[ id ]();
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    call Usart.setModeSPI();
+    signal Resource.granted[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command void UsartResource.release[ uint8_t id ]() {}
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  async command void SpiByte.write( uint8_t tx, uint8_t* rx ) {
+    
+    call Usart.tx( tx );
+    while( !call Usart.isRxIntrPending() );
+    *rx = call Usart.rx();
+
+  }
+  
+  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf, 
+						      uint8_t* rx_buf, 
+						      uint16_t len ) {
+
+    uint16_t ctrl;
+
+    atomic {
+      m_client = id;
+      m_tx_buf = tx_buf;
+      m_rx_buf = rx_buf;
+      m_len = len;
+    }
+
+    if ( rx_buf ) {
+      ctrl = 0xcd4;
+    }
+    else {
+      ctrl = 0x0d4;
+      rx_buf = &m_dump;
+    }
+
+    if ( len ) {
+      IFG1 &= ~( UTXIFG0 | URXIFG0 );
+      call DmaChannel1.setupTransferRaw( ctrl, DMA_TRIGGER_USARTRX,
+					 (uint16_t*)U0RXBUF_, rx_buf, len );
+      call DmaChannel2.setupTransferRaw( 0x3d4, DMA_TRIGGER_USARTTX,
+					 tx_buf, (uint16_t*)U0TXBUF_, len );
+      IFG1 |= UTXIFG0;
+    }
+    else {
+      post signalDone_task();
+    }
+
+    return SUCCESS;
+
+  }
+
+  task void signalDone_task() {
+    atomic signalDone( SUCCESS );
+  }
+
+  async event void DmaChannel1.transferDone( error_t error ) {
+    signalDone( error );
+  }
+
+  async event void DmaChannel2.transferDone( error_t error ) {}
+ 
+  void signalDone( error_t error ) {
+    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error );
+  }
+  
+  async event void UsartInterrupts.txDone() {}
+  async event void UsartInterrupts.rxDone( uint8_t data ) {}
+
+  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc b/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc
new file mode 100644
index 00000000..495b61d8
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration Msp430SpiNoDma0P {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  
+}
+
+implementation {
+  
+  components new Msp430SpiNoDmaP() as SpiP;
+  Resource = SpiP.Resource;
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart0C as UsartC;
+  SpiP.Usart -> UsartC;
+  
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc
new file mode 100644
index 00000000..e3588010
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+
+generic module Msp430SpiNoDmaP() {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  uses interface Leds;
+
+}
+
+implementation {
+  
+  enum {
+    SPI_ATOMIC_SIZE = 2,
+  };
+  
+  norace uint8_t* m_tx_buf;
+  norace uint8_t* m_rx_buf;
+  norace uint16_t m_len;
+  norace uint16_t m_pos;
+  norace uint8_t m_client;
+  
+  void signalDone();
+  task void signalDone_task();
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t result = call UsartResource.immediateRequest[ id ]();
+    if ( result == SUCCESS )
+      call Usart.setModeSPI();
+    return result;
+  }
+  
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+  
+  async command void Resource.release[ uint8_t id ]() {
+    call UsartResource.release[ id ]();
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    call Usart.setModeSPI();
+    signal Resource.granted[ id ]();
+  }
+
+  async command void SpiByte.write( uint8_t tx, uint8_t* rx ) {
+    call Usart.disableRxIntr();
+    call Usart.tx( tx );
+    while( !call Usart.isRxIntrPending() );
+    *rx = call Usart.rx();
+    call Usart.enableRxIntr();
+  }
+
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }  
+  default async command void UsartResource.release[ uint8_t id ]() {}  
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  void continueOp() {
+
+    uint8_t end;
+    uint8_t tmp;
+
+    atomic {
+      call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 );
+
+      end = m_pos + SPI_ATOMIC_SIZE;
+      if ( end > m_len )
+        end = m_len;
+
+      while ( ++m_pos < end ) {
+        while( !call Usart.isTxIntrPending() );
+        call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 );
+        while( !call Usart.isRxIntrPending() );
+        tmp = call Usart.rx();
+        if ( m_rx_buf )
+          m_rx_buf[ m_pos - 1 ] = tmp;
+      }
+    }
+
+  }
+
+  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf,
+                                                      uint8_t* rx_buf,
+                                                      uint16_t len ) {
+    
+    m_client = id;
+    m_tx_buf = tx_buf;
+    m_rx_buf = rx_buf;
+    m_len = len;
+    m_pos = 0;
+
+    if ( len ) {
+      call Usart.enableRxIntr();
+      continueOp();
+    }
+    else {
+      post signalDone_task();
+    }
+
+    return SUCCESS;
+
+  }
+
+  task void signalDone_task() {
+    atomic signalDone();
+  }
+
+  async event void UsartInterrupts.rxDone( uint8_t data ) {
+    
+    if ( m_rx_buf )
+      m_rx_buf[ m_pos-1 ] = data;
+
+    if ( m_pos < m_len )
+      continueOp();
+    else {
+      call Usart.disableRxIntr();
+      signalDone();
+    }
+  }
+
+  void signalDone() {
+    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, 
+					   SUCCESS );
+  }
+
+  async event void UsartInterrupts.txDone() {}
+
+  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/usart/Msp430Uart1C.nc b/tos/chips/msp430/usart/Msp430Uart1C.nc
new file mode 100644
index 00000000..ec5d6e6d
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Uart1C.nc
@@ -0,0 +1,52 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT,
+ * UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+configuration Msp430Uart1C {
+  provides interface Init;
+  provides interface Resource[ uint8_t id ];
+  provides interface ArbiterInfo;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+#ifndef DEFAULT_BAUDRATE
+#define DEFAULT_BAUDRATE (115200ul)
+#endif
+  components new Msp430UartP(DEFAULT_BAUDRATE) as UartP;
+  Init = UartP;
+  StdControl = UartP;
+  SerialByteComm = UartP;
+
+  components HplMsp430Usart1C as HplUsartC;
+  Init = HplUsartC;
+  Resource = HplUsartC;
+  ArbiterInfo = HplUsartC;
+  UartP.HplUsart -> HplUsartC;
+  UartP.HplUsartInterrupts -> HplUsartC;
+}
+
diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc
new file mode 100644
index 00000000..d7df56d5
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UartP.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ----------------------------------------------------------
+ * Implementation of UART0 lowlevel functionality - stateless.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author Jan Hauer 
+ * @author Vlado Handziski
+ * @author Joe Polastre
+ * ========================================================================
+ */
+
+#include "msp430baudrates.h"
+
+generic module Msp430UartP(uint32_t default_baudrate) {
+
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+  
+  uses interface HplMsp430Usart as HplUsart;
+  uses interface HplMsp430UsartInterrupts as HplUsartInterrupts;
+}
+
+implementation {
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    call HplUsart.setModeUART();
+    call HplUsart.setClockSource(SSEL_SMCLK);
+    if (default_baudrate == 57600UL){
+      call HplUsart.setClockRate(UBR_SMCLK_57600, UMCTL_SMCLK_57600);
+    } else if (default_baudrate == 115200UL){
+      call HplUsart.setClockRate(UBR_SMCLK_115200, UMCTL_SMCLK_115200);
+    } else if (default_baudrate == 230400UL){
+      call HplUsart.setClockRate(UBR_SMCLK_230400, UMCTL_SMCLK_230400);
+    }
+    call HplUsart.enableRxIntr();
+    call HplUsart.enableTxIntr();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    call HplUsart.disableRxIntr();
+    call HplUsart.disableTxIntr();
+
+    call HplUsart.disableUART();
+    return SUCCESS;
+  }
+
+  async command error_t SerialByteComm.put( uint8_t data ) {
+    call HplUsart.tx( data );
+    return SUCCESS;
+  }
+
+  async event void HplUsartInterrupts.txDone() {
+    signal SerialByteComm.putDone();
+  }
+
+  async event void HplUsartInterrupts.rxDone( uint8_t data ) {
+    signal SerialByteComm.get( data );
+  }
+}
diff --git a/tos/chips/msp430/usart/Msp430Usart0C.nc b/tos/chips/msp430/usart/Msp430Usart0C.nc
new file mode 100644
index 00000000..88c633d3
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Usart0C.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Provides an interface for USART0 on the MSP430.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration Msp430Usart0C() {
+  
+  provides interface Resource;
+  provides interface ArbiterInfo;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+  
+}
+
+implementation {
+  
+  enum {
+    CLIENT_ID = unique( MSP430_HPLUSART0_RESOURCE ),
+  };
+  
+  components Msp430UsartShare0P as UsartShareP;
+  
+  Resource = UsartShareP.Resource[ CLIENT_ID ];
+  ArbiterInfo = UsartShareP.ArbiterInfo;
+  HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ];
+
+  components HplMsp430Usart0C as UsartC;
+  HplMsp430Usart = UsartC;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430UsartShare0P.nc b/tos/chips/msp430/usart/Msp430UsartShare0P.nc
new file mode 100644
index 00000000..c2f931e9
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UsartShare0P.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration Msp430UsartShare0P {
+  
+  provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
+  provides interface Resource[ uint8_t id ];
+  provides interface ArbiterInfo;
+  
+}
+
+implementation {
+  
+  components new Msp430UsartShareP() as UsartShareP;
+  Interrupts = UsartShareP;
+  UsartShareP.RawInterrupts -> UsartC;
+  
+  components new FcfsArbiterC( MSP430_HPLUSART0_RESOURCE ) as ArbiterC;
+  Resource = ArbiterC;
+  ArbiterInfo = ArbiterC;
+  UsartShareP.ArbiterInfo -> ArbiterC;
+  
+  components new AsyncStdControlPowerManagerC() as PowerManagerC;
+  PowerManagerC.ArbiterInit -> ArbiterC;
+  PowerManagerC.ResourceController -> ArbiterC;
+  
+  components HplMsp430Usart0C as UsartC;
+  PowerManagerC.AsyncStdControl -> UsartC;
+  
+  components MainC;
+  MainC.SoftwareInit -> ArbiterC;
+  MainC.SoftwareInit -> PowerManagerC;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430UsartShareP.nc b/tos/chips/msp430/usart/Msp430UsartShareP.nc
new file mode 100644
index 00000000..c1084d64
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UsartShareP.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic module Msp430UsartShareP() {
+  
+  provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as RawInterrupts;
+  uses interface ArbiterInfo;
+  
+}
+
+implementation {
+  
+  async event void RawInterrupts.txDone() {
+    if ( call ArbiterInfo.inUse() )
+      signal Interrupts.txDone[ call ArbiterInfo.userId() ]();
+  }
+  
+  async event void RawInterrupts.rxDone( uint8_t data ) {
+    if ( call ArbiterInfo.inUse() )
+      signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data );
+  }
+
+  default async event void Interrupts.txDone[ uint8_t id ]() {}
+  default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {}
+  
+}
diff --git a/tos/chips/msp430/usart/Uart1C.nc b/tos/chips/msp430/usart/Uart1C.nc
new file mode 100644
index 00000000..8b5acf51
--- /dev/null
+++ b/tos/chips/msp430/usart/Uart1C.nc
@@ -0,0 +1,51 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT,
+ * UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "msp430UsartResource.h"
+
+generic configuration Uart1C() {
+  provides interface Init;
+  provides interface Resource;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique(MSP430_UART1_BUS),
+  };
+
+  components Msp430Uart1C as UartC;
+
+  Init = UartC;
+  Resource = UartC.Resource[ CLIENT_ID ];
+  StdControl = UartC;
+  SerialByteComm = UartC.SerialByteComm;
+}
diff --git a/tos/chips/msp430/usart/msp430UsartResource.h b/tos/chips/msp430/usart/msp430UsartResource.h
new file mode 100644
index 00000000..da6af205
--- /dev/null
+++ b/tos/chips/msp430/usart/msp430UsartResource.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /*
+  * Header file for creating string constants for arbitration of
+  * USART0 and USART1 modules on the MSP430
+  *
+  * @author Kevin Klues 
+  */
+
+ #ifndef MSP430USARTRESOURCE_H
+ #define MSP430USARTRESOURCE_H
+
+ #define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource"
+ #define MSP430_SPIO_BUS "Msp430Spi0.Resource"
+ #define MSP430_UARTO_BUS MSP430_HPLUSART0_RESOURCE
+ #define MSP430_I2CO_BUS MSP430_HPLUSART0_RESOURCE
+
+ #define MSP430_HPLUSART1_RESOURCE "Msp430Usart1.Resource"
+ #define MSP430_SPI1_BUS MSP430_HPLUSART0_RESOURCE
+ #define MSP430_UART1_BUS MSP430_HPLUSART0_RESOURCE
+
+ #endif
diff --git a/tos/chips/msp430/usart/msp430baudrates.h b/tos/chips/msp430/usart/msp430baudrates.h
new file mode 100644
index 00000000..9a4264ae
--- /dev/null
+++ b/tos/chips/msp430/usart/msp430baudrates.h
@@ -0,0 +1,43 @@
+//$Id$
+//@author Vlado Handziski 
+
+#ifndef _H_msp430baudrates_h
+#define _H_msp430baudrates_h
+
+/**
+Parameters for HPLUSARTControl.setClockRate() that generate some standard baud rates.
+Usage is setClockRate(UBR_CLOCK_BAUDRATE, UMCTL_CLOCK_BAUDRATE), see HPLUARTM.nc for an example.
+
+The calculations were performed using the msp-uart.pl script:
+# msp-uart.pl -- calculates the uart registers for MSP430
+#
+# Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
+
+
+**/
+
+
+enum {
+//Using ACLK=32768Hz
+UBR_ACLK_1200=0x001B,    UMCTL_ACLK_1200=0x94,
+UBR_ACLK_1800=0x0012,    UMCTL_ACLK_1800=0x84,
+UBR_ACLK_2400=0x000D,    UMCTL_ACLK_2400=0x6D,
+UBR_ACLK_4800=0x0006,    UMCTL_ACLK_4800=0x77,
+UBR_ACLK_9600=0x0003,    UMCTL_ACLK_9600=0x29,
+
+//Using SMCLK=1048576Hz
+UBR_SMCLK_1200=0x0369,   UMCTL_SMCLK_1200=0x7B,
+UBR_SMCLK_1800=0x0246,   UMCTL_SMCLK_1800=0x55,
+UBR_SMCLK_2400=0x01B4,   UMCTL_SMCLK_2400=0xDF,
+UBR_SMCLK_4800=0x00DA,   UMCTL_SMCLK_4800=0xAA,
+UBR_SMCLK_9600=0x006D,   UMCTL_SMCLK_9600=0x44,
+UBR_SMCLK_19200=0x0036,  UMCTL_SMCLK_19200=0xB5,
+UBR_SMCLK_38400=0x001B,  UMCTL_SMCLK_38400=0x94,
+UBR_SMCLK_57600=0x0012,  UMCTL_SMCLK_57600=0x84,
+UBR_SMCLK_76800=0x000D,  UMCTL_SMCLK_76800=0x6D,
+UBR_SMCLK_115200=0x0009, UMCTL_SMCLK_115200=0x10,
+UBR_SMCLK_230400=0x0004, UMCTL_SMCLK_230400=0x55,
+};
+
+
+#endif//_H_msp430baudrates_h
diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h
new file mode 100644
index 00000000..01da0b29
--- /dev/null
+++ b/tos/chips/msp430/usart/msp430usart.h
@@ -0,0 +1,41 @@
+// $Id$
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ * Revision:  $Revision$
+ */
+
+#ifndef MSP430USART_H
+#define MSP430USART_H
+
+typedef enum
+{
+  USART_NONE = 0,
+  USART_UART = 1,
+  USART_UART_TX = 2,
+  USART_UART_RX = 3,
+  USART_SPI = 4,
+  USART_I2C = 5
+} msp430_usartmode_t;
+
+#endif
diff --git a/tos/chips/pxa27x/HplPXA27xInterrupt.nc b/tos/chips/pxa27x/HplPXA27xInterrupt.nc
new file mode 100644
index 00000000..576dbe48
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterrupt.nc
@@ -0,0 +1,76 @@
+// $Id$
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/**
+ * This interface supports the core peripheral interrupts of the PXA27X 
+ * processor.  
+ * It is usually parameterized based on the Peripheral ID (PPID) of the 
+ * interrupt signal.
+ * ARM interrupt levels (IRQ/FIQ) are established by wiring.
+ * Priorities are established by a static table (TOSH_IRP_TABLE)
+ *
+ * Components implementing this interface are expected to provide reentrant
+ * (i.e. atomic) semantics.
+ *
+ * @author: Philip Buonadonna
+ */
+
+interface HplPXA27xInterrupt
+{
+  /** 
+   * Allocates a given peripheral interrupt with the PXA27X interrupt manager.
+   * Specifically, it establishes the interrupt level (IRQ or FIQ) and the 
+   * priority. 
+   */
+  async command error_t allocate();
+
+  /**
+   * Enables a periperhal interrupt.
+   */
+  async command void enable();
+
+  /**
+   * Disables a peripheral interrupt.
+   */
+  async command void disable();
+
+  /**
+   * The peripheral interrupt event.
+   */
+  async event void fired();
+}
diff --git a/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc b/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc
new file mode 100644
index 00000000..b8bc855a
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc
@@ -0,0 +1,58 @@
+// $Id$
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface provides access to the ICCR functionality of
+ * the PXA27x interrupt controller.  
+ * 
+ * Refer to the PXA27x Developers Guide for more information.
+ *
+ * @author: Philip Buonadonna
+ */
+
+interface HplPXA27xInterruptCntl
+{
+   /**
+    * Sets the ICCR DIM bit of the PXA27x interrupt controller
+    * 
+    * @param flag TRUE to set the DIM bit, FALSE to clear
+    *
+    */
+   async command void setICCR_DIM(bool flag);
+
+   /**
+    * Gets the value of the ICCR DIM bit.
+    *  
+    * @return value TRUE if set, FALSE if clear.
+    */
+   async command bool getICCR_DIM();
+
+}
+
diff --git a/tos/chips/pxa27x/HplPXA27xInterruptM.nc b/tos/chips/pxa27x/HplPXA27xInterruptM.nc
new file mode 100644
index 00000000..cb500c54
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterruptM.nc
@@ -0,0 +1,232 @@
+// $Id$ 
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ */
+
+module HplPXA27xInterruptM
+{
+  provides {
+    interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id];
+    interface HplPXA27xInterruptCntl;
+  }
+}
+
+implementation 
+{
+
+  uint32_t getICHP() {
+    uint32_t val;
+
+    asm volatile ("mrc p6,0,%0,c5,c0,0\n\t":"=r" (val));
+    return val;
+  }
+
+  /* Core PXA27X interrupt dispatch vectors */
+  /* DO NOT change the name of these functions */
+  void hplarmv_irq() __attribute__ ((interrupt ("IRQ"))) @C() @atomic_hwevent() {
+
+    uint32_t IRQPending;
+
+    IRQPending = getICHP();  // Determine which interrupt to service
+    IRQPending >>= 16;  // Right justify to the IRQ portion
+
+    while (IRQPending & (1 << 15)) {
+      uint8_t PeripheralID = (IRQPending & 0x3f); // Get rid of the Valid bit
+      signal PXA27xIrq.fired[PeripheralID]();     // Handler is responsible for clearing interrupt
+      IRQPending = getICHP();  // Determine which interrupt to service
+      IRQPending >>= 16;  // Right justify to the IRQ portion
+    }
+
+    return;
+  }
+
+  void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"))) @C() @atomic_hwevent() {
+
+  } 
+
+  static uint8_t usedPriorities = 0;
+
+  /* Helper functions */
+  /* NOTE: Read-back of all register writes is necessary to ensure the data latches */
+
+  error_t allocate(uint8_t id, bool level, uint8_t priority)
+  {
+    uint32_t tmp;
+    error_t error = FAIL;
+
+    atomic{
+      uint8_t i;
+      if(usedPriorities == 0){//assumed that the table will have some entries
+	uint8_t PriorityTable[40], DuplicateTable[40];
+	for(i = 0; i < 40; i++){
+	  DuplicateTable[i] = PriorityTable[i] = 0xFF;
+	}
+	
+	for(i = 0; i < 40; i++)
+	  if(TOSH_IRP_TABLE[i] != 0xff){
+	    if(PriorityTable[TOSH_IRP_TABLE[i]] != 0xFF)/*duplicate priorities
+							  in the table, mark 
+							  for later fixing*/
+	      DuplicateTable[i] = PriorityTable[TOSH_IRP_TABLE[i]];
+	    else
+	      PriorityTable[TOSH_IRP_TABLE[i]] = i;
+	  }
+	
+	//compress table
+	for(i = 0; i < 40; i++){
+	  if(PriorityTable[i] != 0xff){
+	    PriorityTable[usedPriorities] = PriorityTable[i];
+	    if(i != usedPriorities)
+	      PriorityTable[i] = 0xFF;
+	    usedPriorities++;
+	  }
+	}
+
+	for(i = 0; i < 40; i++)
+	  if(DuplicateTable[i] != 0xFF){
+	    uint8_t j, ExtraTable[40];
+	    for(j = 0; DuplicateTable[i] != PriorityTable[j]; j++);
+	    memcpy(ExtraTable + j + 1, PriorityTable + j, usedPriorities - j);
+	    memcpy(PriorityTable + j + 1, ExtraTable + j + 1, 
+		   usedPriorities - j);
+	    PriorityTable[j] = i;
+	    usedPriorities++;
+	  }
+
+	for(i = 0; i < usedPriorities; i++){
+	  IPR(i) = (IPR_VALID | PriorityTable[i]);
+	  tmp = IPR(i);
+	}
+      }
+
+      if (id < 34){
+	if(priority == 0xff){
+	  priority = usedPriorities;
+	  usedPriorities++;
+	  IPR(priority) = (IPR_VALID | (id));
+	  tmp = IPR(priority);
+	}
+	if (level) {
+	  _ICLR(id) |= _PPID_Bit(id);
+	  tmp = _ICLR(id);
+	} 
+	
+	error = SUCCESS;
+      }
+    }
+    return error;
+  }
+  
+  void enable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) |= _PPID_Bit(id);
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  void disable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) &= ~(_PPID_Bit(id));
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  /* Interface implementation */
+
+  async command error_t PXA27xIrq.allocate[uint8_t id]()
+  {
+    return allocate(id, FALSE, TOSH_IRP_TABLE[id]);
+  }
+
+  async command void PXA27xIrq.enable[uint8_t id]()
+  {
+    enable(id);
+    return;
+  }
+
+  async command void PXA27xIrq.disable[uint8_t id]()
+  {
+    disable(id);
+    return;
+  }
+
+  async command void HplPXA27xInterruptCntl.setICCR_DIM(bool flag) {
+
+    if (flag) {
+      ICCR |= ICCR_DIM;
+    }
+    else {
+      ICCR = 0;
+    }
+    return;
+
+  }
+
+  async command bool HplPXA27xInterruptCntl.getICCR_DIM() {
+    bool result = FALSE;
+
+    if (ICCR & ICCR_DIM) {
+      result = TRUE;
+    }
+
+    return result;
+  }
+
+  default async event void PXA27xIrq.fired[uint8_t id]() 
+  {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/McuSleepC.nc b/tos/chips/pxa27x/McuSleepC.nc
new file mode 100644
index 00000000..85d6864f
--- /dev/null
+++ b/tos/chips/pxa27x/McuSleepC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the Intel Xscale PXA27x
+ *
+ * 
    + *  $Id$
+ * 
    
+ *
+ * @author Philip Buonadonna
+ *
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  
+  async command void McuSleep.sleep() {
+    // Put idle into here.
+    asm volatile (
+		  "mcr p14,0,%0,c7,c0,0"
+		  : 
+		  : "r" (PWRMODE_M_IDLE)
+		  );
+    __nesc_enable_interrupt();
+    __nesc_disable_interrupt();
+    return;
+  }
+
+  async command void McuPowerState.update() {
+
+    return;
+  }
+
+ default async command mcu_power_t McuPowerOverride.lowestState() {
+   return 0;
+ }
+
+}
diff --git a/tos/chips/pxa27x/arm_defs.h b/tos/chips/pxa27x/arm_defs.h
new file mode 100644
index 00000000..06d0705a
--- /dev/null
+++ b/tos/chips/pxa27x/arm_defs.h
@@ -0,0 +1,70 @@
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:   Philip Buonadonna
+ *
+ *
+ */
+
+#ifndef _ARM_DEFS_H
+#define _ARM_DEFS_H
+
+#define	ARM_CPSR_MODE_MASK (0x0000001F)
+#define	ARM_CPSR_INT_MASK (0x000000C0)
+#define	ARM_CPSR_COND_MASK (0xF8000000)
+
+#define	ARM_CPSR_MODE_USR (0x10)
+#define	ARM_CPSR_MODE_FIQ (0x11)
+#define	ARM_CPSR_MODE_IRQ (0x12)
+#define	ARM_CPSR_MODE_SVC (0x13)
+#define	ARM_CPSR_MODE_ABT (0x17)
+#define	ARM_CPSR_MODE_UND (0x1B)
+#define	ARM_CPSR_MODE_SYS (0x1F)
+
+#define	ARM_CPSR_BIT_N (1 << 31)
+#define	ARM_CPSR_BIT_Z (1 << 30)
+#define	ARM_CPSR_BIT_C (1 << 29)
+#define	ARM_CPSR_BIT_V (1 << 28)
+#define	ARM_CPSR_BIT_Q (1 << 27)
+
+#define	ARM_CPSR_BIT_I (1 << 7)
+#define	ARM_CPSR_BIT_F (1 << 6)
+#define	ARM_CPRS_BIT_T (1 << 5)
+
+#endif /*_ARM_DEFS_H */
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc
new file mode 100644
index 00000000..c9792cef
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc
@@ -0,0 +1,55 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+configuration HplPXA27xDMAC
+{
+  provides {
+    interface HplPXA27xDMACntl;
+    interface HplPXA27xDMAChnl[uint8_t chnl];
+  }
+}
+implementation
+{
+  components HplPXA27xDMAM;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+  
+  HplPXA27xDMACntl = HplPXA27xDMAM;
+  HplPXA27xDMAChnl = HplPXA27xDMAM;
+
+  HplPXA27xDMAM.Init <- PlatformP.InitL1;
+
+  HplPXA27xDMAM.DMAIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_DMAC];
+ 
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc
new file mode 100644
index 00000000..cbfb946a
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc
@@ -0,0 +1,92 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:             Phil Buonadonna
+ * Authors:		Robbie Adler
+ */
+
+
+interface HplPXA27xDMAChnl
+{
+  async command error_t setMap(uint8_t dev);
+  async command void setDALGNbit(bool flag);
+  async command bool getDALGNbit();
+  async command bool getDINTbit();
+  async command void setDCSR(uint32_t val);
+  async command uint32_t getDCSR();
+  async command void setDCMD(uint32_t val);
+  async command uint32_t getDCMD();
+  async command void setDDADR(uint32_t val);
+  async command uint32_t getDDADR();
+  async command void setDSADR(uint32_t val);
+  async command uint32_t getDSADR();
+  async command void setDTADR(uint32_t val);
+  async command uint32_t getDTADR();
+  async event void interruptDMA();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc b/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc
new file mode 100644
index 00000000..074cc5e0
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc
@@ -0,0 +1,55 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *
+ * Authors:             Phil Buonadonna
+ *
+ */
+
+
+interface HplPXA27xDMACntl
+{
+  async command void setDRCMR(uint8_t peripheral, uint8_t chnl);
+  async command uint8_t getDRCMR(uint8_t peripheral);
+  async command void setDALGN(uint32_t val);
+  async command uint32_t getDALGN(uint32_t val);
+  async command void setDPCSR(uint32_t val);
+  async command uint32_t getDPSCR();
+  async command void setDRQSR0(uint32_t val);
+  async command uint32_t getDRQSR0();
+  async command void setDRQSR1(uint32_t val);
+  async command uint32_t getDRQSR1();
+  async command void setDRQSR2(uint32_t val);
+  async command uint32_t getDRQSR2();
+  async command uint32_t getDINT();
+  async command void setFLYCNFG(uint32_t val);
+  async command uint32_t getFLYCNFG();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc
new file mode 100644
index 00000000..276a2cf7
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc
@@ -0,0 +1,64 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ * This interface is to be PROVIDED by peripheral HPL components that
+ * are DMA-able. It is used to provide information to higher level 
+ * components (e.g. HalX) that may implement higher level peripheral
+ * functions using DMA. 
+ *
+ * Instantiate the interface multiple times according to how many
+ * I/O addresses a peripheral has that may be assigned to a DMA
+ * src/tgt address register.
+ *
+ * Authors:             Phil Buonadonna
+ *
+ */
+
+
+interface HplPXA27xDMAInfo
+{
+  /**
+   * Returns a single DMAable address for a peripheral. 
+   *
+   * @return addr The 32 bit address of the peripheral register
+   * of interest.
+   */
+  async command uint32_t getAddr();
+
+  /**
+   * Returns the DMA map index that is associated with the getAddr()
+   * function. 
+   *
+   * @return index The DMA map register index that is  associated with
+   * the getAddr function.
+   */
+  async command uint8_t getMapIndex();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc
new file mode 100644
index 00000000..102463db
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc
@@ -0,0 +1,128 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+module HplPXA27xDMAM
+{
+  provides {
+    interface Init;
+    interface HplPXA27xDMACntl;
+    interface HplPXA27xDMAChnl[uint8_t chnl];
+  }
+  uses {
+    interface HplPXA27xInterrupt as DMAIrq;
+  }
+}
+
+implementation
+{
+  
+  command error_t Init.init() {
+    call DMAIrq.allocate();
+    call DMAIrq.enable();
+    return SUCCESS;
+  }
+  
+  async command void HplPXA27xDMACntl.setDRCMR(uint8_t peripheral, uint8_t val) {
+    DRCMR(peripheral) = val;
+  }
+  async command uint8_t HplPXA27xDMACntl.getDRCMR(uint8_t peripheral) { return DRCMR(peripheral);}
+  async command void HplPXA27xDMACntl.setDALGN(uint32_t val) {DALGN = val;}
+  async command uint32_t HplPXA27xDMACntl.getDALGN(uint32_t val) {return DALGN; }
+  async command void HplPXA27xDMACntl.setDPCSR(uint32_t val) {DPCSR = val; }
+  async command uint32_t HplPXA27xDMACntl.getDPSCR() {return DPCSR; }
+  async command void HplPXA27xDMACntl.setDRQSR0(uint32_t val) {DRQSR0 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR0() {return DRQSR0; }
+  async command void HplPXA27xDMACntl.setDRQSR1(uint32_t val) {DRQSR1 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR1() {return DRQSR1; }
+  async command void HplPXA27xDMACntl.setDRQSR2(uint32_t val) {DRQSR2 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR2() {return DRQSR2; }
+  async command uint32_t HplPXA27xDMACntl.getDINT() {return DINT; }
+  async command void HplPXA27xDMACntl.setFLYCNFG(uint32_t val) {FLYCNFG = val; }
+  async command uint32_t HplPXA27xDMACntl.getFLYCNFG() {return FLYCNFG; }
+
+  
+  async command error_t HplPXA27xDMAChnl.setMap[uint8_t chnl](uint8_t dev) {
+    call HplPXA27xDMACntl.setDRCMR(dev,(DRCMR_MAPVLD | DRCMR_CHLNUM(chnl)));
+    return SUCCESS;
+  }
+  async command void HplPXA27xDMAChnl.setDALGNbit[uint8_t chnl](bool flag) {
+    if (flag) {
+      DALGN |= (1 << chnl);
+    }
+    else {
+      DALGN &= ~(1 << chnl);
+    }
+    return;
+  }
+  async command bool HplPXA27xDMAChnl.getDALGNbit[uint8_t chnl]() {
+    return ((DALGN & (1 << chnl)) != 0);
+  }
+  async command bool HplPXA27xDMAChnl.getDINTbit[uint8_t chnl]() {
+    return ((DINT & (1 << chnl)) != 0);
+  }
+  async command void HplPXA27xDMAChnl.setDCSR[uint8_t chnl](uint32_t val) {
+    // uint32_t cycles;
+    //_pxa27x_perf_clear();
+    DCSR(chnl) = val;
+    //_pxa27x_perf_get(cycles);
+  }
+  async command uint32_t HplPXA27xDMAChnl.getDCSR[uint8_t chnl]() {return DCSR(chnl); }
+  async command void HplPXA27xDMAChnl.setDCMD[uint8_t chnl](uint32_t val) {DCMD(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDCMD[uint8_t chnl]() {return DCMD(chnl); }
+  async command void HplPXA27xDMAChnl.setDDADR[uint8_t chnl](uint32_t val) {DDADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDDADR[uint8_t chnl]() {return DDADR(chnl); }
+  async command void HplPXA27xDMAChnl.setDSADR[uint8_t chnl](uint32_t val) {DSADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDSADR[uint8_t chnl]() {return DSADR(chnl); }
+  async command void HplPXA27xDMAChnl.setDTADR[uint8_t chnl](uint32_t val) {DTADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDTADR[uint8_t chnl]() {return DTADR(chnl); }
+
+  async event void DMAIrq.fired() {
+    uint32_t IntReg;
+    uint8_t chnl;
+    IntReg = call HplPXA27xDMACntl.getDINT();
+
+    while (IntReg) {
+      chnl = 31 - _pxa27x_clzui(IntReg);
+      signal HplPXA27xDMAChnl.interruptDMA[chnl]();
+      IntReg &= ~(1 << chnl);
+    }
+    return;
+  }
+
+  default async event void HplPXA27xDMAChnl.interruptDMA[uint8_t chnl]() {
+    call HplPXA27xDMAChnl.setDCMD[chnl](0);
+    call HplPXA27xDMAChnl.setDCSR[chnl](DCSR_EORINT | DCSR_ENDINTR
+					| DCSR_STARTINTR | DCSR_BUSERRINTR);
+  }
+}
diff --git a/tos/chips/pxa27x/gpio/GeneralIOC.nc b/tos/chips/pxa27x/gpio/GeneralIOC.nc
new file mode 100644
index 00000000..b60d0698
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/GeneralIOC.nc
@@ -0,0 +1,63 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+
+configuration GeneralIOC 
+{
+  provides {
+    interface GeneralIO[uint8_t pin];
+    interface HalPXA27xGpioInterrupt[uint8_t pin];
+    interface GpioInterrupt[uint8_t pin];
+  }
+}
+
+implementation 
+{
+  components HalPXA27xGeneralIOM;
+  components HplPXA27xGPIOC;
+
+  GeneralIO = HalPXA27xGeneralIOM;
+  HalPXA27xGpioInterrupt = HalPXA27xGeneralIOM;
+  GpioInterrupt = HalPXA27xGeneralIOM;
+
+  HalPXA27xGeneralIOM.HplPXA27xGPIOPin -> HplPXA27xGPIOC;
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc b/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc
new file mode 100644
index 00000000..50c951c0
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc
@@ -0,0 +1,154 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+module HalPXA27xGeneralIOM {
+  provides {
+    interface GeneralIO[uint8_t pin];
+    interface HalPXA27xGpioInterrupt[uint8_t pin];
+    interface GpioInterrupt[uint8_t pin];
+  }
+  uses {
+    interface HplPXA27xGPIOPin[uint8_t pin];
+  }
+}
+
+implementation {
+  async command void GeneralIO.set[uint8_t pin]() {
+    
+    atomic call HplPXA27xGPIOPin.setGPSRbit[pin]();
+    return;
+  }
+
+  async command void GeneralIO.clr[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPCRbit[pin]();
+    return;
+  }
+
+  async command void GeneralIO.toggle[uint8_t pin]() {
+    atomic {
+      if (call HplPXA27xGPIOPin.getGPLRbit[pin]()) {
+	call HplPXA27xGPIOPin.setGPCRbit[pin]();
+      }
+      else {
+	call HplPXA27xGPIOPin.setGPSRbit[pin]();
+      }
+    }
+    return;
+  }
+
+  async command bool GeneralIO.get[uint8_t pin]() {
+    bool result;
+    result = call HplPXA27xGPIOPin.getGPLRbit[pin]();
+    return result;
+  }
+
+  async command void GeneralIO.makeInput[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPDRbit[pin](FALSE);
+    return;
+  }
+
+  async command void GeneralIO.makeOutput[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPDRbit[pin](TRUE);
+    return;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.enableRisingEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.enableFallingEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.enableBothEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.disable[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.enableRisingEdge[pin]();
+  }
+
+  async command error_t GpioInterrupt.enableFallingEdge[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.enableFallingEdge[pin]();
+  }
+
+  async command error_t GpioInterrupt.disable[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.disable[pin]();
+  }
+
+  async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() {
+    call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    signal HalPXA27xGpioInterrupt.fired[pin]();
+    signal GpioInterrupt.fired[pin]();
+    return;
+  }
+  
+
+  default async event void HalPXA27xGpioInterrupt.fired[uint8_t pin]() {
+    return;
+  }
+
+  default async event void GpioInterrupt.fired[uint8_t pin]() {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc b/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc
new file mode 100644
index 00000000..e3c51ade
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/*
+ * Variant of the GpioCapture interface that provides a capture
+ * on 'BOTH'.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HalPXA27xGpioCapture {
+  
+  /** 
+   * Enable an edge based timer capture event.
+   *
+   * @return Whether the timer capture has been enabled.
+   */
+  async command error_t captureRisingEdge();
+  async command error_t captureFallingEdge();
+  async command error_t captureBothEdge();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * @param val The value of the 32kHz timer.
+   */
+  async event void captured(uint16_t time);
+
+  /**
+   * Disable further captures.
+   */ 
+  async command void disable();
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc b/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc
new file mode 100644
index 00000000..038d79d6
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/* 
+ * Variant of the standard GpioInterrupt interface that provides a 
+ * 'BOTH' trigger.
+ * 
+ * @author Phil Buonadonna
+ * 
+ */
+
+interface HalPXA27xGpioInterrupt {
+
+  /** 
+   * Enable an edge based interrupt. Calls to these functions are
+   * not cumulative: only the transition type of the last called 
+   * function will be monitored for.
+   *
+   *
+   * @return SUCCESS if the interrupt has been enabled
+   */
+  async command error_t enableRisingEdge();
+  async command error_t enableFallingEdge();
+  async command error_t enableBothEdge();
+
+  /**  
+   * Diables an edge interrupt or capture interrupt
+   * 
+   * @return SUCCESS if the interrupt has been disabled
+   */ 
+  async command error_t disable();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * NOTE: Interrupts keep running until "disable()" is called
+   */
+  async event void fired();
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc
new file mode 100644
index 00000000..c5c05898
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc
@@ -0,0 +1,55 @@
+// $Id$
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * Emulates GPIO capture functionality using HalPXA27xGpioInterrupt and the 
+ * standard 32khz counter. Provides a method to capture on BOTH edges of
+ * a GPIO transition
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration HalPXA27xSoftCaptureC() 
+{
+  provides interface HalPXA27xGpioCapture;
+  uses interface HalPXA27xGpioInterrupt;
+}
+
+implementation
+{
+  components new HalPXa27xSoftCaptureP();
+  components Counter32khzC;
+  
+  HalPXA27xGpioCapture = HalPXA27xSoftCaptureP;
+  HalPXA27xGpioInterrupt = HalPXA27xSoftCaptureP;
+
+  HalPXA27xSoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
+}
+
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc
new file mode 100644
index 00000000..a0945be3
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc
@@ -0,0 +1,82 @@
+// $Id$
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter. Provides a method to capture on BOTH edges of
+ * a GPIO transition.
+ *
+ * @author Phil Buonadonna
+ */
+generic module HalPXA27xSoftCaptureP ()
+{
+  provides interface HalPXA27xGpioCapture;
+  uses {
+    interface HalPXA27xGpioInterrupt;
+    interface Counter as Counter32khz32;
+  }
+}
+
+implementation 
+{
+
+  async command error_t HalPXA27xGpioCapture.captureRisingEdge() {
+    return (call HalPXA27xGpioInterrupt.enableRisingEdge());
+  }
+
+  async command error_t HalPXA27xGpioCapture.captureFallingEdge() {
+    return (call HalPXA27xGpioInterrupt.enableFallingEdge());
+  }
+
+  async command error_t HalPXA27xGpioCapture.captureBothEdge() {
+    return (call HalPXA27xGpioInterrupt.enableBothEdge());
+  }
+
+  async command void HalPXA27xGpioCapture.disable() {
+    call HalPXA27xGpioInterrupt.disable();
+    return;
+  }
+  
+  async event void HalPXA27xGpioInterrupt.fired() {
+    uint16_t captureTime;
+
+    captureTime = (uint16_t) call Counter32khz32.get();
+    signal HalPXA27xGpioCapture.captured(captureTime);
+    return;
+  }
+
+  async event void Counter32khz32.overflow() {
+    return;
+  }
+
+  default async event void HalPXA27xGpioCapture.captured(uint16_t time) {
+    return;
+  }
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc
new file mode 100644
index 00000000..0b21c342
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * This interface provides direct access to the PXA27x GPIO controller 
+ * registers. It is meant as an alternative to the 'per-pin' interface 
+ * where the pin abstraction may not be convienient. The event provided is
+ * called at every signal of the underlying first-level interrupt component
+ * and NOT on a per-pin basis.
+ * 
+ * Commands in this interface are named according to the following scheme:
+ *    set(uint32_t val);
+ *    get();
+ * where  is the register as defined in the PXA27x Developers 
+ * Guide: General-Purpose IO Controller.
+ *
+ * This interface is NOT intended to be parameterized.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xGPIO
+{
+
+  async command void setGPLR0(uint32_t val);
+  async command uint32_t getGPLR0();
+  async command void setGPLR1(uint32_t val);
+  async command uint32_t getGPLR1();
+  async command void setGPLR2(uint32_t val);
+  async command uint32_t getGPLR2();
+  async command void setGPLR3(uint32_t val);
+  async command uint32_t getGPLR3();
+
+  async command void setGPDR0(uint32_t val);
+  async command uint32_t getGPDR0();
+  async command void setGPDR1(uint32_t val);
+  async command uint32_t getGPDR1();
+  async command void setGPDR2(uint32_t val);
+  async command uint32_t getGPDR2();
+  async command void setGPDR3(uint32_t val);
+  async command uint32_t getGPDR3();
+
+  async command void setGPSR0(uint32_t val);
+  async command uint32_t getGPSR0();
+  async command void setGPSR1(uint32_t val);
+  async command uint32_t getGPSR1();
+  async command void setGPSR2(uint32_t val);
+  async command uint32_t getGPSR2();
+  async command void setGPSR3(uint32_t val);
+  async command uint32_t getGPSR3();
+
+  async command void setGPCR0(uint32_t val);
+  async command uint32_t getGPCR0();
+  async command void setGPCR1(uint32_t val);
+  async command uint32_t getGPCR1();
+  async command void setGPCR2(uint32_t val);
+  async command uint32_t getGPCR2();
+  async command void setGPCR3(uint32_t val);
+  async command uint32_t getGPCR3();
+
+  async command void setGRER0(uint32_t val);
+  async command uint32_t getGRER0();
+  async command void setGRER1(uint32_t val);
+  async command uint32_t getGRER1();
+  async command void setGRER2(uint32_t val);
+  async command uint32_t getGRER2();
+  async command void setGRER3(uint32_t val);
+  async command uint32_t getGRER3();
+ 
+  async command void setGFER0(uint32_t val);
+  async command uint32_t getGFER0();
+  async command void setGFER1(uint32_t val);
+  async command uint32_t getGFER1();
+  async command void setGFER2(uint32_t val);
+  async command uint32_t getGFER2();
+  async command void setGFER3(uint32_t val);
+  async command uint32_t getGFER3();
+ 
+  async command void setGEDR0(uint32_t val);
+  async command uint32_t getGEDR0();
+  async command void setGEDR1(uint32_t val);
+  async command uint32_t getGEDR1();
+  async command void setGEDR2(uint32_t val);
+  async command uint32_t getGEDR2();
+  async command void setGEDR3(uint32_t val);
+  async command uint32_t getGEDR3();
+ 
+  async command void setGAFR0_L(uint32_t val);
+  async command uint32_t getGAFR0_L();
+  async command void setGAFR0_U(uint32_t val);
+  async command uint32_t getGAFR0_U();
+  async command void setGAFR1_L(uint32_t val);
+  async command uint32_t getGAFR1_L();
+  async command void setGAFR1_U(uint32_t val);
+  async command uint32_t getGAFR1_U();
+  async command void setGAFR2_L(uint32_t val);
+  async command uint32_t getGAFR2_L();
+  async command void setGAFR2_U(uint32_t val);
+  async command uint32_t getGAFR2_U();
+  async command void setGAFR3_L(uint32_t val);
+  async command uint32_t getGAFR3_L();
+  async command void setGAFR3_U(uint32_t val);
+  async command uint32_t getGAFR3_U();
+ 
+  async event void fired();
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc
new file mode 100644
index 00000000..3425bc6f
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+configuration HplPXA27xGPIOC {
+  provides {
+    interface HplPXA27xGPIOPin[uint8_t pin];
+    interface HplPXA27xGPIO;
+  }
+}
+implementation 
+{
+  components HplPXA27xGPIOM;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xGPIOPin = HplPXA27xGPIOM;
+  HplPXA27xGPIO = HplPXA27xGPIOM;
+
+
+  HplPXA27xGPIOM.Init <- PlatformP.InitL1;
+  
+  HplPXA27xGPIOM.GPIOIrq0 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_0];
+  HplPXA27xGPIOM.GPIOIrq1 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_1];
+  HplPXA27xGPIOM.GPIOIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_X];
+
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc
new file mode 100644
index 00000000..60912f70
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc
@@ -0,0 +1,317 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+module HplPXA27xGPIOM {
+
+  provides {
+    interface Init;
+    interface HplPXA27xGPIOPin[uint8_t pin];
+    interface HplPXA27xGPIO;
+  }
+  uses {
+    interface HplPXA27xInterrupt as GPIOIrq0;
+    interface HplPXA27xInterrupt as GPIOIrq1;
+    interface HplPXA27xInterrupt as GPIOIrq;   // GPIO 2 - 120 only
+  }
+}
+
+implementation {
+
+  bool gfInitialized = FALSE;
+
+  command error_t Init.init() 
+  {
+    bool isInited;
+
+    atomic {
+      isInited = gfInitialized;
+      gfInitialized = TRUE;
+    }
+
+    if (!isInited) {
+      call GPIOIrq0.allocate();
+      call GPIOIrq1.allocate();
+      call GPIOIrq.allocate();
+      call GPIOIrq0.enable();
+      call GPIOIrq1.enable();
+      call GPIOIrq.enable();   
+    }
+    return SUCCESS;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGPLRbit[uint8_t pin]() 
+  {
+    return ((GPLR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGPDRbit[uint8_t pin](bool dir) 
+  {
+    if (dir) {
+      GPDR(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GPDR(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGPDRbit[uint8_t pin]() 
+  {
+    return ((GPDR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGPSRbit[uint8_t pin]() 
+  {
+    GPSR(pin) = _GPIO_bit(pin);
+    return;
+  }
+
+  async command void HplPXA27xGPIOPin.setGPCRbit[uint8_t pin]() 
+  {
+    GPCR(pin) = _GPIO_bit(pin);
+    return;
+  }
+
+  async command void HplPXA27xGPIOPin.setGRERbit[uint8_t pin](bool flag) 
+  {
+    if (flag) {
+      GRER(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GRER(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGRERbit[uint8_t pin]() 
+  {
+    return ((GRER(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGFERbit[uint8_t pin](bool flag) 
+  {
+    if (flag) {
+      GFER(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GFER(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGFERbit[uint8_t pin]() 
+  {
+    return ((GFER(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command bool HplPXA27xGPIOPin.getGEDRbit[uint8_t pin]() 
+  {
+    return ((GEDR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command bool HplPXA27xGPIOPin.clearGEDRbit[uint8_t pin]() 
+  {
+    bool flag;
+    flag = ((GEDR(pin) & _GPIO_bit(pin)) != 0);
+    GEDR(pin) = _GPIO_bit(pin);
+    return flag;
+  }
+
+  async command void HplPXA27xGPIOPin.setGAFRpin[uint8_t pin](uint8_t func) 
+  {
+    func &= 0x3;
+    _GPIO_setaltfn(pin,func);
+    return;
+  }
+
+  async command uint8_t HplPXA27xGPIOPin.getGAFRpin[uint8_t pin]() 
+  {
+    return (_GPIO_getaltfun(pin));
+  }
+
+  default async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() 
+  {
+    call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    return;
+  }
+
+  async command void HplPXA27xGPIO.setGPLR0(uint32_t val) {GPLR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR0() {return GPLR0;}
+  async command void HplPXA27xGPIO.setGPLR1(uint32_t val) {GPLR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR1() {return GPLR1;}
+  async command void HplPXA27xGPIO.setGPLR2(uint32_t val) {GPLR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR2() {return GPLR2;}
+  async command void HplPXA27xGPIO.setGPLR3(uint32_t val) {GPLR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR3() {return GPLR3;}
+
+  async command void HplPXA27xGPIO.setGPDR0(uint32_t val) {GPDR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR0() {return GPDR0;}
+  async command void HplPXA27xGPIO.setGPDR1(uint32_t val) {GPDR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR1() {return GPDR1;}
+  async command void HplPXA27xGPIO.setGPDR2(uint32_t val) {GPDR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR2() {return GPDR2;}
+  async command void HplPXA27xGPIO.setGPDR3(uint32_t val) {GPDR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR3() {return GPDR3;}
+
+  async command void HplPXA27xGPIO.setGPSR0(uint32_t val) {GPSR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR0() {return GPSR0;}
+  async command void HplPXA27xGPIO.setGPSR1(uint32_t val) {GPSR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR1() {return GPSR1;}
+  async command void HplPXA27xGPIO.setGPSR2(uint32_t val) {GPSR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR2() {return GPSR2;}
+  async command void HplPXA27xGPIO.setGPSR3(uint32_t val) {GPSR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR3() {return GPSR3;}
+
+  async command void HplPXA27xGPIO.setGPCR0(uint32_t val) {GPCR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR0() {return GPCR0;}
+  async command void HplPXA27xGPIO.setGPCR1(uint32_t val) {GPCR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR1() {return GPCR1;}
+  async command void HplPXA27xGPIO.setGPCR2(uint32_t val) {GPCR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR2() {return GPCR2;}
+  async command void HplPXA27xGPIO.setGPCR3(uint32_t val) {GPCR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR3() {return GPCR3;}
+
+  async command void HplPXA27xGPIO.setGRER0(uint32_t val) {GRER0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER0() {return GRER0;}
+  async command void HplPXA27xGPIO.setGRER1(uint32_t val) {GRER1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER1() {return GRER1;}
+  async command void HplPXA27xGPIO.setGRER2(uint32_t val) {GRER2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER2() {return GRER2;}
+  async command void HplPXA27xGPIO.setGRER3(uint32_t val) {GRER3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER3() {return GRER3;}
+
+  async command void HplPXA27xGPIO.setGFER0(uint32_t val) {GFER0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER0() {return GFER0;}
+  async command void HplPXA27xGPIO.setGFER1(uint32_t val) {GFER1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER1() {return GFER1;}
+  async command void HplPXA27xGPIO.setGFER2(uint32_t val) {GFER2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER2() {return GFER2;}
+  async command void HplPXA27xGPIO.setGFER3(uint32_t val) {GFER3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER3() {return GFER3;}
+
+  async command void HplPXA27xGPIO.setGEDR0(uint32_t val) {GEDR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR0() {return GEDR0;}
+  async command void HplPXA27xGPIO.setGEDR1(uint32_t val) {GEDR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR1() {return GEDR1;}
+  async command void HplPXA27xGPIO.setGEDR2(uint32_t val) {GEDR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR2() {return GEDR2;}
+  async command void HplPXA27xGPIO.setGEDR3(uint32_t val) {GEDR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR3() {return GEDR3;}
+ 
+  async command void HplPXA27xGPIO.setGAFR0_L(uint32_t val) {GAFR0_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR0_L() {return GAFR0_L;}
+  async command void HplPXA27xGPIO.setGAFR0_U(uint32_t val) {GAFR0_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR0_U() {return GAFR0_U;}
+
+  async command void HplPXA27xGPIO.setGAFR1_L(uint32_t val) {GAFR1_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR1_L() {return GAFR1_L;}
+  async command void HplPXA27xGPIO.setGAFR1_U(uint32_t val) {GAFR1_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR1_U() {return GAFR1_U;}
+
+  async command void HplPXA27xGPIO.setGAFR2_L(uint32_t val) {GAFR2_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR2_L() {return GAFR2_L;}
+  async command void HplPXA27xGPIO.setGAFR2_U(uint32_t val) {GAFR2_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR2_U() {return GAFR2_U;}
+
+  async command void HplPXA27xGPIO.setGAFR3_L(uint32_t val) {GAFR3_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR3_L() {return GAFR3_L;}
+  async command void HplPXA27xGPIO.setGAFR3_U(uint32_t val) {GAFR3_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR3_U() {return GAFR3_U;}
+ 
+  default async event void HplPXA27xGPIO.fired() {
+    return;
+  }
+
+  async event void GPIOIrq.fired() 
+  {
+
+    uint32_t DetectReg;
+    uint8_t pin;
+
+    signal HplPXA27xGPIO.fired(); 
+
+    // Mask off GPIO 0 and 1 (handled by direct IRQs)
+    atomic DetectReg = (GEDR0 & ~((1<<1) | (1<<0))); 
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[pin]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR1;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+32)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR2;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+64)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR3;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+96)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    return;
+  }
+
+  async event void GPIOIrq0.fired()
+  {
+    signal HplPXA27xGPIOPin.interruptGPIOPin[0]();
+  }
+
+  async event void GPIOIrq1.fired() 
+  {
+    signal HplPXA27xGPIOPin.interruptGPIOPin[1]();
+  } 
+
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc
new file mode 100644
index 00000000..0d121b64
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface provides a 'per-pin' abstraction for the PXA27x
+ * GPIO system. It is parameterized by the specific GPIO Pin number
+ * of the PXA27x. 
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xGPIOPin 
+{
+  /** 
+   * Returns the logic state of a GPIO Pin.
+   *
+   * @return bool TRUE if logic '1', FALSE if logic '0'
+   */
+  async command bool getGPLRbit();
+
+  /** 
+   * Configures the direction of a GPIO pin.
+   *
+   * @param dir TRUE to configure as an output, FALSE to configure as an input.
+   */
+  async command void setGPDRbit(bool dir);
+
+  /** 
+   * Get's the current pin direction configuration.
+   *
+   * @return bool TRUE if configured as an output, FALSE if configured 
+   *  as an input.
+   */
+  async command bool getGPDRbit();
+
+  /** 
+   * Sets a GPIO pin configured as an output to a HIGH state.
+   *
+   */
+  async command void setGPSRbit();
+
+  /** 
+   * Sets a GPIO pin configured as an output to a LOW state.
+   *
+   */
+  async command void setGPCRbit();
+
+  /** 
+   * Enables/Disables events on the rising edge of a GPIO pin 
+   * signal. Calls to this function are independent of calls
+   * to 'setFallingEDEnable()'
+   *
+   * @param flag TRUE to enable rising edge detection, FASLE to
+   * disable.
+   *
+   */
+  async command void setGRERbit(bool flag);
+
+  /** 
+   * Returns the status of rising edge detection.
+   *
+   * @return val TRUE if rising edge detection is enable, FALSE
+   * otherwise.
+   */
+  async command bool getGRERbit();
+
+  /** 
+   * Enables/Disables events on the falling edge of a GPIO pin 
+   * signal. Calls to this function are independent of calls to
+   * 'setRisingEDEnable()'
+   *
+   * @param flag TRUE to enable falling edge detection, FASLE to
+   * disable.
+   */
+  async command void setGFERbit(bool flag);
+
+  /** 
+   * Returns the status of falling edge detection.
+   *
+   * @return val TRUE if falling edge detection is enable, FALSE
+   * otherwise.
+   */
+  async command bool getGFERbit();
+
+  /** 
+   * Indicates wether an edge detection event is pending for GPIO Pin
+   *
+   * @return val TRUE if an event is pending.
+   */
+  async command bool getGEDRbit();
+
+  /** 
+   * Clears the edge detection event status.
+   *
+   * @return val TRUE if there was a pending event prior to clearing, 
+   * FALSE otherwise.
+   */
+  async command bool clearGEDRbit();
+
+  /** 
+   * Sets the GPIO pin to one of it's alternate peripheral functions.
+   * Refer to the PXA27x Developers Manual for information on available
+   * alternate functions.
+   *
+   * @param func An integer between 0 and 3 indicating the desired 
+   * pin alternate function. 
+   */
+  async command void setGAFRpin(uint8_t func);
+
+  /** 
+   * Returns the current alternate function selected for the GPIO pin.
+   *
+   * @return val An integer between 0 and 3 indicated the current
+   * alternate function.
+   */
+  async command uint8_t getGAFRpin();
+
+  /** 
+   * The pin edge detection event. Signalled when a rising/falling edge
+   * occurs on the PIN and the respective edge detect enable is set.
+   * The default event DOES NOT clear any pending requests.
+   *
+   */
+  async event void interruptGPIOPin();
+}
+
diff --git a/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc
new file mode 100644
index 00000000..73cf2076
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc
@@ -0,0 +1,62 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Phil Buonadonna
+ */
+
+#include 
+
+configuration HalPXA27xI2CMasterC
+{
+  provides interface I2CPacket;
+
+  uses interface HplPXA27xGPIOPin as I2CSCL;
+  uses interface HplPXA27xGPIOPin as I2CSDA;
+}
+
+implementation
+{
+  components HalPXA27xI2CMasterP;
+  components HplPXA27xI2CC;
+  components PlatformP;
+
+  I2CPacket = HalPXA27xI2CMasterP;
+
+  HalPXA27xI2CMasterP.Init <- PlatformP.InitL2;
+
+  HalPXA27xI2CMasterP.I2C -> HplPXA27xI2CC.I2C;
+
+  I2CSCL = HalPXA27xI2CMasterP.I2CSCL;
+  I2CSDA = HalPXA27xI2CMasterP.I2CSDA;
+}
diff --git a/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc
new file mode 100644
index 00000000..1cd13fbd
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc
@@ -0,0 +1,316 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Phil Buonadonna
+ */
+
+#include 
+
+module HalPXA27xI2CMasterP
+{
+  provides interface Init;
+  provides interface I2CPacket;
+
+  uses interface HplPXA27xI2C as I2C;
+
+  uses interface HplPXA27xGPIOPin as I2CSCL;
+  uses interface HplPXA27xGPIOPin as I2CSDA;
+
+}
+
+implementation
+{
+  // These states don't necessarily reflect the state of the I2C bus, rather the state of this
+  // module WRT an operation.  I.E. the module might be in STATE_IDLE, but the I2C bus still
+  // held by the master for a continued read.
+  enum {
+    I2C_STATE_IDLE,
+    I2C_STATE_READSTART,
+    I2C_STATE_READ,
+    I2C_STATE_READEND,
+    I2C_STATE_WRITE,
+    I2C_STATE_WRITEEND,
+    I2C_STATE_ERROR
+  };
+
+  uint8_t mI2CState;
+  uint16_t mCurTargetAddr;
+  uint8_t *mCurBuf, mCurBufLen, mCurBufIndex;
+  i2c_flags_t mCurFlags;
+  const uint32_t mBaseICRFlags = (ICR_FM | ICR_BEIE | ICR_IUE | ICR_SCLE);
+
+  static void readNextByte() {
+    if (mCurBufIndex >= (mCurBufLen - 1)) {
+      atomic { mI2CState = I2C_STATE_READEND; }
+      if (mCurFlags & I2C_STOP) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB | ICR_STOP));
+      }
+      else if (mCurFlags & I2C_ACK_END) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB));
+      }
+      else {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB));
+      }
+    }
+    else {
+      atomic { mI2CState = I2C_STATE_READ; }
+      call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB));
+    }
+    return;
+  }
+
+  static void writeNextByte() {
+    if (mCurBufIndex >= mCurBufLen) {
+      atomic { mI2CState = I2C_STATE_WRITEEND; }
+      
+      if (mCurFlags & I2C_STOP) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_TB | ICR_ITEIE | ICR_STOP));
+      }
+      
+      else {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE | ICR_TB));
+      }
+      
+    }
+    else {
+      call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE |ICR_TB));
+    }
+    return;
+  }
+  
+  static error_t startI2CTransact(uint8_t nextState, uint16_t addr, uint8_t length, uint8_t *data, 
+			   i2c_flags_t flags, bool bRnW) {
+    error_t error = SUCCESS;
+    uint8_t tmpAddr;
+
+    if ((data == NULL) || (length == 0)) {
+      return EINVAL;
+    }
+
+    atomic {
+      if (mI2CState == I2C_STATE_IDLE) {
+	mI2CState = nextState;
+	mCurTargetAddr = addr;
+	mCurBuf = data;
+	mCurBufLen = length;
+	mCurBufIndex = 0;
+	mCurFlags = flags;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) {
+      return error;
+    }
+
+    if (flags & I2C_START) {
+
+      tmpAddr = (bRnW) ? 0x1 : 0x0;
+      tmpAddr |= ((addr << 1) & 0xFE);
+      call I2C.setIDBR(tmpAddr);
+      call I2C.setICR( mBaseICRFlags | ICR_ITEIE | ICR_TB | ICR_START);
+    }
+    else if (bRnW) {
+      atomic {
+	readNextByte();
+      }
+    }
+    else {
+      atomic {
+	writeNextByte();
+      }
+    }
+    return error;
+  }
+
+
+  task void handleReadError() {
+    call I2C.setISAR(0x7F0);
+    call I2C.setICR(mBaseICRFlags | ICR_MA);
+    call I2C.setICR(ICR_UR);
+    call I2C.setICR(mBaseICRFlags);
+    mI2CState = I2C_STATE_IDLE;
+    atomic {
+      signal I2CPacket.readDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf);
+    }
+    return;
+  }
+    
+  task void handleWriteError() {
+    call I2C.setISAR(0x7F0);
+    call I2C.setICR(mBaseICRFlags | ICR_MA);
+    call I2C.setICR(ICR_UR);
+    call I2C.setICR(mBaseICRFlags);
+    mI2CState = I2C_STATE_IDLE;
+    atomic {
+      signal I2CPacket.readDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf);
+    }
+    return;
+  }
+
+  command error_t Init.init() {
+    atomic {
+      call I2CSCL.setGAFRpin(I2C_SCL_ALTFN);
+      call I2CSCL.setGPDRbit(TRUE);
+      call I2CSDA.setGAFRpin(I2C_SDA_ALTFN);
+      call I2CSDA.setGPDRbit(TRUE);
+
+      mI2CState = I2C_STATE_IDLE;
+      call I2C.setISAR(0);
+      call I2C.setICR(mBaseICRFlags | ICR_ITEIE | ICR_DRFIE);
+    }    
+    return SUCCESS;
+  }
+
+  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) {
+    error_t error = SUCCESS;
+    uint8_t tmpAddr;
+
+    if ((flags & I2C_ACK_END) && (flags & I2C_STOP)) {
+      error = EINVAL;
+      return error;
+    }
+
+    if (flags & I2C_START) {
+      error = startI2CTransact(I2C_STATE_READSTART,addr,length,data,flags,TRUE);
+    }
+    else {
+      error = startI2CTransact(I2C_STATE_READ,addr,length,data,flags,TRUE);
+    }
+    
+    return error;
+  }
+
+  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) {
+    error_t error = SUCCESS;
+    uint8_t tmpAddr;
+
+    error = startI2CTransact(I2C_STATE_WRITE,addr,length,data,flags,FALSE);
+
+    return error;
+  }
+
+  async event void I2C.interruptI2C() {
+    uint32_t valISR;
+
+    // PXA27x Devel Guide is wrong.  You have to write to the ISR to clear the bits.
+    valISR = call I2C.getISR();
+    call I2C.setISR(ISR_ITE | ISR_IRF);
+
+    // turn off DRFIE and ITEIE
+    //call I2C.setICR((call I2C.getICR()) & ~(ICR_DRFIE | ICR_ITEIE));
+    //call I2C.setICR(mBaseICRFlags);
+
+    switch (mI2CState) {
+    case I2C_STATE_IDLE:
+      // Should never get here. Reset all pending interrupts.
+      break;
+
+    case I2C_STATE_READSTART:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      readNextByte();
+      break;
+
+    case I2C_STATE_READ:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      mCurBuf[mCurBufIndex] = call I2C.getIDBR();
+      mCurBufIndex++;
+      readNextByte();
+      break;
+
+    case I2C_STATE_READEND:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      mCurBuf[mCurBufIndex] = call I2C.getIDBR();
+      mI2CState = I2C_STATE_IDLE;
+      signal I2CPacket.readDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf);
+      break;
+
+    case I2C_STATE_WRITE:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleWriteError();
+	break;
+      }
+      call I2C.setIDBR(mCurBuf[mCurBufIndex]);
+      mCurBufIndex++;
+      writeNextByte();
+
+      break;
+
+    case I2C_STATE_WRITEEND:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleWriteError();
+	break;
+      }
+      mI2CState= I2C_STATE_IDLE;
+      //call I2C.setICR(call I2C.getICR() & ~I2C_STOP);
+      call I2C.setICR(mBaseICRFlags);
+      signal I2CPacket.writeDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf);
+      break;
+
+    default:
+      break;
+    }
+
+      
+    return;
+  }
+
+  default async event void I2CPacket.readDone(error_t error, uint16_t addr, 
+					     uint8_t length, uint8_t* data) {
+    return;
+  }
+
+  default async event void I2CPacket.writeDone(error_t error, uint16_t addr, 
+						     uint8_t length, uint8_t* data) { 
+    return;
+  }
+
+  async event void I2CSDA.interruptGPIOPin() {}
+  async event void I2CSCL.interruptGPIOPin() {}
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc
new file mode 100644
index 00000000..584da01e
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc
@@ -0,0 +1,56 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * The PXA27x I2C HPL interface. 
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xI2C
+{
+
+  async command uint32_t getIBMR();
+
+  async command void setIDBR(uint32_t val);
+  async command uint32_t getIDBR();
+
+  async command void setICR(uint32_t val);
+  async command uint32_t getICR();
+
+ async command void setISR(uint32_t val);
+  async command uint32_t getISR();
+  
+  async command void setISAR(uint32_t val);
+  async command uint32_t getISAR();
+
+  async event void interruptI2C();
+
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc
new file mode 100644
index 00000000..1b3573f9
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc
@@ -0,0 +1,51 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadona
+ */
+
+configuration HplPXA27xI2CC
+{
+  provides interface HplPXA27xI2C as I2C;
+}
+
+implementation
+{
+  components new HplPXA27xI2CP(0);
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  I2C = HplPXA27xI2CP;
+
+  HplPXA27xI2CP.Init <- PlatformP.InitL1;
+  HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_I2C];
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc
new file mode 100644
index 00000000..d4f6622d
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc
@@ -0,0 +1,166 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * The Private Hpl Interface for the I2C components. Handles enabling of the 
+ * clock for the interface.  It DOES NOT affect the I2C_IUE bit of the ICR
+ * register.
+ * 
+ * @param dev The I2C to use. 0 = Standard I2c, 1 = Power I2C
+ *
+ * @author Phil Buonadonna
+ */
+
+generic module HplPXA27xI2CP(uint8_t dev)
+{
+  provides interface Init;
+  provides interface HplPXA27xI2C as I2C; 
+
+  uses interface HplPXA27xInterrupt as I2CIrq;
+
+}
+
+implementation
+{
+  bool m_fInit = FALSE;
+
+  command error_t Init.init() {
+    bool isInited;
+
+    atomic {
+      isInited = m_fInit;
+      m_fInit = TRUE;
+    }
+
+    if (!isInited) {
+      switch(dev) {
+      case 0:
+	CKEN |= CKEN14_I2C;
+	ICR = 0;
+	break;
+      case 1:
+	CKEN |= CKEN15_PMI2C;
+	PICR = 0;
+	break;
+      default:
+	break;
+      }
+      call I2CIrq.allocate();
+      call I2CIrq.enable();
+    }
+
+    return SUCCESS;
+  }
+
+  async command uint32_t I2C.getIBMR() { 
+    switch(dev) {
+    case 0: return IBMR; break;
+    case 1: return PIBMR; break;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setIDBR(uint32_t val) {
+    switch(dev) {
+    case 0: IDBR = val; break;
+    case 1: PIDBR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getIDBR() { 
+    switch(dev) {
+    case 0: return IDBR; break;
+    case 1: return PIDBR; break;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setICR(uint32_t val) {
+    switch(dev) {
+    case 0: ICR = val; break;
+    case 1: PICR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getICR() { 
+    switch(dev) {
+    case 0: return ICR; break;
+    case 1: return PICR; break;
+    default: return 0;
+    }
+  }
+
+ async command void I2C.setISR(uint32_t val) { 
+    switch(dev) {
+    case 0: ISR = val; break;
+    case 1: PISR = val; break;
+    default: break;
+    }
+  }
+
+ async command uint32_t I2C.getISR() { 
+    switch(dev) {
+    case 0: return ISR; break;
+    case 1: return PISR; break;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setISAR(uint32_t val) {
+    switch(dev) {
+    case 0: ISAR = val; break;
+    case 1: PISAR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getISAR() { 
+    switch(dev) {
+    case 0: return ISAR; break;
+    case 1: return PISAR; break;
+    default: return 0;
+    }
+  }
+
+  async event void I2CIrq.fired() {
+    
+    signal I2C.interruptI2C();
+    return;
+  }
+
+  default async event void I2C.interruptI2C() { 
+    return;
+  }
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc b/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc
new file mode 100644
index 00000000..316da759
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc
@@ -0,0 +1,46 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+configuration HplPXA27xPI2CC
+{
+  provides interface HplPXA27xI2C as I2C;
+}
+
+implementation
+{
+  components new HplPXA27xI2CP(1);
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  I2C = HplPXA27xI2CP;
+
+  HplPXA27xI2CP.Init <- PlatformP.InitL1;
+  HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_PWR_I2C];
+}
diff --git a/tos/chips/pxa27x/inttypes.h b/tos/chips/pxa27x/inttypes.h
new file mode 100644
index 00000000..4b7cc841
--- /dev/null
+++ b/tos/chips/pxa27x/inttypes.h
@@ -0,0 +1,19 @@
+#ifndef __INTTYPES_H_
+#define __INTTYPES_H_
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+
+typedef short int16_t;
+typedef unsigned short uint16_t;
+
+typedef int int32_t;
+typedef unsigned int uint32_t;
+
+typedef long long int64_t;
+typedef unsigned long long uint64_t;
+
+typedef int32_t intptr_t;
+typedef uint32_t uintptr_t;
+
+#endif
diff --git a/tos/chips/pxa27x/pxa27x_registers.h b/tos/chips/pxa27x/pxa27x_registers.h
new file mode 100644
index 00000000..0c2321db
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27x_registers.h
@@ -0,0 +1,1739 @@
+// $Id$ 
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach, Konrad Lorincz
+ * Revised: 09/19/2005
+ */
+
+#ifndef _PXA27X_REGISTER_H
+#define _PXA27X_REGISTER_H
+
+
+#define _PXAREG(_addr)	(*((volatile uint32_t *)(_addr)))
+#define _PXAREG_OFFSET(_addr,_off) (_PXAREG((uint32_t)(_addr) + (uint32_t)(_off)))
+
+					
+/******************************************************************************/
+/* Memory Controller */
+/******************************************************************************/
+#define MDCNFG	_PXAREG(0x48000000) /* SDRAM Configuration register 6-43 */
+#define MDREFR	_PXAREG(0x48000004) /* SDRAM Refresh Control register 6-53 */
+#define MSC0	_PXAREG(0x48000008) /* Static Memory Control register 0 6-63 */
+#define MSC1	_PXAREG(0x4800000C) /* Static Memory Control register 1 6-63 */
+#define MSC2	_PXAREG(0x48000010) /* Static Memory Control register 2 6-63 */
+#define MECR	_PXAREG(0x48000014) /* Expansion Memory (PC Card/CompactFlash) Bus Configuration register 6-79 */
+#define SXCNFG	_PXAREG(0x4800001C) /* Synchronous Static Memory Configuration register 6-58 */
+#define FLYCNFG	_PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */
+#define MCMEM0	_PXAREG(0x48000028) /* PC Card Interface Common Memory Space Socket 0 Timing Configuration register 6-77 */
+#define MCMEM1	_PXAREG(0x4800002C) /* PC Card Interface Common Memory Space Socket 1 Timing Configuration register 6-77 */
+#define MCATT0	_PXAREG(0x48000030) /* PC Card Interface Attribute Space Socket 0 Timing Configuration register 6-77 */
+#define MCATT1	_PXAREG(0x48000034) /* PC Card Interface Attribute Space Socket 1 Timing Configuration register 6-77 */
+#define MCIO0	_PXAREG(0x48000038) /* PC Card Interface I/o Space Socket 0 Timing Configuration register 6-78 */
+#define MCIO1	_PXAREG(0x4800003C) /* PC Card Interface I/o Space Socket 1 Timing Configuration register 6-78 */
+#define MDMRS	_PXAREG(0x48000040) /* SDRAM Mode Register Set Configuration register 6-49 */
+#define BOOT_DEF	_PXAREG(0x48000044) /* Boot Time Default Configuration register 6-75 */
+#define ARB_CNTL	_PXAREG(0x48000048) /* Arbiter Control register 29-2 */
+#define BSCNTR0	_PXAREG(0x4800004C) /* System Memory Buffer Strength Control register 0 6-81 */
+#define BSCNTR1	_PXAREG(0x48000050) /* System Memory Buffer Strength Control register 1 6-82 */
+#define LCDBSCNTR	_PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */
+#define MDMRSLP	_PXAREG(0x48000058) /* Special Low Power SDRAM Mode Register Set Configuration register 6-51 */
+#define BSCNTR2	_PXAREG(0x4800005C) /* System Memory Buffer Strength Control register 2 6-83 */
+#define BSCNTR3	_PXAREG(0x48000060) /* System Memory Buffer Strength Control register 3 6-84 */
+#define SA1110	_PXAREG(0x48000064) /* SA-1110 Compatibility Mode for Static Memory register 6-70 */
+
+/* MDCNFG Bit Defs */
+#define MDCNFG_MDENX		(1 << 31)
+#define MDCNFG_DCACX2		(1 << 30)
+#define MDCNFG_DSA1110_2	(1 << 28)
+#define MDCNFG_DADDR2		(1 << 26)
+#define MDCNFG_DTC2(_x)		(((_x) & 0x3) << 24)
+#define MDCNFG_DNB2		(1 << 23)
+#define MDCNFG_DRAC2(_x)	(((_x) & 0x3) << 21)
+#define MDCNFG_DCAC2(_x)	(((_x) & 0x3) << 19)
+#define MDCNFG_DWID2		(1 << 18)
+#define MDCNFG_DE3		(1 << 17)
+#define MDCNFG_DE2		(1 << 16)
+#define MDCNFG_STACK1		(1 << 15)
+#define MDCNFG_DCACX0		(1 << 14)
+#define MDCNFG_STACK0		(1 << 13)
+#define MDCNFG_DSA1110_0	(1 << 12)
+#define MDCNFG_DADDR0		(1 << 10)
+#define MDCNFG_DTC0(_x)		(((_x) & 0x3) << 8)
+#define MDCNFG_DNB0		(1 << 7)
+#define MDCNFG_DRAC0(_x)	(((_x) & 0x3) << 5)
+#define MDCNFG_DCAC0(_x)	(((_x) & 0x3) << 3)
+#define MDCNFG_DWID0		(1 << 2)
+#define MDCNFG_DE1		(1 << 1)
+#define MDCNFG_DE0		(1 << 0)
+#define MDCNFG_SETALWAYS	((1 << 27) | (1 << 11))
+
+/* MDREFR Bit Defs */
+#define MDREFR_ALTREFA	(1 << 31)	/* */
+#define MDREFR_ALTREFB	(1 << 30)	/* */
+#define MDREFR_K0DB4	(1 << 29)	/* */
+#define MDREFR_K2FREE	(1 << 25)	/* */
+#define MDREFR_K1FREE	(1 << 24)	/* */
+#define MDREFR_K0FREE	(1 << 23)	/* */
+#define MDREFR_SLFRSH	(1 << 22)	/* */
+#define MDREFR_APD	(1 << 20)	/* */
+#define MDREFR_K2DB2	(1 << 19)	/* */
+#define MDREFR_K2RUN	(1 << 18)	/* */
+#define MDREFR_K1DB2	(1 << 17)	/* */
+#define MDREFR_K1RUN	(1 << 16)	/* */
+#define MDREFR_E1PIN	(1 << 15)	/* */
+#define MDREFR_K0DB2	(1 << 14)	/* */
+#define MDREFR_K0RUN	(1 << 13)	/* */
+#define MDREFR_DRI(_x)  ((_x) & 0xfff) /* */
+
+/* MSCx Bit Defs */
+#define MSC_RBUFF135	(1 << 31)		 /* Return Data Buff vs. Streaming  nCS 1,3 or 5 */
+#define MSC_RRR135(_x)	(((_x) & (0x7)) << 28)	/* ROM/SRAM Recovery Time  nCS 1,3 or 5 */
+#define MSC_RDN135(_x)	(((_x) & (0x7)) << 24)	/* ROM Delay Next Access nCS 1,3 or 5 */
+#define MSC_RDF135(_x)	(((_x) & (0x7)) << 20)	/* ROM Delay First Access nCS 1,3 or 5 */
+#define MSC_RBW135	(1 << 19)		/* ROM Bus Width nCS 1,3 or 5 */
+#define MSC_RT135(_x)	(((_x) & (0x7)) << 16)	/* ROM Type  nCS 1,3 or 5 */
+#define MSC_RBUFF024	(1 << 15)		/* Return Data Buff vs. Streaming  nCS 0,2 or 4 */
+#define MSC_RRR024(_x)	(((_x) & (0x7)) << 12)	/* ROM/SRAM Recover Time  nCS 0,2 or 4 */
+#define MSC_RDN024(_x)	(((_x) & (0x7)) << 8)	/* ROM Delay Next Access  nCS 0,2 or 4 */
+#define MSC_RDF024(_x)	(((_x) & (0x7)) << 4)	/* ROM Delay First Access  nCS 0,2 or 4 */
+#define MSC_RBW024	(1 << 3)		/* ROM Bus Width  nCS 0,2 or 4 */
+#define MSC_RT024(_x)	(((_x) & (0x7)) << 0)	/* ROM Type  nCS 0,2 or 4 */
+
+/* SXCNFG Bit defs */
+#define SXCNFG_SXEN0 (1)
+#define SXCNFG_SXEN1 (1<<1)
+#define SXCNFG_SXCL0(_x) (((_x) & 0x7) << 2)
+#define SXCNFG_SXTP0(_x) (((_x) & 0x3) << 12)
+#define SXCNFG_SXCLEXT0 (1<<15)
+
+/* ARB_CNTL Bit defs */
+#define ARB_CNTL_DMA_SLV_PARK (1 << 31) 
+#define ARB_CNTL_CI_PARK (1 << 30) 
+#define ARB_CNTL_EX_MEM_PARK (1 << 29) 
+#define ARB_CNTL_INT_MEM_PARK (1 << 28) 
+#define ARB_CNTL_USB_PARK (1 << 27) 
+#define ARB_CNTL_LCD_PARK (1 << 26) 
+#define ARB_CNTL_DMA_PARK (1 << 25) 
+#define ARB_CNTL_CORE_PARK (1 << 24) 
+#define ARB_CNTL_LOCK_FLAG (1 << 23) 
+#define ARB_CNTL_LCD_WT(_wt) (((_wt) & 0xF) << 8)
+#define ARB_CNTL_DMA_WT(_wt) (((_wt) & 0xF) << 4)
+#define ARB_CNTL_CORE_WT(_wt) (((_wt) & 0xF) << 0)
+
+/* SA1110 Bit defs */
+#define SA1110_SXSTACK(_x) (((_x) & 0x3) << 12)
+/******************************************************************************/
+/* LCD Controller */
+/******************************************************************************/
+#define LCCR0	_PXAREG(0x44000000) /* LCD Controller Control register 0 7-56 */
+#define LCCR1	_PXAREG(0x44000004) /* LCD Controller Control register 1 7-64 */
+#define LCCR2	_PXAREG(0x44000008) /* LCD Controller Control register 2 7-66 */
+#define LCCR3	_PXAREG(0x4400000C) /* LCD Controller Control register 3 7-69 */
+#define LCCR4	_PXAREG(0x44000010) /* LCD Controller Control register 4 7-74 */
+#define LCCR5	_PXAREG(0x44000014) /* LCD Controller Control register 5 7-77 */
+#define FBR0	_PXAREG(0x44000020) /* DMA Channel 0 Frame Branch register 7-101 */
+#define FBR1	_PXAREG(0x44000024) /* DMA Channel 1 Frame Branch register 7-101 */
+#define FBR2	_PXAREG(0x44000028) /* DMA Channel 2 Frame Branch register 7-101 */
+#define FBR3	_PXAREG(0x4400002C) /* DMA Channel 3 Frame Branch register 7-101 */
+#define FBR4	_PXAREG(0x44000030) /* DMA Channel 4 Frame Branch register 7-101 */
+#define LCSR1	_PXAREG(0x44000034) /* LCD Controller Status register 1 7-109 */
+#define LCSR0	_PXAREG(0x44000038) /* LCD Controller Status register 0 7-104 */
+#define LIIDR	_PXAREG(0x4400003C) /* LCD Controller Interrupt ID register 7-116 */
+#define TRGBR	_PXAREG(0x44000040) /* TMED RGB Seed register 7-97 */
+#define TCR	_PXAREG(0x44000044) /* TMED Control register 7-98 */
+#define OVL1C1	_PXAREG(0x44000050) /* Overlay 1 Control register 1 7-90 */
+#define OVL1C2	_PXAREG(0x44000060) /* Overlay 1 Control register 2 7-91 */
+#define OVL2C1	_PXAREG(0x44000070) /* Overlay 2 Control register 1 7-92 */
+#define OVL2C2	_PXAREG(0x44000080) /* Overlay 2 Control register 2 7-94 */
+#define CCR	_PXAREG(0x44000090) /* Cursor Control register 7-95 */
+#define CMDCR	_PXAREG(0x44000100) /* Command Control register 7-96 */
+#define PRSR	_PXAREG(0x44000104) /* Panel Read Status register 7-103 */
+#define FBR5	_PXAREG(0x44000110) /* DMA Channel 5 Frame Branch register 7-101 */
+#define FBR6	_PXAREG(0x44000114) /* DMA Channel 6 Frame Branch register 7-101 */
+#define FDADR0	_PXAREG(0x44000200) /* DMA Channel 0 Frame Descriptor Address register 7-100 */
+#define FSADR0	_PXAREG(0x44000204) /* DMA Channel 0 Frame Source Address register 7-117 */
+#define FIDR0	_PXAREG(0x44000208) /* DMA Channel 0 Frame ID register 7-117 */
+#define LDCMD0	_PXAREG(0x4400020C) /* LCD DMA Channel 0 Command register 7-118 */
+#define FDADR1	_PXAREG(0x44000210) /* DMA Channel 1 Frame Descriptor Address register 7-100 */
+#define FSADR1	_PXAREG(0x44000214) /* DMA Channel 1 Frame Source Address register 7-117 */
+#define FIDR1	_PXAREG(0x44000218) /* DMA Channel 1 Frame ID register 7-117 */
+#define LDCMD1	_PXAREG(0x4400021C) /* LCD DMA Channel 1 Command register 7-118 */
+#define FDADR2	_PXAREG(0x44000220) /* DMA Channel 2 Frame Descriptor Address register 7-100 */
+#define FSADR2	_PXAREG(0x44000224) /* DMA Channel 2 Frame Source Address register 7-117 */
+#define FIDR2	_PXAREG(0x44000228) /* DMA Channel 2 Frame ID register 7-117 */
+#define LDCMD2	_PXAREG(0x4400022C) /* LCD DMA Channel 2 Command register 7-118 */
+#define FDADR3	_PXAREG(0x44000230) /* DMA Channel 3 Frame Descriptor Address register 7-100 */
+#define FSADR3	_PXAREG(0x44000234) /* DMA Channel 3 Frame Source Address register 7-117 */
+#define FIDR3	_PXAREG(0x44000238) /* DMA Channel 3 Frame ID register 7-117 */
+#define LDCMD3	_PXAREG(0x4400023C) /* LCD DMA Channel 3 Command register 7-118 */
+#define FDADR4	_PXAREG(0x44000240) /* DMA Channel 4 Frame Descriptor Address register 7-100 */
+#define FSADR4	_PXAREG(0x44000244) /* DMA Channel 4 Frame Source Address register 7-117 */
+#define FIDR4	_PXAREG(0x44000248) /* DMA Channel 4 Frame ID register 7-117 */
+#define LDCMD4	_PXAREG(0x4400024C) /* LCD DMA Channel 4 Command register 7-118 */
+#define FDADR5	_PXAREG(0x44000250) /* DMA Channel 5 Frame Descriptor Address register 7-100 */
+#define FSADR5	_PXAREG(0x44000254) /* DMA Channel 5 Frame Source Address register 7-117 */
+#define FIDR5	_PXAREG(0x44000258) /* DMA Channel 5 Frame ID register 7-117 */
+#define LDCMD5	_PXAREG(0x4400025C) /* LCD DMA Channel 5 Command register 7-118 */
+#define FDADR6	_PXAREG(0x44000260) /* DMA Channel 6 Frame Descriptor Address register 7-100 */
+#define FSADR6	_PXAREG(0x44000264) /* DMA Channel 6 Frame Source Address register 7-117 */
+#define FIDR6	_PXAREG(0x44000268) /* DMA Channel 6 Frame ID register 7-117 */
+#define LDCMD6	_PXAREG(0x4400026C) /* LCD DMA Channel 6 Command register 7-118 */
+#define LCDBSCNTR	_PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */
+
+
+/******************************************************************************/
+/* USB Host Controller */
+/******************************************************************************/
+#define UHCREV	_PXAREG(0x4C000000) /* UHC HCI Spec Revision register 20-10 */
+#define UHCHCON	_PXAREG(0x4C000004) /* UHC Host Control register 20-10 */
+#define UHCCOMS	_PXAREG(0x4C000008) /* UHC Command Status register 20-14 */
+#define UHCINTS	_PXAREG(0x4C00000C) /* UHC Interrupt Status register 20-16 */
+#define UHCINTE	_PXAREG(0x4C000010) /* UHC Interrupt Enable register 20-18 */
+#define UHCINTD	_PXAREG(0x4C000014) /* UHC Interrupt Disable register 20-20 */
+#define UHCHCCA	_PXAREG(0x4C000018) /* UHC Host Controller Communication Area register 20-21 */
+#define UHCPCED	_PXAREG(0x4C00001C) /* UHC Period Current Endpoint Descriptor register 20-21 */
+#define UHCCHED	_PXAREG(0x4C000020) /* UHC Control Head Endpoint Descriptor register 20-22 */
+#define UHCCCED	_PXAREG(0x4C000024) /* UHC Control Current Endpoint Descriptor register 20-22 */
+#define UHCBHED	_PXAREG(0x4C000028) /* UHC Bulk Head Endpoint Descriptor register 20-23 */
+#define UHCBCED	_PXAREG(0x4C00002C) /* UHC Bulk Current Endpoint Descriptor register 20-24 */
+#define UHCDHEAD	_PXAREG(0x4C000030) /* UHC Done Head register 20-25 */
+#define UHCFMI	_PXAREG(0x4C000034) /* UHC Frame Interval register 20-26 */
+#define UHCFMR	_PXAREG(0x4C000038) /* UHC Frame Remaining register 20-27 */
+#define UHCFMN	_PXAREG(0x4C00003C) /* UHC Frame Number register 20-28 */
+#define UHCPERS	_PXAREG(0x4C000040) /* UHC Periodic Start register 20-29 */
+#define UHCLST	_PXAREG(0x4C000044) /* UHC Low-Speed Threshold register 20-30 */
+#define UHCRHDA	_PXAREG(0x4C000048) /* UHC Root Hub Descriptor A register 20-31 */
+#define UHCRHDB	_PXAREG(0x4C00004C) /* UHC Root Hub Descriptor B register 20-33 */
+#define UHCRHS	_PXAREG(0x4C000050) /* UHC Root Hub Status register 20-34 */
+#define UHCRHPS1	_PXAREG(0x4C000054) /* UHC Root Hub Port 1 Status register 20-35 */
+#define UHCRHPS2	_PXAREG(0x4C000058) /* UHC Root Hub Port 2 Status register 20-35 */
+#define UHCRHPS3	_PXAREG(0x4C00005C) /* UHC Root Hub Port 3 Status register 20-35 */
+#define UHCSTAT	_PXAREG(0x4C000060) /* UHC Status register 20-39 */
+#define UHCHR	_PXAREG(0x4C000064) /* UHC Reset register 20-41 */
+#define UHCHIE	_PXAREG(0x4C000068) /* UHC Interrupt Enable register 20-44 */
+#define UHCHIT	_PXAREG(0x4C00006C) /* UHC Interrupt Test register 20-45 */
+
+
+/******************************************************************************/
+/* Quick Capture Interface */
+/******************************************************************************/
+#define CICR0	_PXAREG(0x50000000) /* Quick Capture Interface Control register 0 27-24 */
+#define CICR1	_PXAREG(0x50000004) /* Quick Capture Interface Control register 1 27-28 */
+#define CICR2	_PXAREG(0x50000008) /* Quick Capture Interface Control register 2 27-32 */
+#define CICR3	_PXAREG(0x5000000C) /* Quick Capture Interface Control register 3 27-33 */
+#define CICR4	_PXAREG(0x50000010) /* Quick Capture Interface Control register 4 27-34 */
+#define CISR	_PXAREG(0x50000014) /* Quick Capture Interface Status register 27-37 */
+#define CIFR	_PXAREG(0x50000018) /* Quick Capture Interface FIFO Control register 27-40 */
+#define CITOR	_PXAREG(0x5000001C) /* Quick Capture Interface Time-Out register 27-37 */
+#define CIBR0	_PXAREG(0x50000028) /* Quick Capture Interface Receive Buffer register 0 (Channel 0) 27-42 */
+#define CIBR1	_PXAREG(0x50000030) /* Quick Capture Interface Receive Buffer register 1 (Channel 1) 27-42 */
+#define CIBR2	_PXAREG(0x50000038) /* Quick Capture Interface Receive Buffer register 2 (Channel 2) 27-42 */
+
+
+/* Quick Capture Interface - Control Register 0 */
+#define CICR0_DMA_EN    (1 << 31)	/* DMA Request Enable */
+#define CICR0_EN        (1 << 28)	/* Quick Capture Interface Enable (and Quick Disable) */
+#define CICR0_TOM       (1 << 9)	/* Time-Out Interrupt Mask */
+#define CICR0_RDAVM     (1 << 8)	/* Receive-Data-Available Interrupt Mask */
+#define CICR0_FEM       (1 << 7)	/* FIFO-Empty Interrupt Mask */
+#define CICR0_EOLM      (1 << 6)	/* End-of-Line Interrupt Mask */
+#define CICR0_SOFM      (1 << 2)	/* Start-of-Frame Interrupt Mask */
+#define CICR0_EOFM      (1 << 1)	/* End-of-Frame Interrupt Mask */
+#define CICR0_FOM       (1 << 0)	/* FIFO Overrun Interrupt Mask */
+
+
+/* Quick Capture Interface - Control Register 1 */
+#define CICR1_TBIT      (1 << 31)   /* Transparency Bit */
+#define CICR1_RGBT_CONV(_data,_x)   ((_data & ~(0x7 << 29)) | (_x << 29))       /* RGBT Conversion */
+#define CICR1_PPL(_data,_x)         ((_data & ~(0x7ff << 15)) | (_x << 15))     /* Pixels per Line */
+#define CICR1_RGB_CONV(_data,_x)    ((_data & ~(0x7 << 12)) | (_x << 12))       /* RGB Bits per Pixel Conversion */
+#define CICR1_RGB_F     (1 << 11)   /* RGB Format */
+#define CICR1_YCBCR_F   (1 << 10)   /* YCbCr Format */
+#define CICR1_RGB_BPP(_data,_x)     ((_data & ~(0x7 << 7)) | (_x << 7))         /* RGB Bits per Pixel */
+#define CICR1_RAW_BPP(_data,_x)     ((_data & ~(0x3 << 5)) | (_x << 5))         /* Raw Bits per Pixel */
+#define CICR1_COLOR_SP(_data,_x)    ((_data & ~(0x3 << 3)) | (_x << 3))         /* Color Space */
+#define CICR1_DW(_data,_x)          ((_data & ~(0x7 << 0)) | (_x << 0))         /* Data Width */
+
+
+/* Quick Capture Interface - Control Register 3 */
+#define CICR3_LPF(_data,_x)	        ((_data & ~(0x7ff << 0)) | (_x << 0))       /* Lines per Frame */
+                                               
+/* Quick Capture Interface - Control Register 4 */
+#define CICR4_PCLK_EN   (1 << 23)   /* Pixel Clock Enable */
+#define CICR4_HSP       (1 << 21)	/* Horizontal Sync Polarity */
+#define CICR4_VSP       (1 << 20)	/* Vertical Sync Polarity */
+#define CICR4_MCLK_EN   (1 << 19)	/* MCLK Enable */
+#define CICR4_DIV(_data,_x)         ((_data & ~(0xff << 0)) | (_x << 0))        /* Clock Divisor */
+
+/* Quick Capture Interface - Status Register */
+#define CISR_FTO        (1 << 15)	/* FIFO Time-Out */
+#define CISR_RDAV_2     (1 << 14)	/* Channel 2 Receive Data Available */
+#define CISR_RDAV_1     (1 << 13)	/* Channel 1 Receive Data Available */
+#define CISR_RDAV_0     (1 << 12)	/* Channel 0 Receive Data Available */
+#define CISR_FEMPTY_2   (1 << 11)	/* Channel 2 FIFO Empty */
+#define CISR_FEMPTY_1   (1 << 10)	/* Channel 1 FIFO Empty */
+#define CISR_FEMPTY_0   (1 << 9)	/* Channel 0 FIFO Empty */
+#define CISR_EOL        (1 << 8)	/* End-of-Line */
+#define CISR_PAR_ERR    (1 << 7)	/* Parity Error */
+#define CISR_CQD        (1 << 6)	/* Quick Campture Interface Quick Dissable */
+#define CISR_CDD        (1 << 5)	/* Quick Campture Interface Quick Dissable Done */
+#define CISR_SOF        (1 << 4)	/* Start-of-Frame */
+#define CISR_EOF        (1 << 3)	/* End-of-Frame */
+#define CISR_IFO_2      (1 << 2)	/* FIFO Overrun for Channel 2 */
+#define CISR_IFO_1      (1 << 1)	/* FIFO Overrun for Channel 1 */
+#define CISR_IFO_0      (1 << 0)	/* FIFO Overrun for Channel 0 */
+
+
+/* Quick Capture Interface - FIFO Control Register */
+#define CIFR_FLVL0(_data,_x)        ((_data & ~(0xff << 8)) | (_x << 8))        /* FIFO 0 Level: value from 0-128 indicates the number of bytes */
+#define CIFR_THL_0(_data,_x)        ((_data & ~(0x3 << 4)) | (_x << 4))         /* Threshold Level for Channel 0 FIFO */
+#define CIFR_RESETF     (1 << 3)	/* Reset input FIFOs */
+
+
+
+
+/******************************************************************************/
+/* DMA Controller */
+/******************************************************************************/
+#define DCSR0	_PXAREG(0x40000000) /* DMA Control/Status register for Channel 0 5-41 */
+#define DCSR1	_PXAREG(0x40000004) /* DMA Control/Status register for Channel 1 5-41 */
+#define DCSR2	_PXAREG(0x40000008) /* DMA Control/Status register for Channel 2 5-41 */
+#define DCSR3	_PXAREG(0x4000000C) /* DMA Control/Status register for Channel 3 5-41 */
+#define DCSR4	_PXAREG(0x40000010) /* DMA Control/Status register for Channel 4 5-41 */
+#define DCSR5	_PXAREG(0x40000014) /* DMA Control/Status register for Channel 5 5-41 */
+#define DCSR6	_PXAREG(0x40000018) /* DMA Control/Status register for Channel 6 5-41 */
+#define DCSR7	_PXAREG(0x4000001C) /* DMA Control/Status register for Channel 7 5-41 */
+#define DCSR8	_PXAREG(0x40000020) /* DMA Control/Status register for Channel 8 5-41 */
+#define DCSR9	_PXAREG(0x40000024) /* DMA Control/Status register for Channel 9 5-41 */
+#define DCSR10	_PXAREG(0x40000028) /* DMA Control/Status register for Channel 10 5-41 */
+#define DCSR11	_PXAREG(0x4000002C) /* DMA Control/Status register for Channel 11 5-41 */
+#define DCSR12	_PXAREG(0x40000030) /* DMA Control/Status register for Channel 12 5-41 */
+#define DCSR13	_PXAREG(0x40000034) /* DMA Control/Status register for Channel 13 5-41 */
+#define DCSR14	_PXAREG(0x40000038) /* DMA Control/Status register for Channel 14 5-41 */
+#define DCSR15	_PXAREG(0x4000003C) /* DMA Control/Status register for Channel 15 5-41 */
+#define DCSR16	_PXAREG(0x40000040) /* DMA Control/Status register for Channel 16 5-41 */
+#define DCSR17	_PXAREG(0x40000044) /* DMA Control/Status register for Channel 17 5-41 */
+#define DCSR18	_PXAREG(0x40000048) /* DMA Control/Status register for Channel 18 5-41 */
+#define DCSR19	_PXAREG(0x4000004C) /* DMA Control/Status register for Channel 19 5-41 */
+#define DCSR20	_PXAREG(0x40000050) /* DMA Control/Status register for Channel 20 5-41 */
+#define DCSR21	_PXAREG(0x40000054) /* DMA Control/Status register for Channel 21 5-41 */
+#define DCSR22	_PXAREG(0x40000058) /* DMA Control/Status register for Channel 22 5-41 */
+#define DCSR23	_PXAREG(0x4000005C) /* DMA Control/Status register for Channel 23 5-41 */
+#define DCSR24	_PXAREG(0x40000060) /* DMA Control/Status register for Channel 24 5-41 */
+#define DCSR25	_PXAREG(0x40000064) /* DMA Control/Status register for Channel 25 5-41 */
+#define DCSR26	_PXAREG(0x40000068) /* DMA Control/Status register for Channel 26 5-41 */
+#define DCSR27	_PXAREG(0x4000006C) /* DMA Control/Status register for Channel 27 5-41 */
+#define DCSR28	_PXAREG(0x40000070) /* DMA Control/Status register for Channel 28 5-41 */
+#define DCSR29	_PXAREG(0x40000074) /* DMA Control/Status register for Channel 29 5-41 */
+#define DCSR30	_PXAREG(0x40000078) /* DMA Control/Status register for Channel 30 5-41 */
+#define DCSR31	_PXAREG(0x4000007C) /* DMA Control/Status register for Channel 31 5-41 */
+
+#define DALGN	_PXAREG(0x400000A0) /* DMA Alignment register 5-49 */
+#define DPCSR	_PXAREG(0x400000A4) /* DMA Programmed I/O Control Status register 5-51 */
+
+#define DRQSR0	_PXAREG(0x400000E0) /* DMA DREQ<0> Status register 5-40 */
+#define DRQSR1	_PXAREG(0x400000E4) /* DMA DREQ<1> Status register 5-40 */
+#define DRQSR2	_PXAREG(0x400000E8) /* DMA DREQ<2> Status register 5-40 */
+
+#define DINT	_PXAREG(0x400000F0) /* DMA Interrupt register 5-48 */
+
+#define DRCMR0	_PXAREG(0x40000100) /* Request to Channel Map register for DREQ<0> (companion chip request 0) 5-31 */
+#define DRCMR1	_PXAREG(0x40000104) /* Request to Channel Map register for DREQ<1> (companion chip request 1) 5-31 */
+#define DRCMR2	_PXAREG(0x40000108) /* Request to Channel Map register for I2S receive request 5-31 */
+#define DRCMR3	_PXAREG(0x4000010C) /* Request to Channel Map register for I2S transmit request 5-31 */
+#define DRCMR4	_PXAREG(0x40000110) /* Request to Channel Map register for BTUART receive request 5-31 */
+#define DRCMR5	_PXAREG(0x40000114) /* Request to Channel Map register for BTUART transmit request. 5-31 */
+#define DRCMR6	_PXAREG(0x40000118) /* Request to Channel Map register for FFUART receive request 5-31 */
+#define DRCMR7	_PXAREG(0x4000011C) /* Request to Channel Map register for FFUART transmit request 5-31 */
+#define DRCMR8	_PXAREG(0x40000120) /* Request to Channel Map register for AC 97 microphone request 5-31 */
+#define DRCMR9	_PXAREG(0x40000124) /* Request to Channel Map register for AC 97 modem receive request 5-31 */
+#define DRCMR10	_PXAREG(0x40000128) /* Request to Channel Map register for AC 97 modem transmit request 5-31 */
+#define DRCMR11	_PXAREG(0x4000012C) /* Request to Channel Map register for AC 97 audio receive request 5-31 */
+#define DRCMR12	_PXAREG(0x40000130) /* Request to Channel Map register for AC 97 audio transmit request 5-31 */
+#define DRCMR13	_PXAREG(0x40000134) /* Request to Channel Map register for SSP1 receive request 5-31 */
+#define DRCMR14	_PXAREG(0x40000138) /* Request to Channel Map register for SSP1 transmit request 5-31 */
+#define DRCMR15	_PXAREG(0x4000013C) /* Request to Channel Map register for SSP2 receive request 5-31 */
+#define DRCMR16	_PXAREG(0x40000140) /* Request to Channel Map register for SSP2 transmit request 5-31 */
+#define DRCMR17	_PXAREG(0x40000144) /* Request to Channel Map register for ICP receive request 5-31 */
+#define DRCMR18	_PXAREG(0x40000148) /* Request to Channel Map register for ICP transmit request 5-31 */
+#define DRCMR19	_PXAREG(0x4000014C) /* Request to Channel Map register for STUART receive request 5-31 */
+#define DRCMR20	_PXAREG(0x40000150) /* Request to Channel Map register for STUART transmit request 5-31 */
+#define DRCMR21	_PXAREG(0x40000154) /* Request to Channel Map register for MMC/SDIO receive request 5-31 */
+#define DRCMR22	_PXAREG(0x40000158) /* Request to Channel Map register for MMC/SDIO transmit request 5-31 */
+#define DRCMR24	_PXAREG(0x40000160) /* Request to Channel Map register for USB endpoint 0 request 5-31 */
+#define DRCMR25	_PXAREG(0x40000164) /* Request to Channel Map register for USB endpoint A request 5-31 */
+#define DRCMR26	_PXAREG(0x40000168) /* Request to Channel Map register for USB endpoint B request 5-31 */
+#define DRCMR27	_PXAREG(0x4000016C) /* Request to Channel Map register for USB endpoint C request 5-31 */
+#define DRCMR28	_PXAREG(0x40000170) /* Request to Channel Map register for USB endpoint D request 5-31 */
+#define DRCMR29	_PXAREG(0x40000174) /* Request to Channel Map register for USB endpoint E request 5-31 */
+#define DRCMR30	_PXAREG(0x40000178) /* Request to Channel Map register for USB endpoint F request 5-31 */
+#define DRCMR31	_PXAREG(0x4000017C) /* Request to Channel Map register for USB endpoint G request 5-31 */
+#define DRCMR32	_PXAREG(0x40000180) /* Request to Channel Map register for USB endpoint H request 5-31 */
+#define DRCMR33	_PXAREG(0x40000184) /* Request to Channel Map register for USB endpoint I request 5-31 */
+#define DRCMR34	_PXAREG(0x40000188) /* Request to Channel Map register for USB endpoint J request 5-31 */
+#define DRCMR35	_PXAREG(0x4000018C) /* Request to Channel Map register for USB endpoint K request 5-31 */
+#define DRCMR36	_PXAREG(0x40000190) /* Request to Channel Map register for USB endpoint L request 5-31 */
+#define DRCMR37	_PXAREG(0x40000194) /* Request to Channel Map register for USB endpoint M request 5-31 */
+#define DRCMR38	_PXAREG(0x40000198) /* Request to Channel Map register for USB endpoint N request 5-31 */
+#define DRCMR39	_PXAREG(0x4000019C) /* Request to Channel Map register for USB endpoint P request 5-31 */
+#define DRCMR40	_PXAREG(0x400001A0) /* Request to Channel Map register for USB endpoint Q request 5-31 */
+#define DRCMR41	_PXAREG(0x400001A4) /* Request to Channel Map register for USB endpoint R request 5-31 */
+#define DRCMR42	_PXAREG(0x400001A8) /* Request to Channel Map register for USB endpoint S request 5-31 */
+#define DRCMR43	_PXAREG(0x400001AC) /* Request to Channel Map register for USB endpoint T request 5-31 */
+#define DRCMR44	_PXAREG(0x400001B0) /* Request to Channel Map register for USB endpoint U request 5-31 */
+#define DRCMR45	_PXAREG(0x400001B4) /* Request to Channel Map register for USB endpoint V request 5-31 */
+#define DRCMR46	_PXAREG(0x400001B8) /* Request to Channel Map register for USB endpoint W request 5-31 */
+#define DRCMR47	_PXAREG(0x400001BC) /* Request to Channel Map register for USB endpoint X request 5-31 */
+#define DRCMR48	_PXAREG(0x400001C0) /* Request to Channel Map register for MSL receive request 1 5-31 */
+#define DRCMR49	_PXAREG(0x400001C4) /* Request to Channel Map register for MSL transmit request 1 5-31 */
+#define DRCMR50	_PXAREG(0x400001C8) /* Request to Channel Map register for MSL receive request 2 5-31 */
+#define DRCMR51	_PXAREG(0x400001CC) /* Request to Channel Map register for MSL transmit request 2 5-31 */
+#define DRCMR52	_PXAREG(0x400001D0) /* Request to Channel Map register for MSL receive request 3 5-31 */
+#define DRCMR53	_PXAREG(0x400001D4) /* Request to Channel Map register for MSL transmit request 3 5-31 */
+#define DRCMR54	_PXAREG(0x400001D8) /* Request to Channel Map register for MSL receive request 4 5-31 */
+#define DRCMR55	_PXAREG(0x400001DC) /* Request to Channel Map register for MSL transmit request 4 5-31 */
+#define DRCMR56	_PXAREG(0x400001E0) /* Request to Channel Map register for MSL receive request 5 5-31 */
+#define DRCMR57	_PXAREG(0x400001E4) /* Request to Channel Map register for MSL transmit request 5 5-31 */
+#define DRCMR58	_PXAREG(0x400001E8) /* Request to Channel Map register for MSL receive request 6 5-31 */
+#define DRCMR59	_PXAREG(0x400001EC) /* Request to Channel Map register for MSL transmit request 6 5-31 */
+#define DRCMR60	_PXAREG(0x400001F0) /* Request to Channel Map register for MSL receive request 7 5-31 */
+#define DRCMR61	_PXAREG(0x400001F4) /* Request to Channel Map register for MSL transmit request 7 5-31 */
+#define DRCMR62	_PXAREG(0x400001F8) /* Request to Channel Map register for USIM receive request 5-31 */
+#define DRCMR63	_PXAREG(0x400001FC) /* Request to Channel Map register for USIM transmit request 5-31 */
+
+#define DDADR0	_PXAREG(0x40000200) /* DMA Descriptor Address register for Channel 0 5-32 */
+#define DSADR0	_PXAREG(0x40000204) /* DMA Source Address register for Channel 0 5-33 */
+#define DTADR0	_PXAREG(0x40000208) /* DMA Target Address register for Channel 0 5-34 */
+#define DCMD0	_PXAREG(0x4000020C) /* DMA Command Address register for Channel 0 5-35 */
+#define DDADR1	_PXAREG(0x40000210) /* DMA Descriptor Address register for Channel 1 5-32 */
+#define DSADR1	_PXAREG(0x40000214) /* DMA Source Address register for Channel 1 5-33 */
+#define DTADR1	_PXAREG(0x40000218) /* DMA Target Address register for Channel 1 5-34 */
+#define DCMD1	_PXAREG(0x4000021C) /* DMA Command Address register for Channel 1 5-35 */
+#define DDADR2	_PXAREG(0x40000220) /* DMA Descriptor Address register for Channel 2 5-32 */
+#define DSADR2	_PXAREG(0x40000224) /* DMA Source Address register for Channel 2 5-33 */
+#define DTADR2	_PXAREG(0x40000228) /* DMA Target Address register for Channel 2 5-34 */
+#define DCMD2	_PXAREG(0x4000022C) /* DMA Command Address register for Channel 2 5-35 */
+#define DDADR3	_PXAREG(0x40000230) /* DMA Descriptor Address register for Channel 3 5-32 */
+#define DSADR3	_PXAREG(0x40000234) /* DMA Source Address register for Channel 3 5-33 */
+#define DTADR3	_PXAREG(0x40000238) /* DMA Target Address register for Channel 3 5-34 */
+#define DCMD3	_PXAREG(0x4000023C) /* DMA Command Address register for Channel 3 5-35 */
+#define DDADR4	_PXAREG(0x40000240) /* DMA Descriptor Address register for Channel 4 5-32 */
+#define DSADR4	_PXAREG(0x40000244) /* DMA Source Address register for Channel 4 5-33 */
+#define DTADR4	_PXAREG(0x40000248) /* DMA Target Address register for Channel 4 5-34 */
+#define DCMD4	_PXAREG(0x4000024C) /* DMA Command Address register for Channel 4 5-35 */
+#define DDADR5	_PXAREG(0x40000250) /* DMA Descriptor Address register for Channel 5 5-32 */
+#define DSADR5	_PXAREG(0x40000254) /* DMA Source Address register for Channel 5 5-33 */
+#define DTADR5	_PXAREG(0x40000258) /* DMA Target Address register for Channel 5 5-34 */
+#define DCMD5	_PXAREG(0x4000025C) /* DMA Command Address register for Channel 5 5-35 */
+#define DDADR6	_PXAREG(0x40000260) /* DMA Descriptor Address register for Channel 6 5-32 */
+#define DSADR6	_PXAREG(0x40000264) /* DMA Source Address register for Channel 6 5-33 */
+#define DTADR6	_PXAREG(0x40000268) /* DMA Target Address register for Channel 6 5-34 */
+#define DCMD6	_PXAREG(0x4000026C) /* DMA Command Address register for Channel 6 5-35 */
+#define DDADR7	_PXAREG(0x40000270) /* DMA Descriptor Address register for Channel 7 5-32 */
+#define DSADR7	_PXAREG(0x40000274) /* DMA Source Address register for Channel 7 5-33 */
+#define DTADR7	_PXAREG(0x40000278) /* DMA Target Address register for Channel 7 5-34 */
+#define DCMD7	_PXAREG(0x4000027C) /* DMA Command Address register for Channel 7 5-35 */
+#define DDADR8	_PXAREG(0x40000280) /* DMA Descriptor Address register for Channel 8 5-32 */
+#define DSADR8	_PXAREG(0x40000284) /* DMA Source Address register for Channel 8 5-33 */
+#define DTADR8	_PXAREG(0x40000288) /* DMA Target Address register for Channel 8 5-34 */
+#define DCMD8	_PXAREG(0x4000028C) /* DMA Command Address register for Channel 8 5-35 */
+#define DDADR9	_PXAREG(0x40000290) /* DMA Descriptor Address register for Channel 9 5-32 */
+#define DSADR9	_PXAREG(0x40000294) /* DMA Source Address register for Channel 9 5-33 */
+#define DTADR9	_PXAREG(0x40000298) /* DMA Target Address register for Channel 9 5-34 */
+#define DCMD9	_PXAREG(0x4000029C) /* DMA Command Address register for Channel 9 5-35 */
+#define DDADR10	_PXAREG(0x400002A0) /* DMA Descriptor Address register for Channel 10 5-32 */
+#define DSADR10	_PXAREG(0x400002A4) /* DMA Source Address register for Channel 10 5-33 */
+#define DTADR10	_PXAREG(0x400002A8) /* DMA Target Address register for Channel 10 5-34 */
+#define DCMD10	_PXAREG(0x400002AC) /* DMA Command Address register for Channel 10 5-35 */
+#define DDADR11	_PXAREG(0x400002B0) /* DMA Descriptor Address register for Channel 11 5-32 */
+#define DSADR11	_PXAREG(0x400002B4) /* DMA Source Address register for Channel 11 5-33 */
+#define DTADR11	_PXAREG(0x400002B8) /* DMA Target Address register for Channel 11 5-34 */
+#define DCMD11	_PXAREG(0x400002BC) /* DMA Command Address register for Channel 11 5-35 */
+#define DDADR12	_PXAREG(0x400002C0) /* DMA Descriptor Address register for Channel 12 5-32 */
+#define DSADR12	_PXAREG(0x400002C4) /* DMA Source Address register for Channel 12 5-33 */
+#define DTADR12	_PXAREG(0x400002C8) /* DMA Target Address register for Channel 12 5-34 */
+#define DCMD12	_PXAREG(0x400002CC) /* DMA Command Address register for Channel 12 5-35 */
+#define DDADR13	_PXAREG(0x400002D0) /* DMA Descriptor Address register for Channel 13 5-32 */
+#define DSADR13	_PXAREG(0x400002D4) /* DMA Source Address register for Channel 13 5-33 */
+#define DTADR13	_PXAREG(0x400002D8) /* DMA Target Address register for Channel 13 5-34 */
+#define DCMD13	_PXAREG(0x400002DC) /* DMA Command Address register for Channel 13 5-35 */
+#define DDADR14	_PXAREG(0x400002E0) /* DMA Descriptor Address register for Channel 14 5-32 */
+#define DSADR14	_PXAREG(0x400002E4) /* DMA Source Address register for Channel 14 5-33 */
+#define DTADR14	_PXAREG(0x400002E8) /* DMA Target Address register for Channel 14 5-34 */
+#define DCMD14	_PXAREG(0x400002EC) /* DMA Command Address register for Channel 14 5-35 */
+#define DDADR15	_PXAREG(0x400002F0) /* DMA Descriptor Address register for Channel 15 5-32 */
+#define DSADR15	_PXAREG(0x400002F4) /* DMA Source Address register for Channel 15 5-33 */
+#define DTADR15	_PXAREG(0x400002F8) /* DMA Target Address register for Channel 15 5-34 */
+#define DCMD15	_PXAREG(0x400002FC) /* DMA Command Address register for Channel 15 5-35 */
+#define DDADR16	_PXAREG(0x40000300) /* DMA Descriptor Address register for Channel 16 5-32 */
+#define DSADR16	_PXAREG(0x40000304) /* DMA Source Address register for Channel 16 5-33 */
+#define DTADR16	_PXAREG(0x40000308) /* DMA Target Address register for Channel 16 5-34 */
+#define DCMD16	_PXAREG(0x4000030C) /* DMA Command Address register for Channel 16 5-35 */
+#define DDADR17	_PXAREG(0x40000310) /* DMA Descriptor Address register for Channel 17 5-32 */
+#define DSADR17	_PXAREG(0x40000314) /* DMA Source Address register for Channel 17 5-33 */
+#define DTADR17	_PXAREG(0x40000318) /* DMA Target Address register for Channel 17 5-34 */
+#define DCMD17	_PXAREG(0x4000031C) /* DMA Command Address register for Channel 17 5-35 */
+#define DDADR18	_PXAREG(0x40000320) /* DMA Descriptor Address register for Channel 18 5-32 */
+#define DSADR18	_PXAREG(0x40000324) /* DMA Source Address register for Channel 18 5-33 */
+#define DTADR18	_PXAREG(0x40000328) /* DMA Target Address register for Channel 18 5-34 */
+#define DCMD18	_PXAREG(0x4000032C) /* DMA Command Address register for Channel 18 5-35 */
+#define DDADR19	_PXAREG(0x40000330) /* DMA Descriptor Address register for Channel 19 5-32 */
+#define DSADR19	_PXAREG(0x40000334) /* DMA Source Address register for Channel 19 5-33 */
+#define DTADR19	_PXAREG(0x40000338) /* DMA Target Address register for Channel 19 5-34 */
+#define DCMD19	_PXAREG(0x4000033C) /* DMA Command Address register for Channel 19 5-35 */
+#define DDADR20	_PXAREG(0x40000340) /* DMA Descriptor Address register for Channel 20 5-32 */
+#define DSADR20	_PXAREG(0x40000344) /* DMA Source Address register for Channel 20 5-33 */
+#define DTADR20	_PXAREG(0x40000348) /* DMA Target Address register for Channel 20 5-34 */
+#define DCMD20	_PXAREG(0x4000034C) /* DMA Command Address register for Channel 20 5-35 */
+#define DDADR21	_PXAREG(0x40000350) /* DMA Descriptor Address register for Channel 21 5-32 */
+#define DSADR21	_PXAREG(0x40000354) /* DMA Source Address register for Channel 21 5-33 */
+#define DTADR21	_PXAREG(0x40000358) /* DMA Target Address register for Channel 21 5-34 */
+#define DCMD21	_PXAREG(0x4000035C) /* DMA Command Address register for Channel 21 5-35 */
+#define DDADR22	_PXAREG(0x40000360) /* DMA Descriptor Address register for Channel 22 5-32 */
+#define DSADR22	_PXAREG(0x40000364) /* DMA Source Address register for Channel 22 5-33 */
+#define DTADR22	_PXAREG(0x40000368) /* DMA Target Address register for Channel 22 5-34 */
+#define DCMD22	_PXAREG(0x4000036C) /* DMA Command Address register for Channel 22 5-35 */
+#define DDADR23	_PXAREG(0x40000370) /* DMA Descriptor Address register for Channel 23 5-32 */
+#define DSADR23	_PXAREG(0x40000374) /* DMA Source Address register for Channel 23 5-33 */
+#define DTADR23	_PXAREG(0x40000378) /* DMA Target Address register for Channel 23 5-34 */
+#define DCMD23	_PXAREG(0x4000037C) /* DMA Command Address register for Channel 23 5-35 */
+#define DDADR24	_PXAREG(0x40000380) /* DMA Descriptor Address register for Channel 24 5-32 */
+#define DSADR24	_PXAREG(0x40000384) /* DMA Source Address register for Channel 24 5-33 */
+#define DTADR24	_PXAREG(0x40000388) /* DMA Target Address register for Channel 24 5-34 */
+#define DCMD24	_PXAREG(0x4000038C) /* DMA Command Address register for Channel 24 5-35 */
+#define DDADR25	_PXAREG(0x40000390) /* DMA Descriptor Address register for Channel 25 5-32 */
+#define DSADR25	_PXAREG(0x40000394) /* DMA Source Address register for Channel 25 5-33 */
+#define DTADR25	_PXAREG(0x40000398) /* DMA Target Address register for Channel 25 5-34 */
+#define DCMD25	_PXAREG(0x4000039C) /* DMA Command Address register for Channel 25 5-35 */
+#define DDADR26	_PXAREG(0x400003A0) /* DMA Descriptor Address register for Channel 26 5-32 */
+#define DSADR26	_PXAREG(0x400003A4) /* DMA Source Address register for Channel 26 5-33 */
+#define DTADR26	_PXAREG(0x400003A8) /* DMA Target Address register for Channel 26 5-34 */
+#define DCMD26	_PXAREG(0x400003AC) /* DMA Command Address register for Channel 26 5-35 */
+#define DDADR27	_PXAREG(0x400003B0) /* DMA Descriptor Address register for Channel 27 5-32 */
+#define DSADR27	_PXAREG(0x400003B4) /* DMA Source Address register for Channel 27 5-33 */
+#define DTADR27	_PXAREG(0x400003B8) /* DMA Target Address register for Channel 27 5-34 */
+#define DCMD27	_PXAREG(0x400003BC) /* DMA Command Address register for Channel 27 5-35 */
+#define DDADR28	_PXAREG(0x400003C0) /* DMA Descriptor Address register for Channel 28 5-32 */
+#define DSADR28	_PXAREG(0x400003C4) /* DMA Source Address register for Channel 28 5-33 */
+#define DTADR28	_PXAREG(0x400003C8) /* DMA Target Address register for Channel 28 5-34 */
+#define DCMD28	_PXAREG(0x400003CC) /* DMA Command Address register for Channel 28 5-35 */
+#define DDADR29	_PXAREG(0x400003D0) /* DMA Descriptor Address register for Channel 29 5-32 */
+#define DSADR29	_PXAREG(0x400003D4) /* DMA Source Address register for Channel 29 5-33 */
+#define DTADR29	_PXAREG(0x400003D8) /* DMA Target Address register for Channel 29 5-34 */
+#define DCMD29	_PXAREG(0x400003DC) /* DMA Command Address register for Channel 29 5-35 */
+#define DDADR30	_PXAREG(0x400003E0) /* DMA Descriptor Address register for Channel 30 5-32 */
+#define DSADR30	_PXAREG(0x400003E4) /* DMA Source Address register for Channel 30 5-33 */
+#define DTADR30	_PXAREG(0x400003E8) /* DMA Target Address register for Channel 30 5-34 */
+#define DCMD30	_PXAREG(0x400003EC) /* DMA Command Address register for Channel 30 5-35 */
+#define DDADR31	_PXAREG(0x400003F0) /* DMA Descriptor Address register for Channel 31 5-32 */
+#define DSADR31	_PXAREG(0x400003F4) /* DMA Source Address register for Channel 31 5-33 */
+#define DTADR31	_PXAREG(0x400003F8) /* DMA Target Address register for Channel 31 5-34 */
+#define DCMD31	_PXAREG(0x400003FC) /* DMA Command Address register for Channel 31 5-35 */
+
+#define DRCMR64	_PXAREG(0x40001100) /* Request to Channel Map register for Memory Stick receive request 5-31 */
+#define DRCMR65	_PXAREG(0x40001104) /* Request to Channel Map register for Memory Stick transmit request 5-31 */
+#define DRCMR66	_PXAREG(0x40001108) /* Request to Channel Map register for SSP3 receive request 5-31 */
+#define DRCMR67	_PXAREG(0x4000110C) /* Request to Channel Map register for SSP3 transmit request 5-31 */
+#define DRCMR68	_PXAREG(0x40001110) /* Request to Channel Map register for Quick Capture Interface Receive Request 0 5-31 */
+#define DRCMR69	_PXAREG(0x40001114) /* Request to Channel Map register for Quick Capture Interface Receive Request 1 5-31 */
+#define DRCMR70	_PXAREG(0x40001118) /* Request to Channel Map register for Quick Capture Interface Receive Request 2 5-31 */
+
+#define DRCMR74	_PXAREG(0x40001128) /* Request to Channel Map register for DREQ<2> (companion chip request 2) 5-31 */
+
+#define FLYCNFG	_PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */
+
+// DMA Register shortcuts
+#define DCSR(_ch)  _PXAREG_OFFSET(&DCSR0,((_ch) << 2))
+#define DRQSR(_line) _PXAREG_OFFSET(&DRQSR0,((_line) << 2))
+#define DRCMR(_dev) *(((_dev) < 63) ? (&_PXAREG_OFFSET(&DRCMR0, (((_dev) & 0x3f) << 2))) \
+				   : (&_PXAREG_OFFSET(&DRCMR64,(((_dev) & 0x3f) << 2))))
+#define DDADR(_ch) _PXAREG_OFFSET(&DDADR0,((_ch) << 4))
+#define DSADR(_ch) _PXAREG_OFFSET(&DSADR0,((_ch) << 4))
+#define DTADR(_ch) _PXAREG_OFFSET(&DTADR0,((_ch) << 4))
+#define DCMD(_ch) _PXAREG_OFFSET(&DCMD0,((_ch) << 4))
+
+
+#define DDADR_DESCADDR	0xfffffff0	/* Address of next descriptor (mask) */
+#define DDADR_STOP	(1 << 0)	/* Stop (read / write) */
+
+#define DRCMR_MAPVLD	(1 << 7)	/* Map Valid Channel */
+#define DRCMR_CHLNUM(_ch) ((_ch) & 0x1f)
+
+#define DCSR_RUN	(1 << 31)	/* Run Bit (read / write) */
+#define DCSR_NODESCFETCH (1 << 30)	/* No-Descriptor Fetch (read / write) */
+#define DCSR_STOPIRQEN	(1 << 29)	/* Stop Interrupt Enabled */
+#define DCSR_EORIRQEN	(1 << 28)	/* End-of-Receive Interrupt Enable */
+#define DCSR_EORJMPEN	(1 << 27)	/* Jump to Next Descriptor on EOR */
+#define DCSR_EORSTOPEN	(1 << 26)	/* Stop Channel on EOR */
+#define DCSR_SETCMPST	(1 << 25)	/* Set Descriptor Compare Status */
+#define DCSR_CLRCMPST	(1 << 24)	/* Clear Descriptor Compare Status */
+#define DCSR_RASIRQEN	(1 << 23)	/* Request After Channel Stoopped Interrupt Enable */
+#define DCSR_MASKRUN	(1 << 22)	/* Mask Run */
+#define DCSR_CMPST	(1 << 10)	/* Descriptor Compare Status */
+#define DCSR_EORINT	(1 << 9)	/* End of Recieve */
+#define DCSR_REQPEND	(1 << 8)	/* Request Pending (read-only) */
+#define DCSR_RASINTR	(1 << 4)	/* Request After Channel Stopped */
+#define DCSR_STOPINTR	(1 << 3)	/* Stop Interrupt */
+#define DCSR_ENDINTR	(1 << 2)	/* End Interrupt (read / write) */
+#define DCSR_STARTINTR	(1 << 1)	/* Start Interrupt (read / write) */
+#define DCSR_BUSERRINTR	(1 << 0)	/* Bus Error Interrupt (read / write) */
+
+#define DRQSR_CLR	(1 << 8)	/* Clear Pending Requests */
+
+#define DCMD_INCSRCADDR	(1 << 31)	/* Source Address Increment Setting. */
+#define DCMD_INCTRGADDR	(1 << 30)	/* Target Address Increment Setting. */
+#define DCMD_FLOWSRC	(1 << 29)	/* Flow Control by the source. */
+#define DCMD_FLOWTRG	(1 << 28)	/* Flow Control by the target. */
+#define DCMD_CMPEN	(1 << 25)	/* Descriptor Compare Enable */
+#define DCMD_ADDRMODE   (1 << 23)	/* Addressing Mode */
+#define DCMD_STARTIRQEN	(1 << 22)	/* Start Interrupt Enable */
+#define DCMD_ENDIRQEN	(1 << 21)	/* End Interrupt Enable */
+#define DCMD_FLYBYS	(1 << 20)	/* Fly-By Source */
+#define DCMD_FLYBYT	(1 << 19)	/* Fly-By Target */
+#define DCMD_BURST8	(1 << 16)	/* 8 byte burst */
+#define DCMD_BURST16	(2 << 16)	/* 16 byte burst */
+#define DCMD_BURST32	(3 << 16)	/* 32 byte burst */
+#define DCMD_WIDTH1	(1 << 14)	/* 1 byte width */
+#define DCMD_WIDTH2	(2 << 14)	/* 2 byte width (HalfWord) */
+#define DCMD_WIDTH4	(3 << 14)	/* 4 byte width (Word) */
+#define DCMD_SIZE(_x)	(((_x) & 0x3)<<16)	/* Burst Size */
+#define DCMD_MAXSIZE    DCMD_SIZE(3)
+#define DCMD_WIDTH(_x)	(((_x) & 0x3)<<14)	/* Peripheral Width  */
+#define DCMD_MAXWIDTH   DCMD_WIDTH(3)
+#define DCMD_LEN(_x)	(((_x) & 0x1fff))	/* Length of transfer (0 for descriptor ops) */
+#define DCMD_MAXLEN     DCMD_LEN(0x1fff)
+
+#define DMAREQ_DREQ0		(0)	
+#define DMAREQ_DREQ1		(1)	
+#define DMAREQ_I2S_RECV		(2)	
+#define DMAREQ_I2S_XMT		(3)	
+#define DMAREQ_BTUART_RECV	(4)	
+#define DMAREQ_BTUART_XMT	(5)	
+#define DMAREQ_FFUAR_RECV	(6)	
+#define DMAREQ_FFUART_XMT	(7)	
+#define DMAREQ_AC97_MICR	(8)	
+#define DMAREQ_AC97_MODEM_RECV	(9)	
+#define DMAREQ_AC97_MODEM_XMT	(10)	
+#define DMAREQ_AC97_AUDIO_RECV	(11)	
+#define DMAREQ_AC97_AUDIO_XMT	(12)	
+#define DMAREQ_SSP1_RECV	(13)	
+#define DMAREQ_SSP1_XMT		(14)	
+#define DMAREQ_SSP2_RECV	(15)	
+#define DMAREQ_SSP2_XMT		(16)	
+#define DMAREQ_ICP_RECV		(17)	
+#define DMAREQ_ICP_XMT		(18)	
+#define DMAREQ_STUART_RECV	(19)	
+#define DMAREQ_STUART_XMT	(20)	
+#define DMAREQ_MMCSDIO_RECV	(21)	
+#define DMAREQ_MMCSDIO_XMT	(22)	
+
+#define DMAREQ_USB_EP_0		(24)	
+#define DMAREQ_USB_EP_A		(25)	
+#define DMAREQ_USB_EP_B		(26)	
+#define DMAREQ_USB_EP_C		(27)	
+#define DMAREQ_USB_EP_D		(28)	
+#define DMAREQ_USB_EP_E		(29)	
+#define DMAREQ_USB_EP_F		(30)	
+#define DMAREQ_USB_EP_G		(31)	
+#define DMAREQ_USB_EP_H		(32)	
+#define DMAREQ_USB_EP_I		(33)	
+#define DMAREQ_USB_EP_J		(34)	
+#define DMAREQ_USB_EP_K		(35)	
+#define DMAREQ_USB_EP_L		(36)	
+#define DMAREQ_USB_EP_M		(37)	
+#define DMAREQ_USB_EP_N		(38)	
+#define DMAREQ_USB_EP_P		(39)	
+#define DMAREQ_USB_EP_Q		(40)	
+#define DMAREQ_USB_EP_R		(41)	
+#define DMAREQ_USB_EP_S		(42)	
+#define DMAREQ_USB_EP_T		(43)	
+#define DMAREQ_USB_EP_U		(44)	
+#define DMAREQ_USB_EP_V		(45)	
+#define DMAREQ_USB_EP_W		(46)	
+#define DMAREQ_USB_EP_X		(47)	
+#define DMAREQ_MSL_RECV_1	(48)	
+#define DMAREQ_MSL_XMT_1	(49)	
+#define DMAREQ_MSL_RECV_2	(50)	
+#define DMAREQ_MSL_XMT_2	(51)	
+#define DMAREQ_MSL_RECV_3	(52)	
+#define DMAREQ_MSL_XMT_3	(53)	
+#define DMAREQ_MSL_RECV_4	(54)	
+#define DMAREQ_MSL_XMT_4	(55)	
+#define DMAREQ_MSL_RECV_5	(56)	
+#define DMAREQ_MSL_XMT_5	(57)	
+#define DMAREQ_MSL_RECV_6	(58)	
+#define DMAREQ_MSL_XMT_6	(59)	
+#define DMAREQ_MSL_RECV_7	(60)	
+#define DMAREQ_MSL_XMT_7	(61)	
+#define DMAREQ_USIM_RECV	(62)	
+#define DMAREQ_USIM_XMT		(63)	
+#define DMAREQ_MEMSTICK_RECV	(64)	
+#define DMAREQ_MEMSTICK_XMT	(65)	
+#define DMAREQ_SSP3_RECV	(66)	
+#define DMAREQ_SSP3_XMT		(67)	
+#define DMAREQ_CIF_RECV_0	(68)	
+#define DMAREQ_CIF_RECV_1	(69)	
+#define DMAREQ_CIF_RECV_2	(70)	
+#define DMAREQ_DREQ2     	(74)	
+
+
+
+/******************************************************************************/
+/* Full-Function UART */
+/******************************************************************************/
+#define FFRBR	_PXAREG(0x40100000) /* Receive Buffer register 10-13 */
+#define FFTHR	_PXAREG(0x40100000) /* Transmit Holding register 10-14 */
+#define FFDLL	_PXAREG(0x40100000) /* Divisor Latch register, low byte 10-14 */
+#define FFIER	_PXAREG(0x40100004) /* Interrupt Enable register 10-15 */
+#define FFDLH	_PXAREG(0x40100004) /* Divisor Latch register, high byte 10-14 */
+#define FFIIR	_PXAREG(0x40100008) /* Interrupt ID register 10-17 */
+#define FFFCR	_PXAREG(0x40100008) /* FIFO Control register 10-19 */
+#define FFLCR	_PXAREG(0x4010000C) /* Line Control register 10-25 */
+#define FFMCR	_PXAREG(0x40100010) /* Modem Control register 10-29 */
+#define FFLSR	_PXAREG(0x40100014) /* Line Status register 10-26 */
+#define FFMSR	_PXAREG(0x40100018) /* Modem Status register 10-31 */
+#define FFSPR	_PXAREG(0x4010001C) /* Scratch Pad register 10-33 */
+#define FFISR	_PXAREG(0x40100020) /* Infrared Select register 10-33 */
+#define FFFOR	_PXAREG(0x40100024) /* Receive FIFO Occupancy register 10-22 */
+#define FFABR	_PXAREG(0x40100028) /* Auto-baud Control register 10-23 */
+#define FFACR	_PXAREG(0x4010002C) /* Auto-baud Count register 10-24 */
+
+
+/******************************************************************************/
+/* Bluetooth UART */
+/******************************************************************************/
+#define BTRBR	_PXAREG(0x40200000) /* Receive Buffer register 10-13 */
+#define BTTHR	_PXAREG(0x40200000) /* Transmit Holding register 10-14 */
+#define BTDLL	_PXAREG(0x40200000) /* Divisor Latch register, low byte 10-14 */
+#define BTIER	_PXAREG(0x40200004) /* Interrupt Enable register 10-15 */
+#define BTDLH	_PXAREG(0x40200004) /* Divisor Latch register, high byte 10-14 */
+#define BTIIR	_PXAREG(0x40200008) /* Interrupt ID register 10-17 */
+#define BTFCR	_PXAREG(0x40200008) /* FIFO Control register 10-19 */
+#define BTLCR	_PXAREG(0x4020000C) /* Line Control register 10-25 */
+#define BTMCR	_PXAREG(0x40200010) /* Modem Control register 10-29 */
+#define BTLSR	_PXAREG(0x40200014) /* Line Status register 10-26 */
+#define BTMSR	_PXAREG(0x40200018) /* Modem Status register 10-31 */
+#define BTSPR	_PXAREG(0x4020001C) /* Scratch Pad register 10-33 */
+#define BTISR	_PXAREG(0x40200020) /* Infrared Select register 10-33 */
+#define BTFOR	_PXAREG(0x40200024) /* Receive FIFO Occupancy register 10-22 */
+#define BTABR	_PXAREG(0x40200028) /* Auto-Baud Control register 10-23 */
+#define BTACR	_PXAREG(0x4020002C) /* Auto-Baud Count register 10-24 */
+
+#define IER_DMAE	(1 << 7)	/* DMA Requests Enable */
+#define IER_UUE		(1 << 6)	/* UART Unit Enable */
+#define IER_NRZE	(1 << 5)	/* NRZ coding Enable */
+#define IER_RTIOE	(1 << 4)	/* Receiver Time Out Interrupt Enable */
+#define IER_MIE		(1 << 3)	/* Modem Interrupt Enable */
+#define IER_RLSE	(1 << 2)	/* Receiver Line Status Interrupt Enable */
+#define IER_TIE		(1 << 1)	/* Transmit Data request Interrupt Enable */
+#define IER_RAVIE	(1 << 0)	/* Receiver Data Available Interrupt Enable */
+
+#define IIR_FIFOES1	(1 << 7)	/* FIFO Mode Enable Status */
+#define IIR_FIFOES0	(1 << 6)	/* FIFO Mode Enable Status */
+#define IIR_TOD		(1 << 3)	/* Time Out Detected */
+#define IIR_IID_MASK	(0x3 << 1)	/* Interrupt Source Encoded */
+#define IIR_IP		(1 << 0)	/* Interrupt Pending (active low) */
+
+#define FCR_ITL(_x)	((_x) << 6)	/* Interrupt Trigger Level */
+#define FCR_BUS		(1 << 5)	/* 32-Bit Peripheral Bus */
+#define FCR_TRAIL	(1 << 4)	/* Trailing Bytes */
+#define FCR_TIL		(1 << 3)	/* Transmitter Interrupt Level */
+#define FCR_RESETTF	(1 << 2)	/* Reset Transmitter FIFO */
+#define FCR_RESETRF	(1 << 1)	/* Reset Receiver FIFO */
+#define FCR_TRFIFOE	(1 << 0)	/* Transmit and Receive FIFO Enable */
+
+#define ABR_ABT		(1 << 3)	/* Auto-Baud Rate Calculation */
+#define ABR_ABUP	(1 << 2)	/* Auto-Baud Programmer */
+#define ABR_ABLIE	(1 << 1)	/* Auto-Baud Interrupt */
+#define ABR_ABE		(1 << 0)	/* Auto-Baud Enable */
+
+#define LCR_DLAB	(1 << 7)	/* Divisor Latch Access */
+#define LCR_SB		(1 << 6)	/* Set Break */
+#define LCR_STKYP	(1 << 5)	/* Sticky Parity */
+#define LCR_EPS		(1 << 4)	/* Even Parity Select */
+#define LCR_PEN		(1 << 3)	/* Parity Enable */
+#define LCR_STB		(1 << 2)	/* Stop Bit */
+#define LCR_WLS(_x)	((_x) << 0)	/* Word Length Select */
+
+#define LSR_FIFOE	(1 << 7)	/* FIFO Error Status */
+#define LSR_TEMT	(1 << 6)	/* Transmitter Empty */
+#define LSR_TDRQ	(1 << 5)	/* Transmit Data Request */
+#define LSR_BI		(1 << 4)	/* Break Interrupt */
+#define LSR_FE		(1 << 3)	/* Framing Error */
+#define LSR_PE		(1 << 2)	/* Parity Error */
+#define LSR_OE		(1 << 1)	/* Overrun Error */
+#define LSR_DR		(1 << 0)	/* Data Ready */
+
+#define MCR_AFE		(1 << 5)	/* Auto-Flow Control Enable */
+#define MCR_LOOP	(1 << 4)	/* Loopback Mode */
+#define MCR_OUT2	(1 << 3)	/* OUT2 Signal control */
+#define MCR_OUT1	(1 << 2)	/* Test Bit */
+#define MCR_RTS		(1 << 1)	/* Request to Send */
+#define MCR_DTR		(1 << 0)	/* Data Terminal Ready */
+
+#define MSR_DCD		(1 << 7)	/* Data Carrier Detect */
+#define MSR_RI		(1 << 6)	/* Ring Indicator */
+#define MSR_DSR		(1 << 5)	/* Data Set Ready */
+#define MSR_CTS		(1 << 4)	/* Clear To Send */
+#define MSR_DDCD	(1 << 3)	/* Delta Data Carrier Detect */
+#define MSR_TERI	(1 << 2)	/* Trailing Edge Ring Indicator */
+#define MSR_DDSR	(1 << 1)	/* Delta Data Set Ready */
+#define MSR_DCTS	(1 << 0)	/* Delta Clear To Send */
+
+#define ISR_RXPL	(1 << 4)	/* Receive Data Polarity */
+#define ISR_TXPL	(1 << 3)	/* Transmit Data Polarity */
+#define ISR_XMODE	(1 << 2)	/* Transmit Pulse Width Select */
+#define ISR_RCVEIR	(1 << 1)	/* Receiver SIR Enable */
+#define ISR_XMITIR	(1 << 0)	/* Transmitter SIR Enable */
+
+
+/******************************************************************************/
+/* Standard I2C */
+/******************************************************************************/
+#define IBMR	_PXAREG(0x40301680) /* I2C Bus Monitor register 9-30 */
+#define IDBR	_PXAREG(0x40301688) /* I2C Data Buffer register 9-29 */
+#define ICR	_PXAREG(0x40301690) /* I2C Control register 9-23 */
+#define ISR	_PXAREG(0x40301698) /* I2C Status register 9-26 */
+#define ISAR	_PXAREG(0x403016A0) /* I2C Slave Address register 9-28 */
+
+/* I2C - Control Register */
+#define ICR_FM	        (1 << 15)	/* Fast Mode */
+#define ICR_UR	        (1 << 14)	/* Unit Reset */
+#define ICR_SADIE       (1 << 13)	/* Slave Address Detected Interrupt Enable */
+#define ICR_ALDIE	(1 << 12)	/* Arbitratino Loss Detected Interrupt Enable */
+#define ICR_SSDIE	(1 << 11)	/* Slave STOP Detected Interrupt Enable */
+#define ICR_BEIE	(1 << 10)	/* Bus Error Interrupt Enable */
+#define ICR_DRFIE	(1 << 9)	/* DBR Receive Full Interupt Enable */
+#define ICR_ITEIE	(1 << 8)	/* IDBR Transmit Empty Interrupt Enable */
+#define ICR_GCD	        (1 << 7)	/* General Call Disable */
+#define ICR_IUE	        (1 << 6)	/* I2C Unit Enable */
+#define ICR_SCLE	(1 << 5)	/* SCL Enable */
+#define ICR_MA	        (1 << 4)	/* Master Abort */
+#define ICR_TB	        (1 << 3)	/* Transfer Byte */
+#define ICR_ACKNAK	(1 << 2)	/* Positive/Negative Acknowledge */
+#define ICR_STOP	(1 << 1)	/* Stop */
+#define ICR_START	(1 << 0)	/* Start */
+            
+/* I2C - Status Register */
+#define ISR_BED	        (1 << 10)       /* Bus Error Detected */
+#define ISR_SAD	        (1 << 9)        /* Slave Address Detected */
+#define ISR_GCAD        (1 << 8)        /* General Call Address Detected */
+#define ISR_IRF	        (1 << 7)        /* IDBR Receive Full */
+#define ISR_ITE	        (1 << 6)        /* IDBR Transmit Empty */
+#define ISR_ALD	        (1 << 5)        /* Arbitration Loss Detection */
+#define ISR_SSD	        (1 << 4)        /* Slave STOP Detected */
+#define ISR_IBB	        (1 << 3)        /* I2C Bus Busy */
+#define ISR_UB          (1 << 2)        /* Unit Busy */
+#define ISR_ACKNAK      (1 << 1)        /* Ack/Nack Status */
+#define ISR_RWM         (1 << 0)        /* Read/Write Mode */
+
+/* I2C - Bus Monitor Register */
+#define IBMR_SCL        (1 << 1)        /* Continousely reflects the value of the SCL pin */
+#define IBMR_SDA        (1 << 0)        /* Continousely reflects the value of the SDA pin */
+
+
+
+
+/******************************************************************************/
+/* I2S Controller */
+/******************************************************************************/
+#define SACR0	_PXAREG(0x40400000) /* Serial Audio Global Control register 14-10 */
+#define SACR1	_PXAREG(0x40400004) /* Serial Audio I2S/MSB-Justified Control register 14-13 */
+#define SASR0	_PXAREG(0x4040000C) /* Serial Audio I2S/MSB-Justified Interface and FIFO Status register 14-14 */
+#define SAIMR	_PXAREG(0x40400014) /* Serial Audio Interrupt Mask register 14-18 */
+#define SAICR	_PXAREG(0x40400018) /* Serial Audio Interrupt Clear register 14-17 */
+#define SADIV	_PXAREG(0x40400060) /* Audio Clock Divider register 14-16 */
+#define SADR	_PXAREG(0x40400080) /* Serial Audio Data register (TX and RX FIFO access register). 14-18 */
+
+
+/******************************************************************************/
+/* USB Client Controller */
+/******************************************************************************/
+#define UDCCR	_PXAREG(0x40600000) /* UDC Control register 12-31 */
+#define UDCICR0	_PXAREG(0x40600004) /* UDC Interrupt Control register 0 12-35 */
+#define UDCICR1	_PXAREG(0x40600008) /* UDC Interrupt Control register 1 12-35 */
+#define UDCISR0	_PXAREG(0x4060000C) /* UDC Interrupt Status register 0 12-49 */
+#define UDCISR1	_PXAREG(0x40600010) /* UDC Interrupt Status register 1 12-49 */
+#define UDCFNR	_PXAREG(0x40600014) /* UDC Frame Number register 12-52 */
+#define UDCOTGICR	_PXAREG(0x40600018) /* UDC OTG Interrupt Control register 12-35 */
+#define UDCOTGISR	_PXAREG(0x4060001C) /* UDC OTG Interrupt Status register 12-49 */
+#define UP2OCR	_PXAREG(0x40600020) /* USB Port 2 Output Control register 12-41 */
+#define UP3OCR	_PXAREG(0x40600024) /* USB Port 3 Output Control register 12-47 */
+#define UDCCSR0	_PXAREG(0x40600100) /* UDC Control/Status register-Endpoint 0 12-53 */
+#define UDCCSRA	_PXAREG(0x40600104) /* UDC Control/Status register-Endpoint A 12-56 */
+#define UDCCSRB	_PXAREG(0x40600108) /* UDC Control/Status register-Endpoint B 12-56 */
+#define UDCCSRC	_PXAREG(0x4060010C) /* UDC Control/Status register-Endpoint C 12-56 */
+#define UDCCSRD	_PXAREG(0x40600110) /* UDC Control/Status register-Endpoint D 12-56 */
+#define UDCCSRE	_PXAREG(0x40600114) /* UDC Control/Status register-Endpoint E 12-56 */
+#define UDCCSRF	_PXAREG(0x40600118) /* UDC Control/Status register-Endpoint F 12-56 */
+#define UDCCSRG	_PXAREG(0x4060011C) /* UDC Control/Status register-Endpoint G 12-56 */
+#define UDCCSRH	_PXAREG(0x40600120) /* UDC Control/Status register-Endpoint H 12-56 */
+#define UDCCSRI	_PXAREG(0x40600124) /* UDC Control/Status register-Endpoint I 12-56 */
+#define UDCCSRJ	_PXAREG(0x40600128) /* UDC Control/Status register-Endpoint J 12-56 */
+#define UDCCSRK	_PXAREG(0x4060012C) /* UDC Control/Status register-Endpoint K 12-56 */
+#define UDCCSRL	_PXAREG(0x40600130) /* UDC Control/Status register-Endpoint L 12-56 */
+#define UDCCSRM	_PXAREG(0x40600134) /* UDC Control/Status register-Endpoint M 12-56 */
+#define UDCCSRN	_PXAREG(0x40600138) /* UDC Control/Status register-Endpoint N 12-56 */
+#define UDCCSRP	_PXAREG(0x4060013C) /* UDC Control/Status register-Endpoint P 12-56 */
+#define UDCCSRQ	_PXAREG(0x40600140) /* UDC Control/Status register-Endpoint Q 12-56 */
+#define UDCCSRR	_PXAREG(0x40600144) /* UDC Control/Status register-Endpoint R 12-56 */
+#define UDCCSRS	_PXAREG(0x40600148) /* UDC Control/Status register-Endpoint S 12-56 */
+#define UDCCSRT	_PXAREG(0x4060014C) /* UDC Control/Status register-Endpoint T 12-56 */
+#define UDCCSRU	_PXAREG(0x40600150) /* UDC Control/Status register-Endpoint U 12-56 */
+#define UDCCSRV	_PXAREG(0x40600154) /* UDC Control/Status register-Endpoint V 12-56 */
+#define UDCCSRW	_PXAREG(0x40600158) /* UDC Control/Status register-Endpoint W 12-56 */
+#define UDCCSRX	_PXAREG(0x4060015C) /* UDC Control/Status register-Endpoint X 12-56 */
+
+#define UDCBCR0	_PXAREG(0x40600200) /* UDC Byte Count register-Endpoint 0 12-62 */
+#define UDCBCRA	_PXAREG(0x40600204) /* UDC Byte Count register-Endpoint A 12-62 */
+#define UDCBCRB	_PXAREG(0x40600208) /* UDC Byte Count register-Endpoint B 12-62 */
+#define UDCBCRC	_PXAREG(0x4060020C) /* UDC Byte Count register-Endpoint C 12-62 */
+#define UDCBCRD	_PXAREG(0x40600210) /* UDC Byte Count register-Endpoint D 12-62 */
+#define UDCBCRE	_PXAREG(0x40600214) /* UDC Byte Count register-Endpoint E 12-62 */
+#define UDCBCRF	_PXAREG(0x40600218) /* UDC Byte Count register-Endpoint F 12-62 */
+#define UDCBCRG	_PXAREG(0x4060021C) /* UDC Byte Count register-Endpoint G 12-62 */
+#define UDCBCRH	_PXAREG(0x40600220) /* UDC Byte Count register-Endpoint H 12-62 */
+#define UDCBCRI	_PXAREG(0x40600224) /* UDC Byte Count register-Endpoint I 12-62 */
+#define UDCBCRJ	_PXAREG(0x40600228) /* UDC Byte Count register-Endpoint J 12-62 */
+#define UDCBCRK	_PXAREG(0x4060022C) /* UDC Byte Count register-Endpoint K 12-62 */
+#define UDCBCRL	_PXAREG(0x40600230) /* UDC Byte Count register-Endpoint L 12-62 */
+#define UDCBCRM	_PXAREG(0x40600234) /* UDC Byte Count register-Endpoint M 12-62 */
+#define UDCBCRN	_PXAREG(0x40600238) /* UDC Byte Count register-Endpoint N 12-62 */
+#define UDCBCRP	_PXAREG(0x4060023C) /* UDC Byte Count register-Endpoint P 12-62 */
+#define UDCBCRQ	_PXAREG(0x40600240) /* UDC Byte Count register-Endpoint Q 12-62 */
+#define UDCBCRR	_PXAREG(0x40600244) /* UDC Byte Count register-Endpoint R 12-62 */
+#define UDCBCRS	_PXAREG(0x40600248) /* UDC Byte Count register-Endpoint S 12-62 */
+#define UDCBCRT	_PXAREG(0x4060024C) /* UDC Byte Count register-Endpoint T 12-62 */
+#define UDCBCRU	_PXAREG(0x40600250) /* UDC Byte Count register-Endpoint U 12-62 */
+#define UDCBCRV	_PXAREG(0x40600254) /* UDC Byte Count register-Endpoint V 12-62 */
+#define UDCBCRW	_PXAREG(0x40600258) /* UDC Byte Count register-Endpoint W 12-62 */
+#define UDCBCRX	_PXAREG(0x4060025C) /* UDC Byte Count register-Endpoint X 12-62 */
+
+#define UDCDR0	_PXAREG(0x40600300) /* UDC Data register-Endpoint 0 12-62 */
+#define UDCDRA	_PXAREG(0x40600304) /* UDC Data register-Endpoint A 12-62 */
+#define UDCDRB	_PXAREG(0x40600308) /* UDC Data register-Endpoint B 12-62 */
+#define UDCDRC	_PXAREG(0x4060030C) /* UDC Data register-Endpoint C 12-62 */
+#define UDCDRD	_PXAREG(0x40600310) /* UDC Data register-Endpoint D 12-62 */
+#define UDCDRE	_PXAREG(0x40600314) /* UDC Data register-Endpoint E 12-62 */
+#define UDCDRF	_PXAREG(0x40600318) /* UDC Data register-Endpoint F 12-62 */
+#define UDCDRG	_PXAREG(0x4060031C) /* UDC Data register-Endpoint G 12-62 */
+#define UDCDRH	_PXAREG(0x40600320) /* UDC Data register-Endpoint H 12-62 */
+#define UDCDRI	_PXAREG(0x40600324) /* UDC Data register-Endpoint I 12-62 */
+#define UDCDRJ	_PXAREG(0x40600328) /* UDC Data register-Endpoint J 12-62 */
+#define UDCDRK	_PXAREG(0x4060032C) /* UDC Data register-Endpoint K 12-62 */
+#define UDCDRL	_PXAREG(0x40600330) /* UDC Data register-Endpoint L 12-62 */
+#define UDCDRM	_PXAREG(0x40600334) /* UDC Data register-Endpoint M 12-62 */
+#define UDCDRN	_PXAREG(0x40600338) /* UDC Data register-Endpoint N 12-62 */
+#define UDCDRP	_PXAREG(0x4060033C) /* UDC Data register-Endpoint P 12-62 */
+#define UDCDRQ	_PXAREG(0x40600340) /* UDC Data register-Endpoint Q 12-62 */
+#define UDCDRR	_PXAREG(0x40600344) /* UDC Data register-Endpoint R 12-62 */
+#define UDCDRS	_PXAREG(0x40600348) /* UDC Data register-Endpoint S 12-62 */
+#define UDCDRT	_PXAREG(0x4060034C) /* UDC Data register-Endpoint T 12-62 */
+#define UDCDRU	_PXAREG(0x40600350) /* UDC Data register-Endpoint U 12-62 */
+#define UDCDRV	_PXAREG(0x40600354) /* UDC Data register-Endpoint V 12-62 */
+#define UDCDRW	_PXAREG(0x40600358) /* UDC Data register-Endpoint W 12-62 */
+#define UDCDRX	_PXAREG(0x4060035C) /* UDC Data register-Endpoint X 12-62 */
+
+#define UDCCRA	_PXAREG(0x40600404) /* UDC Configuration register-Endpoint A 12-64 */
+#define UDCCRB	_PXAREG(0x40600408) /* UDC Configuration register-Endpoint B 12-64 */
+#define UDCCRC	_PXAREG(0x4060040C) /* UDC Configuration register-Endpoint C 12-64 */
+#define UDCCRD	_PXAREG(0x40600410) /* UDC Configuration register-Endpoint D 12-64 */
+#define UDCCRE	_PXAREG(0x40600414) /* UDC Configuration register-Endpoint E 12-64 */
+#define UDCCRF	_PXAREG(0x40600418) /* UDC Configuration register-Endpoint F 12-64 */
+#define UDCCRG	_PXAREG(0x4060041C) /* UDC Configuration register-Endpoint G 12-64 */
+#define UDCCRH	_PXAREG(0x40600420) /* UDC Configuration register-Endpoint H 12-64 */
+#define UDCCRI	_PXAREG(0x40600424) /* UDC Configuration register-Endpoint I 12-64 */
+#define UDCCRJ	_PXAREG(0x40600428) /* UDC Configuration register-Endpoint J 12-64 */
+#define UDCCRK	_PXAREG(0x4060042C) /* UDC Configuration register-Endpoint K 12-64 */
+#define UDCCRL	_PXAREG(0x40600430) /* UDC Configuration register-Endpoint L 12-64 */
+#define UDCCRM	_PXAREG(0x40600434) /* UDC Configuration register-Endpoint M 12-64 */
+#define UDCCRN	_PXAREG(0x40600438) /* UDC Configuration register-Endpoint N 12-64 */
+#define UDCCRP	_PXAREG(0x4060043C) /* UDC Configuration register-Endpoint P 12-64 */
+#define UDCCRQ	_PXAREG(0x40600440) /* UDC Configuration register-Endpoint Q 12-64 */
+#define UDCCRR	_PXAREG(0x40600444) /* UDC Configuration register-Endpoint R 12-64 */
+#define UDCCRS	_PXAREG(0x40600448) /* UDC Configuration register-Endpoint S 12-64 */
+#define UDCCRT	_PXAREG(0x4060044C) /* UDC Configuration register-Endpoint T 12-64 */
+#define UDCCRU	_PXAREG(0x40600450) /* UDC Configuration register-Endpoint U 12-64 */
+#define UDCCRV	_PXAREG(0x40600454) /* UDC Configuration register-Endpoint V 12-64 */
+#define UDCCRW	_PXAREG(0x40600458) /* UDC Configuration register-Endpoint W 12-64 */
+#define UDCCRX	_PXAREG(0x4060045C) /* UDC Configuration register-Endpoint X 12-64 */
+
+/* UDCCR register */
+#define UDCCR_UDE (1 << 0)	    /* UDC Enable */
+
+/******************************************************************************/
+/* Standard UART */
+/******************************************************************************/
+#define STRBR	_PXAREG(0x40700000) /* Receive Buffer register 10-13 */
+#define STTHR	_PXAREG(0x40700000) /* Transmit Holding register 10-14 */
+#define STDLL	_PXAREG(0x40700000) /* Divisor Latch register, low byte 10-14 */
+#define STIER	_PXAREG(0x40700004) /* Interrupt Enable register 10-15 */
+#define STDLH	_PXAREG(0x40700004) /* Divisor Latch register, high byte 10-14 */
+#define STIIR	_PXAREG(0x40700008) /* Interrupt ID register 10-17 */
+#define STFCR	_PXAREG(0x40700008) /* FIFO Control register 10-19 */
+#define STLCR	_PXAREG(0x4070000C) /* Line Control register 10-25 */
+#define STMCR	_PXAREG(0x40700010) /* Modem Control register 10-29 */
+#define STLSR	_PXAREG(0x40700014) /* Line Status register 10-26 */
+#define STMSR	_PXAREG(0x40700018) /* Modem Status register 10-31 */
+#define STSPR	_PXAREG(0x4070001C) /* Scratch Pad register 10-33 */
+#define STISR	_PXAREG(0x40700020) /* Infrared Select register 10-33 */
+#define STFOR	_PXAREG(0x40700024) /* Receive FIFO Occupancy register 10-22 */
+#define STABR	_PXAREG(0x40700028) /* Auto-Baud Control register 10-23 */
+#define STACR	_PXAREG(0x4070002C) /* Auto-Baud Count register 10-24 */
+
+
+/******************************************************************************/
+/* Infrared Communications Port */
+/******************************************************************************/
+#define ICCR0	_PXAREG(0x40800000) /* FICP Control register 0 11-10 */
+#define ICCR1	_PXAREG(0x40800004) /* FICP Control register 1 11-13 */
+#define ICCR2	_PXAREG(0x40800008) /* FICP Control register 2 11-14 */
+#define ICDR	_PXAREG(0x4080000C) /* FICP Data register 11-15 */
+
+#define ICSR0	_PXAREG(0x40800014) /* FICP Status register 0 11-16 */
+#define ICSR1	_PXAREG(0x40800018) /* FICP Status register 1 11-18 */
+#define ICFOR	_PXAREG(0x4080001C) /* FICP FIFO Occupancy Status register 11-19 */
+
+
+/******************************************************************************/
+/* Real-Time Clock */
+/******************************************************************************/
+#define RCNR	_PXAREG(0x40900000) /* RTC Counter register 21-24 */
+#define RTAR	_PXAREG(0x40900004) /* RTC Alarm register 21-19 */
+#define RTSR	_PXAREG(0x40900008) /* RTC Status register 21-17 */
+#define RTTR	_PXAREG(0x4090000C) /* RTC Timer Trim register 21-16 */
+#define RDCR	_PXAREG(0x40900010) /* RTC Day Counter register 21-24 */
+#define RYCR	_PXAREG(0x40900014) /* RTC Year Counter register 21-25 */
+#define RDAR1	_PXAREG(0x40900018) /* RTC Wristwatch Day Alarm register 1 21-20 */
+#define RYAR1	_PXAREG(0x4090001C) /* RTC Wristwatch Year Alarm register 1 21-21 */
+#define RDAR2	_PXAREG(0x40900020) /* RTC Wristwatch Day Alarm register 2 21-20 */
+#define RYAR2	_PXAREG(0x40900024) /* RTC Wristwatch Year Alarm register 2 21-21 */
+#define SWCR	_PXAREG(0x40900028) /* RTC Stopwatch Counter register 21-26 */
+#define SWAR1	_PXAREG(0x4090002C) /* RTC Stopwatch Alarm register 1 21-22 */
+#define SWAR2	_PXAREG(0x40900030) /* RTC Stopwatch Alarm register 2 21-22 */
+#define RTCPICR	_PXAREG(0x40900034) /* RTC Periodic Interrupt Counter register 21-27 */
+#define PIAR	_PXAREG(0x40900038) /* RTC Periodic Interrupt Alarm register 21-23 */
+
+/* RTSR */
+#define RTSR_PICE	(1 << 15)  /* periodic interrupt count enable */
+#define RTSR_PIALE	(1 << 14)  /* periodic interrupt alarm enable */
+#define RTSR_PIAL	(1 << 13)  /* periodic interrupt alarm status */
+#define RTSR_SWCE	(1 << 12)  /* stopwatch count enable */
+#define RTSR_SWALE2	(1 << 11)  /* stopwatch alarm 2 enable */
+#define RTSR_SWAL2	(1 << 10)  /* stopwatch alarm 2 status */
+#define RTSR_SWALE1	(1 << 9)   /* stopwatch alarm 1 enable */
+#define RTSR_SWAL1	(1 << 8)   /* stopwatch alarm 1 status */
+#define RTSR_RDALE2	(1 << 7)   /* wristwatch alarm 2 enable */
+#define RTSR_RDAL2	(1 << 6)   /* wristwatch alarm 2 status */
+#define RTSR_RDALE1	(1 << 5)   /* wristwatch alarm 1 enable */
+#define RTSR_RDAL1	(1 << 4)   /* wristwatch alarm 1 status */
+#define RTSR_HZE	(1 << 3)   /* HZ interrupt enable */
+#define RTSR_ALE	(1 << 2)   /* RTC alarm interrupt enable */
+#define RTSR_HZ		(1 << 1)   /* HZ rising edge detected */
+#define RTSR_AL		(1 << 0)   /* RTC alarm detected */
+
+/******************************************************************************/
+/* OS Timers */
+/******************************************************************************/
+#define OSMR0	_PXAREG(0x40A00000) /* OS Timer Match 0 register 22-15 */
+#define OSMR1	_PXAREG(0x40A00004) /* OS Timer Match 1 register 22-15 */
+#define OSMR2	_PXAREG(0x40A00008) /* OS Timer Match 2 register 22-15 */
+#define OSMR3	_PXAREG(0x40A0000C) /* OS Timer Match 3 register 22-15 */
+#define OSCR0	_PXAREG(0x40A00010) /* OS Timer Counter 0 register 22-17 */
+#define OSSR	_PXAREG(0x40A00014) /* OS Timer Status register (used for all counters) 22-18 */
+#define OWER	_PXAREG(0x40A00018) /* OS Timer Watchdog Enable register 22-16 */
+#define OIER	_PXAREG(0x40A0001C) /* OS Timer Interrupt Enable register (used for all counters) 22-16 */
+#define OSNR	_PXAREG(0x40A00020) /* OS Timer Snapshot register 22-19 */
+
+#define OSCR4	_PXAREG(0x40A00040) /* OS Timer Counter 4-11 registers 22-17 */
+#define OSCR5	_PXAREG(0x40A00044) 
+#define OSCR6	_PXAREG(0x40A00048) 
+#define OSCR7	_PXAREG(0x40A0004C) 
+#define OSCR8	_PXAREG(0x40A00050) 
+#define OSCR9	_PXAREG(0x40A00054) 
+#define OSCR10	_PXAREG(0x40A00058) 
+#define OSCR11	_PXAREG(0x40A0005C) 
+
+#define OSMR4	_PXAREG(0x40A00080) /* OS Timer Match 4-11 registers 22-15 */
+#define OSMR5	_PXAREG(0x40A00084) 
+#define OSMR6	_PXAREG(0x40A00088) 
+#define OSMR7	_PXAREG(0x40A0008C) 
+#define OSMR8	_PXAREG(0x40A00090) 
+#define OSMR9	_PXAREG(0x40A00094) 
+#define OSMR10	_PXAREG(0x40A00098) 
+#define OSMR11	_PXAREG(0x40A0009C) 
+
+#define OMCR4	_PXAREG(0x40A000C0) /* OS Match Control 4-7 registers 22-9 */
+#define OMCR5	_PXAREG(0x40A000C4) 
+#define OMCR6	_PXAREG(0x40A000C8) 
+#define OMCR7	_PXAREG(0x40A000CC) 
+#define OMCR8	_PXAREG(0x40A000D0) /* OS Match Control 8 register 22-11 */
+#define OMCR9	_PXAREG(0x40A000D4) /* OS Match Control 9 register 22-13 */
+#define OMCR10	_PXAREG(0x40A000D8) /* OS Match Control 10 register 22-11 */
+#define OMCR11	_PXAREG(0x40A000DC) /* OS Match Control 11 register 22-13 */
+
+// OS Timer Register Shortcuts
+#define OSCR(_ch) *(((_ch) == 0) ? (&OSCR0) : (&_PXAREG_OFFSET(&OSCR4,(((_ch) - 4) << 2)))) 
+#define OSMR(_ch) *(((_ch) < 4) ? (&_PXAREG_OFFSET(&OSMR0,((_ch) << 2))) \
+				: (&_PXAREG_OFFSET(&OSMR4,(((_ch) - 4) << 2))))
+#define OMCR(_ch) _PXAREG_OFFSET(&OMCR4,(((_ch) - 4) << 2))
+
+#define OMCR_N		(1 << 9)	/* Channel 9 & 11 Snapshot Mode */
+#define OMCR_C		(1 << 7)	/* Channel 4-7 Match Against */
+#define OMCR_P		(1 << 6)	/* Periodic Timer */
+#define OMCR_S_NONE	(0 << 4)	/* No External Sync */
+#define OMCR_S_EXT_SYNC_0 (1 << 4)	/* Ext Sync Reset OSCRx on rising edge EXT_SYNC<0> */
+#define OMCR_S_EXT_SYNC_1 (2 << 4)	/* Ext Sync Reset OSCRx on rising edge EXT_SYNC<1> */
+#define OMCR_R		(1 << 3)	/* Match Reset on match */	
+#define OMCR_CRES(_x)	((((_x) & 0x8) << 5) | (((_x) & 0x7) << 0))	/* Match counter resolution */
+
+#define OWER_WME	(1 << 0)	/* Watchdog Match Enable */
+
+#define OIER_E11	(1 << 11)	/* Interrupt enable channel 11 */
+#define OIER_E10	(1 << 10)	/* Interrupt enable channel 10 */
+#define OIER_E9		(1 << 9)	/* Interrupt enable channel 9 */
+#define OIER_E8		(1 << 8)	/* Interrupt enable channel 8 */
+#define OIER_E7		(1 << 7)	/* Interrupt enable channel 7 */
+#define OIER_E6		(1 << 6)	/* Interrupt enable channel 6 */
+#define OIER_E5		(1 << 5)	/* Interrupt enable channel 5 */
+#define OIER_E4		(1 << 4)	/* Interrupt enable channel 4 */
+#define OIER_E3		(1 << 3)	/* Interrupt enable channel 3 */
+#define OIER_E2		(1 << 2)	/* Interrupt enable channel 2 */
+#define OIER_E1		(1 << 1)	/* Interrupt enable channel 1 */
+#define OIER_E0		(1 << 0)	/* Interrupt enable channel 0 */
+
+#define OSSR_M11	(1 << 11)	/* Match status channel 11 */
+#define OSSR_M10	(1 << 10)	/* Match status channel 10 */
+#define OSSR_M9		(1 << 9)	/* Match status channel 9 */
+#define OSSR_M8		(1 << 8)	/* Match status channel 8 */
+#define OSSR_M7		(1 << 7)	/* Match status channel 7 */
+#define OSSR_M6		(1 << 6)	/* Match status channel 6 */
+#define OSSR_M5		(1 << 5)	/* Match status channel 5 */
+#define OSSR_M4		(1 << 4)	/* Match status channel 4 */
+#define OSSR_M3		(1 << 3)	/* Match status channel 3 */
+#define OSSR_M2		(1 << 2)	/* Match status channel 2 */
+#define OSSR_M1		(1 << 1)	/* Match status channel 1 */
+#define OSSR_M0		(1 << 0)	/* Match status channel 0 */
+
+
+/******************************************************************************/
+/* Pulse-Width Modulation */
+/******************************************************************************/
+#define PWMCR0	_PXAREG(0x40B00000) /* PWM 0 Control register 23-7 */
+#define PWMDCR0	_PXAREG(0x40B00004) /* PWM 0 Duty Cycle register 23-8 */
+#define PWMPCR0	_PXAREG(0x40B00008) /* PWM 0 Period register 23-9 */
+#define PWMCR2	_PXAREG(0x40B00010) /* PWM 2 Control register 23-7 */
+#define PWMDCR2	_PXAREG(0x40B00014) /* PWM 2 Duty Cycle register 23-8 */
+#define PWMPCR2	_PXAREG(0x40B00018) /* PWM 2 Period register 23-9 */
+#define PWMCR1	_PXAREG(0x40C00000) /* PWM 1 Control register 23-7 */
+#define PWMDCR1	_PXAREG(0x40C00004) /* PWM 1 Duty Cycle register 23-8 */
+#define PWMPCR1	_PXAREG(0x40C00008) /* PWM 1 Period register 23-9 */
+#define PWMCR3	_PXAREG(0x40C00010) /* PWM 3 Control register 23-7 */
+#define PWMDCR3	_PXAREG(0x40C00014) /* PWM 3 Duty Cycle register 23-8 */
+#define PWMPCR3	_PXAREG(0x40C00018) /* PWM 3 Period register 23-9 */
+
+
+/******************************************************************************/
+/* Interrupt Controller */
+/******************************************************************************/
+#define ICIP	_PXAREG(0x40D00000) /* Interrupt Controller IRQ Pending register 25-11 */
+#define ICMR	_PXAREG(0x40D00004) /* Interrupt Controller Mask register 25-20 */
+#define ICLR	_PXAREG(0x40D00008) /* Interrupt Controller Level register 25-24 */
+#define ICFP	_PXAREG(0x40D0000C) /* Interrupt Controller FIQ Pending register 25-15 */
+#define ICPR	_PXAREG(0x40D00010) /* Interrupt Controller Pending register 25-6 */
+#define ICCR	_PXAREG(0x40D00014) /* Interrupt Controller Control register 25-27 */
+#define ICHP	_PXAREG(0x40D00018) /* Interrupt Controller Highest Priority register 25-30 */
+#define IPR(_x) _PXAREG_OFFSET(0x40D0001C,(((_x) & 0x1F) << 2)) /* Interupt Priority Registers 25-29 */
+#define ICIP2	_PXAREG(0x40D0009C) /* Interrupt Controller IRQ Pending register 2 25-10 */
+#define ICMR2	_PXAREG(0x40D000A0) /* Interrupt Controller Mask register 2 25-23 */
+#define ICLR2	_PXAREG(0x40D000A4) /* Interrupt Controller Level register 2 25-27 */
+#define ICFP2	_PXAREG(0x40D000A8) /* Interrupt Controller FIQ Pending register 2 25-19 */
+#define ICPR2	_PXAREG(0x40D000AC) /* Interrupt Controller Pending register 2 25-6 */
+
+#define IPR_VALID	(1 << 31) 
+
+#define ICCR_DIM	(1 << 0)
+
+// Interrupt Controller Shortcuts 
+// Argument _id is a peripheral ID number
+#define _PPID_Bit(_id)	(1 << ((_id) & 0x1f))
+#define _ICIP(_id)	*(((_id) & 0x20) ? (&ICIP2) : (&ICIP))
+#define _ICMR(_id)	*(((_id) & 0x20) ? (&ICMR2) : (&ICMR))
+#define _ICLR(_id)	*(((_id) & 0x20) ? (&ICLR2) : (&ICLR))
+#define _ICFP(_id)	*(((_id) & 0x20) ? (&ICFP2) : (&ICFP))
+#define _ICPR(_id)	*(((_id) & 0x20) ? (&ICPR2) : (&ICPR))
+
+// Peripheral IDs
+#define PPID_CIF	(33)	/* Quick Capture Interface */
+#define PPID_RTC_AL	(31)	/* RTC Alarm */
+#define PPID_RTC_HZ	(30)	/* RTC 1 Hz Clock */
+#define PPID_OST_3	(29)	/* OS Timer 3 */
+#define PPID_OST_2	(28)	/* OS Timer 2 */
+#define PPID_OST_1	(27)	/* OS Timer 1 */
+#define PPID_OST_0	(26)	/* OS Timer 0 */
+#define PPID_DMAC 	(25)	/* DMA Controller */
+#define PPID_SSP1	(24)	/* SSP 1 */
+#define PPID_MMC	(23)	/* Flash Card Interface/MMC */
+#define PPID_FFUART	(22)	/* FFUART */
+#define PPID_BTUART	(21)	/* BTUART */
+#define PPID_STUART	(20)	/* STUART */
+#define PPID_ICP	(19)	/* Infrared Comm. Port*/
+#define	PPID_I2C	(18)	/* I2C */
+#define PPID_LCD	(17)	/* LCD */
+#define PPID_SSP2	(16)	/* SSP 2 */
+#define PPID_USIM	(15)	/* SmartCard Interface */
+#define PPID_AC97	(14)	/* AC '97 */
+#define PPID_I2S	(13)	/* I2S */
+#define PPID_PMU	(12)	/* Performance Monitor */
+#define PPID_USBC	(11)	/* USB Client */
+#define PPID_GPIO_X	(10)	/* GPIO except GPIO<1> or GPIO<0> */
+#define PPID_GPIO_1	(9)	/* GPIO<1> */
+#define PPID_GPIO_0	(8)	/* GPIO<0> */
+#define PPID_OST_4_11	(7)	/* OS Timer Channel 4 - 11 */
+#define PPID_PWR_I2C	(6)	/* Power I2C */
+#define PPID_MEM_STK	(5)	/* Memory Stick*/
+#define PPID_KEYPAD	(4)	/* Keypad */
+#define PPID_USBH1	(3)	/* USB Host 1 */
+#define PPID_USBH2	(2)	/* USB Host 2 */
+#define PPID_MSL	(1)	/* MSL */
+#define PPID_SSP3	(0)	/* SSP 3 */
+
+
+/******************************************************************************/
+/* General-Purpose I/O (GPIO) Controller */
+/******************************************************************************/
+#define GPLR0	_PXAREG(0x40E00000) /* GPIO Pin-Level register GPIO<31:0> 24-28 */
+#define GPLR1	_PXAREG(0x40E00004) /* GPIO Pin-Level register GPIO<63:32> 24-28 */
+#define GPLR2	_PXAREG(0x40E00008) /* GPIO Pin-Level register GPIO<95:64> 24-28 */
+#define GPDR0	_PXAREG(0x40E0000C) /* GPIO Pin Direction register GPIO<31:0> 24-11 */
+#define GPDR1	_PXAREG(0x40E00010) /* GPIO Pin Direction register GPIO<63:32> 24-11 */
+#define GPDR2	_PXAREG(0x40E00014) /* GPIO Pin Direction register GPIO<95:64> 24-11 */
+#define GPSR0	_PXAREG(0x40E00018) /* GPIO Pin Output Set register GPIO<31:0> 24-14 */
+#define GPSR1	_PXAREG(0x40E0001C) /* GPIO Pin Output Set register GPIO<63:32> 24-14 */
+#define GPSR2	_PXAREG(0x40E00020) /* GPIO Pin Output Set register GPIO<95:64> 24-14 */
+#define GPCR0	_PXAREG(0x40E00024) /* GPIO Pin Output Clear register GPIO<31:0> 24-14 */
+#define GPCR1	_PXAREG(0x40E00028) /* GPIO Pin Output Clear register GPIO <63:32> 24-14 */
+#define GPCR2	_PXAREG(0x40E0002C) /* GPIO pin Output Clear register GPIO <95:64> 24-14 */
+#define GRER0	_PXAREG(0x40E00030) /* GPIO Rising-Edge Detect Enable register GPIO<31:0> 24-18 */
+#define GRER1	_PXAREG(0x40E00034) /* GPIO Rising-Edge Detect Enable register GPIO<63:32> 24-18 */
+#define GRER2	_PXAREG(0x40E00038) /* GPIO Rising-Edge Detect Enable register GPIO<95:64> 24-18 */
+#define GFER0	_PXAREG(0x40E0003C) /* GPIO Falling-Edge Detect Enable register GPIO<31:0> 24-18 */
+#define GFER1	_PXAREG(0x40E00040) /* GPIO Falling-Edge Detect Enable register GPIO<63:32> 24-18 */
+#define GFER2	_PXAREG(0x40E00044) /* GPIO Falling-Edge Detect Enable register GPIO<95:64> 24-18 */
+#define GEDR0	_PXAREG(0x40E00048) /* GPIO Edge Detect Status register GPIO<31:0> 24-30 */
+#define GEDR1	_PXAREG(0x40E0004C) /* GPIO Edge Detect Status register GPIO<63:32> 24-30 */
+#define GEDR2	_PXAREG(0x40E00050) /* GPIO Edge Detect Status register GPIO<95:64> 24-30 */
+#define GAFR0_L	_PXAREG(0x40E00054) /* GPIO Alternate Function register GPIO<15:0> 24-23 */
+#define GAFR0_U	_PXAREG(0x40E00058) /* GPIO Alternate Function register GPIO<31:16> 24-23 */
+#define GAFR1_L	_PXAREG(0x40E0005C) /* GPIO Alternate Function register GPIO<47:32> 24-23 */
+#define GAFR1_U	_PXAREG(0x40E00060) /* GPIO Alternate Function register GPIO<63:48> 24-23 */
+#define GAFR2_L	_PXAREG(0x40E00064) /* GPIO Alternate Function register GPIO<79:64> 24-23 */
+#define GAFR2_U	_PXAREG(0x40E00068) /* GPIO Alternate Function register GPIO <95:80> 24-23 */
+#define GAFR3_L	_PXAREG(0x40E0006C) /* GPIO Alternate Function register GPIO<111:96> 24-23 */
+#define GAFR3_U	_PXAREG(0x40E00070) /* GPIO Alternate Function register GPIO<120:112> 24-23 */
+
+#define GPLR3	_PXAREG(0x40E00100) /* GPIO Pin-Level register GPIO<120:96> 24-28 */
+#define GPDR3	_PXAREG(0x40E0010C) /* GPIO Pin Direction register GPIO<120:96> 24-11 */
+#define GPSR3	_PXAREG(0x40E00118) /* GPIO Pin Output Set register GPIO<120:96> 24-14 */
+#define GPCR3	_PXAREG(0x40E00124) /* GPIO Pin Output Clear register GPIO<120:96> 24-14 */
+#define GRER3	_PXAREG(0x40E00130) /* GPIO Rising-Edge Detect Enable register GPIO<120:96> 24-18 */
+#define GFER3	_PXAREG(0x40E0013C) /* GPIO Falling-Edge Detect Enable register GPIO<120:96> 24-18 */
+#define GEDR3	_PXAREG(0x40E00148) /* GPIO Edge Detect Status register GPIO<120:96> 24-18 */
+
+// GPIO Shortcuts
+#define GPLR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPLR0, ((_gpio) & 0x60) >> 3)) : (&GPLR3))
+#define GPDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPDR0, ((_gpio) & 0x60) >> 3)) : (&GPDR3))
+#define GPSR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPSR0, ((_gpio) & 0x60) >> 3)) : (&GPSR3))
+#define GPCR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPCR0, ((_gpio) & 0x60) >> 3)) : (&GPCR3))
+#define GRER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GRER0, ((_gpio) & 0x60) >> 3)) : (&GRER3))
+#define GFER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GFER0, ((_gpio) & 0x60) >> 3)) : (&GFER3))
+#define GEDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GEDR0, ((_gpio) & 0x60) >> 3)) : (&GEDR3))
+#define GAFR(_gpio) (_PXAREG_OFFSET(0x40E00054, ((_gpio) & 0x70) >> 2))
+
+// These provide the correct bit/function placement in a SINGLE register
+#define _GPIO_bit(_gpio)  (1 << ((_gpio) & 0x1f))
+#define _GPIO_fn(_gpio,_fn)	((_fn) << (((_gpio) & 0x0f) << 1))
+
+#define _GPIO_setaltfn(_gp,_fn) \
+   GAFR((_gp)) = ((GAFR((_gp)) & ~(_GPIO_fn((_gp),3))) | (_GPIO_fn((_gp),(_fn))))
+
+#define _GPIO_getaltfun(_gp) \
+   ((GAFR((_gp)) & (_GPIO_fn((_gp),0x3))) >> (((_gp) & 0x0f) << 1))
+
+#define GPIO_OUT 1
+#define GPIO_IN 0
+
+#define _PXA_setaltfn(_gp,_fn,_dir) \
+{ GPDR(_gp) = (_dir==GPIO_OUT)? (GPDR(_gp) |  _GPIO_bit(_gp)) : (GPDR(_gp) & ~_GPIO_bit(_gp)); _GPIO_setaltfn(_gp,_fn);}
+
+#define _PXA_setgpio(_gp) \
+{GPSR(_gp) = _GPIO_bit(_gp);}
+
+#define _PXA_clrgpio(_gp) \
+{GPCR(_gp) = _GPIO_bit(_gp);}
+
+/******************************************************************************/
+/* Power Manager and Reset Control */
+/******************************************************************************/
+#define PMCR	_PXAREG(0x40F00000) /* Power Manager Control register 3-67 */
+#define PSSR	_PXAREG(0x40F00004) /* Power Manager Sleep Status register 3-69 */
+#define PSPR	_PXAREG(0x40F00008) /* Power Manager Scratch Pad register 3-72 */
+#define PWER	_PXAREG(0x40F0000C) /* Power Manager Wake-Up Enable register 3-73 */
+#define PRER	_PXAREG(0x40F00010) /* Power Manager Rising-Edge Detect Enable register 3-76 */
+#define PFER	_PXAREG(0x40F00014) /* Power Manager Falling-Edge Detect Enable register 3-77 */
+#define PEDR	_PXAREG(0x40F00018) /* Power Manager Edge-Detect Status register 3-78 */
+#define PCFR	_PXAREG(0x40F0001C) /* Power Manager General Configuration register 3-79 */
+#define PGSR0	_PXAREG(0x40F00020) /* Power Manager GPIO Sleep State register for GPIO<31:0> 3-82 */
+#define PGSR1	_PXAREG(0x40F00024) /* Power Manager GPIO Sleep State register for GPIO<63:32> 3-82 */
+#define PGSR2	_PXAREG(0x40F00028) /* Power Manager GPIO Sleep State register for GPIO<95:64> 3-82 */
+#define PGSR3	_PXAREG(0x40F0002C) /* Power Manager GPIO Sleep State register for GPIO<120:96> 3-82 */
+#define RCSR	_PXAREG(0x40F00030) /* Reset Controller Status register 3-83 */
+#define PSLR	_PXAREG(0x40F00034) /* Power Manager Sleep Configuration register 3-84 */
+#define PSTR	_PXAREG(0x40F00038) /* Power Manager Standby Configuration register 3-87 */
+#define PVCR	_PXAREG(0x40F00040) /* Power Manager Voltage Change Control register 3-88 */
+#define PUCR	_PXAREG(0x40F0004C) /* Power Manager USIM Card Control/Status register 3-89 */
+#define PKWR	_PXAREG(0x40F00050) /* Power Manager Keyboard Wake-Up Enable register 3-91 */
+#define PKSR	_PXAREG(0x40F00054) /* Power Manager Keyboard Level-Detect Status register 3-92 */
+#define PCMD(_x) _PXAREG_OFFSET(0x40F00080,((_x) << 2)) /* Power Manager I2C Command Register File */
+
+#define PMCR_INTRS	(1 << 5)	/* Interrupt Status */
+#define PMCR_IAS	(1 << 4)	/* Interrupt/Abort Select */
+#define PMCR_VIDAS	(1 << 3)	/* Imprecise-Data-Abort Status for nVDD_FAULT */
+#define PMCR_VIDAE	(1 << 2)	/* Imprecise-Data-Abort Enable for nVDD_FAULT */
+#define PMCR_BIDAS	(1 << 1)	/* Imprecise-Data-Abort Status for nBATT_FAULT */
+#define PMCR_BIDAE	(1 << 0)	/* Imprecise-Data-Abort Enable for nBATT_FAULT */
+
+#define PSSR_OTGPH	(1 << 6)	/* OTG Peripheral Control Hold */
+#define PSSR_RDH	(1 << 5)	/* Read Disable Hold */
+#define PSSR_PH		(1 << 4)	/* Peripheral Control Hold */
+#define PSSR_STS	(1 << 3)	/* Standby Mode Status */
+#define PSSR_VFS	(1 << 2)	/* VDD Fault Status */
+#define PSSR_BFS	(1 << 1)	/* Battery Fault Status */
+#define PSSR_SSS	(1 << 0)	/* Software Sleep Status */
+
+#define PWER_WERTC	(1 << 31)	/* Wake-up Enable for RTC Standby, Sleep or Deep-Sleep Mode */
+#define PWER_WEP1	(1 << 30)	/* Wake-up Enable for PI Power Domain Standby or Deep-Sleep Mode */
+#define PWER_WEUSBH2	(1 << 28)	/* Wake-up Enable for USB Host Port 2 Standby or Sleep Mode */
+#define PWER_WEUSBH1	(1 << 27)	/* Wake-up Enable for USB Host Port 1 Standby or Sleep Mode */
+#define PWER_WEUSBC	(1 << 26)	/* Wake-up Enable for USB Client Port Standby or Sleep Mode */
+#define PWER_WBB        (1 << 25)	/* Wake-up Enable for a Rising Edge from MSL or Sleep Mode */
+#define PWER_WE35	(1 << 24)	/* Wake-up Enable for GPIO<35> for Standby or Sleep Mode */
+#define PWER_WEUSIM	(1 << 23)	/* Wake-up Enable for Rising or Falling Edge from UDET for Standby or Sleep Mode */
+#define PWER_WEMUX3_GPIO31 (1 << 19)	/* Wake-up Enable due to GPIO<31> for Standby and Sleep Modes */
+#define PWER_WEMUX3_GPIO113 (2 << 19)   /* Wake-up Enable due to GPIO<113> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO38 (0x2 << 16)  /* Wake-up Enable due to GPIO<38> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO53 (0x3 << 16)  /* Wake-up Enable due to GPIO<53> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO40 (0x4 << 16)  /* Wake-up Enable due to GPIO<40> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO36 (0x5 << 15)  /* Wake-up Enable due to GPIO<36> for Standby and Sleep Modes */
+#define PWER_WE15	(1 << 15)	/* Wake-up Enables for GPIO for Standby or Sleep Mode */
+#define PWER_WE14	(1 << 14)
+#define PWER_WE13	(1 << 13)
+#define PWER_WE12	(1 << 12)
+#define PWER_WE11	(1 << 11)
+#define PWER_WE10	(1 << 10)
+#define PWER_WE9	(1 << 9)
+#define PWER_WE4	(1 << 4)
+#define PWER_WE3	(1 << 3)
+#define PWER_WE1	(1 << 1)
+#define PWER_WE0	(1 << 0)
+
+#define PRER_RE1	(1 << 1)
+
+#define PFER_RE1	(1 << 1)
+
+#define PCFR_RO		(1 << 15)	/* RDH Override */
+#define PCFR_PO		(1 << 14)	/* PH Override */
+#define PCFR_GPROD	(1 << 12)	/* GPIO nRESET_OUT Disable */
+#define PCFR_L1_EN	(1 << 11)	/* Sleep MOde/Deep-Sleep Linear Regulator Enable */
+#define PCFR_FVC	(1 << 10)	/* Frequency/Voltage Change */
+#define PCFR_DC_EN	(1 << 7)	/* Sleep/Deep-sleep DC-DC Converter Enable */
+#define PCFR_PI2C_EN	(1 << 6)	/* Power Manager I2C Enable */
+#define PCFR_GPR_EN	(1 << 4)	/* nRESET_GPIO Pin Enable */
+#define PCFR_FS		(1 << 2)	/* Float Static Chip Selects During Sleep Mode */
+#define PCFR_FP		(1 << 1)	/* Float PC Card Pins During Sleep or Deep-Sleep Mode */
+#define PCFR_OPDE	(1 << 0)	/* 13MHz Processor Oscillator Power-Down Enable */
+
+#define RCSR_GPR	(1 << 3)	/* GPIO Reset */
+#define RCSR_SMR	(1 << 2)	/* Sleep Mode */
+#define RCSR_WDR	(1 << 1)	/* Watchdog Reset */
+#define RCSR_HWR	(1 << 0)	/* Hardware Reset */
+
+#define PCMD_MBC	(1 << 12)	/* Multi-Byte Command */
+#define PCMD_DCE	(1 << 11)	/* Delay Command Execution */
+#define PCMD_LC		(1 << 10)	/* Last command */
+#define PCMD_SQC_CONT	(0 << 8)	/* Sequence Configuration Continue */
+#define PCMD_SQC_PAUSE	(1 << 8)	/* Sequence Configuration Pause */
+#define PCMD_DATA(_x)	(((_x) & 0xFF)) /* Command Data */
+
+#define PSLR_SYS_DEL(_x) (((_x) & 0xf) << 28) /* High voltage ramp delay */
+#define PSLR_PWR_DEL(_x) (((_x) & 0xf) << 24) /* Low voltage ramp delay */
+#define PSLR_PSSD 	(1 << 23)	      /* Shorten wake-up delay */
+#define PSLR_IVF 	(1 << 22)	      /* Ignore VDD_FAULT */
+#define PSLR_SL_ROD 	(1 << 20)	      /*  Don't assert nRESET_OUT */
+#define PSLR_SL_R3 	(1 << 11)	      /* SRAM bank 3 retains state */
+#define PSLR_SL_R2 	(1 << 10)	      /* SRAM bank 2 retains state */
+#define PSLR_SL_R1 	(1 << 9)	      /* SRAM bank 1 retains state */
+#define PSLR_SL_R0 	(1 << 8)	      /* SRAM bank 0 retains state */
+#define PSLR_SL_PI(_x) (((_x) & 0x3) << 2)    /* PI power domain */
+
+#define PWRMODE_M_NORMAL	(0)
+#define PWRMODE_M_IDLE		(1)
+#define PWRMODE_M_STANDBY	(2)
+#define PWRMODE_M_SLEEP		(3)
+#define PWRMODE_M_DEEPSLEEP	(4)
+#define PWRMODE_VC	(1 << 3)	/* Voltage Change */
+
+/******************************************************************************/
+/* Power Manager I2C */
+/******************************************************************************/
+#define PIBMR	_PXAREG(0x40F00180) /* Power Manager I2C Bus Monitor register 9-30 */
+#define PIDBR	_PXAREG(0x40F00188) /* Power Manager I2C Data Buffer register 9-29 */
+#define PICR	_PXAREG(0x40F00190) /* Power Manager I2C Control register 9-23 */
+#define PISR	_PXAREG(0x40F00198) /* Power Manager I2C Status register 9-26 */
+#define PISAR	_PXAREG(0x40F001A0) /* Power Manager I2C Slave Address register 9-28 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 1 */
+/******************************************************************************/
+#define SSCR0_1	_PXAREG(0x41000000) /* SSP 1 Control register 0 8-25 */
+#define SSCR1_1	_PXAREG(0x41000004) /* SSP 1 Control register 1 8-29 */
+#define SSSR_1	_PXAREG(0x41000008) /* SSP 1 Status register 8-43 */
+#define SSITR_1	_PXAREG(0x4100000C) /* SSP 1 Interrupt Test register 8-42 */
+#define SSDR_1	_PXAREG(0x41000010) /* SSP 1 Data Write register/Data Read register 8-48 */
+
+#define SSTO_1	_PXAREG(0x41000028) /* SSP 1 Time-Out register 8-41 */
+#define SSPSP_1	_PXAREG(0x4100002C) /* SSP 1 Programmable Serial Protocol 8-39 */
+#define SSTSA_1	_PXAREG(0x41000030) /* SSP1 TX Timeslot Active register 8-48 */
+#define SSRSA_1	_PXAREG(0x41000034) /* SSP1 RX Timeslot Active register 8-49 */
+#define SSTSS_1	_PXAREG(0x41000038) /* SSP1 Timeslot Status register 8-50 */
+#define SSACD_1	_PXAREG(0x4100003C) /* SSP1 Audio Clock Divider register 8-51 */
+
+// SSP Bit positions. THESE ARE ALSO VALID FOR SSP2 AND SSP3
+#define SSCR0_MOD	(1 << 31)	  /* Mode Network Mode Enable */
+#define SSCR0_ACS	(1 << 30)	  /* Audio Clock Select */
+#define SSCR0_FRDC(_x)  (((_x) & 0x7) << 24)      /* Frame Rate Divider Control value */
+#define SSCR0_TIM	(1 << 23)	  /* Transmit FIFO underrun interrupt mask */
+#define SSCR0_RIM	(1 << 22)	  /* Receive FIFO overrun interrupt mask */
+#define SSCR0_NCS	(1 << 21)	  /* Network Clock select */
+#define SSCR0_EDSS	(1 << 20)	  /* Extended Data Size select */
+#define SSCR0_SCR(_x)   (((_x) & 0xFFF) << 8)	  /* Serial Clock Rate */
+#define SSCR0_SSE	(1 << 7)	  /* Synchronous Serial Enable */
+#define SSCR0_ECS	(1 << 6)	  /* External Clock select */
+#define SSCR0_FRF(_x)	(((_x) & 0x3) << 4)	  /* Frame Format */
+#define SSCR0_DSS(_x)	(((_x) & 0xF) << 0)	  /* Data Size Select */
+
+#define SSCR1_TTELP	(1 << 31)	 /* TXD Tristate Enable on Last Phase */
+#define SSCR1_TTE	(1 << 30)	 /* TXD Tristate Enable */
+#define SSCR1_EBCEI	(1 << 29)	 /* Enable Bit Count Error Interrupt */
+#define SSCR1_SCFR	(1 << 28)	 /* Slave clock Free Running */
+#define SSCR1_ECRA	(1 << 27)	 /* Enable Clock Request A */
+#define SSCR1_ECRB	(1 << 26)	 /* Enable Clock Request B */
+#define SSCR1_SCLKDIR	(1 << 25)	 /* SSPSCLKx Direction */
+#define SSCR1_SFRMDIR	(1 << 24)	 /* SSP Frame Direction */
+#define SSCR1_RWOT	(1 << 23)	 /* Receive Without Transmit */
+#define SSCR1_TRAIL	(1 << 22)	 /* Trailing Byte DMA based */
+#define SSCR1_TSRE	(1 << 21)	 /* Transmit Service Req Enable */
+#define SSCR1_RSRE	(1 << 20)	 /* Receive Service Req. Enable */
+#define SSCR1_TINTE	(1 << 19)	 /* Receiver Time-Out Interupt Enable */
+#define SSCR1_PINTE	(1 << 18)	 /* Peripheral Trailing Byte Interrupt Enable */
+#define SSCR1_IFS	(1 << 16)	 /* Invert Frame Signal */
+#define SSCR1_STRF	(1 << 15)	 /* Select FIFO for EFWR */
+#define SSCR1_EFWR	(1 << 14)	 /* Enable FIFO Write-Read */
+#define SSCR1_RFT(_x)	(((_x) & 0xF) << 10)	 /* Receive FIFO Threshold */
+#define SSCR1_TFT(_x)	(((_x) & 0xF) << 6)	 /* Transmit FIFO Threshold */
+#define SSCR1_MWDS	(1 << 5)	 /* Microwire Transmit Data Size */
+#define SSCR1_SPH	(1 << 4)	 /* Motorola SPI SSPSCLKx Phase */
+#define SSCR1_SPO	(1 << 3)	 /* Motorola SPI SSPSCLKx Polarity */
+#define SSCR1_LBM	(1 << 2)	 /* Loop-back mode */
+#define SSCR1_TIE	(1 << 1)	 /* Transmit FIFO Interrupt Enable */
+#define SSCR1_RIE	(1 << 0)	 /* Receive FIFO Interrupt Enable */
+
+#define SSSR_BCE	(1 << 23)	 /* Bit Count Error */
+#define SSSR_CSS	(1 << 22)	 /* Clock Synch Status */
+#define SSSR_TUR	(1 << 21)	 /* Transmit FIFO Underrun */
+#define SSSR_EOC	(1 << 20)	 /* End of Chain */
+#define SSSR_TINT	(1 << 19)	 /* Time-out Interrupt */
+#define SSSR_PINT	(1 << 18)	 /* Peripheral Trailing Byte Interrupt */
+#define SSSR_RFL	((0xf) << 12)	 /* RX FIFO Level */
+#define SSSR_TFL	((0xf) << 8)	 /* TX FIFO Level */
+#define SSSR_ROR	(1 << 7)	 /* RX FIFO Overrun */
+#define SSSR_RFS	(1 << 6)	 /* Receive FIFO Service */
+#define SSSR_TFS	(1 << 5)	 /* Transmit FIFO Service */
+#define SSSR_BSY	(1 << 4)	 /* SSP Port Busy */
+#define SSSR_RNE	(1 << 3)	 /* RX FIFO Not Empty */
+#define SSSR_TNF	(1 << 2)	 /* TX FIFO Not Full */
+
+#define SSPSP_FSRT      (1 << 25)        /* Frame Sync Relative Timing */
+#define SSPSP_DMYSTOP(_x) (((_x) & 0x3) << 23)	 /* Dummy Stop */
+#define SSPSP_SFRMWDTH(_x)    (((_x) & 0x3F) << 16) /* Serial Frame width*/
+#define SSPSP_SFRMDLY(_x)    (((_x) & 0x7F) << 9) /* Serial Frame delay*/
+#define SSPSP_DMYSTRT(_x)    (((_x) & 0x3) << 7) /* Dummy Start*/
+#define SSPSP_STRTDLY(_x)    (((_x) & 0x7) << 4) /* Start Delay*/
+#define SSPSP_ETDS      (1 << 3)        /* End-of-Transfer Data State*/
+#define SSPSP_SFRMP     (1 << 2)        /* Serial Frame Polarity */
+#define SSPSP_SCMODE(_x)    (((_x) & 0x3)) /* Serial Bit-Rate Clock mode*/
+
+#define SSACD_ACPS(_x)    (((_x) & 0x7) << 4) /* Audio Clock PLL Select */
+#define SSACD_SCDB        (1 << 3) /* Audio Clock PLL Select */
+#define SSACD_ACDS(_x)    (((_x) & 0x7)) /* Audio Clock Divider Select */
+
+
+/******************************************************************************/
+/* MultiMediaCard/SD/SDIO Controller */
+/******************************************************************************/
+#define MMC_STRPCL	_PXAREG(0x41100000) /* MMC Clock Start/Stop register 15-28 */
+#define MMC_STAT	_PXAREG(0x41100004) /* MMC Status register 15-28 */
+#define MMC_CLKRT	_PXAREG(0x41100008) /* MMC Clock Rate register 15-30 */
+#define MMC_SPI	_PXAREG(0x4110000C) /* MMC SPI Mode register 15-30 */
+#define MMC_CMDAT	_PXAREG(0x41100010) /* MMC Command/Data register 15-31 */
+#define MMC_RESTO	_PXAREG(0x41100014) /* MMC Response Time-Out register 15-33 */
+#define MMC_RDTO	_PXAREG(0x41100018) /* MMC Read Time-Out register 15-33 */
+#define MMC_BLKLEN	_PXAREG(0x4110001C) /* MMC Block Length register 15-34 */
+#define MMC_NUMBLK	_PXAREG(0x41100020) /* MMC Number of Blocks register 15-34 */
+#define MMC_PRTBUF	_PXAREG(0x41100024) /* MMC Buffer Partly Full register 15-35 */
+#define MMC_I_MASK	_PXAREG(0x41100028) /* MMC Interrupt Mask register 15-35 */
+#define MMC_I_REG	_PXAREG(0x4110002C) /* MMC Interrupt Request register 15-37 */
+#define MMC_CMD	_PXAREG(0x41100030) /* MMC Command register 15-40 */
+#define MMC_ARGH	_PXAREG(0x41100034) /* MMC Argument High register 15-40 */
+#define MMC_ARGL	_PXAREG(0x41100038) /* MMC Argument Low register 15-41 */
+#define MMC_RES	_PXAREG(0x4110003C) /* MMC Response FIFO 15-41 */
+#define MMC_RXFIFO	_PXAREG(0x41100040) /* MMC Receive FIFO 15-41 */
+#define MMC_TXFIFO	_PXAREG(0x41100044) /* MMC Transmit FIFO 15-42 */
+#define MMC_RDWAIT	_PXAREG(0x41100048) /* MMC RD_WAIT register 15-42 */
+#define MMC_BLKS_REM	_PXAREG(0x4110004C) /* MMC Blocks Remaining register 15-43 */
+
+
+/******************************************************************************/
+/* Clocks Manager */
+/******************************************************************************/
+#define CCCR	_PXAREG(0x41300000) /* Core Clock Configuration register 3-94 */
+#define CKEN	_PXAREG(0x41300004) /* Clock Enable register 3-97 */
+#define OSCC	_PXAREG(0x41300008) /* Oscillator Configuration register 3-98 */
+#define CCSR	_PXAREG(0x4130000C) /* Core Clock Status register 3-100 */
+
+#define CCCR_CPDIS	(1 << 31)	/* Core PLL Output Disable */
+#define CCCR_PPDIS	(1 << 30)	/* Peripheral PLL Output Disable */
+#define CCCR_LCD_26	(1 << 27)	/* LCD Clock Frequency in Deep-Idle or 13M Mode */
+#define CCCR_PLL_EARLY_EN (1 << 26)	/* Early PLL Enable */
+#define CCCR_A		(1 << 25)	/* Alt. Setting for Memory Controller Clock */
+#define CCCR_N_MASK	0x0380		/* Run Mode Frequency to Turbo Mode Frequency Multiplier */
+#define CCCR_M_MASK	0x0060		/* Memory Frequency to Run Mode Frequency Multiplier */
+#define CCCR_L_MASK	0x001f		/* Crystal Frequency to Memory Frequency Multiplier */
+#define CCCR_2N(_x)      (((_x) & 0xf) << 7)
+#define CCCR_L(_x)      (((_x) & 0x1f))
+
+
+#define CKEN24_CIF	(1 << 24)	/* CIF Unit Clock Enable */
+#define CKEN23_SSP1	(1 << 23)	/* SSP1 Unit Clock Enable */
+#define CKEN22_MEMC	(1 << 22)	/* Memory Controller */
+#define CKEN21_MEMS	(1 << 21)	/* Memory Stick Host Controller */
+#define CKEN20_IMEM	(1 << 20)	/* Internal Memory Clock Enable */
+#define CKEN19_KEYP	(1 << 19)	/* Keypad Interface Clock Enable */
+#define CKEN18_USIM	(1 << 18)	/* USIM Unit Clock Enable */
+#define CKEN17_MSL	(1 << 17)	/* MSL Inteface Unit Enable */
+#define CKEN16_LCD	(1 << 16)	/* LCD Unit Clock Enable */
+#define CKEN15_PMI2C	(1 << 15)	/* Pomer Manager I2C Unit Clock Enable */
+#define CKEN14_I2C	(1 << 14)	/* I2C Unit Clock Enable */
+#define CKEN13_IR	(1 << 13)	/* Infrared Port Clock Enable */
+#define CKEN12_MMC	(1 << 12)	/* MMC Unit Clock Enable */
+#define CKEN11_USBC	(1 << 11)	/* USB Unit Clock Enable */
+#define CKEN10_USBH	(1 << 10)	/* USB Unit Clock Enable */
+#define CKEN9_OST	(1 << 9)	/* USB Unit Clock Enable */
+#define CKEN8_I2S	(1 << 8)	/* I2S Unit Clock Enable */
+#define CKEN7_BTUART	(1 << 7)	/* BTUART Unit Clock Enable */
+#define CKEN6_FFUART	(1 << 6)	/* FFUART Unit Clock Enable */
+#define CKEN5_STUART	(1 << 5)	/* STUART Unit Clock Enable */
+#define CKEN4_SSP3	(1 << 4)	/* SSP3 Unit Clock Enable */
+#define CKEN3_SSP2	(1 << 3)	/* SSP2 Unit Clock Enable */
+#define CKEN2_AC97	(1 << 2)	/* AC97 Unit Clock Enable */
+#define CKEN1_PWM1	(1 << 1)	/* PWM1 Clock Enable */
+#define CKEN0_PWM0	(1 << 0)	/* PWM0 Clock Enable */
+
+#define OSCC_OSD(_x)	(((_x) & 0x3) << 5) /* Processor Oscillator Stabilization Delay */
+#define OSCC_CRI	(1 << 4)	/* Clock Request Input Status */
+#define OSCC_PIO_EN	(1 << 3)	/* 13-MHz Processor Oscillator Output Enable */
+#define OSCC_TOUT_EN	(1 << 2)	/* Timekeeping (32.768kHz) Oscillator Output Enable */
+#define OSCC_OON	(1 << 1)	/* 32.768kHz OON (write-once only bit) */
+#define OSCC_OOK	(1 << 0)	/* 32.768kHz OOK (read-only bit) */
+
+#define CCSR_CPDIS_S	(1 << 31)	/* Core PLL Output Disable Status */
+#define CCSR_PPDIS_S	(1 << 30)	/* Peripheral PLL Output Disable Status */
+#define CCSR_CPLCK	(1 << 29)	/* Core PLL Lock */
+#define CCSR_PPLCK	(1 << 28)	/* Peripheral PLL Lock */
+#define CCSR_2N_S_MASK	(0x7 << 7)
+#define CCSR_L_S_MASK	(0x1f << 0)
+
+#define CLKCFG_T    	(1 << 0)      	/* Turbo mode */
+#define CLKCFG_F     	(1 << 1)	/* Frequency change */
+#define CLKCFG_HT	(1 << 2)	/* Half-turbo Mode */
+#define CLKCFG_B     	(1 << 3)	/* Fast-bus mode */
+
+
+/******************************************************************************/
+/* Mobile Scalable Link (MSL) Interface */
+/******************************************************************************/
+#define BBFIFO1	_PXAREG(0x41400004) /* MSL Channel 1 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO2	_PXAREG(0x41400008) /* MSL Channel 2 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO3	_PXAREG(0x4140000C) /* MSL Channel 3 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO4	_PXAREG(0x41400010) /* MSL Channel 4 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO5	_PXAREG(0x41400014) /* MSL Channel 5 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO6	_PXAREG(0x41400018) /* MSL Channel 6 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO7	_PXAREG(0x4140001C) /* MSL Channel 7 Receive/Transmit FIFO register 16-13 */
+
+#define BBCFG1	_PXAREG(0x41400044) /* MSL Channel 1 Configuration register 16-15 */
+#define BBCFG2	_PXAREG(0x41400048) /* MSL Channel 2 Configuration register 16-15 */
+#define BBCFG3	_PXAREG(0x4140004C) /* MSL Channel 3 Configuration register 16-15 */
+#define BBCFG4	_PXAREG(0x41400050) /* MSL Channel 4 Configuration register 16-15 */
+#define BBCFG5	_PXAREG(0x41400054) /* MSL Channel 5 Configuration register 16-15 */
+#define BBCFG6	_PXAREG(0x41400058) /* MSL Channel 6 Configuration register 16-15 */
+#define BBCFG7	_PXAREG(0x4140005C) /* MSL Channel 7 Configuration register 16-15 */
+
+#define BBSTAT1	_PXAREG(0x41400084) /* MSL Channel 1 Status register 16-19 */
+#define BBSTAT2	_PXAREG(0x41400088) /* MSL Channel 2 Status register 16-19 */
+#define BBSTAT3	_PXAREG(0x4140008C) /* MSL Channel 3 Status register 16-19 */
+#define BBSTAT4	_PXAREG(0x41400090) /* MSL Channel 4 Status register 16-19 */
+#define BBSTAT5	_PXAREG(0x41400094) /* MSL Channel 5 Status register 16-19 */
+#define BBSTAT6	_PXAREG(0x41400098) /* MSL Channel 6 Status register 16-19 */
+#define BBSTAT7	_PXAREG(0x4140009C) /* MSL Channel 7 Status register 16-19 */
+
+#define BBEOM1	_PXAREG(0x414000C4) /* MSL Channel 1 EOM register 16-22 */
+#define BBEOM2	_PXAREG(0x414000C8) /* MSL Channel 2 EOM register 16-22 */
+#define BBEOM3	_PXAREG(0x414000CC) /* MSL Channel 3 EOM register 16-22 */
+#define BBEOM4	_PXAREG(0x414000D0) /* MSL Channel 4 EOM register 16-22 */
+#define BBEOM5	_PXAREG(0x414000D4) /* MSL Channel 5 EOM register 16-22 */
+#define BBEOM6	_PXAREG(0x414000D8) /* MSL Channel 6 EOM register 16-22 */
+#define BBEOM7	_PXAREG(0x414000DC) /* MSL Channel 7 EOM register 16-22 */
+
+#define BBIID	_PXAREG(0x41400108) /* MSL Interrupt ID register 16-23 */
+
+#define BBFREQ	_PXAREG(0x41400110) /* MSL Transmit Frequency Select register 10-6 */
+#define BBWAIT	_PXAREG(0x41400114) /* MSL Wait Count register 16-24 */
+#define BBCST	_PXAREG(0x41400118) /* MSL Clock Stop Time register 16-25 */
+#define BBWAKE	_PXAREG(0x41400140) /* MSL Wake-Up register 16-26 */
+#define BBITFC	_PXAREG(0x41400144) /* MSL Interface Width register 10-6 */
+
+
+/******************************************************************************/
+/* Keypad Interface */
+/******************************************************************************/
+#define KPC	_PXAREG(0x41500000) /* Keypad Interface Control register 18-12 */
+#define KPDK	_PXAREG(0x41500008) /* Keypad Interface Direct Key register 18-16 */
+#define KPREC	_PXAREG(0x41500010) /* Keypad Interface Rotary Encoder Count register 18-17 */
+#define KPMK	_PXAREG(0x41500018) /* Keypad Interface Matrix Key register 18-18 */
+#define KPAS	_PXAREG(0x41500020) /* Keypad Interface Automatic Scan register 18-18 */
+#define KPASMKP0	_PXAREG(0x41500028) /* Keypad Interface Automatic Scan Multiple Keypress register 0 18-20 */
+#define KPASMKP1	_PXAREG(0x41500030) /* Keypad Interface Automatic Scan Multiple Keypress register 1 18-20 */
+#define KPASMKP2	_PXAREG(0x41500038) /* Keypad Interface Automatic Scan Multiple Keypress register 2 18-20 */
+#define KPASMKP3	_PXAREG(0x41500040) /* Keypad Interface Automatic Scan Multiple Keypress register 3 18-20 */
+#define KPKDI	_PXAREG(0x41500048) /* Keypad Interface Key Debounce Interval register 18-23 */
+
+
+/******************************************************************************/
+/* Universal Subscriber ID (USIM) Interface */
+/******************************************************************************/
+#define RBR	_PXAREG(0x41600000) /* USIM Receive Buffer register 19-18 */
+#define THR	_PXAREG(0x41600004) /* USIM Transmit Holding register 19-19 */
+#define IER	_PXAREG(0x41600008) /* USIM Interrupt Enable register 19-20 */
+#define IIR	_PXAREG(0x4160000C) /* USIM Interrupt Identification register 19-22 */
+#define FCR	_PXAREG(0x41600010) /* USIM FIFO Control register 19-24 */
+#define FSR	_PXAREG(0x41600014) /* USIM FIFO Status register 19-26 */
+#define ECR	_PXAREG(0x41600018) /* USIM Error Control register 19-27 */
+#define LCR	_PXAREG(0x4160001C) /* USIM Line Control register 19-29 */
+#define USCCR	_PXAREG(0x41600020) /* USIM Card Control register 19-31 */
+#define LSR	_PXAREG(0x41600024) /* USIM Line Status register 19-32 */
+#define EGTR	_PXAREG(0x41600028) /* USIM Extra Guard Time register 19-34 */
+#define BGTR	_PXAREG(0x4160002C) /* USIM Block Guard Time register 19-34 */
+#define TOR	_PXAREG(0x41600030) /* USIM Time-Out register 19-35 */
+#define CLKR	_PXAREG(0x41600034) /* USIM Clock register 19-36 */
+#define DLR	_PXAREG(0x41600038) /* USIM Divisor Latch register 19-37 */
+#define FLR	_PXAREG(0x4160003C) /* USIM Factor Latch register 19-37 */
+#define CWTR	_PXAREG(0x41600040) /* USIM Character Waiting Time register 19-38 */
+#define BWTR	_PXAREG(0x41600044) /* USIM Block Waiting Time register 19-39 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 2 */
+/******************************************************************************/
+#define SSCR0_2	_PXAREG(0x41700000) /* SSP2 Control register 0 8-25 */
+#define SSCR1_2	_PXAREG(0x41700004) /* SSP 2 Control register 1 8-29 */
+#define SSSR_2	_PXAREG(0x41700008) /* SSP 2 Status register 8-43 */
+#define SSITR_2	_PXAREG(0x4170000C) /* SSP 2 Interrupt Test register 8-42 */
+#define SSDR_2	_PXAREG(0x41700010) /* SSP 2 Data Write register/Data Read register 8-48 */
+#define SSTO_2	_PXAREG(0x41700028) /* SSP 2 Time-Out register 8-41 */
+#define SSPSP_2	_PXAREG(0x4170002C) /* SSP 2 Programmable Serial Protocol 8-39 */
+#define SSTSA_2	_PXAREG(0x41700030) /* SSP2 TX Timeslot Active register 8-48 */
+#define SSRSA_2	_PXAREG(0x41700034) /* SSP2 RX Timeslot Active register 8-49 */
+#define SSTSS_2	_PXAREG(0x41700038) /* SSP2 Timeslot Status register 8-50 */
+#define SSACD_2	_PXAREG(0x4170003C) /* SSP2 Audio Clock Divider register 8-51 */
+
+
+/******************************************************************************/
+/* Memory Stick Host Controller */
+/******************************************************************************/
+#define MSCMR	_PXAREG(0x41800000) /* MSHC Command register 17-8 */
+#define MSCRSR	_PXAREG(0x41800004) /* MSHC Control and Status register 17-9 */
+#define MSINT	_PXAREG(0x41800008) /* MSHC Interrupt and Status register 17-10 */
+#define MSINTEN	_PXAREG(0x4180000C) /* MSHC Interrupt Enable register 17-11 */
+#define MSCR2	_PXAREG(0x41800010) /* MSHC Control register 2 17-12 */
+#define MSACD	_PXAREG(0x41800014) /* MSHC ACD Command register 17-13 */
+#define MSRXFIFO	_PXAREG(0x41800018) /* MSHC Receive FIFO register 17-14 */
+#define MSTXFIFO	_PXAREG(0x4180001C) /* MSHC Transmit FIFO register 17-15 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 3 */
+/******************************************************************************/
+#define SSCR0_3	_PXAREG(0x41900000) /* SSP 3 Control register 0 8-25 */
+#define SSCR1_3	_PXAREG(0x41900004) /* SSP 3 Control register 1 8-29 */
+#define SSSR_3	_PXAREG(0x41900008) /* SSP 3 Status register 8-43 */
+#define SSITR_3	_PXAREG(0x4190000C) /* SSP 3 Interrupt Test register 8-42 */
+#define SSDR_3	_PXAREG(0x41900010) /* SSP 3 Data Write register/Data Read register 8-48 */
+#define SSTO_3	_PXAREG(0x41900028) /* SSP 3 Time-Out register 8-41 */
+#define SSPSP_3	_PXAREG(0x4190002C) /* SSP 3 Programmable Serial Protocol 8-39 */
+#define SSTSA_3	_PXAREG(0x41900030) /* SSP TX Timeslot Active register 8-48 */
+#define SSRSA_3	_PXAREG(0x41900034) /* SSP RX Timeslot Active register 8-49 */
+#define SSTSS_3	_PXAREG(0x41900038) /* SSP Timeslot Status register 8-50 */
+#define SSACD_3	_PXAREG(0x4190003C) /* SSP Audio Clock Divider register 8-51 */
+
+#endif /* _PXA27X_REGISTER_H */
diff --git a/tos/chips/pxa27x/pxa27x_util.s b/tos/chips/pxa27x/pxa27x_util.s
new file mode 100644
index 00000000..0daef840
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27x_util.s
@@ -0,0 +1,255 @@
+
+.macro CPWAIT  Rd
+        MRC     P15, 0, \Rd, C2, C0, 0       @ arbitrary read of CP15 into register Rd
+        MOV     \Rd, \Rd                     @ wait for it (foward dependency)
+        SUB     PC, PC, #4                   @ branch to next instruction
+.endm
+
+	
+.macro ALLOCATE Rd
+        MCR	P15, 0, \Rd, C7, C2, 5       @ perform line allocation based on Rd
+.endm
+@@@@@@@@@@@@@@@@@@@@@@@@@
+@ to create an assembly function that confirms to AAPCS (or so I think ;o)
+@ .func function name
+@	STMFD R13!, {R4 - R12, LR}..alternatively STMFD R13!, {registers used, LR}
+@	{function body}
+@	LDMFD R13!, {R4 - R12, PC}...must match above with LR replaced by PC
+@ .endfunc
+@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@whether WT or WB is used is determined in mmu_table.s	
+  .extern MMUTable 
+		
+	.equ	MEMORY_CONFIG_BASE,(0x48000000)      
+         .equ	FLASH_SYNC_value, (0x25C3<<1) @ Value to set flash into burst 16 sync mode
+	@.equ	FLASH_SYNC_value, (0x25C2<<1) @ Value to set flash into burst 8 sync mode
+        .equ	FLASH_WRITE,(0x0060)        @ Code for writing to flash
+	.equ	FLASH_READSTATUS,(0x0070)        @ Code for reading status
+        .equ	FLASH_WCONF,(0x0003)        @ Code to confirm write to flash	
+        .equ	FLASH_READ,(0x00FF)	      @ Code to place flash in read mode	
+        .equ	SXCNFG_sync_value,(0x7011)    @ SXCNFG value for burst16 sync flash operation
+	@ .equ	SXCNFG_sync_value,(0x6011)    @ SXCNFG value for burst8  sync flash operation	
+	.equ    SXCNFG_offset,(0x1c)     
+
+	.global initMMU
+	.global initSyncFlash
+	.global enableICache	
+	.global enableDCache
+	.global disableDCache		
+	.global invalidateDCache
+	.global cleanDCache
+	.global globalCleanAndInvalidateDCache
+		
+initSyncFlash:
+	@this function MUST be called after the ICACHE is initialized to work correctly!!!
+	@also, the DCache being on in WB mode will possibly cause this to randomly FAIL!
+.func initSyncFlash
+	STMFD R13!, {R4 - R7, LR}
+	ldr     r1,     =MEMORY_CONFIG_BASE     @ Memory config register base
+        ldr     r2,     =FLASH_SYNC_value	@ Value to set into flash RCR register
+        ldr     r3,     =FLASH_WRITE		@ Write to flash instruction
+        ldr     r4,     =FLASH_WCONF		@ Write to flash confirm instruction
+        ldr     r5,     =FLASH_READ		@ Load "read array" mode command
+        ldr     r6,     =0x0			@ Boot ROM Flash Base address
+        ldr     r7,     =SXCNFG_sync_value	@ SXCNFG Magic number for now
+	b goSyncFlash
+
+@align on cache line so that we fetch the next 8 instructions...	
+.align 5
+goSyncFlash:	
+	@ Now program everything into the Flash and SXCNFG registers
+        str     r7,     [r1, #SXCNFG_offset]		@ Update PXA27x SXCNFG register
+        strh    r3,     [r2]                            @ Yes, the data is on the address bus!
+        strh    r4,     [r2]                            @ Confirm the write to the RCR
+        strh    r5,     [r6]                            @ Place flash back in read mode
+        ldrh    r5,     [r6]                            @ Create a data dependency stall to guarantee write
+        nop                                             @ go to the end of the cache line
+	nop
+        nop
+	LDMFD R13!, {R4 - R7, PC}
+.endfunc
+
+	@assembly routine to init our MMU
+initMMU:
+.func initMMU
+	MRC P15,0,R0,C3,C0,0		@read the domain register into R0
+	ORR R0, R0, #0xFF		@make sure that we completely enable domain 0
+	MCR P15,0,R0,C3,C0,0		@write the domain register
+	CPWAIT R0			@be anal and make sure it completes
+
+	@time to setup the page table base register
+	@LDR R0, =MMUTable		@move the table we want into R0
+	MCR P15, 0, R0, C2, C0		@save it     
+        CPWAIT	R0			@wait it
+
+	@time to enable the MMU!
+        MRC P15,0,R0,C1,C0,0		@get CP15 register 1
+        ORR R0, R0, #0x1		@set the MMU enable bit
+        MCR P15,0,R0,C1,C0,0		@save it
+	CPWAIT	R0			@wait it
+	MOV PC, LR
+.endfunc
+
+enableICache:	
+.func enableICache
+	@icache section
+	@globally unlock the icache
+	MCR P15, 0, R0, C9, C1, 1
+	CPWAIT R0
+
+	@globally unlock the itlb
+	MCR P15, 0, R0, C10, C4, 1
+	CPWAIT R0
+		
+	@invalidate just the icache and BTB....write to P15 C7, C5, 0
+	MCR P15, 0, R0, C7, C5, 0
+	CPWAIT R0
+    
+	@invalidate the iTLB...write to P15 C8, C5, 0
+	MCR P15, 0, R0, c8, c5,	0	@save it
+	CPWAIT R0			@wait it
+    
+	@Enable instruction cache 
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x1000		@set the icache bit
+	MCR P15, 0, R0, C1, C0, 0	@wait it
+	CPWAIT R0
+	
+	@enable the BTB
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x800		@set the btb enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it	
+	CPWAIT R0			@wait it	
+	MOV PC, LR
+.endfunc
+
+
+enableDCache:
+.func enableDCache
+	@globally unlock the dtlb
+	MCR P15, 0, R0, c10, c8, 1
+	CPWAIT R0
+	
+	@globally unlock the dcache
+	MCR P15, 0, R0, C9, c2, 1
+	CPWAIT R0
+	
+	@first invalidate dcache and mini-dcache
+	MCR P15, 0, R0, C7, C6, 0
+	CPWAIT R0
+
+	@invalidate the dTLB...write to P15 C8, C6, 0
+	MCR P15, 0, R0, C8, C6,	0	@save it
+	CPWAIT R0			@wait it
+
+	
+	@ now, enable data cache	
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x4		@set the dcache enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it
+	CPWAIT R0			@wait it
+	MOV PC, LR
+.endfunc
+
+disableDCache:
+.func disableDCache
+@since caching might be WB or WT for a given line, need to invalidate/flush dcache to ensure coherency
+	@globally unlock the dcache
+	STMFD R13!, {R0, LR}
+	MCR P15, 0, R0, C9, c2, 1
+	CPWAIT R0
+
+	@globally clean and invalidate the cache
+	bl globalCleanAndInvalidateDCache
+		
+	@ now, disable data cache	
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	BIC R0, R0, #0x4		@clear the dcache enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it
+	CPWAIT R0			@wait it
+	LDMFD R13!, {R0, LR}
+.endfunc
+
+@function to invalidate the DCCache for a given Buffer
+@funtion take 2 parameters
+@R0 = base virtual address to evict
+@R1 = number of bytes to evict...cache line is 32 bytes
+invalidateDCache:	
+.func invalidateDCache
+	CMPS R1,#0			@check that we're greater than 0
+	MOVLE PC, LR			@return if not
+invalidateDCacheLoop:	
+	MCR P15, 0, R0, C7, C6, 1	@invalidate this line
+	SUBS R1, R1, #32		@subtract out 32 w/CPSR update
+	ADD  R0, R0, #32		@add 32 to the address w/o CPSR update
+	BGT invalidateDCacheLoop	@rerun if subtract is greater than
+	MOV PC, LR
+.endfunc
+
+@function to clean the DCCache for a given Buffer
+@if a line is dirty, it will be cleaned...i.e. written back to memory in WB mode
+@funtion take 2 parameters
+@R0 = base virtual address to evict
+@R1 = number of bytes to evict...cache line is 32 bytes
+cleanDCache:	
+.func cleanDCache
+	CMPS R1,#0			@check that we're greater than 0
+	MOVLE PC, LR			@return if not
+cleanDCacheLoop:	
+	MCR P15, 0, R0, C7, C10, 1	@clean this line
+	SUBS R1, R1, #32		@subtract out 32 w/CPSR update
+	ADD  R0, R0, #32		@add 32 to the address w/o CPSR update
+	BGT cleanDCacheLoop		@rerun if subtract is greater than
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	CPWAIT R0			@wait it
+	MOV PC, LR
+.endfunc
+
+
+@Global Clean/Invalidate THE DATA CACHE
+@R1 contains the virtual address of a region of cacheable memory reserved for
+@this clean operation
+@R0 is the loop count; Iterate 1024 times which is the number of lines in the
+@data cache
+	
+globalCleanAndInvalidateDCache:
+.func globalCleanAndInvalidateDCache
+	@note, this function assumes that we will NEVER have anything physical at
+	@address 0x04000000 corresponds to static chip select 1
+	STMFD R13!, {R0 - R3, LR}
+	LDR R1, =0x04000000	
+	MOV R0, #1024
+LOOP1:
+	
+	ALLOCATE R1 @ Allocate a line at the virtual address
+	@ specified by R1.
+	SUBS R0, R0, #1 @ Decrement loop count
+	ADD R1, R1, #32 @ Increment the address in R1 to the next cache line
+	BNE LOOP1
+	
+	@Clean the Mini-data Cache
+	@ CanÂ’t use line-allocate command, so cycle 2KB of unused data through.
+	@ R2 contains the virtual address of a region of cacheable memory reserved for
+	@ cleaning the Mini-data Cache
+	@ R0 is the loop count; Iterate 64 times which is the number of lines in the
+	@ Mini-data Cache.
+
+	@note, this function assumes that we will NEVER have anything physical at
+	@address 0x05000000 corresponds to static chip select 1
+	LDR R2, =0x05000000	
+	MOV R0, #64
+LOOP2:
+	SUBS R0, R0, #1 @ Decrement loop count
+	LDR R3,[R2],#32 @ Load and increment to next cache line
+	BNE LOOP2
+	
+	@ Invalidate the data cache and mini-data cache
+	MCR P15, 0, R0, C7, C6, 0
+	LDMFD R13!, {R0 - R3, PC}
+.endfunc
+	
+.end
+	
\ No newline at end of file
diff --git a/tos/chips/pxa27x/pxa27xhardware.h b/tos/chips/pxa27x/pxa27xhardware.h
new file mode 100644
index 00000000..a2c36918
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27xhardware.h
@@ -0,0 +1,175 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+
+/*
+ *
+ * Authors:   Philip Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ */
+
+#ifndef PXA27X_HARDWARE_H
+#define PXA27X_HARDWARE_H
+
+#include "arm_defs.h"
+#include "pxa27x_registers.h"
+
+#define _pxa27x_perf_clear() {asm volatile ("mcr p14,0,%0,c0,c1,0\n\t"::"r" (0x5));}
+#define _pxa27x_perf_get(_x) {asm volatile ("mrc p14,0,%0,c1,c1,0":"=r" (_x));}
+
+// External utility functions
+extern void enableICache();
+extern void initSyncFlash();
+
+inline uint32_t _pxa27x_clzui(uint32_t i) {
+  uint32_t count;
+  asm volatile ("clz %0,%1": "=r" (count) : "r" (i));
+  return count;
+}
+
+typedef uint32_t __nesc_atomic_t;
+
+//NOTE...at the moment, these functions will ONLY disable the IRQ...FIQ is left alone
+inline __nesc_atomic_t __nesc_atomic_start(void) __attribute__((spontaneous))
+{
+  uint32_t result = 0;
+  uint32_t temp = 0;
+
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"orr %1,%2,%4\n\t"
+		"msr CPSR_cf,%3"
+		: "=r" (result) , "=r" (temp)
+		: "0" (result) , "1" (temp) , "i" (ARM_CPSR_INT_MASK)
+		);
+  return result;
+}
+
+inline void __nesc_atomic_end(__nesc_atomic_t oldState) __attribute__((spontaneous))
+{
+  uint32_t  statusReg = 0;
+  //make sure that we only mess with the INT bit
+  oldState &= ARM_CPSR_INT_MASK;
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"bic %0, %1, %2\n\t"
+		"orr %0, %1, %3\n\t"
+		"msr CPSR_c, %1"
+		: "=r" (statusReg)
+		: "0" (statusReg),"i" (ARM_CPSR_INT_MASK), "r" (oldState)
+		);
+
+  return;
+}
+
+inline void __nesc_enable_interrupt() {
+
+  uint32_t statusReg = 0;
+
+  asm volatile (
+	       "mrs %0,CPSR\n\t"
+	       "bic %0,%1,#0xc0\n\t"
+	       "msr CPSR_c, %1"
+	       : "=r" (statusReg)
+	       : "0" (statusReg)
+	       );
+  return;
+}
+
+inline void __nesc_disable_interrupt() {
+
+  uint32_t statusReg = 0;
+
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"orr %0,%1,#0xc0\n\t"
+		"msr CPSR_c,%1\n\t"
+		: "=r" (statusReg)
+		: "0" (statusReg)
+		);
+  return;
+
+}
+
+
+inline void __nesc_atomic_sleep()
+{
+  /* 
+   * Atomically enable interrupts and sleep , 
+   * LN : FOR NOW SLEEP IS DISABLED will be adding this functionality shortly
+   */
+  __nesc_enable_interrupt();
+  return;
+}
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+
+/** Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2)? m1: m2;
+}
+
+
+#endif //TOSH_HARDWARE_H
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc
new file mode 100644
index 00000000..f5a48ab9
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SSP.h"
+
+interface HalPXA27xSSPCntl 
+{
+
+  /**
+   *configure the port to be Master of SCLK
+   *
+   *@param enable:  port is master of SCLK if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMasterSCLK(bool enable);
+  
+  /**
+   *configure the port to be Master of SFRM
+   *
+   *@param enable:  port is master of SFRM if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMasterSFRM(bool enable);
+  
+  /**
+   *configure the port to be in ReceiveWithoutTransmit mode
+   *
+   *@param enable:  port only receives if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setReceiveWithoutTransmit(bool enable);
+  
+  /**
+   *configure the port to be in SPI, SSP, Microwire, or PSP modes
+   *
+   *@param format:  format to use...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setSSPFormat(SSPFrameFormat_t format);
+  
+  /**
+   *configure how many bits wide the port should consider 1 sample
+   *
+   *@param width:  bits to use
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setDataWidth(SSPDataWidth_t width);
+  
+  /**
+   *configure the port to invert the SFRM signal
+   *
+   *@param enable:  invert the signal if TRUE, don't invert if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t enableInvertedSFRM(bool enable);
+  
+  /**
+   *configure the depth of the RX FIFO at which point an interrupt is generated
+   *
+   *@param level:  fifo level...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setRxFifoLevel(SSPFifoLevel_t level);
+  
+  /**
+   *configure the depth of the TX FIFO at which point an interrupt is generated
+   *
+   *@param level:  fifo level...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setTxFifoLevel(SSPFifoLevel_t level);
+    
+  /**
+   *configure the width of microwire commands
+   *
+   *@param size:  8 bit or 16 bit commands...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMicrowireTxSize(SSPMicrowireTxSize_t size);
+  
+  
+  /************************************
+   *clk specific configuration routines
+   ************************************/
+  
+  /**
+   *configure the clock divider for the port.
+   *
+   *@param clkdivider:  divider for the port...clk will be 13M/(clkdivider)
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setClkRate(uint16_t clkdivider);
+  
+  /**
+   *configure the Clk Mode of the port. 
+   *
+   *@param mode:  SSP_NORMALMODE for normal operation, SSP_NETWORKMODE for 
+   *              network mode
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setClkMode(SSPClkMode_t mode);
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc
new file mode 100644
index 00000000..84db114e
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc
@@ -0,0 +1,179 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SSP.h"
+
+module HalPXA27xSSPControlP {
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+
+  command error_t HalPXA27xSSPCntl.setMasterSCLK(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SCLKDIR;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_SCLKDIR;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setMasterSFRM(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SFRMDIR;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_SFRMDIR;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setReceiveWithoutTransmit(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RWOT;
+
+    if(enable)
+      valSSCR1 |= SSCR1_RWOT;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setSSPFormat(SSPFrameFormat_t format) {
+    uint32_t valSSCR0;
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_FRF(3);
+
+    call SSP.setSSCR0(valSSCR0 | SSCR0_FRF(format));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setDataWidth(SSPDataWidth_t width) {
+    uint8_t bitEDSS;
+    uint32_t valSSCR0;
+    
+    if(width < 4)
+      return EINVAL;
+
+    // width + 1 = bits to use, don't forget to adjust!
+    width -= 1;
+    bitEDSS = width & 0x10; // keep bit 4
+    width = width & 0xF; // keep bits 0-3
+    
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_DSS(0xF) & ~SSCR0_EDSS;
+    if(bitEDSS)
+      valSSCR0 |= SSCR0_EDSS;
+    valSSCR0 |= SSCR0_DSS(width);
+   
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.enableInvertedSFRM(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_IFS;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_IFS;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setRxFifoLevel(SSPFifoLevel_t level) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RFT(0xF);
+
+    call SSP.setSSCR1(valSSCR1 | SSCR1_RFT(level));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setTxFifoLevel(SSPFifoLevel_t level) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_TFT(0xF);
+
+    call SSP.setSSCR1(valSSCR1 | SSCR1_TFT(level));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setMicrowireTxSize(SSPMicrowireTxSize_t size) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1();
+
+    if(size == UWIRE_16BIT)
+      valSSCR1 |= SSCR1_MWDS;
+    else if(size == UWIRE_8BIT)
+      valSSCR1 &= ~ SSCR1_MWDS;
+    else
+      return FAIL;
+
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setClkRate(uint16_t clkdivider) {
+    uint32_t valSSCR0;
+
+    clkdivider -= 1; // check PXA Dev Manual for why to do this
+
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_SCR(0xFFF);
+    valSSCR0 |= SSCR0_SCR(clkdivider);
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setClkMode(SSPClkMode_t mode) {
+    uint32_t valSSCR0;
+    valSSCR0 = call SSP.getSSCR0();
+
+    if(mode == SSP_NETWORKMODE)
+      valSSCR0 |= SSCR0_NCS;
+    else if(mode == SSP_NORMALMODE)
+      valSSCR0 &= ~SSCR0_NCS;
+    else
+      return FAIL;
+
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  async event void SSP.interruptSSP() {
+    // intentionally left blank, not supposed to handle interrupts
+  }
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc
new file mode 100644
index 00000000..a317dfd7
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc
@@ -0,0 +1,206 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x.
+ * It assumes the Motorola Serial Peripheral Interface format.
+ * Uses DMA for the packet based transfers.
+ * 
+ * @param valSCR The value for the SCR field in the SSCR0 register of the 
+ * associated SSP peripheral.
+ *
+ * @param valDSS The value for the DSS field in the SSCR0 register of the
+ * associated SSP peripheral.
+ * 
+ * @author Phil Buonadonna
+ */
+
+generic module HalPXA27xSpiDMAM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) 
+{
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface SpiPacket[uint8_t instance];
+  }
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation
+{
+  // The BitBuckets need to be 8 bytes. 
+  norace unsigned long long txBitBucket, rxBitBucket;
+  uint8_t *txCurrentBuf, *rxCurrentBuf;
+  uint8_t instanceCurrent;
+  uint32_t lenCurrent;
+
+  command error_t Init.init() {
+
+    txBitBucket = 0, rxBitBucket = 0;
+    txCurrentBuf = rxCurrentBuf = NULL;
+    lenCurrent = 0 ;
+    instanceCurrent = 0;
+
+    call SSP.setSSCR1((SSCR1_TRAIL | SSCR1_RFT(8) | SSCR1_TFT(8)));
+    call SSP.setSSTO(96*8);
+    call SSP.setSSCR0(SSCR0_SCR(valSCR) | SSCR0_SSE | SSCR0_FRF(valFRF) | SSCR0_DSS(valDSS) );
+
+    call TxDMA.setMap(call SSPTxDMAInfo.getMapIndex());
+    call RxDMA.setMap(call SSPRxDMAInfo.getMapIndex());
+    call TxDMA.setDALGNbit(TRUE);
+    call RxDMA.setDALGNbit(TRUE);
+
+    return SUCCESS;
+  }
+
+  async command void SpiByte.write(uint8_t tx, uint8_t* rx) {
+    volatile uint32_t tmp;
+    volatile uint8_t val;
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    } 
+#endif
+    call SSP.setSSDR(tx); 
+
+    while ((call SSP.getSSSR()) & SSSR_BSY);
+
+    val = call SSP.getSSDR();
+
+    if (rx != NULL) *rx = val;
+  }
+
+  async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) {
+    uint32_t tmp;
+    uint32_t txAddr,rxAddr;
+    uint32_t txDMAFlags, rxDMAFlags;
+    error_t error = FAIL;
+
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    }
+#endif 
+
+    atomic {
+      txCurrentBuf = txBuf;
+      rxCurrentBuf = rxBuf;
+      lenCurrent = len;
+      instanceCurrent = instance;
+    }
+
+    txDMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 
+		  | DCMD_LEN(len));
+    rxDMAFlags = (DCMD_FLOWSRC | DCMD_ENDIRQEN | DCMD_BURST8 | DCMD_WIDTH1 
+		  | DCMD_LEN(len));
+
+    if (rxBuf == NULL) { 
+      rxAddr = (uint32_t)&rxBitBucket; 
+    }
+    else {
+      rxAddr = (uint32_t)rxBuf; 
+      rxDMAFlags |= DCMD_INCTRGADDR; 
+    }
+
+    if (txBuf == NULL) {
+      txAddr = (uint32_t)&txBitBucket; 
+    }
+    else {
+      txAddr = (uint32_t)txBuf;
+      txDMAFlags |= DCMD_INCSRCADDR;
+    }
+
+    call RxDMA.setDCSR(DCSR_NODESCFETCH);
+    call RxDMA.setDSADR(call SSPRxDMAInfo.getAddr());
+    call RxDMA.setDTADR(rxAddr);
+    call RxDMA.setDCMD(rxDMAFlags);
+
+    call TxDMA.setDCSR(DCSR_NODESCFETCH);
+    call TxDMA.setDSADR(txAddr);
+    call TxDMA.setDTADR(call SSPTxDMAInfo.getAddr());
+    call TxDMA.setDCMD(txDMAFlags);
+    
+    call SSP.setSSSR(SSSR_TINT);
+    call SSP.setSSCR1((call SSP.getSSCR1()) | SSCR1_RSRE | SSCR1_TSRE);
+
+    call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+    call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+    
+    error = SUCCESS;
+    
+    return error;
+  }
+  
+  async event void RxDMA.interruptDMA() {
+    uint8_t *txBuf,*rxBuf;
+    uint8_t instance;
+    uint32_t len;
+    
+    atomic {
+      instance = instanceCurrent;
+      len = lenCurrent;
+      txBuf = txCurrentBuf;
+      rxBuf = rxCurrentBuf;
+      lenCurrent = 0;
+    }
+    call RxDMA.setDCMD(0);
+    call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+
+    signal SpiPacket.sendDone[instance](txBuf,rxBuf,len,SUCCESS);
+
+    return;
+  }
+
+  async event void TxDMA.interruptDMA() {
+    // The transmit side should NOT generate an interrupt. 
+    call TxDMA.setDCMD(0);
+    call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+    return;
+  }
+
+  async event void SSP.interruptSSP() {
+    // For this Hal, we should never get here normally
+    // Perhaps we should signal any weird errors? For now, just clear the interrupts
+    call SSP.setSSSR(SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | 
+			       SSSR_PINT | SSSR_ROR );
+    return;
+  }
+
+  default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, 
+					      uint16_t len, error_t error) {
+    return;
+  }
+  
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc
new file mode 100644
index 00000000..503576b0
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiPioC(uint8_t valFRF,
+				       uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+  components new HalPXA27xSpiPioM(valFRF, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiPioM;
+  SpiByte = HalPXA27xSpiPioM;
+  SpiPacket = HalPXA27xSpiPioM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiPioM;
+  SSP = HalPXA27xSSPControlP;
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc
new file mode 100644
index 00000000..da9282c8
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc
@@ -0,0 +1,219 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x.
+ * Provides master mode communication for a variety of frame formats, speeds
+ * and data sizes.
+ * 
+ * @param valFRF The frame format to use. 
+ * 
+ * @param valSCR The value for the SSP clock rate.
+ *
+ * @param valDSS The value for the DSS field in the SSCR0 register of the
+ * associated SSP peripheral.
+ * 
+ * @param enableRWOT Enables Receive without transmit mode. Used only for 
+ * the SpiPacket interface. If the txBuf parameter of SpiPacket.send is null
+ * the implementation will continuously clock in data without regard to the 
+ * contents of the TX FIFO.  This is different from the spec for the interface
+ * which requires that the transmitter send zeros (0) for this case.
+ * 
+ * @author Phil Buonadonna
+ */
+
+generic module HalPXA27xSpiPioM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) 
+{
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface SpiPacket[uint8_t instance];
+  }
+  uses {
+    interface HplPXA27xSSP as SSP;
+  }
+}
+
+implementation
+{
+  // The BitBuckets need to be 8 bytes. 
+  norace unsigned long long txBitBucket, rxBitBucket;
+  uint8_t *txCurrentBuf, *rxCurrentBuf;
+  uint8_t instanceCurrent;
+  uint32_t lenCurrent;
+  norace uint32_t flagsSSCR0, flagsSSCR1;
+
+  task void SpiPacketDone() {
+    uint8_t *txBuf,*rxBuf;
+    uint8_t instance;
+    uint32_t len;
+
+    atomic {
+      instance = instanceCurrent;
+      len = lenCurrent;
+      txBuf = txCurrentBuf;
+      rxBuf = rxCurrentBuf;
+      lenCurrent = 0;
+      signal SpiPacket.sendDone[instance](txBuf,rxBuf,len,SUCCESS);
+    }
+    
+    return;
+  }
+
+  command error_t Init.init() {
+
+    txBitBucket = 0, rxBitBucket = 0;
+    txCurrentBuf = rxCurrentBuf = NULL;
+    lenCurrent = 0 ;
+    instanceCurrent = 0;
+
+    flagsSSCR1 = 0;
+    flagsSSCR0 = (SSCR0_SCR(valSCR) | SSCR0_FRF(/*0*/valFRF) | SSCR0_DSS(valDSS) );
+    //call SSP.setSSCR1(0 /*(SSCR1_TRAIL | SSCR1_RFT(8) | SSCR1_TFT(8))*/ );
+    call SSP.setSSCR1(flagsSSCR1);
+    call SSP.setSSTO(96*8);
+    //call SSP.setSSCR0(SSCR0_SCR(valSCR) | SSCR0_SSE | SSCR0_FRF(/*0*/valFRF) | SSCR0_DSS(valDSS) );
+    call SSP.setSSCR0(flagsSSCR0);
+    call SSP.setSSCR0(flagsSSCR0 | SSCR0_SSE);
+
+    return SUCCESS;
+  }
+
+  async command void SpiByte.write(uint8_t tx, uint8_t* rx) {
+    volatile uint32_t tmp;
+    volatile uint8_t val;
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    } 
+#endif
+    call SSP.setSSDR(tx); 
+
+    while ((call SSP.getSSSR()) & SSSR_BSY);
+
+    val = call SSP.getSSDR();
+
+    if (rx != NULL) *rx = val;
+  }
+
+  async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) {
+    uint32_t tmp,i;
+    uint8_t *txPtr,*rxPtr;
+    uint32_t txInc = 1,rxInc = 1;
+    error_t error = FAIL;
+
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    }
+#endif 
+
+    atomic {
+      txCurrentBuf = txBuf;
+      rxCurrentBuf = rxBuf;
+      lenCurrent = len;
+      instanceCurrent = instance;
+    }
+
+    if (rxBuf == NULL) { 
+      rxPtr = (uint8_t *)&rxBitBucket; 
+      rxInc = 0;
+    }
+    else {
+      rxPtr = rxBuf; 
+    }
+
+    if (txBuf == NULL) {
+      txPtr = (uint8_t *)&txBitBucket; 
+      txInc = 0;
+    }
+    else {
+      txPtr = txBuf;
+    }
+
+    if ((txBuf == NULL) && (enableRWOT == TRUE)) {
+
+      call SSP.setSSCR0(flagsSSCR0);
+      call SSP.setSSCR1(flagsSSCR1 | SSCR1_RWOT);
+      call SSP.setSSCR0(flagsSSCR0 | SSCR0_SSE);
+      while (len > 0) {
+	while (!(call SSP.getSSSR() & SSSR_RNE));
+	*rxPtr = call SSP.getSSDR();
+	rxPtr += rxInc;
+	len--;
+      }
+      call SSP.setSSCR0(flagsSSCR0);
+      call SSP.setSSCR1(flagsSSCR1);
+      call SSP.setSSCR0(flagsSSCR0 | SSCR0_SSE);
+    }
+    else {
+      while (len > 16) {
+	for (i = 0;i < 16; i++) {
+	  call SSP.setSSDR(*txPtr);
+	  txPtr += txInc;
+	}
+	while (call SSP.getSSSR() & SSSR_BSY);
+      for (i = 0;i < 16;i++) {
+	*rxPtr = call SSP.getSSDR();
+	rxPtr += rxInc;
+      }
+      len -= 16;
+      }
+      for (i = 0;i < len; i++) {
+	call SSP.setSSDR(*txPtr);
+	txPtr += txInc;
+      }
+      while (call SSP.getSSSR() & SSSR_BSY);
+      for (i = 0;i < len;i++) {
+	*rxPtr = call SSP.getSSDR();
+	rxPtr += rxInc;
+      }
+    }
+    post SpiPacketDone();
+
+    error = SUCCESS;
+    
+    return error;
+  }
+  
+  async event void SSP.interruptSSP() {
+    // For this Hal, we should never get here normally
+    // Perhaps we should signal any weird errors? For now, just clear the interrupts
+    call SSP.setSSSR(SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | 
+			       SSSR_PINT | SSSR_ROR );
+    return;
+  }
+
+  default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, 
+					      uint16_t len, error_t error) {
+    return;
+  }
+  
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc
new file mode 100644
index 00000000..908367d3
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc
@@ -0,0 +1,72 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+interface HplPXA27xSSP 
+{
+  async command void setSSCR0(uint32_t val);
+  async command uint32_t getSSCR0();
+
+  async command void setSSCR1(uint32_t val);
+  async command uint32_t getSSCR1();
+
+  async command void setSSSR(uint32_t val);
+  async command uint32_t getSSSR();
+
+  async command void setSSITR(uint32_t val);
+  async command uint32_t getSSITR();
+
+  async command void setSSDR(uint32_t val);
+  async command uint32_t getSSDR();
+
+  async command void setSSTO(uint32_t val);
+  async command uint32_t getSSTO();
+
+  async command void setSSPSP(uint32_t val);
+  async command uint32_t getSSPSP();
+
+  async command void setSSTSA(uint32_t val);
+  async command uint32_t getSSTSA();
+
+  async command void setSSRSA(uint32_t val);
+  async command uint32_t getSSRSA();
+
+  async command void setSSTSS(uint32_t val);
+  async command uint32_t getSSTSS();
+
+  async command void setSSACD(uint32_t val);
+  async command uint32_t getSSACD();
+
+  async event void interruptSSP();
+
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc
new file mode 100644
index 00000000..51a8ed27
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP1C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAReg;
+    interface HplPXA27xDMAInfo as SSPTxDMAReg;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[1];
+  SSPRxDMAReg = HplPXA27xSSPP.SSPRxDMAInfo[1];
+  SSPTxDMAReg = HplPXA27xSSPP.SSPTxDMAInfo[1];
+
+  HplPXA27xSSPP.Init[1] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP1];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc
new file mode 100644
index 00000000..235da692
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP2C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAReg;
+    interface HplPXA27xDMAInfo as SSPTxDMAReg;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[2];
+  SSPRxDMAReg = HplPXA27xSSPP.SSPRxDMAReg[2];
+  SSPTxDMAReg = HplPXA27xSSPP.SSPTxDMAReg[2];
+
+  HplPXA27xSSPP.Init[2] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP2Irq -> HplPXA27xInterrupM.PXA27xIrq[PPID_SSP2];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc
new file mode 100644
index 00000000..268a22cc
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP3C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+  
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[3];
+  SSPRxDMAInfo = HplPXA27xSSPP.SSPRxDMAInfo[3];
+  SSPTxDMAInfo = HplPXA27xSSPP.SSPTxDMAInfo[3];
+
+  HplPXA27xSSPP.Init[3] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP3];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc
new file mode 100644
index 00000000..61136e9c
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc
@@ -0,0 +1,334 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+module HplPXA27xSSPP 
+{
+  provides {
+    interface Init[uint8_t chnl];
+    interface HplPXA27xSSP[uint8_t chnl];
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo[uint8_t chnl];
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo[uint8_t chnl];
+  }
+  uses {
+    interface HplPXA27xInterrupt as SSP1Irq;
+    interface HplPXA27xInterrupt as SSP2Irq;
+    interface HplPXA27xInterrupt as SSP3Irq;
+  }
+}
+
+implementation 
+{
+
+  command error_t Init.init[uint8_t chnl]() {
+    error_t error = SUCCESS;
+    
+    switch (chnl) {
+    case 1:
+      CKEN |= CKEN23_SSP1;
+      call SSP1Irq.enable(); 
+      break;
+    case 2: 
+      CKEN |= CKEN3_SSP2;
+      call SSP2Irq.enable(); 
+      break;
+    case 3: 
+      CKEN |= CKEN4_SSP3;
+      //call SSP3Irq.allocate();
+      call SSP3Irq.enable(); 
+      break;
+    default: 
+      error = FAIL;
+      break;
+    }
+
+    return error;
+  }
+
+  async command void HplPXA27xSSP.setSSCR0[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSCR0_1 = val; break;
+    case 2: SSCR0_2 = val; break;
+    case 3: SSCR0_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t HplPXA27xSSP.getSSCR0[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSCR0_1; break;
+    case 2: return SSCR0_2; break;
+    case 3: return SSCR0_3; break;
+    default: return 0;
+    }
+   }
+
+  async command void HplPXA27xSSP.setSSCR1[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSCR1_1 = val; break;
+    case 2: SSCR1_2 = val; break;
+    case 3: SSCR1_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSCR1[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSCR1_1; break;
+    case 2: return SSCR1_2; break;
+    case 3: return SSCR1_3; break;
+    default: return 0;
+    }
+  }
+  
+  async command void HplPXA27xSSP.setSSSR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSSR_1 = val; break;
+    case 2: SSSR_2 = val; break;
+    case 3: SSSR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSSR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSSR_1; break;
+    case 2: return SSSR_2; break;
+    case 3: return SSSR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSITR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSITR_1 = val; break;
+    case 2: SSITR_2 = val; break;
+    case 3: SSITR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSITR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSITR_1; break;
+    case 2: return SSITR_2; break;
+    case 3: return SSITR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSDR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSDR_1 = val; break;
+    case 2: SSDR_2 = val; break;
+    case 3: SSDR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSDR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSDR_1; break;
+    case 2: return SSDR_2; break;
+    case 3: return SSDR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTO[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTO_1 = val; break;
+    case 2: SSTO_2 = val; break;
+    case 3: SSTO_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTO[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTO_1; break;
+    case 2: return SSTO_2; break;
+    case 3: return SSTO_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSPSP[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSPSP_1 = val; break;
+    case 2: SSPSP_2 = val; break;
+    case 3: SSPSP_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSPSP[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSPSP_1; break;
+    case 2: return SSPSP_2; break;
+    case 3: return SSPSP_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTSA[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTSA_1 = val; break;
+    case 2: SSTSA_2 = val; break;
+    case 3: SSTSA_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTSA[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTSA_1; break;
+    case 2: return SSTSA_2; break;
+    case 3: return SSTSA_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSRSA[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSRSA_1 = val; break;
+    case 2: SSRSA_2 = val; break;
+    case 3: SSRSA_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSRSA[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSRSA_1; break;
+    case 2: return SSRSA_2; break;
+    case 3: return SSRSA_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTSS[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTSS_1 = val; break;
+    case 2: SSTSS_2 = val; break;
+    case 3: SSTSS_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTSS[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTSS_1; break;
+    case 2: return SSTSS_2; break;
+    case 3: return SSTSS_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSACD[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSACD_1 = val; break;
+    case 2: SSACD_2 = val; break;
+    case 3: SSACD_3 = val; break;
+    default: break;
+    }
+    return;  
+  }
+  async command uint32_t HplPXA27xSSP.getSSACD[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSACD_1; break;
+    case 2: return SSACD_2; break;
+    case 3: return SSACD_3; break;
+    default: return 0;
+    }
+  }
+
+  async command uint32_t SSPRxDMAInfo.getAddr[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return (uint32_t) &SSDR_1; break;
+    case 2: return (uint32_t) &SSDR_2; break;
+    case 3: return (uint32_t) &SSDR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command uint8_t SSPRxDMAInfo.getMapIndex[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return 13; break;
+    case 2: return 15; break;
+    case 3: return 66; break;
+    default: return 0;
+    }
+  }
+
+  async command uint32_t SSPTxDMAInfo.getAddr[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return (uint32_t) &SSDR_1; break;
+    case 2: return (uint32_t) &SSDR_2; break;
+    case 3: return (uint32_t) &SSDR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command uint8_t SSPTxDMAInfo.getMapIndex[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return 14; break;
+    case 2: return 16; break;
+    case 3: return 67; break;
+    default: return 0;
+    }
+  }
+
+  default async event void HplPXA27xSSP.interruptSSP[uint8_t chnl]() {
+#warning "HplPXA27xSSP default event handler is empty."
+    return;
+  }
+
+  async event void SSP1Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[1]();
+  }
+  async event void SSP2Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[2]();
+  }
+  async event void SSP3Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[3]();
+  }
+
+  default async command void SSP1Irq.enable() {return;}
+  default async command void SSP2Irq.enable() {return;}
+  default async command void SSP3Irq.enable() {return;}
+
+}
+
diff --git a/tos/chips/pxa27x/ssp/SSP.h b/tos/chips/pxa27x/ssp/SSP.h
new file mode 100644
index 00000000..0874a290
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/SSP.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#ifndef _SSP_H
+#define _SSP_H
+
+typedef enum {
+  SSP_FORMAT_SPI = 0,
+  SSP_FORMAT_TISSP,
+  SSP_FORMAT_UWIRE,
+  SSP_FORMAT_PSP,
+} SSPFrameFormat_t;
+
+typedef uint8_t SSPDataWidth_t;
+typedef uint8_t SSPFifoLevel_t;
+
+typedef enum {
+  UWIRE_8BIT,
+  UWIRE_16BIT,
+} SSPMicrowireTxSize_t;
+
+typedef enum {
+  SSP_NORMALMODE,
+  SSP_NETWORKMODE,
+} SSPClkMode_t;
+
+#endif /* _SSP_H */
diff --git a/tos/chips/pxa27x/timer/Alarm32khzC.nc b/tos/chips/pxa27x/timer/Alarm32khzC.nc
new file mode 100644
index 00000000..fe6e3b33
--- /dev/null
+++ b/tos/chips/pxa27x/timer/Alarm32khzC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+generic configuration Alarm32khzC()
+{
+  provides interface Init;
+  provides interface Alarm as Alarm32khz32;
+}
+
+implementation
+{
+  components new HalPXA27xAlarmM(T32khz,1) as PhysAlarm32khz;
+  components HalPXA27xOSTimerMapC;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarm32khz;
+  Alarm32khz32 = PhysAlarm32khz;
+
+  PhysAlarm32khz.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarm32khz.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/chips/pxa27x/timer/AlarmMilliC.nc b/tos/chips/pxa27x/timer/AlarmMilliC.nc
new file mode 100644
index 00000000..36121017
--- /dev/null
+++ b/tos/chips/pxa27x/timer/AlarmMilliC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+generic configuration AlarmMilliC()
+{
+  provides interface Init;
+  provides interface Alarm as AlarmMilli32;
+}
+
+implementation
+{
+  components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli;
+  components HalPXA27xOSTimerMapC;
+  
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarmMilli;
+  AlarmMilli32 = PhysAlarmMilli;
+
+  PhysAlarmMilli.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarmMilli.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/chips/pxa27x/timer/BusyWait32khzC.nc b/tos/chips/pxa27x/timer/BusyWait32khzC.nc
new file mode 100644
index 00000000..93bc73cc
--- /dev/null
+++ b/tos/chips/pxa27x/timer/BusyWait32khzC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This configuration piggybacks off of the TOS 2.0 Counter32khzC component.
+ * This component manages initialization of the underlying Timer components.
+ *
+ * @author Phil Buonadonna
+ */
+configuration BusyWait32khzC
+{
+  provides interface BusyWait as BusyWait32khz16;
+}
+
+implementation 
+{
+  components new HalPXA27xBusyWaitPM(T32khz,397) as PXA27xBusyWait32khz;
+  components HplPXA27xOSTimerC;
+
+  BusyWait32khz16 = PXA27xBusyWait32khz.BusyWait;
+  
+  PXA27xBusyWait32khz.OST -> HplPXA27xOSTimerC.OST0;
+}
diff --git a/tos/chips/pxa27x/timer/BusyWaitMicroC.nc b/tos/chips/pxa27x/timer/BusyWaitMicroC.nc
new file mode 100644
index 00000000..0645a0a7
--- /dev/null
+++ b/tos/chips/pxa27x/timer/BusyWaitMicroC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the BusyWaitMicroC timer component. This component
+ * instantiates a new Counter with Microsecond precision and 
+ * binds it to the BusyWait interface via PXA27xBusyWaitP
+ * 
+ * @author Phil Buonadonna
+ */
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait as BusyWaitMicro16;
+}
+
+implementation
+{
+  components new HalPXA27xBusyWaitM(TMicro,13) as PXA27xBusyWaitMicro;
+  components HplPXA27xOSTimerC;
+
+  BusyWaitMicro16 = PXA27xBusyWaitMicro.BusyWait;
+
+  PXA27xBusyWaitMicro.OST -> HplPXA27xOSTimerC.OST0;
+}
+
diff --git a/tos/chips/pxa27x/timer/Counter32khzC.nc b/tos/chips/pxa27x/timer/Counter32khzC.nc
new file mode 100644
index 00000000..04d74a93
--- /dev/null
+++ b/tos/chips/pxa27x/timer/Counter32khzC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration Counter32khzC
+{
+  provides interface Counter as Counter32khz32;
+  provides interface LocalTime as LocalTime32khz;
+}
+
+implementation
+{
+  components new HalPXA27xCounterM(T32khz,1) as PhysCounter32khz32;
+  components HalPXA27xOSTimerMapC;
+  components PlatformP;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Counter32khz32 = PhysCounter32khz32.Counter;
+  LocalTime32khz = PhysCounter32khz32.LocalTime;
+
+  // Wire the initialization to the platform init routine
+  PlatformP.InitL0 -> PhysCounter32khz32.Init;
+
+  PhysCounter32khz32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysCounter32khz32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+}
diff --git a/tos/chips/pxa27x/timer/CounterMilliC.nc b/tos/chips/pxa27x/timer/CounterMilliC.nc
new file mode 100644
index 00000000..1d905b80
--- /dev/null
+++ b/tos/chips/pxa27x/timer/CounterMilliC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration CounterMilliC
+{
+  provides interface Counter as CounterMilli32;
+  provides interface LocalTime as LocalTimeMilli;
+}
+
+implementation
+{
+  components new HalPXA27xCounterM(TMilli,2) as PhysCounterMilli32;
+  components HalPXA27xOSTimerMapC;
+  components PlatformP;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  CounterMilli32 = PhysCounterMilli32.Counter;
+  LocalTimeMilli = PhysCounterMilli32.LocalTime;
+
+  // Wire the initialization to the plaform init routine
+  PlatformP.InitL0 -> PhysCounterMilli32.Init;
+
+  PhysCounterMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysCounterMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc b/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc
new file mode 100644
index 00000000..2d296bb4
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+// @author Phil Buonadonna
+
+#include "Timer.h"
+
+generic module HalPXA27xAlarmM(typedef frequency_tag, uint8_t resolution) 
+{
+  provides {
+    interface Init;
+    interface Alarm as Alarm;
+  }
+  uses {
+    interface Init as OSTInit;
+    interface HplPXA27xOSTimer as OSTChnl;
+  }
+}
+
+implementation
+{
+  bool mfRunning;
+  uint32_t mMinDeltaT;
+
+  task void lateAlarm() {
+    atomic {
+      mfRunning = FALSE;
+      signal Alarm.fired();
+    }
+  }
+  
+  command error_t Init.init() {
+
+    call OSTInit.init(); 
+    // Continue on match, Non-periodic, w/ given resolution
+    atomic {
+      mfRunning = FALSE;
+      switch (resolution) {
+      case 1: // 1/32768 second
+	mMinDeltaT = 10;
+	break;
+      case 2: // 1 ms
+	mMinDeltaT = 1;
+	break;
+      case 3: // 1 s
+	mMinDeltaT = 1;
+	break;
+      case 4: // 1 us
+	mMinDeltaT = 300;
+	break;
+      default:  // External
+	mMinDeltaT = 0;
+	break;
+      }
+      call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution));
+      call OSTChnl.setOSCR(0);
+    }
+    return SUCCESS;
+
+  }
+
+  async command void Alarm.start( uint32_t dt ) {
+    uint32_t t0,t1,tf;
+    //uint32_t cycles;
+    bool bPending;
+    if (dt < mMinDeltaT) dt = mMinDeltaT;
+
+    atomic {
+      //_pxa27x_perf_clear();
+      t0 = call OSTChnl.getOSCR();
+      tf = t0 + dt;
+      call OSTChnl.setOIERbit(TRUE);
+      call OSTChnl.setOSMR(tf);
+      //_pxa27x_perf_get(cycles);
+      mfRunning = TRUE;
+      t1 = call OSTChnl.getOSCR();
+      bPending = call OSTChnl.getOSSRbit();
+      if ((dt <= (t1 - t0)) && !(bPending)) {
+	call OSTChnl.setOIERbit(FALSE);
+	post lateAlarm();
+      }
+    }
+    return;
+  }
+
+  async command void Alarm.stop() {
+    atomic {
+      call OSTChnl.setOIERbit(FALSE);
+      mfRunning = FALSE;
+    }
+    return;
+  }
+
+  async command bool Alarm.isRunning() {
+    bool flag;
+
+    atomic flag = mfRunning;
+    return flag;
+  }
+
+  async command void Alarm.startAt( uint32_t t0, uint32_t dt ) {
+    uint32_t tf,t1;
+    bool bPending;
+    tf = t0 + dt;
+
+    atomic {
+      call OSTChnl.setOIERbit(TRUE);
+      call OSTChnl.setOSMR(tf);
+      mfRunning = TRUE;
+      t1 = call OSTChnl.getOSCR();
+      bPending = call OSTChnl.getOSSRbit();
+      if ((dt <= (t1 - t0)) && !(bPending)) {
+	call OSTChnl.setOIERbit(FALSE);
+	post lateAlarm();
+      }
+    }
+
+    return;
+  } 
+
+  async command uint32_t Alarm.getNow() {
+    return call OSTChnl.getOSCR();
+  }
+
+  async command uint32_t Alarm.getAlarm() {
+    return call OSTChnl.getOSMR();
+  }
+
+  async event void OSTChnl.fired() {
+    call OSTChnl.clearOSSRbit();
+    call OSTChnl.setOIERbit(FALSE);
+    mfRunning = FALSE;
+    signal Alarm.fired();
+    return;
+  }
+
+  default async event void Alarm.fired() {
+    return;
+  }
+
+
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc b/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc
new file mode 100644
index 00000000..d7a32306
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * This private component provides a 16-bit BusyWait interface
+ * of a given precision over OS Timer channel 0
+ *
+ * @param precision_tag A type tag mapped to the set precision
+ *
+ * @param val4xScale A value to scale the underlying counter by. 
+ *   The passed in parameter is given by the equation
+ *   val4xScale = (3.25 MHz/) * 4
+ *   and rounded to the nearest integer.
+ *   Example: Counter precision of 32.768 kHz would have 
+ *   a val4xScale of 397
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+generic module HalPXA27xBusyWaitM(typedef precision_tag, uint16_t val4xScale)
+{
+  provides interface BusyWait;
+  uses interface HplPXA27xOSTimer as OST;
+}
+
+implementation
+{
+
+  async command void BusyWait.wait(uint16_t dt) {
+    uint32_t dCounts;
+    atomic {
+      uint32_t t0 = call OST.getOSCR();
+      dCounts = (dt * 4) * val4xScale;
+      dCounts >>= 2;
+      while (((call OST.getOSCR()) - t0) < dCounts);
+    }
+  }
+
+  async event void OST.fired() {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc b/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc
new file mode 100644
index 00000000..094c6b5a
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/** 
+ * Implements a TOS 2.0 Counter on the PXA27x HPL. The PXA27x does not 
+ * have an explicit overflow notification. We emulate one by using 
+ * the associated match register set to 0. This requires we initialize
+ * the counter to 1 to avoid a false notification at startup.
+ * 
+ *  @author Phil Buonadonna
+ */
+#include "Timer.h"
+
+generic module HalPXA27xCounterM(typedef frequency_tag, uint8_t resolution) 
+{
+  provides {
+    interface Init;
+    interface Counter as Counter;
+    interface LocalTime as LocalTime;
+  }
+  uses {
+    interface Init as OSTInit;
+    interface HplPXA27xOSTimer as OSTChnl;
+  }
+}
+
+implementation
+{
+  command error_t Init.init() {
+
+    call OSTInit.init(); 
+
+    // Continue on match, Non-periodic, w/ given resolution
+    atomic {
+      call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution));
+      call OSTChnl.setOSMR(0);
+      call OSTChnl.setOSCR(1);
+      call OSTChnl.clearOSSRbit();
+      call OSTChnl.setOIERbit(TRUE);
+    }
+    return SUCCESS;
+
+  }
+  
+  async command uint32_t Counter.get() {
+    uint32_t cntr;
+
+    cntr = call OSTChnl.getOSCR();
+    return cntr;
+  }
+
+  async command bool Counter.isOverflowPending() {
+    bool flag;
+
+    atomic flag = call OSTChnl.getOSSRbit();
+    return flag;
+  }
+
+  async command void Counter.clearOverflow() {
+
+    atomic call OSTChnl.clearOSSRbit();
+  }
+
+  async event void OSTChnl.fired() {
+    call OSTChnl.clearOSSRbit();
+    signal Counter.overflow();
+    return;
+  }
+
+  async command uint32_t LocalTime.get() {
+    uint32_t cntr;
+
+    cntr = call OSTChnl.getOSCR();
+    return cntr;
+  }
+
+  default async event void Counter.overflow() {
+    return;
+  }
+
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc b/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc
new file mode 100644
index 00000000..74357233
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * This components maps requested timer resources connected using the
+ * 'PXA27xOSTimer.Resource' flag to physical timer resource of the PXA27x.
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration HalPXA27xOSTimerMapC {
+
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OSTChnl[uint8_t id];
+  }
+}
+
+implementation {
+  components HplPXA27xOSTimerC;
+
+  Init = HplPXA27xOSTimerC;
+
+  OSTChnl[0] = HplPXA27xOSTimerC.OST4;
+  OSTChnl[1] = HplPXA27xOSTimerC.OST5;
+  OSTChnl[2] = HplPXA27xOSTimerC.OST6;
+  OSTChnl[3] = HplPXA27xOSTimerC.OST7;
+  OSTChnl[4] = HplPXA27xOSTimerC.OST8;
+  OSTChnl[5] = HplPXA27xOSTimerC.OST9;
+  OSTChnl[6] = HplPXA27xOSTimerC.OST10;
+  OSTChnl[7] = HplPXA27xOSTimerC.OST11;
+
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc
new file mode 100644
index 00000000..8089f46f
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface exposes a single OS Timer channel 
+ * on the PXA27x processor. Each channel includes a counter register 
+ * (OSCRx), a match register (OSMRx), a match control register (OMCRx) 
+ * and support for events on each channel. 
+ *
+ * Do not confuse this HPL interface with the generic 'Timer' interface 
+ * provided by TOS 2.x. They are completely different.
+ *
+ * Channels 0 thru 3 are the PXA25x compatibility timers. There are NO
+ * match control register for these channels. 
+ * Calls to getOSCR/setOSCR for channels 1 thru 3 are remmaped to OSCR0.
+ * 
+ * There may be additional configured inter-dependencies between the timer
+ * channels. Refer to the PXA27x Developer's Guide for more information.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xOSTimer
+{
+  /**
+   * Set/initialize the counter register (OSCRx) for the channel
+   *
+   * @param val Desired value to initialize/reset the counter register to.
+   * 
+   */
+  async command void setOSCR(uint32_t val);
+
+  /**
+   * Get the current counter register (OSCRx) value for the channel.
+   *
+   * @return value The 32-bit value of the counter register.
+   */
+  async command uint32_t getOSCR();
+
+  /**
+   * Set the match register (OSMRx) for the channel.
+   *
+   * @param val The desired 32-bit match value.
+   */
+  async command void setOSMR(uint32_t val);
+
+  /**
+   * Get the current match register (OSMRx) value for the channel.
+   *
+   * @return value The 32-bit value of the match register.
+   */
+  async command uint32_t getOSMR();
+
+  /**
+   * Set the timer channel match control register (OMCRx).
+   * 
+   * @param val The desired OMCR value.
+   */
+  async command void setOMCR(uint32_t val);
+
+  /**
+   * Get the current channel match control register (OMCRx) setting.
+   * 
+   * @return value The current OMCR value.
+   */
+  async command uint32_t getOMCR();
+
+  /**
+   * Returns the bit value of the OSSR register corresponding to the 
+   * channel. Indicates if a match event has ocurred.
+   *
+   * @return flag TRUE if an event is signaled (OSSR.M{n} is set). 
+   * FALSE otherwise 
+   *  
+   *
+   */
+  async command bool getOSSRbit();
+
+  /**
+   * Clears the bit position of the OSSR register corresponding to the
+   * channel. Returns the value of the bit before clearing.
+   *
+   * @return flag TRUE if an event is signaled (OSSR.M{n} set) prior 
+   * to clearing. FALSE otherwise.
+   */
+  async command bool clearOSSRbit();
+
+  /**
+   * Sets the OIER bit corresponding to the timer match channel.
+   *
+   * @param flag TRUE to set the OIER bit, FALSE to clear.
+   */
+  async command void setOIERbit(bool flag);
+
+  /**
+   * Returns the setting of the OIER bit corresponding to the timer
+   * match channel.
+   * 
+   * @return flag TRUE if set, FALSE if not set.
+   */
+  async command bool getOIERbit();
+
+  /** 
+   * Get the snapshot register (OSNR) value. 
+   * Any parameterization of this function is ignored.
+   */
+  async command uint32_t getOSNR();
+
+  /**
+   * Timer channel interrupt. Fired when the channel match register matches 
+   * configured 
+   */
+  async event void fired();
+
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc
new file mode 100644
index 00000000..66cbba35
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration HplPXA27xOSTimerC {
+
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OST0;
+    interface HplPXA27xOSTimer as OST0M1;
+    interface HplPXA27xOSTimer as OST0M2;
+    interface HplPXA27xOSTimer as OST0M3;
+    interface HplPXA27xOSTimer as OST4;
+    interface HplPXA27xOSTimer as OST5;
+    interface HplPXA27xOSTimer as OST6;
+    interface HplPXA27xOSTimer as OST7;
+    interface HplPXA27xOSTimer as OST8;
+    interface HplPXA27xOSTimer as OST9;
+    interface HplPXA27xOSTimer as OST10;
+    interface HplPXA27xOSTimer as OST11;
+    interface HplPXA27xOSTimerWatchdog as OSTWDCntl;
+  }
+
+}
+
+implementation {
+  components HplPXA27xOSTimerM, HplPXA27xInterruptM;
+
+  Init = HplPXA27xOSTimerM;
+
+  OST0 = HplPXA27xOSTimerM.PXA27xOST[0];
+  OST0M1 = HplPXA27xOSTimerM.PXA27xOST[1];
+  OST0M2 = HplPXA27xOSTimerM.PXA27xOST[2];
+  OST0M3 = HplPXA27xOSTimerM.PXA27xOST[3];
+  OST4 = HplPXA27xOSTimerM.PXA27xOST[4];
+  OST5 = HplPXA27xOSTimerM.PXA27xOST[5];
+  OST6 = HplPXA27xOSTimerM.PXA27xOST[6];
+  OST7 = HplPXA27xOSTimerM.PXA27xOST[7];
+  OST8 = HplPXA27xOSTimerM.PXA27xOST[8];
+  OST9 = HplPXA27xOSTimerM.PXA27xOST[9];
+  OST10 = HplPXA27xOSTimerM.PXA27xOST[10];
+  OST11 = HplPXA27xOSTimerM.PXA27xOST[11];
+  OSTWDCntl = HplPXA27xOSTimerM.PXA27xWD;
+  
+  HplPXA27xOSTimerM.OST0Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_0];
+  HplPXA27xOSTimerM.OST1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_1];
+  HplPXA27xOSTimerM.OST2Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_2];
+  HplPXA27xOSTimerM.OST3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_3];
+  HplPXA27xOSTimerM.OST4_11Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_4_11];
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc
new file mode 100644
index 00000000..7b6bdcec
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+
+module HplPXA27xOSTimerM {
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as PXA27xOST[uint8_t chnl_id];
+    interface HplPXA27xOSTimerWatchdog as PXA27xWD;
+  }
+  uses {
+    interface HplPXA27xInterrupt as OST0Irq;
+    interface HplPXA27xInterrupt as OST1Irq;
+    interface HplPXA27xInterrupt as OST2Irq;
+    interface HplPXA27xInterrupt as OST3Irq;
+    interface HplPXA27xInterrupt as OST4_11Irq;
+  }
+}
+
+implementation {
+
+  bool gfInitialized = FALSE;
+
+  void DispatchOSTInterrupt(uint8_t id)
+  {
+    signal PXA27xOST.fired[id]();
+    return;
+  }
+
+  command error_t Init.init()
+  {
+    bool initflag;
+    atomic {
+      initflag = gfInitialized;
+      gfInitialized = TRUE;
+    }
+    
+    if (!initflag) {
+      OIER = 0x0UL;
+      OSSR = 0xFFFFFFFF; // Clear all status bits.
+      call OST0Irq.allocate();
+      call OST1Irq.allocate();
+      call OST2Irq.allocate();
+      call OST3Irq.allocate();
+      call OST4_11Irq.allocate();
+      call OST0Irq.enable();
+      call OST1Irq.enable();
+      call OST2Irq.enable();
+      call OST3Irq.enable();
+      call OST4_11Irq.enable();
+    }
+
+    return SUCCESS;
+  }
+  
+  async command void PXA27xOST.setOSCR[uint8_t chnl_id](uint32_t val) 
+  {
+    uint8_t remap_id;
+
+    remap_id = ((chnl_id < 4) ? (0) : (chnl_id));
+    OSCR(remap_id) = val;
+
+    return;
+  }
+  
+  async command uint32_t PXA27xOST.getOSCR[uint8_t chnl_id]()
+  {
+    uint8_t remap_id;
+    uint32_t val;
+
+    remap_id = ((chnl_id < 4) ? (0) : (chnl_id));
+    val = OSCR(remap_id);
+
+    return val;
+  }
+  
+  async command void PXA27xOST.setOSMR[uint8_t chnl_id](uint32_t val)
+  {
+    OSMR(chnl_id) = val;
+    return;
+  }
+
+  async command uint32_t PXA27xOST.getOSMR[uint8_t chnl_id]()
+  {
+    uint32_t val;
+    val = OSMR(chnl_id);
+    return val;
+  }
+
+  async command void PXA27xOST.setOMCR[uint8_t chnl_id](uint32_t val)
+  {
+    if (chnl_id > 3) {
+      OMCR(chnl_id) = val;
+    }
+    return;
+  }
+
+  async command uint32_t PXA27xOST.getOMCR[uint8_t chnl_id]()
+  {
+    uint32_t val = 0;
+    if (chnl_id > 3) {
+      val = OMCR(chnl_id);
+    }
+    return val;
+  }
+
+  async command bool PXA27xOST.getOSSRbit[uint8_t chnl_id]() 
+  {
+    bool bFlag = FALSE;
+    
+    if (((OSSR) & (1 << chnl_id)) != 0) {
+      bFlag = TRUE;
+    }
+
+    return bFlag;
+  }
+
+  async command bool PXA27xOST.clearOSSRbit[uint8_t chnl_id]()
+  {
+    bool bFlag = FALSE;
+
+    if (((OSSR) & (1 << chnl_id)) != 0) {
+      bFlag = TRUE;
+    }
+
+    // Clear the bit value
+    OSSR = (1 << chnl_id);
+
+    return bFlag;
+  }
+
+  async command void PXA27xOST.setOIERbit[uint8_t chnl_id](bool flag)
+  {
+    if (flag == TRUE) {
+      OIER |= (1 << chnl_id);
+    }
+    else {
+      OIER &= ~(1 << chnl_id);      
+    }
+    return;
+  }
+  
+  async command bool PXA27xOST.getOIERbit[uint8_t chnl_id]()
+  {
+    return ((OIER & (1 << chnl_id)) != 0);
+  }
+
+  async command uint32_t PXA27xOST.getOSNR[uint8_t chnl_id]() 
+  {
+    uint32_t val;
+    val = OSNR;
+    return val;
+  }
+
+  async command void PXA27xWD.enableWatchdog() 
+  {
+    OWER = OWER_WME;
+  }
+
+
+  // All interrupts are funneled through DispatchOSTInterrupt.
+  // This should not have any impact on performance and simplifies
+  // the software implementation.
+
+  async event void OST0Irq.fired() 
+  {
+    DispatchOSTInterrupt(0);
+  }
+  
+  async event void OST1Irq.fired() 
+  {
+    DispatchOSTInterrupt(1);
+  }
+  
+  async event void OST2Irq.fired() 
+  {
+    DispatchOSTInterrupt(2);
+  }
+
+  async event void OST3Irq.fired() 
+  {
+    DispatchOSTInterrupt(3);
+  }
+
+  async event void OST4_11Irq.fired() 
+  {
+    uint32_t statusReg;
+    uint8_t chnl;
+
+    statusReg = OSSR;
+    statusReg &= ~(OSSR_M3 | OSSR_M2 | OSSR_M1 | OSSR_M0);
+
+    while (statusReg) {
+      chnl = 31 - _pxa27x_clzui(statusReg);
+      DispatchOSTInterrupt(chnl); 
+      statusReg &= ~(1 << chnl);
+    }
+      
+    return;
+  }
+
+  default async event void PXA27xOST.fired[uint8_t chnl_id]() 
+  {
+    call PXA27xOST.setOIERbit[chnl_id](FALSE);
+    call PXA27xOST.clearOSSRbit[chnl_id]();
+    return;
+  }
+
+}
+  
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc
new file mode 100644
index 00000000..5d9fa903
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * This interface exposes the watchdog control of the PXA27x OS Timer
+ *
+ * Refer to the PXA27x Developer's Guide for more information.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xOSTimerWatchdog
+{
+  /** 
+   * Enable the timer-based watchdog reset feature.
+   * Once enabled, this feature may only be disabled by a reset.
+   */
+  async command void enableWatchdog();
+}
diff --git a/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc
new file mode 100644
index 00000000..170702d6
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc
@@ -0,0 +1,165 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *  Intel Open Source License
+ *
+ *  Copyright (c) 2002 Intel Corporation
+ *  All rights reserved.
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ *
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+/**
+ * Implements the SerialByteComm interface over an 8,N,1 configuration
+ * of a PXA27x UART usingin PIO. 
+ *
+ * @param defaultRate Default baud rate for the serial port. 
+ *
+ *
+ * @author Phil Buonadonna
+ */
+
+generic module HalPXA27xSerialP(uint32_t defaultRate)
+{
+  provides {
+    interface Init;
+    interface StdControl;
+    interface SerialByteComm;
+  }
+  uses {
+    interface Init as UARTInit;
+    interface HplPXA27xUART as UART;
+  }
+}
+
+implementation 
+{
+
+  command error_t Init.init() {
+    uint32_t uiDivisor;
+
+    if (defaultRate == 0) {
+      return EINVAL;
+    }
+
+    uiDivisor = 921600/defaultRate;
+    // Check for invalid baud rate divisor value.
+    // XXX - Eventually could use '0' to imply auto rate detection
+    if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) {
+      return EINVAL;
+    }
+
+    atomic {
+      call UARTInit.init();    
+      call UART.setDLL((uiDivisor & 0xFF));
+      call UART.setDLH(((uiDivisor >> 8) & 0xFF));
+      call UART.setLCR(LCR_WLS(3));
+      call UART.setMCR(MCR_OUT2);
+      //call UART.setIER(IER_RAVIE | IER_TIE | IER_UUE);
+      call UART.setFCR(FCR_TRFIFOE);
+    }
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    atomic {
+      call UART.setIER(IER_RAVIE | IER_TIE | IER_UUE);
+    }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic {
+      call UART.setIER(0);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t SerialByteComm.put(uint8_t data) {
+    atomic call UART.setTHR(data);
+    return SUCCESS;
+  }
+  
+  async event void UART.interruptUART() {
+    uint8_t error, intSource;
+    
+    intSource = call UART.getIIR() & IIR_IID_MASK;
+    intSource = intSource >> 1;
+    
+    switch (intSource) {
+    case 0: // MODEM STATUS
+      break;
+    case 1: // TRANSMIT FIFO
+      signal SerialByteComm.putDone();
+      break;
+    case 2: // RECEIVE FIFO data available
+      while (call UART.getLSR() & LSR_DR) {
+	signal SerialByteComm.get(call UART.getRBR());
+      }
+      break;
+    case 3: // ERROR
+      error = call UART.getLSR();
+      break;
+    default:
+      break;
+    }
+    return;
+  }
+
+  default async event void SerialByteComm.get(uint8_t data) { return; }
+
+  default async event void SerialByteComm.putDone() { return; }
+
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc b/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc
new file mode 100644
index 00000000..186fdf21
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc
@@ -0,0 +1,52 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSTUARTC 
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as STUART;
+}
+
+implementation 
+{
+  components HplPXA27xSTUARTP;
+  components HplPXA27xInterruptM;
+
+  Init = HplPXA27xSTUARTP;
+  STUART = HplPXA27xSTUARTP;
+
+  HplPXA27xSTUARTP.STUARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
+
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xSTUARTP.nc b/tos/chips/pxa27x/uart/HplPXA27xSTUARTP.nc
new file mode 100644
index 00000000..78ab7c2e
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xSTUARTP.nc
@@ -0,0 +1,125 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Provides low-level initialization, 1st level interrupt dispatch and register
+ * access to the STUART.
+ * This component automatically handles setting of the DLAB bit for
+ * divisor register access (DLL and DLH) 
+ *
+ * @author Phil Buonadonna
+ */
+
+module HplPXA27xSTUARTP
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as STUART;
+  uses interface HplPXA27xInterrupt as STUARTIrq;
+}
+
+implementation
+{
+  bool m_fInit = FALSE;
+
+  command error_t Init.init() {
+    bool isInited;
+
+    atomic {
+      isInited = m_fInit;
+      m_fInit = TRUE;
+    }
+
+    if (!isInited) {
+      CKEN |= CKEN5_STUART;
+      call STUARTIrq.allocate();
+      call STUARTIrq.enable();
+      STLCR |= LCR_DLAB;
+      STDLL = 0x04;
+      STDLH = 0x00;
+      STLCR &= ~LCR_DLAB;
+    }
+
+    return SUCCESS;
+  }
+
+  async command uint32_t STUART.getRBR() { return STRBR; }
+  async command void STUART.setTHR(uint32_t val) { STRBR = val; }
+  async command void STUART.setDLL(uint32_t val) { 
+    STLCR |= LCR_DLAB;
+    STDLL = val; 
+    STLCR &= ~LCR_DLAB;
+  }
+  async command uint32_t STUART.getDLL() { 
+    uint32_t val;
+    STLCR |= LCR_DLAB;
+    val = STDLL; 
+    STLCR &= ~LCR_DLAB;
+    return val;
+  }
+  async command void STUART.setDLH(uint32_t val) { 
+    STLCR |= LCR_DLAB;
+    STDLH = val; 
+    STLCR &= ~LCR_DLAB;
+  }
+  async command uint32_t STUART.getDLH() { 
+    uint32_t val;
+    STLCR |= LCR_DLAB;
+    val = STDLH;
+    STLCR &= ~LCR_DLAB;
+    return val;
+  }
+  async command void STUART.setIER(uint32_t val) { STIER = val; }
+  async command uint32_t STUART.getIER() { return STIER; }
+  async command uint32_t STUART.getIIR() { return STIIR; }
+  async command void STUART.setFCR(uint32_t val) { STFCR = val; }
+  async command void STUART.setLCR(uint32_t val) { STLCR = val; }
+  async command uint32_t STUART.getLCR() { return STLCR; }
+  async command void STUART.setMCR(uint32_t val) { STMCR = val; }
+  async command uint32_t STUART.getMCR() { return STMCR; }
+  async command uint32_t STUART.getLSR() { return STLSR; }
+  async command uint32_t STUART.getMSR() { return STMSR; }
+  async command void STUART.setSPR(uint32_t val) { STSPR = val; }
+  async command uint32_t STUART.getSPR() { return STSPR; }
+  async command void STUART.setISR(uint32_t val) { STISR = val; }
+  async command uint32_t STUART.getISR() { return STISR; }
+  async command void STUART.setFOR(uint32_t val) { STFOR = val; }
+  async command uint32_t STUART.getFOR() { return STFOR; }
+  async command void STUART.setABR(uint32_t val) { STABR = val; }
+  async command uint32_t STUART.getABR() { return STABR; }
+  async command uint32_t STUART.getACR() { return STACR; }
+
+  async event void STUARTIrq.fired () {
+
+    signal STUART.interruptUART();
+  }
+
+  default async event void STUART.interruptUART() { return; }
+  
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xUART.nc b/tos/chips/pxa27x/uart/HplPXA27xUART.nc
new file mode 100644
index 00000000..29dea842
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xUART.nc
@@ -0,0 +1,82 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Interface to access UART peripheral register on the PXA27x. Function 
+ * names are based on the common portion of the names outlined in
+ * the PXA27x Developers Guide.
+ * 
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xUART
+{
+  async command uint32_t getRBR();
+  async command void setTHR(uint32_t val);
+
+  async command void setDLL(uint32_t val);
+  async command uint32_t getDLL();
+
+  async command void setDLH(uint32_t val);
+  async command uint32_t getDLH();
+
+  async command void setIER(uint32_t val);
+  async command uint32_t getIER();
+
+  async command uint32_t getIIR();
+
+  async command void setFCR(uint32_t val);
+
+  async command void setLCR(uint32_t val);
+  async command uint32_t getLCR();
+
+  async command void setMCR(uint32_t val);
+  async command uint32_t getMCR();
+
+  async command uint32_t getLSR();
+
+  async command uint32_t getMSR();
+
+  async command void setSPR(uint32_t val);
+  async command uint32_t getSPR();
+
+  async command void setISR(uint32_t val);
+  async command uint32_t getISR();
+
+  async command void setFOR(uint32_t val);
+  async command uint32_t getFOR();
+
+  async command void setABR(uint32_t val);
+  async command uint32_t getABR();
+
+  async command uint32_t getACR();
+
+  async event void interruptUART();
+}
diff --git a/tos/chips/sht11/HalSht11Advanced.nc b/tos/chips/sht11/HalSht11Advanced.nc
new file mode 100644
index 00000000..834e75cd
--- /dev/null
+++ b/tos/chips/sht11/HalSht11Advanced.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+interface HalSht11Advanced {
+  command error_t getVoltageStatus();
+  event void getVoltageStatusDone(error_t error, bool isLow);
+  command error_t setHeater(bool isOn);
+  event void setHeaterDone(error_t error);
+  command error_t setResolution(bool resolution);
+  event void setResolutionDone(error_t error);
+}
diff --git a/tos/chips/sht11/HalSht11ControlP.nc b/tos/chips/sht11/HalSht11ControlP.nc
new file mode 100644
index 00000000..466143fc
--- /dev/null
+++ b/tos/chips/sht11/HalSht11ControlP.nc
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SensirionSht11.h"
+
+module HalSht11ControlP {
+  provides interface HalSht11Advanced;
+
+  uses interface SensirionSht11;
+  uses interface Resource;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_GETVOLT,
+    S_SETHEAT,
+    S_SETRES,
+  };
+  uint8_t state = S_IDLE;
+  uint8_t statusRegisterShadow = 0x0;
+
+  error_t clientResult;
+  error_t clientVal;
+
+  task void signal_Task() {
+    switch(state) {
+    case S_GETVOLT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.getVoltageStatusDone(clientResult, clientVal & SHT11_STATUS_LOW_BATTERY_BIT);
+      break;
+    case S_SETHEAT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.setHeaterDone(clientResult);
+      break;
+    case S_SETRES:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.setResolutionDone(clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t HalSht11Advanced.getVoltageStatus() {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_GETVOLT;
+
+    call SensirionSht11.readStatusReg();
+    return SUCCESS;
+  }
+
+  command error_t HalSht11Advanced.setHeater(bool isOn) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETHEAT;
+
+    if(isOn)
+      statusRegisterShadow |= SHT11_STATUS_HEATER_ON_BIT;
+    else
+      statusRegisterShadow &= ~SHT11_STATUS_HEATER_ON_BIT;
+
+    call SensirionSht11.writeStatusReg(statusRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalSht11Advanced.setResolution(bool resolution) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETRES;
+
+    if(resolution)
+      statusRegisterShadow |= SHT11_STATUS_LOW_RES_BIT;
+    else
+      statusRegisterShadow &= ~SHT11_STATUS_LOW_RES_BIT;
+
+    call SensirionSht11.writeStatusReg(statusRegisterShadow);
+    return SUCCESS;    
+  }
+
+  event void SensirionSht11.readStatusRegDone( error_t result, uint8_t val ) {
+    clientResult = result;
+    clientVal = val;
+    post signal_Task();
+  }
+
+  event void SensirionSht11.writeStatusRegDone( error_t result ) {
+    clientResult = result;
+    post signal_Task();
+  }
+
+  event void Resource.granted() { /* intentionally left blank */ }
+  event void SensirionSht11.resetDone( error_t result ) {}
+  event void SensirionSht11.measureTemperatureDone( error_t result, uint16_t val ) {}
+  event void SensirionSht11.measureHumidityDone( error_t result, uint16_t val ) {}
+
+}
diff --git a/tos/chips/sht11/SensirionSht11.h b/tos/chips/sht11/SensirionSht11.h
new file mode 100644
index 00000000..7d3fb206
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11.h
@@ -0,0 +1,44 @@
+#ifndef SENSIRIONSHT11_H
+#define SENSIRIONSHT11_H
+
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Gilman Tolle 
+ */
+
+enum {
+  SHT11_STATUS_LOW_RES_BIT = 1 << 0,
+  SHT11_STATUS_NO_RELOAD_BIT = 1 << 1,
+  SHT11_STATUS_HEATER_ON_BIT = 1 << 2,
+  SHT11_STATUS_LOW_BATTERY_BIT = 1 << 6,
+} sht_bits_t;
+
+#endif
diff --git a/tos/chips/sht11/SensirionSht11.nc b/tos/chips/sht11/SensirionSht11.nc
new file mode 100644
index 00000000..ae01dd1c
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11 is the rich interface to the Sensirion SHT11
+ * temperature/humidity sensor. 
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface SensirionSht11 {
+
+  /**
+   * Resets the sensor.
+   *
+   * @return SUCCESS if the sensor will be reset
+   */
+  command error_t reset();
+
+  /**
+   * Signals that the sensor has been reset.
+   *
+   * @param result SUCCESS if the reset succeeded
+   */
+  event void resetDone( error_t result );
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param result SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  event void measureTemperatureDone( error_t result, uint16_t val );
+
+  /**
+   * Starts a humidity measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */  
+  command error_t measureHumidity();
+
+  /**
+   * Presents the result of a humidity measurement.
+   *
+   * @param result SUCCESS if the measurement was successful
+   * @param val the humidity reading
+   */
+  event void measureHumidityDone( error_t result, uint16_t val );
+
+  /**
+   * Reads the current contents of the SHT11 status and control
+   * register. See the datasheet for interpretation of this register.
+   *
+   * @return SUCCESS if the read will be performed
+   */
+  command error_t readStatusReg();
+
+  /**
+   * Presents the value of the status register.
+   *
+   * @param result SUCCESS if the read succeeded
+   * @param val the value of the register
+   */
+  event void readStatusRegDone( error_t result, uint8_t val );
+
+  /**
+   * Writes a new value to the SHT11 status and control register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the write will be performed
+   */
+  command error_t writeStatusReg( uint8_t val );
+
+  /**
+   * Signals the completion of the status register write.
+   *
+   * @param result SUCCESS if the write was successful
+   */
+  event void writeStatusRegDone( error_t result );
+}
diff --git a/tos/chips/sht11/SensirionSht11LogicP.nc b/tos/chips/sht11/SensirionSht11LogicP.nc
new file mode 100644
index 00000000..ce4aa6ca
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11LogicP.nc
@@ -0,0 +1,412 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+#include "SensirionSht11.h"
+
+/**
+ * SensirionSht11LogicP contains the actual driver logic needed to
+ * read from the Sensirion SHT11 temperature/humidity sensor. It
+ * depends on 2 underlying GeneralIO interfaces, one for the data pin
+ * and one for the clock pin, and one underlying GpioInterrupt.  It
+ * provides the HAL-level SensirionSht11 interface. It's generic, so
+ * you can instantiate it multiple times if you have more than one
+ * Sensirion SHT11 attached to a node. 
+ * 
+ * 
    
+ * This code assumes that the MCU clock is less than 10 MHz.  If you
+ * ever run this on a faster MCU, you'll need to insert a lot of
+ * waits to keep the Sensirion happy.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic module SensirionSht11LogicP() {
+  provides interface SensirionSht11[ uint8_t client ];
+
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as CLOCK;
+  uses interface GpioInterrupt as InterruptDATA;
+
+  uses interface Timer;
+
+  uses interface Leds;
+}
+implementation {
+
+  typedef enum {
+    CMD_MEASURE_TEMPERATURE = 0x3,
+    CMD_MEASURE_HUMIDITY = 0x5,
+    CMD_READ_STATUS = 0x7,
+    CMD_WRITE_STATUS = 0x6,
+    CMD_SOFT_RESET = 0x1E,
+  } sht_cmd_t;
+
+  enum {
+    TIMEOUT_RESET = 11,
+    TIMEOUT_14BIT = 250,
+    TIMEOUT_12BIT = 250, //70,
+    TIMEOUT_8BIT = 250, //15,
+  } sht_timeout_t;
+
+  bool on = TRUE;
+  bool busy = FALSE;
+  uint8_t status = 0;
+  sht_cmd_t cmd;
+  uint8_t newStatus;
+  bool writeFail = FALSE;
+
+  uint8_t currentClient;
+
+  error_t performCommand();
+  void initPins();
+  void resetDevice();
+  void transmissionStart();
+  void sendCommand(uint8_t _cmd);
+  void writeByte(uint8_t byte);
+  error_t waitForResponse();
+  void enableInterrupt();
+  uint8_t readByte();
+  void ack();
+  void endTransmission();
+
+  task void readSensor();
+  task void signalStatusDone();
+
+  command error_t SensirionSht11.reset[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_SOFT_RESET;
+    currentClient = client;
+    return performCommand();
+  }
+
+  command error_t SensirionSht11.measureTemperature[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_MEASURE_TEMPERATURE;
+    currentClient = client;
+    return performCommand();
+  }
+  
+  command error_t SensirionSht11.measureHumidity[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_MEASURE_HUMIDITY;
+    currentClient = client;
+    return performCommand();
+  }
+
+  /* FIXME: these don't seem to work */
+  command error_t SensirionSht11.readStatusReg[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_READ_STATUS;
+    currentClient = client;
+    return performCommand();
+  }
+  
+  /* FIXME: these don't seem to work */
+  command error_t SensirionSht11.writeStatusReg[ uint8_t client ]( uint8_t val ) {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_WRITE_STATUS;
+    newStatus = val;
+    currentClient = client;
+    return performCommand();
+  }
+
+  // performCommand() returns both error_t and status reg -- fortunately, error_t is 8bit
+  error_t performCommand() {
+
+    initPins();
+    resetDevice();
+    transmissionStart();
+    cmd &= 0x1F; // clear the first 3 address bits to 000
+    sendCommand(cmd);
+
+    if ( waitForResponse() != SUCCESS ) {
+      busy = FALSE;
+      return FAIL;
+    }
+
+    switch(cmd) {
+
+    case CMD_SOFT_RESET:
+      call Timer.startOneShot( TIMEOUT_RESET );
+      break;
+
+    case CMD_MEASURE_TEMPERATURE:
+      enableInterrupt();
+
+      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
+	call Timer.startOneShot( TIMEOUT_12BIT );
+      } else {
+	call Timer.startOneShot( TIMEOUT_14BIT );
+      }
+
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      enableInterrupt();
+
+      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
+	call Timer.startOneShot( TIMEOUT_8BIT );
+      } else {
+	call Timer.startOneShot( TIMEOUT_12BIT );
+      }
+
+      break;
+
+    case CMD_READ_STATUS: 
+    {
+      uint8_t tempStatus;
+      uint8_t crc;
+
+      tempStatus = readByte();
+      crc = readByte();
+      endTransmission();
+
+      status = tempStatus; // FIXME: need to check CRC!
+      
+      post signalStatusDone();
+    }
+    
+    case CMD_WRITE_STATUS:
+      writeByte( newStatus );
+      
+      if ( waitForResponse() != SUCCESS ) {
+	writeFail = TRUE;
+      } else {
+	status = newStatus;
+      }
+      
+      post signalStatusDone();
+    }
+
+    // leave the device busy...we're waiting for an interrupt
+    return SUCCESS;
+  }
+
+  void initPins() {
+    call CLOCK.makeOutput();
+    call CLOCK.clr();
+    call DATA.makeInput();
+    call DATA.set();
+    call InterruptDATA.disable();
+  }
+  
+  void resetDevice() {
+    uint8_t i;
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.clr();
+    for( i = 0; i < 9; i++ ) {
+      call CLOCK.set();
+      call CLOCK.clr();
+    }
+  }
+
+  void transmissionStart() {
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.clr();
+    call CLOCK.set();
+    call DATA.clr();
+    call CLOCK.clr();
+    call CLOCK.set();
+    call DATA.set();
+    call CLOCK.clr();
+  }
+
+  void sendCommand(uint8_t _cmd) {
+    writeByte(_cmd);
+  }
+
+  void writeByte(uint8_t byte) {
+    uint8_t i;
+    for( i = 0; i < 8; i++ ) {
+      if ( byte & 0x80 )
+	call DATA.set();
+      else
+	call DATA.clr();
+      byte = byte << 1;
+      call CLOCK.set();
+      call CLOCK.clr();
+    }
+  }
+
+  error_t waitForResponse() {
+    call DATA.makeInput();
+    call DATA.set();
+    call CLOCK.set();
+    if (call DATA.get()) {
+      // the device didn't pull the DATA line low
+      // the command wasn't received or acknowledged
+      return FAIL;
+    }
+    call CLOCK.clr();
+    return SUCCESS;
+  }
+
+  void enableInterrupt() {
+    call DATA.makeInput();
+    call DATA.set();
+    call InterruptDATA.enableFallingEdge();
+  }
+
+  event void Timer.fired() {
+
+    switch(cmd) {
+
+    case CMD_SOFT_RESET:
+      // driver has waited long enough for device to reset
+      busy = FALSE;
+      signal SensirionSht11.resetDone[currentClient]( SUCCESS );
+      break;
+
+    case CMD_MEASURE_TEMPERATURE:
+      // timeout expired with no data interrupt
+      busy = FALSE;
+      signal SensirionSht11.measureTemperatureDone[currentClient]( FAIL, 0 );
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      // timeout expired with no data interrupt
+      busy = FALSE;
+      signal SensirionSht11.measureHumidityDone[currentClient]( FAIL, 0 );
+      break;
+
+    default:
+      // we're in an unexpected state. what to do?
+      break;
+    }
+  }
+
+  async event void InterruptDATA.fired() {
+    call InterruptDATA.disable();
+    post readSensor();
+  }
+
+  task void readSensor() {
+    uint16_t data = 0;
+    uint8_t crc = 0;
+
+    if ( busy == FALSE ) {
+      // the interrupt was received after the timeout. 
+      // we've already signaled FAIL to the client, so just give up.
+      return;
+    }
+
+    call Timer.stop();
+
+    data = readByte() << 8;
+    data |= readByte();
+
+    crc = readByte();
+    
+    endTransmission();
+
+    switch( cmd ) {
+    case CMD_MEASURE_TEMPERATURE:
+      busy = FALSE;
+      signal SensirionSht11.measureTemperatureDone[currentClient]( SUCCESS, data );
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      busy = FALSE;
+      signal SensirionSht11.measureHumidityDone[currentClient]( SUCCESS, data );
+      break;
+
+    default:
+      break; // unknown command - shouldn't reach here
+    }
+  }
+
+  uint8_t readByte() {
+    uint8_t byte = 0;
+    uint8_t i;
+
+    for( i = 0; i < 8; i++ ) {
+      call CLOCK.set();
+      if (call DATA.get())
+	byte |= 1;
+      if (i != 7) 
+	byte = byte << 1;
+      call CLOCK.clr();
+    }
+
+    ack();
+    return byte;
+  }
+
+  void ack() {
+    call DATA.makeOutput();
+    call DATA.clr();
+    call CLOCK.set();
+    call CLOCK.clr();
+    call DATA.makeInput();
+    call DATA.set();
+  }
+  
+  void endTransmission() {
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.set();
+    call CLOCK.clr();
+  }
+
+  task void signalStatusDone() {
+    bool _writeFail = writeFail;
+    switch( cmd ) {
+    case CMD_READ_STATUS:
+      busy = FALSE;
+      signal SensirionSht11.readStatusRegDone[currentClient]( SUCCESS, status );
+      break;
+    case CMD_WRITE_STATUS:
+      busy = FALSE;
+      writeFail = FALSE;
+      signal SensirionSht11.writeStatusRegDone[currentClient]( (_writeFail ? FAIL : SUCCESS) );
+      break;
+    default:
+      // shouldn't happen.
+      break;
+    }
+  }
+
+  default event void SensirionSht11.resetDone[uint8_t client]( error_t result ) { }
+  default event void SensirionSht11.measureTemperatureDone[uint8_t client]( error_t result, uint16_t val ) { }
+  default event void SensirionSht11.measureHumidityDone[uint8_t client]( error_t result, uint16_t val ) { }
+  default event void SensirionSht11.readStatusRegDone[uint8_t client]( error_t result, uint8_t val ) { }
+  default event void SensirionSht11.writeStatusRegDone[uint8_t client]( error_t result ) { }
+}
+
diff --git a/tos/chips/sht11/SensirionSht11ReaderP.nc b/tos/chips/sht11/SensirionSht11ReaderP.nc
new file mode 100644
index 00000000..66acc3fd
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11ReaderP.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11ReaderP transforms the HAL-level SensirionSht11
+ * interface into a pair of SID Read interfaces, one for the
+ * temperature sensor and one for the humidity sensor. It acquires the
+ * underlying resource before executing each read, enabling
+ * arbitrated access.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic module SensirionSht11ReaderP() {
+  provides interface Read as Temperature;
+  provides interface Read as Humidity;
+  
+  uses interface Resource as TempResource;
+  uses interface Resource as HumResource;
+  uses interface SensirionSht11 as Sht11Temp;
+  uses interface SensirionSht11 as Sht11Hum;
+}
+implementation {
+  command error_t Temperature.read() {
+    call TempResource.request();
+    return SUCCESS;
+  }
+
+  event void TempResource.granted() {
+    error_t result;
+    if ((result = call Sht11Temp.measureTemperature()) != SUCCESS) {
+      call TempResource.release();
+      signal Temperature.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Temp.measureTemperatureDone( error_t result, uint16_t val ) {
+    call TempResource.release();
+    signal Temperature.readDone( result, val );
+  }
+
+  command error_t Humidity.read() {
+    call HumResource.request();
+    return SUCCESS;
+  }
+
+  event void HumResource.granted() {
+    error_t result;
+    if ((result = call Sht11Hum.measureHumidity()) != SUCCESS) {
+      call HumResource.release();
+      signal Humidity.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Hum.measureHumidityDone( error_t result, uint16_t val ) {
+    call HumResource.release();
+    signal Humidity.readDone( result, val );
+  }
+
+  event void Sht11Temp.resetDone( error_t result ) { }
+  event void Sht11Temp.measureHumidityDone( error_t result, uint16_t val ) { }
+  event void Sht11Temp.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Temp.writeStatusRegDone( error_t result ) { }
+
+  event void Sht11Hum.resetDone( error_t result ) { }
+  event void Sht11Hum.measureTemperatureDone( error_t result, uint16_t val ) { }
+  event void Sht11Hum.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Hum.writeStatusRegDone( error_t result ) { }
+
+  default event void Temperature.readDone( error_t result, uint16_t val ) { }
+  default event void Humidity.readDone( error_t result, uint16_t val ) { }
+}
diff --git a/tos/chips/stm25p/BlockStorageC.nc b/tos/chips/stm25p/BlockStorageC.nc
new file mode 100644
index 00000000..ff42bcca
--- /dev/null
+++ b/tos/chips/stm25p/BlockStorageC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the block storage abstraction from TEP103 for the
+ * ST M25P serial code flash.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Stm25p.h"
+
+generic configuration BlockStorageC( volume_id_t volume_id ) {
+
+  provides interface BlockRead;
+  provides interface BlockWrite;
+  provides interface StorageMap;
+
+}
+
+implementation {
+
+  enum {
+    BLOCK_ID = unique( "Stm25p.Block" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+
+  components Stm25pBlockP as BlockP;
+  BlockRead = BlockP.Read[ BLOCK_ID ];
+  BlockWrite = BlockP.Write[ BLOCK_ID ];
+  StorageMap = BlockP.StorageMap[ BLOCK_ID ];
+
+  components Stm25pSectorC as SectorC;
+  BlockP.ClientResource[ BLOCK_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  BlockP.Sector[ BLOCK_ID ] -> SectorC.Sector[ VOLUME_ID ];
+
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+
+}
diff --git a/tos/chips/stm25p/ConfigStorageC.nc b/tos/chips/stm25p/ConfigStorageC.nc
new file mode 100644
index 00000000..54069f64
--- /dev/null
+++ b/tos/chips/stm25p/ConfigStorageC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the config storage abstraction from TEP103 for
+ * the ST M25P serial code flash.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+
+generic configuration ConfigStorageC( volume_id_t volume_id ) {
+  
+  provides interface Mount;
+  provides interface ConfigStorage;
+  
+}
+
+implementation {
+  
+  enum {
+    CONFIG_ID = unique( "Stm25p.Config" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+  
+  components Stm25pConfigP as ConfigP;
+  Mount = ConfigP.Mount[ CONFIG_ID ];
+  ConfigStorage = ConfigP.Config[ CONFIG_ID ];
+  
+  components Stm25pSectorC as SectorC;
+  ConfigP.ClientResource[ CONFIG_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  ConfigP.Sector[ CONFIG_ID ] -> SectorC.Sector[ VOLUME_ID ];
+  
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+  
+}
diff --git a/tos/chips/stm25p/LogStorageC.nc b/tos/chips/stm25p/LogStorageC.nc
new file mode 100644
index 00000000..fa80d25a
--- /dev/null
+++ b/tos/chips/stm25p/LogStorageC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the log storage abstraction from TEP103 for the
+ * ST M25P serial code flash. This is a record-based implementation,
+ * meaning all successful appendeds will survive crash-style
+ * failure. Note that appends are limited to a maximum of 254 bytes at
+ * a time.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+
+generic configuration LogStorageC( volume_id_t volume_id, bool circular ) {
+
+  provides interface LogRead;
+  provides interface LogWrite;
+
+}
+
+implementation {
+
+  enum {
+    LOG_ID = unique( "Stm25p.Log" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+  
+  components Stm25pLogP as LogP;
+  LogRead = LogP.Read[ LOG_ID ];
+  LogWrite = LogP.Write[ LOG_ID ];
+  
+  components Stm25pSectorC as SectorC;
+  LogP.ClientResource[ LOG_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  LogP.Sector[ LOG_ID ] -> SectorC.Sector[ VOLUME_ID ];
+  
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+  
+  components new Stm25pLogConfigP( circular ) as ConfigP;
+  LogP.Circular[ LOG_ID ] -> ConfigP;
+  
+  components MainC;
+  MainC.SoftwareInit -> LogP;
+  
+}
diff --git a/tos/chips/stm25p/Stm25p.h b/tos/chips/stm25p/Stm25p.h
new file mode 100644
index 00000000..27079d8a
--- /dev/null
+++ b/tos/chips/stm25p/Stm25p.h
@@ -0,0 +1,59 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef __STM25P_H__
+#define __STM25P_H__
+
+#include "Storage.h"
+
+typedef storage_addr_t stm25p_addr_t;
+typedef storage_len_t stm25p_len_t;
+
+enum {
+  STM25P_NUM_SECTORS = 16,
+  STM25P_SECTOR_SIZE_LOG2 = 16,
+  STM25P_SECTOR_SIZE = 1L << STM25P_SECTOR_SIZE_LOG2,
+  STM25P_SECTOR_MASK = 0xffff,
+  STM25P_PAGE_SIZE_LOG2 = 8,
+  STM25P_PAGE_SIZE = 1 << STM25P_PAGE_SIZE_LOG2,
+  STM25P_PAGE_MASK = STM25P_PAGE_SIZE - 1,
+  STM25P_INVALID_ADDRESS = 0xffffffff,
+};
+
+typedef struct stm25p_volume_info_t {
+  uint8_t base;
+  uint8_t size;
+} stm25p_volume_info_t;
+
+#endif
diff --git a/tos/chips/stm25p/Stm25pBinderP.nc b/tos/chips/stm25p/Stm25pBinderP.nc
new file mode 100644
index 00000000..e26a9969
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pBinderP.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic module Stm25pBinderP( volume_id_t volume ) {
+
+  uses interface Stm25pVolume as Volume;
+
+}
+
+implementation {
+
+  async event volume_id_t Volume.getVolumeId() {
+    return volume;
+  }
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pBlockP.nc b/tos/chips/stm25p/Stm25pBlockP.nc
new file mode 100644
index 00000000..1d06ecb0
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pBlockP.nc
@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+module Stm25pBlockP {
+
+  provides interface BlockRead as Read[ uint8_t id ];
+  provides interface BlockWrite as Write[ uint8_t id ];
+  provides interface StorageMap[ uint8_t id ];
+
+  uses interface Stm25pSector as Sector[ uint8_t id ];
+  uses interface Resource as ClientResource[ uint8_t id ];
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NUM_BLOCKS = uniqueCount( "Stm25p.Block" ),
+  };
+  
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_VERIFY,
+    S_CRC,
+    S_WRITE,
+    S_COMMIT,
+    S_ERASE,
+  } stm25p_block_req_t;
+  
+  typedef struct stm25p_block_state_t {
+    storage_addr_t addr;
+    void* buf;
+    storage_len_t len;
+    stm25p_block_req_t req;
+  } stm25p_block_state_t;
+  
+  stm25p_block_state_t m_block_state[ NUM_BLOCKS ];
+  stm25p_block_state_t m_req;
+  
+  error_t newRequest( uint8_t client );
+  void signalDone( uint8_t id, uint16_t crc, error_t error );
+  
+  command storage_addr_t StorageMap.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) {
+    return call Sector.getPhysicalAddress[ id ]( addr );
+  }
+  
+  command storage_len_t Read.getSize[ uint8_t id ]() {
+    return ( (storage_len_t)call Sector.getNumSectors[ id ]() 
+	     << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  command error_t Read.read[ uint8_t id ]( storage_addr_t addr, void* buf,
+					   storage_len_t len ) {
+    m_req.req = S_READ;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Read.verify[ uint8_t id ]() {
+    m_req.req = S_VERIFY;
+    return newRequest( id );
+  }
+  
+  command error_t Read.computeCrc[ uint8_t id ]( storage_addr_t addr,
+						 storage_len_t len,
+						 uint16_t crc ) {
+    m_req.req = S_CRC;
+    m_req.addr = addr;
+    m_req.buf = (void*)crc;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Write.write[ uint8_t id ]( storage_addr_t addr, void* buf, 
+					     storage_len_t len ) {
+    m_req.req = S_WRITE;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Write.commit[ uint8_t id ]() {
+    m_req.req = S_COMMIT;
+    return newRequest( id );
+  }
+  
+  command error_t Write.erase[ uint8_t id ]() {
+    m_req.req = S_ERASE;
+    return newRequest( id );
+  }
+  
+  error_t newRequest( uint8_t client ) {
+    
+    if ( m_block_state[ client ].req != S_IDLE )
+      return FAIL;
+
+    call ClientResource.request[ client ]();
+    m_block_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  event void ClientResource.granted[ uint8_t id ]() {
+    
+    switch( m_block_state[ id ].req ) {
+    case S_READ:
+      call Sector.read[ id ]( m_block_state[ id ].addr, 
+			      m_block_state[ id ].buf, 
+			      m_block_state[ id ].len );
+      break;
+    case S_CRC:
+      call Sector.computeCrc[ id ]( (uint16_t)m_block_state[ id ].buf, 
+				    m_block_state[ id ].addr, 
+				    m_block_state[ id ].len );
+      break;
+    case S_WRITE:
+      call Sector.write[ id ]( m_block_state[ id ].addr, 
+			       m_block_state[ id ].buf, 
+			       m_block_state[ id ].len );
+      break;
+    case S_ERASE:
+      call Sector.erase[ id ]( 0, call Sector.getNumSectors[ id ]() );
+      break;
+    case S_COMMIT: case S_VERIFY:
+      signalDone( id, 0, SUCCESS );
+      break;
+    case S_IDLE:
+      break;
+    }
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					    stm25p_len_t len, error_t error ) {
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len, error_t error ){
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector,
+					     uint8_t num_sectors,
+					     error_t error ) {
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, 
+						  stm25p_len_t len,
+						  uint16_t crc,
+						  error_t error ) {
+    signalDone( id, crc, error );
+  }
+  
+  void signalDone( uint8_t id, uint16_t crc, error_t error ) {
+    
+    stm25p_block_req_t req = m_block_state[ id ].req;    
+    
+    call ClientResource.release[ id ]();
+    m_block_state[ id ].req = S_IDLE;
+    switch( req ) {
+    case S_READ:
+      signal Read.readDone[ id ]( m_block_state[ id ].addr, 
+				  m_block_state[ id ].buf,
+				  m_block_state[ id ].len, error );  
+      break;
+    case S_VERIFY:
+      signal Read.verifyDone[ id ]( error );
+      break;
+    case S_CRC:
+      signal Read.computeCrcDone[ id ]( m_block_state[ id ].addr, 
+					m_block_state[ id ].len, crc, error );
+      break;
+    case S_WRITE:
+      signal Write.writeDone[ id ]( m_block_state[ id ].addr, 
+				    m_block_state[ id ].buf,
+				    m_block_state[ id ].len, error );
+      break;
+    case S_COMMIT:
+      signal Write.commitDone[ id ]( error );
+      break;
+    case S_ERASE:
+      signal Write.eraseDone[ id ]( error );
+      break;
+    case S_IDLE:
+      break;
+    }
+    
+  }
+  
+  default event void Read.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Read.computeCrcDone[ uint8_t id ]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {}
+  default event void Read.verifyDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Write.eraseDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.commitDone[ uint8_t id ]( error_t error ) {}
+  
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command void ClientResource.release[ uint8_t id ]() {}
+  
+}
+
diff --git a/tos/chips/stm25p/Stm25pConfigP.nc b/tos/chips/stm25p/Stm25pConfigP.nc
new file mode 100644
index 00000000..777dedf3
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pConfigP.nc
@@ -0,0 +1,474 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+
+module Stm25pConfigP {
+  
+  provides interface Mount[ uint8_t client ];
+  provides interface ConfigStorage as Config[ uint8_t client ];
+  
+  uses interface Stm25pSector as Sector[ uint8_t client ];
+  uses interface Resource as ClientResource[ uint8_t client ];
+  uses interface Leds;
+  
+}
+
+implementation {
+  
+  enum {
+    NUM_CLIENTS = uniqueCount( "Stm25p.Config" ),
+    CONFIG_SIZE = 2048,
+    CHUNK_SIZE_LOG2 = 8,
+    CHUNK_SIZE = 1 << CHUNK_SIZE_LOG2,
+    NUM_CHUNKS = CONFIG_SIZE / CHUNK_SIZE,
+    BUF_SIZE = 16,
+    INVALID_VERSION = -1,
+  };
+  
+  enum {
+    S_IDLE,
+    S_MOUNT,
+    S_READ,
+    S_WRITE,
+    S_COMMIT,
+  };
+
+  typedef struct {
+    uint16_t addr;
+    void* buf;
+    uint16_t len;
+    uint8_t req;
+  } config_state_t;
+  config_state_t m_config_state[ NUM_CLIENTS ];
+  config_state_t m_req;
+  
+  typedef struct {
+    uint16_t chunk_addr[ NUM_CHUNKS ];
+    uint16_t write_addr;
+    int16_t version;
+    uint8_t cur_sector;
+    bool valid : 1;
+  } config_info_t;
+  config_info_t m_config_info[ NUM_CLIENTS ];
+
+  typedef struct {
+    int32_t version;
+    uint16_t crc;
+  } config_metadata_t;
+  config_metadata_t m_metadata[ 2 ];
+  
+  uint8_t m_buf[ BUF_SIZE ];
+  uint16_t m_chunk;
+  uint16_t m_offset;
+
+  enum {
+    S_COPY_BEFORE,
+    S_COPY_AFTER,
+  };
+  uint8_t m_meta_state;
+  
+  error_t newRequest( uint8_t client );
+  void continueMount( uint8_t id );
+  void continueWrite( uint8_t id );
+  void continueCommit( uint8_t id );
+  void signalDone( uint8_t id, error_t error );
+  
+  command error_t Mount.mount[ uint8_t client ]() {
+    
+    if ( call Sector.getNumSectors[ client ]() != 2 )
+      return ESIZE;
+    m_req.req = S_MOUNT;
+    return newRequest( client );
+    
+  }
+  
+  command error_t Config.read[ uint8_t client ]( storage_addr_t addr, 
+						 void* buf, 
+						 storage_len_t len ) {
+    
+    if ( !m_config_info[ client ].valid )
+      return FAIL;
+    m_req.req = S_READ;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( client );
+    
+  }
+  
+  command error_t Config.write[ uint8_t client ]( storage_addr_t addr,
+						  void* buf,
+						  storage_len_t len ) {
+    
+    m_req.req = S_WRITE;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( client );    
+    
+  }
+  
+  command error_t Config.commit[ uint8_t client ]() {
+    
+    m_req.req = S_COMMIT;
+    return newRequest( client );    
+    
+  }
+  
+  command storage_len_t Config.getSize[ uint8_t client ]() {
+    return CONFIG_SIZE;
+  }
+  
+  command bool Config.valid[ uint8_t client ]() {
+    return m_config_info[ client ].valid;
+  }
+
+  error_t newRequest( uint8_t client ) {
+
+    if ( m_config_state[ client ].req != S_IDLE )
+      return EBUSY;
+    
+    call ClientResource.request[ client ]();
+    m_config_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  stm25p_addr_t calcAddr( uint8_t id, uint16_t addr, bool current ) {
+    stm25p_addr_t result = addr;
+    if ( !(current ^ m_config_info[ id ].cur_sector) )
+      result += STM25P_SECTOR_SIZE;
+    return result;
+  }
+  
+  event void ClientResource.granted[ uint8_t id ]() {
+
+    m_chunk = 0;
+    m_offset = 0;
+    
+    switch( m_config_state[ id ].req ) {
+    case S_IDLE:
+      break;
+    case S_MOUNT:
+      continueMount( id );
+      break;
+    case S_READ:
+      call Sector.read[ id ]( calcAddr( id, m_config_state[ id ].addr, TRUE ),
+			      m_config_state[ id ].buf,
+			      m_config_state[ id ].len );
+      break;
+    case S_WRITE:
+      m_meta_state = S_COPY_BEFORE;
+      m_chunk = m_config_state[ id ].addr >> CHUNK_SIZE_LOG2;
+      continueWrite( id );
+      break;
+    case S_COMMIT:
+      continueCommit( id );
+      break;
+    }
+    
+  }
+
+  void continueMount( uint8_t id ) {
+
+    uint32_t addr = 0;
+    uint8_t cur_sector = 0;
+    int i;
+
+    switch( m_chunk ) {
+    case 1:
+      addr = STM25P_SECTOR_SIZE;
+      // fall through
+    case 0:
+      addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t );
+      call Sector.read[ id ]( addr, (uint8_t*)&m_metadata[ m_chunk ],
+                              sizeof( config_metadata_t ) );
+      break;
+    case 3:
+      addr = STM25P_SECTOR_SIZE;
+      // fall through
+    case 2:
+      call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE );
+      break;
+    case 4:
+      if ( m_metadata[ 0 ].version != INVALID_VERSION ||
+	   m_metadata[ 1 ].version != INVALID_VERSION ) {
+	m_config_info[ id ].valid = TRUE;
+	if ( m_metadata[ 0 ].version == INVALID_VERSION )
+	  cur_sector = 1;
+	else if ( m_metadata[ 1 ].version == INVALID_VERSION )
+	  cur_sector = 0;
+	else
+	  cur_sector = (( m_metadata[1].version - m_metadata[0].version ) > 0);
+      }
+      m_config_info[ id ].cur_sector = cur_sector;
+      m_config_info[ id ].version = m_metadata[ cur_sector ].version;
+      call Sector.erase[ id ]( !cur_sector, 1 );
+      break;
+    case 5:
+      // initialize chunk addrs
+      for ( i = 0; i < NUM_CHUNKS; i++ )
+	m_config_info[ id ].chunk_addr[ i ] = i << CHUNK_SIZE_LOG2;
+      m_config_info[ id ].write_addr = CONFIG_SIZE;
+      signalDone( id, SUCCESS );
+      break;
+    }
+    
+    m_chunk++;
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					    stm25p_len_t len, error_t error ) {
+    switch ( m_config_state[ id ].req ) {
+    case S_IDLE:
+      break;
+    case S_MOUNT:
+      continueMount( id );
+      break;
+    case S_READ:
+      signalDone( id, error );
+      break;
+    case S_WRITE:
+      addr = calcAddr( id, m_config_info[ id ].write_addr, FALSE );
+      call Sector.write[ id ]( addr, buf, len );
+      break;
+    case S_COMMIT:
+      addr = ((uint16_t)m_chunk << CHUNK_SIZE_LOG2) + m_offset;
+      addr = calcAddr( id, addr, FALSE );
+      call Sector.write[ id ]( addr, buf, len );
+      break;
+    }
+  }
+  
+  void continueWrite( uint8_t id ) {
+    
+    config_state_t* state = &m_config_state[ id ];
+    config_info_t* info = &m_config_info[ id ];
+    uint8_t chunk = m_chunk + (m_offset / CHUNK_SIZE);
+    uint8_t offset = m_offset & 0xff;
+    uint32_t addr;
+    uint16_t len;
+    
+    // compute addr for copy
+    addr = info->chunk_addr[ chunk ] + offset;
+    addr = calcAddr( id, addr, info->chunk_addr[ chunk ] < CONFIG_SIZE );
+    
+    switch( m_meta_state ) {
+      
+    case S_COPY_BEFORE:
+      // copy old data before
+      if ( offset < (uint8_t)state->addr ) {
+	len = (uint8_t)state->addr - offset;
+	if ( len > sizeof( m_buf ) )
+	  len = sizeof( m_buf );
+	call Sector.read[ id ]( addr, m_buf, len );
+      }
+      // write new data
+      else if ( offset == (uint8_t)state->addr ) {
+	addr = calcAddr( id, info->write_addr, FALSE );
+	len = state->len;
+	call Sector.write[ id ]( addr, state->buf, len );
+	m_meta_state = S_COPY_AFTER;
+      }
+      break;
+
+    case S_COPY_AFTER:
+      // copy old data after
+      if ( offset != 0 ) {
+	len = CHUNK_SIZE - offset;
+	if ( len > sizeof( m_buf ) )
+	  len = sizeof( m_buf );
+	call Sector.read[ id ]( addr, m_buf, len );
+      }
+      // all done, update chunk addrs
+      else {
+	info->write_addr -= m_offset;
+	for ( chunk = 0; chunk < m_offset / CHUNK_SIZE; chunk++ ) {
+	  info->chunk_addr[ m_chunk+chunk ] = info->write_addr;
+	  info->write_addr += CHUNK_SIZE;
+	}
+	signalDone( id, SUCCESS );
+      }
+      break;
+
+    }
+
+  }
+  
+  event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len, error_t error ){
+    switch( m_config_state[ id ].req ) {
+
+    case S_WRITE:
+      m_config_info[ id ].write_addr += len;
+      m_offset += len;
+      continueWrite( id );
+      break;
+
+    case S_COMMIT:
+      m_offset += len;
+      continueCommit( id );
+      break;
+      
+    }
+
+  }
+  
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector,
+					     uint8_t num_sectors,
+					     error_t error ) {
+    if ( m_config_state[ id ].req == S_MOUNT )
+      continueMount( id );
+    else
+      continueCommit( id );
+  }
+  
+  void continueCommit( uint8_t id ) {
+    
+    config_info_t* info = &m_config_info[ id ];
+    uint32_t addr;
+    uint16_t len;
+    int i;
+    
+    // check if time to copy next chunk
+    if ( m_offset >= CHUNK_SIZE ) {
+      m_chunk++;
+      m_offset = 0;
+    }
+    
+    // copy data
+    if ( m_chunk < NUM_CHUNKS ) {
+      // compute addr for copy
+      addr = info->chunk_addr[ m_chunk ] + m_offset;
+      addr = calcAddr( id, addr, info->chunk_addr[ m_chunk ] < CONFIG_SIZE );
+      len = sizeof( m_buf );
+      call Sector.read[ id ]( addr, m_buf, len );
+    }
+    // compute crc
+    else if ( m_chunk == NUM_CHUNKS ) {
+      addr = calcAddr( 0, 0, FALSE );
+      call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE );
+      m_chunk++;
+    }
+    // swap and erase other sector
+    else if ( m_chunk == NUM_CHUNKS + 1 ) {
+      info->cur_sector ^= 1;
+      info->write_addr = CONFIG_SIZE;
+      // initialize chunks
+      for ( i = 0; i < NUM_CHUNKS; i++ )
+	info->chunk_addr[ i ] = (uint16_t)i << CHUNK_SIZE_LOG2;
+      call Sector.erase[ id ]( !info->cur_sector, 1 );
+      m_chunk++;
+    }
+    // signal done
+    else {
+      m_config_info[ id ].valid = TRUE;
+      signalDone( id, SUCCESS );
+    }
+    
+  }
+
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, 
+						  stm25p_len_t len,
+						  uint16_t crc,
+						  error_t error ) {
+    
+    // mount
+    if ( m_config_state[ id ].req == S_MOUNT ) {
+      uint8_t chunk = addr >> STM25P_SECTOR_SIZE_LOG2;
+      if ( m_metadata[ chunk ].crc != crc )
+	m_metadata[ chunk ].version = INVALID_VERSION;
+      continueMount( id );
+    }
+    // commit
+    else {
+      bool cur_sector = m_config_info[ id ].cur_sector;
+      m_config_info[ id ].version++;
+      m_metadata[ !cur_sector ].version = m_config_info[ id ].version;
+      m_metadata[ !cur_sector ].crc = crc;
+      addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t );
+      call Sector.write[ id ]( addr, (uint8_t*)&m_metadata[ !cur_sector ],
+			       sizeof( config_metadata_t ) );
+    }
+    
+  }
+
+  void signalDone( uint8_t id, error_t error ) {
+    
+    uint8_t req = m_config_state[ id ].req;
+    
+    call ClientResource.release[ id ]();
+    m_config_state[ id ].req = S_IDLE;
+    
+    switch( req ) {
+    case S_MOUNT:
+      signal Mount.mountDone[ id ]( error );
+      break;
+    case S_READ:
+      signal Config.readDone[ id ]( m_config_state[ id ].addr,
+				    m_config_state[ id ].buf,
+				    m_config_state[ id ].len, error );
+      break;
+    case S_WRITE:
+      signal Config.writeDone[ id ]( m_config_state[ id ].addr,
+				     m_config_state[ id ].buf,
+				     m_config_state[ id ].len, error );
+      break;
+    case S_COMMIT:
+      signal Config.commitDone[ id ]( error );
+      break;
+    }
+    
+  }
+  
+  default event void Mount.mountDone[ uint8_t id ]( error_t error ) {}
+  default event void Config.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Config.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Config.commitDone[ uint8_t id ]( error_t error ) {}
+  
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command void ClientResource.release[ uint8_t id ]() {}
+  
+}
diff --git a/tos/chips/stm25p/Stm25pLogConfigP.nc b/tos/chips/stm25p/Stm25pLogConfigP.nc
new file mode 100644
index 00000000..66fe2688
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pLogConfigP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic module Stm25pLogConfigP( bool IS_CIRCULAR ) {
+
+  provides interface Get as Circular;
+
+}
+
+implementation {
+  
+  command bool Circular.get() {
+    return IS_CIRCULAR;
+  }
+
+}
diff --git a/tos/chips/stm25p/Stm25pLogP.nc b/tos/chips/stm25p/Stm25pLogP.nc
new file mode 100644
index 00000000..7ccde10f
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pLogP.nc
@@ -0,0 +1,524 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+
+module Stm25pLogP {
+  
+  provides interface Init;
+  provides interface LogRead as Read[ uint8_t id ];
+  provides interface LogWrite as Write[ uint8_t id ];
+  
+  uses interface Stm25pSector as Sector[ uint8_t id ];
+  uses interface Resource as ClientResource[ uint8_t id ];
+  uses interface Get as Circular[ uint8_t id ];
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NUM_LOGS = uniqueCount( "Stm25p.Log" ),
+    BLOCK_SIZE = 4096,
+    BLOCK_SIZE_LOG2 = 12,
+    BLOCK_MASK = BLOCK_SIZE - 1,
+    BLOCKS_PER_SECTOR = STM25P_SECTOR_SIZE / BLOCK_SIZE,
+    MAX_RECORD_SIZE = 254,
+    INVALID_HEADER = 0xff,
+  };
+  
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_SEEK,
+    S_ERASE,
+    S_APPEND,
+    S_SYNC,
+  } stm25p_log_req_t;
+
+  typedef struct stm25p_log_state_t {
+    storage_cookie_t cookie;
+    void* buf;
+    uint8_t len;
+    stm25p_log_req_t req;
+  } stm25p_log_state_t;
+
+  typedef struct stm25p_log_info_t {
+    stm25p_addr_t read_addr;
+    stm25p_addr_t remaining;
+    stm25p_addr_t write_addr;
+  } stm25p_log_info_t;
+  
+  stm25p_log_state_t m_log_state[ NUM_LOGS ];
+  stm25p_log_state_t m_req;
+  stm25p_log_info_t m_log_info[ NUM_LOGS ];
+  stm25p_addr_t m_addr;
+  uint8_t m_header;
+  uint8_t m_remaining;
+  uint8_t m_len;
+
+  typedef enum {
+    S_SEARCH_BLOCKS,
+    S_SEARCH_RECORDS,
+    S_SEARCH_SEEK,
+    S_HEADER,
+    S_DATA,
+  } stm25p_log_rw_state_t;
+
+  stm25p_log_rw_state_t m_rw_state;
+
+  error_t newRequest( uint8_t client );
+  void continueReadOp( uint8_t client );
+  void continueAppendOp( uint8_t client );
+  void signalDone( uint8_t id, error_t error );
+  
+  command error_t Init.init() {
+    int i;
+    for ( i = 0; i < NUM_LOGS; i++ ) {
+      m_log_info[ i ].read_addr = STM25P_INVALID_ADDRESS;
+      m_log_info[ i ].write_addr = 0;
+    }
+    return SUCCESS;
+  }
+  
+  command error_t Read.read[ uint8_t id ]( void* buf, storage_len_t len ) {
+    
+    m_req.req = S_READ;
+    m_req.buf = buf;
+    m_req.len = len;
+    m_len = len;
+    return newRequest( id );
+    
+  }
+  
+  command error_t Read.seek[ uint8_t id ]( storage_addr_t cookie ) {
+    
+    if ( cookie > m_log_info[ id ].write_addr )
+      return FAIL;
+    
+    m_req.req = S_SEEK;
+    m_req.cookie = cookie;
+    return newRequest( id );
+    
+  }
+  
+  command storage_cookie_t Read.currentOffset[ uint8_t id ]() {
+    return m_log_info[ id ].read_addr;
+  }
+  
+  command storage_cookie_t Read.getSize[ uint8_t id ]() {
+    return ( (storage_len_t)call Sector.getNumSectors[ id ]()
+             << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  command storage_cookie_t Write.currentOffset[ uint8_t id ]() {
+    return m_log_info[ id ].write_addr;
+  }
+  
+  command error_t Write.erase[ uint8_t id ]() {
+    m_req.req = S_ERASE;
+    return newRequest( id );
+  }
+  
+  command error_t Write.append[ uint8_t id ]( void* buf, storage_len_t len ) {
+    
+    uint16_t bytes_left = (uint16_t)m_log_info[ id ].write_addr % BLOCK_SIZE;
+    bytes_left = BLOCK_SIZE - bytes_left;
+    
+    // don't allow appends larger than maximum record size
+    if ( len > MAX_RECORD_SIZE )
+      return ESIZE;
+
+    // move to next block if current block doesn't have enough space
+    if ( sizeof( m_header ) + len > bytes_left )
+      m_log_info[ id ].write_addr += bytes_left;
+    
+    // if log is not circular, make sure it doesn't grow too large
+    if ( !call Circular.get[ id ]() &&
+	 ( (uint8_t)(m_log_info[ id ].write_addr >> STM25P_SECTOR_SIZE_LOG2) >=
+	   call Sector.getNumSectors[ id ]() ) )
+      return ESIZE;
+
+    m_req.req = S_APPEND;
+    m_req.buf = buf;
+    m_req.len = len;
+
+    return newRequest( id );
+
+  }
+  
+  command error_t Write.sync[ uint8_t id ]() {
+    m_req.req = S_SYNC;
+    return newRequest( id );
+  }
+  
+  error_t newRequest( uint8_t client ) {
+    
+    if ( m_log_state[ client ].req != S_IDLE )
+      return FAIL;
+    
+    call ClientResource.request[ client ]();
+    m_log_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  event void ClientResource.granted[ uint8_t id ]() {
+
+    // log never used, need to find start and end of log
+    if ( m_log_info[ id ].read_addr == STM25P_INVALID_ADDRESS &&
+	 m_log_state[ id ].req != S_ERASE ) {
+      m_rw_state = S_SEARCH_BLOCKS;
+      call Sector.read[ id ]( 0, (uint8_t*)&m_addr, sizeof( m_addr ) );
+    }
+    // start and end of log known, do the requested operation
+    else {
+      switch( m_log_state[ id ].req ) {
+      case S_READ:
+	m_rw_state = (m_log_info[ id ].remaining) ? S_DATA : S_HEADER;
+	continueReadOp( id );
+	break;
+      case S_SEEK:
+	{
+	  // make sure the cookie is still within the range of valid data
+	  uint8_t numSectors = call Sector.getNumSectors[ id ]();
+	  uint8_t readSector = 
+	    (m_log_state[ id ].cookie >> STM25P_SECTOR_SIZE_LOG2);
+	  uint8_t writeSector =
+	    ((m_log_info[ id ].write_addr-1)>>STM25P_SECTOR_SIZE_LOG2)+1;
+	  // if cookie is overwritten, advance to beginning of log
+	  if ( (writeSector - readSector) > numSectors ) {
+	    m_log_state[ id ].cookie = 
+	      (storage_cookie_t)(writeSector-numSectors)
+		<> STM25P_SECTOR_SIZE_LOG2 ) % sector;
+  }
+
+  stm25p_addr_t calcAddr( uint8_t client, stm25p_addr_t addr  ) {
+    stm25p_addr_t result = calcSector( client, addr );
+    result <<= STM25P_SECTOR_SIZE_LOG2;
+    result |= addr & STM25P_SECTOR_MASK;
+    return result;
+  }
+
+  void continueReadOp( uint8_t client ) {
+    
+    stm25p_addr_t read_addr = m_log_info[ client ].read_addr;
+    uint8_t* buf;
+    uint8_t len;
+
+    // check if all done
+    if ( m_len == 0 || read_addr >= m_log_info[ client ].write_addr ) {
+      signalDone( client, SUCCESS );
+      return;
+    }
+    
+    buf = &m_header;
+    len = sizeof( len );
+
+    if ( m_rw_state == S_DATA ) {
+      // if header is invalid, move to next block
+      if ( m_header == INVALID_HEADER ) {
+	m_rw_state = S_HEADER;
+	read_addr += BLOCK_SIZE;
+	read_addr &= ~BLOCK_MASK;
+      }
+      else {
+	buf = m_log_state[ client ].buf;
+	// truncate if record is shorter than requested length
+	if ( m_remaining < m_len )
+	  m_log_state[ client ].len = m_remaining;
+	len = m_len;
+      }
+    }
+    
+    // if on block boundary
+    if ( !((uint16_t)read_addr & BLOCK_MASK ) )
+      read_addr += sizeof( storage_addr_t );
+    
+    m_log_info[ client ].read_addr = read_addr;
+    call Sector.read[ client ]( calcAddr( client, read_addr ), buf, len );
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf,
+					    stm25p_len_t len, error_t error ) {
+
+    stm25p_log_info_t* log_info = &m_log_info[ id ];
+
+    // searching for the first and last log blocks
+    switch( m_rw_state ) {
+    case S_SEARCH_BLOCKS: 
+      {
+	uint8_t block = addr >> BLOCK_SIZE_LOG2;
+	// record potential starting and ending addresses
+	if ( m_addr != STM25P_INVALID_ADDRESS ) {
+	  if ( m_addr < log_info->read_addr )
+	    log_info->read_addr = m_addr;
+	  if ( m_addr > log_info->write_addr )
+	    log_info->write_addr = m_addr;
+	}
+	// move on to next log block
+	if ( (uint16_t)m_addr == 0 &&
+	     ++block < (call Sector.getNumSectors[ id ]()*BLOCKS_PER_SECTOR)) {
+	  addr += BLOCK_SIZE;
+	  call Sector.read[ id ]( addr, (uint8_t*)&m_addr, sizeof( m_addr ) );
+	}
+	// if log is empty, continue operation
+	else if ( log_info->read_addr == STM25P_INVALID_ADDRESS ) {
+	  log_info->read_addr = 0;
+	  log_info->write_addr = 0;
+	  signal ClientResource.granted[ id ]();
+	}
+	// search for last record
+	else {
+	  log_info->write_addr += sizeof( m_addr );
+	  m_rw_state = S_SEARCH_RECORDS;
+	  call Sector.read[ id ]( log_info->write_addr, &m_header,
+				  sizeof( m_header ) );
+	}
+      }
+      break;
+
+    case S_SEARCH_RECORDS: 
+      {
+	// searching for the last log record to write
+	uint16_t cur_block = log_info->write_addr >> BLOCK_SIZE_LOG2;
+	uint16_t new_block = ( log_info->write_addr + sizeof( m_header ) + 
+			       m_header ) >> BLOCK_SIZE_LOG2;
+	// if header is valid and is on same block, move to next record
+	if ( m_header != INVALID_HEADER && cur_block == new_block ) {
+	  log_info->write_addr += sizeof( m_header ) + m_header;
+	  call Sector.read[ id ]( log_info->write_addr, &m_header,
+				  sizeof( m_header ) );
+	}
+	// found last record
+	else {
+	  signal ClientResource.granted[ id ]();
+	}
+      }
+      break;
+
+    case S_SEARCH_SEEK:
+      {
+	// searching for last log record to read
+	log_info->read_addr += sizeof( m_header ) + m_header;
+	// if not yet at cookie, keep searching
+	if ( log_info->read_addr < m_log_state->cookie ) {
+	  call Sector.read[ id ]( log_info->read_addr, &m_header,
+				  sizeof( m_header ) );
+	}
+	// at or passed cookie, stop
+	else {
+	  log_info->remaining = log_info->read_addr - m_log_state[ id ].cookie;
+	  log_info->read_addr = m_log_state[ id ].cookie;
+	  signalDone( id, error );
+	}
+      }
+      break;
+
+    case S_HEADER:
+      {
+	// if header is invalid, move to next block
+	if ( m_header == INVALID_HEADER ) {
+	  log_info->read_addr += BLOCK_SIZE;
+	  log_info->read_addr &= ~BLOCK_MASK;
+	}
+	else {
+	  log_info->read_addr += sizeof( m_header );
+	  log_info->remaining = m_header;
+	  m_rw_state = S_DATA;
+	}
+	continueReadOp( id );
+      }
+      break;
+
+    case S_DATA:
+      {
+	log_info->read_addr += len;
+	log_info->remaining -= len;
+	m_len -= len;
+	m_rw_state = S_HEADER;
+	continueReadOp( id );
+	break;
+      }
+      
+    }
+    
+  }
+
+  void continueAppendOp( uint8_t client ) {
+    
+    stm25p_addr_t write_addr = m_log_info[ client ].write_addr;
+    uint8_t* buf;
+    uint8_t len;
+    
+    if ( !(uint16_t)write_addr ) {
+      call Sector.erase[ client ]( calcSector( client, write_addr ), 1 );
+    }
+    else {
+      if ( m_rw_state == S_HEADER ) {
+	buf = &m_log_state[ client ].len;
+	len = sizeof( m_log_state[ client ].len );
+      }
+      else {
+	buf = m_log_state[ client ].buf;
+	len = m_log_state[ client ].len;
+      }
+      call Sector.write[ client ]( calcAddr( client, write_addr ), buf, len );
+    }
+
+  }
+
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, 
+					     uint8_t num_sectors,
+					     error_t error ) {
+    if ( m_log_state[ id ].req == S_ERASE ) {
+      m_log_info[ id ].read_addr = 0;
+      m_log_info[ id ].write_addr = 0;
+      signalDone( id, error );
+    }
+    else {
+      // advance read pointer if write pointer has gone too far ahead
+      // (the log could have cycled around)
+      stm25p_addr_t volume_size = 
+	STM25P_SECTOR_SIZE * ( call Sector.getNumSectors[ id ]() - 1 );
+      if ( m_log_info[ id ].write_addr >= volume_size ) {
+	stm25p_addr_t read_addr = m_log_info[ id ].write_addr - volume_size;
+	if ( m_log_info[ id ].read_addr < read_addr )
+	  m_log_info[ id ].read_addr = read_addr;
+      }
+      m_addr = m_log_info[ id ].write_addr;
+      call Sector.write[ id ]( calcAddr( id, m_addr ), (uint8_t*)&m_addr, 
+			      sizeof( m_addr ) );
+    }
+  }
+
+  event void Sector.writeDone[ uint8_t id ]( storage_addr_t addr, 
+					     uint8_t* buf, 
+					     storage_len_t len, 
+					     error_t error ) {
+    m_log_info[ id ].write_addr += len;
+    if ( m_rw_state == S_HEADER ) {
+      if ( len == sizeof( m_header ) )
+	m_rw_state = S_DATA;
+      continueAppendOp( id );
+    }
+    else {
+      signalDone( id, error );
+    }
+  }
+  
+  void signalDone( uint8_t id, error_t error ) {
+    
+    stm25p_log_req_t req = m_log_state[ id ].req;
+    void* buf = m_log_state[ id ].buf;
+    storage_len_t len = m_log_state[ id ].len;
+
+    call ClientResource.release[ id ]();
+    m_log_state[ id ].req = S_IDLE;
+    switch( req ) {
+    case S_IDLE:
+      break;
+    case S_READ:
+      signal Read.readDone[ id ]( buf, len - m_len, error );
+      break;
+    case S_SEEK:
+      signal Read.seekDone[ id ]( error );
+      break;
+    case S_ERASE:
+      signal Write.eraseDone[ id ]( error );
+      break;
+    case S_APPEND:
+      signal Write.appendDone[ id ]( buf, len, error );
+      break;
+    case S_SYNC:
+      signal Write.syncDone[ id ]( error );
+      break;
+    }
+  }
+
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {}
+
+  default event void Read.readDone[ uint8_t id ]( void* data, storage_len_t len, error_t error ) {}
+  default event void Read.seekDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.eraseDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.appendDone[ uint8_t id ]( void* data, storage_len_t len, error_t error ) {}
+  default event void Write.syncDone[ uint8_t id ]( error_t error ) {}
+
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command void ClientResource.release[ uint8_t id ]() {}
+  default command bool Circular.get[ uint8_t id ]() { return FALSE; }
+  
+}
diff --git a/tos/chips/stm25p/Stm25pSector.nc b/tos/chips/stm25p/Stm25pSector.nc
new file mode 100644
index 00000000..d8da20d2
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSector.nc
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL for the ST M25P family of serial code flash chips. This
+ * provides a sector level abstraction to perform basic
+ * operations. Upon completion of a write/erase operation, all data is
+ * committed to non-volatile storage.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Stm25p.h"
+
+interface Stm25pSector {
+
+  /**
+   * Get the physical address of a volume address.
+   *
+   * @return The physical address corresponding to the volume address.
+   */
+  command stm25p_addr_t getPhysicalAddress( stm25p_addr_t addr );
+
+  /**
+   * Get the number of sectors in the volume.
+   */
+  command uint8_t getNumSectors();
+
+  /**
+   * Read data from the flash chip. On SUCCESS, the
+   * readDone event will be signalled when the operation
+   * is complete.
+   *
+   * @param addr within volume to read data from.
+   * @param buf pointer to read buffer.
+   * @param len number of bytes to read.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t read( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len );
+
+  /**
+   * Signals when the read operation is complete.
+   *
+   * @param addr within the volume that data was read from.
+   * @param buf pointer to buffer that data was placed.
+   * @param len number of bytes read.
+   * @param error notification of how the operation went.
+   */
+  event void readDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, 
+		       error_t error );
+  
+  /**
+   * Write data to the flash chip. On SUCCESS, the
+   * writeDone event will be signalled when the operation
+   * is complete.
+   *
+   * @param addr within volume to write data to.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t write( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len );
+
+  /**
+   * Signals when the write operation is complete.
+   *
+   * @param addr within the volume that data was written to.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes written.
+   * @param error notification of how the operation went.
+   */
+  event void writeDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, 
+			error_t error );
+  
+  /**
+   * Erase a number of sectors. On SUCCESS, the eraseDone
+   * event will be signalled when the operation completes.
+   *
+   * @param sector within volume to begin erasing.
+   * @param num_sectors number of sectors to erase.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t erase( uint8_t sector, uint8_t num_sectors );
+
+  /**
+   * Signals when the erase operation is complete.
+   *
+   * @param sector within volume that erasing begain.
+   * @param num_sectors number of sectors erased.
+   * @param error notification of how the operation went.
+   */
+  event void eraseDone( uint8_t sector, uint8_t num_sectors, error_t error );
+  
+  /**
+   * Compute CRC for some contiguous data. On SUCCESS, the
+   * computeCrcDone event will be signalled when the
+   * operation completes.
+   *
+   * @param crc the crc value to start with.
+   * @param addr within the volume to begin crc computation.
+   * @param len number of bytes to compute crc over.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  command error_t computeCrc( uint16_t crc, stm25p_addr_t addr, 
+			      stm25p_len_t len );
+  
+  /**
+   * Signals when the crc computation is complete.
+   *
+   * @param addr within the volume that the crc computation began at.
+   * @param len number of bytes that the crc was computed over.
+   * @param crc the resulting crc value
+   * @param error notification of how the operation went.
+   */
+  event void computeCrcDone( stm25p_addr_t addr, stm25p_len_t len, 
+			     uint16_t crc, error_t error );
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pSectorC.nc b/tos/chips/stm25p/Stm25pSectorC.nc
new file mode 100644
index 00000000..c24e6409
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSectorC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the sector storage absraction for the ST M25P
+ * serial code flash.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration Stm25pSectorC {
+
+  provides interface Resource as ClientResource[ uint8_t id ];
+  provides interface Stm25pSector as Sector[ uint8_t id ];
+  provides interface Stm25pVolume as Volume[ uint8_t id ];
+
+}
+
+implementation {
+
+  components MainC;
+
+  components Stm25pSectorP as SectorP;
+  ClientResource = SectorP;
+  Sector = SectorP;
+  Volume = SectorP;
+  
+  components new FcfsArbiterC( "Stm25p.Volume" ) as ArbiterC;
+  MainC.SoftwareInit -> ArbiterC;
+  SectorP.Stm25pResource -> ArbiterC;
+
+  components new SplitControlDeferredPowerManagerC( 1024 ) as PowerManagerC;
+  MainC.SoftwareInit -> PowerManagerC;
+  PowerManagerC.SplitControl -> SectorP;
+  PowerManagerC.ArbiterInit -> ArbiterC;
+  PowerManagerC.ResourceController -> ArbiterC;
+  PowerManagerC.ArbiterInfo -> ArbiterC;
+
+  components Stm25pSpiC as SpiC;
+  SectorP.SpiResource -> SpiC;
+  SectorP.Spi -> SpiC;
+  MainC.SoftwareInit -> SpiC;
+
+  components LedsC as Leds;
+  SectorP.Leds -> Leds;
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pSectorP.nc b/tos/chips/stm25p/Stm25pSectorP.nc
new file mode 100644
index 00000000..383a71ed
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSectorP.nc
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include 
+#include 
+
+module Stm25pSectorP {
+
+  provides interface SplitControl;
+  provides interface Resource as ClientResource[ uint8_t id ];
+  provides interface Stm25pSector as Sector[ uint8_t id ];
+  provides interface Stm25pVolume as Volume[ uint8_t id ];
+
+  uses interface Resource as Stm25pResource[ uint8_t id ];
+  uses interface Resource as SpiResource;
+  uses interface Stm25pSpi as Spi;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NO_CLIENT = 0xff,
+  };
+
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_WRITE,
+    S_ERASE,
+    S_CRC,
+  } stm25p_sector_state_t;
+  norace stm25p_sector_state_t m_state;
+
+  typedef enum {
+    S_NONE,
+    S_START,
+    S_STOP,
+  } stm25p_power_state_t;
+  norace stm25p_power_state_t m_power_state;
+
+  norace uint8_t m_client;
+  norace stm25p_addr_t m_addr;
+  norace stm25p_len_t m_len;
+  norace stm25p_len_t m_cur_len;
+  norace uint8_t* m_buf;
+  norace error_t m_error;
+  norace uint16_t m_crc;
+  
+  void bindVolume();
+  void signalDone( error_t error );
+  task void signalDone_task();
+
+  command error_t SplitControl.start() {
+    error_t error = call SpiResource.request();
+    if ( error == SUCCESS )
+      m_power_state = S_START;
+    return error;
+  }
+  
+  command error_t SplitControl.stop() {
+    error_t error = call SpiResource.request();
+    if ( error == SUCCESS )
+      m_power_state = S_STOP;
+    return error;
+  }
+  
+  async command error_t ClientResource.request[ uint8_t id ]() {
+    return call Stm25pResource.request[ id ]();
+  }
+
+  async command error_t ClientResource.immediateRequest[ uint8_t id ]() {
+    return FAIL;
+  }
+  
+  async command void ClientResource.release[ uint8_t id ]() {
+    if ( m_client == id ) {
+      m_state = S_IDLE;
+      m_client = NO_CLIENT;
+      call SpiResource.release();
+      call Stm25pResource.release[ id ]();
+    }
+  }
+  
+  event void Stm25pResource.granted[ uint8_t id ]() {
+    m_client = id;
+    call SpiResource.request();
+  }
+  
+  uint8_t getVolumeId( uint8_t client ) {
+    return signal Volume.getVolumeId[ client ]();
+  }  
+  
+  event void SpiResource.granted() {
+    error_t error;
+    stm25p_power_state_t power_state = m_power_state;
+    m_power_state = S_NONE;
+    if ( power_state == S_START ) {
+      error = call Spi.powerUp();
+      call SpiResource.release();
+      signal SplitControl.startDone( error );
+      return;
+    }
+    else if ( power_state == S_STOP ) {
+      error = call Spi.powerDown();
+      call SpiResource.release();
+      signal SplitControl.stopDone( error );
+      return;
+    }
+    signal ClientResource.granted[ m_client ]();
+  }
+  
+  async command uint8_t ClientResource.isOwner[ uint8_t id ]() {
+    return call Stm25pResource.isOwner[id]();
+  }
+  
+  stm25p_addr_t physicalAddr( uint8_t id, stm25p_addr_t addr ) {
+    return addr + ( (stm25p_addr_t)STM25P_VMAP[ getVolumeId( id ) ].base 
+		    << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  stm25p_len_t calcWriteLen( stm25p_addr_t addr ) {
+    stm25p_len_t len = STM25P_PAGE_SIZE - ( addr & STM25P_PAGE_MASK );
+    return ( m_cur_len < len ) ? m_cur_len : len;
+  }
+  
+  command stm25p_addr_t Sector.getPhysicalAddress[ uint8_t id ]( stm25p_addr_t addr ) {
+    return physicalAddr( id, addr );
+  }
+  
+  command uint8_t Sector.getNumSectors[ uint8_t id ]() {
+    return STM25P_VMAP[ getVolumeId( id ) ].size;
+  }
+  
+  command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len ) {
+    
+    m_state = S_READ;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    
+    return call Spi.read( physicalAddr( id, addr ), buf, len );
+    
+  }
+  
+  async event void Spi.readDone( stm25p_addr_t addr, uint8_t* buf, 
+				 stm25p_len_t len, error_t error ) {
+    signalDone( error );
+  }
+  
+  command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, 
+					      uint8_t* buf, 
+					      stm25p_len_t len ) {
+    
+    m_state = S_WRITE;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = m_cur_len = len;
+    
+    return call Spi.pageProgram( physicalAddr( id, addr ), buf, 
+				 calcWriteLen( addr ) );
+    
+  }
+  
+  async event void Spi.pageProgramDone( stm25p_addr_t addr, uint8_t* buf, 
+					stm25p_len_t len, error_t error ) {
+    addr += len;
+    buf += len;
+    m_cur_len -= len;
+    if ( !m_cur_len )
+      signalDone( SUCCESS );
+    else
+      call Spi.pageProgram( addr, buf, calcWriteLen( addr ) );
+  }
+  
+  command error_t Sector.erase[ uint8_t id ]( uint8_t sector,
+					      uint8_t num_sectors ) {
+    
+    m_state = S_ERASE;
+    m_addr = sector;
+    m_len = num_sectors;
+    m_cur_len = 0;
+    
+    return call Spi.sectorErase( STM25P_VMAP[ getVolumeId(id) ].base + m_addr +
+				 m_cur_len );
+    
+  }
+  
+  async event void Spi.sectorEraseDone( uint8_t sector, error_t error ) {
+    if ( ++m_cur_len < m_len )
+      call Spi.sectorErase( STM25P_VMAP[getVolumeId(m_client)].base + m_addr +
+			    m_cur_len );
+    else
+      signalDone( error );
+  }
+  
+  command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, 
+						   stm25p_addr_t addr,
+						   stm25p_len_t len ) {
+    
+    m_state = S_CRC;
+    m_addr = addr;
+    m_len = len;
+    
+    return call Spi.computeCrc( crc, m_addr, m_len );
+    
+  }
+  
+  async event void Spi.computeCrcDone( uint16_t crc, stm25p_addr_t addr, 
+				       stm25p_len_t len, error_t error ) {
+    m_crc = crc;
+    signalDone( SUCCESS );
+  }
+  
+  async event void Spi.bulkEraseDone( error_t error ) {
+    
+  }
+  
+  void signalDone( error_t error ) {
+    m_error = error;
+    post signalDone_task();
+  }
+  
+  task void signalDone_task() {
+    switch( m_state ) {
+    case S_IDLE:
+      signal ClientResource.granted[ m_client ]();
+      break;
+    case S_READ:
+      signal Sector.readDone[ m_client ]( m_addr, m_buf, m_len, m_error );
+      break;
+    case S_CRC:
+      signal Sector.computeCrcDone[ m_client ]( m_addr, m_len,
+						m_crc, m_error );
+      break;
+    case S_WRITE:
+      signal Sector.writeDone[ m_client ]( m_addr, m_buf, m_len, m_error );
+      break;
+    case S_ERASE:
+      signal Sector.eraseDone[ m_client ]( m_addr, m_len, m_error );
+      break;
+    default:
+      break;
+    }
+  }
+  
+  default event void ClientResource.granted[ uint8_t id ]() {}
+  default event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {}
+  default event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {}
+  default event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) {}
+  default event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {}
+  default async event volume_id_t Volume.getVolumeId[ uint8_t id ]() { return 0xff; }
+  
+}
+
diff --git a/tos/chips/stm25p/Stm25pSpi.nc b/tos/chips/stm25p/Stm25pSpi.nc
new file mode 100644
index 00000000..d57df55c
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpi.nc
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SPI abstraction for the ST M25P family of serial code flash chips.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface Stm25pSpi {
+
+  /**
+   * Put chip into deep power down mode.
+   *
+   * @return SUCCESS if the request completed successfully, FAIL
+   * otherwise.
+   */
+  async command error_t powerDown();
+
+  /**
+   * Release chip from power down mode.
+   *
+   * @return SUCCESS if the request completed successfully, FAIL
+   * otherwise.
+   */
+  async command error_t powerUp();
+  
+  /**
+   * Initiate a read operation. On SUCCESS, the readDone
+   * event will be signalled when the operation completes.
+   *
+   * @param addr the physical address to start at.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to read.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t read( stm25p_addr_t addr, uint8_t* buf, 
+			      stm25p_len_t len );
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr the starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes read.
+   * @param error notification of how the operation went.
+   */
+  async event void readDone( stm25p_addr_t addr, uint8_t* buf, 
+			     stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a crc computation. On SUCCESS, the
+   * computeCrcDone event will be signalled when the
+   * operation completes.
+   *
+   * @param crc starting crc value.
+   * @param addr the starting physical address.
+   * @param len the number of bytes to do crc computation over.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t computeCrc( uint16_t crc, stm25p_addr_t addr,
+				    stm25p_len_t len );
+
+  /**
+   * Signals the completion of a crc computation operation.
+   *
+   * @param crc resulting crc value.
+   * @param addr the starting physical address.
+   * @param len the number of bytes the crc was computed over.
+   * @param error notification of how the operation went.
+   */
+  async event void computeCrcDone( uint16_t crc, stm25p_addr_t addr,
+				   stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a page program. On SUCCESS, the
+   * pageProgramDone event will be signalled when the
+   * operation completes.
+   *
+   * @param addr starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t pageProgram( stm25p_addr_t addr, uint8_t* buf, 
+				     stm25p_len_t len );
+
+  /**
+   * Signal the completion of a page program operation.
+   *
+   * @param addr starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @param error notification of how the operation went.
+   */
+  async event void pageProgramDone( stm25p_addr_t addr, uint8_t* buf, 
+				    stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a sector erase. On SUCCESS, the
+   * sectorEraseDone event will be signalled when the
+   * operation completes.
+   *
+   * @param sector physical sector to erase.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t sectorErase( uint8_t sector );
+
+  /**
+   * Signals the completion of a sector erase operation.
+   *
+   * @param sector physical sector erased
+   * @param error notification of how the operation went.
+   */
+  async event void sectorEraseDone( uint8_t sector, error_t error );
+
+  /**
+   * Initiate a bulk erase. On SUCCESS, the bulkEraseDone
+   * event will be signalled when the operation completes.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t bulkErase();
+
+  /**
+   * Signals the completion of a bulk erase operation.
+   *
+   * @param error notification of how the operation went.
+   */
+  async event void bulkEraseDone( error_t error );
+
+}
diff --git a/tos/chips/stm25p/Stm25pSpiC.nc b/tos/chips/stm25p/Stm25pSpiC.nc
new file mode 100644
index 00000000..45b8f64d
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpiC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the SPI bus abstraction for the ST M25P serial
+ * code flash.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration Stm25pSpiC {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface Stm25pSpi;
+
+}
+
+implementation {
+
+  components Stm25pSpiP as SpiP;
+  Init = SpiP;
+  Resource = SpiP.ClientResource;
+  Stm25pSpi = SpiP;
+
+  components HplStm25pSpiC as SpiC;
+  SpiP.SpiResource -> SpiC;
+  SpiP.SpiByte -> SpiC;
+  SpiP.SpiPacket -> SpiC;
+
+  components HplStm25pPinsC as PinsC;
+  SpiP.CSN -> PinsC.CSN;
+  SpiP.Hold -> PinsC.Hold;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/stm25p/Stm25pSpiP.nc b/tos/chips/stm25p/Stm25pSpiP.nc
new file mode 100644
index 00000000..0a601b32
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpiP.nc
@@ -0,0 +1,272 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "crc.h"
+
+module Stm25pSpiP {
+
+  provides interface Init;
+  provides interface Resource as ClientResource;
+  provides interface Stm25pSpi as Spi;
+
+  uses interface Resource as SpiResource;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as Hold;
+  uses interface SpiByte;
+  uses interface SpiPacket;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    CRC_BUF_SIZE = 16,
+  };
+
+  typedef enum {
+    S_READ = 0x3,
+    S_PAGE_PROGRAM = 0x2,
+    S_SECTOR_ERASE = 0xd8,
+    S_BULK_ERASE = 0xc7,
+    S_WRITE_ENABLE = 0x6,
+    S_POWER_ON = 0xab,
+    S_DEEP_SLEEP = 0xb9,
+  } stm25p_cmd_t;
+
+  norace uint8_t m_cmd[ 4 ];
+
+  norace bool m_is_writing = FALSE;
+  norace bool m_computing_crc = FALSE;
+
+  norace stm25p_addr_t m_addr;
+  norace uint8_t* m_buf;
+  norace stm25p_len_t m_len;
+  norace stm25p_addr_t m_cur_addr;
+  norace stm25p_len_t m_cur_len;
+  norace uint8_t m_crc_buf[ CRC_BUF_SIZE ];
+  norace uint16_t m_crc;
+
+  error_t newRequest( bool write, stm25p_len_t cmd_len );
+  void signalDone( error_t error );
+
+  uint8_t sendCmd( uint8_t cmd, uint8_t len ) {
+
+    uint8_t tmp;
+    int i;
+
+    call CSN.clr();
+    for ( i = 0; i < len; i++ )
+      call SpiByte.write( cmd, &tmp );
+    call CSN.set();
+
+    return tmp;
+
+  }
+
+  command error_t Init.init() {
+    call CSN.makeOutput();
+    call Hold.makeOutput();
+    call CSN.set();
+    call Hold.set();
+    return SUCCESS;
+  }
+
+  async command error_t ClientResource.request() {
+    return call SpiResource.request();
+  }
+
+  async command error_t ClientResource.immediateRequest() {
+    return call SpiResource.immediateRequest();
+  }
+  
+  async command void ClientResource.release() {
+    call SpiResource.release();
+  }
+
+  async command uint8_t ClientResource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  stm25p_len_t calcReadLen() {
+    return ( m_cur_len < CRC_BUF_SIZE ) ? m_cur_len : CRC_BUF_SIZE;
+  }  
+
+  async command error_t Spi.powerDown() {
+    sendCmd( S_DEEP_SLEEP, 1 );
+    return SUCCESS;
+  }
+
+  async command error_t Spi.powerUp() {
+    sendCmd( S_POWER_ON, 5 );
+    return SUCCESS;
+  }
+
+  async command error_t Spi.read( stm25p_addr_t addr, uint8_t* buf, 
+				  stm25p_len_t len ) {
+    m_cmd[ 0 ] = S_READ;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    return newRequest( FALSE, 4 );
+  }
+
+  async command error_t Spi.computeCrc( uint16_t crc, stm25p_addr_t addr,
+					stm25p_len_t len ) {
+    m_computing_crc = TRUE;
+    m_crc = crc;
+    m_addr = m_cur_addr = addr;
+    m_len = m_cur_len = len;
+    return call Spi.read( addr, m_crc_buf, calcReadLen() );
+  }
+  
+  async command error_t Spi.pageProgram( stm25p_addr_t addr, uint8_t* buf, 
+					 stm25p_len_t len ) {
+    m_cmd[ 0 ] = S_PAGE_PROGRAM;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    return newRequest( TRUE, 4 );
+  }
+
+  async command error_t Spi.sectorErase( uint8_t sector ) {
+    m_cmd[ 0 ] = S_SECTOR_ERASE;
+    m_addr = (stm25p_addr_t)sector << STM25P_SECTOR_SIZE_LOG2;
+    return newRequest( TRUE, 4 );
+  }
+
+  async command error_t Spi.bulkErase() {
+    m_cmd[ 0 ] = S_BULK_ERASE;
+    return newRequest( TRUE, 1 );
+  }
+
+  error_t newRequest( bool write, stm25p_len_t cmd_len ) {
+    m_cmd[ 1 ] = m_addr >> 16;
+    m_cmd[ 2 ] = m_addr >> 8;
+    m_cmd[ 3 ] = m_addr;
+    if ( write )
+      sendCmd( S_WRITE_ENABLE, 1 );
+    call CSN.clr();
+    call SpiPacket.send( m_cmd, NULL, cmd_len );
+    return SUCCESS;
+  }
+
+  void releaseAndRequest() {
+    call SpiResource.release();
+    call SpiResource.request();
+  }
+
+  async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf,
+				       uint16_t len, error_t error ) {
+
+    int i;
+
+    switch( m_cmd[ 0 ] ) {
+
+    case S_READ:
+      if ( tx_buf == m_cmd ) {
+	call SpiPacket.send( NULL, m_buf, m_len );
+	break;
+      }
+      else if ( m_computing_crc ) {
+	for ( i = 0; i < len; i++ )
+	  m_crc = crcByte( m_crc, m_crc_buf[ i ] );
+	m_cur_addr += len;
+	m_cur_len -= len;
+	if ( m_cur_len ) {
+	  call SpiPacket.send( NULL, m_crc_buf, calcReadLen() );
+	  break;
+	}
+      }
+      call CSN.set();
+      signalDone( SUCCESS );
+      break;
+
+    case S_PAGE_PROGRAM:
+      if ( tx_buf == m_cmd ) {
+	call SpiPacket.send( m_buf, NULL, m_len );
+	break;
+      }
+      // fall through
+      
+    case S_SECTOR_ERASE: case S_BULK_ERASE:
+      call CSN.set();
+      m_is_writing = TRUE;
+      releaseAndRequest();
+      break;
+
+    default:
+      break;
+
+    }
+
+  }
+
+  event void SpiResource.granted() {
+
+    if ( !m_is_writing )
+      signal ClientResource.granted();
+    else if ( sendCmd( 0x5, 2 ) & 0x1 )
+      releaseAndRequest();
+    else
+      signalDone( SUCCESS );
+
+  }
+
+  void signalDone( error_t error ) {
+    m_is_writing = FALSE;
+    switch( m_cmd[ 0 ] ) {
+    case S_READ:
+      if ( m_computing_crc ) {
+	m_computing_crc = FALSE;
+	signal Spi.computeCrcDone( m_crc, m_addr, m_len, error );
+      }
+      else {
+	signal Spi.readDone( m_addr, m_buf, m_len, error );
+      }
+      break;
+    case S_PAGE_PROGRAM:
+      signal Spi.pageProgramDone( m_addr, m_buf, m_len, error );
+      break;
+    case S_SECTOR_ERASE:
+      signal Spi.sectorEraseDone( m_addr >> STM25P_SECTOR_SIZE_LOG2, error );
+      break;
+    case S_BULK_ERASE:
+      signal Spi.bulkEraseDone( error );
+      break;
+    }
+  }
+}
diff --git a/tos/chips/stm25p/Stm25pVolume.nc b/tos/chips/stm25p/Stm25pVolume.nc
new file mode 100644
index 00000000..fe666eab
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pVolume.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Abstraction to provide the id of a volume.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Stm25p.h"
+
+interface Stm25pVolume {
+
+  /**
+   * Signals a request to provide the id of a volume.
+   *
+   * @return the id of the volume.
+   */
+  async event volume_id_t getVolumeId();
+
+}
diff --git a/tos/chips/stm25p/StorageMap.nc b/tos/chips/stm25p/StorageMap.nc
new file mode 100644
index 00000000..39747658
--- /dev/null
+++ b/tos/chips/stm25p/StorageMap.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An abstraction to map volume addresses to physical addresses.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+interface StorageMap {
+
+  /**
+   * Get the physical address of a volume address.
+   *
+   * @param addr the volume addres.
+   * @return the physical address.
+   */
+  command storage_addr_t getPhysicalAddress( storage_addr_t addr );
+
+}
diff --git a/tos/chips/stm25p/Storage_chip.h b/tos/chips/stm25p/Storage_chip.h
new file mode 100644
index 00000000..17099aa5
--- /dev/null
+++ b/tos/chips/stm25p/Storage_chip.h
@@ -0,0 +1,38 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef __STORAGE_CHIP_H__
+#define __STORAGE_CHIP_H__
+
+#endif
diff --git a/tos/chips/tda5250/HplTda5250Config.nc b/tos/chips/tda5250/HplTda5250Config.nc
new file mode 100644
index 00000000..3bd82f4a
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250Config.nc
@@ -0,0 +1,493 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250Const.h"
+/**
+ * This interface provides commands and events for configureing the radio modes.
+ *
+ * @author Kevin Klues
+ */
+interface HplTda5250Config {
+   /**
+    * Resets all Radio Registers to default values.
+    * The default values can be found in tda5250RegDefaults.h
+   */
+   async command void reset();
+
+   /**
+   * Set the data slicer to use the RC integrator. 
+   * The data slicer is an analog-to-digital converter for the radio data.
+   * When using RC integrator the mean value of the analog data is used 
+   * to convert the analog data to a Bit.
+   */
+   async command void UseRCIntegrator();
+   
+   /**
+   * Set the data slicer to use the Peak Detector. 
+   * The data slicer is an analog-to-digital converter for the radio data.
+   * When using peak detector the peak value of the analog data is used 
+   * to convert the analog data to a Bit.
+   */
+   async command void UsePeakDetector();
+   
+   /**
+   * Powers the radio down.
+   */
+   async command void PowerDown();
+   
+   /**
+   * Powers the radio up.
+   */
+   async command void PowerUp();
+   
+   /** 
+   * Switch radio to test operation.
+   * FIXME: Whatever this means...
+   */
+   async command void RunInTestMode();
+   
+   /**
+   * Switches the radio to normal operation.
+   */
+   async command void RunInNormalMode();
+   
+   /**
+   * Control the radio Tx and Rx mode externally.
+   */
+   async command void ControlRxTxExternally();
+   
+   /** 
+   * Control the radio Tx and Rx mode internally.
+   */
+   async command void ControlRxTxInternally();
+   
+   /** 
+   * Use FSK modulation.
+   *
+   * @param pos_shift Capacitor value for positive shift.
+   * @param neg_shift Capacitor value for negative shift.
+   */
+   async command void UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift);
+   
+   /** 
+   * Use ASK mosulation.
+   *
+   * @param pos_shift Capacitor value for positive shift. (FIXME: makes sense?)
+   */
+   async command void UseASK(tda5250_cap_vals_t pos_shift);
+   
+   /**
+   * Disables internal clock during power down.
+   */
+   async command void SetClockOffDuringPowerDown();
+   
+   /**
+   * Enables internal clock during power down.
+   */
+   async command void SetClockOnDuringPowerDown();
+   
+   /**
+   * Enables inverting the radio data.
+   */
+   async command void InvertData();
+   
+   /**
+   * Disables inverting radio data.
+   */
+   async command void DontInvertData();
+   
+   /** 
+   * Use the RSSI data valid detection.
+   * For the data valid detection 3 thresholds must be defined. 
+   * The data is only considered valid if the RSSI is greater than RSSI threshold 
+   * and the data rate is between the lower and upper data rate threshold.
+   *
+   * @param value The RSSI threshold for valid data.
+   * @param lower_bound Lower data rate threshold.
+   * @param upper_bound Upper data rate threshold.
+   */
+   async command void UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound);
+   
+   /** 
+    * Use the Vcc data valid detection.
+    * For the data valid detection 3 thresholds must be defined. 
+    * The data is only considered valid if the voltage is greater than voltage threshold 
+    * and the data rate is between the lower and upper data rate threshold.
+    *
+    * @param value The voltage threshold for valid data.
+    * @param lower_bound Lower data rate threshold.
+    * @param upper_bound Upper data rate threshold.
+   */
+   async command void UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound);
+   
+   /**
+   * Use the data valid detection.
+   * This means that the receiving data is checked either by RSSI data valid detection or
+   * by Vcc data valid detection if it is actual data and no noise.
+   */
+   async command void UseDataValidDetection();
+   
+   /** Do not use data valid detection. 
+   * This means that it is assumed that the receiving data is
+   * always valid data.
+   * It is absolutely necessary to
+   * set the RSSI-ADC (and the Window counter) into continuous mode.
+   */
+   async command void UseDataAlwaysValid();
+   
+   /**
+   * Sets the ADC to continious mode.
+   * Analog sampling data is taken continously.
+   */
+   async command void ADCContinuousMode();
+   
+   /**
+   * Sets the ADC to one shot mode.
+   * The sampling data is taken in one shot.
+   */
+   async command void ADCOneShotMode();
+     
+   /**
+   * Sets the data calid detection in continous mode.
+   */
+   async command void DataValidContinuousMode();
+   
+   /**
+   * Sets the data calid detection in one shot mode.
+   */
+   async command void DataValidOneShotMode();
+   
+   /**
+   * Sets the low noise amplifier to high gain
+   */
+   async command void HighLNAGain();
+   
+   /**
+   * Sets the low noise amplifier to low gain
+   */
+   async command void LowLNAGain();
+   
+   /** 
+   * Enables the receiver when in TIMER_MODE or SELF_POLLING_MODE.
+   */
+   async command void EnableReceiverInTimedModes();
+   
+   /** 
+   * Disables the receiver when in TIMER_MODE or SELF_POLLING_MODE.
+   */
+   async command void DisableReceiverInTimedModes();
+   
+   /**
+   * Use high transmit power.
+   */
+   async command void UseHighTxPower();
+   
+   /**
+   * Use low transmit power.
+   */
+   async command void UseLowTxPower();
+   
+   /**
+   * Tune the nominal frequency with a Bipolar FET.
+   *
+   * @param ramp_time Ramp time.
+   * @param cap_val Capacitor value.
+   */
+   async command void TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val);
+   
+   /**
+   * Tune the nominal frequency with a FET
+   *
+   * @param cap_val Capacitor value.
+   */
+   async command void TuneNomFreqWithFET(tda5250_cap_vals_t cap_val);
+
+   /**
+   * Set the mode of the radio to SlaveMode.
+   */
+   async command void SetSlaveMode();
+     
+   /**
+   * Set the mode of the radio to TimerMode.
+   * 
+   * @param on_time The time (ms) the radio is on.
+   * @param off_time The time (ms) the radio is off.
+   */
+   async command void SetTimerMode(float on_time, float off_time);
+      
+   /**
+    * Resets the timers set in SetTimerMode().
+    */
+   async command void ResetTimerMode();
+      
+   /**
+   * Set the mode of the radio to SetSelfPollingMode.
+   *
+   * @param on_time The time (ms) the radio is on.
+   * @param off_time The time (ms) the radio is off.
+   */
+   async command void SetSelfPollingMode(float on_time, float off_time);
+      
+   /**
+    * Reset the timers set in SetSelfPollingMode.
+    */
+   async command void ResetSelfPollingMode();
+
+   /**
+    * Set the contents of the LPF register with the Low pass filter 
+    * 
+    * @param data_cutoff LowPassFilter characteristics. For recognized values see tda5250Const.h
+    */
+   async command void SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff);
+   
+   /**
+   * Set the contents of the LPF register with the IQ filter value.
+   * 
+   * @param iq_cutoff IQ filter characteristics. For recognized values see tda5250Const.h
+   */
+   async command void SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff);
+
+   /**
+    *  Set the on time time of the radio.
+    *  This only makes sense when radio is in TIMER or SELF_POLLING Mode.
+    * 
+    *  @param time The time (ms) the radio is on.
+   */
+   async command void SetOnTime_ms(float time);
+      
+   /**
+   *  Set the off time time of the radio.
+   *  This only makes sense when radio is in TIMER or SELF_POLLING Mode.
+   * 
+   *  @param time The time (ms) the radio is off.
+   */
+   async command void SetOffTime_ms(float time);
+
+   
+   
+   /**
+   * Initialzes the CLK_DIV so that SetRadioClock(tda5250_clock_out_freqs_t freq)
+   * can be used.
+   */
+   async command void UseSetClock();
+   
+   /**
+   * Sets the CLK_DIV to specified output. UseSetClock() must be called before!
+   * Available frequencies given in TDA5250ClockFreq_t struct in tda5250Const.h.
+   *
+   * @param freq The new clock frequency (see tda5250.h).
+   */
+   async command void SetRadioClock(tda5250_clock_out_freqs_t freq);
+   
+   /**
+   * Sets the CLK_DIV to 18Mhz output.
+   */
+   async command void Use18MHzClock();
+   
+   /**
+   * Sets the CLK_DIV to 32Khz output.
+   */
+   async command void Use32KHzClock();
+   
+   /**
+   * Sets the CLK_DIV to use window count as output.
+   */
+   async command void UseWindowCountAsClock();
+   
+
+
+   /**
+   * Set the value on the attached Potentiometer
+   * for the RF Power setting.
+   *
+   * @param RF Power.
+   */
+   async command void SetRFPower(uint8_t value);
+
+   /**
+   * Sets the RSSI threshold for internal evaluation.
+   *
+   * @param RSSI threshold value.
+   */
+   async command void SetRSSIThreshold(uint8_t value);
+   
+   /** 
+   * Sets the threshold values for internal evaluation.
+   * (FIXME: what threshold is set with this?)
+   *
+   * @param value Threshold value.
+   */
+   async command void SetVCCOver5Threshold(uint8_t value);
+   
+   /** 
+   * Sets the lower data rate threshold for data valid detection.
+   *
+   * @param Lower data rate threshold value.
+   */
+   async command void SetLowerDataRateThreshold(uint16_t value);
+   
+   /** 
+   * Sets the upper data rate threshold for data valid detection.
+   *
+   * @param Upper data rate threshold value.
+   */
+   async command void SetUpperDataRateThreshold(uint16_t value);
+
+   /**
+   * Gets the currnet RSSI value.
+   *
+   * @return Current RSSI.
+   */
+   async command uint8_t GetRSSIValue();
+   
+   /**
+   * Gets the current status of the ADC select feedback Bit. 
+   * The ADC select feedback Bit is "0" if the ADC is connected to 
+   * a resistor network dividing the Vcc voltage by 5.
+   * The ADC select feedback Bit is "1" if the ADC is connected to
+   * the RSSI voltage.
+   *
+   * @return "0" if ADC connected to Vcc/5.
+   *         "1" if ADC connected to RSSI voltage.
+   */
+   async command uint8_t GetADCSelectFeedbackBit();
+   
+   /**
+   * Gets the current status of the ADC Power down feedback Bit.
+   * The ADC Power down feedback Bit is "0" if ADC power is up.
+   * It is "1" if ADC power is down.
+   *
+   * @return "0" if ADC power is up
+   *         "1" otherwise.
+   */
+   async command uint8_t GetADCPowerDownFeedbackBit();
+   
+   /**
+   * Checks if the data rate is less than the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than lower threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanLowerThreshold();
+   
+   /**
+   * Checks if the data rate is between the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value) and upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is between the lower and upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateBetweenThresholds();
+   
+   /**
+   * Checks if the data rate is less than the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanUpperThreshold();
+   
+   /**
+   * Checks if the data rate is less than half of the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than half of the lower threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanHalfOfLowerThreshold();
+   
+   /**
+   * Checks if the data rate is between the halves of the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value) and the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if the data rate is between the halves of the lower and upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateBetweenHalvesOfThresholds();
+   
+   /**
+   * Checks if the data rate is half of the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than half of the upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanHalfOfUpperThreshold();
+   
+   /**
+   * Checks if the current RSSI equals the threshold set 
+   * with SetRSSIThreshold(uint8_t value).
+   *
+   * @return TRUE if RSSI equals the threshold value
+   *         FALSE otherwise.
+   */
+   async command bool IsRSSIEqualToThreshold();
+   
+   /**
+   * Checks if the current RSSI is graeter than the threshold set 
+   * with SetRSSIThreshold(uint8_t value).
+   *
+   * @return TRUE if RSSI greater than threshold value
+   *         FALSE otherwise.
+   */
+   async command bool IsRSSIGreaterThanThreshold();
+
+  
+   /**
+   * Switches the radio to TxMode when in SLAVE_MODE
+   */
+   async command void SetTxMode();
+   
+   /**
+   * Switches the radio to RxMode when in SLAVE_MODE
+   */
+   async command void SetRxMode();
+   
+   /**
+   * Switches the radio to SleepMode when in SLAVE_MODE
+   */
+   async command void SetSleepMode();
+
+   /**
+   * Notification of interrupt when in
+   * TimerMode or SelfPollingMode.
+   */
+   async event void PWDDDInterrupt();
+}
+
diff --git a/tos/chips/tda5250/HplTda5250ConfigC.nc b/tos/chips/tda5250/HplTda5250ConfigC.nc
new file mode 100644
index 00000000..114c2686
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250ConfigC.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Controlling the TDA5250 at the HPL layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#include "tda5250Const.h"
+#include "tda5250RegDefaultSettings.h"
+#include "tda5250RegTypes.h"
+
+configuration HplTda5250ConfigC {
+  provides {
+    interface Init;
+    interface HplTda5250Config;
+    interface Resource as Resource;
+  }
+}
+implementation {
+  components HplTda5250ConfigP
+           , Tda5250RegistersC
+           , Tda5250RadioIOC
+           , Tda5250RadioInterruptC
+           ;
+
+  Init = HplTda5250ConfigP;
+  Init = Tda5250RegistersC;
+  Resource = Tda5250RegistersC.Resource;
+  HplTda5250Config = HplTda5250ConfigP;
+
+  HplTda5250ConfigP.CONFIG -> Tda5250RegistersC.CONFIG;
+  HplTda5250ConfigP.FSK -> Tda5250RegistersC.FSK;
+  HplTda5250ConfigP.XTAL_TUNING -> Tda5250RegistersC.XTAL_TUNING;
+  HplTda5250ConfigP.LPF -> Tda5250RegistersC.LPF;
+  HplTda5250ConfigP.ON_TIME -> Tda5250RegistersC.ON_TIME;
+  HplTda5250ConfigP.OFF_TIME -> Tda5250RegistersC.OFF_TIME;
+  HplTda5250ConfigP.COUNT_TH1 -> Tda5250RegistersC.COUNT_TH1;
+  HplTda5250ConfigP.COUNT_TH2 -> Tda5250RegistersC.COUNT_TH2;
+  HplTda5250ConfigP.RSSI_TH3 -> Tda5250RegistersC.RSSI_TH3;
+  HplTda5250ConfigP.RF_POWER -> Tda5250RegistersC.RF_POWER;
+  HplTda5250ConfigP.CLK_DIV -> Tda5250RegistersC.CLK_DIV;
+  HplTda5250ConfigP.XTAL_CONFIG -> Tda5250RegistersC.XTAL_CONFIG;
+  HplTda5250ConfigP.BLOCK_PD -> Tda5250RegistersC.BLOCK_PD;
+  HplTda5250ConfigP.STATUS -> Tda5250RegistersC.STATUS;
+  HplTda5250ConfigP.ADC -> Tda5250RegistersC.ADC;
+
+  HplTda5250ConfigP.PWDDD -> Tda5250RadioIOC.Tda5250RadioPWDDD;
+  HplTda5250ConfigP.TXRX -> Tda5250RadioIOC.Tda5250RadioTXRX;
+  HplTda5250ConfigP.PWDDDInterrupt -> Tda5250RadioInterruptC;
+}
diff --git a/tos/chips/tda5250/HplTda5250ConfigP.nc b/tos/chips/tda5250/HplTda5250ConfigP.nc
new file mode 100644
index 00000000..a0918499
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250ConfigP.nc
@@ -0,0 +1,514 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision$
+* $Date$
+* ========================================================================
+*/
+
+/**
+* HplTda5250ConfigP module
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+* @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+*/
+
+module HplTda5250ConfigP {
+  provides {
+    interface Init;
+    interface HplTda5250Config;
+  }
+  uses {
+    interface Tda5250WriteReg      as CONFIG;
+    interface Tda5250WriteReg         as FSK;
+    interface Tda5250WriteReg as XTAL_TUNING;
+    interface Tda5250WriteReg         as LPF;
+    interface Tda5250WriteReg     as ON_TIME;
+    interface Tda5250WriteReg    as OFF_TIME;
+    interface Tda5250WriteReg   as COUNT_TH1;
+    interface Tda5250WriteReg   as COUNT_TH2;
+    interface Tda5250WriteReg    as RSSI_TH3;
+    interface Tda5250WriteReg    as RF_POWER;
+    interface Tda5250WriteReg     as CLK_DIV;
+    interface Tda5250WriteReg as XTAL_CONFIG;
+    interface Tda5250WriteReg    as BLOCK_PD;
+    interface Tda5250ReadReg       as STATUS;
+    interface Tda5250ReadReg          as ADC;
+
+    interface GeneralIO as TXRX;
+    interface GeneralIO as PWDDD;
+    interface GpioInterrupt as PWDDDInterrupt;
+  }
+}
+
+implementation { 
+   
+  /****************************************************************************************************
+  **                                                                                                 **
+  **                                                                                                 **
+  **     Important !!! Only function marked with << tested >> are potentially working!               **
+  **                                                                                                 **
+  **                                                                                                 **
+  *****************************************************************************************************/
+  
+  /****************************************************************
+  Global Variables Declared
+  *****************************************************************/
+  norace uint16_t currentConfig;
+  uint8_t currentClockDiv;
+  norace uint8_t currentLpf;
+
+
+  /****************************************************************
+  async commands Implemented
+  *****************************************************************/
+  /**
+  * Initializes the Radio, setting up all Pin configurations
+  * to the MicroProcessor that is driving it and resetting
+  * all Registers to their default values
+  *
+  * @return always returns SUCCESS
+  */
+  command error_t Init.init() {
+    // setting pins to output
+    call TXRX.makeOutput();
+    call PWDDD.makeOutput();
+
+    // initializing pin values
+    call TXRX.set();
+    call PWDDD.clr();
+    return SUCCESS;
+  }
+
+  /**
+  * Reset all Radio Registers to the default values as defined
+  * in the tda5250RegDefaults.h file
+  * << tested >>
+  */
+  async command void HplTda5250Config.reset() {
+    //Keep three state variables to know current value of
+    //config register, ClockDiv, and Lpf register
+        atomic {
+          currentConfig = TDA5250_REG_DEFAULT_SETTING_CONFIG;
+          currentClockDiv = TDA5250_REG_DEFAULT_SETTING_CLK_DIV;
+          currentLpf = TDA5250_REG_DEFAULT_SETTING_LPF;
+        }
+        call CONFIG.set(TDA5250_REG_DEFAULT_SETTING_CONFIG);
+        call FSK.set(TDA5250_REG_DEFAULT_SETTING_FSK);
+        call XTAL_TUNING.set(TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING);
+        call LPF.set(TDA5250_REG_DEFAULT_SETTING_LPF);
+        call ON_TIME.set(TDA5250_REG_DEFAULT_SETTING_ON_TIME);
+        call OFF_TIME.set(TDA5250_REG_DEFAULT_SETTING_OFF_TIME);
+        call COUNT_TH1.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH1);
+        call COUNT_TH2.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH2);
+        call RSSI_TH3.set(TDA5250_REG_DEFAULT_SETTING_RSSI_TH3);
+        call CLK_DIV.set(TDA5250_REG_DEFAULT_SETTING_CLK_DIV);
+        call XTAL_CONFIG.set(TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG);
+        call BLOCK_PD.set(TDA5250_REG_DEFAULT_SETTING_BLOCK_PD);
+  }
+
+  async command void HplTda5250Config.SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff){
+    currentLpf = (((data_cutoff << 4) | (currentLpf & 0x0F)));
+    call LPF.set(currentLpf);
+  }
+  async command void HplTda5250Config.SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff){
+    currentLpf = (((iq_cutoff & 0x0F) | (currentLpf & 0xF0)));
+    call LPF.set(currentLpf);
+  }
+  async command void HplTda5250Config.UseRCIntegrator() {
+    currentConfig = CONFIG_SLICER_RC_INTEGRATOR(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.UsePeakDetector() {
+    currentConfig = CONFIG_SLICER_PEAK_DETECTOR(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.PowerDown() {
+    currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.PowerUp() {
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.RunInTestMode() {
+    currentConfig = CONFIG_TESTMODE_TESTMODE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.RunInNormalMode() {
+    currentConfig = CONFIG_TESTMODE_NORMAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ControlRxTxExternally() {
+    currentConfig = CONFIG_CONTROL_TXRX_EXTERNAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ControlRxTxInternally() {
+    currentConfig = CONFIG_CONTROL_TXRX_REGISTER(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  /* << tested >> */
+  async command void HplTda5250Config.UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift) {
+    currentConfig = CONFIG_ASK_NFSK_FSK(currentConfig);
+    if(currentConfig | MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      // ***** For Platforms that have a connection to the FSK pin *******
+      //call FSK.set(); 
+    }
+    call FSK.set(((uint16_t)((((uint16_t)pos_shift) << 8) + neg_shift)));
+  }
+  /* << tested >> */
+  async command void HplTda5250Config.UseASK(tda5250_cap_vals_t value) {
+    currentConfig = CONFIG_ASK_NFSK_ASK(currentConfig);
+    if((currentConfig | MASK_CONFIG_CONTROL_TXRX_REGISTER)) {
+      call CONFIG.set(currentConfig);
+    } 
+    else {
+      // ***** For Platforms that have a connection to the FSK pin *******
+      //call FSK.set(); 
+    }
+    call FSK.set((((uint16_t)value) << 8));
+  }
+  async command void HplTda5250Config.SetClockOffDuringPowerDown() {
+    currentConfig = CONFIG_CLK_EN_OFF(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.SetClockOnDuringPowerDown() {
+    currentConfig = CONFIG_CLK_EN_ON(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.InvertData() {
+    currentConfig = CONFIG_RX_DATA_INV_YES(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DontInvertData() {
+    currentConfig = CONFIG_RX_DATA_INV_NO(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+    call COUNT_TH1.set(lower_bound);
+    call COUNT_TH2.set(upper_bound);
+    call RSSI_TH3.set(0xC0 | value);
+  }
+
+  async command void HplTda5250Config.UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+    call COUNT_TH1.set(lower_bound);
+    call COUNT_TH2.set(upper_bound);
+    call RSSI_TH3.set(0x3F & value);
+  }
+
+  async command void HplTda5250Config.UseDataValidDetection() {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  async command void HplTda5250Config.UseDataAlwaysValid() {
+    currentConfig = CONFIG_D_OUT_ALWAYS(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ADCContinuousMode() {
+    currentConfig = CONFIG_ADC_MODE_CONT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ADCOneShotMode() {
+    currentConfig = CONFIG_ADC_MODE_ONESHOT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DataValidContinuousMode() {
+    currentConfig = CONFIG_F_COUNT_MODE_CONT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DataValidOneShotMode() {
+    currentConfig = CONFIG_F_COUNT_MODE_ONESHOT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <> */
+  async command void HplTda5250Config.HighLNAGain() {
+    currentConfig = CONFIG_LNA_GAIN_HIGH(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <> */
+  async command void HplTda5250Config.LowLNAGain() {
+    currentConfig = CONFIG_LNA_GAIN_LOW(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.EnableReceiverInTimedModes() {
+    currentConfig = CONFIG_EN_RX_ENABLE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DisableReceiverInTimedModes() {
+    currentConfig = CONFIG_EN_RX_DISABLE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <> */
+  async command void HplTda5250Config.UseHighTxPower() {
+    currentConfig = CONFIG_PA_PWR_HIGHTX(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <> */
+  async command void HplTda5250Config.UseLowTxPower() {
+    currentConfig = CONFIG_PA_PWR_LOWTX(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  async command void HplTda5250Config.TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val) {
+    call XTAL_CONFIG.set(ramp_time);
+    call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F);
+  }
+  async command void HplTda5250Config.TuneNomFreqWithFET(tda5250_cap_vals_t cap_val) {
+    call XTAL_CONFIG.set(0x00);
+    call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F);
+  }
+  /* <> */
+  async command void HplTda5250Config.SetRFPower(uint8_t value) {
+    call RF_POWER.set(value);
+  }
+
+  /**
+  Set the mode of the radio
+  The choices are SLAVE_MODE, TIMER_MODE, SELF_POLLING_MODE
+  */
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetSlaveMode() {
+    call PWDDDInterrupt.disable();
+    call PWDDD.makeOutput();
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_SLAVE(currentConfig);
+    // SetSlaveMode() is always called in conjunction with another function that writes the config...
+    // call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.SetTimerMode(float on_time, float off_time) {
+    call PWDDD.clr();
+    call ON_TIME.set(TDA5250_CONVERT_TIME(on_time));
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time));
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_TIMER(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.ResetTimerMode() {
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_TIMER(currentConfig);
+    call CONFIG.set(currentConfig);
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.SetSelfPollingMode(float on_time, float off_time) {
+    call PWDDD.clr();
+    call ON_TIME.set(TDA5250_CONVERT_TIME(on_time));
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time));
+    currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.ResetSelfPollingMode() {
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  /**
+  Set the on time and off time of the radio
+  (Only makes sense when in TIMER or SELF_POLLING Mode)
+  */
+  async command void HplTda5250Config.SetOnTime_ms(float time) {
+    call ON_TIME.set(TDA5250_CONVERT_TIME(time));
+  }
+  async command void HplTda5250Config.SetOffTime_ms(float time) {
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(time));
+  }
+  /**
+  Set the frequency that the CLK_DIV outputs
+  (Available frequencies given in Tda5250ClockFreq_t struct)
+  */
+  async command void HplTda5250Config.UseSetClock() {
+    currentClockDiv &= 0x0F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.Use18MHzClock() {
+    currentClockDiv |= 0x10;
+    currentClockDiv &= 0x1F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.Use32KHzClock() {
+    currentClockDiv |= 0x20;
+    currentClockDiv &= 0x2F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.UseWindowCountAsClock() {
+    currentClockDiv |= 0x30;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.SetRadioClock(tda5250_clock_out_freqs_t freq) {
+    currentClockDiv = (currentClockDiv & 0x30) + freq;
+    call CLK_DIV.set(currentClockDiv);
+  }
+
+  /**
+  Sets the threshold Values for internal evaluation
+  */
+  
+  /* <> */
+  async command void HplTda5250Config.SetRSSIThreshold(uint8_t value) {
+    call RSSI_TH3.set(0xC0 | value);
+  }
+  async command void HplTda5250Config.SetVCCOver5Threshold(uint8_t value) {
+    call RSSI_TH3.set(0x3F & value);
+  }
+  async command void HplTda5250Config.SetLowerDataRateThreshold(uint16_t value) {
+    call COUNT_TH1.set(value);
+  }
+  async command void HplTda5250Config.SetUpperDataRateThreshold(uint16_t value) {
+    call COUNT_TH2.set(value);
+  }
+
+  /**
+  Get parts of certain registers according to their
+  logical functionality
+  */
+  async command uint8_t HplTda5250Config.GetRSSIValue() {
+    return (0x3F & call ADC.get());
+  }
+  async command uint8_t HplTda5250Config.GetADCSelectFeedbackBit() {
+    return ((0x40 & call ADC.get()) >> 6);
+  }
+  async command uint8_t HplTda5250Config.GetADCPowerDownFeedbackBit() {
+    return ((0x80 & call ADC.get()) >> 7);
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanLowerThreshold() {
+    if((0x80 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateBetweenThresholds() {
+    if((0x40 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanUpperThreshold() {
+    if((0x20 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanHalfOfLowerThreshold() {
+    if((0x10 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateBetweenHalvesOfThresholds() {
+    if((0x08 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanHalfOfUpperThreshold() {
+    if((0x04 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsRSSIEqualToThreshold() {
+    if((0x02 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsRSSIGreaterThanThreshold() {
+    if((0x01 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+
+  /**
+  Switches radio between states when in SLAVE_MODE
+  */
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetTxMode() {
+    currentConfig = CONFIG_RX_NTX_TX(currentConfig);
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    if (currentConfig | MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call TXRX.clr();
+      call PWDDD.clr();
+    }
+  }
+
+  /* << tested >> */
+  async command void HplTda5250Config.SetRxMode() {
+    currentConfig = CONFIG_RX_NTX_RX(currentConfig);
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    if (currentConfig | MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call TXRX.set();
+      call PWDDD.clr();
+    }
+  }
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetSleepMode() {
+    currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig);
+    if (currentConfig | MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call PWDDD.makeOutput();
+      call PWDDD.set();
+    }
+  }
+
+  /****************************************************************
+  Events Implemented
+  ************************************************/
+  /**
+  Interrupt Signal on PWD_DD pin in
+  TIMER_MODE and SELF_POLLING_MODE
+  */
+  async event void PWDDDInterrupt.fired() {
+    signal HplTda5250Config.PWDDDInterrupt();
+  }
+
+  default async event void HplTda5250Config.PWDDDInterrupt() {}
+}
diff --git a/tos/chips/tda5250/HplTda5250Data.nc b/tos/chips/tda5250/HplTda5250Data.nc
new file mode 100644
index 00000000..aae85694
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250Data.nc
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Interface for sending and receiving bytes of data over the TDA5250 Radio.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface HplTda5250Data {
+
+ /**
+   * Transmit a byte of data over the radio.
+   * @param data The data byte to be transmitted.
+   * @return SUCCESS Byte successfully transmitted.
+             FAIL    Byte could not be transmitted.
+   */
+  async command error_t tx(uint8_t data);
+
+  /**
+   * Signalled when the next byte can be made ready to transmit.
+   * Receiving such an event does not guarantee that the previous
+   * byte has already been transmitted, just that the next one can
+   * now be handed over for transmission.
+   */
+  async event void txReady();
+
+  /**
+   * Command for querying whether any bytes are still waiting to be transmitted.
+   *
+   * @return TRUE if all bytes are trasnmitted
+   *         FALSE otherwise.
+   */
+  async command bool isTxDone();
+
+  /**
+   * Signaled when a byte of data has been received from the radio.
+   * @param data The data byte received.
+   */
+  async event void rxDone(uint8_t data);
+
+  /**
+   * Enable transmitting over the radio.
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+  async command error_t enableTx();
+
+  /**
+   * Disable transmitting over the radio
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+  async command error_t disableTx();
+
+  /**
+   * Enable receiving over the radio
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+  */
+  async command error_t enableRx();
+
+  /**
+   * Disable receiving over the radio
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+  async command error_t disableRx();
+}
+
diff --git a/tos/chips/tda5250/HplTda5250DataP.nc b/tos/chips/tda5250/HplTda5250DataP.nc
new file mode 100644
index 00000000..e5f6e12c
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250DataP.nc
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * HplTda5250DataP module
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+  */
+
+module HplTda5250DataP {
+  provides {
+    interface Init;
+    interface HplTda5250Data;
+    interface Resource;
+  }
+  uses {
+    interface GeneralIO as DATA;
+    // FIXME: platform dependence at HPL-level!
+    interface HplMsp430Usart as Usart;
+    interface HplMsp430UsartInterrupts as UsartInterrupts;
+    interface Resource as UartResource;
+  }
+}
+
+implementation {
+
+  /**
+   * Initializes the Radio, setting up all Pin configurations
+   * to the MicroProcessor that is driving it
+   *
+   * @return always returns SUCCESS
+    */
+  command error_t Init.init() {
+    call DATA.makeOutput();
+    call DATA.clr();
+
+    //Make Rx default
+    call DATA.makeInput();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.request() {
+    return call UartResource.request();
+  }
+
+  async command error_t Resource.immediateRequest() {
+    if(call UartResource.immediateRequest() == EBUSY) {
+      return EBUSY;
+    }
+    call Usart.setModeUART();
+    return SUCCESS;
+  }
+
+  async command void Resource.release() {
+    call Usart.disableRxIntr();
+    call Usart.disableTxIntr();
+    call UartResource.release();
+  }
+
+  async command bool Resource.isOwner() {
+    return call UartResource.isOwner();
+  }
+
+  event void UartResource.granted() {
+    call Usart.setModeUART();
+    signal Resource.granted();
+  }
+
+  async command error_t HplTda5250Data.tx(uint8_t data) {
+    if(call UartResource.isOwner() == FALSE)
+     return FAIL;
+    call Usart.tx(data);
+    return SUCCESS;
+  }
+
+  async command bool HplTda5250Data.isTxDone() {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    return call Usart.isTxEmpty();
+  }
+
+  async command error_t HplTda5250Data.enableTx() {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    call Usart.setModeUART_TX();
+    call Usart.setClockSource(SSEL_SMCLK);
+    call Usart.setClockRate(UBR_SMCLK_38400, UMCTL_SMCLK_38400);
+    call Usart.enableTxIntr();
+    return SUCCESS;
+  }
+
+  async command error_t HplTda5250Data.disableTx() {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    call Usart.disableUARTTx();
+    call Usart.disableTxIntr();
+    return SUCCESS;
+  }
+
+  async command error_t HplTda5250Data.enableRx() {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    call Usart.setModeUART_RX();
+    call Usart.setClockSource(SSEL_SMCLK);
+    call Usart.setClockRate(UBR_SMCLK_38400, UMCTL_SMCLK_38400);
+    call Usart.enableRxIntr();
+    return SUCCESS;
+  }
+
+  async command error_t HplTda5250Data.disableRx() {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    call Usart.disableUARTRx();
+    call Usart.disableRxIntr();
+    return SUCCESS;
+  }
+
+  async event void UsartInterrupts.txDone() {
+    if(call UartResource.isOwner() == FALSE)
+      return;
+    signal HplTda5250Data.txReady();
+  }
+
+  async event void UsartInterrupts.rxDone(uint8_t data) {
+    if(call UartResource.isOwner() == FALSE)
+      return;
+    signal HplTda5250Data.rxDone(data);
+  }
+
+  default event void Resource.granted() {}
+  default async event void HplTda5250Data.txReady() {}
+  default async event void HplTda5250Data.rxDone(uint8_t data) {}
+}
diff --git a/tos/chips/tda5250/Tda5250ActiveMessageC.nc b/tos/chips/tda5250/Tda5250ActiveMessageC.nc
new file mode 100644
index 00000000..a620d055
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ActiveMessageC.nc
@@ -0,0 +1,82 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer for the TDA5250 radio. This configuration
+ * just layers the AM dispatch (Tda5250ActiveMessageP) on top of the
+ * underlying TDA5250 radio packet.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+
+#include "Timer.h"
+
+configuration Tda5250ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+
+  components Tda5250ActiveMessageP as AM, RadioDataLinkC as Radio;
+  components ActiveMessageAddressC as Address;
+
+  SplitControl = Radio;
+
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+
+  AMSend   = AM;
+  Receive  = AM.Receive;
+  Snoop    = AM.Snoop;
+  AMPacket = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.SubPacket -> Radio.Packet;
+  AM.amAddress -> Address;
+}
diff --git a/tos/chips/tda5250/Tda5250ActiveMessageP.nc b/tos/chips/tda5250/Tda5250ActiveMessageP.nc
new file mode 100644
index 00000000..10601e34
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ActiveMessageP.nc
@@ -0,0 +1,160 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+module Tda5250ActiveMessageP {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as SubPacket;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  tda5250_header_t* getHeader( message_t* msg ) {
+                return (tda5250_header_t*)( msg->data - sizeof(tda5250_header_t) );
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+                                          message_t* msg,
+                                          uint8_t len) {
+    tda5250_header_t* header = getHeader(msg);
+    header->type = id;
+    header->addr = addr;
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call SubPacket.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call SubPacket.getPayload(m, NULL);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call SubPacket.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call SubPacket.payloadLength(m);
+  }
+
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call SubPacket.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call SubPacket.payloadLength(m);
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->addr = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+            call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+
+
+}
diff --git a/tos/chips/tda5250/Tda5250Control.nc b/tos/chips/tda5250/Tda5250Control.nc
new file mode 100644
index 00000000..825561dc
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250Control.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250Control.h"
+/** 
+ * This interface provides commands and events for controlling the radio modes.
+ * 
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ *
+ */
+interface Tda5250Control {
+   
+   /**
+    * Switches radio to TimerMode.
+    * 
+    * @param on_time Sets the time (ms) the radio is on.
+    * @param off_time Sets the time (ms) the radio is off.
+    *
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+   async command error_t TimerMode(float on_time, float off_time);
+   
+   /**
+   * Resets the timers set in TimerMode(). 
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t ResetTimerMode();
+   
+   /**
+   * Switches radio to SelfPollingMode.
+   * 
+   * @param on_time Sets the time (ms) the radio is on.
+   * @param off_time Sets the time (ms) the radio is off.
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t SelfPollingMode(float on_time, float off_time);
+   
+   /**
+    * Resets the timers set in SelfPollingMode(float, float). 
+    * 
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+   async command error_t ResetSelfPollingMode();
+   
+   /**
+   * Switches radio to TxMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t TxMode();
+   
+   /**
+   * Switches radio to RxMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t RxMode();
+   
+   /**
+   * Switches radio to SleepMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t SleepMode();
+
+   
+   /**
+    * Notification that radio mode is switched to TimerModeDone.
+    */
+   async event void TimerModeDone();
+   
+   /**
+   * Notification that radio mode is switched to SelfPollingMode.
+   */
+   async event void SelfPollingModeDone();
+   
+   /**
+   * Notification that radio mode is switched to TxMode.
+   */
+   async event void TxModeDone();
+   
+   /**
+   * Notification that radio mode is switched to RxMode.
+   */
+   async event void RxModeDone();
+   
+   /**
+   * Notification that the rssi is stable.
+   */
+   async event void RssiStable();
+   
+   /**
+   * Notification that radio mode is switched to SleepMode.
+   */
+   async event void SleepModeDone();
+
+   /**
+    * Notification of interrupt when in
+    * TimerMode or SelfPollingMode.
+    */
+   async event void PWDDDInterrupt();
+}
+
diff --git a/tos/chips/tda5250/Tda5250RadioC.nc b/tos/chips/tda5250/Tda5250RadioC.nc
new file mode 100644
index 00000000..467336ad
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RadioC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Controlling the Tda5250 at the Hpl layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#include "tda5250Const.h"
+#include "tda5250RegDefaultSettings.h"
+#include "tda5250RegTypes.h"
+configuration Tda5250RadioC {
+  provides {
+    interface SplitControl;
+    interface Tda5250Control;
+    interface RadioByteComm;
+  }
+}
+implementation {
+  components Tda5250RadioP
+           , HplTda5250ConfigC
+           , HplTda5250DataC
+           , new Alarm32khzC() as DelayTimer
+           , MainC;
+
+  MainC.SoftwareInit -> HplTda5250ConfigC;
+  MainC.SoftwareInit -> HplTda5250DataC;
+  MainC.SoftwareInit -> Tda5250RadioP;
+           
+  Tda5250Control = Tda5250RadioP;
+  RadioByteComm = Tda5250RadioP;
+  SplitControl = Tda5250RadioP;
+
+  Tda5250RadioP.DelayTimer -> DelayTimer.Alarm32khz16;
+  
+  Tda5250RadioP.ConfigResource -> HplTda5250ConfigC;
+  Tda5250RadioP.DataResource -> HplTda5250DataC;
+
+  Tda5250RadioP.HplTda5250Config -> HplTda5250ConfigC;
+  Tda5250RadioP.HplTda5250Data -> HplTda5250DataC;
+}
diff --git a/tos/chips/tda5250/Tda5250RadioP.nc b/tos/chips/tda5250/Tda5250RadioP.nc
new file mode 100644
index 00000000..30993673
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RadioP.nc
@@ -0,0 +1,415 @@
+/*
+* Copyright (c) 2004-2006, Technische Universitaet Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitaet Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* - Revision -------------------------------------------------------------
+* $Revision$
+* $Date$
+* @author: Kevin Klues (klues@tkn.tu-berlin.de)
+* ========================================================================
+*/
+
+#include "tda5250Const.h"
+
+
+/*
+ * Controlling the Tda5250
+ *
+ * Switch modes and initialize.
+ *
+ * @author Kevin Klues
+ * @author Philipp Huppertz
+ */
+module Tda5250RadioP {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface Tda5250Control;
+    interface RadioByteComm;
+  }
+  uses {
+    interface HplTda5250Config;
+    interface HplTda5250Data;
+    interface Resource as ConfigResource;
+    interface Resource as DataResource;
+    interface Alarm as DelayTimer;
+  }
+}
+
+implementation {
+  
+  typedef enum {
+    TRANSMITTER_DELAY,
+    RECEIVER_DELAY,
+    RSSISTABLE_DELAY
+  } delayTimer_t;
+  
+  delayTimer_t delayTimer;  // current Mode of the Timer (RssiStable, TxSetupTime, RxSetupTime)
+  radioMode_t radioMode;    // Current Mode of the Radio
+  float onTime, offTime;
+
+      /**************** Radio Init *****************/
+      command error_t Init.init() {
+        radioMode = RADIO_MODE_OFF;
+        return SUCCESS;
+      }
+
+      /**************** Radio Start  *****************/
+      task void startDoneTask() {
+        signal SplitControl.startDone(SUCCESS);
+      }
+      
+      command error_t SplitControl.start() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        if(mode == RADIO_MODE_OFF) {
+          atomic radioMode = RADIO_MODE_ON_TRANSITION;
+          return call ConfigResource.request();
+        }
+        return FAIL;
+      }
+
+      /**************** Radio Stop  *****************/
+      task void stopDoneTask() {
+        signal SplitControl.stopDone(SUCCESS); 
+      }
+      
+      command error_t SplitControl.stop(){
+        atomic radioMode = RADIO_MODE_OFF_TRANSITION;
+        return call ConfigResource.request();
+      }
+
+  /* radioBusy
+      * This function checks whether the radio is busy
+      * so as to decide whether it can perform some operation or not.
+  */
+      bool radioBusy() {
+        switch(radioMode) {
+          case RADIO_MODE_OFF:
+          case RADIO_MODE_ON_TRANSITION:
+          case RADIO_MODE_OFF_TRANSITION:
+          case RADIO_MODE_TX_TRANSITION:
+          case RADIO_MODE_RX_TRANSITION:
+          case RADIO_MODE_TIMER_TRANSITION:
+          case RADIO_MODE_SELF_POLLING_TRANSITION:
+          case RADIO_MODE_SLEEP_TRANSITION:
+            return TRUE;
+          default:
+            return FALSE;
+        }
+      }
+
+      void switchConfigResource() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        switch(mode) {
+          case RADIO_MODE_ON_TRANSITION:
+            call HplTda5250Config.reset();
+            call HplTda5250Config.SetRFPower(255);
+            call ConfigResource.release();
+            atomic radioMode = RADIO_MODE_ON;
+            post startDoneTask();
+            break;
+          case RADIO_MODE_OFF_TRANSITION:
+            call HplTda5250Config.SetClockOffDuringPowerDown();
+            call HplTda5250Config.SetSleepMode();
+            call ConfigResource.release();
+            atomic radioMode = RADIO_MODE_OFF;
+            post stopDoneTask();
+            break;
+          case RADIO_MODE_SLEEP_TRANSITION:
+            call HplTda5250Config.SetSlaveMode();
+            call HplTda5250Config.SetSleepMode();
+            call ConfigResource.release();
+            atomic radioMode = RADIO_MODE_SLEEP;
+            signal Tda5250Control.SleepModeDone();
+            break;
+          case RADIO_MODE_TX_TRANSITION:
+            call HplTda5250Config.SetSlaveMode();
+            call HplTda5250Config.SetTxMode();
+            atomic delayTimer = TRANSMITTER_DELAY;
+            call DelayTimer.start(TDA5250_TRANSMITTER_SETUP_TIME);
+            break;
+          case RADIO_MODE_RX_TRANSITION:
+            call HplTda5250Config.SetSlaveMode();
+            call HplTda5250Config.SetRxMode();
+            atomic delayTimer = RECEIVER_DELAY;
+            call DelayTimer.start(TDA5250_RECEIVER_SETUP_TIME);
+            break;
+          case RADIO_MODE_TIMER_TRANSITION:
+            call HplTda5250Config.SetTimerMode(onTime, offTime);
+            call ConfigResource.release();
+            atomic radioMode = RADIO_MODE_TIMER;
+            signal Tda5250Control.TimerModeDone();
+            break;
+          case RADIO_MODE_SELF_POLLING_TRANSITION:
+            call HplTda5250Config.SetSelfPollingMode(onTime, offTime);
+            call ConfigResource.release();
+            atomic radioMode = RADIO_MODE_SELF_POLLING;
+            signal Tda5250Control.SelfPollingModeDone();
+            break;
+          default:
+            break;
+        }
+      }
+
+      event void ConfigResource.granted() {
+        switchConfigResource();
+      }
+
+      void switchDataResource() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        switch(mode) {
+          case RADIO_MODE_TX_TRANSITION:
+            call HplTda5250Data.enableTx();
+            atomic radioMode = RADIO_MODE_TX;
+            signal Tda5250Control.TxModeDone();
+            break;
+          case RADIO_MODE_RX_TRANSITION:
+            call HplTda5250Data.enableRx();
+            atomic radioMode = RADIO_MODE_RX;
+            signal Tda5250Control.RxModeDone();
+            break;
+          default:
+            break;
+        }
+      }
+      
+      event void DataResource.granted() {
+        switchDataResource();
+      }
+
+  /**
+      Set the mode of the radio
+      The choices are TIMER_MODE, SELF_POLLING_MODE
+  */
+      async command error_t Tda5250Control.TimerMode(float on_time, float off_time) {
+        atomic {
+          if(radioBusy() == FALSE) {
+            radioMode = RADIO_MODE_TIMER_TRANSITION;
+            onTime = on_time;
+            offTime = off_time;
+          }
+        }
+        if(radioMode == RADIO_MODE_TIMER_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.ResetTimerMode() {
+        atomic {
+          if(radioBusy() == FALSE) {
+            radioMode = RADIO_MODE_TIMER_TRANSITION;
+          }
+        }
+        if(radioMode == RADIO_MODE_TIMER_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.SelfPollingMode(float on_time, float off_time) {
+        atomic {
+          if(radioBusy() == FALSE) {
+            radioMode = RADIO_MODE_SELF_POLLING_TRANSITION;
+            onTime = on_time;
+            offTime = off_time;
+          }
+        }
+        if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.ResetSelfPollingMode() {
+        atomic {
+          if(radioBusy() == FALSE) {
+            radioMode = RADIO_MODE_SELF_POLLING_TRANSITION;
+          }
+        }
+        if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.SleepMode() {
+        radioMode_t mode;
+        atomic{
+          mode = radioMode;
+          if(radioBusy() == FALSE) {
+            mode = radioMode = RADIO_MODE_SLEEP_TRANSITION;
+          }
+        }
+        if(mode == RADIO_MODE_SLEEP_TRANSITION) {
+          call HplTda5250Data.disableTx();	
+          call HplTda5250Data.disableRx();	
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.TxMode() {
+        radioMode_t mode;
+        atomic {
+          if(radioBusy() == FALSE)
+            radioMode = RADIO_MODE_TX_TRANSITION;
+        }
+        atomic mode = radioMode;
+        if(mode == RADIO_MODE_TX_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async command error_t Tda5250Control.RxMode() {
+        radioMode_t mode;
+        atomic {
+          if(radioBusy() == FALSE) {
+            radioMode = RADIO_MODE_RX_TRANSITION;
+          }
+        }
+        atomic mode = radioMode;
+        if(mode == RADIO_MODE_RX_TRANSITION) {
+          call DataResource.release();
+          if (call ConfigResource.immediateRequest() == SUCCESS) {
+            switchConfigResource();
+          } else {
+            call ConfigResource.request();
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+      }
+
+      async event void HplTda5250Data.txReady() {
+        signal RadioByteComm.txByteReady(SUCCESS);
+      }
+      async event void HplTda5250Data.rxDone(uint8_t data) {
+        signal RadioByteComm.rxByteReady(data);
+      }
+
+      async event void HplTda5250Config.PWDDDInterrupt() {
+        signal Tda5250Control.PWDDDInterrupt();
+      }
+
+      async command void RadioByteComm.txByte(uint8_t data) {
+        error_t error = call HplTda5250Data.tx(data);
+        if(error != SUCCESS) {
+          signal RadioByteComm.txByteReady(error);
+        }
+      }
+
+      async command bool RadioByteComm.isTxDone() {
+        return call HplTda5250Data.isTxDone();
+      }
+      
+      /* Generate events (these are no interrupts */
+      async event void DelayTimer.fired() {
+        delayTimer_t delay;
+        atomic { delay = delayTimer; }
+        switch (delay) {
+          case RSSISTABLE_DELAY :
+            signal Tda5250Control.RssiStable();
+            break;
+          case RECEIVER_DELAY :
+            delayTimer = RSSISTABLE_DELAY;
+            call DelayTimer.start(TDA5250_RSSI_STABLE_TIME-TDA5250_RECEIVER_SETUP_TIME);
+            call ConfigResource.release();
+            if (call DataResource.immediateRequest() == SUCCESS) {
+              switchDataResource();
+            } else {
+              call DataResource.request();
+            }
+            break;
+          case TRANSMITTER_DELAY :
+            call ConfigResource.release();
+            if (call DataResource.immediateRequest() == SUCCESS) {
+              switchDataResource();
+            } else {
+              call DataResource.request();
+            }
+            break;
+        }
+      }
+
+      default async event void Tda5250Control.TimerModeDone(){
+      }
+      default async event void Tda5250Control.SelfPollingModeDone(){
+      }
+      default async event void Tda5250Control.RxModeDone(){
+      }
+      default async event void Tda5250Control.TxModeDone(){
+      }
+      default async event void Tda5250Control.SleepModeDone(){
+      }
+      default async event void Tda5250Control.PWDDDInterrupt() {
+      }
+      default async event void RadioByteComm.rxByteReady(uint8_t data) {
+      }
+      default async event void RadioByteComm.txByteReady(error_t error) {
+      }
+}
diff --git a/tos/chips/tda5250/Tda5250ReadReg.nc b/tos/chips/tda5250/Tda5250ReadReg.nc
new file mode 100644
index 00000000..2ab2c694
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ReadReg.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Allows reading of a specified register. See "tda5250RegTypes.h".
+ * ReadReg is parameterized by the register it uses.
+ *
+ * @param reg_type Defines the register to read from.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+interface Tda5250ReadReg {
+  /**
+   * Reads from the paramterized register.
+   *
+   * @return Data content of the register.
+   */
+  async command reg_type get();
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegComm.nc b/tos/chips/tda5250/Tda5250RegComm.nc
new file mode 100644
index 00000000..f1eb021d
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegComm.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+
+/**
+ * Interface for writing and reading bytes to and from the Tda5250 Radio
+ * registers.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface Tda5250RegComm {
+ /**
+   * Transmit a byte of data to a given register.
+   *
+   * @param address The address of the register to write to.
+   * @param data The 8-bit data value to write to the register.
+   *
+   * @return always SUCCESS.
+   */
+  async command error_t writeByte(uint8_t address, uint8_t data);
+
+ /**
+   * Transmit a word of data to a given register.
+   *
+   * @param address The address of the register to write to.
+   * @param data The 16-bit data value to write to the register.
+   *
+   * @return always SUCCESS.
+   */
+  async command error_t writeWord(uint8_t address, uint16_t data);
+
+ /**
+   * Read a byte of data from a given register.
+   *
+   * @param address The address of the register to read from.
+   *
+   * @return The 16-bit data value read from the register.
+   */
+  async command uint8_t readByte(uint8_t address);
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegCommP.nc b/tos/chips/tda5250/Tda5250RegCommP.nc
new file mode 100644
index 00000000..404946cb
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegCommP.nc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+module Tda5250RegCommP {
+  provides {
+    interface Init;
+    interface Tda5250RegComm;
+    interface Resource;
+  }
+  uses {
+    interface GeneralIO as BusM;
+    interface Resource as SpiResource;
+    interface SpiByte;
+  }
+}
+
+implementation {
+
+   command error_t Init.init() {
+     // setting pins to output
+     call BusM.makeOutput();
+
+     //initializing pin values
+     call BusM.set();  //Use SPI for writing to Regs
+
+     return SUCCESS;
+   }
+
+   async command error_t Resource.request() {
+     return call SpiResource.request();
+   }
+
+   async command error_t Resource.immediateRequest() {
+     if(call SpiResource.immediateRequest() == EBUSY)
+       return EBUSY;
+     return SUCCESS;
+   }
+
+   async command bool Resource.isOwner() {
+     return call SpiResource.isOwner();
+   }
+
+   async command void Resource.release() {
+     call SpiResource.release();
+   }
+
+   event void SpiResource.granted() {
+     signal Resource.granted();
+   }
+
+   async command error_t Tda5250RegComm.writeByte(uint8_t address, uint8_t data) {
+     uint8_t rxbyte;
+     // FIXME: nobody seems to care in HplTda5250Config if call is not successfull, so why should we care here....
+//     if(call SpiResource.isOwner() == FALSE) {
+//       return FAIL;
+//     }
+     call SpiByte.write(address,&rxbyte);
+     call SpiByte.write(data,&rxbyte);
+     return SUCCESS;
+   }
+   async command error_t Tda5250RegComm.writeWord(uint8_t address, uint16_t data) {
+      uint8_t rxbyte;
+      // FIXME: nobody seems to care in HplTda5250Config if call is not successfull, so why should we care here....
+      // if(call SpiResource.isOwner() == FALSE)
+      //   return FAIL;
+      call SpiByte.write(address, &rxbyte);
+      call SpiByte.write(((uint8_t) (data >> 8)),&rxbyte);
+      call SpiByte.write(((uint8_t) data),&rxbyte);
+      return SUCCESS;
+   }
+
+   async command uint8_t Tda5250RegComm.readByte(uint8_t address){
+      uint8_t rxbyte;
+      if(call SpiResource.isOwner() == FALSE)
+        return 0x00;
+      call SpiByte.write(address, &rxbyte);
+
+      // FIXME: Put SIMO/SOMI in input
+      call SpiByte.write(0x00, &rxbyte);
+      return rxbyte;
+   }
+
+}
diff --git a/tos/chips/tda5250/Tda5250RegistersC.nc b/tos/chips/tda5250/Tda5250RegistersC.nc
new file mode 100644
index 00000000..f9235862
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegistersC.nc
@@ -0,0 +1,92 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision$
+* $Date$
+* ========================================================================
+*/
+
+/**
+* Provides access to the registers of the tda5250 radio.
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+*/
+
+configuration Tda5250RegistersC {
+provides {
+        interface Init;
+        interface Resource;
+        interface Tda5250WriteReg      as CONFIG;
+        interface Tda5250WriteReg         as FSK;
+        interface Tda5250WriteReg as XTAL_TUNING;
+        interface Tda5250WriteReg         as LPF;
+        interface Tda5250WriteReg     as ON_TIME;
+        interface Tda5250WriteReg    as OFF_TIME;
+        interface Tda5250WriteReg   as COUNT_TH1;
+        interface Tda5250WriteReg   as COUNT_TH2;
+        interface Tda5250WriteReg    as RSSI_TH3;
+        interface Tda5250WriteReg    as RF_POWER;
+        interface Tda5250WriteReg     as CLK_DIV;
+        interface Tda5250WriteReg as XTAL_CONFIG;
+        interface Tda5250WriteReg    as BLOCK_PD;
+        interface Tda5250ReadReg       as STATUS;
+        interface Tda5250ReadReg          as ADC;
+}
+}
+implementation {
+        components Tda5250RegistersP
+                        , Tda5250RadioIOC
+                        , Tda5250RegCommC
+        ;
+
+        Init = Tda5250RegistersP;
+        Init = Tda5250RegCommC;
+        Resource = Tda5250RegCommC;
+
+        CONFIG = Tda5250RegistersP.CONFIG;
+        FSK = Tda5250RegistersP.FSK;
+        XTAL_TUNING = Tda5250RegistersP.XTAL_TUNING;
+        LPF = Tda5250RegistersP.LPF;
+        ON_TIME = Tda5250RegistersP.ON_TIME;
+        OFF_TIME = Tda5250RegistersP.OFF_TIME;
+        COUNT_TH1 = Tda5250RegistersP.COUNT_TH1;
+        COUNT_TH2 = Tda5250RegistersP.COUNT_TH2;
+        RSSI_TH3 = Tda5250RegistersP.RSSI_TH3;
+        RF_POWER = Tda5250RegistersP.RF_POWER;
+        CLK_DIV = Tda5250RegistersP.CLK_DIV;
+        XTAL_CONFIG = Tda5250RegistersP.XTAL_CONFIG;
+        BLOCK_PD = Tda5250RegistersP.BLOCK_PD;
+        STATUS = Tda5250RegistersP.STATUS;
+        ADC = Tda5250RegistersP.ADC;
+
+        Tda5250RegistersP.Pot -> Tda5250RegCommC;
+        Tda5250RegistersP.Tda5250RegComm -> Tda5250RegCommC;
+
+        Tda5250RegistersP.ENTDA -> Tda5250RadioIOC.Tda5250RadioENTDA;
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegistersP.nc b/tos/chips/tda5250/Tda5250RegistersP.nc
new file mode 100644
index 00000000..f7110330
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegistersP.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Tda5250RegistersP Module
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+module Tda5250RegistersP {
+  provides {
+    interface Init;
+    interface Tda5250WriteReg      as CONFIG;
+    interface Tda5250WriteReg         as FSK;
+    interface Tda5250WriteReg as XTAL_TUNING;
+    interface Tda5250WriteReg         as LPF;
+    interface Tda5250WriteReg     as ON_TIME;
+    interface Tda5250WriteReg    as OFF_TIME;
+    interface Tda5250WriteReg   as COUNT_TH1;
+    interface Tda5250WriteReg   as COUNT_TH2;
+    interface Tda5250WriteReg    as RSSI_TH3;
+    interface Tda5250WriteReg    as RF_POWER;
+    interface Tda5250WriteReg     as CLK_DIV;
+    interface Tda5250WriteReg as XTAL_CONFIG;
+    interface Tda5250WriteReg    as BLOCK_PD;
+    interface Tda5250ReadReg       as STATUS;
+    interface Tda5250ReadReg          as ADC;
+  }
+  uses {
+        interface Tda5250RegComm;
+        interface Pot;
+        interface GeneralIO as ENTDA;
+  }
+}
+implementation {
+
+   error_t writeByte(uint8_t addr, uint16_t data) {
+     error_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.writeByte(addr, data);
+     call ENTDA.set();
+     return result;
+   }
+   error_t writeWord(uint8_t addr, uint16_t data) {
+     error_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.writeWord(addr, data);
+     call ENTDA.set();
+     return result;
+   }
+   uint8_t readByte(uint8_t addr) {
+     uint8_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.readByte(addr);
+     call ENTDA.set();
+     return result;
+   }
+
+   command error_t Init.init() {
+     // setting pins to output
+     call ENTDA.makeOutput();
+
+     // initializing pin values
+     call ENTDA.set();
+
+    return SUCCESS;
+   }
+
+   async command error_t CONFIG.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_CONFIG, data);
+   };
+   async command error_t FSK.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_FSK, data);
+   };
+   async command error_t XTAL_TUNING.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_XTAL_TUNING, data);
+   };
+   async command error_t LPF.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_LPF, data);
+   };
+   async command error_t ON_TIME.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_ON_TIME, data);
+   };
+   async command error_t OFF_TIME.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_OFF_TIME, data);
+   };
+   async command error_t COUNT_TH1.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_COUNT_TH1, data);
+   };
+   async command error_t COUNT_TH2.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_COUNT_TH2, data);
+   };
+   async command error_t RSSI_TH3.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_RSSI_TH3, data);
+   };
+   async command error_t RF_POWER.set(uint8_t data) {
+     return call Pot.set(data);
+   };
+   async command error_t CLK_DIV.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_CLK_DIV, data);
+   };
+   async command error_t XTAL_CONFIG.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_XTAL_CONFIG, data);
+   };
+   async command error_t BLOCK_PD.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_BLOCK_PD, data);
+   };
+   async command uint8_t STATUS.get() {
+     return readByte(TDA5250_REG_ADDR_STATUS);
+   };
+   async command uint8_t ADC.get() {
+     return readByte(TDA5250_REG_ADDR_ADC);
+   };
+}
+
diff --git a/tos/chips/tda5250/Tda5250WriteReg.nc b/tos/chips/tda5250/Tda5250WriteReg.nc
new file mode 100644
index 00000000..0c7abf97
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250WriteReg.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Allows writing to a specified register. See "tda5250RegTypes.h".
+ * WriteReg is parameterized by the register it uses.
+ *
+ * @param reg_type Defines the register to write to.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface Tda5250WriteReg {
+  /**
+  * Writes to the parametrized register.
+  *
+  * @param v Data written to the register.
+  *
+  * @return SUCCESS on success
+  *         FAIL otherwise.
+  */
+  async command error_t set(reg_type v);
+}
+
diff --git a/tos/chips/tda5250/mac/CsmaMacC.nc b/tos/chips/tda5250/mac/CsmaMacC.nc
new file mode 100644
index 00000000..4a246cbe
--- /dev/null
+++ b/tos/chips/tda5250/mac/CsmaMacC.nc
@@ -0,0 +1,84 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+ * Confuguration for the CsmaMac.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */
+configuration CsmaMacC {
+  provides {
+    interface SplitControl;
+    interface MacSend;
+    interface MacReceive;
+  }
+  uses {
+    interface PhySend as PacketSend;
+    interface PhyReceive as PacketReceive;
+        
+    interface Tda5250Control;  
+    interface UartPhyControl;
+  }
+}
+implementation {
+  components  MainC,
+      CsmaMacP,
+      RssiFixedThresholdCMC as Cca,
+      new Alarm32khzC() as Timer,
+      RandomLfsrC,
+      PlatformLedsC;
+              
+    MainC.SoftwareInit -> CsmaMacP;
+              
+    SplitControl = CsmaMacP;
+    
+    MacSend = CsmaMacP;
+    MacReceive = CsmaMacP;
+    Tda5250Control = CsmaMacP;
+    UartPhyControl = CsmaMacP;
+    
+    CsmaMacP = PacketSend;
+    CsmaMacP = PacketReceive;
+    
+    CsmaMacP.CcaStdControl -> Cca.StdControl;
+    CsmaMacP.ChannelMonitor -> Cca.ChannelMonitor;
+    CsmaMacP.ChannelMonitorData -> Cca.ChannelMonitorData;
+    CsmaMacP.ChannelMonitorControl -> Cca.ChannelMonitorControl;
+    CsmaMacP.Random -> RandomLfsrC;
+
+    CsmaMacP.Timer -> Timer;
+    CsmaMacP.Led0 -> PlatformLedsC.Led0;
+    CsmaMacP.Led1 -> PlatformLedsC.Led1;
+    CsmaMacP.Led2 -> PlatformLedsC.Led2;
+    CsmaMacP.Led3 -> PlatformLedsC.Led3;
+}
+
diff --git a/tos/chips/tda5250/mac/CsmaMacP.nc b/tos/chips/tda5250/mac/CsmaMacP.nc
new file mode 100644
index 00000000..aba17396
--- /dev/null
+++ b/tos/chips/tda5250/mac/CsmaMacP.nc
@@ -0,0 +1,660 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+#include "radiopacketfunctions.h"
+#include "flagfunctions.h"
+
+ /**
+  * An implementation of a Csma Mac.
+  * 
+  * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+  * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+  * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+*/
+module CsmaMacP {
+    provides {
+        interface Init;
+        interface SplitControl;
+        interface MacSend;
+        interface MacReceive;
+    }
+    uses {
+        interface StdControl as CcaStdControl;
+        interface PhySend as PacketSend;
+        interface PhyReceive as PacketReceive;
+        
+        interface Tda5250Control as RadioModes;  
+
+        interface UartPhyControl;
+      
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;  
+        interface ChannelMonitorData;
+
+        interface Random;
+        
+        interface Alarm as Timer;
+
+        interface GeneralIO as Led0;
+        interface GeneralIO as Led1;
+        interface GeneralIO as Led2;
+        interface GeneralIO as Led3;
+    }
+}
+implementation
+{
+#define CSMA_ACK 100
+#define BYTE_TIME 17
+// #define MACM_DEBUG                    // debug...
+#define MAX_LONG_RETRY 3              // Missing acks, or short retry limit hits -> increase long retry 
+#define MAX_SHORT_RETRY 5             // busy channel -> increase short retry
+#define DIFS 165                      // 5ms to get an ACK started
+#define ACK_TIMEOUT 20*BYTE_TIME
+#define MIN_BACKOFF_MASK 0x7F         // roughly 4ms for Rx/Tx turnaround defines this value
+#define CHECK_RX_LIVENESS_INTERVALL 165
+    
+/**************** Module Global Variables  *****************/
+    
+    /* state vars & defs */
+    typedef enum {
+        SW_CCA,          // switch to CCA
+        CCA,             // clear channel assessment     
+        SW_RX,           // switch to receive
+        RX,              // rx mode done, listening & waiting for packet
+        SW_RX_ACK,
+        RX_ACK,
+        RX_P,
+        SW_TX,
+        TX,
+        SW_TX_ACK,
+        TX_ACK,
+        INIT
+    } macState_t;
+
+    /* flags */
+    typedef enum {
+        RSSI_STABLE = 1,
+        BUSY_DETECTED_VIA_RSSI = 2,
+        CHECK_RX_LIVENESS = 4,
+        DIFS_TIMER_FIRED = 8
+    } flags_t;
+
+    /* Packet vars */
+    message_t* txBufPtr;
+    message_t ackMsg;
+
+    uint8_t txLen;
+    int16_t rssiValue;
+    uint8_t shortRetryCounter;
+    uint8_t longRetryCounter;
+
+    macState_t macState;
+    uint8_t flags;
+
+    uint16_t slotMask;
+    
+    /****** debug vars & defs & functions  ***********************/
+#ifdef MACM_DEBUG
+#define HISTORY_ENTRIES 40
+    typedef struct {
+        int index;
+        macState_t state;
+        int        place;
+    } history_t;
+    
+    history_t history[HISTORY_ENTRIES];
+    unsigned histIndex;
+    void storeOldState(int p) {
+        atomic {
+            history[histIndex].index = histIndex;
+            history[histIndex].state = macState;
+            history[histIndex].place = p;
+            histIndex++;
+            if(histIndex >= HISTORY_ENTRIES) histIndex = 0;
+        }
+    }
+#else
+    void storeOldState(int p) {};
+#endif
+
+    void signalFailure(uint8_t place) {
+#ifdef MACM_DEBUG
+        unsigned long i;
+        atomic {
+            for(;;) {
+                call Led0.set();
+                call Led1.clr();
+                call Led2.clr();
+                call Led3.clr();
+                
+                for(i = 0; i < 1000000; i++) {
+                    ;
+                }
+
+                (place & 1) ? call Led0.set() : call Led0.clr();
+                (place & 2) ? call Led1.set() : call Led1.clr();
+                (place & 4) ? call Led2.set() : call Led2.clr();
+                (place & 8) ? call Led3.set() : call Led3.clr();
+
+                for(i = 0; i < 1000000; i++) {
+                    ;
+                }
+
+                (macState & 1) ? call Led0.set() : call Led0.clr();
+                (macState & 2) ? call Led1.set() : call Led1.clr();
+                (macState & 4) ? call Led2.set() : call Led2.clr();
+                (macState & 8) ? call Led3.set() : call Led3.clr();
+
+                for(i = 0; i < 1000000; i++) {
+                    ;
+                }
+            }
+        }
+#endif
+    }
+
+    void signalMacState() {
+#ifdef MACM_DEBUG
+//         (macState & 1) ? call Led0.set() : call Led0.clr();
+//         (macState & 2) ? call Led1.set() : call Led1.clr();
+//         (macState & 4) ? call Led2.set() : call Led2.clr();
+//         (macState & 8) ? call Led3.set() : call Led3.clr();
+#endif
+    }
+    
+    /****** Secure switching of radio modes ***/
+    
+    task void SetRxModeTask();
+    task void SetTxModeTask();
+    
+    void setRxMode();
+    void setTxMode();
+
+    void setRxMode() {
+        if(call RadioModes.RxMode() == FAIL) {
+            post SetRxModeTask();
+        }
+    }
+    
+    task void SetRxModeTask() {
+        atomic {
+            if((macState == SW_RX) ||
+               (macState == SW_RX_ACK) ||
+               (macState == SW_CCA) ||
+               (macState == INIT)) setRxMode();
+        }
+    }
+
+    void setTxMode() {
+        clearFlag(&flags, RSSI_STABLE);
+        clearFlag(&flags, BUSY_DETECTED_VIA_RSSI);
+        if(call RadioModes.TxMode() == FAIL) {
+            post SetTxModeTask();
+        }
+    }
+    
+    task void SetTxModeTask() {
+        atomic {
+            if((macState == SW_TX) ||
+               (macState == SW_TX_ACK)) setTxMode();
+        }
+    }
+
+    /**************** Helper functions ********/
+    uint16_t backoff() {
+        uint16_t mask = slotMask;
+        unsigned i;
+        for(i = 0; i < longRetryCounter; i++) {
+            mask = (mask << 1) + 1;
+        }
+        return (call Random.rand16() & mask);
+    }
+    
+    void signalSendDone(error_t error) {
+        message_t *m;
+        atomic {
+            m = txBufPtr;
+            txBufPtr = 0;
+            txLen  = 0;
+            longRetryCounter = 0;
+            shortRetryCounter = 0;
+        }
+        signal MacSend.sendDone(m, error);
+    }
+
+    void updateRetryCounters() {
+        shortRetryCounter++;
+        if(shortRetryCounter > MAX_SHORT_RETRY) {
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                signalSendDone(FAIL);
+            }
+        }
+    }
+    
+    void checkSend() {
+        if((txBufPtr != NULL) && (macState == RX) && (!call Timer.isRunning())) {
+            clearFlag(&flags, CHECK_RX_LIVENESS);
+            clearFlag(&flags, DIFS_TIMER_FIRED);
+            /*           if(!call UartPhyControl.isBusy()) { */
+                if(isFlagSet(&flags, RSSI_STABLE)) {
+                    macState = CCA;
+                    signalMacState();
+                    call Timer.start(DIFS);
+                    call ChannelMonitor.start();
+                    storeOldState(130);
+                } else {
+                    macState = SW_CCA;
+                    signalMacState();
+                    storeOldState(131);
+                }
+ /*           }
+            else {
+                storeOldState(132);
+                updateRetryCounters();
+                setFlag(&flags, CHECK_RX_LIVENESS);
+                call Timer.start(backoff());
+            }
+                */
+      }
+    }
+    
+    bool needsAck(message_t* msg) {
+        return FALSE;  // (getHeader(msg)->addr != AM_BROADCAST_ADDR);
+    }
+    
+    /**************** Init ************************/
+    
+    command error_t Init.init(){
+        atomic {
+            txBufPtr = NULL;
+            macState = INIT;
+            signalMacState();
+            shortRetryCounter = 0;
+            longRetryCounter = 0;
+            flags = 0;
+            slotMask = MIN_BACKOFF_MASK;
+#ifdef MACM_DEBUG
+            histIndex = 0;
+#endif
+        }
+        return SUCCESS;
+    }
+
+    /****************  SplitControl  *****************/
+
+    task void StartDoneTask() {
+        signal SplitControl.startDone(SUCCESS);
+    }
+
+    command error_t SplitControl.start() {
+        call CcaStdControl.start();
+        atomic {
+            macState = INIT;
+            signalMacState();
+            setRxMode();
+            storeOldState(1);
+        }
+        return SUCCESS;
+    }
+
+    task void StopDone() {
+        atomic {
+            if (macState != RX) {
+                post StopDone();
+                storeOldState(2);
+            } else {
+                storeOldState(3);
+                call Timer.stop();
+                call Init.init();
+                signal SplitControl.stopDone(SUCCESS); 
+            }
+        }
+    }
+    
+    command error_t SplitControl.stop() {
+        call CcaStdControl.stop();
+        storeOldState(4);
+        post StopDone();
+        return SUCCESS;
+    }
+    
+    /****** Radio(Mode) events *************************/
+    async event void RadioModes.RssiStable() {
+        atomic  {
+            setFlag(&flags, RSSI_STABLE);
+            if(macState == SW_CCA)  {
+                storeOldState(10);
+                macState = CCA;
+                signalMacState();
+                call Timer.start(DIFS);
+                call ChannelMonitor.start();
+            } else if(macState == INIT) {
+                storeOldState(11);
+                call ChannelMonitorControl.updateNoiseFloor();
+            } else {
+                storeOldState(13);
+            }
+        }
+    }
+
+    async event void RadioModes.RxModeDone() {
+        atomic {
+            if(macState == SW_RX) {
+                storeOldState(21);
+                macState = RX;
+                signalMacState();
+                call Timer.start(backoff());
+            }
+            else if(macState == SW_RX_ACK) {
+                storeOldState(22);
+                macState = RX_ACK;
+                signalMacState();
+                call Timer.start(ACK_TIMEOUT);
+            }
+            else if(macState == SW_CCA) {
+                storeOldState(23);
+            }
+            else if(macState == INIT) {
+                storeOldState(24);
+            }
+            else {
+                storeOldState(25);
+                signalFailure(1);
+            }
+        }
+    }
+
+    async event void RadioModes.TxModeDone() {
+        atomic {
+            if(macState == SW_TX) {
+                storeOldState(30);
+                if(txBufPtr) {
+                    macState = TX;
+                    signalMacState();
+                    if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) {
+                        storeOldState(31);
+                    } else {
+                        storeOldState(32);
+                        signalFailure(2);
+                    }
+                }
+            }
+            else {
+                storeOldState(33);
+                signalFailure(3);
+            }
+        }
+    }
+
+    /****** MacSend events *************************/    
+    async command error_t MacSend.send(message_t* msg, uint8_t len) {
+        error_t err = SUCCESS;
+        atomic {
+            if((shortRetryCounter == 0) && (txBufPtr == NULL)) {
+                storeOldState(40);
+                shortRetryCounter = 1;
+                txBufPtr = msg;
+                txLen = len;
+                if((macState != RX_P) && (macState != RX_ACK)) checkSend();
+            }
+            else {
+                storeOldState(41);
+                err = EBUSY;
+            }
+        }
+        return err;
+    }
+
+    async command error_t MacSend.cancel(message_t* msg) {
+        error_t err = SUCCESS;
+        if((shortRetryCounter != 0) && (txBufPtr == msg) &&
+           (macState != TX) && (macState != RX_ACK) && (macState != SW_RX_ACK)) {
+            storeOldState(50);
+            shortRetryCounter = 0;
+            txBufPtr = NULL;
+            txLen = 0;
+            signal MacSend.sendDone(msg, ECANCEL);
+        }
+        else {
+            storeOldState(51);
+            err = FAIL;
+        }
+        return err;
+    }
+    
+    /****** PacketSerializer events **********************/
+    async event void PacketReceive.receiveDetected() {
+        if(macState <= RX_ACK) {
+            storeOldState(60);
+            rssiValue = 0xFFFF;
+            call Timer.stop();
+            clearFlag(&flags, CHECK_RX_LIVENESS);
+            if(isFlagSet(&flags, BUSY_DETECTED_VIA_RSSI)) call ChannelMonitor.rxSuccess();
+            call  ChannelMonitorData.getSnr();
+        }
+        if(macState <= RX) {
+            storeOldState(61);
+            macState = RX_P;
+            signalMacState();
+        }
+        else if(macState <= RX_ACK) {
+            storeOldState(62);
+            macState = RX_ACK;
+            signalMacState();
+        }
+        else if(macState == INIT) {
+            storeOldState(63);
+        }
+        else {
+            storeOldState(64);
+            signalFailure(4);
+        } 
+    }
+    
+    async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) {
+        message_t* m = msg;
+        if(macState == RX_P) {
+            storeOldState(70);
+            if (error == SUCCESS) {
+                storeOldState(71);
+                (getMetadata(msg))->strength = rssiValue;
+                m = signal MacReceive.receiveDone(msg);
+            }
+            macState = RX;
+            signalMacState();
+            call Timer.start(backoff());
+        }
+        else if(macState == RX_ACK) {
+            storeOldState(72);
+            if(txBufPtr == NULL) signalFailure(5);
+            if((error == SUCCESS) &&
+               getFooter(msg)->crc &&
+               (getHeader(msg)->type == CSMA_ACK) &&
+               (*((uint16_t*)(msg->data)) == TOS_NODE_ID))
+            {
+                storeOldState(73);
+                getMetadata(txBufPtr)->ack = 1;
+                signalSendDone(SUCCESS);
+            }
+            else {
+                storeOldState(74);
+                updateRetryCounters();
+            }
+            macState = RX;
+            signalMacState();
+            call Timer.start(backoff());
+        } else {
+            storeOldState(76);
+        }
+        return m;
+    }
+
+    async event void PacketSend.sendDone(message_t* msg, error_t error) {
+        if(macState == TX) {
+            if(msg != txBufPtr) signalFailure(7);            
+            if(needsAck(msg)) {
+                if(error == SUCCESS) {
+                    storeOldState(80);
+                    macState = SW_RX_ACK;
+                    signalMacState();
+                } else {
+                    storeOldState(81);
+                    macState = SW_RX;
+                    signalMacState();
+                }
+            } else {
+                macState = SW_RX;
+                signalMacState();
+                signalSendDone(error);
+            }
+        }
+        else if(macState == TX_ACK) {
+            storeOldState(83);
+            if(msg != &ackMsg) signalFailure(8);
+            macState = SW_RX;
+            signalMacState();
+        }
+        else {
+            storeOldState(84);
+            signalFailure(9);
+        }
+        setRxMode();
+    }
+       
+    
+    /****** Timer ******************************/
+    
+    async event void Timer.fired() {
+        if(macState == RX) {
+            storeOldState(90);
+            if(isFlagSet(&flags, CHECK_RX_LIVENESS)) {
+                /* if(call UartPhyControl.isBusy()) {
+                    call Timer.start(CHECK_RX_LIVENESS_INTERVALL);
+                }
+                else {
+                */
+                    call ChannelMonitor.start();
+                    /*} */
+            } else {
+                checkSend();
+            }
+        }
+        else if(macState == RX_ACK) {
+            storeOldState(91);
+            updateRetryCounters();
+            macState = RX;
+            signalMacState();
+            call Timer.start(backoff());
+        }
+        else if(macState == CCA) {
+            storeOldState(92);
+            setFlag(&flags, DIFS_TIMER_FIRED);
+            call ChannelMonitor.start();
+        }
+        else {
+            storeOldState(93);
+            signalFailure(10);
+        }
+    }
+    
+    /****** ChannelMonitor events *********************/
+
+    async event void ChannelMonitor.channelBusy() {
+        atomic {
+            if(macState == CCA) {
+                storeOldState(100);
+                macState = RX;
+                signalMacState();
+                setFlag(&flags, BUSY_DETECTED_VIA_RSSI);
+                updateRetryCounters();
+                call Timer.start(backoff());
+            }
+            else if(macState == RX_P) {
+                storeOldState(101);
+                setFlag(&flags, BUSY_DETECTED_VIA_RSSI);
+            }
+            else if((macState == RX) && (isFlagSet(&flags, CHECK_RX_LIVENESS))) {
+                storeOldState(102);
+                call Timer.start(CHECK_RX_LIVENESS_INTERVALL);
+            }
+        }
+    }
+
+    async event void ChannelMonitor.channelIdle() {
+        storeOldState(110);
+        if((macState == RX) && (isFlagSet(&flags, CHECK_RX_LIVENESS))) {
+                storeOldState(111);
+                clearFlag(&flags, CHECK_RX_LIVENESS);
+                call Timer.start(backoff());
+        }
+        else if(macState == CCA) {
+          if(isFlagSet(&flags, DIFS_TIMER_FIRED)) {    
+            clearFlag(&flags, DIFS_TIMER_FIRED);
+            storeOldState(112);
+            macState = SW_TX;
+            signalMacState();
+            setTxMode();
+          }
+        }
+    }
+
+
+    /****** ChannelMonitorControl events **************/
+    
+    event void ChannelMonitorControl.updateNoiseFloorDone() {
+        if(macState == INIT) {
+            storeOldState(120);
+            macState = RX;
+            signalMacState();
+            post StartDoneTask();
+        } else {
+            storeOldState(121);
+            signalFailure(11);
+        }
+    }
+
+    /***** ChannelMonitorData events ******************/
+    
+    async event void ChannelMonitorData.getSnrDone(int16_t data) {
+        atomic if(macState == RX_P) rssiValue = data;
+    }
+
+    
+    /***** unused Radio Modes events **************************/
+    
+    async event void RadioModes.TimerModeDone() {}
+    async event void RadioModes.SleepModeDone() {}
+    async event void RadioModes.SelfPollingModeDone() {}
+    async event void RadioModes.PWDDDInterrupt() {}
+}
+
diff --git a/tos/chips/tda5250/tda5250Const.h b/tos/chips/tda5250/tda5250Const.h
new file mode 100644
index 00000000..f8d26d68
--- /dev/null
+++ b/tos/chips/tda5250/tda5250Const.h
@@ -0,0 +1,288 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * tda5250Const Header File
+ * Defines constants and macros for use with the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250CONST_H
+#define TDA5250CONST_H
+
+// List of valid output frequencies for clock
+typedef enum {
+   CLOCK_OUT_FREQ_NINE_MHZ                        = 0x00,
+   CLOCK_OUT_FREQ_FOUR_POINT_FIVE_MHZ             = 0x01,
+   CLOCK_OUT_FREQ_THREE_MHZ                       = 0x02,
+   CLOCK_OUT_FREQ_TWO_POINT_TWO_FIVE_MHZ          = 0x03,
+   CLOCK_OUT_FREQ_ONE_POINT_EIGHT_MHZ             = 0x04,
+   CLOCK_OUT_FREQ_ONE_POINT_FIVE_MHZ              = 0x05,
+   CLOCK_OUT_FREQ_ONE_POINT_TWO_EIGHT_MHZ         = 0x06,
+   CLOCK_OUT_FREQ_ONE_POINT_ONE_TWO_FIVE_MHZ      = 0x07,
+   CLOCK_OUT_FREQ_ONE_MHZ                         = 0x08,
+   CLOCK_OUT_FREQ_POINT_NINE_MHZ                  = 0x09,
+   CLOCK_OUT_FREQ_POINT_EIGHT_TWO_MHZ             = 0x0A,
+   CLOCK_OUT_FREQ_POINT_SEVEN_FIVE_MHZ            = 0x0B,
+   CLOCK_OUT_FREQ_POINT_SIX_NINE_MHZ              = 0x0C,
+   CLOCK_OUT_FREQ_POINT_SIX_FOUR_MHZ              = 0x0D,
+   CLOCK_OUT_FREQ_POINT_SIX_MHZ                   = 0x0E,
+   CLOCK_OUT_FREQ_POINT_FIVE_SIX_MHZ              = 0x0F,
+   CLOCK_OUT_FREQ_THIRTY_TWO_KHZ                  = 0x80,
+   CLOCK_OUT_FREQ_WINDOW_COUNT_COMPLETE           = 0xC0
+} tda5250_clock_out_freqs_t;
+
+//List of valid cutoff frequencies for the IQ Filter
+typedef enum {
+   DATA_CUTOFF_FREQ_FIVE_KHZ                        = 0x00,
+   DATA_CUTOFF_FREQ_SEVEN_KHZ                       = 0x01,
+   DATA_CUTOFF_FREQ_NINE_KHZ                        = 0x02,
+   DATA_CUTOFF_FREQ_ELEVEN_KHZ                      = 0x03,
+   DATA_CUTOFF_FREQ_FOURTEEN_KHZ                    = 0x04,
+   DATA_CUTOFF_FREQ_EIGHTEEN_KHZ                    = 0x05,
+   DATA_CUTOFF_FREQ_TWENTY_THREE_KHZ                = 0x06,
+   DATA_CUTOFF_FREQ_TWENTY_EIGHT_KHZ                = 0x07,
+   DATA_CUTOFF_FREQ_THIRTY_TWO_KHZ                  = 0x08,
+   DATA_CUTOFF_FREQ_THIRTY_NINE_KHZ                 = 0x09,
+   DATA_CUTOFF_FREQ_FOURTY_NINE_KHZ                 = 0x0A,
+   DATA_CUTOFF_FREQ_FIFTY_FIVE_KHZ                  = 0x0B,
+   DATA_CUTOFF_FREQ_SIXTY_FOUR_KHZ                  = 0x0C,
+   DATA_CUTOFF_FREQ_SEVENTY_THREE_KHZ               = 0x0D,
+   DATA_CUTOFF_FREQ_EIGHTY_SIX_KHZ                  = 0x0E,
+   DATA_CUTOFF_FREQ_ONE_HUNDRED_TWO_KHZ             = 0x0F
+} tda5250_data_cutoff_freqs_t;
+
+//List of valid cutoff frequencies for the Lowpass
+  //data filter
+typedef enum {
+   IQ_CUTOFF_FREQ_THREE_HUNDRED_FIFTY_KHZ         = 0x01,
+   IQ_CUTOFF_FREQ_TWO_HUNDRED_FIFTY_KHZ           = 0x02,
+   IQ_CUTOFF_FREQ_TWO_HUNDRED_KHZ                 = 0x03,
+   IQ_CUTOFF_FREQ_ONE_HUNDRED_FIFTY_KHZ           = 0x04,
+   IQ_CUTOFF_FREQ_ONE_HUNDRED_KHZ                 = 0x05,
+   IQ_CUTOFF_FREQ_FIFTY_KHZ                       = 0x06
+} tda5250_iq_cutoff_freqs_t;
+
+//List of valid capacitor values for tuning the nominal
+  //frequency setting
+typedef enum {
+   CAP_VAL_ZERO_F                          = 0x00,
+   CAP_VAL_TWO_HUNDRED_FIFTY_FF            = 0x01,
+   CAP_VAL_FIVE_HUNDRED_FIFTY_FF           = 0x02,
+   CAP_VAL_SEVEN_HUNDRED_FIFTY_FF          = 0x03,
+   CAP_VAL_ONE_PF                          = 0x04,
+   CAP_VAL_ONE_POINT_TWO_FIVE_PF           = 0x05,
+   CAP_VAL_ONE_POINT_FIVE_PF               = 0x06,
+   CAP_VAL_ONE_POINT_SEVEN_FIVE_PF         = 0x07,
+   CAP_VAL_TWO_PF                          = 0x08,
+   CAP_VAL_TWO_POINT_TWO_FIVE_PF           = 0x09,
+   CAP_VAL_TWO_POINT_FIVE_PF               = 0x0A,
+   CAP_VAL_TWO_POINT_SEVEN_FIVE_PF         = 0x0B,
+   CAP_VAL_THREE_PF                        = 0x0C,
+   CAP_VAL_THREE_POINT_TWO_FIVE_PF         = 0x0D,
+   CAP_VAL_THREE_POINT_FIVE_PF             = 0x0E,
+   CAP_VAL_THREE_POINT_SEVEN_FIVE_PF       = 0x0F,
+   CAP_VAL_FOUR_PF                         = 0x10,
+   CAP_VAL_FOUR_POINT_TWO_FIVE_PF          = 0x11,
+   CAP_VAL_FOUR_POINT_FIVE_PF              = 0x12,
+   CAP_VAL_FOUR_POINT_SEVEN_FIVE_PF        = 0x13,
+   CAP_VAL_FIVE_PF                         = 0x14,
+   CAP_VAL_FIVE_POINT_TWO_FIVE_PF          = 0x15,
+   CAP_VAL_FIVE_POINT_FIVE_PF              = 0x16,
+   CAP_VAL_FIVE_POINT_SEVEN_FIVE_PF        = 0x17,
+   CAP_VAL_SIX_PF                          = 0x18,
+   CAP_VAL_SIX_POINT_TWO_FIVE_PF           = 0x19,
+   CAP_VAL_SIX_POINT_FIVE_PF               = 0x1A,
+   CAP_VAL_SIX_POINT_SEVEN_FIVE_PF         = 0x1B,
+   CAP_VAL_SEVEN_PF                        = 0x1C,
+   CAP_VAL_SEVEN_POINT_TWO_FIVE_PF         = 0x1D,
+   CAP_VAL_SEVEN_POINT_FIVE_PF             = 0x1E,
+   CAP_VAL_SEVEN_POINT_SEVEN_FIVE_PF       = 0x1F,
+   CAP_VAL_EIGHT_PF                        = 0x10,
+   CAP_VAL_EIGHT_POINT_TWO_FIVE_PF         = 0x11,
+   CAP_VAL_EIGHT_POINT_FIVE_PF             = 0x12,
+   CAP_VAL_EIGHT_POINT_SEVEN_FIVE_PF       = 0x13,
+   CAP_VAL_NINE_PF                         = 0x14,
+   CAP_VAL_NINE_POINT_TWO_FIVE_PF          = 0x15,
+   CAP_VAL_NINE_POINT_FIVE_PF              = 0x16,
+   CAP_VAL_NINE_POINT_SEVEN_FIVE_PF        = 0x17,
+   CAP_VAL_TEN_PF                          = 0x18,
+   CAP_VAL_TEN_POINT_TWO_FIVE_PF           = 0x19,
+   CAP_VAL_TEN_POINT_FIVE_PF               = 0x1A,
+   CAP_VAL_TEN_POINT_SEVEN_FIVE_PF         = 0x1B,
+   CAP_VAL_ELEVEN_PF                       = 0x1C,
+   CAP_VAL_ELEVEN_POINT_TWO_FIVE_PF        = 0x1D,
+   CAP_VAL_ELEVEN_POINT_FIVE_PF            = 0x1E,
+   CAP_VAL_ELEVEN_POINT_SEVEN_FIVE_PF      = 0x1F,
+   CAP_VAL_TWELVE_PF                       = 0x10,
+   CAP_VAL_TWELVE_POINT_TWO_FIVE_PF        = 0x11,
+   CAP_VAL_TWELVE_POINT_FIVE_PF            = 0x12,
+   CAP_VAL_TWELVE_POINT_SEVEN_FIVE_PF      = 0x13,
+   CAP_VAL_THIRTEEN_PF                     = 0x14,
+   CAP_VAL_THIRTEEN_POINT_TWO_FIVE_PF      = 0x15,
+   CAP_VAL_THIRTEEN_POINT_FIVE_PF          = 0x16,
+   CAP_VAL_THIRTEEN_POINT_SEVEN_FIVE_PF    = 0x17,
+   CAP_VAL_FOURTEEN_PF                     = 0x18,
+   CAP_VAL_FOURTEEN_POINT_TWO_FIVE_PF      = 0x19,
+   CAP_VAL_FOURTEEN_POINT_FIVE_PF          = 0x1A,
+   CAP_VAL_FOURTEEN_POINT_SEVEN_FIVE_PF    = 0x1B,
+   CAP_VAL_FIFTEEN_PF                      = 0x1C,
+   CAP_VAL_FIFTEEN_POINT_TWO_FIVE_PF       = 0x1D,
+   CAP_VAL_FIFTEEN_POINT_FIVE_PF           = 0x1E,
+   CAP_VAL_FIFTEEN_POINT_SEVEN_FIVE_PF     = 0x1F
+} tda5250_cap_vals_t;
+
+//List of valid times for Bipolar Ramp
+typedef enum {
+   BIPOLAR_FET_RAMP_TIME_LESS_THAN_TWO_MS                = 0x01,
+   BIPOLAR_FET_RAMP_TIME_FOUR_MS                         = 0x03,
+   BIPOLAR_FET_RAMP_TIME_EIGHT_MS                        = 0x05,
+   BIPOLAR_FET_RAMP_TIME_TWELVE_MS                       = 0x07
+} tda5250_bipolar_fet_ramp_times_t;
+
+#define TDA5250_RECEIVE_FREQUENCY               868.3      // kHz
+#define TDA5250_OSCILLATOR_FREQUENCY            ((3.0/4.0) * TDA5250_RECEIVE_FREQUENCY) // kHz
+#define TDA5250_INTERMEDIATE_FREQUENCY          ((3.0) * TDA5250_RECEIVE_FREQUENCY) // kHz
+#define TDA5250_INTERNAL_OSC_FREQUENCY          32.768 //kHz
+#define TDA5250_CLOCK_OUT_BASE_FREQUENCY        18089.6 //kHz
+#define TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE   2261  //khz of integer for 18089.6/2/4
+#define TDA5250_CONVERT_TIME(time)         ((uint16_t)(0xFFFF - ((time*TDA5250_INTERNAL_OSC_FREQUENCY))))
+#define TDA5250_CONVERT_FREQ_TO_TH_VALUE(freq, clock_freq) \
+           ((TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE/(clock_freq*freq))*1000)
+
+#define TDA5250_SYSTEM_SETUP_TIME            (12000/TDA5250_INTERNAL_OSC_FREQUENCY) //12000us
+#define TDA5250_RECEIVER_SETUP_TIME           (2860/TDA5250_INTERNAL_OSC_FREQUENCY) // 2860us
+#define TDA5250_DATA_DETECTION_SETUP_TIME     (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us
+#define TDA5250_RSSI_STABLE_TIME              (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us
+#define TDA5250_CLOCK_OUT_SETUP_TIME           (500/TDA5250_INTERNAL_OSC_FREQUENCY) //  500us
+#define TDA5250_TRANSMITTER_SETUP_TIME        (1430/TDA5250_INTERNAL_OSC_FREQUENCY) // 1430us
+#define TDA5250_XTAL_STARTUP_TIME              (500/TDA5250_INTERNAL_OSC_FREQUENCY) //  500us
+
+// Subaddresses of data registers write
+#define TDA5250_REG_ADDR_CONFIG            0x00
+#define TDA5250_REG_ADDR_FSK               0x01
+#define TDA5250_REG_ADDR_XTAL_TUNING       0x02
+#define TDA5250_REG_ADDR_LPF               0x03
+#define TDA5250_REG_ADDR_ON_TIME           0x04
+#define TDA5250_REG_ADDR_OFF_TIME          0x05
+#define TDA5250_REG_ADDR_COUNT_TH1         0x06
+#define TDA5250_REG_ADDR_COUNT_TH2         0x07
+#define TDA5250_REG_ADDR_RSSI_TH3          0x08
+#define TDA5250_REG_ADDR_CLK_DIV           0x0D
+#define TDA5250_REG_ADDR_XTAL_CONFIG       0x0E
+#define TDA5250_REG_ADDR_BLOCK_PD          0x0F
+
+// Subaddresses of data registers read
+#define TDA5250_REG_ADDR_STATUS            0x80
+#define TDA5250_REG_ADDR_ADC               0x81
+
+// Mask Values for write registers (16 or 8 bit)
+/************* Apply these masks by & with original */
+#define MASK_CONFIG_SLICER_RC_INTEGRATOR       0x7FFF
+#define MASK_CONFIG_ALL_PD_NORMAL              0xBFFF
+#define MASK_CONFIG_TESTMODE_NORMAL            0xDFFF
+#define MASK_CONFIG_CONTROL_TXRX_EXTERNAL      0xEFFF
+#define MASK_CONFIG_ASK_NFSK_FSK               0xF7FF
+#define MASK_CONFIG_RX_NTX_TX                  0xFBFF
+#define MASK_CONFIG_CLK_EN_OFF                 0xFDFF
+#define MASK_CONFIG_RX_DATA_INV_NO             0xFEFF
+#define MASK_CONFIG_D_OUT_IFVALID              0xFF7F
+#define MASK_CONFIG_ADC_MODE_ONESHOT           0xFFBF
+#define MASK_CONFIG_F_COUNT_MODE_ONESHOT       0xFFDF
+#define MASK_CONFIG_LNA_GAIN_LOW               0xFFEF
+#define MASK_CONFIG_EN_RX_DISABLE              0xFFF7
+#define MASK_CONFIG_MODE_2_SLAVE               0xFFFB
+#define MASK_CONFIG_MODE_1_SLAVE_TIMER         0xFFFD
+#define MASK_CONFIG_PA_PWR_LOWTX               0xFFFE
+/************* Apply these masks by | with original */
+#define MASK_CONFIG_SLICER_PEAK_DETECTOR       0x8000
+#define MASK_CONFIG_ALL_PD_POWER_DOWN          0x4000
+#define MASK_CONFIG_TESTMODE_TESTMODE          0x2000
+#define MASK_CONFIG_CONTROL_TXRX_REGISTER      0x1000
+#define MASK_CONFIG_ASK_NFSK_ASK               0x0800
+#define MASK_CONFIG_RX_NTX_RX                  0x0400
+#define MASK_CONFIG_CLK_EN_ON                  0x0200
+#define MASK_CONFIG_RX_DATA_INV_YES            0x0100
+#define MASK_CONFIG_D_OUT_ALWAYS               0x0080
+#define MASK_CONFIG_ADC_MODE_CONT              0x0040
+#define MASK_CONFIG_F_COUNT_MODE_CONT          0x0020
+#define MASK_CONFIG_LNA_GAIN_HIGH              0x0010
+#define MASK_CONFIG_EN_RX_ENABLE               0x0008
+#define MASK_CONFIG_MODE_2_TIMER               0x0004
+#define MASK_CONFIG_MODE_1_SELF_POLLING        0x0002
+#define MASK_CONFIG_PA_PWR_HIGHTX              0x0001
+
+// Mask Values for write registers (16 or 8 bit)
+/************* Apply these masks by & with original */
+#define CONFIG_SLICER_RC_INTEGRATOR(config)       (config & 0x7FFF)
+#define CONFIG_ALL_PD_NORMAL(config)              (config & 0xBFFF)
+#define CONFIG_TESTMODE_NORMAL(config)            (config & 0xDFFF)
+#define CONFIG_CONTROL_TXRX_EXTERNAL(config)      (config & 0xEFFF)
+#define CONFIG_ASK_NFSK_FSK(config)               (config & 0xF7FF)
+#define CONFIG_RX_NTX_TX(config)                  (config & 0xFBFF)
+#define CONFIG_CLK_EN_OFF(config)                 (config & 0xFDFF)
+#define CONFIG_RX_DATA_INV_NO(config)             (config & 0xFEFF)
+#define CONFIG_D_OUT_IFVALID(config)              (config & 0xFF7F)
+#define CONFIG_ADC_MODE_ONESHOT(config)           (config & 0xFFBF)
+#define CONFIG_F_COUNT_MODE_ONESHOT(config)       (config & 0xFFDF)
+#define CONFIG_LNA_GAIN_LOW(config)               (config & 0xFFEF)
+#define CONFIG_EN_RX_DISABLE(config)              (config & 0xFFF7)
+#define CONFIG_MODE_2_SLAVE(config)               (config & 0xFFFB)
+#define CONFIG_MODE_1_SLAVE_OR_TIMER(config)      (config & 0xFFFD)
+#define CONFIG_PA_PWR_LOWTX(config)               (config & 0xFFFE)
+#define XTAL_CONFIG_FET(xtal)                     (xtal & 0xFE)
+#define XTAL_CONFIG_FSK_RAMP0_FALSE(xtal)         (xtal & 0xFB)
+#define XTAL_CONFIG_FSK_RAMP1_FALSE(xtal)         (xtal & 0xFD)
+/************* Apply these masks by | with original */
+#define CONFIG_SLICER_PEAK_DETECTOR(config)       (config | 0x8000)
+#define CONFIG_ALL_PD_POWER_DOWN(config)          (config | 0x4000)
+#define CONFIG_TESTMODE_TESTMODE(config)          (config | 0x2000)
+#define CONFIG_CONTROL_TXRX_REGISTER(config)      (config | 0x1000)
+#define CONFIG_ASK_NFSK_ASK(config)               (config | 0x0800)
+#define CONFIG_RX_NTX_RX(config)                  (config | 0x0400)
+#define CONFIG_CLK_EN_ON(config)                  (config | 0x0200)
+#define CONFIG_RX_DATA_INV_YES(config)            (config | 0x0100)
+#define CONFIG_D_OUT_ALWAYS(config)               (config | 0x0080)
+#define CONFIG_ADC_MODE_CONT(config)              (config | 0x0040)
+#define CONFIG_F_COUNT_MODE_CONT(config)          (config | 0x0020)
+#define CONFIG_LNA_GAIN_HIGH(config)              (config | 0x0010)
+#define CONFIG_EN_RX_ENABLE(config)               (config | 0x0008)
+#define CONFIG_MODE_2_TIMER(config)               (config | 0x0004)
+#define CONFIG_MODE_1_SELF_POLLING(config)        (config | 0x0002)
+#define CONFIG_PA_PWR_HIGHTX(config)              (config | 0x0001)
+#define XTAL_CONFIG_BIPOLAR(xtal)                 (xtal | 0x01)
+#define XTAL_CONFIG_FSK_RAMP0_TRUE(xtal)          (xtal | 0x04)
+#define XTAL_CONFIG_FSK_RAMP1_TRUE(xtal)          (xtal | 0x02)
+
+#endif //TDA5250CONST_H
diff --git a/tos/chips/tda5250/tda5250Control.h b/tos/chips/tda5250/tda5250Control.h
new file mode 100644
index 00000000..5cd16629
--- /dev/null
+++ b/tos/chips/tda5250/tda5250Control.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Macros for configuring the TDA5250.
+ * - Revision ------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * Author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef TDA5250CONTROL_H
+#define TDA5250CONTROL_H
+
+typedef enum {
+  RADIO_MODE_ON_TRANSITION,
+  RADIO_MODE_ON,
+  RADIO_MODE_OFF_TRANSITION,
+  RADIO_MODE_OFF,
+  RADIO_MODE_TX_TRANSITION,
+  RADIO_MODE_TX,
+  RADIO_MODE_RX_TRANSITION,
+  RADIO_MODE_RX,
+  RADIO_MODE_CCA_TRANSITION,
+  RADIO_MODE_CCA,
+  RADIO_MODE_TIMER_TRANSITION,
+  RADIO_MODE_TIMER,
+  RADIO_MODE_SELF_POLLING_TRANSITION,
+  RADIO_MODE_SELF_POLLING,
+  RADIO_MODE_SLEEP_TRANSITION,
+  RADIO_MODE_SLEEP
+} radioMode_t;
+
+#define INIT_RSSI_THRESHOLD     26
+#define TH1_VALUE               0x0000
+#define TH2_VALUE               0xFFFF
+
+#endif //TDA5250CONTROL_H
diff --git a/tos/chips/tda5250/tda5250RegDefaultsSettings.h b/tos/chips/tda5250/tda5250RegDefaultsSettings.h
new file mode 100644
index 00000000..ef5441d4
--- /dev/null
+++ b/tos/chips/tda5250/tda5250RegDefaultsSettings.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegDefaultSettings Header File
+ * Defines the default values of the registers for the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGDEFAULTSETTINGS_H
+#define TDA5250REGDEFAULTSETTINGS_H
+
+// Default values of data registers
+#define TDA5250_REG_DEFAULT_SETTING_CONFIG           0x04F9
+#define TDA5250_REG_DEFAULT_SETTING_FSK              0x0A0C
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING      0x0012
+#define TDA5250_REG_DEFAULT_SETTING_LPF              0x18
+#define TDA5250_REG_DEFAULT_SETTING_ON_TIME          0xFEC0
+#define TDA5250_REG_DEFAULT_SETTING_OFF_TIME         0xF380
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1        0x0000
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2        0x0001
+#define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3         0xFF
+#define TDA5250_REG_DEFAULT_SETTING_CLK_DIV          0x08
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG      0x01
+#define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD         0xFFFF
+
+#endif //TDA5250REGDEFAULTSETTINGS_H
+
diff --git a/tos/chips/tda5250/tda5250RegTypes.h b/tos/chips/tda5250/tda5250RegTypes.h
new file mode 100644
index 00000000..4473fd4a
--- /dev/null
+++ b/tos/chips/tda5250/tda5250RegTypes.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegTypes Header File
+ * Defines the register types for the registers on the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGTYPES_H
+#define TDA5250REGTYPES_H
+
+//Macro for receiving an address and figuring out its type
+#define TDA5250_REG_TYPE(addr) TDA5250_REG_TYPE_#addr
+
+// Default values of data registers
+#define TDA5250_REG_TYPE_CONFIG           uint16_t
+#define TDA5250_REG_TYPE_FSK              uint16_t
+#define TDA5250_REG_TYPE_XTAL_TUNING      uint16_t
+#define TDA5250_REG_TYPE_LPF              uint8_t
+#define TDA5250_REG_TYPE_ON_TIME          uint16_t
+#define TDA5250_REG_TYPE_OFF_TIME         uint16_t
+#define TDA5250_REG_TYPE_COUNT_TH1        uint16_t
+#define TDA5250_REG_TYPE_COUNT_TH2        uint16_t
+#define TDA5250_REG_TYPE_RSSI_TH3         uint8_t
+#define TDA5250_REG_TYPE_RF_POWER         uint8_t
+#define TDA5250_REG_TYPE_CLK_DIV          uint8_t
+#define TDA5250_REG_TYPE_XTAL_CONFIG      uint8_t
+#define TDA5250_REG_TYPE_BLOCK_PD         uint16_t
+#define TDA5250_REG_TYPE_STATUS           uint8_t
+#define TDA5250_REG_TYPE_ADC              uint8_t
+
+#endif //TDA5250REGTYPES_H
+
diff --git a/tos/chips/tda5250/tda5250_message.h b/tos/chips/tda5250/tda5250_message.h
new file mode 100644
index 00000000..8631d265
--- /dev/null
+++ b/tos/chips/tda5250/tda5250_message.h
@@ -0,0 +1,25 @@
+#ifndef TDA5250_MESSAGE_H
+#define TDA5250_MESSAGE_H
+
+#include "AM.h"
+
+typedef nx_struct tda5250_header_t {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} tda5250_header_t;
+
+typedef nx_struct tda5250_footer_t {
+  nxle_uint16_t crc;
+} tda5250_footer_t;
+
+typedef nx_struct tda5250_metadata_t {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;
+} tda5250_metadata_t;
+
+#endif
diff --git a/tos/chips/tmp175/HalTMP175Advanced.nc b/tos/chips/tmp175/HalTMP175Advanced.nc
new file mode 100644
index 00000000..2a763414
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175Advanced.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175Advanced is the HAL control interface for the TI TMP175
+ * Digital Temperature Sensor. 
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#include "TMP175.h"
+
+interface HalTMP175Advanced {
+
+  command error_t setThermostatMode(bool useInt);
+  event void setThermostatModeDone(error_t error);
+  command error_t setPolarity(bool polarity);
+  event void setPolarityDone(error_t error);
+  command error_t setFaultQueue(tmp175_fqd_t depth);
+  event void setFaultQueueDone(error_t error);
+  command error_t setResolution(tmp175_res_t res);
+  event void setResolutionDone(error_t error);
+  command error_t setTLow(uint16_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint16_t val);
+  event void setTHighDone(error_t error);
+  
+  event void alertThreshold();
+
+}
diff --git a/tos/chips/tmp175/HalTMP175ControlP.nc b/tos/chips/tmp175/HalTMP175ControlP.nc
new file mode 100644
index 00000000..a1745789
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175ControlP.nc
@@ -0,0 +1,297 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip.
+ *
+ * Note that only the data path uses split phase resource arbitration
+ * 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+module HalTMP175ControlP
+{
+  provides interface HalTMP175Advanced;
+
+  uses interface HplTMP175;
+  uses interface Resource as TMP175Resource;
+}
+
+implementation {
+
+  enum {
+    STATE_SET_MODE,
+    STATE_SET_POLARITY,
+    STATE_SET_FQ,
+    STATE_SET_RES,
+    STATE_NONE,
+
+    STATE_SET_TLOW,
+    STATE_SET_THIGH,
+  };
+
+  uint8_t mState = STATE_NONE;
+  uint8_t mConfigRegVal = 0;
+  error_t mHplError;
+
+
+  static error_t setCfg(uint8_t nextState, uint32_t val) {
+    error_t error;
+
+
+    mState = nextState;
+
+    error = call HplTMP175.setConfigReg(val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+    else {
+      mConfigRegVal = val;
+    }
+
+    return error;
+
+  }
+
+  static error_t setThresh(uint8_t nextState, uint32_t val) {
+    error_t error;
+
+
+    mState = nextState;
+
+    if(mState == STATE_SET_TLOW)
+      error = call HplTMP175.setTLowReg(val << 4);
+    else
+      error = call HplTMP175.setTHighReg(val << 4);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+    else {
+      mConfigRegVal = val;
+    }
+
+    return error;
+
+  }
+
+  command error_t HalTMP175Advanced.setThermostatMode(bool useInt) {
+    error_t error;
+    uint8_t newRegVal;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (useInt) ? (mConfigRegVal | TMP175_CFG_TM) : (mConfigRegVal & ~TMP175_CFG_TM);
+    error = setCfg(STATE_SET_MODE, newRegVal);
+
+    return error;
+  }
+
+
+  command error_t HalTMP175Advanced.setPolarity(bool polarity) {
+    error_t error;
+    uint8_t newRegVal;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (polarity) ? (mConfigRegVal | TMP175_CFG_POL) : (mConfigRegVal & ~TMP175_CFG_POL);
+    error = setCfg(STATE_SET_MODE, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setFaultQueue(tmp175_fqd_t depth) {
+    error_t error;
+    uint8_t newRegVal;
+
+    if ((uint8_t)depth > 3) {
+      error = EINVAL;
+      return error;
+    }
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (mConfigRegVal & ~TMP175_CFG_FQ(3)) | (TMP175_CFG_FQ(depth));
+    error = setCfg(STATE_SET_FQ, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setResolution(tmp175_res_t res) {
+    error_t error;
+    uint8_t newRegVal;
+
+    if ((uint8_t)res > 3) {
+      error = EINVAL;
+      return error;
+    }
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (mConfigRegVal & ~TMP175_CFG_RES(3)) | (TMP175_CFG_RES(res));
+    error = setCfg(STATE_SET_RES, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setTLow(uint16_t val) {
+    error_t error;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+    
+    //error = call HplTMP175.setTLowReg(val << 4);
+    error = setThresh(STATE_SET_TLOW, val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setTHigh(uint16_t val) {
+    error_t error;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    //error = call HplTMP175.setTHighReg(val << 4);
+    error = setThresh(STATE_SET_THIGH, val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+
+    return error;
+  }
+
+  task void handleConfigReg() {
+    error_t lasterror;
+    atomic lasterror = mHplError;
+    call TMP175Resource.release();
+    switch (mState) {
+    case STATE_SET_MODE:
+      signal HalTMP175Advanced.setThermostatModeDone(lasterror);
+      break;
+    case STATE_SET_POLARITY:
+      signal HalTMP175Advanced.setPolarityDone(lasterror);
+      break;
+    case STATE_SET_FQ:
+      signal HalTMP175Advanced.setFaultQueueDone(lasterror);
+      break;
+    case STATE_SET_RES:
+      signal HalTMP175Advanced.setResolutionDone(lasterror);
+      break;
+    default:
+      break;
+    }
+    mState = STATE_NONE;
+    return;
+  }
+
+  task void handleTReg() {
+    error_t lasterror;
+    atomic lasterror = mHplError;
+    call TMP175Resource.release();
+    switch (mState) {
+    case STATE_SET_TLOW:
+      signal HalTMP175Advanced.setTLowDone(lasterror);
+      break;
+    case STATE_SET_THIGH:
+      signal HalTMP175Advanced.setTHighDone(lasterror);
+      break;
+    default:
+      break;
+    }
+    mState = STATE_NONE;
+  }
+
+  event void TMP175Resource.granted() {
+    // intentionally left blank
+  }
+
+  async event void HplTMP175.setConfigRegDone(error_t error) {
+    mHplError = error;
+    post handleConfigReg();
+    return;
+  }
+
+  async event void HplTMP175.setTLowRegDone(error_t error) {
+    mHplError = error;
+    post handleTReg();
+
+  }
+
+  async event void HplTMP175.setTHighRegDone(error_t error) {
+    mHplError = error;
+    post handleTReg();
+  }
+
+  async event void HplTMP175.alertThreshold() {
+    // if in interrupt mode, need to clear interrupt, otherwise, just signal
+    if(mConfigRegVal & TMP175_CFG_POL) {
+      // this will clear the interrupt, just ignore the result
+      call HplTMP175.measureTemperature();
+    }
+  }
+
+  async event void HplTMP175.measureTemperatureDone(error_t error, uint16_t val) {
+    // intentionally left blank
+  }
+  
+  default event void HalTMP175Advanced.setTHighDone(error_t error) { return; }
+  default event void HalTMP175Advanced.setThermostatModeDone(error_t error){ return; } 
+  default event void HalTMP175Advanced.setPolarityDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setFaultQueueDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setResolutionDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setTLowDone(error_t error){ return; }
+  default event void HalTMP175Advanced.alertThreshold(){ return; }
+  
+}
diff --git a/tos/chips/tmp175/HalTMP175ReaderP.nc b/tos/chips/tmp175/HalTMP175ReaderP.nc
new file mode 100644
index 00000000..30c16052
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175ReaderP.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175ReaderP provides the service level HIL and device
+ * specific Hal interfaces for the TI TMP175 Chip.
+ *
+ * Note that only the data path uses split phase resource arbitration
+ * 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+generic module HalTMP175ReaderP()
+{
+  provides interface Read as Temperature;
+
+  uses interface HplTMP175;
+  uses interface Resource as TMP175Resource;
+}
+
+implementation {
+
+  enum {
+    STATE_SET_MODE,
+    STATE_SET_POLARITY,
+    STATE_SET_FQ,
+    STATE_SET_RES,
+    STATE_NONE
+  };
+
+  uint8_t mState = STATE_NONE;
+  uint8_t mConfigRegVal = 0;
+  error_t mHplError;
+
+  command error_t Temperature.read() {
+    return call TMP175Resource.request();
+  }
+
+  event void TMP175Resource.granted() {
+    error_t error;
+    
+    error = call HplTMP175.measureTemperature();
+    if (error) {
+      call TMP175Resource.release();
+      signal Temperature.readDone(error,0);
+    }
+    return;
+  }
+
+  async event void HplTMP175.measureTemperatureDone(error_t tmp175_error, uint16_t val) {
+    call TMP175Resource.release();
+    signal Temperature.readDone(tmp175_error,val);
+    return;
+  }
+
+  // intentionally left empty
+  async event void HplTMP175.setTLowRegDone(error_t error) {}
+  async event void HplTMP175.setTHighRegDone(error_t error) {}
+  async event void HplTMP175.setConfigRegDone(error_t error) {}
+  async event void HplTMP175.alertThreshold() {}
+
+  default event void Temperature.readDone(error_t error, uint16_t val) {return ;}
+
+}
diff --git a/tos/chips/tmp175/HplTMP175.nc b/tos/chips/tmp175/HplTMP175.nc
new file mode 100644
index 00000000..4e83ba8a
--- /dev/null
+++ b/tos/chips/tmp175/HplTMP175.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTMP175 is the HPL inteface to the Texas Instrument TMP175 
+ * Digital Temperature Sensor. 
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+interface HplTMP175 {
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  async event void measureTemperatureDone( error_t error, uint16_t val );
+
+  /**
+   * Sets a new value to the TMP175 configuration register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the set will be performed
+   */
+  command error_t setConfigReg( uint8_t val );
+
+  /**
+   * Signals the completion of the configuration register set.
+   *
+   * @param error SUCCESS if the set was successful
+   */
+  async event void setConfigRegDone( error_t error );
+
+  command error_t setTLowReg(uint16_t val);
+  async event void setTLowRegDone(error_t error);
+
+  command error_t setTHighReg(uint16_t val);
+  async event void setTHighRegDone(error_t error);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/tmp175/HplTMP175LogicP.nc b/tos/chips/tmp175/HplTMP175LogicP.nc
new file mode 100644
index 00000000..f2d5d4ec
--- /dev/null
+++ b/tos/chips/tmp175/HplTMP175LogicP.nc
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTMP175LogicP is the driver for the TI TMP175. It requires an 
+ * I2C packet interface and provides the HplTMP175 HPL interface.
+ * This module DOES NOT apply any specific configuration to the GpioInterrupt 
+ * pin associated with the theshold alerts. This must be handled by an
+ * outside configuration/module according to the host platform.
+ * 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#include "TMP175.h"
+#include "I2C.h"
+
+generic module HplTMP175LogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplTMP175;
+
+  uses interface I2CPacket;
+  uses interface GpioInterrupt as AlertInterrupt;
+  uses interface GeneralIO as InterruptPin;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READTEMP,
+    STATE_SETCONFIG,
+    STATE_SETTHIGH,
+    STATE_SETTLOW,
+  };
+
+  bool mfPtrReset;
+  uint8_t mI2CBuffer[4];
+  uint8_t mState;
+  uint8_t mConfigRegVal;
+  norace error_t mSSError;
+
+  static error_t doSetReg(uint8_t nextState, uint8_t reg, uint16_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = val;
+
+    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = (val >> 8) & 0xFF;
+    mI2CBuffer[2] = val & 0xFF;
+
+    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(mSSError);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    // careful! this can be changed via polarity I believe
+    call InterruptPin.makeInput();
+    call AlertInterrupt.enableFallingEdge();
+    mfPtrReset = FALSE;
+    mConfigRegVal = 0;
+    mState = STATE_STOPPED;
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_IDLE; 
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    
+    if (error)
+      return error;
+    
+    return doSetReg(STATE_STARTING,TMP175_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD));
+  }
+
+  command error_t SplitControl.stop() {
+    return doSetReg(STATE_STOPPING,TMP175_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD));
+  }
+  
+  command error_t HplTMP175.measureTemperature() { 
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_READTEMP;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = mI2CBuffer[1] = 0;
+
+    error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+
+  }
+
+  command error_t HplTMP175.setConfigReg( uint8_t val ){
+    return doSetReg(STATE_SETCONFIG,TMP175_PTR_CFG,val);
+  }
+  
+  command error_t HplTMP175.setTLowReg(uint16_t val){ 
+    return doSetRegWord(STATE_SETTLOW,TMP175_PTR_TLOW,val);  
+  }
+
+  command error_t HplTMP175.setTHighReg(uint16_t val){
+    return doSetRegWord(STATE_SETTHIGH,TMP175_PTR_THIGH,val); 
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+
+    switch (mState) {
+    case STATE_READTEMP:
+      tempVal = buf[0];
+      tempVal = ((tempVal << 8) | buf[1]);
+      mState = STATE_IDLE;
+      signal HplTMP175.measureTemperatureDone(i2c_error,tempVal);
+      break;
+    default:
+      break;
+    }
+
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    if (mfPtrReset) {
+      mfPtrReset = FALSE;
+      switch (mState) {
+      case STATE_STARTING:
+	mSSError = error;
+	post StartDone();
+	break;
+      case STATE_STOPPING:
+	mSSError = error;
+	post StopDone();
+	break;
+      case STATE_READTEMP:
+	// Should never get here.
+	break;
+      case STATE_SETCONFIG:
+	mState = STATE_IDLE;
+	signal HplTMP175.setConfigRegDone(error);
+	break;
+      case STATE_SETTHIGH:
+	mState = STATE_IDLE;
+	signal HplTMP175.setTHighRegDone(error);
+	break;
+      case STATE_SETTLOW:
+	mState = STATE_IDLE;
+	signal HplTMP175.setTLowRegDone(error);
+	break;
+      default:
+	mState = STATE_IDLE;
+	break;
+      }
+    }
+    else {
+      // Reset the PTR register back to the temperature register
+      mI2CBuffer[0] = TMP175_PTR_TEMP;
+      mfPtrReset = TRUE;
+      call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer);
+    } 
+
+    return;
+  }
+
+  async event void AlertInterrupt.fired() {
+    // This alert is decoupled from whatever state the TMP175 is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplTMP175.alertThreshold();
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+  default async event void HplTMP175.measureTemperatureDone( error_t error, uint16_t val ){ return; }
+  default async event void HplTMP175.setConfigRegDone( error_t error ){ return; }
+  default async event void HplTMP175.setTHighRegDone(error_t error){ return; }
+  default async event void HplTMP175.setTLowRegDone(error_t error){ return; }
+  default async event void HplTMP175.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/tmp175/TMP175.h b/tos/chips/tmp175/TMP175.h
new file mode 100644
index 00000000..b30630e2
--- /dev/null
+++ b/tos/chips/tmp175/TMP175.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the TI TMP175
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef _TMP175_H
+#define _TMP175_H
+
+#define TMP175_PTR_TEMP		(0x0)
+#define TMP175_PTR_CFG		(0x1)
+#define TMP175_PTR_TLOW		(0x2)
+#define TMP175_PTR_THIGH	(0x3)
+
+#define TMP175_CFG_OS		(1 << 7)
+#define TMP175_CFG_RES(_x)	(((_x) & 0x3) << 5)
+#define TMP175_CFG_FQ(_x)	(((_x) & 0x3) << 3)
+#define TMP175_CFG_POL		(1 << 2)
+#define TMP175_CFG_TM		(1 << 1)
+#define TMP175_CFG_SD		(1 << 0)
+
+typedef enum {
+  TMP175_FQD_1 = 0,
+  TMP175_FQD_2 = 1,
+  TMP175_FQD_4 = 2,
+  TMP175_FQD_6 = 3
+} tmp175_fqd_t;
+
+typedef enum {
+  TMP175_RES_9BIT,
+  TMP175_RES_10BIT,
+  TMP175_RES_11BIT,
+  TMP175_RES_12BIT
+} tmp175_res_t;
+
+#endif /* _TMP175_H */
diff --git a/tos/chips/tsl2561/HalTsl2561Advanced.nc b/tos/chips/tsl2561/HalTsl2561Advanced.nc
new file mode 100644
index 00000000..cdf85005
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561Advanced.nc
@@ -0,0 +1,51 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+interface HalTsl2561Advanced {
+  command error_t setGain(bool gainHigh);
+  event void setGainDone(error_t error);
+  command error_t setIntegration(uint8_t val);
+  event void setIntegrationDone(error_t error);
+  command error_t setPersistence(uint8_t val);
+  event void setPersistenceDone(error_t error);
+  command error_t setTLow(uint16_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint16_t val);
+  event void setTHighDone(error_t error);
+  command error_t enableAlert(bool enable);
+  event void enableAlertDone(error_t error);
+  event void alertThreshold();
+}
diff --git a/tos/chips/tsl2561/HalTsl2561ControlP.nc b/tos/chips/tsl2561/HalTsl2561ControlP.nc
new file mode 100644
index 00000000..048ce757
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561ControlP.nc
@@ -0,0 +1,231 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "TSL256x.h"
+
+module HalTsl2561ControlP {
+  provides interface HalTsl2561Advanced;
+
+  uses interface Resource;
+  uses interface HplTSL256x;
+}
+
+implementation {
+  enum {
+    S_IDLE = 0,
+    S_GAIN,
+    S_INTEG,
+    S_PERSIST,
+    S_TLOW,
+    S_THIGH,
+    S_ENALERT,
+  };
+  uint8_t state = S_IDLE;
+  error_t clientResult;
+
+  uint8_t timingRegisterShadow = 0x02;
+  uint8_t iControlRegisterShadow = 0x0;
+  
+  task void complete_Alert() {
+    signal HalTsl2561Advanced.alertThreshold();
+  }
+
+  task void complete_Task() {
+    switch(state) {
+    case S_GAIN:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setGainDone(clientResult);
+      break;
+    case S_INTEG:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setIntegrationDone(clientResult);
+      break;
+    case S_PERSIST:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setPersistenceDone(clientResult);
+      break;
+    case S_TLOW:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setTLowDone(clientResult);
+      break;
+    case S_THIGH:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setTHighDone(clientResult);
+      break;
+    case S_ENALERT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.enableAlertDone(clientResult);
+      break;
+    default:
+      break;
+    }    
+  }
+
+  command error_t HalTsl2561Advanced.setGain(bool gainHigh) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_GAIN;
+    if(gainHigh)
+      timingRegisterShadow |= TSL256X_TIMING_GAIN;
+    else
+      timingRegisterShadow &= ~TSL256X_TIMING_GAIN;
+
+    call HplTSL256x.setTIMING(timingRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setIntegration(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_INTEG;
+    timingRegisterShadow |= TSL256X_TIMING_MANUAL;
+    timingRegisterShadow |= TSL256X_TIMING_INTEG(val);
+
+    call HplTSL256x.setTIMING(timingRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setPersistence(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_PERSIST;
+    iControlRegisterShadow |= TSL256X_INTERRUPT_PERSIST(val);
+
+    call HplTSL256x.setINTERRUPT(iControlRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setTLow(uint16_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_TLOW;
+
+    call HplTSL256x.setTHRESHLOW(val);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setTHigh(uint16_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_THIGH;
+
+    call HplTSL256x.setTHRESHHIGH(val);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.enableAlert(bool enable) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_ENALERT;
+    iControlRegisterShadow &= ~TSL256X_INTERRUPT_INTR(3); // strip off interrupt select
+    if(enable)
+      iControlRegisterShadow |= TSL256X_INTERRUPT_INTR(1);
+
+    call HplTSL256x.setINTERRUPT(iControlRegisterShadow);
+    return SUCCESS;
+  }
+
+  event void Resource.granted() {
+    // using immediate requests only
+  }
+
+  async event void HplTSL256x.setTIMINGDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setINTERRUPTDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setTHRESHLOWDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setTHRESHHIGHDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.alertThreshold() { post complete_Alert(); }
+
+  // stubs
+  async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {}
+
+  // intentionally left empty
+  async event void HplTSL256x.setCONTROLDone(error_t error) {}
+  async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) {}
+  async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) {}
+
+  // default stuff
+  /*
+  default event void HalTsl2561Advanced.setGainDone(error_t error) {}
+  default event void HalTsl2561Advanced.setIntegrationDone(error_t error) {}
+  default event void HalTsl2561Advanced.setPersistenceDone(error_t error) {}
+  default event void HalTsl2561Advanced.setTLowDone(error_t error) {}
+  default event void HalTsl2561Advanced.setTHighDone(error_t error) {}
+  default event void HalTsl2561Advanced.enableAlertDone(error_t error) {}
+  default event void HalTsl2561Advanced.alertThreshold() {}
+  */
+}
diff --git a/tos/chips/tsl2561/HalTsl2561ReaderP.nc b/tos/chips/tsl2561/HalTsl2561ReaderP.nc
new file mode 100644
index 00000000..54ee8ab0
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561ReaderP.nc
@@ -0,0 +1,134 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+// someone better power this up via SplitControl
+
+generic module HalTsl2561ReaderP() {
+  provides interface Read as BroadbandPhoto;
+  provides interface Read as IRPhoto;
+
+  uses interface Resource as BroadbandResource;
+  uses interface Resource as IRResource;
+  uses interface HplTSL256x;
+
+}
+
+implementation {
+  enum {
+    S_OFF = 0,
+    S_READY,
+    S_READ_BB,
+    S_READ_IR,
+  };
+  norace uint8_t m_state = S_READY;
+  error_t m_error;
+  uint16_t m_val;
+
+  task void signalDone_task() {
+    switch(m_state) {
+    case S_READ_BB:
+      m_state = S_READY;
+      call BroadbandResource.release();
+      signal BroadbandPhoto.readDone(m_error, m_val);
+      break;
+    case S_READ_IR:
+      m_state = S_READY;
+      call IRResource.release();
+      signal IRPhoto.readDone(m_error, m_val);
+      break;
+    default:
+      m_state = S_READY;
+      break;
+    }
+  }
+
+  command error_t BroadbandPhoto.read() {
+    error_t status;
+    if(m_state != S_READY)
+      return FAIL;
+    status = call BroadbandResource.request();
+    return status;
+  }
+
+  command error_t IRPhoto.read() {
+    error_t status;
+    if(m_state != S_READY)
+      return FAIL;
+    status = call IRResource.request();
+    return status;
+  }
+
+  event void BroadbandResource.granted() {
+    error_t result;
+    result = call HplTSL256x.measureCh0();
+    if(result != SUCCESS) {
+      call BroadbandResource.release();
+      signal BroadbandPhoto.readDone(result, 0);
+    }
+  }
+
+  event void IRResource.granted() {
+    error_t result;
+    result = call HplTSL256x.measureCh1();
+    if(result != SUCCESS) {
+      call IRResource.release();
+      signal IRPhoto.readDone(result, 0);
+    }
+  }
+  
+  async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) {
+    m_state = S_READ_BB;
+    m_error = error;
+    m_val = val;
+    post signalDone_task();
+  }
+
+  async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) {
+    m_state = S_READ_IR;
+    m_error = error;
+    m_val = val;
+    post signalDone_task();
+  }
+
+  async event void HplTSL256x.setCONTROLDone(error_t error) {}
+  async event void HplTSL256x.setTIMINGDone(error_t error) {}
+  async event void HplTSL256x.setTHRESHLOWDone(error_t error) {}
+  async event void HplTSL256x.setTHRESHHIGHDone(error_t error) {}
+  async event void HplTSL256x.setINTERRUPTDone(error_t error) {}
+  async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {}
+  async event void HplTSL256x.alertThreshold() {}
+
+}
diff --git a/tos/chips/tsl2561/HplTSL2561LogicP.nc b/tos/chips/tsl2561/HplTSL2561LogicP.nc
new file mode 100644
index 00000000..4ddf07a5
--- /dev/null
+++ b/tos/chips/tsl2561/HplTSL2561LogicP.nc
@@ -0,0 +1,335 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * TSL2561LogicP is the driver for the Taos TSL2561, the I2C variant
+ * of the Taos TSL256x line. 
+ *  It requires an I2C packet interface and provides the 
+ * TSL256x HPL interface.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#include "TSL256x.h"
+#include "I2C.h"
+
+generic module HplTSL2561LogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplTSL256x;
+
+  uses interface I2CPacket;
+  uses interface GpioInterrupt as InterruptAlert;
+
+  uses interface GeneralIO as InterruptPin;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READCH0,
+    STATE_READCH1,
+    STATE_SETCONTROL,
+    STATE_SETTIMING,
+    STATE_SETLOW,
+    STATE_SETHIGH,
+    STATE_SETINTERRUPT,
+    STATE_READID,
+    STATE_CLRINTERRUPTS,
+    STATE_ERROR
+  };
+
+  bool interruptBit; // determine if I2C write was to clear an interrupt
+
+  uint8_t mI2CBuffer[4];
+  uint8_t mState;
+  norace error_t mSSError;
+
+  static error_t doWriteReg(uint8_t nextState, uint8_t reg, uint8_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | TSL256X_COMMAND_ADDRESS(reg));
+    mI2CBuffer[1] = val;
+
+    error = call I2CPacket.write(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doReadPrep(uint8_t nextState, uint8_t reg) {
+        error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | TSL256X_COMMAND_ADDRESS(reg));
+
+    error = call I2CPacket.write(I2C_START,devAddr,1,mI2CBuffer);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t clearInterrupt() {
+    error_t error;
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | TSL256X_COMMAND_CLEAR);
+    error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr, 1, mI2CBuffer);
+    
+    if (error == SUCCESS)
+      interruptBit = TRUE;
+      
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(mSSError);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    call InterruptPin.makeInput();
+    call InterruptAlert.enableFallingEdge();
+    mState = STATE_STOPPED;
+    interruptBit = FALSE;
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_IDLE; 
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    
+    if (error)
+      return error;
+
+    return doWriteReg(STATE_STARTING,TSL256X_PTR_CONTROL,(TSL256X_CONTROL_POWER_ON));
+  }
+
+  command error_t SplitControl.stop() {
+    return doWriteReg(STATE_STOPPING,TSL256X_PTR_CONTROL,(TSL256X_CONTROL_POWER_OFF));
+  }
+
+  
+  command error_t HplTSL256x.measureCh0() { 
+    return doReadPrep(STATE_READCH0,TSL256X_PTR_DATA0LOW);
+  }
+
+  command error_t HplTSL256x.measureCh1() {
+    return doReadPrep(STATE_READCH1,TSL256X_PTR_DATA1LOW);
+  }
+
+  command error_t HplTSL256x.setCONTROL(uint8_t val) {
+    return doWriteReg(STATE_SETCONTROL,TSL256X_PTR_CONTROL,val);
+  }
+  
+  command error_t HplTSL256x.setTIMING(uint8_t val) {
+    return doWriteReg(STATE_SETTIMING,TSL256X_PTR_TIMING,val);
+  }
+
+  command error_t HplTSL256x.setTHRESHLOW(uint16_t val) {
+    return doWriteReg(STATE_SETLOW,TSL256X_PTR_THRESHLOWLOW,val);  
+  }
+
+  command error_t HplTSL256x.setTHRESHHIGH(uint16_t val) {
+    return doWriteReg(STATE_SETHIGH,TSL256X_PTR_THRESHHIGHLOW,val); 
+  }
+
+  command error_t HplTSL256x.setINTERRUPT(uint8_t val) {
+    return doWriteReg(STATE_SETINTERRUPT,TSL256X_PTR_INTERRUPT,val);
+  }
+  
+  command error_t HplTSL256x.getID() {
+    return doReadPrep(STATE_READID,TSL256X_PTR_ID);
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_READCH0:
+      tempVal = buf[1];
+      tempVal = ((tempVal << 8) | buf[0]);
+      mState = STATE_IDLE;
+      signal HplTSL256x.measureCh0Done(error,tempVal);
+      break;
+    case STATE_READCH1:
+      tempVal = buf[1];
+      tempVal = ((tempVal << 8) | buf[0]);
+      mState = STATE_IDLE;
+      signal HplTSL256x.measureCh1Done(error,tempVal);
+      break;
+    case STATE_READID:
+      mState = STATE_IDLE;
+      signal HplTSL256x.getIDDone(error,buf[0]);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+    /*
+    if(interruptBit) {
+      interruptBit = FALSE;
+      return;
+    }
+    */
+    switch (mState) {
+    case STATE_STARTING:
+      mSSError = error;
+      //---
+      /* 
+      mState = STATE_CLRINTERRUPTS;
+      interruptBit = TRUE;
+      clearInterrupt();
+      break;
+    case STATE_CLRINTERRUPTS:
+      mSSError = error;
+      */
+      //---
+      mState = STATE_IDLE;
+      post StartDone();
+      break;
+    case STATE_STOPPING:
+      mSSError = error;
+      mState = STATE_STOPPED;
+      post StopDone();
+      break;
+    case STATE_READCH0:
+      error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+      break;
+    case STATE_READCH1:
+      error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+      break;
+    case STATE_SETCONTROL:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setCONTROLDone(error);
+      break;
+    case STATE_SETTIMING:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTIMINGDone(error);
+      break;
+    case STATE_SETINTERRUPT:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setINTERRUPTDone(error);
+      break;
+    case STATE_SETHIGH:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTHRESHHIGHDone(error);
+      break;
+    case STATE_SETLOW:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTHRESHLOWDone(error);
+      break;
+    case STATE_READID:
+      error = call I2CPacket.read(I2C_STOP,devAddr,1,mI2CBuffer);
+      break;
+    default:
+      mState = STATE_IDLE;
+	break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the TSL2561 is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    
+    signal HplTSL256x.alertThreshold();
+
+    // need to clear interrupt, this is dangerous...
+    // if you get interrupted while someone is reading...
+    // ... the I2C bus may become inconsistent?
+    clearInterrupt();
+    
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+  default async event void HplTSL256x.measureCh0Done( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.measureCh1Done( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.setCONTROLDone( error_t error ){ return; }
+  default async event void HplTSL256x.setTIMINGDone(error_t error){ return; }
+  default async event void HplTSL256x.setTHRESHLOWDone(error_t error){ return;} 
+  default async event void HplTSL256x.setTHRESHHIGHDone(error_t error){ return; }
+  default async event void HplTSL256x.setINTERRUPTDone(error_t error){ return;} 
+  default async event void HplTSL256x.getIDDone(error_t error, uint8_t idval){ return; }
+  default async event void HplTSL256x.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/tsl2561/HplTSL256x.nc b/tos/chips/tsl2561/HplTSL256x.nc
new file mode 100644
index 00000000..774357f6
--- /dev/null
+++ b/tos/chips/tsl2561/HplTSL256x.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTSL256x is the Hpl inteface to the Taos TSL256x series 
+ * Light-to-Digital converters.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+interface HplTSL256x {
+
+
+  command error_t measureCh0();
+  async event void measureCh0Done( error_t error, uint16_t val );
+
+  command error_t measureCh1();
+  async event void measureCh1Done( error_t error, uint16_t val );
+
+  command error_t setCONTROL( uint8_t val );
+  async event void setCONTROLDone( error_t error );
+
+  command error_t setTIMING( uint8_t val );
+  async event void setTIMINGDone( error_t error );
+
+  command error_t setTHRESHLOW(uint16_t val);
+  async event void setTHRESHLOWDone(error_t error);
+
+  command error_t setTHRESHHIGH(uint16_t val);
+  async event void setTHRESHHIGHDone(error_t error);
+
+  command error_t setINTERRUPT(uint8_t val);
+  async event void setINTERRUPTDone(error_t error);
+
+  command error_t getID();
+  async event void getIDDone(error_t error, uint8_t idval);
+
+  async event void alertThreshold();
+}
diff --git a/tos/chips/tsl2561/TSL256x.h b/tos/chips/tsl2561/TSL256x.h
new file mode 100644
index 00000000..3f0211d8
--- /dev/null
+++ b/tos/chips/tsl2561/TSL256x.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in so1urce and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Taos TSL256x sensor
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef _TSL256X_H
+#define _TSL256X_H
+
+#define TSL256X_PTR_CONTROL	(0x0)
+#define TSL256X_PTR_TIMING	(0x1)
+#define TSL256X_PTR_THRESHLOWLOW	(0x2)
+#define TSL256X_PTR_THRESHLOWHIGH	(0x3)
+#define TSL256X_PTR_THRESHHIGHLOW	(0x4)
+#define TSL256X_PTR_THRESHHIGHIGH	(0x5)
+#define TSL256X_PTR_INTERRUPT	(0x6)
+#define TSL256X_PTR_CRC		(0x8)
+#define TSL256X_PTR_ID		(0xA)
+#define TSL256X_PTR_DATA0LOW	(0xC)
+#define TSL256X_PTR_DATA0HIGH	(0xD)
+#define TSL256X_PTR_DATA1LOW	(0xE)
+#define TSL256X_PTR_DATA1HIGH	(0xF)
+
+#define TSL256X_COMMAND_CMD	(1<<7)
+#define TSL256X_COMMAND_CLEAR	(1<<6)
+#define TSL256X_COMMAND_WORD	(1<<5)
+#define TSL256X_COMMAND_BLOCK	(1<<4)
+#define TSL256X_COMMAND_ADDRESS(_x) ((_x) & 0xF)
+
+#define TSL256X_CONTROL_POWER_ON (0x3)
+#define TSL256X_CONTROL_POWER_OFF (0x0)
+
+#define TSL256X_TIMING_GAIN	(1<<4)
+#define TSL256X_TIMING_MANUAL	(1<<3)
+#define TSL256X_TIMING_INTEG(_x) ((_x) & 0x3)
+
+#define TSL256X_INTERRUPT_INTR(_x) (((_x) & 0x3) << 4)
+#define TSL256X_INTERRUPT_PERSIST(_x) ((_x) & 0xF)
+
+
+#endif /* _TSL256X_H */
diff --git a/tos/chips/xe1205/XE1205.h b/tos/chips/xe1205/XE1205.h
new file mode 100644
index 00000000..301b852d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205.h
@@ -0,0 +1,191 @@
+/* 
+ * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+/*
+ * XE1205 constants and helper macros and functions.
+ *
+ */
+
+/**
+ * @author Henri Dubois-Ferriere
+ * @author Remy Blank
+ *
+ */
+
+
+#ifndef _XE1205CONST_H
+#define _XE1205CONST_H
+
+#include "AM.h"
+
+typedef nx_struct xe1205_header_t {
+  nx_am_addr_t addr;
+  nx_am_id_t type;
+  nx_am_group_t group;
+} xe1205_header_t;
+
+typedef nx_struct xe1205_footer_t {
+  nxle_uint16_t crc;  
+} xe1205_footer_t;
+
+typedef nx_struct xe1205_metadata_t {
+  nx_uint8_t length;
+  nx_uint8_t ack;// xxx this should move to header or footer, leaving it here for now for 1.x compat
+} xe1205_metadata_t;
+
+
+/*
+ * Register address generators.
+ */
+#define XE1205_WRITE(register_)                 (((register_) << 1) | 0x01)
+#define XE1205_READ(register_)                  (((register_) << 1) | 0x41)
+
+/**
+ * Register addresses.
+ */
+enum xe1205_register_enums {
+  MCParam_0    = 0,
+  MCParam_1    = 1,
+  MCParam_2    = 2,
+  MCParam_3    = 3,
+  MCParam_4    = 4,
+  IrqParam_5   = 5,
+  IrqParam_6   = 6,
+  TXParam_7    = 7,
+  RXParam_8    = 8,
+  RXParam_9    = 9,
+  RXParam_10   = 10,
+  RXParam_11   = 11,
+  RXParam_12   = 12,
+  Pattern_13   = 13,
+  Pattern_14   = 14,
+  Pattern_15   = 15,
+  Pattern_16   = 16,
+  OscParam_17  = 17,
+  OscParam_18  = 18,
+  TParam_19    = 19,
+  TParam_21    = 21,
+  TParam_22    = 22,
+  XE1205_RegCount
+};
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+enum {
+  xe1205_mtu=TOSH_DATA_LENGTH + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t)
+};
+
+enum {
+  data_pattern = 0x893456,
+};
+
+
+typedef enum {
+  rx_irq0_none=0,
+  rx_irq0_write_byte=1,
+  rx_irq0_nFifoEmpty=2,
+  rx_irq0_Pattern=3,   
+}  xe1205_rx_irq0_src_t;
+
+typedef enum xe1205_rx_irq1_src_t {
+  rx_irq1_none=0,
+  rx_irq1_FifoFull=1,
+  rx_irq1_Rssi=2
+} xe1205_rx_irq1_src_t;
+
+// In TX, IRQ0 is always mapped to nFifoEmpty 
+typedef enum {
+  tx_irq1_FifoFull=0,
+  tx_irq1_TxStopped=1
+} xe1205_tx_irq1_src_t;
+
+
+typedef enum {
+  xe1205_channelpreset_867mhz=0,
+  xe1205_channelpreset_868mhz=1,
+  xe1205_channelpreset_869mhz=2,
+} xe1205_channelpreset_t;
+
+typedef enum {
+  xe1205_txpower_0dbm=0,
+  xe1205_txpower_5dbm=1,
+  xe1205_txpower_10dbm=2,
+  xe1205_txpower_15dbm=3
+} xe1205_txpower_t;
+
+typedef enum {
+  xe1205_bitrate_152340=152340U,
+  xe1205_bitrate_76170=76170U,
+  xe1205_bitrate_50780=50780U,
+  xe1205_bitrate_38085=38085U,
+//   xe1205_bitrate_30468=30468,
+//   xe1205_bitrate_19042=19042,
+//   xe1205_bitrate_12695=12695,
+//   xe1205_bitrate_8017=8017,
+//   xe1205_bitrate_4760=4760
+} xe1205_bitrate_t;
+
+
+
+/**
+ * Receiver modes.
+ */
+enum {
+  XE1205_LnaModeA = 0,
+  XE1205_LnaModeB = 1
+};
+
+
+/** 
+ * Radio Transition times.
+ * See Table 4 of the XE1205 data sheet.
+ */
+enum xe1205_transition_time_enums {
+  XE1205_Standby_to_RX_Time = 700,   // RX wakeup time (us), with quartz oscillator enabled
+  XE1205_TX_to_RX_Time = 500,    // RX wakeup time (us), with freq. synthesizer enabled
+  XE1205_Standby_to_TX_Time = 250,   // TX wakeup time (us), with quartz oscillator enabled
+  XE1205_RX_to_TX_Time = 100,    // TX wakeup time (us), with freq. synthesizer enabled
+  XE1205_FS_Wakeup_Time = 200,    // Frequency synthesizer wakeup time 
+  XE1205_Sleep_to_Standby_Time = 1000    // Quartz oscillator wakeup time ( xxx 7ms for 3rd overtone????)
+};
+
+// xxx merge into above enum but check
+enum {
+  XE1205_Sleep_to_RX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_RX_Time, 
+  XE1205_Sleep_to_TX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_TX_Time
+};
+
+
+#endif /* _XE1205CONST_H */
+
diff --git a/tos/chips/xe1205/XE1205ActiveMessageC.nc b/tos/chips/xe1205/XE1205ActiveMessageC.nc
new file mode 100644
index 00000000..3f2c7686
--- /dev/null
+++ b/tos/chips/xe1205/XE1205ActiveMessageC.nc
@@ -0,0 +1,73 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+configuration XE1205ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components XE1205SendReceiveC;
+  SplitControl           = XE1205SendReceiveC;
+  Packet                 = XE1205SendReceiveC;
+  PacketAcknowledgements = XE1205SendReceiveC;
+
+
+  components XE1205ActiveMessageP;
+  XE1205ActiveMessageP.Packet     -> XE1205SendReceiveC;
+  XE1205ActiveMessageP.SubSend    -> XE1205SendReceiveC.Send;
+  XE1205ActiveMessageP.SubReceive -> XE1205SendReceiveC.Receive;
+
+  AMPacket = XE1205ActiveMessageP;
+  AMSend   = XE1205ActiveMessageP;
+  Receive  = XE1205ActiveMessageP.Receive;
+  Snoop  = XE1205ActiveMessageP.Snoop;
+
+
+  components ActiveMessageAddressC;  
+  XE1205ActiveMessageP.amAddress -> ActiveMessageAddressC;  
+
+
+  components XE1205IrqConfC, XE1205PatternConfC, XE1205PhyRssiConfC;
+
+}
diff --git a/tos/chips/xe1205/XE1205ActiveMessageP.nc b/tos/chips/xe1205/XE1205ActiveMessageP.nc
new file mode 100644
index 00000000..62bf0be3
--- /dev/null
+++ b/tos/chips/xe1205/XE1205ActiveMessageP.nc
@@ -0,0 +1,148 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+module XE1205ActiveMessageP {
+    uses interface Packet;
+    uses interface Send as SubSend;
+    uses interface Receive as SubReceive;
+    uses command am_addr_t amAddress();
+
+    provides interface AMSend[am_id_t id];
+    provides interface AMPacket;
+    provides interface Receive[am_id_t id];
+    provides interface Receive as Snoop[am_id_t id];
+}
+implementation {
+  // xxx - this is replicated in ActiveMessageP.
+  // put in XE1205.h?
+  xe1205_header_t* getHeader( message_t* msg ) {
+    return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* msg, am_addr_t addr) {
+    xe1205_header_t* header = getHeader(msg);
+    header->addr = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* msg) {
+    return (call AMPacket.destination(msg) == call AMPacket.address() ||
+	    call AMPacket.destination(msg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* msg, am_id_t type) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = type;
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr, 
+					  message_t* msg, 
+					  uint8_t len) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = id;
+    header->addr = addr;
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) __attribute__ ((noinline)) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+}
+
diff --git a/tos/chips/xe1205/XE1205Fifo.nc b/tos/chips/xe1205/XE1205Fifo.nc
new file mode 100644
index 00000000..9aef8b9a
--- /dev/null
+++ b/tos/chips/xe1205/XE1205Fifo.nc
@@ -0,0 +1,81 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for access to the XE1205 radio Fifo. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+interface XE1205Fifo {
+
+  /**
+   * Write a sequence of data bytes to the output FIFO.
+   * Care must be taken not to overflow the FIFO (16 bytes).
+   * If call returns SUCCESS, writeDone will be signalled upon completion.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes written.
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t write(uint8_t* data, uint8_t length);
+
+  /**
+   * Signals the completion of the previous write operation.
+   *
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void writeDone(error_t error);
+
+  /**
+   * Read a sequence of data bytes from the input FIFO.
+   * The FIFO level is not checked, and care must be taken not to underflow
+   * the FIFO (16 bytes).
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t read(uint8_t* data, uint8_t length);
+
+
+
+  /**
+   * Signals the completion of the previous write operation.
+   *
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void readDone(error_t error );
+}
diff --git a/tos/chips/xe1205/XE1205PacketC.nc b/tos/chips/xe1205/XE1205PacketC.nc
new file mode 100644
index 00000000..5f8c516d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205PacketC.nc
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+#include "message.h"
+
+configuration XE1205PacketC {
+  provides interface AMPacket;
+  provides interface Packet;
+}
+
+implementation {
+
+  components XE1205PacketP;
+  AMPacket = XE1205PacketP;
+  Packet = XE1205PacketP;
+
+  components ActiveMessageAddressC;
+  XE1205PacketP.amAddress -> ActiveMessageAddressC;  
+}
diff --git a/tos/chips/xe1205/XE1205SendReceiveC.nc b/tos/chips/xe1205/XE1205SendReceiveC.nc
new file mode 100644
index 00000000..ed6cd3ee
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SendReceiveC.nc
@@ -0,0 +1,57 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+configuration XE1205SendReceiveC {
+    provides interface Send;
+    provides interface Packet;
+    provides interface PacketAcknowledgements;
+    provides interface SplitControl;
+    provides interface Receive;
+}
+implementation {
+
+  components XE1205SendReceiveP;
+  Send = XE1205SendReceiveP;
+  Receive = XE1205SendReceiveP;
+  Packet = XE1205SendReceiveP;
+  PacketAcknowledgements = XE1205SendReceiveP;
+
+  components XE1205PhyC;
+  XE1205SendReceiveP.XE1205PhyRxTx -> XE1205PhyC;
+  SplitControl = XE1205PhyC;
+}
+
diff --git a/tos/chips/xe1205/XE1205SendReceiveP.nc b/tos/chips/xe1205/XE1205SendReceiveP.nc
new file mode 100644
index 00000000..978c4b8b
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SendReceiveP.nc
@@ -0,0 +1,297 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+module XE1205SendReceiveP {
+    provides interface Send;
+    provides interface Packet;
+    provides interface PacketAcknowledgements;
+    provides interface Receive;
+    uses interface XE1205PhyRxTx;
+}
+implementation {
+
+  #include "crc.h"
+  #include "xe1205debug.h"
+
+#define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+
+  // Phy header definition. This is not seen by anything above us.
+  typedef nx_struct xe1205_phy_header_t {
+    nx_uint8_t whitening;
+    nx_uint8_t length;
+  } xe1205_phy_header_t;
+  
+  xe1205_phy_header_t txPhyHdr;
+  norace xe1205_phy_header_t rxPhyHdr; // we don't accept an incoming packet until previous one has been copied into local buf
+
+  norace message_t *txMsgPtr=NULL;   // message under transmission (non-null until after sendDone).
+  norace char txBuf[16];             // buffer used to pass outgoing bytes to Phy
+
+  norace uint8_t *rxBufPtr=NULL;     // pointer to raw frame received from Phy
+  message_t rxMsg;                   // for rx path buffer swapping with upper modules
+  message_t *rxMsgPtr=&rxMsg; 
+
+  norace uint8_t txIndex, txLen;     // State for packet transmissions
+  norace uint16_t txRunningCRC;      // Crc for outgoing pkts is computed incrementally
+
+  norace uint8_t txWhiteByte;
+
+
+
+
+  uint8_t const pktPreamble[] = {
+    0x55, 0x55, 0x55,
+    (data_pattern >> 16) & 0xff, (data_pattern >> 8) & 0xff, data_pattern & 0xff
+  };
+
+
+  xe1205_header_t* getHeader( message_t* msg ) {
+    return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+  }
+
+  xe1205_footer_t* getFooter(message_t* msg) {
+    return (xe1205_footer_t*)(msg->footer);
+  }
+  
+  xe1205_metadata_t* getMetadata(message_t* msg) {
+    return (xe1205_metadata_t*)((uint8_t*)msg->footer + sizeof(xe1205_footer_t));
+  }
+  
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command void* Receive.getPayload(message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength(message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+
+  command error_t Send.cancel(message_t* msg) {
+    /* Cancel is unsupported for now. */
+    return FAIL;
+  }
+
+  void checkCrcAndUnwhiten(uint8_t* msg, uint8_t white, uint8_t len) {
+    uint16_t crc = 0;
+    uint8_t i, b;
+    uint8_t* uwPtr = (uint8_t*) getHeader(rxMsgPtr);
+    for(i = 0; i < sizeof(xe1205_header_t) + len; i++) {
+      b = msg[i] ^ white;
+      uwPtr[i] = b;
+      crc = crcByte(crc, b);
+    }
+    getFooter(rxMsgPtr)->crc = (crc == (msg[i] | (msg[i+1] << 8)));
+  }
+
+  void updateCRCAndWhiten(char* src, char* dst, uint8_t len)
+  {
+    uint8_t i;
+    for(i=0; i < len; i++) {
+      txRunningCRC = crcByte(txRunningCRC, src[i]); 
+      dst[i] = src[i] ^ txWhiteByte;
+    }
+  }
+
+
+  command error_t Send.send(message_t* msg, uint8_t len) {
+    error_t err;
+
+    if (txMsgPtr) return EBUSY;
+    if (call XE1205PhyRxTx.busy()) return EBUSY;
+
+    txWhiteByte++;
+    txPhyHdr.whitening = txWhiteByte;
+    txPhyHdr.length = len;
+    txRunningCRC=0;
+    getMetadata(msg)->length = len; 
+
+    txIndex = min(sizeof(xe1205_header_t) + len + sizeof(xe1205_footer_t), 
+	    sizeof(txBuf) - sizeof(pktPreamble) - sizeof(xe1205_phy_header_t));
+    txLen = len + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t);
+    if (txIndex == txLen - 1) txIndex--; // don't send a single last byte
+
+    memcpy(txBuf, pktPreamble, sizeof(pktPreamble));
+    memcpy(txBuf + sizeof(pktPreamble), &txPhyHdr, sizeof(txPhyHdr));
+    
+    if (txIndex == txLen) {    // slap on CRC if we're already at end of packet
+      updateCRCAndWhiten((char*) getHeader(msg), 
+			 txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t),
+			 sizeof(xe1205_header_t) + len); 
+      txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 2] = txRunningCRC & 0xff; 
+      txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 1] = txRunningCRC >> 8; 
+    } else {
+      updateCRCAndWhiten((char*) getHeader(msg), 
+			 txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t),
+			 txIndex);
+    }
+    
+    
+    txMsgPtr = msg;
+
+    // note that the continue send can come in before this instruction returns .
+    err = call XE1205PhyRxTx.sendFrame(txBuf, txIndex + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t));
+    if (err != SUCCESS) txMsgPtr = NULL; 
+    
+    return err;
+  }
+
+
+  task void sendDoneTask() {
+    signal Send.sendDone(txMsgPtr, SUCCESS);
+    txMsgPtr = NULL;
+  }
+
+ 
+
+  async event char* XE1205PhyRxTx.continueSend(uint8_t* len) __attribute__ ((noinline))
+  {
+    uint8_t curIndex = txIndex;
+    uint8_t l = min(txLen - txIndex, sizeof(txBuf));
+    if (txIndex + l == txLen - 1) l--; // don't send a single last byte
+
+    *len = l;
+    if (!l) return NULL;
+
+    txIndex += l;
+
+    // if we're at end of packet, slap on CRC
+    if (txIndex == txLen) {
+      updateCRCAndWhiten(&((char*) (getHeader(txMsgPtr)))[curIndex], txBuf, l - 2);
+      txBuf[l - 2] = txRunningCRC & 0xff; 
+      txBuf[l - 1] = txRunningCRC >> 8; 
+    } else {
+      updateCRCAndWhiten(((char*) getHeader(txMsgPtr)) + curIndex, txBuf, l);
+    }
+    
+
+    return txBuf;
+  }
+
+
+  uint8_t sendDones = 0;
+  async event void XE1205PhyRxTx.sendFrameDone() __attribute__ ((noinline)) {
+    sendDones++;
+    if (post sendDoneTask() != SUCCESS)
+      xe1205check(2, FAIL);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    memset(msg, 0, sizeof(message_t));
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return getMetadata(msg)->length;
+  }
+ 
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getMetadata(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    if (len != NULL) {
+      *len = getMetadata(msg)->length;
+    }
+    return (void*)msg->data;
+  }
+
+  async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+    xe1205_metadata_t* md = getMetadata(msg); // xxx this should move to header or footer, leaving it here for now for 1.x compat
+    md->ack = 1;                              
+    return SUCCESS;
+  }
+
+  async command error_t PacketAcknowledgements.noAck(message_t* msg) {
+    xe1205_metadata_t* md = getMetadata(msg);
+    md->ack = 1;
+    return SUCCESS;
+  }
+
+  async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+    xe1205_metadata_t* md = getMetadata(msg);
+    return md->ack;
+  }
+
+  default event void Send.sendDone(message_t* msg, error_t error) { }
+
+  async event uint8_t XE1205PhyRxTx.rxFrameBegin(char* data, uint8_t len)  __attribute__ ((noinline)) {
+
+    uint8_t datalen;
+
+    memcpy(&rxPhyHdr, data, sizeof(xe1205_phy_header_t));
+    datalen = rxPhyHdr.length;
+    if (datalen > TOSH_DATA_LENGTH || rxBufPtr) return len;
+    
+    return datalen + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t) + sizeof(xe1205_phy_header_t);
+  }
+
+  task void signalPacketReceived()   __attribute__ ((noinline)) {
+
+    checkCrcAndUnwhiten(rxBufPtr, rxPhyHdr.whitening, rxPhyHdr.length);
+    if (!getFooter(rxMsgPtr)->crc) {
+      atomic rxBufPtr = NULL;
+      return;
+    }
+    getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length;
+
+    atomic rxBufPtr = NULL;
+    rxMsgPtr =  signal Receive.receive(rxMsgPtr, rxMsgPtr->data, getMetadata(rxMsgPtr)->length);
+  }
+
+
+  uint32_t nrxmsgs;
+  async event void XE1205PhyRxTx.rxFrameEnd(char* data, uint8_t len, error_t status)   __attribute__ ((noinline)) {
+    if (status != SUCCESS) return;
+    //    nrxmsgs++;
+    if (rxBufPtr) return; // this could happen whenever rxFrameBegin was called with rxBufPtr still active
+    rxBufPtr = (data + sizeof(xe1205_phy_header_t));
+    xe1205check(1, post signalPacketReceived());
+  }
+
+}
+
diff --git a/tos/chips/xe1205/XE1205SpiC.nc b/tos/chips/xe1205/XE1205SpiC.nc
new file mode 100644
index 00000000..e8d70d5b
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiC.nc
@@ -0,0 +1,111 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of basic SPI primitives for the Semtech/Xemics XE1205 radio.
+ *
+ * @author Jonathan Hui 
+ * @author Henri Dubois-Ferriere
+ * @version $Revision$ $Date$
+ */
+
+#include "XE1205.h"
+
+generic configuration XE1205SpiC() {
+
+  provides interface Resource;
+
+  // registers
+  provides interface XE1205Register as MCParam0;
+  provides interface XE1205Register as MCParam1;
+  provides interface XE1205Register as MCParam2;
+  provides interface XE1205Register as MCParam3;
+  provides interface XE1205Register as MCParam4;
+  provides interface XE1205Register as IrqParam5;
+  provides interface XE1205Register as IrqParam6;
+  provides interface XE1205Register as TXParam7;
+  provides interface XE1205Register as RXParam8;
+  provides interface XE1205Register as RXParam9;
+  provides interface XE1205Register as RXParam10;
+  provides interface XE1205Register as RXParam11;
+  provides interface XE1205Register as RXParam12;
+  provides interface XE1205Register as Pattern13;
+  provides interface XE1205Register as Pattern14;
+  provides interface XE1205Register as Pattern15;
+  provides interface XE1205Register as Pattern16;
+  provides interface XE1205Register as OscParam17;
+  provides interface XE1205Register as OscParam18;
+  provides interface XE1205Register as TParam19;
+  provides interface XE1205Register as TParam21;
+  provides interface XE1205Register as TParam22;
+
+  // fifos
+  provides interface XE1205Fifo;
+
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( "XE1205Spi.Resource" ),
+  };
+
+  components XE1205SpiP as Spi;
+  
+  Resource = Spi.Resource[ CLIENT_ID ];
+
+  // registers
+  MCParam0   = Spi.Reg[ MCParam_0 ];
+  MCParam1   = Spi.Reg[ MCParam_1 ];
+  MCParam2   = Spi.Reg[ MCParam_2 ];
+  MCParam3   = Spi.Reg[ MCParam_3 ];
+  MCParam4   = Spi.Reg[ MCParam_4 ];
+  IrqParam5  = Spi.Reg[ IrqParam_5 ];
+  IrqParam6  = Spi.Reg[ IrqParam_6 ];
+  TXParam7   = Spi.Reg[ TXParam_7 ];
+  RXParam8   = Spi.Reg[ RXParam_8 ];
+  RXParam9   = Spi.Reg[ RXParam_9 ];
+  RXParam10  = Spi.Reg[ RXParam_10 ];
+  RXParam11  = Spi.Reg[ RXParam_11 ];
+  RXParam12  = Spi.Reg[ RXParam_12 ];
+  Pattern13  = Spi.Reg[ Pattern_13 ];
+  Pattern14  = Spi.Reg[ Pattern_14 ];
+  Pattern15  = Spi.Reg[ Pattern_15 ];
+  Pattern16  = Spi.Reg[ Pattern_16 ];
+  OscParam17 = Spi.Reg[ OscParam_17 ];
+  OscParam18 = Spi.Reg[ OscParam_18 ];
+  TParam19   = Spi.Reg[ TParam_19 ];
+  TParam21   = Spi.Reg[ TParam_21 ];
+  TParam22   = Spi.Reg[ TParam_22 ];
+
+  XE1205Fifo = Spi.Fifo;
+}
+
diff --git a/tos/chips/xe1205/XE1205SpiImplP.nc b/tos/chips/xe1205/XE1205SpiImplP.nc
new file mode 100644
index 00000000..b9fbe5b8
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiImplP.nc
@@ -0,0 +1,267 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @author Henri Dubois-Ferriere
+ * @version $Revision$ $Date$
+ */
+
+module XE1205SpiImplP {
+
+  provides interface XE1205Fifo as Fifo @atmostonce();
+  provides interface XE1205Register as Reg[uint8_t id];
+
+  provides interface Init @atleastonce();
+
+  provides interface Resource[ uint8_t id ];
+
+  uses interface Resource as SpiResource;
+  uses interface GeneralIO as NssDataPin;
+  uses interface GeneralIO as NssConfigPin;
+  uses interface SpiByte;
+  uses interface SpiPacket;
+}
+
+implementation {
+
+#include "xe1205debug.h"
+
+  enum {
+    RESOURCE_COUNT = uniqueCount( "XE1205Spi.Resource" ),
+    NO_HOLDER = 0xff,
+  };
+
+
+  bool m_resource_busy = FALSE;
+  uint8_t m_requests = 0;
+  uint8_t m_holder = NO_HOLDER;
+
+  command error_t Init.init() {
+    call NssDataPin.makeOutput();
+    call NssConfigPin.makeOutput();
+    call NssDataPin.set();
+    call NssConfigPin.set();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    atomic {
+      if ( m_resource_busy )
+	m_requests |= 1 << id;
+      else {
+	m_holder = id;
+	m_resource_busy = TRUE;
+	call SpiResource.request();
+      }
+    }
+    return SUCCESS;
+  }
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t error;
+    atomic {
+      if ( m_resource_busy )
+	return EBUSY;
+      error = call SpiResource.immediateRequest();
+      if ( error == SUCCESS ) {
+	m_holder = id;
+	m_resource_busy = TRUE;
+      }
+      xe1205check(9, error);
+    }
+    return error;
+  }
+
+  async command void Resource.release[ uint8_t id ]() {
+    uint8_t i;
+    atomic {
+      if ( m_holder != id ) {
+	xe1205check(11, 1);
+	return;
+      }
+
+      m_holder = NO_HOLDER;
+      call SpiResource.release();
+      if ( !m_requests ) {
+	m_resource_busy = FALSE;
+      }
+      else {
+	for ( i = m_holder + 1; ; i++ ) {
+	  if ( i >= RESOURCE_COUNT )
+	    i = 0;
+	  if ( m_requests & ( 1 << i ) ) {
+	    m_holder = i;
+	    m_requests &= ~( 1 << i );
+	    call SpiResource.request();
+	    return;
+	  }
+	}
+      }
+    }
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    atomic return (m_holder == id);
+  }
+
+  event void SpiResource.granted() {
+    uint8_t holder;
+    atomic holder = m_holder;
+    signal Resource.granted[ holder ]();
+  }
+
+
+  default event void Resource.granted[ uint8_t id ]() {
+  }
+
+  async command error_t Fifo.write(uint8_t* data, uint8_t length) {
+    error_t status;
+
+#if 1
+    if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+      xe1205check(8, 1);
+#endif
+
+    call NssDataPin.clr();
+    call NssConfigPin.set();
+    status = call SpiPacket.send(data, NULL, length);
+
+    if (status != SUCCESS) {
+      xe1205check(1, status);
+      call NssDataPin.set();
+      return status;
+    }
+    return SUCCESS;
+  }
+
+  async event void SpiPacket.sendDone(uint8_t* tx_buf, uint8_t* rx_buf, 
+				      uint16_t len, error_t error) 
+  {
+    
+    xe1205check(2, error);
+#if 1
+    if (call NssConfigPin.get() != TRUE) xe1205check(4, 1);
+    if (call NssDataPin.get() != FALSE) xe1205check(12, 1);
+#endif
+    call NssDataPin.set();
+    if (tx_buf)
+      signal Fifo.writeDone(error);
+    else
+      signal Fifo.readDone(error);
+  }
+
+  async command error_t Fifo.read(uint8_t* data, uint8_t length) {
+    error_t status;
+
+#if 1
+    if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+      xe1205check(5, 1);
+#endif
+
+    call NssDataPin.clr();
+
+    status = call SpiPacket.send(NULL, data, length);
+    if (status != SUCCESS) {
+      xe1205check(3, status);
+      call NssDataPin.set();
+      return status;
+    }
+    return SUCCESS;
+  }
+
+  async command void Reg.read[uint8_t addr](uint8_t* data) 
+  {
+    error_t status;
+
+#if 1
+    if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+      xe1205check(6, 1);
+#endif
+
+    call NssDataPin.set();
+    call NssConfigPin.clr();
+    call SpiByte.write(XE1205_READ(addr), &status);
+    call SpiByte.write(0, data);
+    call NssConfigPin.set();
+  }
+
+  async command void Reg.write[uint8_t addr](uint8_t data) 
+  {
+    error_t status;
+
+#if 1
+    if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+      xe1205check(7, 1);
+#endif
+
+    call NssDataPin.set();
+    call NssConfigPin.clr();
+    call SpiByte.write(XE1205_WRITE(addr), &status);
+    call SpiByte.write(data, &status);
+    call NssConfigPin.set();
+  }
+
+  default async event void Fifo.readDone(error_t error) {}
+  default async event void Fifo.writeDone(error_t error) {}
+}
diff --git a/tos/chips/xe1205/XE1205SpiP.nc b/tos/chips/xe1205/XE1205SpiP.nc
new file mode 100644
index 00000000..34fbfa27
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiP.nc
@@ -0,0 +1,99 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @author Henri Dubois-Ferriere
+ * @version $Revision$ $Date$
+ */
+
+configuration XE1205SpiP {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface XE1205Fifo as Fifo;
+  provides interface XE1205Register as Reg[ uint8_t id ];
+
+}
+
+implementation {
+
+  components XE1205SpiImplP as SpiP;
+  Resource = SpiP;
+  Fifo = SpiP;
+  Reg = SpiP;
+
+  components new HplXE1205SpiC();
+  SpiP.SpiResource -> HplXE1205SpiC;
+  SpiP.SpiByte -> HplXE1205SpiC;
+  SpiP.SpiPacket -> HplXE1205SpiC;
+
+  components MainC;
+  MainC.SoftwareInit -> SpiP;
+
+  components HplXE1205PinsC;
+  SpiP.NssConfigPin -> HplXE1205PinsC.NssConfigPin;
+  SpiP.NssDataPin -> HplXE1205PinsC.NssDataPin;
+
+  components new Msp430GpioC() as DPin;
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConf.nc b/tos/chips/xe1205/conf/XE1205IrqConf.nc
new file mode 100644
index 00000000..f97f7ffe
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConf.nc
@@ -0,0 +1,106 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for control of interrupt-related  functions
+ * on the XE1205 radio. 
+ *
+ * The current 2.x XE1205 driver is only intended for use of the radio in 
+ * buffered mode - therefore IRQ settings for non-buffered mode are not exposed.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+interface XE1205IrqConf {
+
+#include "XE1205.h"
+
+  /* 
+   * Set IRQ0 sources in Rx mode. 
+   *
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setRxIrq0Source(xe1205_rx_irq0_src_t src);
+
+  /* 
+   * Set IRQ1 sources in Rx mode. 
+   *
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setRxIrq1Source(xe1205_rx_irq1_src_t src);
+
+  /* 
+   * Set IRQ1 source in Tx mode. 
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setTxIrq1Source(xe1205_tx_irq1_src_t src);
+
+
+  /**
+   * Clear FIFO overrun flag.
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t clearFifoOverrun(bool haveResource);
+  
+  /**
+   * Get FIFO overrun flag.
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @param fifooverun will be written with 1 if the FIFO overran, 0 else.
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t getFifoOverrun(bool haveResource, bool* fifooverrun);
+
+  /**
+   * Arm the pattern detector (clear Start_detect flag).
+   *
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t armPatternDetector(bool haveResource);
+  
+  
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConfC.nc b/tos/chips/xe1205/conf/XE1205IrqConfC.nc
new file mode 100644
index 00000000..c8483765
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConfC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205IrqConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205IrqConfC {
+
+  provides interface XE1205IrqConf;
+ 
+}
+
+implementation {
+  
+  components XE1205IrqConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205IrqConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205IrqConfP.SpiResource -> XE1205SpiC;
+  XE1205IrqConfP.IrqParam5 -> XE1205SpiC.IrqParam5;
+  XE1205IrqConfP.IrqParam6 -> XE1205SpiC.IrqParam6;
+
+  XE1205IrqConf = XE1205IrqConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConfP.nc b/tos/chips/xe1205/conf/XE1205IrqConfP.nc
new file mode 100644
index 00000000..c459fa15
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConfP.nc
@@ -0,0 +1,228 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Implementation of XE1205IrqConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+module XE1205IrqConfP {
+
+  provides interface XE1205IrqConf;
+  provides interface Init @atleastonce();
+
+  uses interface XE1205Register as IrqParam5;
+  uses interface XE1205Register as IrqParam6;
+  uses interface Resource as SpiResource;
+}
+implementation {
+
+#include "xe1205debug.h"
+
+
+  // norace is ok because protected by the isOwner() calls
+  norace uint8_t irqparam5; 
+  norace uint8_t irqparam6;
+
+  task void initTask() 
+  {
+    atomic {
+
+      xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+      call IrqParam5.write(0x59); // IRQ0: Write_byte, IRQ1: fifofull, Tx_IRQ: TX_stopped.
+      call IrqParam6.write(0x54); // fill fifo on pattern, clear pattern detect bit, start transmission when fifo not empty
+      // no irq interrupt
+      irqparam5=0x59;
+      irqparam6=0x54;
+      
+      call SpiResource.release();
+    }
+  }
+
+  command error_t Init.init() 
+  {
+    post initTask();
+    return SUCCESS;
+  }
+  
+  event void SpiResource.granted() {  }
+
+
+  /* 
+   * Set IRQ0 sources in Rx mode. 
+   * @param src may be one of: irq_write_byte, irq_nFifoEmpty, or irq_Pattern.
+   */
+  async command error_t XE1205IrqConf.setRxIrq0Source(xe1205_rx_irq0_src_t src) 
+  {
+    error_t status;
+
+    if (src > 3)  return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(2, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(3 << 6);
+    irqparam5 |= (src << 6);
+    call IrqParam5.write(irqparam5);
+
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  /* 
+   * Set IRQ1 sources in Rx mode. 
+   * @param src may be one of: irq_Rssi or irq_FifoFull.
+   */
+  async command error_t XE1205IrqConf.setRxIrq1Source(xe1205_rx_irq1_src_t src) 
+  {
+    error_t status;
+
+    if (src > 2) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(3, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(3 << 4);
+    irqparam5 |= (src << 4);
+    call IrqParam5.write(irqparam5);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+  /* 
+   * Set IRQ1 sources in Tx mode. 
+   * @param src my be one of: irq_FifoFull or irq_TxStopped.
+   */
+  async command error_t XE1205IrqConf.setTxIrq1Source(xe1205_tx_irq1_src_t src) 
+  {
+    error_t status;
+
+    if (src > 1) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(4, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(1 << 3);
+    irqparam5 |= (src << 3);
+    call IrqParam5.write(irqparam5);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  void clearFifoOverrun() {
+    irqparam5 |= 1;
+    call IrqParam5.write(irqparam5);
+  }
+
+  /**
+   * Clear FIFO overrun flag.
+   */
+  async command error_t XE1205IrqConf.clearFifoOverrun(bool haveResource) 
+  {
+    error_t status;
+
+    if (haveResource) {
+      clearFifoOverrun();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      clearFifoOverrun();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+    
+  }
+
+  bool getFifoOverrun() {
+    uint8_t reg;
+    call IrqParam5.read(®);
+    return reg & 1;
+  }
+
+  async command error_t XE1205IrqConf.getFifoOverrun(bool haveResource, bool* fifooverrun) 
+  {
+    error_t status;
+
+    if (haveResource) {
+      *fifooverrun = getFifoOverrun();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      xe1205check(5, status);
+      if (status != SUCCESS) return status;
+      *fifooverrun = getFifoOverrun();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+  }
+  
+  void armPatternDetector() {
+    irqparam6 |= (1 << 6);
+    call IrqParam6.write(irqparam6);  
+  }
+
+  /**
+   * Arm the pattern detector (clear Start_detect flag).
+   */
+  async command error_t XE1205IrqConf.armPatternDetector(bool haveResource)  
+  {
+    error_t status;
+
+    if (haveResource) {
+      armPatternDetector();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      xe1205check(5, status);
+      if (status != SUCCESS) return status;
+      armPatternDetector();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConf.nc b/tos/chips/xe1205/conf/XE1205PatternConf.nc
new file mode 100644
index 00000000..01345136
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConf.nc
@@ -0,0 +1,73 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for preamble detection settings 
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+interface XE1205PatternConf {
+
+  /**
+   * Set the length of the preamble searched by the XE1205 
+   * pattern detection module.
+   *
+   * @param len patten length (1 <= len <= 4)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setDetectLen(uint8_t len);
+
+  /**
+   * Load a preamble pattern into the XE1205 pattern detection module.
+   *
+   * @param pattern pointer to pattern bytes.
+   * @param len pattern length (1 <= len <= 4). Note that this may be larger 
+   * than value set using setPatternLength; in this case the extra bytes 
+   * are programmed into the radio but ignored by the pattern detection stage.
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t loadPattern(uint8_t* pattern, uint8_t len);
+
+  /**
+   * Set the number of bit errors accepted by the XE1205 
+   * pattern detection module.
+   *
+   * @param nerrors max. number of errors accepted (0 <= len <= 3)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setDetectErrorTol(uint8_t nerrors);
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConfC.nc b/tos/chips/xe1205/conf/XE1205PatternConfC.nc
new file mode 100644
index 00000000..5ae4b890
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConfC.nc
@@ -0,0 +1,65 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205PatternConf interface.
+ * 
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205PatternConfC {
+
+  provides interface XE1205PatternConf;
+ 
+}
+
+implementation {
+  
+  components XE1205PatternConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PatternConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205PatternConfP.SpiResource -> XE1205SpiC;
+  XE1205PatternConfP.RXParam10 -> XE1205SpiC.RXParam10;
+  XE1205PatternConfP.Pattern13 -> XE1205SpiC.Pattern13;
+  XE1205PatternConfP.Pattern14 -> XE1205SpiC.Pattern14;
+  XE1205PatternConfP.Pattern15 -> XE1205SpiC.Pattern15;
+  XE1205PatternConfP.Pattern16 -> XE1205SpiC.Pattern16;
+
+
+  XE1205PatternConf = XE1205PatternConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConfP.nc b/tos/chips/xe1205/conf/XE1205PatternConfP.nc
new file mode 100644
index 00000000..5ba8c76c
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConfP.nc
@@ -0,0 +1,151 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205PatternConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+module XE1205PatternConfP {
+
+  provides interface XE1205PatternConf;
+  provides interface Init @atleastonce();
+
+  uses interface Resource as SpiResource;
+  uses interface XE1205Register as RXParam10;
+  uses interface XE1205Register as Pattern13;
+  uses interface XE1205Register as Pattern14;
+  uses interface XE1205Register as Pattern15;
+  uses interface XE1205Register as Pattern16;
+} 
+implementation {
+
+#include "xe1205debug.h"
+
+  task void initTask() {
+    atomic {
+      xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+      call RXParam10.write(0x10 | 2 << 2); // pattern detection enabled, error tolerance=0, pattern length 3
+      call Pattern13.write((data_pattern >> 16) & 0xff);
+      call Pattern14.write((data_pattern >> 8) & 0xff);
+      call Pattern15.write(data_pattern & 0xff);
+      call SpiResource.release();
+    }
+  }
+
+  command error_t Init.init() 
+  {
+    post initTask();
+    return SUCCESS;
+  }
+  
+  event void SpiResource.granted() {  }
+
+  async command error_t XE1205PatternConf.setDetectLen(uint8_t len) 
+  {
+    uint8_t reg;
+    error_t status;
+
+    if (len == 0 || len > 4)  return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(2, status);
+    if (status != SUCCESS) return status;
+
+    call RXParam10.read(®);
+    
+    reg &= ~(3 << 2);
+    reg |= (len << 2);
+    
+    call RXParam10.write(reg);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+    
+  async command error_t XE1205PatternConf.loadPattern(uint8_t* pattern, uint8_t len) 
+  {
+    error_t status;
+
+    if (len == 0 || len > 4) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(3, status);
+    if (status != SUCCESS) return status;
+
+    call Pattern13.write(*pattern++);
+    if (len == 1) goto done;
+
+    call Pattern14.write(*pattern++);
+    if (len == 2) goto done;
+
+    call Pattern15.write(*pattern++);
+    if (len == 3) goto done;
+
+    call Pattern16.write(*pattern);
+
+  done:
+      call SpiResource.release();
+      return SUCCESS;
+
+  }    
+
+
+
+  async command error_t XE1205PatternConf.setDetectErrorTol(uint8_t nerrors) 
+  {
+    uint8_t reg;
+    error_t status;
+
+    if (nerrors > 3) return EINVAL;
+    
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(4, status);
+    if (status != SUCCESS) return status;
+
+    call RXParam10.read(®);
+    
+    reg &= ~(0x03);
+    reg |= nerrors;
+    
+    call RXParam10.write(reg);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyConf.nc b/tos/chips/xe1205/conf/XE1205PhyConf.nc
new file mode 100644
index 00000000..77d6a9eb
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyConf.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for physical parameter settings (bw, bitrate, power) 
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+interface XE1205PhyConf {
+
+#include "XE1205.h"
+
+  /**
+   * Tune the XE1205 to operate on a preset channel.
+   *
+   * @param preset Channel index as defined in XE1205.h
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  command error_t tunePreset(xe1205_channelpreset_t preset);
+
+  /**
+   * Set the output power of the XE1205.
+   *
+   * @param pow Power index as defined in XE1205.h
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  async command error_t setRFPower(xe1205_txpower_t txpow);
+	
+  /**
+   * Set the raw communication bitrate. The frequency deviation and receiver 
+   * filter bandwidth are also set to appropriate values for the bitrate. Advanced users 
+   * can still override the freq. dev and bw values with the individual functions below.
+   *
+   * @param value_ Bitrate  (min 1190 bps, max 152340 bps)
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  command error_t setBitrate(xe1205_bitrate_t bitrate);
+
+  /** 
+   * Get the time (in us) to send/receive a byte at current bit rate.
+   *
+   * @return time (in us).
+   */
+  async command uint16_t getByteTime_us();
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc b/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc
new file mode 100644
index 00000000..1098b9e6
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc
@@ -0,0 +1,69 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205RssiConf and XE1205PhyConf interfaces.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205PhyRssiConfC {
+
+  provides interface XE1205PhyConf;
+  provides interface XE1205RssiConf;
+ 
+}
+
+implementation {
+  
+  components XE1205PhyRssiConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PhyRssiConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205PhyRssiConfP.SpiResource -> XE1205SpiC;
+  XE1205PhyRssiConfP.MCParam0 -> XE1205SpiC.MCParam0;
+  XE1205PhyRssiConfP.MCParam1 -> XE1205SpiC.MCParam1;
+  XE1205PhyRssiConfP.MCParam2 -> XE1205SpiC.MCParam2;
+  XE1205PhyRssiConfP.MCParam3 -> XE1205SpiC.MCParam3;
+  XE1205PhyRssiConfP.MCParam4 -> XE1205SpiC.MCParam4;
+  XE1205PhyRssiConfP.TXParam7 -> XE1205SpiC.TXParam7;
+  XE1205PhyRssiConfP.RXParam8 -> XE1205SpiC.RXParam8;
+  XE1205PhyRssiConfP.RXParam9 -> XE1205SpiC.RXParam9;
+
+  XE1205PhyConf = XE1205PhyRssiConfP;
+  XE1205RssiConf = XE1205PhyRssiConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc b/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc
new file mode 100644
index 00000000..6b48e65d
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc
@@ -0,0 +1,384 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Implementation of XE1205PhyConf and XE1205RssiConf interfaces.
+ * These are implemented jointly because the rssi measure period depends 
+ * on the frequency deviation (which itself depends on bitrate).
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+module XE1205PhyRssiConfP {
+
+  provides interface XE1205PhyConf;
+  provides interface XE1205RssiConf;
+  provides interface Init @atleastonce();
+
+  uses interface Resource as SpiResource;
+  uses interface XE1205Register as MCParam0;
+  uses interface XE1205Register as MCParam1;
+  uses interface XE1205Register as MCParam2;
+  uses interface XE1205Register as MCParam3;
+  uses interface XE1205Register as MCParam4;
+  uses interface XE1205Register as TXParam7;
+  uses interface XE1205Register as RXParam8;
+  uses interface XE1205Register as RXParam9;
+}
+implementation {
+#include "xe1205debug.h"
+
+/* 
+ * Default settings for initial parameters. 
+ */ 
+#ifndef XE1205_BITRATE_DEFAULT
+#define XE1205_BITRATE_DEFAULT  76170
+#endif
+  //xxx/make this computed as a fun of XE1205_BITRATE_DEFAULT
+#ifndef XE1205_FREQDEV_DEFAULT
+#define XE1205_FREQDEV_DEFAULT  100000
+#endif
+
+
+/*
+ * Register calculation helper macros.
+ */
+#define XE1205_FREQ(value_)                     (((value_) * 100) / 50113L)
+#define XE1205_EFFECTIVE_FREQ(value_)           (((int32_t)((int16_t)(value_)) * 50113L) / 100)
+#define XE1205_FREQ_DEV_HI(value_)              ((XE1205_FREQ(value_) >> 8) & 0x01)
+#define XE1205_FREQ_DEV_LO(value_)              (XE1205_FREQ(value_) & 0xff)
+#define XE1205_FREQ_HI(value_)                  ((XE1205_FREQ(value_) >> 8) & 0xff)
+#define XE1205_FREQ_LO(value_)                  (XE1205_FREQ(value_) & 0xff)
+#define XE1205_BIT_RATE(value_)                 ((152340L / (value_) - 1) & 0x7f)
+#define XE1205_EFFECTIVE_BIT_RATE(value_)       (152340L / ((value_) + 1))
+
+
+  /**
+   * Frequency bands.
+   */
+  enum xe1205_freq_bands {
+    XE1205_Band_434 = 434000000,
+    XE1205_Band_869 = 869000000,
+    XE1205_Band_915 = 915000000
+  };
+  
+
+  // this value is the time between rssi measurement updates, plus a buffer time.
+  // we keep it cached for fast access during packet reception
+  uint16_t rssi_period_us; 
+
+  // time to xmit/receive a byte at current bitrate 
+  uint16_t byte_time_us;
+
+  // norace is ok because protected by the isOwner() calls
+  norace uint8_t rxparam9 = 0xff; 
+  norace uint8_t txparam7 = 0xff;
+
+  // returns appropriate baseband filter in khz bw for given bitrate in bits/sec.
+  uint16_t baseband_bw_from_bitrate(uint32_t bitrate) {
+    return (bitrate * 400) /152340;
+  }
+
+
+  // returns appropriate freq. deviation for given bitrate in bits/sec.
+  uint32_t freq_dev_from_bitrate(uint32_t bitrate) {
+    return (bitrate * 6) / 5;
+  }
+
+  // returns xe1205 encoding of baseband bandwidth in appropriate bit positions
+  // for writing into rxparam7 register
+  uint8_t baseband_bw_rxparam7_bits(uint16_t bbw_khz) 
+  {
+    if(bbw_khz <= 10) {
+      return 0x00;
+    } else if(bbw_khz <= 20) {
+      return 0x20;
+    } else if(bbw_khz <= 40) {
+      return 0x40;
+    } else if(bbw_khz <= 200) {
+      return 0x60;
+    } else if(bbw_khz <= 400) {
+      return 0x10;
+    } else return 0x10; 
+  }
+
+  // returns the period (in us) between two successive rssi measurements
+  // (see xemics data sheet 4.2.3.4), as a function of frequency deviation
+  uint16_t rssi_meas_time(uint32_t freqdev_hz) 
+  {
+    if (freqdev_hz > 20000)      // at 152kbps, equiv to 2 byte times, at 76kbps, equiv to 1 byte time, at 38kbps equiv to 4 bits, etc
+      return 100;
+    else if (freqdev_hz > 10000) // at 9.6kbps, equiv to 4 byte times.
+      return 200;           
+    else if (freqdev_hz > 7000)
+      return 300;
+    else if (freqdev_hz > 5000)  // at 4.8kbps, equiv to 4 byte times.
+      return 400;
+    else 
+      return 500;                // at 1200, equiv to 13 byte times.
+  }
+
+  task void initTask() 
+  {
+    atomic {
+      byte_time_us = 8000000 / XE1205_BITRATE_DEFAULT;
+      rssi_period_us = rssi_meas_time(XE1205_FREQDEV_DEFAULT) + 10;
+
+      xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+      call TXParam7.write(0x00); // tx power 0dbm, normal modulation & bitsync, no flitering
+      txparam7=0;
+
+      call MCParam0.write(0x3c | XE1205_FREQ_DEV_HI(XE1205_FREQDEV_DEFAULT)); // buffered mode, transceiver select using SW(0:1), Data output, 868mhz band, 
+      call MCParam1.write(XE1205_FREQ_DEV_LO(XE1205_FREQDEV_DEFAULT));
+      call MCParam2.write(XE1205_BIT_RATE(XE1205_BITRATE_DEFAULT));
+
+      call MCParam3.write(XE1205_FREQ_HI(-2000000)); // 869mhz - 2mhz = 867mhz (preset 0)
+      call MCParam4.write(XE1205_FREQ_LO(-2000000));
+
+
+      call RXParam8.write(baseband_bw_rxparam7_bits(baseband_bw_from_bitrate(XE1205_BITRATE_DEFAULT))
+			  | 0x0a); // calibrate & init baseband filter each time bbw changes
+
+      call RXParam9.write(0x00); // rssi off by default, fei off
+      rxparam9=0;
+
+      call SpiResource.release();
+    }
+  }
+
+  command error_t Init.init() 
+  {
+    post initTask();
+    return SUCCESS;
+  }
+  
+  event void SpiResource.granted() {
+  }
+
+  error_t tuneManual(uint32_t freq) 
+  {
+    uint32_t bandCenter;
+    uint8_t mcp0reg;
+    uint16_t mcp34reg;
+    error_t status;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(2, status);
+    if (status != SUCCESS) return status;
+
+
+    call MCParam0.read(&mcp0reg);
+
+    mcp0reg &= ~0x6;
+
+    if ((freq >= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x8000)))
+       && (freq <= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+      mcp0reg |= (1 << 1);
+      bandCenter = XE1205_Band_434;
+
+    } else if ((freq >= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x8000)))
+	       && (freq <= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+      mcp0reg |= (2 << 1);
+      bandCenter = XE1205_Band_869;
+
+    } else if ((freq >= (XE1205_Band_915+ XE1205_EFFECTIVE_FREQ(0x8000)))
+	       && (freq <= (XE1205_Band_915 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+      mcp0reg |= (3 << 1);
+      bandCenter = XE1205_Band_915;
+
+    } else {
+      call SpiResource.release();
+      return EINVAL;
+    }                       
+
+
+    mcp34reg = XE1205_FREQ(freq - bandCenter);
+
+    call MCParam0.write(mcp0reg);
+    call MCParam3.write(mcp34reg >> 8);
+    call MCParam4.write(mcp34reg & 0xff);
+
+    call SpiResource.release();
+
+    return SUCCESS;
+  }
+
+
+  command error_t XE1205PhyConf.tunePreset(xe1205_channelpreset_t preset) 
+  {
+    switch(preset) {
+    case xe1205_channelpreset_867mhz:
+      return tuneManual(867000000);
+
+    case xe1205_channelpreset_868mhz:
+      return tuneManual(868000000);
+
+    case xe1205_channelpreset_869mhz:
+      return tuneManual(869000000);
+
+    default:
+      return FAIL;
+    }
+  }
+
+  async command error_t XE1205PhyConf.setRFPower(xe1205_txpower_t txpow)
+  {
+    error_t status;
+
+    if (txpow > xe1205_txpower_15dbm)
+      return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(3, status);
+    if (status != SUCCESS) return status;
+
+    txparam7 &= ~(3 << 6);
+    txparam7 |= (txpow << 6);
+    call TXParam7.write(txparam7);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  
+
+  command error_t XE1205PhyConf.setBitrate(xe1205_bitrate_t bitrate) 
+  {
+    uint16_t bbw;
+    uint32_t freqdev;
+    uint8_t rxp8reg, mcp0reg, mcp1reg, mcp2reg;
+    error_t status;
+
+    if (bitrate < xe1205_bitrate_38085 || bitrate > xe1205_bitrate_152340) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(4, status);
+    if (status != SUCCESS) return status;
+
+    // receiver bandwidth
+    call RXParam8.read(&rxp8reg);
+    bbw = baseband_bw_from_bitrate(bitrate);
+    rxp8reg &= ~0x70;
+    rxp8reg |= baseband_bw_rxparam7_bits(bbw);
+
+
+    // frequency deviation
+    freqdev = freq_dev_from_bitrate(bitrate);
+    rssi_period_us = rssi_meas_time(freqdev) + 10;
+
+    call MCParam0.read(&mcp0reg);
+    mcp0reg &= ~0x01;
+    mcp0reg |= XE1205_FREQ_DEV_HI(freqdev);
+
+    mcp1reg = XE1205_FREQ_DEV_LO(freqdev);
+
+    mcp2reg = XE1205_BIT_RATE(bitrate);
+
+    call RXParam8.write(rxp8reg);
+    call MCParam0.write(mcp0reg);
+    call MCParam1.write(mcp1reg);
+    call MCParam2.write(mcp2reg);;
+
+    atomic byte_time_us =   8000000 / bitrate;
+    call SpiResource.release(); 
+    return SUCCESS;
+  }
+
+  async command uint16_t XE1205PhyConf.getByteTime_us() { 
+    return byte_time_us;
+  }
+
+  async command error_t XE1205RssiConf.setRssiMode(bool on) 
+  {
+    error_t status;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(5, status);
+    if (status != SUCCESS) return status;
+
+    if (on) 
+      rxparam9 |= 0x80;
+    else 
+      rxparam9 &= ~0x80;
+    call RXParam9.write(rxparam9);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+  async command uint16_t XE1205RssiConf.getRssiMeasurePeriod_us() {
+    return rssi_period_us;
+  }
+
+  async command error_t XE1205RssiConf.setRssiRange(bool high) 
+  {
+    error_t status;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(6, status);
+    if (status != SUCCESS) return status;
+
+    if (high) 
+      rxparam9 |= 0x40;
+    else 
+      rxparam9 &= ~0x40;
+    call RXParam9.write(rxparam9);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+  async command error_t XE1205RssiConf.getRssi(uint8_t* rssi) 
+  {
+    error_t status;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(7, status);
+    if (status != SUCCESS) return status;
+
+    call RXParam9.read(rssi);
+    *rssi = (*rssi >> 4) & 0x03;
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205Register.nc b/tos/chips/xe1205/conf/XE1205Register.nc
new file mode 100644
index 00000000..f9ead89d
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205Register.nc
@@ -0,0 +1,67 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for access to registers onthe XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+/**
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+#include "XE1205.h"
+
+
+interface XE1205Register {
+
+  /**
+   * Read a data word from the register.
+   *
+   * @param data pointer to place the register value.
+   * @return status byte from the read.
+   */
+  async command void read(uint8_t* data);
+
+  /**
+   * Write a data word to the register.
+   * 
+   * @param data value to write to register.
+   * @return status byte from the write.
+   */
+  async command void write(uint8_t data);
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205RssiConf.nc b/tos/chips/xe1205/conf/XE1205RssiConf.nc
new file mode 100644
index 00000000..5c60d9ed
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205RssiConf.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for Rssi settings and measurements
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+interface XE1205RssiConf {
+
+  /**
+   * Enable RSSI measurements.
+   *
+   * @param on: 1 to enable, 0 to disable
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setRssiMode(bool on);
+
+  /** 
+   * Return the returns the period (in us) between two successive rssi measurements, 
+   * taking into account the current setting of the frequency deviation.
+   *
+   * @return rssi measure period.
+   */
+  async command uint16_t getRssiMeasurePeriod_us();
+
+  /**
+   * Set RSSI measurement points to low/high values at 
+   * 
+   * @param high: 1 for high range (-95, -90, -85 dBm)
+   *              0 for low range (-110, -105, -100 dBm)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setRssiRange(bool high);
+
+  /** 
+   * Read RSSI value in 2 bits. RSSI block should be enabled before calling this.
+   *
+   * @param rssi Pointer to byte where rssi will be written.
+   * @return SUCCESS if operation done ok, error status otherwise 
+   * (in which case *rssi should not be used).
+   */
+  async command error_t getRssi(uint8_t* rssi);
+}
diff --git a/tos/chips/xe1205/conf/registers.html b/tos/chips/xe1205/conf/registers.html
new file mode 100644
index 00000000..e08e323b
--- /dev/null
+++ b/tos/chips/xe1205/conf/registers.html
@@ -0,0 +1,76 @@
+
+
+XE1205 Registers in TinyOS 2.x driver
+
+
+
+   
+ 
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+ 
+  
+
+
     Register  Initialized Read Written
    MCParam0 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    MCParam1 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    MCParam2 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    MCParam3 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    MCParam4  PhyRssiConfP PhyRssiConfP PhyRssiConfP
    IrqParam5 IrqConfP IrqConfP IrqConfP
    IrqParam6 IrqConfP IrqConfP IrqConfP
    TXParam7 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    RXParam8 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    RXParam9 PhyRssiConfP PhyRssiConfP PhyRssiConfP
    RXParam10 PatternConfP PatternConfP PatternConfP
    RXParam11  -   -   - 
    RXParam12  -   -   - 
    Pattern13  -   -  PatternConfP
    Pattern14  -   -  PatternConfP
    Pattern15  -   -  PatternConfP
    Pattern16  -   -  PatternConfP
    OscParam17  -   -   - 
    OscParam18  -   -   - 
    TParam19  -   -   - 
    TParam21  -   -   - 
    TParam22  -   -   - 
    
+
\ No newline at end of file
diff --git a/tos/chips/xe1205/conf/registers.txt b/tos/chips/xe1205/conf/registers.txt
new file mode 100644
index 00000000..b3fd0500
--- /dev/null
+++ b/tos/chips/xe1205/conf/registers.txt
@@ -0,0 +1,26 @@
+
+Changeable registers:
+
+name         | Addr           | (a)sync  |  r/w(*) | Interface          | init
+--------------------------------------------------------------------------------------------------
+freq_dev     | 0[0], 1[0-7]   |  ?       |  r/w    | XE1205PhyConf      |
+bitrate      | 2[0-6]         |  ?       |  r/w    | XE1205PhyConf      |
+freq_lo      | 3[0-7],4[0-7]  |  ?       |  r/w    | XE1205PhyConf      |
+rx_irq_0     | 5[6-7]         | async    |  w	   | XE1205IrqConf      |
+rx_irq_1     | 5[4-5]         | async    |  w      | XE1205IrqConf      |
+tx_irq_1     | 5[3]           | async    |  w      | XE1205IrqConf      |
+fifooverun   | 5[0]           | async    |  w      | XE1205IrqConf      |
+start_detect | 6[6]           | async    |  w      | XE1205IrqConf      |
+power        | 7[6-7]         |  ?       |  r/w    | XE1205PhyConf      |
+bw           | 8[4-6]         | same as  |  w      | XE1205PhyConf      |
+                              | bitrate  |         |                    |
+rssi         | 9[7]           | async    |  w      | XE1205RssiConf     |
+rssi_range   | 9[6]           | async    |  r/w    | XE1205RssiConf     |
+rssi_out     | 9[4-5]         | async    |  r      | XE1205RssiConf     |
+pattern      | 10[4]          | ?        |  w      | XE1205PatternConf  | *
+pat_size     | 10[2-3]        | async    |  w      | XE1205PatternConf  | 
+pat_tol      | 10[0-1]        | ?        |  w      | XE1205PatternConf  |
+reg_pattern  | 13-16          | async    |  w      | XE1205PatternConf  |
+
+
+(*) (at higher levels, reads my be cached)
diff --git a/tos/chips/xe1205/crc.h b/tos/chips/xe1205/crc.h
new file mode 100644
index 00000000..57044860
--- /dev/null
+++ b/tos/chips/xe1205/crc.h
@@ -0,0 +1,70 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+uint16_t const ccitt_crc16_table[256] = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+uint16_t crcByte(uint16_t fcs, uint8_t c)
+{
+  fcs = ccitt_crc16_table[(fcs >> 8 ^ c) & 0xffU] ^ (fcs << 8);
+  return fcs;
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhyC.nc b/tos/chips/xe1205/phy/XE1205PhyC.nc
new file mode 100644
index 00000000..eebd4e6a
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyC.nc
@@ -0,0 +1,84 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration XE1205PhyC {
+  provides interface XE1205PhyRxTx;
+  provides interface SplitControl;
+}
+implementation {
+
+  components XE1205PhyP;
+
+  components XE1205PhySwitchC;
+  XE1205PhyP.XE1205PhySwitch -> XE1205PhySwitchC;
+
+  components new XE1205SpiC();
+  XE1205PhyP.XE1205Fifo -> XE1205SpiC;
+  XE1205PhyP.SpiResourceRX -> XE1205SpiC;
+
+  components new XE1205SpiC() as SpiTX;
+  XE1205PhyP.SpiResourceTX -> SpiTX;
+
+  components new XE1205SpiC() as SpiConfig;
+  XE1205PhyP.SpiResourceConfig -> SpiConfig;
+
+  components HplXE1205InterruptsC;
+  XE1205PhyP.Interrupt0 -> HplXE1205InterruptsC.Interrupt0;
+  XE1205PhyP.Interrupt1 -> HplXE1205InterruptsC.Interrupt1;
+
+
+  XE1205PhyRxTx = XE1205PhyP;
+  SplitControl = XE1205PhyP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PhyP.Init;
+
+  components XE1205IrqConfC;
+  XE1205PhyP.XE1205IrqConf -> XE1205IrqConfC;
+
+  components new Alarm32khzC();
+  XE1205PhyP.Alarm32khz16 -> Alarm32khzC.Alarm32khz16;
+#if 0
+  components new Msp430GpioC() as DpinM, HplMsp430GeneralIOC;
+  DpinM -> HplMsp430GeneralIOC.Port41;
+  XE1205PhyP.Dpin   -> DpinM;
+#endif
+}
+
+
+
diff --git a/tos/chips/xe1205/phy/XE1205PhyP.nc b/tos/chips/xe1205/phy/XE1205PhyP.nc
new file mode 100644
index 00000000..fc150ab7
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyP.nc
@@ -0,0 +1,411 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+#include "Timer.h"
+
+module XE1205PhyP {
+  provides interface XE1205PhyRxTx;
+
+  provides interface Init @atleastonce();
+  provides interface SplitControl @atleastonce();
+
+  uses interface Resource as SpiResourceTX;
+  uses interface Resource as SpiResourceRX;
+  uses interface Resource as SpiResourceConfig;
+
+  uses interface XE1205PhySwitch;
+  uses interface XE1205IrqConf;
+  uses interface XE1205Fifo;
+
+  uses interface GpioInterrupt as Interrupt0;
+  uses interface GpioInterrupt as Interrupt1;
+
+  uses interface Alarm as Alarm32khz16;
+#if 0
+  uses interface GeneralIO as Dpin;
+#endif
+}
+implementation {
+
+#include "xe1205debug.h"
+
+  char* txBuf = NULL;
+  uint8_t rxFrameIndex = 0;
+  uint8_t rxFrameLen = 0;
+  uint8_t nextTxLen=0;
+  uint8_t nextRxLen;
+  char rxFrame[xe1205_mtu];
+  uint8_t headerLen = 4;
+
+  uint16_t stats_rxOverruns;
+
+  typedef enum {
+    RADIO_LISTEN=0, 
+    RADIO_RX_HEADER=1, 
+    RADIO_RX_PACKET=2, 
+    RADIO_RX_PACKET_LAST=3, 
+    RADIO_TX=4,
+    RADIO_SLEEP=5, 
+    RADIO_STARTING=6
+  } phy_state_t;
+
+  phy_state_t state = RADIO_SLEEP;
+
+  void armPatternDetect();
+
+  command error_t Init.init() 
+  { 
+#if 0
+    call Dpin.makeOutput();
+#endif
+    call XE1205PhySwitch.sleepMode();
+    call XE1205PhySwitch.antennaOff();
+    return SUCCESS;
+  }
+
+  event void SpiResourceTX.granted() {  }
+  event void SpiResourceRX.granted() {  }
+  event void SpiResourceConfig.granted() { 
+    armPatternDetect();
+    call SpiResourceConfig.release();
+    atomic {
+      call Interrupt0.enableRisingEdge();
+      state = RADIO_LISTEN;
+    }
+  }
+
+
+  task void startDone() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  task void stopDone() {
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  command error_t SplitControl.start() 
+  {
+    atomic state = RADIO_STARTING;
+    call XE1205PhySwitch.rxMode();
+    call XE1205PhySwitch.antennaRx();
+    call SpiResourceConfig.request();
+    post startDone();
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() 
+  {
+    call XE1205PhySwitch.sleepMode();
+    call XE1205PhySwitch.antennaOff();
+    atomic state = RADIO_SLEEP;
+    post stopDone();
+    return SUCCESS;
+  }
+
+  default event void SplitControl.startDone(error_t error) { }
+  default event void SplitControl.stopDone(error_t error) { }
+
+  async command bool XE1205PhyRxTx.busy() {
+    atomic return state != RADIO_LISTEN; // xxx need to deal with sleep state
+  }
+
+  void armPatternDetect() 
+  {
+    // small chance of a pattern arriving right after we arm, 
+    // and IRQ0 hasn't been enabled yet, so we would miss the interrupt
+    // xxx maybe this can also be addressed with periodic timer?
+    xe1205check(2, call XE1205IrqConf.armPatternDetector(TRUE));
+    xe1205check(1, call XE1205IrqConf.clearFifoOverrun(TRUE));  
+  }
+
+  async command void XE1205PhyRxTx.setRxHeaderLen(uint8_t l) 
+  {
+    if (l > 8) l = 8;
+    if (!l) return;
+    headerLen = l;
+  }
+
+  async command uint8_t XE1205PhyRxTx.getRxHeaderLen() {
+    return headerLen;
+  }
+
+  void computeNextRxLength() 
+  {
+    uint8_t n = rxFrameLen - rxFrameIndex; 
+    
+    // for timesync and such, we want the end of the packet to coincide with a fifofull event, 
+    // so that we know precisely when last byte was received 
+
+    if (n > 16) {
+      if (n < 32) nextRxLen = n - 16; else nextRxLen = 15;
+    } 
+    else {
+      nextRxLen = n;
+    }
+  }
+
+
+  async command error_t XE1205PhyRxTx.sendFrame(char* data, uint8_t frameLen)  __attribute__ ((noinline)) 
+  {
+    error_t status;
+   
+    if (frameLen < 6) return EINVAL;
+
+    atomic {
+      if (state == RADIO_SLEEP) return EOFF;
+      if (state != RADIO_LISTEN) return EBUSY;
+      if (frameLen == 0 || frameLen > xe1205_mtu + 7) return EINVAL; // 7 = 4 preamble + 3 sync
+      
+      call XE1205PhySwitch.txMode(); // it takes 100us to switch from rx to tx, ie less than one byte at 76kbps
+      call Interrupt0.disable();
+
+      status = call SpiResourceTX.immediateRequest();
+      xe1205check(3, status);
+      if (status != SUCCESS) {
+	call XE1205PhySwitch.rxMode(); 
+	call SpiResourceConfig.request();
+	return status;
+      }
+      call XE1205PhySwitch.antennaTx();
+      state = RADIO_TX;
+    }
+
+    status = call XE1205Fifo.write(data, frameLen);
+    // cannot happen with current SPI implementation (at least with NoDma)
+#if 0
+    if (status != SUCCESS) {
+      xe1205error(8, status);
+      call XE1205PhySwitch.rxMode(); 
+      call XE1205PhySwitch.antennaRx();
+      armPatternDetect();
+      call SpiResourceTX.release();
+      atomic {
+	call Interrupt0.enableRisingEdge();
+	state = RADIO_LISTEN;
+      }
+      return status;
+    }
+#endif
+
+    return SUCCESS;
+  }
+
+
+
+  uint16_t rxByte=0;
+
+  /**
+   * In transmit: nTxFifoEmpty. (ie after the last byte has been *read out of the fifo*)
+   * In receive: write_byte. 
+   */
+  async event void Interrupt0.fired()  __attribute__ ((noinline)) 
+  { 
+    error_t status;
+
+    switch (state) {
+
+    case RADIO_LISTEN:
+      rxByte=1;
+      state = RADIO_RX_HEADER;
+      status = call SpiResourceRX.immediateRequest();
+      xe1205check(4, status);
+      if (status != SUCCESS) {
+	state = RADIO_LISTEN;
+	call Interrupt0.disable(); // because pattern detector won't be rearmed right away
+	call SpiResourceConfig.request();
+	return;
+      }
+      return;
+
+    case RADIO_RX_HEADER:
+      rxByte++;
+      if (rxByte == 2) {
+	call Alarm32khz16.start(3000);
+      }
+
+      if (rxByte == headerLen + 1) {
+	call Interrupt0.disable();
+	xe1205check(8, call XE1205Fifo.read(rxFrame, headerLen));
+	call Interrupt1.enableRisingEdge();
+      }
+      return;
+
+    case RADIO_TX:
+
+      call Interrupt0.disable(); // avoid spurious IRQ0s from nTxFifoEmpty rebounding briefly after first byte is written.
+                                 // note that we should really wait till writedone() to re-enable either interrupt.
+      xe1205check(5, call XE1205Fifo.write(txBuf, nextTxLen));
+      return;
+
+    default:
+      return;
+    }
+  }
+
+  bool reading=FALSE;
+
+
+  /**
+   * In transmit: TxStopped. (ie after the last byte has been *sent*)
+   * In receive: Fifofull.
+   */
+  async event void Interrupt1.fired()  __attribute__ ((noinline)) 
+  { 
+    switch (state) {
+
+    case RADIO_RX_PACKET:
+      reading = TRUE;
+      xe1205check(9, call XE1205Fifo.read(&rxFrame[rxFrameIndex], nextRxLen));
+      call Interrupt1.disable(); // in case it briefly goes back to full just after we read first byte
+      rxFrameIndex += nextRxLen;
+      computeNextRxLength();
+      
+      if (nextRxLen==0) {
+	state = RADIO_RX_PACKET_LAST;
+      }
+
+      return;
+
+    case RADIO_RX_HEADER: // somehow the FIFO has filled before we finished reading the header bytes
+      call Interrupt1.disable();
+      call Alarm32khz16.stop();
+      signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+      armPatternDetect();
+      call SpiResourceRX.release();
+      atomic {
+	call Interrupt0.enableRisingEdge();
+	state = RADIO_LISTEN;
+      }
+      return;
+
+    case RADIO_TX:
+
+      call Interrupt1.disable();
+      call XE1205PhySwitch.rxMode(); 
+      call XE1205PhySwitch.antennaRx();
+      signal XE1205PhyRxTx.sendFrameDone();
+      armPatternDetect();
+      call SpiResourceTX.release();
+      atomic {
+	call Interrupt0.enableRisingEdge();
+	state = RADIO_LISTEN;
+      }
+      return;
+
+    default:
+      return;
+    }
+  }
+
+  async event void XE1205Fifo.readDone(error_t error) {
+    xe1205check(6, error);
+    switch(state) {
+    case RADIO_RX_HEADER:
+      rxFrameLen = signal XE1205PhyRxTx.rxFrameBegin(rxFrame, headerLen);
+      if (rxFrameLen <= headerLen) {
+	call Interrupt1.disable();
+	call Alarm32khz16.stop();
+	signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+	armPatternDetect();
+	call SpiResourceRX.release();
+	atomic {
+	  call Interrupt0.enableRisingEdge();
+	  state = RADIO_LISTEN;
+	}
+	return;
+      }
+
+      rxFrameIndex = headerLen;
+      computeNextRxLength();
+      state = RADIO_RX_PACKET;
+      return;
+
+    case RADIO_RX_PACKET_LAST:
+      call Alarm32khz16.stop();
+      signal XE1205PhyRxTx.rxFrameEnd(rxFrame, rxFrameLen + headerLen, SUCCESS);
+      armPatternDetect(); 
+      call SpiResourceRX.release();
+      atomic {
+	call Interrupt0.enableRisingEdge();
+	state = RADIO_LISTEN;
+      }
+      return;
+
+    case RADIO_RX_PACKET:
+      reading = FALSE;
+      call Interrupt1.enableRisingEdge();
+      return;
+
+    default:
+      xe1205check(10, FAIL);
+      return;
+    }
+  }
+
+  async event void XE1205Fifo.writeDone(error_t error)  __attribute__ ((noinline)) { 
+    xe1205check(7, error);
+    switch(state) {
+    case RADIO_TX:
+      txBuf = signal XE1205PhyRxTx.continueSend(&nextTxLen);
+      if (nextTxLen) {
+	call Interrupt0.enableFallingEdge();
+      } else {
+	call Interrupt0.disable();
+	call Interrupt1.enableRisingEdge();
+      }
+      return;
+    default:
+      xe1205check(11, FAIL);
+    }
+  }
+
+  async event void Alarm32khz16.fired() {
+    stats_rxOverruns++;
+    signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+    armPatternDetect(); 
+    call SpiResourceRX.release();
+    atomic {
+      call Interrupt0.enableRisingEdge();
+      state = RADIO_LISTEN;
+    }
+  }
+
+}
+
+
+
diff --git a/tos/chips/xe1205/phy/XE1205PhyRxTx.nc b/tos/chips/xe1205/phy/XE1205PhyRxTx.nc
new file mode 100644
index 00000000..2b4c1ca6
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyRxTx.nc
@@ -0,0 +1,125 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+interface XE1205PhyRxTx {
+
+  /**
+   * Send a buffer. This call will be followed up with continueSend() events 
+   * (see below) until the client module indicates that there is nothing left to send.
+   *
+   * @param data a pointer to an array of bytes to send
+   * @param len length of the array (6 <= len <= 16)
+   * @return error SUCCESS if the operation initiated successfully, otherwise EOFF, EBUSY, EINVAL, or FAIL.
+   *
+   */
+  async command error_t sendFrame(char* data, uint8_t len);
+
+  /** 
+   * Signalled by the Phy layer to fetch more bytes to send. 
+   *
+   * @param len pointer to length field indicating number of bytes in next send. If 0, nothing more to send.
+   * @return pointer to bytes to be sent. If NULL, nothing more to send.
+   * 
+   */
+  async event char* continueSend(uint8_t* len);
+
+  /**
+   * Signalled after the last buffer has been sent, where the 'last buffer' is the one following which
+   * the client module returned NULL to continueSendBuf().
+   *
+   */
+  async event void sendFrameDone();
+
+
+  /**
+   * Receive a frame header. This is called when 'len' bytes have been received after 
+   * detecting a preamble, where 'len' is the value set by calling setRxHeaderLen.
+   * 
+   * The client should return the total number to read in this frame (which can be 
+   * equal to len, for example if this frame is a short ack code). 
+   *
+   * @param data pointer to frame header
+   * @param len length of frame header 
+   * @return total number of bytes in this frame (including header bytes). 
+   *
+   */
+  async event uint8_t rxFrameBegin(char* data, uint8_t len);
+
+
+  /**
+   * Signalled at end of a frame reception.
+   *
+   * @param data pointer to frame (at first byte of header)
+   * @param len length of frame 
+   * @param status SUCCESS if packet received ok, ERROR if packet reception was aborted.
+   *
+   */
+  async event void rxFrameEnd(char* data, uint8_t len, error_t status);
+
+
+  /** 
+   * Set header size, ie number of bytes at start of packet to be read and passed along 
+   * with the rxFrameBegin() event.
+   *
+   * @param len length of header, 2 <= len <= 8
+   *
+   */
+  async command void setRxHeaderLen(uint8_t len);
+
+  /**
+   * Get the current header size.
+   *
+   * @return header size
+   *
+   */
+  async command uint8_t getRxHeaderLen();
+
+
+  /** 
+   * Check busy/idle state of phy.
+   *
+   * @return TRUE if phy is sending or receiving a packet, FALSE otherwise.
+   *
+   */
+  async command bool busy();
+
+
+
+
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitch.nc b/tos/chips/xe1205/phy/XE1205PhySwitch.nc
new file mode 100644
index 00000000..aba85e72
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitch.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Interface for phy mode switches on XE1205 radio.
+ *
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+interface XE1205PhySwitch {
+
+  /**
+   * Power down the XE1205.
+   */
+  async command void sleepMode();
+
+  /**
+   * Set the XE1205 to standby mode, i.e. oscillator running but everything else disabled.
+   */
+  async command void standbyMode();
+  /**
+   * Set the XE1205 to receive mode.
+   */
+  async command void rxMode();
+
+  /**
+   * Set the XE1205 to transmit mode.
+   */
+  async command void txMode();
+
+  /**
+   * Disconnect the antenna from both receiver and transmitter.
+   */
+  async command void antennaOff();
+
+  /**
+   * Connect the antenna to the receiver.
+   */
+  async command void antennaRx();
+        
+  /**
+   * Connect the antenna to the transmitter.
+   */
+  async command void antennaTx();
+
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitchC.nc b/tos/chips/xe1205/phy/XE1205PhySwitchC.nc
new file mode 100644
index 00000000..f4a5d71a
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitchC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+configuration XE1205PhySwitchC {
+  
+  provides interface XE1205PhySwitch;
+
+}
+implementation {
+
+  components XE1205PhySwitchP;
+  XE1205PhySwitch = XE1205PhySwitchP;
+
+  components HplXE1205PinsC;
+  XE1205PhySwitchP.AntSelTXPin   -> HplXE1205PinsC.AntSelTXPin;
+  XE1205PhySwitchP.AntSelRXPin   -> HplXE1205PinsC.AntSelRXPin;
+  XE1205PhySwitchP.DataPin       -> HplXE1205PinsC.DataPin;
+  XE1205PhySwitchP.ModeSel0Pin   -> HplXE1205PinsC.ModeSel0Pin;
+  XE1205PhySwitchP.ModeSel1Pin   -> HplXE1205PinsC.ModeSel1Pin;
+  XE1205PhySwitchP.Irq0Pin       -> HplXE1205PinsC.Irq0Pin;
+  XE1205PhySwitchP.Irq1Pin       -> HplXE1205PinsC.Irq1Pin;
+
+  components MainC;
+  MainC.SoftwareInit ->   XE1205PhySwitchP.Init;
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitchP.nc b/tos/chips/xe1205/phy/XE1205PhySwitchP.nc
new file mode 100644
index 00000000..53f5b914
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitchP.nc
@@ -0,0 +1,114 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+module XE1205PhySwitchP {
+  
+  provides interface XE1205PhySwitch;
+  provides interface Init @atleastonce();
+
+  uses interface GeneralIO as AntSelTXPin;
+  uses interface GeneralIO as AntSelRXPin;
+  uses interface GeneralIO as DataPin; // only used in continuous mode, not currently supported
+  uses interface GeneralIO as ModeSel0Pin;
+  uses interface GeneralIO as ModeSel1Pin;
+  uses interface GeneralIO as Irq0Pin;
+  uses interface GeneralIO as Irq1Pin;
+}
+implementation {
+
+  command error_t Init.init() {
+    call ModeSel0Pin.makeOutput();
+    call ModeSel1Pin.makeOutput();
+    call AntSelTXPin.makeOutput();
+    call AntSelRXPin.makeOutput();
+    call DataPin.makeOutput();
+    call XE1205PhySwitch.standbyMode();
+    return SUCCESS;
+  }
+
+  async command void XE1205PhySwitch.sleepMode() { 
+    call ModeSel0Pin.clr();
+    call ModeSel1Pin.clr();
+    call Irq0Pin.makeOutput();
+    call Irq1Pin.makeOutput();
+    call DataPin.makeOutput();
+  }
+
+  async command void XE1205PhySwitch.standbyMode() { 
+    call ModeSel0Pin.set();
+    call ModeSel1Pin.set();
+    call Irq0Pin.makeOutput();
+    call Irq1Pin.makeOutput();
+    call DataPin.makeOutput();
+  }
+
+  async command void XE1205PhySwitch.rxMode() {
+    call Irq0Pin.makeInput();
+    call Irq1Pin.makeInput();
+    call DataPin.makeInput();
+
+    call ModeSel0Pin.set();
+    call ModeSel1Pin.clr();
+
+  }
+
+  async command void XE1205PhySwitch.txMode() {
+    call Irq0Pin.makeInput();
+    call Irq1Pin.makeInput();
+    call DataPin.makeOutput();
+    call ModeSel1Pin.set();
+    call ModeSel0Pin.clr();
+  }
+
+  async command void XE1205PhySwitch.antennaOff() { 
+    call AntSelRXPin.clr();
+    call AntSelTXPin.clr();
+  }
+
+  async command void XE1205PhySwitch.antennaRx() {
+    call AntSelRXPin.set();
+    call AntSelTXPin.clr();
+  }
+        
+  async command void XE1205PhySwitch.antennaTx() {
+    call AntSelRXPin.clr();
+    call AntSelTXPin.set();
+  }
+
+}
diff --git a/tos/chips/xe1205/xe1205debug.h b/tos/chips/xe1205/xe1205debug.h
new file mode 100644
index 00000000..a649d021
--- /dev/null
+++ b/tos/chips/xe1205/xe1205debug.h
@@ -0,0 +1,17 @@
+uint8_t var;
+uint16_t lasterr;
+
+void xe1205error(uint8_t loc, uint8_t value_)  __attribute__ ((noinline)) {
+  // this is just to make sure the compiler doesn't optimize 
+  // out calls to this function, since we use it as a gdb breakpoint
+  atomic var += value_ + loc; 
+}
+
+
+void xe1205check(uint8_t loc, error_t err)   __attribute__ ((noinline)) {
+  if (err != SUCCESS) {
+    atomic lasterr = loc;
+    xe1205error(loc, err);
+  }
+}
+
diff --git a/tos/interfaces/AMPacket.nc b/tos/interfaces/AMPacket.nc
new file mode 100644
index 00000000..48c39b64
--- /dev/null
+++ b/tos/interfaces/AMPacket.nc
@@ -0,0 +1,121 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * The Active Message accessors, which provide the AM local address and
+  * functionality for querying packets. Also see the Packet interface.
+  *
+  * @author Philip Levis 
+  * @date   January 18 2005
+  * @see    Packet
+  * @see    AMSend
+  * @see    TEP 116: Packet Protocols
+  */ 
+
+
+#include 
+#include 
+
+interface AMPacket {
+
+  /**
+   * Return the node's active message address associated with this AM stack.
+   * @return The address
+   */
+
+  command am_addr_t address();
+
+  /**
+   * Return the AM address of the destination field of an AM packet.
+   * If amsg is not an AM packet, the results of this command
+   * are undefined.
+   * @param amsg    the packet
+   * @return        the destination address of the packet.
+   */
+  
+  command am_addr_t destination(message_t* amsg);
+
+  /**
+   * Set the AM address of the destination field of the AM packet.  As
+   * the AM address is set as part of sending with the AMSend
+   * interface, this command is not used for sending packets.  Rather,
+   * it is used when a component, such as a queue, needs to buffer a
+   * request to send. The component can save the destination address
+   * and then recover it when actually sending. If amsg is
+   * not an AM packet, the results of this command are undefined.
+   *
+   * @param  amsg   the packet
+   * @param  addr   the address
+   */
+
+  command void setDestination(message_t* amsg, am_addr_t addr);
+
+  /**
+   * Return whether amsg is destined for this mote. This is
+   * partially a shortcut for testing whether the return value of
+   * destination and address are the same. It
+   * may, however, include additional logic. For example, there
+   * may be an AM broadcast address: destination will return
+   * the broadcast address, but address will still be
+   * the mote's local address. If amsg is not an AM packet,
+   * the results of this command are undefined.
+   *
+   * @param  amsg   the packet
+   * @return        whether the packet is addressed to this AM stack
+   */
+  command bool isForMe(message_t* amsg);
+  
+  /**
+   * Return the AM type of the AM packet.
+   * If amsg is not an AM packet, the results of this command
+   * are undefined.
+   *
+   * @param  amsg   the packet
+   * @return        the AM type
+   */
+  
+  command am_id_t type(message_t* amsg);
+
+  /**
+   * Set the AM type of the AM packet.  As the AM type is set as part
+   * of sending with the AMSend interface, this command is not used
+   * for sending packets. Instead, it is used when a component, such
+   * as a queue, needs to buffer a request to send. The component can
+   * save the AM type in the packet then recover it when actually
+   * sending. If amsg is not an AM packet, the results of
+   * this command are undefined.
+   * 
+   * @param  amsg    the packet
+   * @param  t       the AM type
+   */
+  
+  command void setType(message_t* amsg, am_id_t t);
+
+}
diff --git a/tos/interfaces/AMSend.nc b/tos/interfaces/AMSend.nc
new file mode 100644
index 00000000..6ccc5af8
--- /dev/null
+++ b/tos/interfaces/AMSend.nc
@@ -0,0 +1,128 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** The basic active message message sending interface. Also see
+  * Packet, Receive, and Send.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see   Packet
+  * @see   AMPacket
+  * @see   Receive
+  * @see   TEP 116: Packet Protocols
+  */ 
+
+
+#include 
+#include 
+#include 
+
+interface AMSend {
+
+  /** 
+    * Send a packet with a data payload of len to address
+    * addr. To determine the maximum available size, use the
+    * Packet interface of the component providing AMSend. If send
+    * returns SUCCESS, then the component will signal the sendDone
+    * event in the future; if send returns an error, it will not
+    * signal the event.  Note that a component may accept a send
+    * request which it later finds it cannot satisfy; in this case, it
+    * will signal sendDone with error code.
+    *
+    * @param addr   address to which to send the packet
+    * @param msg    the packet
+    * @param len    the length of the data in the packet payload
+    * @return       SUCCESS if the request to send succeeded and a
+    *               sendDone will be signaled later, EBUSY if the
+    *               abstraction cannot send now but will be able to
+    *               later, or FAIL if the communication layer is not
+    *               in a state that can send (e.g., off).
+    * @see          sendDone
+    */ 
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was canceled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully canceled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    * A successful call to cancel must always result in a 
+    * sendFailed event, and never a sendSucceeded event.
+    * 
+    * @param  msg     the packet whose transmission should be cancelled.
+    * @return SUCCESS if the transmission was cancelled, FAIL otherwise.
+    * @see    sendDone
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. msg is
+    * the message buffer sent, and error indicates whether
+    * the send was successful.
+    *
+    * @param  msg   the packet which was submitted as a send request
+    * @param  error SUCCESS if it was sent successfully, FAIL if it was not,
+    *               ECANCEL if it was cancelled
+    * @see send
+    * @see cancel
+    */ 
+
+  event void sendDone(message_t* msg, error_t error);
+
+
+   /**
+   * Return the maximum payload length that this communication layer
+   * can provide. This command behaves identically to
+   * Packet.maxPayloadLength and is included in this
+   * interface as a convenience.
+   *
+   * @return the maximum payload length
+   */
+
+  
+  command uint8_t maxPayloadLength();
+
+
+   /**
+    * Return a pointer to a protocol's payload region in a packet.
+    * The length of this region is maxPayloadLength(). This command
+    * behaves similarly to Packet.getPayload (minus the
+    * length parameter) and is included in this interface
+    * as a convenience.
+    *
+    * @param  msg    the packet
+    * @return        the payload of the packet
+    */
+  command void* getPayload(message_t* msg);
+
+  
+}
diff --git a/tos/interfaces/ArbiterInfo.nc b/tos/interfaces/ArbiterInfo.nc
new file mode 100644
index 00000000..cbd2140c
--- /dev/null
+++ b/tos/interfaces/ArbiterInfo.nc
@@ -0,0 +1,89 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.

    
+ *
+ * The ArbiterInfo interface allows a component to query the current 
+ * status of an arbiter.  It must be provided by ALL arbiter implementations,
+ * and can be used for a variety of different purposes.  Normally it will be
+ * used in conjunction with the Resource interface for performing run time
+ * checks on access rights to a particular shared resource.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface ArbiterInfo {
+  /**
+   * Check whether a resource is currently allocated.
+   *
+   * @return TRUE If the resource being arbitrated is currently allocated
+   *              to any of its users
    
+   *         FALSE Otherwise.
+   */
+  async command bool inUse();
+
+  /**
+   * Get the id of the client currently using a resource.
+   * 
+   * @return Id of the current owner of the resource
    
+   *         0xFF if no one currently owns the resource
+   */
+  async command uint8_t userId();
+}
diff --git a/tos/interfaces/AsyncStdControl.nc b/tos/interfaces/AsyncStdControl.nc
new file mode 100644
index 00000000..ddefc190
--- /dev/null
+++ b/tos/interfaces/AsyncStdControl.nc
@@ -0,0 +1,83 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */ 
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.

    
+ *
+ * This is the asynchronous counterpart to the StdContol interface.  It
+ * should be used for switching between the on and off power states of
+ * the component providing it.  This interface differs from the
+ * StdControl interface only in the fact that any of its commands can
+ * be called from asynchronous context.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface AsyncStdControl
+{
+  /**
+   * Start this component and all of its subcomponents.
+   *
+   * @return SUCCESS if the component was successfully turned on
    
+   *         FAIL otherwise
+   */
+  async command error_t start();
+
+  /**
+   * Stop the component and any pertinent subcomponents (not all
+   * subcomponents may be turned off due to wakeup timers, etc.).
+   *
+   * @return SUCCESS if the component was successfully turned off
    
+   *         FAIL otherwise
+   */
+  async command error_t stop();
+}
diff --git a/tos/interfaces/BitVector.nc b/tos/interfaces/BitVector.nc
new file mode 100644
index 00000000..804fece1
--- /dev/null
+++ b/tos/interfaces/BitVector.nc
@@ -0,0 +1,79 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Interface to a bit vector.
+ *
+ * @author Cory Sharp 
+ */
+
+interface BitVector
+{
+  /**
+   * Clear all bits in the vector.
+   */
+  async command void clearAll();
+
+  /**
+   * Set all bits in the vector.
+   */
+  async command void setAll();
+
+  /**
+   * Read a bit from the vector.
+   * @param bitnum Bit to read.
+   * @return Bit value.
+   */
+  async command bool get(uint16_t bitnum);
+
+  /**
+   * Set a bit in the vector.
+   * @param bitnum Bit to set.
+   */
+  async command void set(uint16_t bitnum);
+
+  /**
+   * Set a bit in the vector.
+   * @param bitnum Bit to clear.
+   */
+  async command void clear(uint16_t bitnum);
+
+  /**
+   * Toggle a bit in the vector.
+   * @param bitnum Bit to toggle.
+   */
+  async command void toggle(uint16_t bitnum);
+
+  /**
+   * Write a bit in the vector.
+   * @param bitnum Bit to clear.
+   * @param value New bit value.
+   */
+  async command void assign(uint16_t bitnum, bool value);
+
+  /**
+   * Return bit vector length.
+   * @return Bit vector length.
+   */
+  async command uint16_t size();
+}
+
diff --git a/tos/interfaces/BlockRead.nc b/tos/interfaces/BlockRead.nc
new file mode 100644
index 00000000..eebaa280
--- /dev/null
+++ b/tos/interfaces/BlockRead.nc
@@ -0,0 +1,125 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Read interface for the block storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Storage.h"
+
+interface BlockRead {
+  /**
+   * Initiate a read operation within a given volume. On SUCCESS, the
+   * readDone event will signal completion of the
+   * operation.
+   * 
+   * @param addr starting address to begin reading.
+   * @param buf buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the parameters are invalid
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr starting address of read.
+   * @param buf buffer where read data was placed.
+   * @param len number of bytes read.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		      error_t error);
+  
+  /**
+   * Initiate a verify operation to verify the integrity of the
+   * data. This operation is only valid after a commit operation from
+   * BlockWrite has been completed. On SUCCESS, the
+   * verifyDone event will signal completion of the
+   * operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t verify();
+  
+  /**
+   * Signals the completion of a verify operation.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void verifyDone(error_t error);
+  
+  /**
+   * Initiate a crc computation. On SUCCESS, the
+   * computeCrcDone event will signal completion of the
+   * operation.
+   *
+   * @param addr starting address.
+   * @param len the number of bytes to compute the crc over.
+   * @parm crc initial CRC value
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the parameters are invalid
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t computeCrc(storage_addr_t addr, storage_len_t len,
+			     uint16_t crc);
+
+  /**
+   * Signals the completion of a crc computation.
+   *
+   * @param addr stating address.
+   * @param len number of bytes the crc was computed over.
+   * @param crc the resulting crc value.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void computeCrcDone(storage_addr_t addr, storage_len_t len,
+			    uint16_t crc, error_t error);
+
+  /**
+   * Report the usable volume size in bytes (this may be different than
+   * the actual volume size because of metadata overheads).
+   * @return Volume size.
+   */
+  command storage_len_t getSize();
+}
diff --git a/tos/interfaces/BlockWrite.nc b/tos/interfaces/BlockWrite.nc
new file mode 100644
index 00000000..c229848d
--- /dev/null
+++ b/tos/interfaces/BlockWrite.nc
@@ -0,0 +1,113 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Write interface for the block storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Storage.h"
+
+interface BlockWrite {
+  /**
+   * Initiate a write operation within a given volume. On SUCCESS, the
+   * writeDone event will signal completion of the
+   * operation.
+   * 
+   * @param addr starting address to begin write.
+   * @param buf buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the parameters are invalid
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a write operation. However, data is not
+   * guaranteed to survive a power-cycle unless a commit operation has
+   * been completed.
+   *
+   * @param addr starting address of write.
+   * @param buf buffer that written data was read from.
+   * @param len number of bytes written.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		       error_t error);
+  
+  /**
+   * Initiate an erase operation. On SUCCESS, the
+   * eraseDone event will signal completion of the
+   * operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t erase();
+  
+  /**
+   * Signals the completion of an erase operation.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Initiate a commit operation and finialize any additional writes
+   * to the volume. A verify operation from BlockRead can
+   * be done to check if the data has been modified since. A commit
+   * operation must be issued to ensure that data is stored in
+   * non-volatile storage. On SUCCES, the commitDone
+   * event will signal completion of the operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t commit();
+
+  /**
+   * Signals the completion of a commit operation. All written data is
+   * flushed to non-volatile storage after this event.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void commitDone(error_t error);
+}
diff --git a/tos/interfaces/Boot.nc b/tos/interfaces/Boot.nc
new file mode 100644
index 00000000..99f7b196
--- /dev/null
+++ b/tos/interfaces/Boot.nc
@@ -0,0 +1,51 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * Interface that notifies components when TinyOS has booted
+  * (initialized all of its components), as discussed in TEP 107.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  */ 
+
+interface Boot {
+  /**
+   * Signaled when the system has booted successfully. Components can
+   * assume the system has been initialized properly. Services may
+   * need to be started to work, however.
+   *
+   * @see StdControl
+   * @see SplitConrol
+   * @see TEP 107: Boot Sequence
+   */
+  event void booted();
+}
+
diff --git a/tos/interfaces/Cache.nc b/tos/interfaces/Cache.nc
new file mode 100644
index 00000000..94481d48
--- /dev/null
+++ b/tos/interfaces/Cache.nc
@@ -0,0 +1,56 @@
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * A data item cache. The cache does not own the items it caches:
+ * there is no allocation/deallocation policy, or notification of
+ * eviction. Correspondingly, using references (pointers) as data
+ * items can be difficult.
+ * 
+ * @author Rodrigo Fonseca
+ * @author Philip Levis 
+ */
+
+interface Cache {
+    /**
+     * Inserts an item in the cache, evicting if necessary.
+     * An atomic lookup after insert should return true.
+     *
+     * @param item - the data item to insert.
+     */
+    command void insert(t item);
+
+    /**
+      * Return whether the data item is in the cache.
+      *
+      * @param item - the data item to query
+      * @return Whether the item is in the cache.
+      */ 
+    command bool lookup(t item);
+   
+    /**
+      * Flush the cache of all entries.
+      *
+      */
+    command void flush();
+}
+
diff --git a/tos/interfaces/ConfigStorage.nc b/tos/interfaces/ConfigStorage.nc
new file mode 100644
index 00000000..f73d01c1
--- /dev/null
+++ b/tos/interfaces/ConfigStorage.nc
@@ -0,0 +1,153 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Read interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui 
+ * @author David Gay
+ * @version $Revision$ $Date$
+ */
+
+#include "Storage.h"
+
+interface ConfigStorage {
+  /**
+   * Initiate a read operation within a given volume. On SUCCESS, the
+   * readDone event will signal completion of the
+   * operation. The data read is the contents of the config volume
+   * as of the last commit operation.
+   * 
+   * @param addr starting address to begin reading.
+   * @param buf buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the parameters are invalid
+   *   
  • EOFF if the volume has not been mounted
+   *   
  • EBUSY if a request is already being processed.
+   *   
  • FAIL if the volume does not contain valid data 
+   *       (see valid)
+   */
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr starting address of read.
+   * @param buf buffer where read data was placed.
+   * @param len number of bytes read.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		      error_t error);
+  
+  /**
+   * Initiate a write operation within a given volume. On SUCCESS, the
+   * writeDone event will signal completion of the
+   * operation.
+   * 
+   * @param addr starting address to begin write.
+   * @param buf buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the parameters are invalid
+   *   
  • EOFF if the volume has not been mounted
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a write operation. However, data is not
+   * guaranteed to survive a power-cycle unless a commit operation has
+   * been completed.
+   *
+   * @param addr starting address of write.
+   * @param buf buffer that written data was read from.
+   * @param len number of bytes written.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		       error_t error);
+  
+  /**
+   * Initiate a commit operation and finialize any additional writes to the
+   * volume. A commit operation must be issued to ensure that data is
+   * stored in non-volatile storage. On SUCCES, the commitDone
+   * event will signal completion of the operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   *   
  • EOFF if the volume has not been mounted
+   */
+  command error_t commit();
+
+  /**
+   * Signals the completion of a commit operation. All written data is
+   * flushed to non-volatile storage after this event.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void commitDone(error_t error);
+
+  /**
+   * Report the usable volume size in bytes (this may be significantly
+   * different from the actual volume size, e.g., it's approximately
+   * half the volume size on the AT45DB implementation).
+   *
+   * @return Volume size. The result is undefined if the volume hasn't
+   *    been mounted.
+   */
+  command storage_len_t getSize();
+
+  /**
+   * Report whether this config volume contains valid data. Committing
+   * a volume makes it valid.
+   *
+   * @return TRUE if the volume contains valid data, FALSE otherwise. The
+   *    result is undefined if the volume hasn't been mounted.
+   */
+  command bool valid();
+}
diff --git a/tos/interfaces/CsmaBackoff.nc b/tos/interfaces/CsmaBackoff.nc
new file mode 100644
index 00000000..ccd2aaaf
--- /dev/null
+++ b/tos/interfaces/CsmaBackoff.nc
@@ -0,0 +1,44 @@
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/**
+ * Interface for MAC Backoff values from the radio stack.
+ * Allows application to change the backoff on a per packet basis.
+ * Only used if congestion control is enabled.
+ *
+ * @author Joe Polastre
+ */
+interface CsmaBackoff
+{
+  /**
+   * Return initial backoff time before attempting to send message m. The
+   * units are radio dependent.
+   * @return Initial backoff time
+   */
+  async event uint16_t initial(message_t* m);
+
+  /**
+   * Return backoff time after message m could not be send due to congestion.
+   * The units are raio dependent.
+   * @return Backoff time after congestion
+   */
+  async event uint16_t congestion(message_t* m);
+}
diff --git a/tos/interfaces/GeneralIO.nc b/tos/interfaces/GeneralIO.nc
new file mode 100644
index 00000000..ae9e79e3
--- /dev/null
+++ b/tos/interfaces/GeneralIO.nc
@@ -0,0 +1,36 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+interface GeneralIO
+{
+  async command void set();
+  async command void clr();
+  async command void toggle();
+  async command bool get();
+  async command void makeInput();
+  async command void makeOutput();
+}
+
diff --git a/tos/interfaces/Get.nc b/tos/interfaces/Get.nc
new file mode 100644
index 00000000..55600d2b
--- /dev/null
+++ b/tos/interfaces/Get.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Get interface is intended for synchronous reading of small
+ * values. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, the get() call must
+ * be guaranteed to succeed.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface Get {
+  /**
+   * Retrieves a value of type val_t.
+   *
+   * @return the value itself
+   */
+  command val_t get();
+}
diff --git a/tos/interfaces/GetSet.nc b/tos/interfaces/GetSet.nc
new file mode 100644
index 00000000..dce00b85
--- /dev/null
+++ b/tos/interfaces/GetSet.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The GetSet interface is intended for synchronous reading and
+ * writing of small values. The type of the value is given as a
+ * template argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, both calls must be
+ * guaranteed to succeed. This interface should be used when a single
+ * logical unit supports both getting and setting.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface GetSet {
+  /**
+   * Retrieves a value of type val_t.
+   *
+   * @return the value itself
+   */
+  command val_t get();
+
+  /**
+   * Stores a value of type val_t.
+   *
+   * @param val the value to be stored
+   */
+  command void set( val_t val );
+}
diff --git a/tos/interfaces/GpioCapture.nc b/tos/interfaces/GpioCapture.nc
new file mode 100644
index 00000000..917fcb84
--- /dev/null
+++ b/tos/interfaces/GpioCapture.nc
@@ -0,0 +1,57 @@
+// $Id$
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Interface for microcontroller-independent 32kHz timer capture events.
+ * 
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   September 30 2005
+ *
+ */
+
+#include "TinyError.h"
+
+interface GpioCapture {
+
+  /** 
+   * Enable an edge based timer capture event.
+   *
+   * @return Whether the timer capture has been enabled.
+   */
+  async command error_t captureRisingEdge();
+  async command error_t captureFallingEdge();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * @param val The value of the 32kHz timer.
+   */
+  async event void captured(uint16_t time);
+
+  /**
+   * Disable further captures.
+   */ 
+  async command void disable();
+
+}
diff --git a/tos/interfaces/GpioInterrupt.nc b/tos/interfaces/GpioInterrupt.nc
new file mode 100644
index 00000000..40206507
--- /dev/null
+++ b/tos/interfaces/GpioInterrupt.nc
@@ -0,0 +1,59 @@
+// $Id$
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * Revision:  $Revision$
+ *
+ * Provides a microcontroller-independent presentation of interrupts
+ */
+
+
+interface GpioInterrupt {
+
+  /** 
+   * Enable an edge based interrupt. Calls to these functions are
+   * not cumulative: only the transition type of the last called function
+   * will be monitored for.
+   *
+   *
+   * @return SUCCESS if the interrupt has been enabled
+   */
+  async command error_t enableRisingEdge();
+  async command error_t enableFallingEdge();
+
+  /**  
+   * Diables an edge interrupt or capture interrupt
+   * 
+   * @return SUCCESS if the interrupt has been disabled
+   */ 
+  async command error_t disable();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * NOTE: Interrupts keep running until "disable()" is called
+   */
+  async event void fired();
+
+}
diff --git a/tos/interfaces/I2CPacket.nc b/tos/interfaces/I2CPacket.nc
new file mode 100644
index 00000000..e891c3f2
--- /dev/null
+++ b/tos/interfaces/I2CPacket.nc
@@ -0,0 +1,100 @@
+// $Id$
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * I2C Packet/buffer interface for sending data over the I2C bus.
+ * The address, length, and buffer must be specified.  The I2C bus then
+ * has control of that buffer and returns it when the operation has
+ * completed.  The I2CPacket interface supports master-mode communication
+ * and provides for multiple repeated STARTs and multiple reads/writes 
+ * within the same START transaction. 
+ * The interface is typed according to the address size supported by 
+ * the master hardware.  Masters capable of supporting extended (10-bit)
+ * I2C addressing MUST export both types. Applications should use the 
+ * smallest address size to ensure best portability.
+ *
+ * @param addr_size A type indicating the slave address size. Supported
+ * values are TI2CExtdAddr (for 10-bit addressing) and TI2CBasicAddr (7-bit
+ * addressing). 
+ *
+ * @author Joe Polastre
+ * @author Phil Buonadonna 
+ * @author Jonathan Hui 
+ * @author Phil Levis 
+ * Revision:  $Revision$
+ */
+
+interface I2CPacket {
+  /**
+   * Perform an I2C read operation
+   *
+   * @param flags Flags that may be logical ORed and defined by:
+   *    I2C_START   - The START condition is transmitted at the beginning 
+   *                   of the packet if set.
+   *    I2C_STOP    - The STOP condition is transmitted at the end of the 
+   *                   packet if set.
+   *    I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This
+   *                   flag cannot be used with the I2C_STOP flag.
+   * @param addr The slave device address. Only used if I2C_START is set.
+   * @param length Length, in bytes, to be read
+   * @param data A point to a data buffer to read into
+   *
+   * @return SUCCESS if bus available and request accepted. 
+   */
+  async command error_t read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Perform an I2C write operation
+   *
+   * @param flags Flags that may be logical ORed and defined by:
+   *    I2C_START   - The START condition is transmitted at the beginning 
+   *                   of the packet if set.
+   *    I2C_STOP    - The STOP condition is transmitted at the end of the 
+   *                   packet if set.
+   * @param addr The slave device address. Only used if I2C_START is set.
+   * @param length Length, in bytes, to be read
+   * @param data A point to a data buffer to read into
+   *
+   * @return SUCCESS if bus available and request accepted. 
+   */
+  async command error_t write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Notification that the read operation has completed
+   *
+   * @param addr The slave device address
+   * @param length Length, in bytes, read
+   * @param data Pointer to the received data buffer
+   * @param success SUCCESS if transfer completed without error.
+   */
+  async event void readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Notification that the write operation has completed
+   *
+   * @param addr The slave device address
+   * @param length Length, in bytes, written
+   * @param data Pointer to the data buffer written
+   * @param success SUCCESS if transfer completed without error.
+   */
+  async event void writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+}
diff --git a/tos/interfaces/Init.nc b/tos/interfaces/Init.nc
new file mode 100644
index 00000000..d4a36dd2
--- /dev/null
+++ b/tos/interfaces/Init.nc
@@ -0,0 +1,52 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** The basic synchronous initialization interface.
+  *
+  * @author Philip Levis
+  * @date   January 17 2005
+  */ 
+
+
+#include "TinyError.h"
+
+interface Init {
+
+  /**
+   * Initialize this component. Initialization should not assume that
+   * any component is running: init() cannot call any commands besides
+   * those that initialize other components.  
+   * 
+   * @return SUCCESS if initialized properly, FAIL otherwise.
+   * @see TEP 107: Boot Sequence
+   *
+   */
+  command error_t init();
+}
diff --git a/tos/interfaces/Intercept.nc b/tos/interfaces/Intercept.nc
new file mode 100644
index 00000000..69ae6976
--- /dev/null
+++ b/tos/interfaces/Intercept.nc
@@ -0,0 +1,32 @@
+/**
+ * Allows protocol layers above the routing layer to perform data
+ * aggregation or make application-specific decisions on whether to
+ * forward via the return value of the forward event.
+ *
+ * @author Philip Levis
+ * @author Kyle Jamieson
+ * @version $Id$
+ * @see TEP 116: Packet Protocols, TEP 119: Collection
+ */
+
+#include 
+#include 
+
+interface Intercept {
+  /**
+   * Signals that a message has been received, which is supposed to be
+   * forwarded to another destination. 
+   *
+   * @param msg The complete message received.
+   *
+   * @param payload The payload portion of the packet for this
+   * protocol layer.
+   *
+   * @param len The length of the payload buffer.
+   *
+   * @return TRUE indicates the packet should be forwarded, FALSE
+   * indicates that it should not be forwarded.
+   *
+   */
+  event bool forward(message_t* msg, void* payload, uint16_t len);
+}
diff --git a/tos/interfaces/Leds.nc b/tos/interfaces/Leds.nc
new file mode 100644
index 00000000..3b37613d
--- /dev/null
+++ b/tos/interfaces/Leds.nc
@@ -0,0 +1,125 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+
+
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LED_LED0, LED_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * 
     (call Leds.get() & LEDS_LED2) 
    
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * set().
+   *
+   * @return a bitmask describing which LEDs are on and which are off
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * 
     call Leds.set(LEDS_LED0 | LEDS_LED2); 
    
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * 
    call Leds.set(call Leds.get() | LEDS_LED1);
    
+   *
+   * @param  val   a bitmask describing the on/off settings of the LEDs
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/interfaces/LogRead.nc b/tos/interfaces/LogRead.nc
new file mode 100644
index 00000000..4ee818af
--- /dev/null
+++ b/tos/interfaces/LogRead.nc
@@ -0,0 +1,125 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Read interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui 
+ * @author David Gay
+ * @version $Revision$ $Date$
+ */
+
+#include "Storage.h"
+
+interface LogRead {
+  /**
+   * Initiate a read operation from the current position within a given log
+   * volume. On SUCCESS, the readDone event will signal
+   * completion of the operation.
+   * 
+   * @param buf buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t read(void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation. The current read position is
+   * advanced by len bytes.
+   *
+   * @param addr starting address of read.
+   * @param buf buffer where read data was placed.
+   * @param len number of bytes read - this may be less than requested
+   *    (even equal to 0) if the end of the log was reached
+   * @param error SUCCESS if read was possible, FAIL otherwise
+   */
+  event void readDone(void* buf, storage_len_t len, error_t error);
+
+  /**
+   * Return a "cookie" representing the current read offset within the
+   * log. This cookie can be used in a subsequent seek operation to
+   * return to the same place in the log (if it hasn't been overwritten).
+   *
+   * @return Cookie representing current offset. 
+   *   SEEK_BEGINNING will be returned if:
      
+   *   
    •  a write in a circular log overwrote the previous read position
+   *   
    •  seek was passed a cookie representing a position before the
+   *        current beginning of a circular log
+   *   
    
+   *   Note that SEEK_BEGINNING can also be returned at
+   *   other times (just after erasing a log, etc).
+   */
+  command storage_cookie_t currentOffset();
+
+  /**
+   * Set the read position in the log, using a cookie returned by the
+   * currentOffset commands of LogRead or
+   * LogWrite, or the special value SEEK_BEGINNING.
+   *
+   * If the specified position has been overwritten, the read position
+   * will be set to the beginning of the log.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t seek(storage_cookie_t offset);
+
+  /**
+   * Report success of seek operation. If SUCCESS is returned,
+   * the read position has been changed as requested. If other values are
+   * returned, the read position is undefined.
+   *
+   * @param error SUCCESS if the seek was succesful, EINVAL if the cookie
+   *   was invalid and FAIL for other errors.
+   */
+  event void seekDone(error_t error);
+  
+  /**
+   * Report approximate log capacity in bytes. Note that use of
+   * sync, failures and general overhead may reduce the number
+   * of bytes available to the log. 
+   *
+   * @return Volume size.
+   */
+  command storage_len_t getSize();
+}
diff --git a/tos/interfaces/LogWrite.nc b/tos/interfaces/LogWrite.nc
new file mode 100644
index 00000000..cf1736d1
--- /dev/null
+++ b/tos/interfaces/LogWrite.nc
@@ -0,0 +1,116 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Write interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+#include "Storage.h"
+
+interface LogWrite {
+  /**
+   * Append data to a given volume. On SUCCESS, the appendDone 
+   * event will signal completion of the operation.
+   * 
+   * @param buf buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EINVAL if the request is invalid (len too large).
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t append(void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of an append operation. However, data is not
+   * guaranteed to survive a power-cycle unless a commit operation has
+   * been completed.
+   *
+   * @param buf buffer that written data was read from.
+   * @param len number of bytes actually written (valid even in case of error)
+   * @param error SUCCESS if append was possible, ESIZE if the (linear) log
+   *    is full and FAIL for other errors.
+   */
+  event void appendDone(void* buf, storage_len_t len, error_t error);
+  
+  /**
+   * Return a "cookie" representing the current append offset within the
+   * log. This cookie can be used in a subsequent seek operation (see
+   * LogRead to start reading from this place in the log (if
+   * it hasn't been overwritten).
+   *
+   * The current write position is not known before the first read, append,
+   * seek, erase or sync.
+   *
+   * @return Cookie representing current offset. 
+   */
+  command storage_cookie_t currentOffset();
+
+  /**
+   * Initiate an erase operation. On SUCCESS, the
+   * eraseDone event will signal completion of the
+   * operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t erase();
+  
+  /**
+   * Signals the completion of an erase operation.
+   *
+   * @param error SUCCESS if the log was erased, FAIL otherwise.
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Ensure all writes are present on flash, and that failure in subsequent
+   * writes cannot cause loss of earlier writes. On SUCCES, the 
+   * commitDone event will signal completion of the operation.
+   *
+   * @return 
+   *   
  • SUCCESS if the request was accepted, 
+   *   
  • EBUSY if a request is already being processed.
+   */
+  command error_t sync();
+
+  /**
+   * Signals the successful or unsuccessful completion of a sync operation. 
+   *
+   * @param error SUCCESS if the log was synchronised, FAIL otherwise.
+   */
+  event void syncDone(error_t error);
+}
diff --git a/tos/interfaces/McuPowerOverride.nc b/tos/interfaces/McuPowerOverride.nc
new file mode 100644
index 00000000..94223c53
--- /dev/null
+++ b/tos/interfaces/McuPowerOverride.nc
@@ -0,0 +1,55 @@
+/// $Id$
+
+/**
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Interface to allow high-level components to set a lower bound for a
+ * microcontroller's low power state. This is sometimes necessary,
+ * e.g., if a very low power state has a long wakeup latency that will
+ * violate application timing requirements. TEP 112 describes how
+ * TinyOS incorporates this information when the Scheduler tells
+ * the MCU to enter a low power state.
+ * 
+ * @author Philip Levis
+ * @date   Oct 26, 2005
+ * @see    TEP 112: Microconroller Power Management
+ */
+
+#include "hardware.h"
+
+interface McuPowerOverride {
+
+  /**
+   * Called when computing the low power state, in order to allow
+   * a high-level component to institute a lower bound. Because
+   * this command originates deep within the basic TinyOS scheduling
+   * mechanisms, it should be used very sparingly. Refer to TEP 112 for
+   * details.
+   *
+   * @return    the lowest power state the system can enter to meet the 
+   *            requirements of this component
+   */
+  async command mcu_power_t lowestState();
+}
diff --git a/tos/interfaces/McuPowerState.nc b/tos/interfaces/McuPowerState.nc
new file mode 100644
index 00000000..89c12982
--- /dev/null
+++ b/tos/interfaces/McuPowerState.nc
@@ -0,0 +1,45 @@
+/// $Id$
+
+/**
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Interface to instruct TinyOS that the low-power state of the MCU
+ * may have changed. TEP 112 describes how an MCU computes this state
+ * and how the Scheduler uses this interface to manage system power
+ * draw.
+ * 
+ * @author Philip Levis
+ * @date   Oct 26, 2005
+ * @see    TEP 112: Microcontroller Power Management
+ */
+
+interface McuPowerState {
+    /** 
+     * Called by any component to tell TinyOS that the MCU low
+     * power state may have changed. Generally, this should be
+     * called whenever a peripheral/timer is started/stopped. 
+     */
+    async command void update();
+}
diff --git a/tos/interfaces/McuSleep.nc b/tos/interfaces/McuSleep.nc
new file mode 100644
index 00000000..699278bc
--- /dev/null
+++ b/tos/interfaces/McuSleep.nc
@@ -0,0 +1,60 @@
+/// $Id$
+
+/**
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * "Copyright (c) 2005 Crossbow Technology, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE TO ANY 
+ * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF THE COPYRIGHT HOLDERS AND CONTRIBUTORS HAVE BEEN ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE COPYRIGHT HOLDERS AND CONTRIBUTORS SPECIFICALLY DISCLAIM ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS ON AN 
+ * "AS IS" BASIS, AND THE COPYRIGHT HOLDERS AND CONTRIBUTORS HAVE NO OBLIGATION
+ * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Interface to instruct the MCU to enter a low power state. TEP112
+ * describes how an MCU computes this state and how the Scheduler uses
+ * this interface to manage system power draw.
+ * 
+ * @author Philip Levis
+ * @author Martin Turon 
+ * @date   Oct 26, 2005
+ *
+ */
+
+interface McuSleep {
+    /** Called by the scheduler to put the MCU to sleep. */
+    async command void    sleep();
+}
diff --git a/tos/interfaces/Mount.nc b/tos/interfaces/Mount.nc
new file mode 100644
index 00000000..3c2ee968
--- /dev/null
+++ b/tos/interfaces/Mount.nc
@@ -0,0 +1,37 @@
+/* Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Mount a volume.
+ *
+ * @author David Gay
+ * @version $Revision$ $Date$
+ */
+
+interface Mount {
+  /**
+   * Mount a particular volume. This must be done before the volume's
+   * first use. mountDone will be signaled if SUCCESS is
+   * returned.
+   * @return SUCCESS if mount request is accepted, FAIL if mount has
+   *   already been attempted.
+   */
+  command error_t mount();
+
+  /**
+   * Report success or failure of mount operation. If the mount failed,
+   * no operation should be perfomed on the volume. Note that success
+   * should not be used to indicate that the volume contains valid data,
+   * rather failure indicates some major internal problem that prevents
+   * the volume from being used.
+   *
+   * @param error SUCCESS if the mount succeeded, FAIL otherwise.
+   */
+  event void mountDone(error_t error);
+}
diff --git a/tos/interfaces/Notify.nc b/tos/interfaces/Notify.nc
new file mode 100644
index 00000000..49794acb
--- /dev/null
+++ b/tos/interfaces/Notify.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Notify interface is intended for delivery of values from
+ * self-triggered devices, at relatively low rates. For example, a
+ * driver for a motion detector or a switch might provide this
+ * interface. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, both calls must be
+ * guaranteed to succeed. This interface should be used when a single
+ * logical unit supports both getting and setting.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface Notify {
+  /**
+   * Enables delivery of notifications from the device to the calling
+   * generic client component.
+   *
+   * @return SUCCESS if notifications were enabled
+   */
+  command error_t enable();
+
+  /**
+   * Disables delivery of notifications from the device to the calling
+   * generic client component.
+   *
+   * @return SUCCESS if notifications were disabled
+   */
+  command error_t disable();
+
+  /**
+   * Signals the arrival of a new value from the device.
+   *
+   * @param val the value arriving from the device
+   */
+  event void notify( val_t val );
+}
diff --git a/tos/interfaces/Packet.nc b/tos/interfaces/Packet.nc
new file mode 100644
index 00000000..14d4e3e6
--- /dev/null
+++ b/tos/interfaces/Packet.nc
@@ -0,0 +1,110 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The basic message data type accessors. Protocols may use
+  * additional packet interfaces for their protocol specific
+  * data/metadata.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see    TEP 116: Packet Protocols
+  */ 
+
+
+#include 
+
+interface Packet {
+
+
+  /**
+    * Clear out this packet.  Note that this is a deep operation and
+    * total operation: calling clear() on any layer will completely
+    * clear the packet for reuse.
+    * @param  msg    the packet to clear
+    */
+
+  command void clear(message_t* msg);
+
+  /**
+    * Return the length of the payload of msg. This value may be less
+    * than what maxPayloadLength() returns, if the packet is smaller than
+    * the MTU. If a communication component does not support variably
+    * sized data regions, then payloadLength() will always return
+    * the same value as maxPayloadLength(). 
+    *
+    * @param  msg    the packet to examine
+    * @return        the length of its current payload
+    */
+
+  command uint8_t payloadLength(message_t* msg);
+
+  /**
+    * Set the length field of the packet. This value is not checked
+    * for validity (e.g., if it is larger than the maximum payload
+    * size). This command is not used when sending packets, as calls
+    * to send include a length parameter. Rather, it is used by
+    * components, such as queues, that need to buffer requests to
+    * send.  This command allows the component to store the length
+    * specified in the request and later recover it when actually
+    * sending.
+    *
+    * @param msg   the packet
+    * @param len   the value to set its length field to
+    */
+
+  command void setPayloadLength(message_t* msg, uint8_t len);
+
+ /**
+   * Return the maximum payload length that this communication layer
+   * can provide. Note that, depending on protocol fields, a given
+   * request to send a packet may not be able to send the maximum
+   * payload length (e.g., if there are variable length
+   * fields). Protocols may provide specialized interfaces for these
+   * circumstances.
+   *
+   * @return   the maximum size payload allowed by this layer
+   */
+  command uint8_t maxPayloadLength();
+
+ /**
+   * Return a pointer to a protocol's payload region in a packet.  If
+   * len is not NULL, getPayload will return the length of the payload
+   * in it, which is the same as the return value from
+   * payloadLength(). If a protocol does not support variable length
+   * packets, then *len is equal to maxPayloadLength().
+   *
+   * @param msg   the packet
+   * @param len   pointer to where the current payload length should be stored.
+   * @return      a pointer to the packet's data payload for this layer
+   */
+  command void* getPayload(message_t* msg, uint8_t* len);
+
+}
diff --git a/tos/interfaces/PacketAcknowledgements.nc b/tos/interfaces/PacketAcknowledgements.nc
new file mode 100644
index 00000000..09879090
--- /dev/null
+++ b/tos/interfaces/PacketAcknowledgements.nc
@@ -0,0 +1,76 @@
+/*									tab:4
+ * "Copyright (c) 2000-2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * This interface allows a component to enable or disable acknowledgments
+ * on a per-packet basis.
+ *
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   June 21 2006
+ */
+
+interface PacketAcknowledgements {
+
+  /**
+   * Tell a protocol that when it sends this packet, it should use synchronous
+   * acknowledgments.
+   * The acknowledgment is synchronous as the caller can check whether the
+   * ack was received through the wasAcked() command as soon as a send operation
+   * completes.
+   *
+   * @param msg - A message which should be acknowledged when transmitted.
+   * @return SUCCESS if acknowledgements are enabled, EBUSY
+   * if the communication layer cannot enable them at this time, FAIL
+   * if it does not support them.
+   */
+  
+  async command error_t requestAck( message_t* msg );
+
+  /**
+   * Tell a protocol that when it sends this packet, it should not use
+   * synchronous acknowledgments.
+   *
+   * @param msg - A message which should not be acknowledged when transmitted.
+   * @return SUCCESS if acknowledgements are disabled, EBUSY
+   * if the communication layer cannot disable them at this time, FAIL
+   * if it cannot support unacknowledged communication.
+   */
+
+  async command error_t noAck( message_t* msg );
+
+  /**
+   * Tell a caller whether or not a transmitted packet was acknowledged.
+   * If acknowledgments on the packet had been disabled through noAck(),
+   * then the return value is undefined. If a packet
+   * layer does not support acknowledgements, this command must return always
+   * return FALSE.
+   *
+   * @param msg - A transmitted message.
+   * @return Whether the packet was acknowledged.
+   *
+   */
+  
+  async command bool wasAcked(message_t* msg);
+  
+}
diff --git a/tos/interfaces/ParameterInit.nc b/tos/interfaces/ParameterInit.nc
new file mode 100644
index 00000000..1b90b119
--- /dev/null
+++ b/tos/interfaces/ParameterInit.nc
@@ -0,0 +1,54 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * A synchronous initialization interface that takes a single parameter.
+  *
+  * @author Philip Levis
+  * @date   June 6 2005
+  * @see    TEP 107: Boot Sequence
+  */ 
+
+
+#include "TinyError.h"
+
+interface ParameterInit  {
+
+  /**
+   * Initialize this component. Initialization should not assume that
+   * any component is running: init() cannot call any commands besides
+   * those that initialize other components. This command behaves
+   * identically to Init.init, except that it takes a parameter.
+   *
+   * @param   param   the initialization parameter
+   * @return          SUCCESS if initialized properly, FAIL otherwise.
+   */
+  command error_t init(parameter param);
+}
diff --git a/tos/interfaces/Pool.nc b/tos/interfaces/Pool.nc
new file mode 100644
index 00000000..db45aae1
--- /dev/null
+++ b/tos/interfaces/Pool.nc
@@ -0,0 +1,97 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  An allocation pool of a specific type memory objects.
+ *  The Pool allows components to allocate (get)
+ *  and deallocate (put) elements. The pool
+ *  does not require that deallocations be items which were
+ *  originally allocated. E.g., a program can create two
+ *  pools of the same type and pass items between them.
+ *  This allows, for example, a component to allocate a pool
+ *  of message buffers and freely buffer swap them on
+ *  Receive.receive events.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date$
+ */
+
+   
+interface Pool {
+
+  /**
+    * Returns whether there any elements remaining in the pool.
+    * If empty returns TRUE, then get will return
+    * NULL. If empty returns FALSE, then get will
+    * return a pointer to an object.
+    *
+    * @return Whether the pool is empty.
+    */
+
+  command bool empty();
+
+  /**
+    * Returns how many elements are in the pool. If size
+    * returns 0, empty() will return TRUE. If size returns
+    * a non-zero value, empty() will return FALSE. The
+    * return value of size is always <e; the return
+    * value of maxSize().
+    *
+    * @return How many elements are in the pool.
+    */
+  command uint8_t size();
+  
+  /**
+    * Returns the maximum number of elements in the pool
+    * (the size of a full pool).
+    *
+    * @return Maximum size.
+    */
+  command uint8_t maxSize();
+
+  /**
+    * Deallocate an object, putting it back into the pool.
+    *
+    * @return SUCCESS if the entry was put in successfully, FAIL
+    * if the pool is full.
+    */
+  command error_t put(t* newVal);
+
+  /**
+    * Allocate an element from the pool.
+    *
+    * @return A pointer if the pool is not empty, NULL if
+    * the pool is empty.
+    */
+  command t* get();
+}
diff --git a/tos/interfaces/Queue.nc b/tos/interfaces/Queue.nc
new file mode 100644
index 00000000..9f621df7
--- /dev/null
+++ b/tos/interfaces/Queue.nc
@@ -0,0 +1,102 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  Interface to a FIFO list (queue) that contains items
+ *  of a specific type. The queue has a maximum size.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date$
+ */
+
+   
+interface Queue {
+
+  /**
+   * Returns if the queue is empty.
+   *
+   * @return Whether the queue is empty.
+   */
+  command bool empty();
+
+  /**
+   * The number of elements currently in the queue.
+   * Always less than or equal to maxSize().
+   *
+   * @return The number of elements in the queue.
+   */
+  command uint8_t size();
+
+  /**
+   * The maximum number of elements the queue can hold.
+   *
+   * @return The maximum queue size.
+   */
+  command uint8_t maxSize();
+
+  /**
+   * Get the head of the queue without removing it. If the queue
+   * is empty, the return value is undefined.
+   *
+   * @return The head of the queue.
+   */
+  command t head();
+  
+  /**
+   * Remove the head of the queue. If the queue is empty, the return
+   * value is undefined.
+   *
+   * @return The head of the queue.
+   */
+  command t dequeue();
+
+  /**
+   * Enqueue an element to the tail of the queue.
+   *
+   * @param newVal - the element to enqueue
+   * @return SUCCESS if the element was enqueued successfully, FAIL
+   *                 if it was not enqueued.
+   */
+  command error_t enqueue(t newVal);
+
+  /**
+   * Return the nth element of the queue without dequeueing it, 
+   * where 0 is the head of the queue and (size - 1) is the tail. 
+   * If the element requested is larger than the current queue size,
+   * the return value is undefined.
+   *
+   * @param index - the index of the element to return
+   * @return the requested element in the queue.
+   */
+  command t element(uint8_t idx);
+}
diff --git a/tos/interfaces/README b/tos/interfaces/README
new file mode 100644
index 00000000..aac31ad1
--- /dev/null
+++ b/tos/interfaces/README
@@ -0,0 +1,2 @@
+Update this.
+
diff --git a/tos/interfaces/RadioTimeStamping.nc b/tos/interfaces/RadioTimeStamping.nc
new file mode 100644
index 00000000..53b671e9
--- /dev/null
+++ b/tos/interfaces/RadioTimeStamping.nc
@@ -0,0 +1,51 @@
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/**
+ * Interface for receiving time stamp information from the radio.
+ * This information is also embedded in packet metadata.
+ *
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   October 10 2005
+ *
+ */
+
+interface RadioTimeStamping
+{
+  /** 
+   * Provides the time at which start of frame delimiter has been
+   * transmitted: units are in terms of a 32kHz clock.
+   */
+  async event void transmittedSFD( uint16_t time, message_t* p_msg );
+  
+  /** 
+   * Provides the time at which start of frame delimiter was received:
+   * units are in terms of a 32kHz clock.  NOTE that receiving
+   * a receivedSFD() event does NOT mean that a packet will be
+   * received; the transmission may stop, become corrupted, or be
+   * filtered by the physical or link layers.  The number of rxSFD
+   * events will always be great than or equal to the number of
+   * Receive message events.
+   */
+  async event void receivedSFD( uint16_t time );
+}
diff --git a/tos/interfaces/Random.nc b/tos/interfaces/Random.nc
new file mode 100644
index 00000000..bba47921
--- /dev/null
+++ b/tos/interfaces/Random.nc
@@ -0,0 +1,45 @@
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** 
+  * Interface for generating 16-bit and 32-bit random numbers.
+  *
+  * @author Barbara Hohlt 
+  * @date   March 1 2005 
+  */ 
+interface Random
+{
+    /** 
+     * Produces a 32-bit pseudorandom number. 
+     * @return Returns the 32-bit pseudorandom number.
+     */
+  async command uint32_t rand32();
+
+    /** 
+     * Produces a 32-bit pseudorandom number. 
+     * @return Returns low 16 bits of the pseudorandom number.
+     */
+  async command uint16_t rand16();
+
+}
+
+    
diff --git a/tos/interfaces/Read.nc b/tos/interfaces/Read.nc
new file mode 100644
index 00000000..65e3a54e
--- /dev/null
+++ b/tos/interfaces/Read.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Read interface is intended for split-phase low-rate or
+ * high-latency reading of small values. The type of the value is
+ * given as a template argument. Because this interface is
+ * split-phase, these values may be backed by hardware, or a
+ * long-running computation.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface Read {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read();
+
+  /**
+   * Signals the completion of the read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val the value that has been read
+   */
+  event void readDone( error_t result, val_t val );
+}
diff --git a/tos/interfaces/ReadNow.nc b/tos/interfaces/ReadNow.nc
new file mode 100644
index 00000000..1eaaba4b
--- /dev/null
+++ b/tos/interfaces/ReadNow.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadNow interface is intended for split-phase low-latency
+ * reading of small values. The type of the value is given as a
+ * template argument. Because this interface is split-phase, these
+ * values may be backed by hardware. Providers of this interface
+ * should also provide a Resource interface, and this interface should
+ * only be used after the resource has been acquired. Otherwise, the
+ * low-latency requirement may be impossible to meet.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface ReadNow {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  async command error_t read();
+
+  /**
+   * Signals the completion of the read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val the value that has been read
+   */
+  async event void readDone( error_t result, val_t val );
+}
diff --git a/tos/interfaces/ReadRef.nc b/tos/interfaces/ReadRef.nc
new file mode 100644
index 00000000..744b5bc7
--- /dev/null
+++ b/tos/interfaces/ReadRef.nc
@@ -0,0 +1,68 @@
+/**
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadRef interface is intended for split-phase low-rate or
+ * high-latency reading of large values. The type of the value is
+ * given as a template argument. When a value is too large to be
+ * comfortably passed on the stack, the caller should allocate space
+ * for the value and pass the pointer to read(). When the readDone()
+ * comes back, the space will be filled with the new value.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface ReadRef {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @param val a pointer to space that will be filled by the value
+   *
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read( val_t* val );
+  
+  /**
+   * Signals the completion of the read(). The returned pointer will
+   * be the same as the original pointer passed to read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val a pointer to the value that has been read
+   */
+  event void readDone( error_t result, val_t* val );
+}
diff --git a/tos/interfaces/ReadStream.nc b/tos/interfaces/ReadStream.nc
new file mode 100644
index 00000000..0e30da48
--- /dev/null
+++ b/tos/interfaces/ReadStream.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadStream interface is intended for buffered high data rate
+ * reading, usually from sensor devices. The type of the values being
+ * read is given as a template argument. 
+ *
+ * 
     To use this interface, allocate one or more buffers in your own
+ * space. Then, call postBuffer to pass these buffers into the
+ * device. Call read() to begin the sampling process. The buffers will
+ * be filled in the order originally posted, and a bufferDone() event
+ * will be signaled once each buffer has been filled with data. At any
+ * time while the read() is running, you may post new buffers to be
+ * filled. If the lower layer finishes signaling readDone() and then
+ * finds that no more buffers have been posted, it will consider the
+ * read to be finished, and signal readDone(). 
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface ReadStream {
+  /**
+   * Passes a buffer to the device, and indicates how many values
+   * should be placed into the buffer. Make sure your count doesn't
+   * overrun the buffer.
+   *
+   * @param buf a pointer to the buffer
+   * @param count the number of values the buffer should hold
+   *
+   * @return SUCCESS if the post was successful
+   */
+  command error_t postBuffer(val_t* buf, uint16_t count);
+
+  /**
+   * Directs the device to start filling buffers by sampling with the
+   * specified period. 
+   * 
+   * @param usPeriod the between-sample period in microseconds
+   * 
+   * @return SUCCESS if the reading process began
+   */
+  command error_t read(uint32_t usPeriod);
+
+  /**
+   * Signalled when a previously posted buffer has been filled by the
+   * device. In the event of a read error, result will not equal
+   * SUCCESS, and the buffer will be filled with zeroes.
+   *
+   * @param result SUCCESS if the buffer was filled without errors
+   * @param buf a pointer to the buffer that has been filled
+   * @param count the number of values actually read
+   */
+  event void bufferDone(error_t result, 
+			 val_t* buf, uint16_t count);
+
+  /**
+   * Signalled when a buffer has been filled but no more buffers have
+   * been posted. In the event of a read error, all previously posted
+   * buffers will have their bufferDone() event signalled, and then
+   * this event will be signalled with a non-SUCCESS argument.
+   *
+   * @param result SUCCESS if all buffers were filled without errors
+   * @param usActualPeriod Actual sampling period used - may be different
+   *   from period requested at read time. Undefined if result != SUCCESS.
+   */
+  event void readDone(error_t result, uint32_t usActualPeriod);
+}    
+
diff --git a/tos/interfaces/Receive.nc b/tos/interfaces/Receive.nc
new file mode 100644
index 00000000..91a8d6a8
--- /dev/null
+++ b/tos/interfaces/Receive.nc
@@ -0,0 +1,91 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The basic message reception interface. 
+ *
+ * @author Philip Levis
+ * @date   November 16, 2004
+ * @see    Packet
+ * @see    Send
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+
+#include 
+#include 
+
+interface Receive {
+
+  /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as msg, as long as the handling
+   * component copies out the data it needs.
+   *
+   * Note that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  msg      the receied packet
+   * @param  payload  a pointer to the packet's payload
+   * @param  len      the length of the data region pointed to by payload
+   * @return          a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  
+  event message_t* receive(message_t* msg, void* payload, uint8_t len);
+
+  /**
+   * Return point to a protocol's payload region in a packet.  If len
+   * is not NULL, getPayload will return the length of the payload in
+   * it. This call is identical to Packet.getPayload, and is
+   * included in Receive as a convenience.
+   *
+   * @param  msg      the packet
+   * @param  len      a pointer to where to store the payload length
+   * @return          a pointer to the payload of the packet
+   */
+  command void* getPayload(message_t* msg, uint8_t* len);
+
+  /**
+   * Return the length of the payload of msg. This call is identical
+   * to Packet.payloadLength, and is included in Receive as a
+   * convenience.
+   *
+   * @param  msg      the packet
+   * @return          the length of the packet's payload
+   */
+  command uint8_t payloadLength(message_t* msg);
+  
+}
diff --git a/tos/interfaces/Resource.nc b/tos/interfaces/Resource.nc
new file mode 100644
index 00000000..79aae166
--- /dev/null
+++ b/tos/interfaces/Resource.nc
@@ -0,0 +1,112 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.

    
+ *
+ * The Resource interface can be used to gain access to
+ * shared resources.  It is always offered as a parameterized
+ * interface, and its users gain access to the resource through some
+ * predefined arbitration policy.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface Resource {
+  /**
+   * Request access to a shared resource. You must call release()
+   * when you are done with it.
+   *
+   * @return SUCCESS When a request has been accepted. The granted()
+   *                 event will be signaled once you have control of the
+   *                 resource.
    
+   *         EBUSY You have already requested this resource and a
+   *               granted event is pending
+   */
+  async command error_t request();
+   
+  /**
+   * Request immediate access to a shared resource. You must call 
+   * release() when you are done with it.
+   *
+   * @return SUCCESS You now have cotnrol of the resource.
    
+   *         EBUSY The resource is busy.  You must try again later
+   */
+  async command error_t immediateRequest();
+
+  /**
+   * You are now in control of the resource. Note that this event
+   * is NOT signaled when immediateRequest() succeeds.
+   */
+  event void granted();
+   
+  /**
+   * Release a shared resource you previously acquired.
+   */
+  async command void release();
+
+  /**
+   *  Check if the user of this interface is the current
+   *  owner of the Resource
+   *  @return TRUE  It is the owner 
    
+   *          FALSE It is not the owner
+   */
+  async command bool isOwner();
+}
diff --git a/tos/interfaces/ResourceConfigure.nc b/tos/interfaces/ResourceConfigure.nc
new file mode 100644
index 00000000..f6fec1e8
--- /dev/null
+++ b/tos/interfaces/ResourceConfigure.nc
@@ -0,0 +1,56 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ *
+ */
+ 
+ /**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.

    
+ * 
+ * This interface is provided by a Resource arbiter in order to allow
+ * users of a shared resource to configure that resource just before being
+ * granted access to it.  It will always be parameterized along side 
+ * a parameterized Resource interface, with the ids from one mapping directly
+ * onto the ids of the other.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface ResourceConfigure {
+  /**
+   * Used to configure a resource just before being granted access to it.
+   * Must always be used in conjuntion with the Resource interface.
+   */
+  async command void configure();
+
+  /**
+   * Used to unconfigure a resource just before releasing it.
+   * Must always be used in conjuntion with the Resource interface.
+   */
+  async command void unconfigure();
+} 
diff --git a/tos/interfaces/ResourceController.nc b/tos/interfaces/ResourceController.nc
new file mode 100644
index 00000000..048fc697
--- /dev/null
+++ b/tos/interfaces/ResourceController.nc
@@ -0,0 +1,130 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.

    
+ *
+ * This interface is an extension of the Resource interface.  It has all of the
+ * commands and events present in the Resource interface, along with two additional
+ * events.  These events allow the user of this interface to be notified whenever
+ * someone requests the use of a resource or whenever the resource becomes idle.
+ * One could use this interface to control access to a resource by always
+ * taking control of a resource whenever it has gone idle and deciding when to
+ * release it based on requests from other users.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+interface ResourceController {
+  /**
+   * Request access to a shared resource. You must call release()
+   * when you are done with it.
+   *
+   * @return SUCCESS When a request has been accepted. The granted()
+   *                 event will be signaled once you have control of the
+   *                 resource.
    
+   *         EBUSY You have already requested this resource and a
+   *               granted event is pending
+  */
+  async command error_t request();
+   
+  /**
+  * Request immediate access to a shared resource. You must call
+  * release() when you are done with it.
+  *
+  * @return SUCCESS You now have cotnrol of the resource.
    
+  *         EBUSY The resource is busy.  You must try again later
+  */
+  async command error_t immediateRequest();
+
+  /**
+  * You are now in control of the resource. Note that this event
+  * is NOT signaled when immediateRequest() succeeds.
+  */
+  event void granted();
+   
+  /**
+  * Release a shared resource you previously acquired.
+  */
+  async command void release();
+
+  /**
+   *  Check if the user of this interface is the current
+   *  owner of the Resource
+   *  @return TRUE  It is the owner 
    
+   *          FALSE It is not the owner
+   */
+  async command bool isOwner();
+
+  /**
+   * This event is signalled whenever the user of this interface
+   * currently has control of the resource, and another user requests
+   * it.  You may want to consider releasing a resource based on this
+   * event
+   */
+  async event void requested();
+
+  /**
+   * Event sent to the resource controller whenever a resource goes idle.
+   * That is to say, whenever no one currently owns the resource, and there
+   * are no more pending requests
+   */
+  async event void idle(); 
+}
diff --git a/tos/interfaces/Scheduler.nc b/tos/interfaces/Scheduler.nc
new file mode 100644
index 00000000..467011a5
--- /dev/null
+++ b/tos/interfaces/Scheduler.nc
@@ -0,0 +1,63 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The interface to a TinyOS task scheduler.
+  *
+  * @author Philip Levis
+  * @date   January 19 2005
+  * @see TEP 106: Tasks and Schedulers
+  * @see TEP 107: Boot Sequence
+  */ 
+
+
+interface Scheduler {
+
+  /** 
+   * Initialize the scheduler.
+   */
+  command void init();
+
+  /** 
+    * Run the next task if one is waiting, otherwise return immediately. 
+    *
+    * @return        whether a task was run -- TRUE indicates a task
+    *                ran, FALSE indicates there was no task to run.
+    */
+  command bool runNextTask();
+
+  /**
+   * Enter an infinite task-running loop. Put the MCU into a low power
+   * state when the processor is idle (task queue empty, waiting for
+   * interrupts). This call never returns.
+   */
+  command void taskLoop();
+}
+
diff --git a/tos/interfaces/Send.nc b/tos/interfaces/Send.nc
new file mode 100644
index 00000000..897f1dac
--- /dev/null
+++ b/tos/interfaces/Send.nc
@@ -0,0 +1,116 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The basic address-free message sending interface. 
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see    Packet
+  * @see    Receive
+  */ 
+
+
+#include 
+#include 
+
+interface Send {
+
+  /** 
+    * Send a packet with a data payload of len. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   msg     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  command error_t send(message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was cancelled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully cancelled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    *
+    * @param   msg    the packet whose transmission should be cancelled
+    * @return         SUCCESS if the packet was successfully cancelled, FAIL
+    *                 otherwise
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. msg
+    * is the sent buffer, and error indicates whether the
+    * send was succesful, and if not, the cause of the failure.
+    * 
+    * @param msg   the message which was requested to send
+    * @param error SUCCESS if it was transmitted successfully, FAIL if
+    *              it was not, ECANCEL if it was cancelled via cancel
+    */ 
+  event void sendDone(message_t* msg, error_t error);
+
+   /**
+   * Return the maximum payload length that this communication layer
+   * can provide. This command behaves identically to
+   * Packet.maxPayloadLength and is included in this
+   * interface as a convenience.
+   *
+   * @return  the maximum payload length
+   */
+
+  
+  command uint8_t maxPayloadLength();
+
+
+   /**
+    * Return a pointer to a protocol's payload region in a packet.
+    * The length of this region is maxPayloadLength(). This command
+    * behaves similarly to Packet.getPayload (minus the
+    * length parameter) and is included in this interface
+    * as a convenience.
+    *
+    * @param   msg    the packet
+    * @return         a pointer to the packet's payload
+    */
+  command void* getPayload(message_t* msg);
+
+}
diff --git a/tos/interfaces/Set.nc b/tos/interfaces/Set.nc
new file mode 100644
index 00000000..6285e381
--- /dev/null
+++ b/tos/interfaces/Set.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Set interface is intended for synchronous writing of small
+ * values. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, the set() call must
+ * be guaranteed to succeed.
+ *
+ * 
    
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface Set {
+  /**
+   * Stores a value of type val_t.
+   *
+   * @param val the value to be stored
+   */
+  command void set( val_t val );
+}
diff --git a/tos/interfaces/SpiByte.nc b/tos/interfaces/SpiByte.nc
new file mode 100644
index 00000000..5898cedc
--- /dev/null
+++ b/tos/interfaces/SpiByte.nc
@@ -0,0 +1,35 @@
+// $Id$
+
+/*                                                                      tab:2
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ */
+interface SpiByte
+{
+  /**
+   * Synchronous transmit and receive (can be in interrupt context)
+   * @param tx Byte to transmit
+   * @param rx Received byte is stored here.
+   */
+  async command void write( uint8_t tx, uint8_t* rx );
+}
diff --git a/tos/interfaces/SpiPacket.nc b/tos/interfaces/SpiPacket.nc
new file mode 100644
index 00000000..20c29f2a
--- /dev/null
+++ b/tos/interfaces/SpiPacket.nc
@@ -0,0 +1,74 @@
+// $Id$
+
+/*                                                                      tab:2
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * SPI Packet/buffer interface for sending data over an SPI bus.  This
+ * interface provides a split-phase send command which can be used for
+ * sending, receiving or both. It is a "send" command because reading
+ * from the SPI requires writing bytes. The send call allows NULL
+ * parameters for receive or send only operations. This interface is
+ * for buffer based transfers where the microcontroller is the master
+ * (clocking) device.
+ *
+ * Often, an SPI bus must first be acquired using a Resource interface
+ * before sending commands with SPIPacket. In the case of multiple
+ * devices attached to a single SPI bus, chip select pins are often also
+ * used.
+ *
+ * @author Philip Levis
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * Revision:  $Revision$
+ */
+interface SpiPacket {
+
+  /**
+   * Send a message over the SPI bus.
+   *
+   * @param txBuf A pointer to the buffer to send over the bus. If this
+   *              parameter is NULL, then the SPI will send zeroes.
+   * @param rxBuf A pointer to the buffer where received data should
+   *              be stored. If this parameter is NULL, then the SPI will
+   *              discard incoming bytes.
+   * @param len   Length of the message.  Note that non-NULL rxBuf and txBuf
+   *              parameters must be AT LEAST as large as len, or the SPI
+   *              will overflow a buffer.
+   *
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+
+  /**
+   * Notification that the send command has completed.
+   *
+   * @param txBuf The buffer used for transmission
+   * @param rxBuf The buffer used for reception
+   * @param len    The request length of the transfer, but not necessarily
+   *               the number of bytes that were actually transferred
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                             error_t error );
+
+}
diff --git a/tos/interfaces/SplitControl.nc b/tos/interfaces/SplitControl.nc
new file mode 100644
index 00000000..b60f2066
--- /dev/null
+++ b/tos/interfaces/SplitControl.nc
@@ -0,0 +1,111 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */ 
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.

    
+ *
+ * This is the split-phase counterpart to the StdContol interface.  It
+ * should be used for switching between the on and off power states of
+ * the component providing it.  For each start() or
+ * stop() command, if the command returns SUCCESS, then a
+ * corresponding  startDone() or stopDone() event
+ * must be signalled.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface SplitControl
+{
+  /**
+   * Start this component and all of its subcomponents.  Return
+   * values of SUCCESS will always result in a startDone()
+   * event being signalled.
+   *
+   * @return SUCCESS if issuing the start command was successful
    
+   *         EBUSY if the component is in the middle of powering down
+   *               i.e. a stop() command has been called,
+   *               and a stopDone() event is pending
    
+   *         FAIL Otherwise
+   */
+  command error_t start();
+
+  /** 
+   * Notify caller that the component has been started and is ready to
+   * receive other commands.
+   *
+   * @param error -- SUCCESS if the component was successfully
+   *                        turned on, FAIL otherwise
+   */
+  event void startDone(error_t error);
+
+  /**
+   * Stop the component and pertinent subcomponents (not all
+   * subcomponents may be turned off due to wakeup timers, etc.).
+   * Return values of SUCCESS will always result in a
+   * stopDone() event being signalled.
+   *
+   * @return SUCCESS if issuing the stop command was successful
    
+   *         EBUSY if the component is in the middle of powering up
+   *               i.e. a start() command has been called,
+   *               and a startDone() event is pending
    
+   *         FAIL Otherwise
+   */
+  command error_t stop();
+
+  /**
+   * Notify caller that the component has been stopped.
+   *
+  * @param error -- SUCCESS if the component was successfully
+  *                        turned off, FAIL otherwise
+   */
+  event void stopDone(error_t error);
+}
diff --git a/tos/interfaces/StdControl.nc b/tos/interfaces/StdControl.nc
new file mode 100644
index 00000000..1a6a3fb3
--- /dev/null
+++ b/tos/interfaces/StdControl.nc
@@ -0,0 +1,83 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.

    
+ *
+ * This interface is used to switch between
+ * the on and off power states of the component providing it.  A call to the
+ * start() command is a request to switch a component into the
+ * on state, and a call to the stop() is a request to switch a
+ * component into the off state.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface StdControl
+{
+  /**
+  * Start this component and all of its subcomponents.
+  *
+  * @return SUCCESS if the component was successfully turned on
    
+  *         FAIL otherwise
+  */
+  command error_t start();
+
+  /**
+  * Stop the component and any pertinent subcomponents (not all
+  * subcomponents may be turned off due to wakeup timers, etc.).
+  *
+  * @return SUCCESS if the component was successfully turned off
    
+  *         FAIL otherwise
+  */
+  command error_t stop();
+}
diff --git a/tos/interfaces/TaskBasic.nc b/tos/interfaces/TaskBasic.nc
new file mode 100644
index 00000000..948eff52
--- /dev/null
+++ b/tos/interfaces/TaskBasic.nc
@@ -0,0 +1,66 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * The basic TinyOS task interface. Components generally do not wire to
+  * this interface: the nesC compiler handles it automatically through the
+  * post and task keywords.
+  *
+  * @author Philip Levis
+  * @date   January 12, 2005
+  * @see    TEP 106: Tasks and Schedulers
+  */ 
+
+
+#include "TinyError.h"
+
+interface TaskBasic {
+
+  /**
+   * Post this task to the TinyOS scheduler. At some later time,
+   * depending on the scheduling policy, the scheduler will signal the
+   * run() event. 
+   *
+   * @return SUCCESS if task was successfuly
+   * posted; the semantics of a non-SUCCESS return value depend on the
+   * implementation of this interface (the class of task).
+   */
+  
+  async command error_t postTask();
+
+  /**
+   * Event from the scheduler to run this task. Following the TinyOS
+   * concurrency model, the codes invoked from run() signals
+   * execute atomically with respect to one another, but can be
+   * preempted by async commands/events.
+   */
+  event void runTask();
+}
+
diff --git a/tos/lib/byte_radio/ChannelMonitor.nc b/tos/lib/byte_radio/ChannelMonitor.nc
new file mode 100644
index 00000000..208956ba
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitor.nc
@@ -0,0 +1,67 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+ 
+ /**
+ * 
+ * This interface is an abstraction of Clear Channel Assessment (CCA) in byte radios.
+ * It provides commands and events to perform CCA.
+ *
+ * @see ChannelMonitorControl
+ * @see ChannelMonitorData
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface ChannelMonitor {
+    /** 
+    * Start observing the channel.
+    * Either the event channelBusy() or channelIdle() will be indicated.
+    *
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+    async command error_t start();
+
+    /**
+     *  Indicates that the channel is busy.
+     */
+    async event void channelBusy();
+
+    /** 
+     *  Indicates that the channel is idle.
+     */
+    async event void channelIdle();
+    
+    /**
+     * Tells the channel monitor that the last busy event
+     * actually indicated a message.
+     */
+    async command void rxSuccess();
+}
+
diff --git a/tos/lib/byte_radio/ChannelMonitorControl.nc b/tos/lib/byte_radio/ChannelMonitorControl.nc
new file mode 100644
index 00000000..73a00ae6
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitorControl.nc
@@ -0,0 +1,55 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+* This control interface is used by byte radio CCA components based on RSSI 
+* valid detection with a floating threshold.
+*
+* @see ChannelMonitor
+* @see ChannelMonitorData
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+* @author Andreas Koepke (koepke@tkn.tu-berlin.de)
+*/
+interface ChannelMonitorControl
+{
+  /**
+  * Update the noise floor.
+  *
+  * @return SUCCESS if the noise floor can be updated
+  *         FAIL otherwise.
+  */
+  async command error_t updateNoiseFloor();
+  
+  /**
+  * Indicates that the noisefloor has been updated.
+  */
+  event void updateNoiseFloorDone();
+}
diff --git a/tos/lib/byte_radio/ChannelMonitorData.nc b/tos/lib/byte_radio/ChannelMonitorData.nc
new file mode 100644
index 00000000..c6914fef
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitorData.nc
@@ -0,0 +1,82 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * This interface is used by byte radio CCA components based on RSSI 
+ * valid detection with a floating threshold.
+ *
+ * It provides commands and events to read the Signal to Noise Ratio 
+ * (SNR) and noisefloor of the radio channel.
+ *
+ * @see ChannelMonitor
+ * @see ChannelMonitorControl 
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+interface ChannelMonitorData
+{
+    /** 
+     * Sets the gradient for the conversion of mV and dB. 
+     *
+     *  @param grad This is calculated as grad = mV/dB
+     */
+    async command void setGradient(int16_t grad);
+    
+    /**
+     * Returns the currently used gradient to convert between
+     * dB and mV.
+     *
+     * @return The currently used gradient.
+     */ 
+    async command int16_t getGradient();
+
+    /** 
+     * Starts the SNR measurement 
+     * 
+     * @returns SUCCESS on success
+     *          FAIL otherwise.
+     */
+    async command error_t getSnr();
+    
+    /**
+     * Returns the SNR value in dB.
+     *
+     * @param snr The SNR value in dB.
+    */
+    async event void getSnrDone(int16_t snr);
+
+    /** 
+     * Get the noisefloor in mV.
+     *
+     * @return The noisefloor in mV.
+     */
+    async command uint16_t getNoiseFloor();
+}
diff --git a/tos/lib/byte_radio/LinkLayerC.nc b/tos/lib/byte_radio/LinkLayerC.nc
new file mode 100644
index 00000000..02dd7682
--- /dev/null
+++ b/tos/lib/byte_radio/LinkLayerC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+ /**
+ * This is the configuration for a really simple link layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */
+configuration LinkLayerC {
+   provides {
+     interface SplitControl;
+     interface Send;
+     interface Receive;
+     interface PacketAcknowledgements;
+   }
+   uses {
+     interface SplitControl as MacSplitControl;
+     interface SplitControl as RadioSplitControl;
+     interface MacSend as SendDown;
+     interface MacReceive as ReceiveLower;     
+     interface Packet;   
+   }
+}
+implementation
+{
+  components LinkLayerP as Llc,
+             MainC;
+  
+    MainC.SoftwareInit -> Llc;
+    SplitControl = Llc;
+    MacSplitControl =  Llc.MacSplitControl;
+    RadioSplitControl =  Llc.RadioSplitControl;
+    Send = Llc.Send;
+    Receive = Llc.Receive;
+    Packet = Llc.Packet;
+    PacketAcknowledgements = Llc;    
+    ReceiveLower = Llc.ReceiveLower;
+    SendDown = Llc.SendDown;
+}
diff --git a/tos/lib/byte_radio/LinkLayerP.nc b/tos/lib/byte_radio/LinkLayerP.nc
new file mode 100644
index 00000000..2bce43e8
--- /dev/null
+++ b/tos/lib/byte_radio/LinkLayerP.nc
@@ -0,0 +1,260 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "radiopacketfunctions.h"
+#include "message.h"
+
+/**
+ * This is the implementation of a really simple link layer. 
+ *
+ * @author Andreas Koepke 
+ */
+module LinkLayerP {
+    provides {
+      interface Init;
+      interface SplitControl;
+      interface Receive;
+      interface Send;
+      interface PacketAcknowledgements;
+    }
+    uses {
+      interface SplitControl as MacSplitControl;
+      interface SplitControl as RadioSplitControl;
+      interface MacSend as SendDown;
+      interface MacReceive as ReceiveLower;
+      interface Packet;
+    }
+}
+implementation
+{
+  /* Tx/Rx buffers & pointers */
+  message_t* txBufPtr;
+  message_t* rxBufPtr;
+  message_t  rxBuf;
+
+  /* packet vars */
+  uint8_t seqNo;              // for later use ...
+    
+  /* state vars */
+  error_t splitStateError;    // state of SplitControl interfaces
+  bool rxBusy;                // blocks an incoming packet if the rxBuffer is in use
+    
+// #define LLCM_DEBUG  
+    /**************** Helper functions ******/
+    void signalFailure() {
+#ifdef LLCM_DEBUG
+        atomic {
+            for(;;) {
+                ;
+            }
+        }
+#endif
+    }
+    
+    /**************** Init  *****************/
+    command error_t Init.init(){
+        atomic {
+          rxBufPtr = &rxBuf;
+          txBufPtr = 0;
+          seqNo = 0;
+          splitStateError = EOFF;
+          rxBusy = FALSE;
+        }
+        return SUCCESS;
+    }
+
+    /**************** Start  *****************/
+    void checkStartDone(error_t error) {
+      atomic {
+        if ( (splitStateError == SUCCESS) && (error == SUCCESS) ) {
+          signal SplitControl.startDone(SUCCESS);
+        } else if ( (error == SUCCESS) && (splitStateError == EOFF) ) {
+          splitStateError = SUCCESS;
+        } else {
+          signal SplitControl.startDone(FAIL);
+        }
+      }
+    }
+    
+    event void MacSplitControl.startDone(error_t error) {
+      checkStartDone(error);
+    }
+    
+    event void RadioSplitControl.startDone(error_t error) {
+      checkStartDone(error);
+    }
+    
+    command error_t SplitControl.start() {
+      call MacSplitControl.start();
+      call RadioSplitControl.start();
+      return SUCCESS;
+    }
+    /**************** Stop  *****************/
+    void checkStopDone(error_t error) {
+      atomic {
+        if ( (splitStateError == EOFF) && (error == SUCCESS) ) {
+          signal SplitControl.stopDone(SUCCESS);
+        } else if ( (error == SUCCESS) && (splitStateError == SUCCESS) ) {
+          splitStateError = EOFF;
+        } else {
+          signal SplitControl.stopDone(FAIL);
+        }
+      }
+    }
+    
+    event void MacSplitControl.stopDone(error_t error) {
+      checkStopDone(error);
+    }
+    
+    event void RadioSplitControl.stopDone(error_t error) {
+      checkStopDone(error);
+    }
+    
+    command error_t SplitControl.stop(){
+      call MacSplitControl.stop();
+      call RadioSplitControl.stop();
+      return SUCCESS;
+    }
+    /**************** Send ****************/
+    task void SendDoneSuccessTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, SUCCESS);
+    }
+    task void SendDoneCancelTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, ECANCEL); 
+    }
+    task void SendDoneFailTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, FAIL);
+    }
+    
+    command error_t Send.send(message_t *msg, uint8_t len) {
+      ++seqNo;  // where to put?
+      return call SendDown.send(msg, len);
+    }
+
+    command error_t Send.cancel(message_t* msg) {
+      return call SendDown.cancel(msg);
+    }
+    
+    command uint8_t Send.maxPayloadLength() {
+      return call Packet.maxPayloadLength();
+    }
+
+    command void* Send.getPayload(message_t* msg) {
+      return call Packet.getPayload(msg, (uint8_t*) (call Packet.payloadLength(msg)) );
+    }
+    
+    async event void SendDown.sendDone(message_t* msg, error_t error) { 
+        atomic {
+          txBufPtr = msg;
+          getMetadata(msg)->ack = 1; // this is rather stupid
+        }
+        if (error == SUCCESS) {
+          post SendDoneSuccessTask();
+        } else if (error == ECANCEL) {
+          post SendDoneCancelTask();
+        } else {
+          post SendDoneFailTask();
+        }
+    }
+    
+    /*************** Receive ***************/
+    task void ReceiveTask() {
+      void *payload;
+      uint8_t len;
+      message_t* tmpMsgPtr;
+      atomic {
+        len = call Packet.payloadLength(rxBufPtr);
+        payload = call Packet.getPayload(rxBufPtr, &len);
+        tmpMsgPtr = rxBufPtr;
+      }
+      tmpMsgPtr = signal Receive.receive(tmpMsgPtr, payload , len);
+      atomic {
+        rxBufPtr = tmpMsgPtr;
+        rxBusy = FALSE;
+      }
+    }
+    
+    async event message_t* ReceiveLower.receiveDone(message_t* msg) {
+      message_t* msgPtr;
+      atomic {
+        if (rxBusy) {
+          msgPtr = msg;
+        } else {
+          rxBusy = TRUE;
+          msgPtr = rxBufPtr;
+          rxBufPtr = msg;
+          post ReceiveTask();
+        }
+      } 
+      return msgPtr;
+    }
+    
+    command void* Receive.getPayload(message_t* msg, uint8_t* len) {
+      return call Packet.getPayload(msg, len);
+    }
+
+    command uint8_t Receive.payloadLength(message_t* msg) {
+      return call Packet.payloadLength(msg);
+    }
+
+    /*************** default events ***********/
+
+    /* for lazy buggers who do not want to do something with a packet */
+    default event void Send.sendDone(message_t* sent, error_t success) {
+    }
+
+    default event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+        return msg;
+    }     
+    
+    
+    /* PacketAcknowledgements interface */
+
+    async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+      return FAIL;
+    }
+
+    async command error_t PacketAcknowledgements.noAck(message_t* msg) {
+      return SUCCESS;
+    }
+
+    async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+      return FALSE;
+    }
+}
+
+
+
diff --git a/tos/lib/byte_radio/MacReceive.nc b/tos/lib/byte_radio/MacReceive.nc
new file mode 100644
index 00000000..8ad9302c
--- /dev/null
+++ b/tos/lib/byte_radio/MacReceive.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include 
+#include 
+
+/**
+ * This interface is similar to the Receive interface.
+ *   
+ * The interface provides one event in async context which indicates that
+ * a packet was received. It Is provided by the MAC layer ofi
+ * a byte radio.
+ *
+ * @see Receive
+ *
+ * @author Philipp Huppertz
+ */ 
+interface MacReceive {
+
+   /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as msg, as long as the handling
+   * component copies out the data it needs.
+   *
+   * Note that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  msg      the received packet
+   * @return          a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  async event message_t* receiveDone(message_t* msg);
+  
+}
diff --git a/tos/lib/byte_radio/MacSend.nc b/tos/lib/byte_radio/MacSend.nc
new file mode 100644
index 00000000..15479e99
--- /dev/null
+++ b/tos/lib/byte_radio/MacSend.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#include 
+#include 
+ 
+/** 
+  * This interface is similar to the Send interface.
+  *
+  * It provides the same basic functionality as the Send interface in async 
+  * context. It is provided by the MAC layer of byte radios. 
+  *
+  * @see    Send
+  *
+  * @author Philipp Huppertz
+  */ 
+interface MacSend {
+
+    /** 
+    * Send a packet with a data payload of len. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   msg     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  async command error_t send(message_t* msg, uint8_t len);
+  
+  /**
+  * Cancel a requested transmission. Returns SUCCESS if the 
+  * transmission was cancelled properly (not sent at all)
+  *
+  * @param   msg    the packet whose transmission should be cancelled
+  * @return         SUCCESS if the packet was successfully cancelled, FAIL
+  *                 otherwise
+  */
+  async command error_t cancel(message_t* msg);
+
+  /** 
+  * Signaled in response to an accepted send request. msg
+  * is the sent buffer, and error indicates whether the
+  * send was succesful, and if not, the cause of the failure.
+  * 
+  * @param msg   the message which was requested to send
+  * @param error SUCCESS if it was transmitted successfully, FAIL if
+  *              it was not, ECANCEL if it was cancelled via cancel
+  */ 
+  async event void sendDone(message_t* msg, error_t error);
+}
diff --git a/tos/lib/byte_radio/PacketSerializerP.nc b/tos/lib/byte_radio/PacketSerializerP.nc
new file mode 100644
index 00000000..73e172ed
--- /dev/null
+++ b/tos/lib/byte_radio/PacketSerializerP.nc
@@ -0,0 +1,207 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+#include "crc.h"
+#include "message.h"
+#include "radiopacketfunctions.h"
+
+/**
+ * This module in conjunction with the UartPhyC turns byte streams
+ * into packtes.
+ *
+ * @see UartPhyC
+ *
+ * @author Kevin Klues 
+ * @author Philipp Huppertz 
+ */
+
+module PacketSerializerP {
+  provides {
+    interface Init;
+    interface PhySend;
+    interface PhyReceive;
+    interface Packet;
+    interface RadioTimeStamping;
+  }
+  uses {
+    interface RadioByteComm;
+    interface PhyPacketTx;
+    interface PhyPacketRx;
+  }
+}
+implementation {
+  /* Module Global Variables */
+
+  message_t *txBufPtr;  // pointer to tx buffer
+  message_t *rxBufPtr;  // pointer to rx buffer
+  message_t rxMsg;      // rx message buffer
+  uint16_t crc;         // CRC value of either the current incoming or outgoing packet
+  uint8_t byteCnt;      // index into current datapacket
+      
+  /* Local Function Declarations */
+  void TransmitNextByte();
+  void ReceiveNextByte(uint8_t data);
+
+  
+  /* Radio Init  */
+  command error_t Init.init(){
+    atomic {
+      crc = 0;
+      txBufPtr = NULL;
+      rxBufPtr = &rxMsg;
+      byteCnt = 0;
+    }
+    return SUCCESS;
+  }
+
+  /*- Radio Send */
+  async command error_t PhySend.send(message_t* msg, uint8_t len) {
+    message_radio_header_t* header = getHeader(msg);
+    atomic {
+      crc = 0;
+      txBufPtr = msg;
+      header->length = len;
+      // message_header_t can contain more than only the message_radio_header_t
+      byteCnt = (sizeof(message_header_t) - sizeof(message_radio_header_t)); // offset
+    }
+    call PhyPacketTx.sendHeader();
+    return SUCCESS;
+  }
+  
+  async event void PhyPacketTx.sendHeaderDone() {
+    signal RadioTimeStamping.transmittedSFD(0, (message_t*)txBufPtr); 
+    TransmitNextByte();
+  }
+
+  async event void RadioByteComm.txByteReady(error_t error) {
+    if(error == SUCCESS) {
+      TransmitNextByte();
+    } else {
+      signal PhySend.sendDone((message_t*)txBufPtr, FAIL);
+    }
+  }
+
+  void TransmitNextByte() {
+    message_radio_header_t* header = getHeader((message_t*) txBufPtr);
+    if (byteCnt < header->length + sizeof(message_header_t) ) {  // send (data + header), compute crc
+        crc = crcByte(crc, ((uint8_t *)(txBufPtr))[byteCnt]);
+        call RadioByteComm.txByte(((uint8_t *)(txBufPtr))[byteCnt++]);
+    } else if (byteCnt == (header->length + sizeof(message_header_t))) {
+      ++byteCnt;
+      call RadioByteComm.txByte((uint8_t)crc);
+    } else if  (byteCnt == (header->length + sizeof(message_header_t)+1)) {
+      ++byteCnt;
+      call RadioByteComm.txByte((uint8_t)(crc >> 8));
+    } else { /* (byteCnt > (header->length + sizeof(message_header_t)+1)) */
+        call PhyPacketTx.sendFooter();  
+    }
+  }
+
+  async event void PhyPacketTx.sendFooterDone() {
+    signal PhySend.sendDone((message_t*)txBufPtr, SUCCESS);
+  }
+  
+  /* Radio Receive */
+  async event void PhyPacketRx.recvHeaderDone(error_t error) {
+    if(error == SUCCESS) {
+      byteCnt = (sizeof(message_header_t) - sizeof(message_radio_header_t));
+      crc = 0;
+      getHeader(rxBufPtr)->length = sizeof(message_radio_header_t); 
+      signal PhyReceive.receiveDetected();
+      signal RadioTimeStamping.receivedSFD(0);
+    }
+  }
+
+  async event void RadioByteComm.rxByteReady(uint8_t data) {
+    ReceiveNextByte(data);
+  }
+
+  async event void PhyPacketRx.recvFooterDone(error_t error) {
+    message_radio_header_t* header = getHeader((message_t*)(rxBufPtr));
+    message_radio_footer_t* footer = getFooter((message_t*)rxBufPtr);
+    // we care about wrong crc in this layer
+    if (footer->crc != 1) error = FAIL;
+    rxBufPtr = signal PhyReceive.receiveDone((message_t*)rxBufPtr, ((message_t*)rxBufPtr)->data, header->length, error);
+  }
+
+  /* Receive the next Byte from the USART */
+  void ReceiveNextByte(uint8_t data) { 
+    message_radio_footer_t* footer = getFooter((message_t*)rxBufPtr);
+    ((uint8_t *)(rxBufPtr))[byteCnt++] = data;
+    if ( byteCnt < getHeader(rxBufPtr)->length + sizeof(message_radio_header_t) ) {
+      crc = crcByte(crc, data);
+      if (getHeader(rxBufPtr)->length > TOSH_DATA_LENGTH) { 
+        // this packet is surely corrupt, so whatever...
+        footer->crc = 0;
+        call PhyPacketRx.recvFooter();
+      }
+    } else if (byteCnt == (getHeader(rxBufPtr)->length + sizeof(message_radio_header_t))) {
+      crc = crcByte(crc, data);
+      byteCnt = offsetof(message_t, footer) + offsetof(message_radio_footer_t, crc);
+    } else if (byteCnt == (offsetof(message_t, footer) + sizeof(message_radio_footer_t))) {
+      footer->crc = (footer->crc == crc);
+      call PhyPacketRx.recvFooter();
+    }
+  }
+
+  
+  /* Packet interface */
+      
+  command void Packet.clear(message_t* msg) {
+    memset(msg, 0, sizeof(message_t));
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return (getHeader(msg))->length;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    if (len != NULL) {
+      *len = (getHeader(msg))->length;
+    }
+    return (void*)msg->data;
+  }
+  
+  // Default events for radio send/receive coordinators do nothing.
+  // Be very careful using these, or you'll break the stack.
+  default async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t* msgBuff) { }
+  default async event void RadioTimeStamping.receivedSFD(uint16_t time) { }
+}
diff --git a/tos/lib/byte_radio/PhyPacketRx.nc b/tos/lib/byte_radio/PhyPacketRx.nc
new file mode 100644
index 00000000..c817c18b
--- /dev/null
+++ b/tos/lib/byte_radio/PhyPacketRx.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+ 
+/**
+ * Physical Packet Receive Interface for byte radios.
+ * Commands and events provided by the Radio Interface
+ * to communicate with upper layers about the status of a 
+ * received packet.
+ *
+ * @author Kevin Klues 
+ */ 
+interface PhyPacketRx {
+  /**
+  * Notification that a packet header was received. 
+  *
+  * @param error Will be SUCCESS if a packet header has been received FAIL
+  * otherwise.
+  */
+  async event void recvHeaderDone(error_t error);
+  
+  /**
+  * Start receiving the packet footer.
+  */
+  async command void recvFooter();
+  
+  /**
+  * Notification that the the packet footer was received.
+  *
+  * @param error Will be SUCCESS if a packet incl. footer was received.
+  * It will be FAIL if the packet was not fully received (timeout).
+  */
+  async event void recvFooterDone(error_t error);
+}
diff --git a/tos/lib/byte_radio/PhyPacketTx.nc b/tos/lib/byte_radio/PhyPacketTx.nc
new file mode 100644
index 00000000..07e3f7fa
--- /dev/null
+++ b/tos/lib/byte_radio/PhyPacketTx.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * Physical Packet Transmission Interface for byte radios.
+ * Commands and events provided by the Physical Layer
+ * to communicate with upper layers about the status of a 
+ * packet that is being transmitted.
+ *
+ * @author Kevin Klues 
+ */  
+ 
+interface PhyPacketTx {
+  /**
+  * Start sending a new packet header. 
+  */
+  async command void sendHeader();
+  
+  /**
+  * Notification that the packet header was sent.
+  *
+  */
+  async event void sendHeaderDone();
+  
+  /**
+  * Start sending the packet footer.
+  */
+  async command void sendFooter();
+  
+  /**
+  * Notification that the the packet footer was sent.
+  *
+  */
+  async event void sendFooterDone();  
+}
diff --git a/tos/lib/byte_radio/PhyReceive.nc b/tos/lib/byte_radio/PhyReceive.nc
new file mode 100644
index 00000000..34b74720
--- /dev/null
+++ b/tos/lib/byte_radio/PhyReceive.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include 
+#include 
+
+/**
+ * This interface is similar to the Receive interface.
+ *   
+ * The interface provides two events in async context which indicate that
+ * a packet is detected or was received. It is provided by the Phy layer
+ * of byte radios.
+ *
+ * @see Receive
+ *
+ * @author Philipp Huppertz
+ */ 
+
+interface PhyReceive {
+   /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as msg, as long as the handling
+   * component copies out the data it needs. The msg may
+   * be invalid when error is not SUCCESS !
+   *
+   * Note that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  msg      the received packet
+   * @param  payload  a pointer to the packet's payload
+   * @param  len      the length of the data region pointed to by payload
+   * @param  error    FAIL if the packet was corrupted (e.g. wrong crc)
+   * @return          a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  async event message_t* receiveDone(message_t* msg, void* payload, uint8_t len, error_t error);
+
+  /**
+  * Indicates that a packet has been detected. This means that the packet's physical header
+  * (preamble bytes + sync byte + SFD byte) was received.
+  *
+  */
+  async event void receiveDetected();
+  
+}
diff --git a/tos/lib/byte_radio/PhySend.nc b/tos/lib/byte_radio/PhySend.nc
new file mode 100644
index 00000000..4dbfea7d
--- /dev/null
+++ b/tos/lib/byte_radio/PhySend.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#include 
+#include 
+ 
+/** 
+  * This interface is similar to the Send interface.
+  *
+  * This interface provides the basic functionality of the Send interface
+  * in async context. It is provided by the Phy Layer.
+  *
+  * @see    Send
+  *
+  * @author Philipp Huppertz
+  */ 
+
+interface PhySend {
+
+    /** 
+    * Send a packet with a data payload of len. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   msg     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  async command error_t send(message_t* msg, uint8_t len);
+
+  /** 
+  * Signaled in response to an accepted send request. msg
+  * is the sent buffer, and error indicates whether the
+  * send was succesful, and if not, the cause of the failure.
+  * 
+  * @param msg   the message which was requested to send
+  * @param error SUCCESS if it was transmitted successfully, FAIL if
+  *              it was not.
+  */ 
+  async event void sendDone(message_t* msg, error_t error);
+}
diff --git a/tos/lib/byte_radio/RadioByteComm.nc b/tos/lib/byte_radio/RadioByteComm.nc
new file mode 100644
index 00000000..3913f38c
--- /dev/null
+++ b/tos/lib/byte_radio/RadioByteComm.nc
@@ -0,0 +1,71 @@
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** 
+ * A byte-level communication interface for byte radios.
+ * It signals byte receptions and
+ * provides a split-phased byte send interface. txByteReady states
+ * that the component can accept another byte in its queue to send,
+ * while txDone states that the send queue has been emptied.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+interface RadioByteComm {
+  /**
+   * Transmits a byte over the radio.
+   *
+   * @param data The byte to be transmitted.
+   */
+  async command void txByte(uint8_t data);
+	
+  /**
+   * Notification that the radio is ready to receive another byte.
+   *
+   * @param data The byte read from the radio.
+   */
+  async event void rxByteReady(uint8_t data);
+
+  /**
+   * Notification that the bus is ready to transmit/queue another byte.
+   *
+   * @param error Success Notification of the successful transmission of the last byte.
+   */
+  async event void txByteReady(error_t error);
+
+  /**
+   * Check to see if the transmission is done and the queue is empty
+   *
+   * @return TRUE if the queue is empty and no more bytes will be sent.
+   *         FALSE if bytes remain in the queue.
+   */
+  async command bool isTxDone();
+}
diff --git a/tos/lib/byte_radio/UartPhyControl.nc b/tos/lib/byte_radio/UartPhyControl.nc
new file mode 100644
index 00000000..8f501c17
--- /dev/null
+++ b/tos/lib/byte_radio/UartPhyControl.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * This interface provides commands to control the structure of 
+ * transmitted (physical) packets and provides commands and events
+ * to control the physical layer of byte radios.
+ *
+ * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */ 
+interface UartPhyControl {
+  
+  /**
+  * Sets the number of transmitted preamble bytes.
+  *
+  * @param numPreambleBytes the numbeof preamble bytes.
+  *
+  * @return SUCCESS if it could be set (no current receiving/transmitting)
+            FALSE otherwise.
+  */
+  command error_t setNumPreambles(uint16_t numPreambleBytes);
+    
+  /**
+  * Sets the timeout after the byte-stream is considered dead if no more
+  * bytes occur on the sending or receiving side. This means isBusy()
+  * returns FALSE.
+  *
+  * @param byteTimeout timeout in ms.
+  *
+  * @return SUCCESS if it could be set (no current receiving/transmitting)
+  *         FALSE otherwise.
+  */
+  command error_t setByteTimeout(uint8_t byteTimeout);
+  
+  /** 
+  * Tests if the UartPhy is busy with sending or receiving a packet. 
+  *
+  * @return TRUE if active
+  *         FALSE otherwise.
+  */
+  async command bool isBusy();
+
+}
diff --git a/tos/lib/byte_radio/flagfunctions.h b/tos/lib/byte_radio/flagfunctions.h
new file mode 100644
index 00000000..e6fe09c1
--- /dev/null
+++ b/tos/lib/byte_radio/flagfunctions.h
@@ -0,0 +1,51 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * some helper functions that ease dealing with flags in a bit field
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef FLAG_FUNCTIONS_H
+#define FLAG_FUNCTIONS_H
+
+void setFlag(uint8_t *which, uint8_t pos) {
+    (*which) |= pos;
+}
+
+void clearFlag(uint8_t *which, uint8_t pos) {
+    (*which) = (*which) & (~pos);
+}
+
+bool isFlagSet(const uint8_t *which, uint8_t pos) {
+    return (*which) & pos;
+}
+
+#endif
diff --git a/tos/lib/byte_radio/manchester.h b/tos/lib/byte_radio/manchester.h
new file mode 100644
index 00000000..71452cd1
--- /dev/null
+++ b/tos/lib/byte_radio/manchester.h
@@ -0,0 +1,165 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provide functions to encode/decode a manchester stream
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author Andreas Koepke 
+ * ========================================================================
+ */
+
+const uint8_t nibbleToManchesterByte[] = {
+    0x55,
+    0x56,
+    0x59,
+    0x5a,
+    0x65,
+    0x66,
+    0x69,
+    0x6a,
+    0x95,
+    0x96,
+    0x99,
+    0x9a,
+    0xa5,
+    0xa6,
+    0xa9,
+    0xaa
+};
+
+const uint8_t manchesterByteToNibble[] = {
+    0x0,
+    0x1,
+    0xff,
+    0xff,
+    0x2,
+    0x3,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x4,
+    0x5,
+    0xff,
+    0xff,
+    0x6,
+    0x7,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x8,
+    0x9,
+    0xff,
+    0xff,
+    0xa,
+    0xb,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xc,
+    0xd,
+    0xff,
+    0xff,
+    0xe,
+    0xf
+};
+
+uint8_t manchesterEncodeNibble(uint8_t nib) 
+{
+    return nibbleToManchesterByte[nib];
+}
+
+uint8_t manchesterDecodeByte(uint8_t b) 
+{
+    uint8_t dec;
+    
+    if(b < 0x55) {
+        dec = 0xff;
+    }
+    else if(b > 0xaa) {
+        dec = 0xff;
+    }
+    else {
+        dec = manchesterByteToNibble[b - 0x55];
+    }
+    return dec;
+}
diff --git a/tos/lib/byte_radio/radiopacketfunctions.h b/tos/lib/byte_radio/radiopacketfunctions.h
new file mode 100644
index 00000000..aca2f5a7
--- /dev/null
+++ b/tos/lib/byte_radio/radiopacketfunctions.h
@@ -0,0 +1,56 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Platformindependant packet structure accessor functions
+ * - Author --------------------------------------------------------------
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+
+#ifndef RADIO_PACKET_FUNCTIONS_H
+#define RADIO_PACKET_FUNCTIONS_H
+
+#include "message.h"
+
+/* Packet structure accessor functions
+   * note: platform-independant radiostructures are called message_radio_header_t & message_radio_footer_t */
+  message_radio_header_t* getHeader(message_t* amsg) {
+    return (message_radio_header_t*)(amsg->data - sizeof(message_radio_header_t));
+  }
+
+  message_radio_footer_t* getFooter(message_t* amsg) {
+    return (message_radio_footer_t*)(amsg->footer);
+  }
+
+  message_radio_metadata_t* getMetadata(message_t* amsg) {
+    return (message_radio_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t));
+  }
+
+#endif
diff --git a/tos/lib/byte_radio/shellsort.h b/tos/lib/byte_radio/shellsort.h
new file mode 100644
index 00000000..704c3e55
--- /dev/null
+++ b/tos/lib/byte_radio/shellsort.h
@@ -0,0 +1,20 @@
+/*integriert shellsort Algorithmus*/
+/*shellsort aufsteigend sortierend aus Kernighan Ritchie (S.61)*/
+
+
+#ifndef __SHELLSORT_H__
+#define __SHELLSORT_H__
+
+void shellsort(uint16_t basis[] , uint16_t size)
+{
+	int gap, i, j, temp;
+	
+	for (gap = size/2; gap > 0; gap /= 2)
+		for (i = gap; i < size; i++)
+			for (j = i-gap; j >= 0 && basis[j] > basis[j+gap]; j-=gap) {
+				temp = basis[j];
+				basis[j] = basis[j+gap];
+				basis[j+gap] = temp;
+			}
+}
+#endif /* __SHELLSORT_H__ */
diff --git a/tos/lib/deluge/Deluge.h b/tos/lib/deluge/Deluge.h
new file mode 100644
index 00000000..2a2ae334
--- /dev/null
+++ b/tos/lib/deluge/Deluge.h
@@ -0,0 +1,142 @@
+// $Id$
+
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * @author Jonathan Hui 
+ */
+
+#ifndef __DELUGE_H__
+#define __DELUGE_H__
+
+#include "DelugeMetadata.h"
+#include "TOSBoot.h"
+
+#ifndef DELUGE_NUM_IMAGES
+#define DELUGE_NUM_IMAGES 3
+#endif
+
+enum {
+  DELUGE_VERSION                    = 2,
+  DELUGE_MAX_ADV_PERIOD_LOG2        = 20,
+  DELUGE_NUM_NEWDATA_ADVS_REQUIRED  = 2,
+  DELUGE_NUM_MIN_ADV_PERIODS        = 2,
+  DELUGE_MAX_NUM_REQ_TRIES          = 1,
+  DELUGE_REBOOT_DELAY               = 4,
+  DELUGE_FAILED_SEND_DELAY          = 16,
+  DELUGE_MIN_DELAY                  = 16,
+  DELUGE_PKTS_PER_PAGE              = 48,
+  DELUGE_PKT_PAYLOAD_SIZE           = 23,
+  DELUGE_DATA_OFFSET                = 128,
+  DELUGE_IDENT_SIZE                 = 128,
+  DELUGE_INVALID_ADDR               = (0x7fffffffL),
+  DELUGE_MAX_REQ_DELAY              = (0x1L << (DELUGE_MIN_ADV_PERIOD_LOG2-1)),
+  DELUGE_NACK_TIMEOUT               = (DELUGE_MAX_REQ_DELAY >> 0x1),
+  DELUGE_BYTES_PER_PAGE             = (DELUGE_PKTS_PER_PAGE*DELUGE_PKT_PAYLOAD_SIZE),
+  DELUGE_PKT_BITVEC_SIZE            = (((DELUGE_PKTS_PER_PAGE-1) / 8) + 1),
+  DELUGE_MAX_IMAGE_SIZE             = (128L*1024L),
+  DELUGE_MAX_PAGES                  = 128,
+  DELUGE_CRC_SIZE                   = sizeof(uint16_t),
+  DELUGE_CRC_BLOCK_SIZE             = DELUGE_MAX_PAGES*DELUGE_CRC_SIZE,
+  DELUGE_GOLDEN_IMAGE_NUM           = 0x0,
+  DELUGE_INVALID_VNUM               = -1,
+  DELUGE_INVALID_IMGNUM             = 0xff,
+  DELUGE_INVALID_PKTNUM             = 0xff,
+  DELUGE_INVALID_PGNUM              = 0xff,
+};
+
+#include "Storage.h"
+
+struct deluge_image_t {
+  imgnum_t imageNum;
+  volume_id_t volumeId;
+};
+
+typedef struct DelugeAdvTimer {
+  uint32_t timer      : 32;
+  uint8_t  periodLog2 : 8;
+  bool     overheard  : 1;
+  uint8_t  newAdvs    : 7;
+} DelugeAdvTimer;
+
+typedef struct DelugeNodeDesc {
+  imgvnum_t vNum;
+  uint32_t  uid;
+  imgnum_t  imgNum;
+  uint8_t   dummy;
+  uint16_t  crc;
+} DelugeNodeDesc;
+
+enum {
+  DELUGE_VOLUME_ID_0 = 0,
+#if DELUGE_NUM_IMAGES >= 2
+  DELUGE_VOLUME_ID_1 = 1,
+#if DELUGE_NUM_IMAGES >= 3
+  DELUGE_VOLUME_ID_2 = 2,
+#if DELUGE_NUM_IMAGES >= 4
+  DELUGE_VOLUME_ID_3 = 3,
+#if DELUGE_NUM_IMAGES >= 5
+  DELUGE_VOLUME_ID_4 = 4,
+#if DELUGE_NUM_IMAGES >= 6
+  DELUGE_VOLUME_ID_5 = 5,
+#if DELUGE_NUM_IMAGES >= 7
+  DELUGE_VOLUME_ID_6 = 6,
+#if DELUGE_NUM_IMAGES >= 8
+  DELUGE_VOLUME_ID_7 = 7,
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+};
+
+static const struct deluge_image_t DELUGE_IMAGES[DELUGE_NUM_IMAGES] = {
+  { DELUGE_VOLUME_ID_0, 0xDF },
+#if DELUGE_NUM_IMAGES >= 2
+  { DELUGE_VOLUME_ID_1, 0xD0 },
+#if DELUGE_NUM_IMAGES >= 3
+  { DELUGE_VOLUME_ID_2, 0xD1 },
+#if DELUGE_NUM_IMAGES >= 4
+  { DELUGE_VOLUME_ID_3, 0xD2 },
+#if DELUGE_NUM_IMAGES >= 5
+  { DELUGE_VOLUME_ID_4, 0xD3 },
+#if DELUGE_NUM_IMAGES >= 6
+  { DELUGE_VOLUME_ID_5, 0xD4 },
+#if DELUGE_NUM_IMAGES >= 7
+  { DELUGE_VOLUME_ID_6, 0xD5 },
+#if DELUGE_NUM_IMAGES >= 8
+  { DELUGE_VOLUME_ID_7, 0xD6 },
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+};
+
+#endif
diff --git a/tos/lib/deluge/DelugeStorageC.nc b/tos/lib/deluge/DelugeStorageC.nc
new file mode 100644
index 00000000..ae295878
--- /dev/null
+++ b/tos/lib/deluge/DelugeStorageC.nc
@@ -0,0 +1,105 @@
+// $Id$
+
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * @author Jonathan Hui 
+ */
+
+configuration DelugeStorageC {
+  provides {
+    interface DelugeDataRead as DataRead;
+    interface DelugeDataWrite as DataWrite;
+    interface DelugeMetadataStore as MetadataStore;
+    interface DelugeStorage;
+  }
+}
+implementation {
+
+  components Main, DelugeStorageM as Storage, LedsC as Leds;
+
+  DataRead = Storage;
+  DataWrite = Storage;
+  DelugeStorage = Storage;
+  MetadataStore = Storage;
+
+  Storage.Leds -> Leds;
+
+  components new BlockStorageC() as BlockStorage0;
+  Storage.BlockRead[DELUGE_VOLUME_ID_0] -> BlockStorage0;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_0] -> BlockStorage0;
+  Storage.Mount[DELUGE_VOLUME_ID_0] -> BlockStorage0;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_0] -> BlockStorage0;
+#if DELUGE_NUM_IMAGES >= 2
+  components new BlockStorageC() as BlockStorage1;
+  Storage.BlockRead[DELUGE_VOLUME_ID_1] -> BlockStorage1;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_1] -> BlockStorage1;
+  Storage.Mount[DELUGE_VOLUME_ID_1] -> BlockStorage1;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_1] -> BlockStorage1;
+#if DELUGE_NUM_IMAGES >= 3
+  components new BlockStorageC() as BlockStorage2;
+  Storage.BlockRead[DELUGE_VOLUME_ID_2] -> BlockStorage2;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_2] -> BlockStorage2;
+  Storage.Mount[DELUGE_VOLUME_ID_2] -> BlockStorage2;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_2] -> BlockStorage2;
+#if DELUGE_NUM_IMAGES >= 4
+  components new BlockStorageC() as BlockStorage3;
+  Storage.BlockRead[DELUGE_VOLUME_ID_3] -> BlockStorage3;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_3] -> BlockStorage3;
+  Storage.Mount[DELUGE_VOLUME_ID_3] -> BlockStorage3;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_3] -> BlockStorage3;
+#if DELUGE_NUM_IMAGES >= 5
+  components new BlockStorageC() as BlockStorage4;
+  Storage.BlockRead[DELUGE_VOLUME_ID_4] -> BlockStorage4;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_4] -> BlockStorage4;
+  Storage.Mount[DELUGE_VOLUME_ID_4] -> BlockStorage4;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_4] -> BlockStorage4;
+#if DELUGE_NUM_IMAGES >= 6
+  components new BlockStorageC() as BlockStorage5;
+  Storage.BlockRead[DELUGE_VOLUME_ID_5] -> BlockStorage5;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_5] -> BlockStorage5;
+  Storage.Mount[DELUGE_VOLUME_ID_5] -> BlockStorage5;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_5] -> BlockStorage5;
+#if DELUGE_NUM_IMAGES >= 7
+  components new BlockStorageC() as BlockStorage6;
+  Storage.BlockRead[DELUGE_VOLUME_ID_6] -> BlockStorage6;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_6] -> BlockStorage6;
+  Storage.Mount[DELUGE_VOLUME_ID_6] -> BlockStorage6;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_6] -> BlockStorage6;
+#if DELUGE_NUM_IMAGES >= 8
+  components new BlockStorageC() as BlockStorage7;
+  Storage.BlockRead[DELUGE_VOLUME_ID_7] -> BlockStorage7;
+  Storage.BlockWrite[DELUGE_VOLUME_ID_7] -> BlockStorage7;
+  Storage.Mount[DELUGE_VOLUME_ID_7] -> BlockStorage7;
+  Storage.StorageRemap[DELUGE_VOLUME_ID_7] -> BlockStorage7;
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+
+}
diff --git a/tos/lib/gpio/SoftCaptureC.nc b/tos/lib/gpio/SoftCaptureC.nc
new file mode 100644
index 00000000..5d694268
--- /dev/null
+++ b/tos/lib/gpio/SoftCaptureC.nc
@@ -0,0 +1,63 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration SoftCaptureC() 
+{
+  provides interface GpioCapture;
+  uses interface GpioInterrupt;
+}
+
+implementation
+{
+  components new SoftCaptureP();
+  components Counter32khzC;
+  
+  GpioCapture = SoftCaptureP;
+  GpioInterrupt = SoftCaptureP;
+
+  SoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
+}
+
diff --git a/tos/lib/gpio/SoftCaptureP.nc b/tos/lib/gpio/SoftCaptureP.nc
new file mode 100644
index 00000000..34b628f9
--- /dev/null
+++ b/tos/lib/gpio/SoftCaptureP.nc
@@ -0,0 +1,87 @@
+// $Id$
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter
+ *
+ * @author Phil Buonadonna
+ */
+generic module SoftCaptureP ()
+{
+  provides interface GpioCapture;
+  uses {
+    interface GpioInterrupt;
+    interface Counter as Counter32khz32;
+  }
+}
+
+implementation 
+{
+
+  async command error_t GpioCapture.captureRisingEdge() {
+    return (call GpioInterrupt.enableRisingEdge());
+  }
+
+  async command error_t GpioCapture.captureFallingEdge() {
+    return (call GpioInterrupt.enableFallingEdge());
+  }
+
+  async command void GpioCapture.disable() {
+    call GpioInterrupt.disable();
+    return;
+  }
+  
+  async event void GpioInterrupt.fired() {
+    uint16_t captureTime;
+
+    captureTime = (uint16_t) call Counter32khz32.get();
+    signal GpioCapture.captured(captureTime);
+    return;
+  }
+
+  async event void Counter32khz32.overflow() {
+    return;
+  }
+
+  default async event void GpioCapture.captured(uint16_t time) {
+    return;
+  }
+}
diff --git a/tos/lib/gpio/SoftIrqC.nc b/tos/lib/gpio/SoftIrqC.nc
new file mode 100644
index 00000000..3f44b009
--- /dev/null
+++ b/tos/lib/gpio/SoftIrqC.nc
@@ -0,0 +1,51 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+/**
+ * Software emulation of external interrupt pin.
+ */
+generic configuration SoftIrqC (uint8_t interval) {
+    provides {
+	interface Interrupt;         // interrupt interface to emulate
+    }
+    uses {
+	interface GeneralIO;         // pin to poll for irq
+    }
+}
+implementation
+{
+    components
+	new SoftIrqP(interval), 
+	new TimerMilliC() as IrqTimer;
+
+    Interrupt = SoftIrqP;
+    GeneralIO = SoftIrqP;
+    
+    SoftIrqP.IrqTimer -> IrqTimer;   // strap into an OSKI system timer
+}
diff --git a/tos/lib/gpio/SoftIrqP.nc b/tos/lib/gpio/SoftIrqP.nc
new file mode 100644
index 00000000..0401a40e
--- /dev/null
+++ b/tos/lib/gpio/SoftIrqP.nc
@@ -0,0 +1,92 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Matt Miller, Crossbow 
+ *  @author Martin Turon, Crossbow 
+ *
+ *  $Id$
+ */
+
+/**
+ * Interrupt emulation interface access for GPIO pins.
+ *
+ * @param  interval   How often to check soft irq pin in msec
+ */
+generic module SoftIrqP (uint8_t interval)
+{
+    provides interface Interrupt as SoftIrq;
+    
+    uses {
+	interface Timer as IrqTimer;
+	interface GeneralIO as IrqPin;
+    }
+}
+implementation
+{
+    norace struct {
+	uint8_t final : 1;
+	uint8_t last  : 1;
+    } state;
+
+    // ************* SoftIrq Interrupt handlers and dispatch *************
+  
+    /**
+     * Enable an edge interrupt on a SoftIrq pin that is not capable of 
+     * external hardware INTERRUPT.  Best we can do is poll periodically 
+     * and monitor line level changes
+     */
+    async command error_t SoftIrq.startWait(bool low_to_high) {	
+	atomic { state.final = low_to_high; }    // save state we await
+	state.last = call IrqPin.get();          // get current state
+	call IrqTimer.startOneShotNow(interval); // wait interval in msec
+	return SUCCESS;
+    }
+    
+    /**
+     * Timer Event fired so now check SoftIrq pin level
+     */
+    event void IrqTimer.fired() {
+	uint8_t  l_state = call IrqPin.get();
+
+	if ((state.last != state.final) && 
+	    (state.final == l_state)) {
+	    // If we found an edge, fire SoftIrq!
+	    signal SoftIrq.fired();
+        } 
+
+	// Otherwise, restart timer and try again
+	state.last = l_state;
+	return call IrqTimer.startOneShotNow(interval);
+    }  
+    
+    /**
+     * disables Irq interrupts
+     */
+    async command error_t SoftIrq.disable() {
+	call IrqTimer.stop();
+	return SUCCESS;
+    }
+    
+    //default async event void SoftIrq.fired() { return FAIL; }
+}
diff --git a/tos/lib/net/DisseminationCache.nc b/tos/lib/net/DisseminationCache.nc
new file mode 100644
index 00000000..1c797d5e
--- /dev/null
+++ b/tos/lib/net/DisseminationCache.nc
@@ -0,0 +1,50 @@
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationCache interface connects each DisseminatorC
+ * component to the DisseminationEngineC component.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+interface DisseminationCache {
+  event void init();
+  command void* requestData( uint8_t* size );
+  command void storeData( void* data, uint8_t size, uint32_t seqno );
+  command uint32_t requestSeqno();
+  event void newData();
+}
diff --git a/tos/lib/net/DisseminationEngine.h b/tos/lib/net/DisseminationEngine.h
new file mode 100644
index 00000000..5092a79f
--- /dev/null
+++ b/tos/lib/net/DisseminationEngine.h
@@ -0,0 +1,57 @@
+#ifndef DISSEMINATION_ENGINE_H
+#define DISSEMINATION_ENGINE_H
+
+/*
+ * Copyright (c) 2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/*
+ * TODO: Add a tiebreaker and an application GUID to the header
+ */
+
+enum {
+  AM_DISSEMINATION_MESSAGE = 13,
+  AM_DISSEMINATION_PROBE_MESSAGE = 14,
+  DISSEMINATION_SEQNO_UNKNOWN = 0,
+};
+
+typedef nx_struct dissemination_message {
+  nx_uint16_t key;
+  nx_uint32_t seqno;
+  nx_uint8_t data[0];
+} dissemination_message_t;
+
+typedef nx_struct dissemination_probe_message {
+  nx_uint16_t key;
+} dissemination_probe_message_t;
+
+#endif
+
diff --git a/tos/lib/net/DisseminationEngineImplP.nc b/tos/lib/net/DisseminationEngineImplP.nc
new file mode 100644
index 00000000..e8fe7e33
--- /dev/null
+++ b/tos/lib/net/DisseminationEngineImplP.nc
@@ -0,0 +1,228 @@
+#include 
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationEngineImplP component implements the dissemination
+ * logic.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+module DisseminationEngineImplP {
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface DisseminationCache[uint16_t key];
+    interface TrickleTimer[uint16_t key];
+
+    interface AMSend;
+    interface Receive;
+
+    interface AMSend as ProbeAMSend;
+    interface Receive as ProbeReceive;
+
+    interface Leds;
+  }
+}
+implementation {
+
+  message_t m_buf;
+  bool m_bufBusy = TRUE;
+
+  void sendProbe( uint16_t key );
+  void sendObject( uint16_t key );
+
+  event void Boot.booted() {
+    call RadioControl.start(); 
+  }
+
+  event void RadioControl.startDone( error_t err ) {
+    m_bufBusy = FALSE;
+  }
+  event void RadioControl.stopDone( error_t err ) {}
+
+  event void DisseminationCache.init[ uint16_t key ]() {
+    call TrickleTimer.start[ key ]();
+    call TrickleTimer.reset[ key ]();
+  }
+
+  event void DisseminationCache.newData[ uint16_t key ]() {
+    sendObject( key );
+    call TrickleTimer.reset[ key ]();
+  }
+
+  event void TrickleTimer.fired[ uint16_t key ]() {
+
+    call Leds.led2Toggle();
+
+    if ( m_bufBusy ) { return; }
+
+    sendObject( key );
+  }
+
+  void sendProbe( uint16_t key ) {
+    dissemination_probe_message_t* dpMsg = 
+      (dissemination_probe_message_t*) call ProbeAMSend.getPayload( &m_buf );
+    
+    m_bufBusy = TRUE;
+    
+    dpMsg->key = key;
+    
+    call ProbeAMSend.send( AM_BROADCAST_ADDR, &m_buf,
+			   sizeof( dissemination_probe_message_t ) );
+  }
+
+  void sendObject( uint16_t key ) {
+    void* object;
+    uint8_t objectSize = 0;
+    
+    dissemination_message_t* dMsg = 
+      (dissemination_message_t*) call AMSend.getPayload( &m_buf );
+    
+    m_bufBusy = TRUE;
+    
+    dMsg->key = key;
+    dMsg->seqno = call DisseminationCache.requestSeqno[ key ]();
+
+    if ( dMsg->seqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+      object = call DisseminationCache.requestData[ key ]( &objectSize );
+      objectSize = 
+	objectSize < call AMSend.maxPayloadLength() ?
+	objectSize : call AMSend.maxPayloadLength();
+
+      memcpy( dMsg->data, object, objectSize );
+    }      
+    call AMSend.send( AM_BROADCAST_ADDR,
+		      &m_buf, sizeof( dissemination_message_t ) + objectSize );
+  }
+
+  event void ProbeAMSend.sendDone( message_t* msg, error_t error ) {
+    m_bufBusy = FALSE;
+  }
+
+  event void AMSend.sendDone( message_t* msg, error_t error ) {
+    m_bufBusy = FALSE;
+  }
+
+  event message_t* Receive.receive( message_t* msg, 
+				    void* payload, 
+				    uint8_t len ) {
+
+    dissemination_message_t* dMsg = 
+      (dissemination_message_t*) payload;
+
+    uint16_t key = dMsg->key;
+    uint32_t incomingSeqno = dMsg->seqno;
+    uint32_t currentSeqno = call DisseminationCache.requestSeqno[ key ]();
+
+    if ( currentSeqno == DISSEMINATION_SEQNO_UNKNOWN &&
+	 incomingSeqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+
+      call DisseminationCache.storeData[ key ]
+	( dMsg->data, 
+	  len - sizeof( dissemination_message_t ),
+	  incomingSeqno );
+      
+      call TrickleTimer.reset[ key ]();
+      return msg;
+    }
+
+    if ( incomingSeqno == DISSEMINATION_SEQNO_UNKNOWN &&
+	 currentSeqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+
+      call TrickleTimer.reset[ key ]();
+      return msg;
+    }
+
+    if ( (int32_t)( incomingSeqno - currentSeqno ) > 0 ) {
+
+      call DisseminationCache.storeData[key]
+	( dMsg->data, 
+	  len - sizeof(dissemination_message_t),
+	  incomingSeqno );
+      dbg("Dissemination", "Received dissemination value 0x%08x,0x%08x @ %s\n", (int)key, (int)incomingSeqno, sim_time_string());
+      call TrickleTimer.reset[ key ]();
+
+    } else if ( (int32_t)( incomingSeqno - currentSeqno ) == 0 ) {
+      
+      call TrickleTimer.incrementCounter[ key ]();
+
+    } else {
+
+      // Still not sure which of these is the best. Immediate send for now.
+      sendObject( key );
+      // call TrickleTimer.reset[ key ]();
+
+    }
+
+    return msg;
+  }
+
+  event message_t* ProbeReceive.receive( message_t* msg, 
+					 void* payload, 
+					 uint8_t len) {
+    
+    dissemination_probe_message_t* dpMsg = 
+      (dissemination_probe_message_t*) payload;
+
+    if ( call DisseminationCache.requestSeqno[ dpMsg->key ]() != 
+	 DISSEMINATION_SEQNO_UNKNOWN ) {    
+      sendObject( dpMsg->key );
+    }
+
+    return msg;
+  }
+  
+  default command void* 
+    DisseminationCache.requestData[uint16_t key]( uint8_t* size ) { return NULL; }
+
+  default command void 
+    DisseminationCache.storeData[uint16_t key]( void* data, 
+						uint8_t size, 
+						uint32_t seqno ) {}
+
+  default command uint32_t 
+    DisseminationCache.requestSeqno[uint16_t key]() { return 0; }
+
+  default command error_t TrickleTimer.start[uint16_t key]() { return SUCCESS; }
+
+  default command void TrickleTimer.stop[uint16_t key]() { }
+
+  default command void TrickleTimer.reset[uint16_t key]() { }
+
+  default command void TrickleTimer.incrementCounter[uint16_t key]() { }
+}
diff --git a/tos/lib/net/DisseminationEngineP.nc b/tos/lib/net/DisseminationEngineP.nc
new file mode 100644
index 00000000..0314fc5d
--- /dev/null
+++ b/tos/lib/net/DisseminationEngineP.nc
@@ -0,0 +1,79 @@
+#include 
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationEngineP component retrieves values from the
+ * DisseminatorP components and disseminates them over the radio.
+ *
+ * TODO: Hook DisseminationProbe up to the serial instead of the radio.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+configuration DisseminationEngineP {
+  uses {
+    interface DisseminationCache[uint16_t key];
+    interface TrickleTimer[uint16_t key];
+  }
+}
+implementation {
+  components DisseminationEngineImplP;
+  DisseminationCache = DisseminationEngineImplP;
+  TrickleTimer = DisseminationEngineImplP;
+
+  components MainC;  
+  DisseminationEngineImplP.Boot -> MainC;
+
+  components ActiveMessageC;
+  DisseminationEngineImplP.RadioControl -> ActiveMessageC;
+
+  components new AMSenderC(AM_DISSEMINATION_MESSAGE) as DisseminationSendC;
+  DisseminationEngineImplP.AMSend -> DisseminationSendC.AMSend;
+
+  components new AMReceiverC(AM_DISSEMINATION_MESSAGE) as DisseminationReceiveC;
+  DisseminationEngineImplP.Receive -> DisseminationReceiveC.Receive;
+
+  components new AMSenderC(AM_DISSEMINATION_PROBE_MESSAGE) as DisseminationProbeSendC;
+  DisseminationEngineImplP.ProbeAMSend -> DisseminationProbeSendC.AMSend;
+
+  components new AMReceiverC(AM_DISSEMINATION_PROBE_MESSAGE) 
+    as DisseminationProbeReceiveC;
+  DisseminationEngineImplP.ProbeReceive -> DisseminationProbeReceiveC.Receive;
+
+  components NoLedsC;
+  DisseminationEngineImplP.Leds -> NoLedsC;
+}
diff --git a/tos/lib/net/DisseminationTimerP.nc b/tos/lib/net/DisseminationTimerP.nc
new file mode 100644
index 00000000..d9e48f9f
--- /dev/null
+++ b/tos/lib/net/DisseminationTimerP.nc
@@ -0,0 +1,51 @@
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/*
+ * The DisseminationTimerP component maintains a set of Trickle timers
+ * and is wired to DisseminationEngineC once for each DisseminatorC.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+configuration DisseminationTimerP {
+  provides interface TrickleTimer[uint8_t id];
+}
+implementation {
+  components new TrickleTimerMilliC(1, 1024, 1, 
+				    uniqueCount("DisseminationTimerC.TrickleTimer"));
+  TrickleTimer = TrickleTimerMilliC;
+}
diff --git a/tos/lib/net/DisseminationUpdate.nc b/tos/lib/net/DisseminationUpdate.nc
new file mode 100644
index 00000000..6ea93cad
--- /dev/null
+++ b/tos/lib/net/DisseminationUpdate.nc
@@ -0,0 +1,53 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Update a network shared (disseminated) value. Updates are assured
+ * to be eventually consistent across a connected network. If multiple
+ * nodes update a value simultaneously, then nodes within the network
+ * will see a series of one or more updates, the last update will
+ * be the same for all nodes. Components that need to use the
+ * variable should use the DisseminationValue interface.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   January 7 2006
+ */ 
+
+
+
+interface DisseminationUpdate {
+  /**
+   * Update the variable to a new value. This changes the local copy
+   * and begins to disseminate the new value throughout the network.
+   * As other nodes may have also changed the variable, it is possible
+   * that an update may not 'stick,' but will instead be overwritten by
+   * a separate update.
+   *
+   * @param newVal A pointer to the new value. The memory pointed to
+   * by newVal is copied out, so newVal can be reclaimed when
+   * change returns.
+   */
+  command void change(t* newVal);
+}
diff --git a/tos/lib/net/DisseminationValue.nc b/tos/lib/net/DisseminationValue.nc
new file mode 100644
index 00000000..854d9ad1
--- /dev/null
+++ b/tos/lib/net/DisseminationValue.nc
@@ -0,0 +1,56 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Read a network shared (disseminated) variable and be notified
+ * of updates.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ *
+ * @date   Jan 7 2006
+ */ 
+
+
+interface DisseminationValue {
+
+  /**
+   * Obtain a pointer to the variable. The provider of this
+   * interface only will change the memory the pointer references
+   * in tasks. Therefore the memory region does not change during
+   * the execution of any other task. A user of this interface
+   * must not in any circumstance write to this memory location.
+   *
+   * @return A const pointer to the variable.
+   */
+  command const t* get();
+
+  /**
+   * Signalled whenever variable may have changed.
+   */
+  event void changed();
+}
+
+
+
diff --git a/tos/lib/net/DisseminatorC.nc b/tos/lib/net/DisseminatorC.nc
new file mode 100644
index 00000000..62783f69
--- /dev/null
+++ b/tos/lib/net/DisseminatorC.nc
@@ -0,0 +1,74 @@
+#include 
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorC component holds and synchronizes a single value
+ * of a chosen type, and identifies that value by a chosen 16-bit key.
+ * Different nodes should use the same key for the same value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ * @param key the 16-bit identifier of the disseminated object
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration DisseminatorC(typedef t, uint16_t key) {
+  provides interface DisseminationValue;
+  provides interface DisseminationUpdate;
+}
+implementation {
+  enum {
+    TIMER_ID = unique("DisseminationTimerC.TrickleTimer")
+  };
+
+  components new DisseminatorP(t);
+  DisseminationValue = DisseminatorP;
+  DisseminationUpdate = DisseminatorP;
+
+  components MainC;
+  DisseminatorP.Boot -> MainC;
+
+  components DisseminationEngineP;
+  DisseminationEngineP.DisseminationCache[key] -> DisseminatorP;
+
+  components DisseminationTimerP;
+  DisseminationEngineP.TrickleTimer[key] -> 
+    DisseminationTimerP.TrickleTimer[TIMER_ID];
+
+  components LedsC;
+  DisseminatorP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/DisseminatorP.nc b/tos/lib/net/DisseminatorP.nc
new file mode 100644
index 00000000..9b303175
--- /dev/null
+++ b/tos/lib/net/DisseminatorP.nc
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorP module holds and synchronizes a single value of a
+ * chosen type.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic module DisseminatorP(typedef t) {
+  provides interface DisseminationValue;
+  provides interface DisseminationUpdate;
+  provides interface DisseminationCache;
+
+  uses interface Boot;
+  uses interface Leds;
+}
+implementation {
+  t valueCache;
+
+  // A sequence number is 32 bits. The top 16 bits are an incrementing
+  // counter, while the bottom 16 bits are a unique node identifier.
+  uint32_t seqno = DISSEMINATION_SEQNO_UNKNOWN;
+
+  event void Boot.booted() {
+    signal DisseminationCache.init();
+  }
+
+  command const t* DisseminationValue.get() {
+    return &valueCache;
+  }
+
+  command void DisseminationUpdate.change( t* newVal ) {
+    memcpy( &valueCache, newVal, sizeof(t) );
+    /* Increment the counter and append the local node ID. */
+    seqno = seqno >> 16;
+    seqno++;
+    if ( seqno == DISSEMINATION_SEQNO_UNKNOWN ) { seqno++; }
+    seqno = seqno << 16;
+    seqno += TOS_NODE_ID;
+    signal DisseminationCache.newData();
+  }
+
+  command void* DisseminationCache.requestData( uint8_t* size ) {
+    *size = sizeof(t);
+    return &valueCache;
+  }
+
+  command void DisseminationCache.storeData( void* data, uint8_t size,
+					     uint32_t newSeqno ) {
+    memcpy( &valueCache, data, size < sizeof(t) ? size : sizeof(t) );
+    seqno = newSeqno;
+    signal DisseminationValue.changed();
+  }
+
+  command uint32_t DisseminationCache.requestSeqno() {
+    return seqno;
+  }
+
+  default event void DisseminationValue.changed() { }
+}
diff --git a/tos/lib/net/TrickleTimer.nc b/tos/lib/net/TrickleTimer.nc
new file mode 100644
index 00000000..b08356d3
--- /dev/null
+++ b/tos/lib/net/TrickleTimer.nc
@@ -0,0 +1,83 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * A network trickle timer. A trickle timer has a period in the range
+ * [L, H]. After firing, the period is doubled, up to H. If the period
+ * is P, then the timer is scheduled to fire in the interval [0.5P, P]
+ * (the second half of a period). The period can be reset to L (the
+ * smallest period, and therefore the highest frequency).
+ *
+ * The timer may be suppressed. If a user of the interface has heard
+ * enough packets from other nodes that indicate its transmitting a
+ * packet would be unncessarily redundant, then the timer does not
+ * fire. The timer has a constant K and a counter C. If C >e; K, then
+ * the timer does not fire. When an interval ends, C is reset to 0.
+ * Calling incrementCounter increments C by one.
+ *
+ * For details, refer to Levis et al., "A Self-Regulating Algorithm
+ * for Code Maintenance and Propagation in Wireless Sensor Networks,"
+ * NSDI 2004. The component providing this interface defines the
+ * constants L, H, and K.
+ *
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+
+interface TrickleTimer {
+
+  /**
+   * Start the trickle timer. At boot, the timer period is its maximum
+   * value (H). If a protocol requires starting at the minimum value
+   * (e.g., fast start), then it should call reset before
+   * start.
+   *
+   * @return error_t SUCCESS if the timer was started, EBUSY if it is already
+   * running, and FAIL otherwise.
+   */
+  command error_t start();
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H and
+   * C to 0.
+   */
+  command void stop();
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void reset();
+
+  /**
+   * Increment the counter C. When an interval ends, C is set to 0.
+   */
+  command void incrementCounter();
+  
+  /**
+   * The trickle timer has fired. Signaled if C > K.
+   */  
+  event void fired();
+}
diff --git a/tos/lib/net/TrickleTimerImplP.nc b/tos/lib/net/TrickleTimerImplP.nc
new file mode 100644
index 00000000..1e61b46e
--- /dev/null
+++ b/tos/lib/net/TrickleTimerImplP.nc
@@ -0,0 +1,275 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * Module that provides a service instance of trickle timers. For
+ * details on the working of the parameters, please refer to Levis et
+ * al., "A Self-Regulating Algorithm for Code Maintenance and
+ * Propagation in Wireless Sensor Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+#include 
+
+generic module TrickleTimerImplP(uint16_t low,
+				 uint16_t high,
+				 uint8_t k,
+				 uint8_t count,
+				 uint8_t scale) {
+  provides {
+    interface Init;
+    interface TrickleTimer[uint8_t id];
+  }
+  uses {
+    interface Timer;
+    interface BitVector as Pending;
+    interface BitVector as Changed;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation {
+
+  typedef struct {
+    uint16_t period;
+    uint32_t time;
+    uint32_t remainder;
+    uint8_t count;
+  } trickle_t;
+
+  trickle_t trickles[count];
+  
+  void adjustTimer();
+  void generateTime(uint8_t id);
+  
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < count; i++) {
+      trickles[i].period = high;
+      trickles[i].count = 0;
+      trickles[i].time = 0;
+      trickles[i].remainder = 0;
+    }
+    atomic {
+      call Pending.clearAll();
+      call Changed.clearAll();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * Start a trickle timer. Reset the counter to 0.
+   */
+  command error_t TrickleTimer.start[uint8_t id]() {
+    if (trickles[id].time != 0) {
+      return EBUSY;
+    }
+    trickles[id].time = 0;
+    trickles[id].remainder = 0;
+    trickles[id].count = 0;
+    generateTime(id);
+    atomic {
+      call Changed.set(id);
+    }
+    adjustTimer();
+    dbg("Trickle", "Starting trickle timer %hhu @ %s\n", id, sim_time_string());
+    return SUCCESS;
+  }
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H.
+   */
+  command void TrickleTimer.stop[uint8_t id]() {
+    trickles[id].time = 0;
+    trickles[id].period = high;
+    adjustTimer();
+    dbg("Trickle", "Stopping trickle timer %hhu @ %s\n", id, sim_time_string());
+  }
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void TrickleTimer.reset[uint8_t id]() {
+    trickles[id].period = low;
+    trickles[id].count = 0;
+    if (trickles[id].time != 0) {
+      dbg("Trickle", "Resetting running trickle timer %hhu @ %s\n", id, sim_time_string());
+      atomic {
+	call Changed.set(id);
+      }
+      trickles[id].time = 0;
+      trickles[id].remainder = 0;
+      generateTime(id);
+      adjustTimer();
+    } else {
+      dbg("Trickle", "Resetting  trickle timer %hhu @ %s\n", id, sim_time_string());
+    }
+  }
+
+  /**
+   * Increment the counter C. When an interval ends, C is set to 0.
+   */
+  command void TrickleTimer.incrementCounter[uint8_t id]() {
+    trickles[id].count++;
+  }
+
+  task void timerTask() {
+    uint8_t i;
+    for (i = 0; i < count; i++) {
+      bool fire = FALSE;
+      atomic {
+	if (call Pending.get(i)) {
+	  call Pending.clear(i);
+	  fire = TRUE;
+	}
+      }
+      if (fire) {
+	dbg("Trickle", "Firing trickle timer %hhu @ %s\n", i, sim_time_string());
+	signal TrickleTimer.fired[i]();
+	post timerTask();
+	return;
+      }
+    }
+  }
+  
+  /**
+   * The trickle timer has fired. Signaled if C > K.
+   */
+  event void Timer.fired() {
+    uint8_t i;
+    uint32_t dt = call Timer.getdt();
+
+    for (i = 0; i < count; i++) {
+      uint32_t remaining = trickles[i].time;
+      if (remaining != 0) {
+	remaining -= dt;
+	if (remaining == 0) {
+	  if (trickles[i].count < k) {
+	    atomic {
+	      call Pending.set(i);
+	    }
+	    post timerTask();
+	  }
+
+	  generateTime(i);
+	    
+	  /* Note that this logic is not the exact trickle algorithm.
+	   * Rather than C being reset at the beginning of an interval,
+	   * it is being reset at a firing point. This means that the
+	   * listening period, rather than of length tau/2, is in the
+	   * range [tau/2, tau]. 
+	   */
+	  trickles[i].count = 0;
+	}
+	else {
+	  trickles[i].time = remaining;
+	}
+      }
+    }
+    adjustTimer();
+  }
+
+  // This is where all of the work is done!
+  void adjustTimer() {
+    uint8_t i;
+    uint32_t lowest = 0;
+    bool set = FALSE;
+
+    // How much time has elapsed on the current timer
+    // since it was scheduled? This value is needed because
+    // the time remaining of a running timer is its time
+    // value minus tiem elapsed.
+    uint32_t elapsed = (call Timer.getNow() - call Timer.gett0());
+	
+    for (i = 0; i < count; i++) {
+      uint32_t time = trickles[i].time;
+      if (time != 0) {
+	atomic {
+	  if (!call Changed.get(i)) {
+	    call Changed.clear(i);
+	    time -= elapsed;
+	  }
+	}
+	if (!set) {
+	  lowest = time;
+	  set = TRUE;
+	}
+	else if (time < lowest) {
+	  lowest = time;
+	}
+      }
+    }
+    if (set) {
+      uint32_t timerVal = lowest;
+      timerVal = timerVal;
+      dbg("Trickle", "Starting time with time %u.\n", timerVal);
+      call Timer.startOneShot(timerVal);
+    }
+    else {
+      call Timer.stop();
+    }
+  }
+
+  /* Generate a new firing time for a timer. if the timer was already
+   * running (time != 0), then double the period.
+   */
+  void generateTime(uint8_t id) {
+    uint32_t time;
+    uint16_t rval;
+    
+    if (trickles[id].time != 0) {
+      trickles[id].period *= 2;
+      if (trickles[id].period > high) {
+	trickles[id].period = high;
+      }
+    }
+    
+    trickles[id].time = trickles[id].remainder;
+    
+    time = trickles[id].period;
+    time = time << (scale - 1);
+
+    rval = call Random.rand16() % (trickles[id].period << (scale - 1));
+    time += rval;
+    
+    trickles[id].remainder = (trickles[id].period << scale) - time;
+    trickles[id].time += time;
+    dbg("Trickle,TrickleTimes", "Generated time for %hhu with period %hu (%u) is %u (%i + %hu)\n", id, trickles[id].period, (uint32_t)trickles[id].period << scale, trickles[id].time, (trickles[id].period << (scale - 1)), rval);
+  }
+
+ default event void TrickleTimer.fired[uint8_t id]() {
+   return;
+ }
+}
+
+  
diff --git a/tos/lib/net/TrickleTimerMilliC.nc b/tos/lib/net/TrickleTimerMilliC.nc
new file mode 100644
index 00000000..c9a32bc9
--- /dev/null
+++ b/tos/lib/net/TrickleTimerMilliC.nc
@@ -0,0 +1,66 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/*
+ * Configuration that encapsulates the trickle timer implementation to
+ * its needed services and initialization. For details on the working
+ * of the parameters, please refer to Levis et al., "A Self-Regulating
+ * Algorithm for Code Maintenance and Propagation in Wireless Sensor
+ * Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+
+generic configuration TrickleTimerMilliC(uint16_t low,
+					 uint16_t high,
+					 uint8_t k,
+					 uint8_t count) {
+  provides interface TrickleTimer[uint8_t];
+}
+implementation {
+  components new TrickleTimerImplP(low, high, k, count, 10), MainC, RandomC;
+  components new TimerMilliC();
+  components new BitVectorC(count) as PendingVector;
+  components new BitVectorC(count) as ChangeVector;
+  components LedsC;
+  TrickleTimer = TrickleTimerImplP;
+
+  TrickleTimerImplP.Timer -> TimerMilliC;
+  TrickleTimerImplP.Random -> RandomC;
+  TrickleTimerImplP.Changed -> ChangeVector;
+  TrickleTimerImplP.Pending -> PendingVector;
+  
+  TrickleTimerImplP.Leds -> LedsC;
+  MainC.SoftwareInit -> TrickleTimerImplP;
+}
+
+  
diff --git a/tos/lib/net/collection/.cvsignore b/tos/lib/net/collection/.cvsignore
new file mode 100644
index 00000000..1377554e
--- /dev/null
+++ b/tos/lib/net/collection/.cvsignore
@@ -0,0 +1 @@
+*.swp
diff --git a/tos/lib/net/collection/BasicRouting.nc b/tos/lib/net/collection/BasicRouting.nc
new file mode 100644
index 00000000..d3c9814e
--- /dev/null
+++ b/tos/lib/net/collection/BasicRouting.nc
@@ -0,0 +1,41 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** BasicRouting is to be implemented by all routing engines.
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+interface BasicRouting {
+    /** Get a set of neighbors that make progress towards the destination.
+     * @param nextHops: pointer to an array where to store the next hops found.
+     *                  This array is allocated at the caller. If the message
+     *                  is to be received by the local node, nextHops will 
+     *                  contain exactly one entry, TOS_LOCAL_ADDRESS.
+     * @param n : the maximum number of entries to return. Upon return, n
+     *            has the number of entries actually returned. If the message
+     *            is to be received locally, n will be set to 1.
+     * @return : if the result is FAIL, n cannot be used.
+     */
+    command error_t getNextHops(am_addr_t* nextHops, uint8_t* n);
+}
+
diff --git a/tos/lib/net/collection/Collection.h b/tos/lib/net/collection/Collection.h
new file mode 100644
index 00000000..23d6c870
--- /dev/null
+++ b/tos/lib/net/collection/Collection.h
@@ -0,0 +1,42 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+#ifndef COLLECTION_H
+#define COLLECTION_H
+
+enum {
+    AM_COLLECTION_DATA = 20,
+    AM_COLLECTION_CONTROL = 21,
+    AM_COLLECTION_DEBUG = 22,
+    AM_LINKEST = 0,
+};
+
+typedef uint8_t collection_id_t;
+
+#define UQ_COLLECTION_ID "CollectionSenderC.CollectId"
+
+#endif
diff --git a/tos/lib/net/collection/CollectionC.nc b/tos/lib/net/collection/CollectionC.nc
new file mode 100644
index 00000000..af332acb
--- /dev/null
+++ b/tos/lib/net/collection/CollectionC.nc
@@ -0,0 +1,69 @@
+/* $Id$ */
+#include "Collection.h"
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+configuration CollectionC {
+    provides {
+        interface SplitControl;
+        interface Send;
+        interface Receive;
+        interface Receive as Snoop;
+        interface Intercept;
+        interface Packet;
+        interface RootControl;
+    }
+}
+
+implementation {
+  components new ForwardingEngineP(), new TreeRoutingEngineP(8), LinkEstimatorC;
+    
+  Send = ForwardingEngineP;
+  Receive = ForwardingEngineP;
+  Snoop = ForwardingEngineP;
+  Intercept = ForwardingEngineP;
+  Packet = ForwardingEngineP;
+  RootControl = TreeRoutingEngineP;
+  
+  ForwardingEngineP.BasicRouting -> TreeRoutingEngineP;
+  TreeRoutingEngineP.LinkEstimator -> LinkEstimatorC;
+  
+  components new LinkEstimatorAMSenderC(AM_COLLECTION_DATA) 
+    as DataAMSender; 
+  ForwardingEngineP.AMSend -> DataAMSender;
+  
+  components new LinkEstimatorAMReceiverC(AM_COLLECTION_DATA) 
+    as DataAMReceiver;
+  ForwardingEngineP.AMReceive -> DataAMReceiver;
+  
+  components new LinkEstimatorAMSenderC(AM_COLLECTION_CONTROL) 
+    as ControlAMSender; 
+  TreeRoutingEngineP.AMSend -> ControlAMSender;
+  
+  components new LinkEstimatorAMReceiverC(AM_COLLECTION_CONTROL)
+    as ControlAMReceiver;
+  TreeRoutingEngineP.AMReceive -> ControlAMReceiver;     
+}
diff --git a/tos/lib/net/collection/CollectionDebug.nc b/tos/lib/net/collection/CollectionDebug.nc
new file mode 100644
index 00000000..23d5fcbc
--- /dev/null
+++ b/tos/lib/net/collection/CollectionDebug.nc
@@ -0,0 +1,69 @@
+/* $Id$*/
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** 
+ *  The CollectionDebug is an interface for sending debugging events to
+ *  a logging infrastructure. An implementer can choose to send the event
+ *  information to different destinations. Primary examples can include:
+ *  
      
+ *    
    •  logging to the UART, in case of a testbed of network-connected
+ *         nodes;
+ *    
    •  logging to flash, if the logs are to be retrieved later
+ *    
    •  logging to the standard output, in the case of TOSSIM.
+ *  
    
+ *  
+ *  The interface does not specify in what format the log is to be produced,
+ *  or if other information, like timestamps, should be added, and this is
+ *  up to the implementer.
+ * 
+ *  Some commands are generic, like Event, EventSimple, and EventDbg, while others
+ *  are for more specific events related to collection, like EventRoute and EventMsg.
+ *
+ 
+ * @author Rodrigo Fonseca
+ * @author Kyle Jamieson
+ * @date   $Date$
+ */
+
+interface CollectionDebug {
+    /* Log the occurrence of an event of type type */
+    command error_t logEvent(uint8_t type);
+
+    /* Log the occurrence of an event and a single parameter */
+    command error_t logEventSimple(uint8_t type, uint16_t arg);
+
+    /* Log the occurrence of an event and 3 16bit parameters */
+    command error_t logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3);
+
+    /* Log the occurrence of an event related to forwarding a message.
+     * This is intended to allow following the same message as it goes from one
+     * hop to the next 
+     */
+    command error_t logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node);
+
+    /* Log the occurrence of an event related to a route update message, 
+     * such as a node receiving a route, updating its own route information,
+     * or looking at a particular entry in its routing table.
+     */
+    command error_t logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric);
+}
diff --git a/tos/lib/net/collection/CollectionDebugMsg.h b/tos/lib/net/collection/CollectionDebugMsg.h
new file mode 100644
index 00000000..e666979f
--- /dev/null
+++ b/tos/lib/net/collection/CollectionDebugMsg.h
@@ -0,0 +1,74 @@
+#ifndef _COLLECTION_UART_MSG
+#define _COLLECTION_UART_MSG
+
+#include "AM.h"
+
+//Comment format ->   :meaning:args
+enum {
+    NET_C_DEBUG_STARTED = 0xDE,
+
+    NET_C_FE_MSG_POOL_EMPTY = 0x10,    //::no args
+    NET_C_FE_SEND_QUEUE_FULL = 0x11,   //::no args
+    NET_C_FE_NO_ROUTE = 0x12,          //::no args
+    NET_C_FE_SUBSEND_OFF = 0x13,
+    NET_C_FE_SUBSEND_BUSY = 0x14,
+    NET_C_FE_BAD_SENDDONE = 0x15,
+    NET_C_FE_QENTRY_POOL_EMPTY = 0x16,
+    NET_C_FE_SUBSEND_SIZE = 0x17,
+    NET_C_FE_LOOP_DETECTED = 0x18,
+    NET_C_FE_SEND_BUSY = 0x19,
+
+    NET_C_FE_SENDQUEUE_EMPTY = 0x50,
+    NET_C_FE_PUT_MSGPOOL_ERR = 0x51,
+    NET_C_FE_PUT_QEPOOL_ERR = 0x52,
+    NET_C_FE_GET_MSGPOOL_ERR = 0x53,
+    NET_C_FE_GET_QEPOOL_ERR = 0x54,
+
+    NET_C_FE_SENT_MSG = 0x20,  //:app. send       :msg uid, origin, next_hop
+    NET_C_FE_RCV_MSG =  0x21,  //:next hop receive:msg uid, origin, last_hop
+    NET_C_FE_FWD_MSG =  0x22,  //:fwd msg         :msg uid, origin, next_hop
+    NET_C_FE_DST_MSG =  0x23,  //:base app. recv  :msg_uid, origin, last_hop
+    NET_C_FE_SENDDONE_FAIL = 0x24,
+    NET_C_FE_SENDDONE_WAITACK = 0x25,
+    NET_C_FE_SENDDONE_FAIL_ACK_SEND = 0x26,
+    NET_C_FE_SENDDONE_FAIL_ACK_FWD  = 0x27,
+    NET_C_FE_DUPLICATE_CACHE = 0x28,  //dropped duplicate packet seen in cache
+    NET_C_FE_DUPLICATE_QUEUE = 0x29,  //dropped duplicate packet seen in queue
+    NET_C_FE_DUPLICATE_CACHE_AT_SEND = 0x2A,  //dropped duplicate packet seen in cache
+
+
+    NET_C_TREE_NO_ROUTE   = 0x30,   //:        :no args
+    NET_C_TREE_NEW_PARENT = 0x31,   //:        :parent_id, hopcount, metric
+    NET_C_TREE_ROUTE_INFO = 0x32,   //:periodic:parent_id, hopcount, metric
+    NET_C_TREE_SENT_BEACON = 0x33,
+    NET_C_TREE_RCV_BEACON = 0x34,
+
+    NET_C_DBG_1 = 0x40,             //:any     :uint16_t a
+    NET_C_DBG_2 = 0x41,             //:any     :uint16_t a, b, c
+    NET_C_DBG_3 = 0x42,             //:any     :uint16_t a, b, c
+};
+
+typedef nx_struct CollectionDebugMsg {
+    nx_uint8_t type;
+    nx_union {
+        nx_uint16_t arg;
+        nx_struct {
+            nx_uint16_t msg_uid;   
+            nx_am_addr_t origin;
+            nx_am_addr_t other_node;
+        } msg;
+        nx_struct {
+            nx_am_addr_t parent;
+            nx_uint8_t hopcount;
+            nx_uint16_t metric;
+        } route_info;
+        nx_struct {
+            nx_uint16_t a;
+            nx_uint16_t b;
+            nx_uint16_t c;
+        } dbg;
+    } data;
+    nx_uint16_t seqno;
+} CollectionDebugMsg;
+
+#endif
diff --git a/tos/lib/net/collection/CollectionId.nc b/tos/lib/net/collection/CollectionId.nc
new file mode 100644
index 00000000..e48c8c2c
--- /dev/null
+++ b/tos/lib/net/collection/CollectionId.nc
@@ -0,0 +1,5 @@
+#include "Collection.h"
+
+interface CollectionId {
+  command collection_id_t fetch();
+}
diff --git a/tos/lib/net/collection/CollectionIdP.nc b/tos/lib/net/collection/CollectionIdP.nc
new file mode 100644
index 00000000..b4430ad7
--- /dev/null
+++ b/tos/lib/net/collection/CollectionIdP.nc
@@ -0,0 +1,11 @@
+#include "Collection.h"
+
+generic module CollectionIdP(collection_id_t collectid) {
+  provides interface CollectionId;
+}
+
+implementation {
+  command collection_id_t CollectionId.fetch() {
+    return collectid;
+  }
+}
diff --git a/tos/lib/net/collection/CollectionPacket.nc b/tos/lib/net/collection/CollectionPacket.nc
new file mode 100644
index 00000000..5c152d6d
--- /dev/null
+++ b/tos/lib/net/collection/CollectionPacket.nc
@@ -0,0 +1,61 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date$
+ */
+
+#include 
+   
+interface CollectionPacket {
+  command am_addr_t getOrigin(message_t* msg);
+  command void setOrigin(message_t* msg, am_addr_t addr);
+
+  command uint8_t getCollectionID(message_t* msg);
+  command void setCollectionID(message_t* msg, uint8_t id);
+
+  command uint8_t getControl(message_t* msg);
+  command void setControl(message_t* msg, uint8_t control);
+
+  command uint8_t getSequenceNumber(message_t* msg);
+  command void setSequenceNumber(message_t* msg, uint8_t seqno);
+
+  command uint16_t getGradient(message_t* msg);
+  command void setGradient(message_t* msg, uint16_t gradient);
+
+  /** 
+   * Returns a 32bit number which is a concatenation of
+   * the origin and the sequence number */
+  command uint32_t getPacketID(message_t* msg);
+}
diff --git a/tos/lib/net/collection/CollectionSenderC.nc b/tos/lib/net/collection/CollectionSenderC.nc
new file mode 100644
index 00000000..d75df489
--- /dev/null
+++ b/tos/lib/net/collection/CollectionSenderC.nc
@@ -0,0 +1,24 @@
+/**
+ * The virtualized collection sender abstraction.
+ *
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ * @date April 25 2006
+ * @see TinyOS Net2-WG
+ */
+
+#include "Collection.h"
+#include "TreeCollection.h"
+
+generic configuration CollectionSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+implementation {
+  components new CollectionSenderP(collectid, unique(UQ_COLLECTION_CLIENT));
+  Send = CollectionSenderP;
+  Packet = CollectionSenderP;
+}
diff --git a/tos/lib/net/collection/CollectionSenderP.nc b/tos/lib/net/collection/CollectionSenderP.nc
new file mode 100644
index 00000000..926b15b5
--- /dev/null
+++ b/tos/lib/net/collection/CollectionSenderP.nc
@@ -0,0 +1,18 @@
+#include "Collection.h"
+
+generic configuration 
+CollectionSenderP(collection_id_t collectid, uint8_t clientid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+implementation {
+  components TreeCollectionC as Collector;
+  components new CollectionIdP(collectid);
+  
+  Send = Collector.Send[clientid];
+  Packet = Collector.Packet;
+  Collector.CollectionId[clientid] -> CollectionIdP;
+}
diff --git a/tos/lib/net/collection/CostBasedRouting.nc b/tos/lib/net/collection/CostBasedRouting.nc
new file mode 100644
index 00000000..a751ebaa
--- /dev/null
+++ b/tos/lib/net/collection/CostBasedRouting.nc
@@ -0,0 +1,27 @@
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+interface CostBasedRouting {
+    command uint16_t getMyCost(uint8_t tree_id);
+    command uint16_t getNeighborCost(uint8_t tree_id, uint16_t neighbor);
+}
+
diff --git a/tos/lib/net/collection/ForwardingEngine.h b/tos/lib/net/collection/ForwardingEngine.h
new file mode 100644
index 00000000..97a4d36f
--- /dev/null
+++ b/tos/lib/net/collection/ForwardingEngine.h
@@ -0,0 +1,116 @@
+#ifndef FORWARDING_ENGINE_H
+#define FORWARDING_ENGINE_H
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+
+/**
+ * Author: Philip Levis
+ * Author: Kyle Jamieson 
+ * Author: Omprakash Gnawali
+ * Author: Rodrigo Fonseca
+ */
+
+/* 
+ * These timings are in milliseconds, and are used by
+ * ForwardingEngineP. Each pair of values represents a range of
+ * [OFFSET - (OFFSET + WINDOW)]. The ForwardingEngine uses these
+ * values to determine when to send the next packet after an
+ * event. FAIL refers to a send fail (an error from the radio below),
+ * NOACK refers to the previous packet not being acknowledged,
+ * OK refers to an acknowledged packet, and LOOPY refers to when
+ * a loop is detected.
+ *
+ * These timings are defined in terms of packet times. Currently,
+ * two values are defined: for CC2420-based platforms (4ms) and
+ * all other platfoms (32ms). 
+ */
+
+enum {
+#if PLATFORM_MICAZ || PLATFORM_TELOSA || PLATFORM_TELOSB || PLATFORM_TMOTE
+  FORWARD_PACKET_TIME = 4,
+#else
+  FORWARD_PACKET_TIME = 32,
+#endif
+};
+
+enum {
+  SENDDONE_FAIL_OFFSET      =                       512,
+  SENDDONE_NOACK_OFFSET     = FORWARD_PACKET_TIME  << 2,
+  SENDDONE_OK_OFFSET        = FORWARD_PACKET_TIME  << 2,
+  LOOPY_OFFSET              = FORWARD_PACKET_TIME  << 4,
+  SENDDONE_FAIL_WINDOW      = SENDDONE_FAIL_OFFSET  - 1,
+  LOOPY_WINDOW              = LOOPY_OFFSET          - 1,
+  SENDDONE_NOACK_WINDOW     = SENDDONE_NOACK_OFFSET - 1,
+  SENDDONE_OK_WINDOW        = SENDDONE_OK_OFFSET    - 1,
+};
+
+
+/* 
+ * The number of times the ForwardingEngine will try to 
+ * transmit a packet before giving up if the link layer
+ * supports acknowledgments. If the link layer does
+ * not support acknowledgments it sends the packet once.
+ */
+enum {
+  MAX_RETRIES = 4
+};
+
+/*
+ * The network header that the ForwardingEngine introduces.
+ * This header will change for the TinyOS 2.0 full release 
+ * (it needs several optimizations).
+ */
+typedef nx_struct {
+  nx_uint8_t control;
+  nx_am_addr_t origin;
+  nx_uint8_t seqno;
+  nx_uint8_t collectid;
+  nx_uint16_t gradient;
+} network_header_t;
+
+/*
+ * An element in the ForwardingEngine send queue.
+ * The client field keeps track of which send client 
+ * submitted the packet or if the packet is being forwarded
+ * from another node (client == 255). Retries keeps track
+ * of how many times the packet has been transmitted.
+ */
+typedef struct {
+  message_t *msg;
+  uint8_t client;
+  uint8_t retries;
+} fe_queue_entry_t;
+
+#endif
diff --git a/tos/lib/net/collection/ForwardingEngineP.nc b/tos/lib/net/collection/ForwardingEngineP.nc
new file mode 100644
index 00000000..eeaa3490
--- /dev/null
+++ b/tos/lib/net/collection/ForwardingEngineP.nc
@@ -0,0 +1,884 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  The ForwardingEngine is responsible for queueing and scheduling outgoing
+ *  packets in a collection protocol. It maintains a pool of forwarding messages 
+ *  and a packet send 
+ *  queue. A ForwardingEngine with a forwarding message pool of size F 
+ *  and C CollectionSenderC clients has a send queue of size
+ *  F + C. This implementation has a large number of configuration
+ *  constants, which can be found in ForwardingEngine.h.
+ *
+ *  
    Packets in the send queue are sent in FIFO order, with head-of-line
+ *  blocking. Because this is a tree collection protocol, all packets are going
+ *  to the same destination, and so the ForwardingEngine does not distinguish
+ *  packets from one another: packets from CollectionSenderC clients are
+ *  treated identically to forwarded packets.
    
+ *
+ *  
    If ForwardingEngine is on top of a link layer that supports
+ *  synchronous acknowledgments, it enables them and retransmits packets
+ *  when they are not acked. It transmits a packet up to MAX_RETRIES times
+ *  before giving up and dropping the packet.
     
+ *
+ *  
    The ForwardingEngine detects routing loops and tries to correct
+ *  them. It assumes that the collection tree is based on a gradient,
+ *  such as hop count or estimated transmissions. When the ForwardingEngine
+ *  sends a packet to the next hop, it puts the local gradient value in
+ *  the packet header. If a node receives a packet to forward whose
+ *  gradient value is less than its own, then the gradient is not monotonically
+ *  decreasing and there may be a routing loop. When the ForwardingEngine
+ *  receives such a packet, it tells the RoutingEngine to advertise its
+ *  gradient value soon, with the hope that the advertisement will update
+ *  the node who just sent a packet and break the loop.
+ *  
+ *  
    ForwardingEngine times its packet transmissions. It differentiates
+ *  between four transmission cases: forwarding, success, ack failure, 
+ *  and loop detection. In each case, the
+ *  ForwardingEngine waits a randomized period of time before sending the next
+ *  packet. This approach assumes that the network is operating at low
+ *  utilization; its goal is to prevent correlated traffic -- such as 
+ *  nodes along a route forwarding packets -- from interfering with itself.
+ *
+ *  
+ *    
+ *      
+ *      
+ *      
+ *      
+ *    
+ *    
+ *      
+ *      
+ *      
+ *      
+ *    
+ *    
+ *      
+ *      
+ *      
+ *      
+ *    
+ *    
+ *      
+ *      
+ *      
+ *      
+ *    
+ *    
+ *      
+ *      
+ *      
+ *      
+ *    
+ *  
    CaseCC2420 Wait (ms)Other Wait (ms)Description
    ForwardingImmediateImmediateWhen the ForwardingEngine receives a packet to forward and it is not
+ *          already sending a packet (queue is empty). In this case, it immediately
+ *          forwards the packet.
    Success16-31128-255When the ForwardingEngine successfully sends a packet to the next
+ *          hop, it waits this long before sending the next packet in the queue.
+ *          
    Ack Failure8-15128-255If the link layer supports acks and the ForwardingEngine did not
+ *          receive an acknowledgment from the next hop, it waits this long before
+ *          trying a retransmission. If the packet has exceeded the retransmission
+ *          count, ForwardingEngine drops the packet and uses the Success timer instead. 
    Loop Detection32-63512-1023If the ForwardingEngine is asked to forward a packet from a node that
+ *          believes it is closer to the root, the ForwardingEngine pauses its
+ *          transmissions for this interval and triggers the RoutingEngine to 
+ *          send an update. The goal is to let the gradient become consistent before
+ *          sending packets, in order to prevent routing loops from consuming
+ *          bandwidth and energy.
      
+ *
+ *  
    The times above are all for CC2420-based platforms. The timings for
+ *  other platforms depend on their bit rates, as they are based on packet
+ *  transmission times.
    
+
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date$
+ */
+
+#include 
+#include "CollectionDebugMsg.h"
+   
+generic module ForwardingEngineP() {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t id];
+    interface Intercept[collection_id_t id];
+    interface Packet;
+    interface CollectionPacket;
+  }
+  uses {
+    interface AMSend as SubSend;
+    interface Receive as SubReceive;
+    interface Receive as SubSnoop;
+    interface Packet as SubPacket;
+    interface UnicastNameFreeRouting;
+    interface SplitControl as RadioControl;
+    interface Queue as SendQueue;
+    interface Pool as QEntryPool;
+    interface Pool as MessagePool;
+    interface Timer as RetxmitTimer;
+    interface Cache as SentCache;
+    interface TreeRoutingInspect;
+    interface PacketAcknowledgements;
+    interface Random;
+    interface RootControl;
+    interface CollectionId[uint8_t client];
+    interface AMPacket;
+    interface CollectionDebug;
+  }
+}
+implementation {
+  /* Starts the retxmit timer with a random number masked by the given
+   * mask and added to the given offset.
+   */
+  static void startRetxmitTimer(uint16_t mask, uint16_t offset);
+
+  /* Keeps track of whether the routing layer is running; if not,
+   * it will not send packets. */
+  bool running = FALSE;
+
+  /* Keeps track of whether the radio is on; no sense sending packets
+   * if the radio is off. */
+  bool radioOn = FALSE;
+
+  /* Keeps track of whether an ack is pending on an outgoing packet,
+   * so that the engine can work unreliably when the data-link layer
+   * does not support acks. */
+  bool ackPending = FALSE;
+
+  /* Keeps track of whether the packet on the head of the queue
+   * is being used, and control access to the data-link layer.*/
+  bool sending = FALSE;
+
+  /* Keep track of the last parent address we sent to, so that
+     unacked packets to an old parent are not incorrectly attributed
+     to a new parent. */
+  am_addr_t lastParent;
+  
+  /* Network-level sequence number, so that receivers
+   * can distinguish retransmissions from different packets. */
+  uint8_t seqno;
+
+  enum {
+    CLIENT_COUNT = uniqueCount(UQ_COLLECTION_CLIENT)
+  };
+
+  /* Each sending client has its own reserved queue entry.
+     If the client has a packet pending, its queue entry is in the 
+     queue, and its clientPtr is NULL. If the client is idle,
+     its queue entry is pointed to by clientPtrs. */
+
+  fe_queue_entry_t clientEntries[CLIENT_COUNT];
+  fe_queue_entry_t* clientPtrs[CLIENT_COUNT];
+
+  /* The loopback message is for when a collection roots calls
+     Send.send. Since Send passes a pointer but Receive allows
+     buffer swaps, the forwarder copies the sent packet into 
+     the loopbackMsgPtr and performs a buffer swap with it.
+     See sendTask(). */
+     
+  message_t loopbackMsg;
+  message_t* loopbackMsgPtr;
+
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < CLIENT_COUNT; i++) {
+      clientPtrs[i] = clientEntries + i;
+      dbg("Forwarder", "clientPtrs[%hhu] = %p\n", i, clientPtrs[i]);
+    }
+    loopbackMsgPtr = &loopbackMsg;
+    lastParent = call AMPacket.address();
+    seqno = 0;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    running = TRUE;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    running = FALSE;
+    return SUCCESS;
+  }
+
+  /* sendTask is where the first phase of all send logic
+   * exists (the second phase is in SubSend.sendDone()). */
+  task void sendTask();
+  
+  /* ForwardingEngine keeps track of whether the underlying
+     radio is powered on. If not, it enqueues packets;
+     when it turns on, it then starts sending packets. */ 
+  event void RadioControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      radioOn = TRUE;
+      if (!call SendQueue.empty()) {
+        post sendTask();
+      }
+    }
+  }
+ 
+  /* 
+   * If the ForwardingEngine has stopped sending packets because
+   * these has been no route, then as soon as one is found, start
+   * sending packets.
+   */ 
+  event void UnicastNameFreeRouting.routeFound() {
+    post sendTask();
+  }
+
+  event void UnicastNameFreeRouting.noRoute() {
+    // Depend on the sendTask to take care of this case;
+    // if there is no route the component will just resume
+    // operation on the routeFound event
+  }
+  
+  event void RadioControl.stopDone(error_t err) {
+    if (err == SUCCESS) {
+      radioOn = FALSE;
+    }
+  }
+
+  network_header_t* getHeader(message_t* m) {
+    return (network_header_t*)call SubPacket.getPayload(m, NULL);
+  }
+ 
+  /*
+   * The send call from a client. Return EBUSY if the client is busy
+   * (clientPtrs is NULL), otherwise configure its queue entry
+   * and put it in the send queue. If the ForwardingEngine is not
+   * already sending packets (the RetxmitTimer isn't running), post
+   * sendTask. It could be that the engine is running and sendTask
+   * has already been posted, but the post-once semantics make this
+   * not matter.
+   */ 
+  command error_t Send.send[uint8_t client](message_t* msg, uint8_t len) {
+    network_header_t* hdr;
+    fe_queue_entry_t *qe;
+    dbg("Forwarder", "%s: sending packet from client %hhu: %x, len %hhu\n", __FUNCTION__, client, msg, len);
+    if (!running) {return EOFF;}
+    if (len > call Send.maxPayloadLength[client]()) {return ESIZE;}
+    
+    call Packet.setPayloadLength(msg, len);
+    hdr = getHeader(msg);
+    hdr->origin = TOS_NODE_ID;
+    hdr->seqno  = seqno++;
+    hdr->collectid = call CollectionId.fetch[client]();
+
+    if (clientPtrs[client] == NULL) {
+      dbg("Forwarder", "%s: send failed as client is busy.\n", __FUNCTION__);
+      return EBUSY;
+    }
+
+    qe = clientPtrs[client];
+    qe->msg = msg;
+    qe->client = client;
+    qe->retries = MAX_RETRIES;
+    dbg("Forwarder", "%s: queue entry for %hhu is %hhu deep\n", __FUNCTION__, client, call SendQueue.size());
+    if (call SendQueue.enqueue(qe) == SUCCESS) {
+      if (radioOn && !call RetxmitTimer.isRunning()) {
+        post sendTask();
+      }
+      clientPtrs[client] = NULL;
+      return SUCCESS;
+    }
+    else {
+      dbg("Forwarder", 
+          "%s: send failed as packet could not be enqueued.\n", 
+          __FUNCTION__);
+      
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL);
+
+      // Return the pool entry, as it's not for me...
+      return FAIL;
+    }
+  }
+
+  command error_t Send.cancel[uint8_t client](message_t* msg) {
+    // cancel not implemented. will require being able
+    // to pull entries out of the queue.
+    return FAIL;
+  }
+
+  command uint8_t Send.maxPayloadLength[uint8_t client]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload[uint8_t client](message_t* msg) {
+    return call Packet.getPayload(msg, NULL);
+  }
+
+  /*
+   * These is where all of the send logic is. When the ForwardingEngine
+   * wants to send a packet, it posts this task. The send logic is
+   * independent of whether it is a forwarded packet or a packet from
+   * a send client. 
+   *
+   * The task first checks that there is a packet to send and that
+   * there is a valid route. It then marshals the relevant arguments
+   * and prepares the packet for sending. If the node is a collection
+   * root, it signals Receive with the loopback message. Otherwise,
+   * it sets the packet to be acknowledged and sends it. It does not
+   * remove the packet from the send queue: while sending, the 
+   * packet being sent is at the head of the queue; a packet is dequeued
+   * in the sendDone handler, either due to retransmission failure
+   * or to a successful send.
+   */
+
+  task void sendTask() {
+    dbg("Forwarder", "%s: Trying to send a packet. Queue size is %hhu.\n", __FUNCTION__, call SendQueue.size());
+    if (sending) {
+      dbg("Forwarder", "%s: busy, don't send\n", __FUNCTION__);
+      call CollectionDebug.logEvent(NET_C_FE_SEND_BUSY);
+      return;
+    }
+    else if (call SendQueue.empty()) {
+      dbg("Forwarder", "%s: queue empty, don't send\n", __FUNCTION__);
+      call CollectionDebug.logEvent(NET_C_FE_SENDQUEUE_EMPTY);
+      return;
+    }
+    else if (!call RootControl.isRoot() && 
+             !call UnicastNameFreeRouting.hasRoute()) {
+      dbg("Forwarder", "%s: no route, don't send, start retry timer\n", __FUNCTION__);
+      call RetxmitTimer.startOneShot(10000);
+
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_NO_ROUTE);
+
+      return;
+    }
+    else {
+      error_t subsendResult;
+      fe_queue_entry_t* qe = call SendQueue.head();
+      uint8_t payloadLen = call SubPacket.payloadLength(qe->msg);
+      am_addr_t dest = call UnicastNameFreeRouting.nextHop();
+      uint32_t msg_uid = call CollectionPacket.getPacketID(qe->msg);
+      uint16_t gradient;
+
+      if (call SentCache.lookup(msg_uid)) {
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE_AT_SEND);
+        call SendQueue.dequeue();
+	post sendTask();
+        return;
+      }
+      /* If our current parent is not the same as the last parent
+	 we sent do, then reset the count of unacked packets: don't
+	 penalize a new parent for the failures of a prior one.*/
+      if (dest != lastParent) {
+	qe->retries = MAX_RETRIES;
+	lastParent = dest;
+      }
+ 
+      dbg("Forwarder", "Sending queue entry %p\n", qe);
+      if (call RootControl.isRoot()) {
+        collection_id_t collectid = getHeader(qe->msg)->collectid;
+        memcpy(loopbackMsgPtr, qe->msg, sizeof(message_t));
+        ackPending = FALSE;
+	
+        dbg("Forwarder", "%s: I'm a root, so loopback and signal receive.\n", __FUNCTION__);
+        loopbackMsgPtr = signal Receive.receive[collectid](loopbackMsgPtr,
+							  call Packet.getPayload(loopbackMsgPtr, NULL), 
+							  call Packet.payloadLength(loopbackMsgPtr));
+        signal SubSend.sendDone(qe->msg, SUCCESS);
+        return;
+      }
+      
+      // Loop-detection functionality:
+      if (call TreeRoutingInspect.getMetric(&gradient) != SUCCESS) {
+        // If we have no metric, set our gradient conservatively so
+        // that other nodes don't automatically drop our packets.
+        gradient = 0;
+      }
+      call CollectionPacket.setGradient(qe->msg, gradient);
+      
+      ackPending = (call PacketAcknowledgements.requestAck(qe->msg) == SUCCESS);
+      
+      subsendResult = call SubSend.send(dest, qe->msg, payloadLen);
+      if (subsendResult == SUCCESS) {
+        // Successfully submitted to the data-link layer.
+        sending = TRUE;
+        dbg("Forwarder", "%s: subsend succeeded with %p.\n", __FUNCTION__, qe->msg);
+        if (qe->client < CLIENT_COUNT) {
+	        dbg("Forwarder", "%s: client packet.\n", __FUNCTION__);
+        }
+        else {
+	        dbg("Forwarder", "%s: forwarded packet.\n", __FUNCTION__);
+        }
+        return;
+      }
+      else if (subsendResult == EOFF) {
+	// The radio has been turned off underneath us. Assume that
+	// this is for the best. When the radio is turned back on, we'll
+	// handle a startDone event and resume sending.
+        radioOn = FALSE;
+	dbg("Forwarder", "%s: subsend failed from EOFF.\n", __FUNCTION__);
+        // send a debug message to the uart
+      	call CollectionDebug.logEvent(NET_C_FE_SUBSEND_OFF);
+      }
+      else if (subsendResult == EBUSY) {
+	// This shouldn't happen, as we sit on top of a client and
+        // control our own output; it means we're trying to
+        // double-send (bug). This means we expect a sendDone, so just
+        // wait for that: when the sendDone comes in, // we'll try
+        // sending this packet again.	
+	dbg("Forwarder", "%s: subsend failed from EBUSY.\n", __FUNCTION__);
+        // send a debug message to the uart
+        call CollectionDebug.logEvent(NET_C_FE_SUBSEND_BUSY);
+      }
+      else if (subsendResult == ESIZE) {
+	dbg("Forwarder", "%s: subsend failed from ESIZE: truncate packet.\n", __FUNCTION__);
+	call Packet.setPayloadLength(qe->msg, call Packet.maxPayloadLength());
+	post sendTask();
+	call CollectionDebug.logEvent(NET_C_FE_SUBSEND_SIZE);
+      }
+    }
+  }
+
+  void sendDoneBug() {
+    // send a debug message to the uart
+    call CollectionDebug.logEvent(NET_C_FE_BAD_SENDDONE);
+  }
+
+  /*
+   * The second phase of a send operation; based on whether the transmission was
+   * successful, the ForwardingEngine either stops sending or starts the
+   * RetxmitTimer with an interval based on what has occured. If the send was
+   * successful or the maximum number of retransmissions has been reached, then
+   * the ForwardingEngine dequeues the current packet. If the packet is from a
+   * client it signals Send.sendDone(); if it is a forwarded packet it returns
+   * the packet and queue entry to their respective pools.
+   * 
+   */
+
+  event void SubSend.sendDone(message_t* msg, error_t error) {
+    fe_queue_entry_t *qe = call SendQueue.head();
+    dbg("Forwarder", "%s to %hu and %hhu\n", __FUNCTION__, call AMPacket.destination(msg), error);
+    if (qe == NULL || qe->msg != msg) {
+      dbg("Forwarder", "%s: BUG: not our packet (%p != %p)!\n", __FUNCTION__, msg, qe->msg);
+      sendDoneBug();      // Not our packet, something is very wrong...
+      return;
+    }
+    else if (error != SUCCESS) {
+      // Immediate retransmission is the worst thing to do.
+      dbg("Forwarder", "%s: send failed\n", __FUNCTION__);
+      call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+      startRetxmitTimer(SENDDONE_FAIL_WINDOW, SENDDONE_FAIL_OFFSET);
+    }
+    else if (ackPending && !call PacketAcknowledgements.wasAcked(msg)) {
+      // AckPending is for case when DL cannot support acks.
+      if (--qe->retries) { 
+        dbg("Forwarder", "%s: not acked\n", __FUNCTION__);
+        call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+        startRetxmitTimer(SENDDONE_NOACK_WINDOW, SENDDONE_NOACK_OFFSET);
+      } else {
+        //max retries, dropping packet
+        if (qe->client < CLIENT_COUNT) {
+            clientPtrs[qe->client] = qe;
+            signal Send.sendDone[qe->client](msg, FAIL);
+            call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_SEND, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+        } else {
+           if (call MessagePool.put(qe->msg) != SUCCESS)
+             call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR);
+           if (call QEntryPool.put(qe) != SUCCESS)
+             call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR);
+           call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_FWD, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+        }
+        call SendQueue.dequeue();
+        sending = FALSE;
+        startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET);
+      }
+    }
+    else if (qe->client < CLIENT_COUNT) {
+      network_header_t* hdr;
+      uint8_t client = qe->client;
+      dbg("Forwarder", "%s: our packet for client %hhu, remove %p from queue\n", 
+          __FUNCTION__, client, qe);
+      call CollectionDebug.logEventMsg(NET_C_FE_SENT_MSG, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+      clientPtrs[client] = qe;
+      hdr = getHeader(qe->msg);
+      call SendQueue.dequeue();
+      signal Send.sendDone[client](msg, SUCCESS);
+      sending = FALSE;
+      startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET);
+    }
+    else if (call MessagePool.size() < call MessagePool.maxSize()) {
+      // A successfully forwarded packet.
+      dbg("Forwarder,Route", "%s: successfully forwarded packet (client: %hhu), message pool is %hhu/%hhu.\n", __FUNCTION__, qe->client, call MessagePool.size(), call MessagePool.maxSize());
+      call CollectionDebug.logEventMsg(NET_C_FE_FWD_MSG, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+      call SentCache.insert(call CollectionPacket.getPacketID(qe->msg));
+      call SendQueue.dequeue();
+      if (call MessagePool.put(qe->msg) != SUCCESS)
+        call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR);
+      if (call QEntryPool.put(qe) != SUCCESS)
+        call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR);
+      sending = FALSE;
+      startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET);
+    }
+    else {
+      dbg("Forwarder", "%s: BUG: we have a pool entry, but the pool is full, client is %hhu.\n", __FUNCTION__, qe->client);
+      sendDoneBug();    // It's a forwarded packet, but there's no room the pool;
+      // someone has double-stored a pointer somewhere and we have nowhere
+      // to put this, so we have to leak it...
+    }
+  }
+
+  /*
+   * Function for preparing a packet for forwarding. Performs
+   * a buffer swap from the message pool. If there are no free
+   * message in the pool, it returns the passed message and does not
+   * put it on the send queue.
+   */
+  message_t* forward(message_t* m) {
+    if (call MessagePool.empty()) {
+      dbg("Route", "%s cannot forward, message pool empty.\n", __FUNCTION__);
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_MSG_POOL_EMPTY);
+    }
+    else if (call QEntryPool.empty()) {
+      dbg("Route", "%s cannot forward, queue entry pool empty.\n", 
+          __FUNCTION__);
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_QENTRY_POOL_EMPTY);
+    }
+    else {
+      message_t* newMsg;
+      fe_queue_entry_t *qe;
+      uint16_t gradient;
+      
+      qe = call QEntryPool.get();
+      if (qe == NULL) {
+        call CollectionDebug.logEvent(NET_C_FE_GET_MSGPOOL_ERR);
+        return m;
+      }
+
+      newMsg = call MessagePool.get();
+      if (newMsg == NULL) {
+        call CollectionDebug.logEvent(NET_C_FE_GET_QEPOOL_ERR);
+        return m;
+      }
+
+      memset(newMsg, 0, sizeof(message_t));
+      memset(m->metadata, 0, sizeof(message_metadata_t));
+      
+      qe->msg = m;
+      qe->client = 0xff;
+      qe->retries = MAX_RETRIES;
+
+      
+      if (call SendQueue.enqueue(qe) == SUCCESS) {
+        dbg("Forwarder,Route", "%s forwarding packet %p with queue size %hhu\n", __FUNCTION__, m, call SendQueue.size());
+        // Loop-detection code:
+        if (call TreeRoutingInspect.getMetric(&gradient) == SUCCESS) {
+          // We only check for loops if we know our own metric
+          if (call CollectionPacket.getGradient(m) < gradient) {
+            // The incoming packet's metric (gradient) is less than our
+            // own gradient.  Trigger a route update and backoff.
+            call TreeRoutingInspect.triggerRouteUpdate();
+            startRetxmitTimer(LOOPY_WINDOW, LOOPY_OFFSET);
+            call CollectionDebug.logEventMsg(NET_C_FE_LOOP_DETECTED,
+					 call CollectionPacket.getSequenceNumber(m), 
+					 call CollectionPacket.getOrigin(m), 
+                                         call AMPacket.destination(m));
+          }
+        }
+
+        if (!call RetxmitTimer.isRunning()) {
+          // sendTask is only immediately posted if we don't detect a
+          // loop.
+          post sendTask();
+        }
+        
+        // Successful function exit point:
+        return newMsg;
+      } else {
+        // There was a problem enqueuing to the send queue.
+        if (call MessagePool.put(newMsg) != SUCCESS)
+          call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR);
+        if (call QEntryPool.put(qe) != SUCCESS)
+          call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR);
+      }
+    }
+
+    // Resource acquisition problem.  Send a debug message to the
+    // uart.
+    call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL);
+
+    // We'll have to drop the packet on the floor: not enough
+    // resources available to forward.
+    return m;
+  }
+ 
+  /*
+   * Received a message to forward. Check whether it is a duplicate by
+   * checking the packets currently in the queue as well as the 
+   * send history cache (in case we recently forwarded this packet).
+   * The cache is important as nodes immediately forward packets
+   * but wait a period before retransmitting after an ack failure.
+   * If this node is a root, signal receive.
+   */ 
+  event message_t* 
+  SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    network_header_t* hdr = getHeader(msg);
+    uint8_t netlen;
+    collection_id_t collectid;
+
+    uint32_t msg_uid;
+    bool duplicate = FALSE;
+    fe_queue_entry_t* qe;
+    uint8_t i;
+
+
+    msg_uid = call CollectionPacket.getPacketID(msg);
+    collectid = hdr->collectid;
+
+    call CollectionDebug.logEventMsg(NET_C_FE_RCV_MSG,
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+    if (len > call SubSend.maxPayloadLength()) {
+      return msg;
+    }
+
+    //See if we remember having seen this packet
+    //We look in the sent cache ...
+    if (call SentCache.lookup(msg_uid)) {
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE);
+        return msg;
+    }
+    //... and in the queue for duplicates
+    atomic {
+    	for (i = call SendQueue.size(); --i ;) {
+        	qe = call SendQueue.element(i);
+	        if (call CollectionPacket.getPacketID(qe->msg) == msg_uid) {
+        	    duplicate = TRUE;
+	            break;
+        	}
+	    }
+    }
+    if (duplicate) {
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_QUEUE);
+        return msg;
+    }
+
+    // If I'm the root, signal receive. 
+    else if (call RootControl.isRoot())
+      return signal Receive.receive[collectid](msg, 
+                        call Packet.getPayload(msg, &netlen), 
+                        call Packet.payloadLength(msg));
+    // I'm on the routing path and Intercept indicates that I
+    // should not forward the packet.
+    else if (!signal Intercept.forward[collectid](msg, 
+                        call Packet.getPayload(msg, &netlen), 
+                        call Packet.payloadLength(msg)))
+      return msg;
+    else {
+      dbg("Route", "Forwarding packet from %hu.\n", hdr->origin);
+      return forward(msg);
+    }
+  }
+
+  command void* 
+  Receive.getPayload[collection_id_t id](message_t* msg, uint8_t* len) {
+    return call Packet.getPayload(msg, NULL);
+  }
+
+  command uint8_t
+  Receive.payloadLength[collection_id_t id](message_t *msg) {
+    return call Packet.payloadLength(msg);
+  }
+
+  command void *
+  Snoop.getPayload[collection_id_t id](message_t *msg, uint8_t *len) {
+    return call Packet.getPayload(msg, NULL);
+  }
+
+  command uint8_t Snoop.payloadLength[collection_id_t id](message_t *msg) {
+    return call Packet.payloadLength(msg);
+  }
+
+  event message_t* 
+  SubSnoop.receive(message_t* msg, void *payload, uint8_t len) {
+    network_header_t* hdr = getHeader(msg);
+    return signal Snoop.receive[hdr->collectid] (msg, (void *)(hdr + 1), 
+                                          len - sizeof(network_header_t));
+  }
+  
+  event void RetxmitTimer.fired() {
+    sending = FALSE;
+    post sendTask();
+  }
+  
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return call SubPacket.payloadLength(msg) - sizeof(network_header_t);
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    call SubPacket.setPayloadLength(msg, len + sizeof(network_header_t));
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(network_header_t);
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len);
+    if (len != NULL) {
+      *len -= sizeof(network_header_t);
+    }
+    return payload + sizeof(network_header_t);
+  }
+
+  command am_addr_t CollectionPacket.getOrigin(message_t* msg) {
+    return getHeader(msg)->origin;
+  }
+
+  command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) {
+    getHeader(msg)->origin = addr;
+  }
+
+  command uint8_t CollectionPacket.getCollectionID(message_t* msg) {
+    return getHeader(msg)->collectid;
+  }
+  
+  command void CollectionPacket.setCollectionID(message_t* msg, uint8_t id) {
+    getHeader(msg)->collectid = id;
+  }
+
+  command uint8_t CollectionPacket.getControl(message_t* msg) {
+    return getHeader(msg)->control;
+  }
+  
+  command void CollectionPacket.setControl(message_t* msg, uint8_t control) {
+    getHeader(msg)->control = control;
+  }
+
+  command uint16_t CollectionPacket.getGradient(message_t* msg) {
+    return getHeader(msg)->gradient;
+  }
+
+  command void CollectionPacket.setGradient(message_t* msg, uint16_t gradient) {
+    getHeader(msg)->gradient = gradient;
+  }
+
+  command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) {
+    return getHeader(msg)->seqno;
+  }
+
+  command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t _seqno) {
+    getHeader(msg)->seqno = _seqno;
+  }
+
+  command uint32_t CollectionPacket.getPacketID(message_t* msg) {
+    return ((uint32_t)(getHeader(msg)->origin) << 16) | (uint32_t)(getHeader(msg)->seqno);  
+  }
+
+  
+  default event void
+  Send.sendDone[uint8_t client](message_t *msg, error_t error) {
+  }
+
+  default event bool
+  Intercept.forward[collection_id_t collectid](message_t* msg, void* payload, 
+                                               uint16_t len) {
+    return TRUE;
+  }
+
+  default event message_t *
+  Receive.receive[collection_id_t collectid](message_t *msg, void *payload,
+                                             uint8_t len) {
+    return msg;
+  }
+
+  default event message_t *
+  Snoop.receive[collection_id_t collectid](message_t *msg, void *payload,
+                                           uint8_t len) {
+    return msg;
+  }
+
+  default command collection_id_t CollectionId.fetch[uint8_t client]() {
+    return 0;
+  }
+
+  static void startRetxmitTimer(uint16_t mask, uint16_t offset) {
+    uint16_t r = call Random.rand16();
+    r &= mask;
+    r += offset;
+    call RetxmitTimer.startOneShot(r);
+    dbg("Forwarder", "started rexmit timer in %hu ms\n", r);
+  }
+
+  /* Default implementations for CollectionDebug calls.
+   * These allow CollectionDebug not to be wired to anything if debugging
+   * is not desired. */
+
+    default command error_t CollectionDebug.logEvent(uint8_t type) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        return SUCCESS;
+    }
+   
+}
diff --git a/tos/lib/net/collection/LinkEstimator.h b/tos/lib/net/collection/LinkEstimator.h
new file mode 100644
index 00000000..10f82627
--- /dev/null
+++ b/tos/lib/net/collection/LinkEstimator.h
@@ -0,0 +1,104 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF SOUTHERN CALIFORNIA BE LIABLE TO
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF SOUTHERN CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF SOUTHERN CALIFORNIA SPECIFICALLY DISCLAIMS ANY
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * SOUTHERN CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE,
+ * SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#ifndef LINK_ESITIMATOR_H
+#define LINK_ESITIMATOR_H
+/*
+ @ author Omprakash Gnawali
+ @ Created: June 08, 2006
+ */
+
+// Number of entries in the neighbor table
+#define NEIGHBOR_TABLE_SIZE 10
+// Timer that determines how often beacons should be
+// sent and link estimate updated
+#define LINKEST_TIMER_RATE 4096
+
+
+// Masks for the flag field in the link estimation header
+enum {
+  // use last four bits to keep track of
+  // how many footer entries there are
+  NUM_ENTRIES_FLAG = 15,
+};
+
+// The first byte of each outgoing packet is a control byte
+// Bits 4..7 reserved for routing and other protocols
+// Bits 0..3 is used by the link estimator to encode the
+//   number of linkest entries in the packet
+
+// link estimator header added to
+// every message passing thru' the link estimator
+typedef nx_struct linkest_header {
+  nx_uint8_t flags;
+  nx_am_addr_t ll_addr;
+  nx_uint8_t seq;
+} linkest_header_t;
+
+
+// for outgoing link estimator message
+// so that we can compute bi-directional quality
+typedef nx_struct neighbor_stat_entry {
+  nx_am_addr_t ll_addr;
+  nx_uint8_t inquality;
+} neighbor_stat_entry_t;
+
+// we put the above neighbor entry in the footer
+typedef nx_struct linkest_footer {
+  neighbor_stat_entry_t neighborList[1];
+} linkest_footer_t;
+
+
+// Flags for the neighbor table entry
+enum {
+  VALID_ENTRY = 0x1, 
+  // A link becomes mature after
+  // TABLEUPDATE_INTERVAL*LINKEST_TIMER_RATE
+  MATURE_ENTRY = 0x2,
+  // Flag to indicate that this link has received the
+  // first sequence number
+  INIT_ENTRY = 0x4,
+  // The upper layer has requested that this link be pinned
+  // Useful if we don't want to lose the root from the table
+  PINNED_ENTRY = 0x8
+};
+
+
+// neighbor table
+typedef struct neighbor_table_entry {
+  am_addr_t ll_addr;
+  uint8_t lastseq;
+  uint8_t rcvcnt;
+  uint8_t failcnt;
+  uint8_t flags;
+  uint8_t inage;
+  uint8_t outage;
+  uint8_t inquality;
+  uint8_t outquality;
+} neighbor_table_entry_t;
+
+
+#endif
diff --git a/tos/lib/net/collection/LinkEstimator.nc b/tos/lib/net/collection/LinkEstimator.nc
new file mode 100644
index 00000000..4971916a
--- /dev/null
+++ b/tos/lib/net/collection/LinkEstimator.nc
@@ -0,0 +1,59 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** Provides an additive quality measure for a neighbor. The
+ * provided quality increases when the true link quality increases.
+ *  @author Rodrigo Fonseca
+ *  @author Omprakash Gnawali
+ *  @date   $Date$
+ */
+
+/* Quality of a link is defined by the implementor of this interface.
+ * It could be ETX, PRR, etc.
+ */
+
+interface LinkEstimator {
+  
+  /* get bi-directional link quality for link to the neighbor */
+  command uint8_t getLinkQuality(uint16_t neighbor);
+
+  /* get quality of the link from neighbor to this node */
+  command uint8_t getReverseQuality(uint16_t neighbor);
+
+  /* get quality of the link from this node to the neighbor */
+  command uint8_t getForwardQuality(uint16_t neighbor);
+
+  /* insert this neighbor into the neighbor table */
+  command error_t insertNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t pinNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t unpinNeighbor(am_addr_t neighbor);
+
+  /* signal when this neighbor is evicted from the neighbor table */
+  event void evicted(am_addr_t neighbor);
+}
+
+
diff --git a/tos/lib/net/collection/LinkEstimatorC.nc b/tos/lib/net/collection/LinkEstimatorC.nc
new file mode 100644
index 00000000..0aecacef
--- /dev/null
+++ b/tos/lib/net/collection/LinkEstimatorC.nc
@@ -0,0 +1,34 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** The public component of the link estimator that provides the
+ * quality to and from a neighbor 
+ * 
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+configuration LinkEstimatorC {
+    provides {
+        interface LinkEstimator;
+    }
+}
diff --git a/tos/lib/net/collection/LinkEstimatorDummyP.nc b/tos/lib/net/collection/LinkEstimatorDummyP.nc
new file mode 100644
index 00000000..2cc6de13
--- /dev/null
+++ b/tos/lib/net/collection/LinkEstimatorDummyP.nc
@@ -0,0 +1,175 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF SOUTHERN CALIFORNIA BE LIABLE TO
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF SOUTHERN CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF SOUTHERN CALIFORNIA SPECIFICALLY DISCLAIMS ANY
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * SOUTHERN CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE,
+ * SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ @ author Omprakash Gnawali
+ @ Created: April 24, 2006
+ */
+
+
+#include "Timer.h"
+
+module LinkEstimatorDummyP {
+  provides {
+    interface AMSend as Send;
+    interface Receive;
+    interface LinkEstimator;
+    interface Init;
+    interface Packet;
+    interface LinkSrcPacket;
+  }
+
+  uses {
+    interface AMSend;
+    interface AMPacket as SubAMPacket;
+    interface Packet as SubPacket;
+    interface Receive as SubReceive;
+    interface Timer;
+  }
+}
+
+implementation {
+
+  // link estimator header added to
+  // every message passing thru' the link estimator
+  typedef nx_struct linkest_header {
+    nx_am_addr_t ll_addr;
+  } linkest_header_t;
+
+  linkest_header_t* getHeader(message_t* m) {
+    return (linkest_header_t*)call SubPacket.getPayload(m, NULL);
+  }
+
+
+  uint8_t addLinkEstHeaderAndFooter(message_t *msg, uint8_t len) {
+    uint8_t newlen;
+    linkest_header_t *hdr;
+    dbg("LI", "newlen1 = %d\n", len);
+    newlen = len + sizeof(linkest_header_t);
+    call Packet.setPayloadLength(msg, newlen);
+    hdr = getHeader(msg);
+
+    hdr->ll_addr = call SubAMPacket.address();
+    dbg("LI", "newlen2 = %d\n", newlen);
+    return newlen;
+  }
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  event void Timer.fired() { }
+
+  // EETX (Extra Expected number of Transmission)
+  // EETX = ETX - 1
+  // computeEETX returns EETX*10
+
+  command uint8_t LinkEstimator.getLinkQuality(uint16_t neighbor) {
+    return 2;
+  }
+
+  command uint8_t LinkEstimator.getReverseQuality(uint16_t neighbor) {
+    return 1;
+  }
+
+  command uint8_t LinkEstimator.getForwardQuality(uint16_t neighbor) {
+    return 1;
+  }
+
+  command am_addr_t LinkSrcPacket.getSrc(message_t* msg) {
+    linkest_header_t* hdr = getHeader(msg);
+    return hdr->ll_addr;
+  }
+
+  command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) {
+    uint8_t newlen;
+    newlen = addLinkEstHeaderAndFooter(msg, len);
+    return call AMSend.send(addr, msg, newlen);
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error ) {
+    return signal Send.sendDone(msg, error);
+  }
+
+  command uint8_t Send.cancel(message_t* msg) {
+    return call AMSend.cancel(msg);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t* msg) {
+    return call Packet.getPayload(msg, NULL);
+  }
+
+  event message_t* SubReceive.receive(message_t* msg,
+				      void* payload,
+				      uint8_t len) {
+    if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) {
+      linkest_header_t* hdr = getHeader(msg);
+      dbg("LI", "Got pkt from link: %d\n", hdr->ll_addr);
+    }
+    
+    return signal Receive.receive(msg,
+				  call Packet.getPayload(msg, NULL),
+				  call Packet.payloadLength(msg));
+  }
+
+  command void* Receive.getPayload(message_t* msg, uint8_t* len) {
+    return call Packet.getPayload(msg, len);
+  }
+
+  command uint8_t Receive.payloadLength(message_t* msg) {
+    return call Packet.payloadLength(msg);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return call SubPacket.payloadLength(msg) - sizeof(linkest_header_t);
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    call SubPacket.setPayloadLength(msg, len + sizeof(linkest_header_t));
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t);
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len);
+    if (len != NULL) {
+      *len -= sizeof(linkest_header_t);
+    }
+    return payload + sizeof(linkest_header_t);
+  }
+
+}
+
diff --git a/tos/lib/net/collection/LinkEstimatorP.nc b/tos/lib/net/collection/LinkEstimatorP.nc
new file mode 100644
index 00000000..1df7eda4
--- /dev/null
+++ b/tos/lib/net/collection/LinkEstimatorP.nc
@@ -0,0 +1,739 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF SOUTHERN CALIFORNIA BE LIABLE TO
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS
+ * DOCUMENTATION, EVEN IF THE UNIVERSITY OF SOUTHERN CALIFORNIA HAS BEEN
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF SOUTHERN CALIFORNIA SPECIFICALLY DISCLAIMS ANY
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY OF
+ * SOUTHERN CALIFORNIA HAS NO OBLIGATION TO PROVIDE MAINTENANCE,
+ * SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ @ author Omprakash Gnawali
+ @ Created: April 24, 2006
+ */
+
+#include 
+#include "LinkEstimator.h"
+
+module LinkEstimatorP {
+  provides {
+    interface StdControl;
+    interface AMSend as Send;
+    interface Receive;
+    interface LinkEstimator;
+    interface Init;
+    interface Packet;
+    interface LinkSrcPacket;
+  }
+
+  uses {
+    interface AMSend;
+    interface AMPacket as SubAMPacket;
+    interface Packet as SubPacket;
+    interface Receive as SubReceive;
+    interface AMSend as AMSendLinkEst;
+    interface Receive as ReceiveLinkEst;
+    interface Timer;
+  }
+}
+
+implementation {
+
+  // configure the link estimator and some constants
+  enum {
+    // If inbound link quality is above this threshold
+    // do not evict a link
+    EVICT_QUALITY_THRESHOLD = 0x50,
+    // maximum link update rounds before we expire the link
+    MAX_AGE = 6,
+    // if received sequence number if larger than the last sequence
+    // number by this gap, we reinitialize the link
+    MAX_PKT_GAP = 10,
+    MAX_QUALITY = 0xff,
+    INVALID_RVAL = 0xff,
+    INVALID_NEIGHBOR_ADDR = 0xff,
+    INFINITY = 0xff,
+    // update the link estimate this often
+    TABLEUPDATE_INTERVAL = 6,
+    // send a beacon this often unless user of
+    // this component is sending a beacon atleast
+    // at this rate
+    BEACON_INTERVAL = 2,
+    // decay the link estimate using this alpha
+    // we use a denominator of 10, so this corresponds to 0.2
+    ALPHA = 2 
+  };
+
+  // keep information about links from the neighbors
+  neighbor_table_entry_t NeighborTable[NEIGHBOR_TABLE_SIZE];
+  // link estiamtion sequence, increment every time a beacon is sent
+  uint8_t linkEstSeq = 0;
+  // use this message buffer
+  // when this component needs to generate a message because
+  // the user of this component is not sending packets frequently enough
+  message_t linkEstPkt;
+  // flag that prevents from sending linkest beacon before sendDone
+  // for previous send is flagged.
+  bool beaconBusy = FALSE;
+  // we update the quality estimate when curEstInterval == TABLEUPDATE_INTERVAL
+  uint8_t curEstInterval = 0;
+  // we send out beacon if curBeaconInterval == BEACON_INTERVAL
+  uint8_t curBeaconInterval = 0;
+  // if there is not enough room in the packet to put all the neighbor table
+  // entries, in order to do round robin we need to remember which entry
+  // we sent in the last beacon
+  uint8_t prevSentIdx = 0;
+
+  // get the link estimation header in the packet
+  linkest_header_t* getHeader(message_t* m) {
+    return (linkest_header_t*)call SubPacket.getPayload(m, NULL);
+  }
+
+  // get the link estimation footer (neighbor entries) in the packet
+  linkest_footer_t* getFooter(message_t* m, uint8_t len) {
+    return (linkest_footer_t*)(len + (uint8_t *)call Packet.getPayload(m,NULL));
+  }
+
+  // add the link estimation header (seq no) and link estimation
+  // footer (neighbor entries) in the packet. Call just before sending
+  // the packet.
+  uint8_t addLinkEstHeaderAndFooter(message_t *msg, uint8_t len) {
+    uint8_t newlen;
+    linkest_header_t *hdr;
+    linkest_footer_t *footer;
+    uint8_t i, j, k;
+    uint8_t maxEntries, newPrevSentIdx;
+    dbg("LI", "newlen1 = %d\n", len);
+    hdr = getHeader(msg);
+    footer = getFooter(msg, len);
+
+    maxEntries = ((call SubPacket.maxPayloadLength() - len - sizeof(linkest_header_t))
+		  / sizeof(linkest_footer_t));
+
+    // Depending on the number of bits used to store the number
+    // of entries, we can encode up to NUM_ENTRIES_FLAG using those bits
+    if (maxEntries > NUM_ENTRIES_FLAG) {
+      maxEntries = NUM_ENTRIES_FLAG;
+    }
+    dbg("LI", "Max payload is: %d, maxEntries is: %d\n", call SubPacket.maxPayloadLength(), maxEntries);
+
+    j = 0;
+    newPrevSentIdx = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE && j < maxEntries; i++) {
+      k = (prevSentIdx + i + 1) % NEIGHBOR_TABLE_SIZE;
+      if (NeighborTable[k].flags & VALID_ENTRY) {
+	footer->neighborList[j].ll_addr = NeighborTable[k].ll_addr;
+	footer->neighborList[j].inquality = NeighborTable[k].inquality;
+	newPrevSentIdx = k;
+	dbg("LI", "Loaded on footer: %d %d %d\n", j, footer->neighborList[j].ll_addr,
+	    footer->neighborList[j].inquality);
+	j++;
+      }
+    }
+    prevSentIdx = newPrevSentIdx;
+
+    hdr->ll_addr = call SubAMPacket.address();
+    hdr->seq = linkEstSeq++;
+    hdr->flags = 0;
+    hdr->flags |= (NUM_ENTRIES_FLAG & j);
+    newlen = sizeof(linkest_header_t) + len + j*sizeof(linkest_footer_t);
+    dbg("LI", "newlen2 = %d\n", newlen);
+    return newlen;
+  }
+
+
+  // given in and out quality, return the bi-directional link quality
+  // q = q1 * q2 / 256
+  uint8_t computeBidirLinkQuality(uint8_t inQuality, uint8_t outQuality) {
+    return ((inQuality * outQuality) >> 8);
+  }
+
+
+  // initialize the given entry in the table for neighbor ll_addr
+  void initNeighborIdx(uint8_t i, am_addr_t ll_addr) {
+    neighbor_table_entry_t *ne;
+    ne = &NeighborTable[i];
+    ne->ll_addr = ll_addr;
+    ne->lastseq = 0;
+    ne->rcvcnt = 0;
+    ne->failcnt = 0;
+    ne->flags = (INIT_ENTRY | VALID_ENTRY);
+    ne->inage = MAX_AGE;
+    ne->outage = MAX_AGE;
+    ne->inquality = 0;
+    ne->outquality = 0;
+  }
+
+  // find the index to the entry for neighbor ll_addr
+  uint8_t findIdx(am_addr_t ll_addr) {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+	if (NeighborTable[i].ll_addr == ll_addr) {
+	  return i;
+	}
+      }
+    }
+    return INVALID_RVAL;
+  }
+
+  // find an empty slot in the neighbor table
+  uint8_t findEmptyNeighborIdx() {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+      } else {
+	return i;
+      }
+    }
+      return INVALID_RVAL;
+  }
+
+  // find the index to the worst neighbor if inbound link
+  // quality to is less than the given threshold
+  uint8_t findWorstNeighborIdx(uint8_t filterThreshold) {
+    uint8_t i, worstNeighborIdx, worstQuality, thisQuality;
+
+    worstNeighborIdx = INVALID_RVAL;
+    worstQuality = MAX_QUALITY;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (!(NeighborTable[i].flags & VALID_ENTRY)) {
+	dbg("LI", "Invalid so continuing\n");
+	continue;
+      }
+      if (!(NeighborTable[i].flags & MATURE_ENTRY)) {
+	dbg("LI", "Not mature, so continuing\n");
+	continue;
+      }
+      if (NeighborTable[i].flags & PINNED_ENTRY) {
+	dbg("LI", "Pinned entry, so continuing\n");
+	continue;
+      }
+      thisQuality = NeighborTable[i].inquality;
+      if (thisQuality < worstQuality) {
+	worstNeighborIdx = i;
+	worstQuality = thisQuality;
+      }
+    }
+    if (worstQuality <= filterThreshold) {
+      return worstNeighborIdx;
+    } else {
+      return INVALID_RVAL;
+    }
+  }
+
+  // update the quality of the link link: self->neighbor
+  // this is found in the entries in the footer of incoming message
+  void updateReverseQuality(am_addr_t neighbor, uint8_t outquality) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx != INVALID_RVAL) {
+      NeighborTable[idx].outquality = outquality;
+      NeighborTable[idx].outage = MAX_AGE;
+    }
+  }
+
+  // we received seq from the neighbor in idx
+  // update the last seen seq, receive and fail count
+  // refresh the age
+  void updateNeighborEntryIdx(uint8_t idx, uint8_t seq) {
+    uint8_t packetGap;
+
+    if (NeighborTable[idx].flags & INIT_ENTRY) {
+      dbg("LI", "Init entry update\n");
+      NeighborTable[idx].lastseq = seq;
+      NeighborTable[idx].flags &= ~INIT_ENTRY;
+    }
+    
+    packetGap = seq - NeighborTable[idx].lastseq;
+    dbg("LI", "updateNeighborEntryIdx: prevseq %d, curseq %d, gap %d\n",
+	NeighborTable[idx].lastseq, seq, packetGap);
+    NeighborTable[idx].lastseq = seq;
+    NeighborTable[idx].rcvcnt++;
+    NeighborTable[idx].inage = MAX_AGE;
+    if (packetGap > 0) {
+      NeighborTable[idx].failcnt += packetGap - 1;
+    }
+    if (packetGap > MAX_PKT_GAP) {
+      NeighborTable[idx].failcnt = 0;
+      NeighborTable[idx].rcvcnt = 1;
+      NeighborTable[idx].outage = 0;
+      NeighborTable[idx].outquality = 0;
+      NeighborTable[idx].inquality = 0;
+    }
+  }
+
+
+  // update the inbound link quality by
+  // munging receive, fail count since last update
+  void updateNeighborTableEst() {
+    uint8_t i, totalPkt;
+    neighbor_table_entry_t *ne;
+    uint8_t newEst;
+    uint8_t minPkt;
+
+    minPkt = TABLEUPDATE_INTERVAL / BEACON_INTERVAL;
+    dbg("LI", "%s\n", __FUNCTION__);
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->flags & VALID_ENTRY) {
+	if (ne->inage > 0)
+	  ne->inage--;
+	if (ne->outage > 0)
+	  ne->outage--;
+
+	if ((ne->inage == 0) && (ne->outage == 0)) {
+	  ne->flags ^= VALID_ENTRY;
+	} else {
+	  dbg("LI", "Making link: %d mature\n", i);
+	  ne->flags |= MATURE_ENTRY;
+	  totalPkt = ne->rcvcnt + ne->failcnt;
+	  dbg("LI", "MinPkt: %d, totalPkt: %d\n", minPkt, totalPkt);
+	  if (totalPkt < minPkt) {
+	    totalPkt = minPkt;
+	  }
+	  if (totalPkt == 0) {
+	    ne->inquality = (ALPHA * ne->inquality) / 10;
+	  } else {
+	    newEst = (255 * ne->rcvcnt) / totalPkt;
+	    dbg("LI,LITest", "  %hu: %hhu -> %hhu", ne->ll_addr, ne->inquality, (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10);
+	    ne->inquality = (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10;
+	  }
+	  ne->rcvcnt = 0;
+	  ne->failcnt = 0;
+	}
+      }
+      else {
+	dbg("LI", " - entry %i is invalid.\n", (int)i);
+      }
+    }
+  }
+
+  // print the neighbor table. for debugging.
+  void print_neighbor_table() {
+    uint8_t i;
+    neighbor_table_entry_t *ne;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->flags & VALID_ENTRY) {
+	dbg("LI,LITest", "%d:%d inQ=%d, inA=%d, outQ=%d, outA=%d, rcv=%d, fail=%d, biQ=%d\n",
+	    i, ne->ll_addr, ne->inquality, ne->inage, ne->outquality, ne->outage,
+	    ne->rcvcnt, ne->failcnt, computeBidirLinkQuality(ne->inquality, ne->outquality));
+      }
+    }
+  }
+
+  // print the packet. for debugging.
+  void print_packet(message_t* msg, uint8_t len) {
+    uint8_t i;
+    uint8_t* b;
+
+    b = (uint8_t *)msg->data;
+    for(i=0; i 0) {
+      q =  2550 / q1 - 10;
+      if (q > 255) {
+	q = INFINITY;
+      }
+      return (uint8_t)q;
+    } else {
+      return INFINITY;
+    }
+  }
+
+  // BidirETX = 1 / (q1*q2)
+  // BidirEETX = BidirETX - 1
+  // computeBidirEETX return BidirEETX*10
+  uint8_t computeBidirEETX(uint8_t q1, uint8_t q2) {
+    uint16_t q;
+    if ((q1 > 0) && (q2 > 0)) {
+      q =  65025u / q1;
+      q = (10*q) / q2 - 10;
+      if (q > 255) {
+	q = INFINITY;
+      }
+      return (uint8_t)q;
+    } else {
+      return INFINITY;
+    }
+  }
+
+  // return bi-directional link quality to the neighbor
+  command uint8_t LinkEstimator.getLinkQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return INFINITY;
+    } else {
+      return computeBidirEETX(NeighborTable[idx].inquality,
+			      NeighborTable[idx].outquality);
+    };
+  }
+
+  // return the quality of the link: neighor->self
+  command uint8_t LinkEstimator.getReverseQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return INFINITY;
+    } else {
+      return computeEETX(NeighborTable[idx].inquality);
+    };
+  }
+
+  // return the quality of the link: self->neighbor
+  command uint8_t LinkEstimator.getForwardQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return INFINITY;
+    } else {
+      return computeEETX(NeighborTable[idx].outquality);
+    };
+  }
+
+  // insert the neighbor at any cost (if there is a room for it)
+  // even if eviction of a perfectly fine neighbor is called for
+  command error_t LinkEstimator.insertNeighbor(am_addr_t neighbor) {
+    uint8_t nidx;
+
+    nidx = findIdx(neighbor);
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: Found the entry, no need to insert\n");
+      return SUCCESS;
+    }
+
+    nidx = findEmptyNeighborIdx();
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: inserted into the empty slot\n");
+      initNeighborIdx(nidx, neighbor);
+      return SUCCESS;
+    } else {
+      nidx = findWorstNeighborIdx(MAX_QUALITY);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "insert: inserted by replacing an entry for neighbor: %d\n",
+	    NeighborTable[nidx].ll_addr);
+	signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	initNeighborIdx(nidx, neighbor);
+	return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  // pin a neighbor so that it does not get evicted */
+  command error_t LinkEstimator.pinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags |= PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+  // pin a neighbor so that it does not get evicted
+  command error_t LinkEstimator.unpinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags &= ~PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+
+  // get the link layer source address for the incoming packet
+  command am_addr_t LinkSrcPacket.getSrc(message_t* msg) {
+    linkest_header_t* hdr = getHeader(msg);
+    return hdr->ll_addr;
+  }
+
+  // user of link estimator calls send here
+  // slap the header and footer before sending the message
+  command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) {
+    uint8_t newlen;
+
+    curBeaconInterval = 0;
+    newlen = addLinkEstHeaderAndFooter(msg, len);
+    dbg("LITest", "%s packet of length %hhu became %hhu\n", __FUNCTION__, len, newlen);
+    dbg("LI", "Sending seq: %d\n", linkEstSeq);
+    print_packet(msg, newlen);
+    return call AMSend.send(addr, msg, newlen);
+  }
+
+  // done sending the linkestimation beacone originated
+  // by the estimator.
+  event void AMSendLinkEst.sendDone(message_t *msg, error_t error) {
+    beaconBusy = FALSE;
+  }
+
+  // done sending the message that originated by
+  // the user of this component
+  event void AMSend.sendDone(message_t* msg, error_t error ) {
+    return signal Send.sendDone(msg, error);
+  }
+
+  // cascade the send call down    if (call Packet.payloadLength
+  command uint8_t Send.cancel(message_t* msg) {
+    return call AMSend.cancel(msg);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t* msg) {
+    return call Packet.getPayload(msg, NULL);
+  }
+
+
+
+  // called when link estimator generator packet or
+  // packets from upper layer that are wired to pass through
+  // link estimator is received
+  void processReceivedMessage(message_t* msg, void* payload, uint8_t len) {
+    uint8_t nidx;
+    uint8_t num_entries;
+
+    dbg("LI", "LI receiving packet, buf addr: %x\n", payload);
+    print_packet(msg, len);
+
+    if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) {
+      linkest_header_t* hdr = getHeader(msg);
+      linkest_footer_t* footer;
+      dbg("LI", "Got seq: %d from link: %d\n", hdr->seq, hdr->ll_addr);
+
+      num_entries = hdr->flags & NUM_ENTRIES_FLAG;
+      print_neighbor_table();
+
+      // update neighbor table with this information
+      // find the neighbor
+      // if found
+      //   update the entry
+      // else
+      //   find an empty entry
+      //   if found
+      //     initialize the entry
+      //   else
+      //     find a bad neighbor to be evicted
+      //     if found
+      //       evict the neighbor and init the entry
+      //     else
+      //       we can not accomodate this neighbor in the table
+      nidx = findIdx(hdr->ll_addr);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "Found the entry so updating\n");
+	updateNeighborEntryIdx(nidx, hdr->seq);
+      } else {
+	nidx = findEmptyNeighborIdx();
+	if (nidx != INVALID_RVAL) {
+	  dbg("LI", "Found an empty entry\n");
+	  initNeighborIdx(nidx, hdr->ll_addr);
+	  updateNeighborEntryIdx(nidx, hdr->seq);
+	} else {
+	  nidx = findWorstNeighborIdx(EVICT_QUALITY_THRESHOLD);
+	  if (nidx != INVALID_RVAL) {
+	    dbg("LI", "Evicted neighbor %d at idx %d\n",
+		NeighborTable[nidx].ll_addr, nidx);
+	    signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	    initNeighborIdx(nidx, hdr->ll_addr);
+	  } else {
+	    dbg("LI", "No room in the table\n");
+	  }
+	}
+      }
+
+      if ((nidx != INVALID_RVAL) && (num_entries > 0)) {
+	dbg("LI", "Number of footer entries: %d\n", num_entries);
+	footer = (linkest_footer_t*) ((uint8_t *)call SubPacket.getPayload(msg, NULL)
+				      + call SubPacket.payloadLength(msg)
+				      - num_entries*sizeof(linkest_footer_t));
+	{
+	  uint8_t i, my_ll_addr;
+	  my_ll_addr = call SubAMPacket.address();
+	  for (i = 0; i < num_entries; i++) {
+	    dbg("LI", "%d %d %d\n", i, footer->neighborList[i].ll_addr,
+		footer->neighborList[i].inquality);
+	    if (footer->neighborList[i].ll_addr == my_ll_addr) {
+	      dbg("LI", "Found my reverse link to %d\n", hdr->ll_addr);
+	      updateReverseQuality(hdr->ll_addr, footer->neighborList[i].inquality);
+	    }
+	  }
+	}
+      }
+      print_neighbor_table();
+    }
+
+
+  }
+
+  // new messages are received here
+  // update the neighbor table with the header
+  // and footer in the message
+  // then signal the user of this component
+  event message_t* SubReceive.receive(message_t* msg,
+				      void* payload,
+				      uint8_t len) {
+    dbg("LI", "Received upper packet. Will signal up\n");
+    processReceivedMessage(msg, payload, len);
+    return signal Receive.receive(msg,
+				  call Packet.getPayload(msg, NULL),
+				  call Packet.payloadLength(msg));
+  }
+
+  // handler for packets that were generated by the link estimator
+  event message_t* ReceiveLinkEst.receive(message_t* msg,
+					  void* payload,
+					  uint8_t len) {
+    dbg("LI", "Received self packet. Will not signal up\n");
+    processReceivedMessage(msg, payload, len);
+    return msg;
+  }
+
+
+  command void* Receive.getPayload(message_t* msg, uint8_t* len) {
+    return call Packet.getPayload(msg, len);
+  }
+
+  command uint8_t Receive.payloadLength(message_t* msg) {
+    return call Packet.payloadLength(msg);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+
+  // subtract the space occupied by the link estimation
+  // header and footer from the incoming payload size
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    return call SubPacket.payloadLength(msg)
+      - sizeof(linkest_header_t)
+      - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags);
+  }
+
+  // account for the space used by header and footer
+  // while setting the payload length
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    call SubPacket.setPayloadLength(msg,
+				    len
+				    + sizeof(linkest_header_t)
+				    + sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags));
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t);
+  }
+
+  // application payload pointer is just past the link estimation header
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len);
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    if (len != NULL) {
+      *len = *len - sizeof(linkest_header_t) - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags);
+    }
+    return payload + sizeof(linkest_header_t);
+  }
+}
+
diff --git a/tos/lib/net/collection/LinkSrcPacket.nc b/tos/lib/net/collection/LinkSrcPacket.nc
new file mode 100644
index 00000000..f19433fc
--- /dev/null
+++ b/tos/lib/net/collection/LinkSrcPacket.nc
@@ -0,0 +1,35 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  Based on MintRoute, by Philip Buonadonna, Alec Woo, Terence Tong, Crossbow
+ *  @date   $Date$
+ */
+
+// Om: added the keyword "command"
+
+interface LinkSrcPacket {
+    /** Returns the am_addr of the link this message came from */
+    command am_addr_t getSrc(message_t* msg);
+}
diff --git a/tos/lib/net/collection/NeighborTable.nc b/tos/lib/net/collection/NeighborTable.nc
new file mode 100644
index 00000000..fa5ddd2d
--- /dev/null
+++ b/tos/lib/net/collection/NeighborTable.nc
@@ -0,0 +1,27 @@
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+interface NeighborTable {
+    /* Signals to users that the neighbor has been evicted from the table */
+    event void evicted(uint16_t neighbor)
+}
+
diff --git a/tos/lib/net/collection/README b/tos/lib/net/collection/README
new file mode 100644
index 00000000..40fd34da
--- /dev/null
+++ b/tos/lib/net/collection/README
@@ -0,0 +1,19 @@
+$Id$
+This is pre-alpha stage, only intended for discussion of the structure.
+The current state is that the configurations and module skeletons are in place,
+but with no actual executing code in the modules.
+
+The basic structure is the following:
+
+
+CollectionC is the visible interface to external users.
+The data plane (the send and receive paths exported) are through the ForwardingEngine, the only external interface to the routing engine is currently RootControl.
+
+The link estimation is done through a third module, the LinkEstimator.
+It provides the latest link estimate for a given neighbor.
+
+TreeRoutingEngine sends and receives control messages to form the tree. These are independent of the data plane messages. 
+
+Both TreeRoutingEngine and ForwardingEngine have their send and receive paths wired through the LinkEstimator. The initial idea is to have almost pass-through components LinkEstimatorAMSenderC and LinkEstimatorAMReceiverC such that the link estimator can intercept all packets to and from both components.
+
+
diff --git a/tos/lib/net/collection/RootControl.nc b/tos/lib/net/collection/RootControl.nc
new file mode 100644
index 00000000..13bf9b9d
--- /dev/null
+++ b/tos/lib/net/collection/RootControl.nc
@@ -0,0 +1,33 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** Controls whether the current node is a root of the tree
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+
+interface RootControl {
+    command error_t setRoot();
+    command error_t unsetRoot();
+    command bool isRoot();
+}
diff --git a/tos/lib/net/collection/RoutingEngineControl.nc b/tos/lib/net/collection/RoutingEngineControl.nc
new file mode 100644
index 00000000..dbbca499
--- /dev/null
+++ b/tos/lib/net/collection/RoutingEngineControl.nc
@@ -0,0 +1,37 @@
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** Controls for the routing engine.
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ */
+
+
+interface RoutingEngineControl {
+    /** Initialize the routing header of the given message. This will write
+     *  to the routing header assuming the message is originating at the
+     *  local node. This includes setting the destination address. */
+    command error_t initializeRH(message_t *msg, uint8_t tree_id);
+    /** Get the size in bytes of the routing engine header */
+    command uint8_t getHeaderSize();
+}
+
diff --git a/tos/lib/net/collection/TreeCollection.h b/tos/lib/net/collection/TreeCollection.h
new file mode 100644
index 00000000..0d45c883
--- /dev/null
+++ b/tos/lib/net/collection/TreeCollection.h
@@ -0,0 +1,30 @@
+#ifndef TREE_COLLECTION_H
+#define TREE_COLLECTION_H
+
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+
+#define UQ_COLLECTION_CLIENT "CollectionSenderC.Send"
+
+
+#endif
diff --git a/tos/lib/net/collection/TreeCollectionC.nc b/tos/lib/net/collection/TreeCollectionC.nc
new file mode 100644
index 00000000..7745b9cf
--- /dev/null
+++ b/tos/lib/net/collection/TreeCollectionC.nc
@@ -0,0 +1,176 @@
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Collection.h"
+#include "TreeCollection.h"
+#include "ForwardingEngine.h"
+
+/**
+ * A data collection service that uses a tree routing protocol
+ * to deliver data to collection roots, following TEP 119.
+ *
+ * @author Rodrigo Fonseca
+ * @author Omprakash Gnawali
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ */
+
+
+configuration TreeCollectionC {
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface RootControl;
+    interface Packet;
+    interface CollectionPacket;
+    interface TreeRoutingInspect;
+  }
+
+  uses {
+    interface CollectionId[uint8_t client];
+    interface CollectionDebug;
+  }
+}
+
+implementation {
+  enum {
+    CLIENT_COUNT = uniqueCount(UQ_COLLECTION_CLIENT),
+    FORWARD_COUNT = 5,
+    TREE_ROUTING_TABLE_SIZE = 10,
+    QUEUE_SIZE = CLIENT_COUNT + FORWARD_COUNT,
+    CACHE_SIZE = 4,
+  };
+
+  components ActiveMessageC;
+  components new ForwardingEngineP() as Forwarder;
+  components MainC;
+  
+  Send = Forwarder;
+  StdControl = Forwarder;
+  Receive = Forwarder.Receive;
+  Snoop = Forwarder.Snoop;
+  Intercept = Forwarder;
+  Packet = Forwarder;
+  CollectionId = Forwarder;
+  CollectionPacket = Forwarder;
+  
+  components new PoolC(message_t, FORWARD_COUNT) as MessagePoolP;
+  components new PoolC(fe_queue_entry_t, FORWARD_COUNT) as QEntryPoolP;
+  Forwarder.QEntryPool -> QEntryPoolP;
+  Forwarder.MessagePool -> MessagePoolP;
+
+  components new QueueC(fe_queue_entry_t*, QUEUE_SIZE) as SendQueueP;
+  Forwarder.SendQueue -> SendQueueP;
+
+  components new LruIntCacheC(uint32_t, CACHE_SIZE) as SentCacheP;
+  Forwarder.SentCache -> SentCacheP;
+
+  components new TimerMilliC() as RoutingBeaconTimer;
+  components LinkEstimatorP as Estimator;
+
+  components new AMSenderC(AM_COLLECTION_DATA);
+  components new AMReceiverC(AM_COLLECTION_DATA);
+  components new AMSnooperC(AM_COLLECTION_DATA);
+  
+  components new TreeRoutingEngineP(TREE_ROUTING_TABLE_SIZE) as Router;
+  StdControl = Router;
+  StdControl = Estimator;
+  RootControl = Router;
+  MainC.SoftwareInit -> Router;
+  Router.BeaconSend -> Estimator.Send;
+  Router.BeaconReceive -> Estimator.Receive;
+  Router.LinkEstimator -> Estimator.LinkEstimator;
+  Router.LinkSrcPacket -> Estimator.LinkSrcPacket;
+  Router.AMPacket -> ActiveMessageC;
+  Router.RadioControl -> ActiveMessageC;
+  Router.BeaconTimer -> RoutingBeaconTimer;
+  Router.CollectionDebug = CollectionDebug;
+  Forwarder.CollectionDebug = CollectionDebug;
+  Forwarder.TreeRoutingInspect -> Router;
+  TreeRoutingInspect = Router;
+ 
+  components new TimerMilliC() as RetxmitTimer;
+  Forwarder.RetxmitTimer -> RetxmitTimer;
+
+  components RandomC;
+  Router.Random -> RandomC;
+  Forwarder.Random -> RandomC;
+
+  MainC.SoftwareInit -> Forwarder;
+  Forwarder.SubSend -> AMSenderC;
+  Forwarder.SubReceive -> AMReceiverC;
+  Forwarder.SubSnoop -> AMSnooperC;
+  Forwarder.SubPacket -> AMSenderC;
+  Forwarder.RootControl -> Router;
+  Forwarder.UnicastNameFreeRouting -> Router.Routing;
+  Forwarder.RadioControl -> ActiveMessageC;
+  Forwarder.PacketAcknowledgements -> AMSenderC.Acks;
+  Forwarder.AMPacket -> AMSenderC;
+
+  components new AMSenderC(AM_COLLECTION_CONTROL) as SendControl;
+  components new AMReceiverC(AM_COLLECTION_CONTROL) as ReceiveControl;
+  components new AMSenderC(AM_LINKEST) as SendLinkEst;
+  components new AMReceiverC(AM_LINKEST) as ReceiveLinkEst;
+  components new TimerMilliC() as EstimatorTimer;
+  
+  Estimator.AMSend -> SendControl;
+  Estimator.SubReceive -> ReceiveControl;
+  Estimator.AMSendLinkEst -> SendLinkEst;
+  Estimator.ReceiveLinkEst -> ReceiveLinkEst;
+  Estimator.SubPacket -> SendControl;
+  Estimator.SubAMPacket -> SendControl;
+  Estimator.Timer -> EstimatorTimer;
+  MainC.SoftwareInit -> Estimator;
+}
diff --git a/tos/lib/net/collection/TreeRouting.h b/tos/lib/net/collection/TreeRouting.h
new file mode 100644
index 00000000..d335c2f5
--- /dev/null
+++ b/tos/lib/net/collection/TreeRouting.h
@@ -0,0 +1,37 @@
+#ifndef _TREE_ROUTING_H
+#define _TREE_ROUTING_H
+
+enum {
+    AM_TREE_ROUTING_CONTROL = 0xCE,
+    BEACON_INTERVAL = 8192, 
+    INVALID_ADDR  = TOS_BCAST_ADDR,
+    ETX_THRESHOLD = 50,      // link quality=20% -> ETX=5 -> Metric=50 
+    PARENT_SWITCH_THRESHOLD = 15,
+    MAX_METRIC = 0xFFFF,
+}; 
+ 
+
+typedef struct {
+    am_addr_t parent;
+    uint8_t hopcount;
+    uint16_t metric;
+} route_info_t;
+
+typedef struct {
+    am_addr_t neighbor;
+    route_info_t info;
+} routing_table_entry;
+
+inline void routeInfoInit(route_info_t *ri) {
+    ri->parent = INVALID_ADDR;
+    ri->hopcount = 0;
+    ri->metric = 0;
+}
+
+typedef nx_struct beacon_msg_t {
+    nx_am_addr_t parent;
+    nx_uint8_t hopcount;
+    nx_uint16_t metric;
+} beacon_msg_t;
+
+#endif
diff --git a/tos/lib/net/collection/TreeRouting.notes b/tos/lib/net/collection/TreeRouting.notes
new file mode 100644
index 00000000..20adeb84
--- /dev/null
+++ b/tos/lib/net/collection/TreeRouting.notes
@@ -0,0 +1,30 @@
+Miscelaneous notes on the TreeRoutingP module details.
+Rodrigo Fonseca
+
+The RoutingTable is a table with information about *routing* information of neighbors: their hopcount, quality, etc. It is used to periodically choose the best route, and to find backup routes.
+
+It is strictly a subset of the LinkEstimator table, meaning that no node that is not in the link estimator table is in the routing table. However, not all neighbors will be here. The policy for managing this table is a generalization of the regular tree routing: we keep the K best paths to *a* root.
+
+
+Timer has period P jittered with +- P/2
+
+RouteInfo:
+    metric is a 16 bit number that measures quality to the root. See below.
+    hopcount
+    parent: a link neighbor address (next hop)
+
+Root:
+    rootControl interface.
+    if isRoot()
+      parent = self
+      hopcount = 0
+      metric = 0
+      has_route = true
+      
+
+Update task updates the parent before sending out beacon.
+This is not done right when you receive a beacon, because the qualities may change right before you send. This is a policy question, anyway, and can be changed easily.
+
+Quality is converted to a 'path metric' by evaluateMetric().
+Path metric is ADDITIVE along a path, and smaller metric is always better.
+Currently, it is 10*ETX along the path.
diff --git a/tos/lib/net/collection/TreeRoutingEngineP.nc b/tos/lib/net/collection/TreeRoutingEngineP.nc
new file mode 100644
index 00000000..b168c8ce
--- /dev/null
+++ b/tos/lib/net/collection/TreeRoutingEngineP.nc
@@ -0,0 +1,624 @@
+#include 
+#include 
+#include 
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/** 
+ *  The TreeRoutingEngine is responsible for computing the routes for
+ *  collection.  It builds a set of trees rooted at specific nodes (roots) and
+ *  maintains these trees using information provided by the link estimator on
+ *  the quality of one hop links.
+ * 
+ *  
    Each node is part of only one tree at any given time, but there is no
+ *  difference from the node's point of view of which tree it is part. In other
+ *  words, a message is sent towards a root, but which one is not
+ *  specified. It is assumed that the roots will work together to have all data
+ *  aggregated later if need be.  The tree routing engine's responsibility is
+ *  for each node to find the path with the least number of transmissions to
+ *  any one root.
+ *
+ *  
    The tree is proactively maintained by periodic beacons sent by each
+ *  node. These beacons are jittered in time to prevent synchronizations in the
+ *  network. All nodes maintain the same average beacon sending rate
+ *  (defined by BEACON_INTERVAL +- 50%). The beacon contains the node's parent,
+ *  the current hopcount, and the cumulative path quality metric. The metric is
+ *  defined as the parent's metric plus the bidirectional quality of the link
+ *  between the current node and its parent.  The metric represents the
+ *  expected number of transmissions along the path to the root, and is 0 by
+ *  definition at the root.
+ * 
+ *  
    Every time a node receives an update from a neighbor it records the
+ *  information if the node is part of the neighbor table. The neighbor table
+ *  keeps the best candidates for being parents i.e., the nodes with the best
+ *  path metric. The neighbor table does not store the full path metric,
+ *  though. It stores the parent's path metric, and the link quality to the
+ *  parent is only added when the information is needed: (i) when choosing a
+ *  parent and (ii) when choosing a route. The nodes in the neighbor table are
+ *  a subset of the nodes in the link estimator table, as a node is not
+ *  admitted in the neighbor table with an estimate of infinity.
+ * 
+ *  
    There are two uses for the neighbor table, as mentioned above. The first
+ *  one is to select a parent. The parent is just the neighbor with the best
+ *  path metric. It serves to define the node's own path metric and hopcount,
+ *  and the set of child-parent links is what defines the tree. In a sense the
+ *  tree is defined to form a coherent propagation substrate for the path
+ *  metrics. The parent is (re)-selected periodically, immediately before a
+ *  node sends its own beacon, in the updateRouteTask.
+ *  
+ *  
    The second use is to actually choose a next hop towards any root at
+ *  message forwarding time.  This need not be the current parent, even though
+ *  it is currently implemented as such.
+ *
+ *  
    The operation of the routing engine has two main tasks and one main
+ *  event: updateRouteTask is called periodically and chooses a new parent;
+ *  sendBeaconTask broadcasts the current route information to the neighbors.
+ *  The main event is the receiving of a neighbor's beacon, which updates the
+ *  neighbor table.
+ *  
+ *  
     The interface with the ForwardingEngine occurs through the nextHop()
+ *  call.
+ * 
+ *  
     Any node can become a root, and routed messages from a subset of the
+ *  network will be routed towards it. The RootControl interface allows
+ *  setting, unsetting, and querying the root state of a node. By convention,
+ *  when a node is root its hopcount and metric are 0, and the parent is
+ *  itself. A root always has a valid route, to itself.
+ */
+
+ /* 
+ *  @author Rodrigo Fonseca
+ *  Acknowledgment: based on MintRoute, MultiHopLQI, BVR tree construction, Berkeley's MTree
+ *                           
+ *  @date   $Date$
+ *  @see Net2-WG
+ */
+
+generic module TreeRoutingEngineP(uint8_t routingTableSize) {
+    provides {
+        interface UnicastNameFreeRouting as Routing;
+        interface RootControl;
+        interface TreeRoutingInspect;
+        interface StdControl;
+        interface Init;
+    } 
+    uses {
+        interface AMSend as BeaconSend;
+        interface Receive as BeaconReceive;
+        interface LinkEstimator;
+        interface AMPacket;
+        interface LinkSrcPacket;
+        interface SplitControl as RadioControl;
+        interface Timer as BeaconTimer;
+        interface Random;
+        interface CollectionDebug;
+    }
+}
+
+
+implementation {
+
+
+    /* Keeps track of whether the radio is on. No sense updating or sending
+     * beacons if radio is off */
+    bool radioOn = FALSE;
+    /* Controls whether the node's periodic timer will fire. The node will not
+     * send any beacon, and will not update the route. Start and stop control this. */
+    bool running = FALSE;
+    /* Guards the beacon buffer: only one beacon being sent at a time */
+    bool sending = FALSE;
+
+    /* Tells updateNeighbor that the parent was just evicted.*/ 
+    bool justEvicted = FALSE;
+
+    route_info_t routeInfo;
+    bool state_is_root;
+    am_addr_t my_ll_addr;
+
+    message_t beaconMsgBuffer;
+    beacon_msg_t* beaconMsg;
+
+    /* routing table -- routing info about neighbors */
+    routing_table_entry routingTable[routingTableSize];
+    uint8_t routingTableActive;
+
+    /* statistics */
+    uint32_t parentChanges;
+    /* end statistics */
+
+    // forward declarations
+    void routingTableInit();
+    uint8_t routingTableFind(am_addr_t);
+    error_t routingTableUpdateEntry(am_addr_t, am_addr_t , uint8_t, uint16_t);
+    error_t routingTableEvict(am_addr_t neighbor);
+
+
+    command error_t Init.init() {
+        uint8_t maxLength;
+        radioOn = FALSE;
+        running = FALSE;
+        parentChanges = 0;
+        state_is_root = 0;
+        routeInfoInit(&routeInfo);
+        routingTableInit();
+        my_ll_addr = call AMPacket.address();
+        beaconMsg = call BeaconSend.getPayload(&beaconMsgBuffer);
+        maxLength = call BeaconSend.maxPayloadLength();
+        dbg("TreeRoutingCtl","TreeRouting initialized. (used payload:%d max payload:%d!\n", 
+              sizeof(beaconMsg), maxLength);
+        return SUCCESS;
+    }
+
+    command error_t StdControl.start() {
+        //start will (re)start the sending of messages
+        uint16_t nextInt;
+        if (!running) {
+            running = TRUE;
+            nextInt = call Random.rand16() % BEACON_INTERVAL;
+            nextInt += BEACON_INTERVAL >> 1;
+            call BeaconTimer.startOneShot(nextInt);
+            dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        }     
+        return SUCCESS;
+    }
+
+    command error_t StdControl.stop() {
+        running = FALSE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        return SUCCESS;
+    } 
+
+    event void RadioControl.startDone(error_t error) {
+        radioOn = TRUE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        if (running) {
+            uint16_t nextInt;
+            nextInt = call Random.rand16() % BEACON_INTERVAL;
+            nextInt += BEACON_INTERVAL >> 1;
+            call BeaconTimer.startOneShot(nextInt);
+        }
+    } 
+
+    event void RadioControl.stopDone(error_t error) {
+        radioOn = FALSE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+    }
+
+    /* Is this quality measure better than the minimum threshold? */
+    // Implemented assuming quality is EETX
+    bool passLinkMetricThreshold(uint16_t metric) {
+        return (metric < ETX_THRESHOLD);
+    }
+
+    /* Converts the output of the link estimator to path metric
+     * units, that can be *added* to form path metric measures */
+    uint16_t evaluateMetric(uint8_t quality) {
+        //dbg("TreeRouting","%s %d -> %d\n",__FUNCTION__,quality, quality+10);
+        return (quality + 10);
+    }
+
+    /* updates the routing information, using the info that has been received
+     * from neighbor beacons. Two things can cause this info to change: 
+     * neighbor beacons, changes in link estimates, including neighbor eviction */
+    task void updateRouteTask() {
+        uint8_t i;
+        routing_table_entry* entry;
+        routing_table_entry* best;
+        uint16_t minMetric;
+        uint16_t currentMetric;
+        uint16_t linkMetric, pathMetric;
+
+        if (state_is_root)
+            return;
+        
+        best = NULL;
+        /* Minimum metric found among neighbors, initially infinity */
+        minMetric = MAX_METRIC;
+        /* Metric through current parent, initially infinity */
+        currentMetric = MAX_METRIC;
+
+        dbg("TreeRouting","%s\n",__FUNCTION__);
+
+        /* Find best path in table, other than our current */
+        for (i = 0; i < routingTableActive; i++) {
+            entry = &routingTable[i];
+
+            // Avoid bad entries and 1-hop loops
+            if (entry->info.parent == INVALID_ADDR || entry->info.parent == my_ll_addr) {
+              dbg("TreeRouting", 
+                  "routingTable[%d]: neighbor: [id: %d parent: %d hopcount: %d metric: NO ROUTE]\n",  
+                  i, entry->neighbor, entry->info.parent, entry->info.hopcount);
+              continue;
+            }
+            
+            /* Compute this neighbor's path metric */
+            linkMetric = evaluateMetric(call LinkEstimator.getLinkQuality(entry->neighbor));
+            dbg("TreeRouting", 
+                "routingTable[%d]: neighbor: [id: %d parent: %d hopcount: %d metric: %d]\n",  
+                i, entry->neighbor, entry->info.parent, entry->info.hopcount, linkMetric);
+            pathMetric = linkMetric + entry->info.metric;
+            /* Operations specific to the current parent */
+            if (entry->neighbor == routeInfo.parent) {
+                dbg("TreeRouting", "   already parent.\n");
+                currentMetric = pathMetric;
+                /* update routeInfo with parent's current info */
+                atomic {
+                    routeInfo.metric = entry->info.metric;
+                    routeInfo.hopcount = entry->info.hopcount + 1;
+                }
+                continue;
+            }
+            /* Ignore links that are bad */
+            if (!passLinkMetricThreshold(linkMetric)) {
+              dbg("TreeRouting", "   did not pass threshold.\n");
+              continue;
+            }
+            
+            if (pathMetric < minMetric) {
+                minMetric = pathMetric;
+                best = entry;
+            }  
+        }
+
+        /* Now choose between the current parent and the best neighbor */
+        if (minMetric != MAX_METRIC) {
+            if (currentMetric == MAX_METRIC ||
+                minMetric + PARENT_SWITCH_THRESHOLD < currentMetric) {
+                // routeInfo.metric will not store the composed metric.
+                // since the linkMetric may change, we will compose whenever
+                // we need it: i. when choosing a parent (here); 
+                //            ii. when choosing a next hop
+                parentChanges++;
+                dbg("TreeRouting","Changed parent. from %d to %d\n", routeInfo.parent, best->neighbor);
+                call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, best->neighbor, best->info.hopcount + 1, best->info.metric); 
+                call LinkEstimator.unpinNeighbor(routeInfo.parent);
+                call LinkEstimator.pinNeighbor(best->neighbor);
+                atomic {
+                    routeInfo.parent = best->neighbor;
+                    routeInfo.metric = best->info.metric;
+                    routeInfo.hopcount = best->info.hopcount + 1; 
+                }
+            }
+        }    
+
+        /* Finally, tell people what happened:  */
+        /* We can only loose a route to a parent if it has been evicted. If it hasn't 
+         * been just evicted then we already did not have a route */
+        if (justEvicted && routeInfo.parent == INVALID_ADDR) 
+            signal Routing.noRoute();
+        /* On the other hand, if we didn't have a parent (no currentMetric) and now we
+         * do, then we signal route found. The exception is if we just evicted the 
+         * parent and immediately found a replacement route: we don't signal in this 
+         * case */
+        else if (!justEvicted && 
+                  currentMetric == MAX_METRIC &&
+                  minMetric != MAX_METRIC)
+            signal Routing.routeFound();
+        justEvicted = FALSE; 
+    }
+
+    
+
+    /* send a beacon advertising this node's routeInfo */
+    // only posted if running and radioOn
+    task void sendBeaconTask() {
+        error_t eval;
+        if (sending) {
+            return;
+        }
+        beaconMsg->parent = routeInfo.parent;
+        beaconMsg->hopcount = routeInfo.hopcount;
+
+        if (state_is_root || routeInfo.parent == INVALID_ADDR) {
+            beaconMsg->metric = routeInfo.metric;
+        } else {
+            beaconMsg->metric = routeInfo.metric +
+                                evaluateMetric(call LinkEstimator.getLinkQuality(routeInfo.parent)); 
+        }
+
+        dbg("TreeRouting", "%s parent: %d hopcount: %d metric: %d\n",
+                  __FUNCTION__,
+                  beaconMsg->parent, 
+                  beaconMsg->hopcount, 
+                  beaconMsg->metric);
+        call CollectionDebug.logEventRoute(NET_C_TREE_SENT_BEACON, beaconMsg->parent, beaconMsg->hopcount, beaconMsg->metric);
+
+        eval = call BeaconSend.send(AM_BROADCAST_ADDR, 
+                                    &beaconMsgBuffer, 
+                                    sizeof(beacon_msg_t));
+        if (eval == SUCCESS) {
+            sending = TRUE;
+        } else if (eval == EOFF) {
+            radioOn = FALSE;
+            dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        }
+    }
+
+    event void BeaconSend.sendDone(message_t* msg, error_t error) {
+        if ((msg != &beaconMsgBuffer) || !sending) {
+            //something smells bad around here
+            return;
+        }
+        sending = FALSE;
+    }
+
+
+    event void BeaconTimer.fired() {
+        if (radioOn && running) {
+            // determine next interval
+            uint16_t nextInt;
+            nextInt = call Random.rand16() % BEACON_INTERVAL;
+            nextInt += BEACON_INTERVAL >> 1;
+            call BeaconTimer.startOneShot(nextInt);
+            post updateRouteTask();
+            post sendBeaconTask();
+        } 
+    } 
+
+    /* Handle the receiving of beacon messages from the neighbors. We update the
+     * table, but wait for the next route update to choose a new parent */
+    event message_t* BeaconReceive.receive(message_t* msg, void* payload, uint8_t len) {
+        am_addr_t from;
+        beacon_msg_t* rcvBeacon;
+
+        // Received a beacon, but it's not from us.
+        if (len != sizeof(beacon_msg_t)) {
+          dbg("LITest", "%s, received beacon of size %hhu, expected %i\n", __FUNCTION__, len, (int)sizeof(beacon_msg_t));
+              
+          return msg;
+        }
+        
+        //need to get the am_addr_t of the source
+        from = call LinkSrcPacket.getSrc(msg);
+        rcvBeacon = (beacon_msg_t*)payload;
+
+        dbg("TreeRouting","%s from: %d  [ parent: %d hopcount: %d metric: %d]\n",
+            __FUNCTION__, from, 
+            rcvBeacon->parent, rcvBeacon->hopcount, rcvBeacon->metric);
+        //call CollectionDebug.logEventRoute(NET_C_TREE_RCV_BEACON, rcvBeacon->parent, rcvBeacon->hopcount, rcvBeacon->metric);
+
+        //update neighbor table
+        if (rcvBeacon->parent != INVALID_ADDR) {
+
+            /* If this node is a root, request a forced insert in the link
+             * estimator table and pin the node. */
+            if (rcvBeacon->hopcount == 0) {
+                dbg("TreeRouting","from a root, inserting if not in table\n");
+                call LinkEstimator.insertNeighbor(from);
+                call LinkEstimator.pinNeighbor(from);
+            }
+            //TODO: also, if better than my current parent's path metric, insert
+
+            routingTableUpdateEntry(from, rcvBeacon->parent, rcvBeacon->hopcount, rcvBeacon->metric);
+        }
+        
+        //post updateRouteTask();
+        return msg;
+    }
+
+    /* Signals that a neighbor is no longer reachable. need special care if
+     * that neighbor is our parent */
+    event void LinkEstimator.evicted(am_addr_t neighbor) {
+        routingTableEvict(neighbor);
+        dbg("TreeRouting","%s\n",__FUNCTION__);
+        if (routeInfo.parent == neighbor) {
+            routeInfoInit(&routeInfo);
+            justEvicted = TRUE;
+            post updateRouteTask();
+        }
+    }
+
+    /* Interface UnicastNameFreeRouting */
+    /* Simple implementation: return the current routeInfo */
+    command am_addr_t Routing.nextHop() {
+        return routeInfo.parent;    
+    }
+    command bool Routing.hasRoute() {
+        return (routeInfo.parent != INVALID_ADDR);
+    }
+   
+    /* TreeRoutingInspect interface */
+    command error_t TreeRoutingInspect.getParent(am_addr_t* parent) {
+        if (parent == NULL) 
+            return FAIL;
+        if (routeInfo.parent == INVALID_ADDR)    
+            return FAIL;
+        *parent = routeInfo.parent;
+        return SUCCESS;
+    }
+    command error_t TreeRoutingInspect.getHopcount(uint8_t* hopcount) {
+        if (hopcount == NULL) 
+            return FAIL;
+        if (routeInfo.parent == INVALID_ADDR)    
+            return FAIL;
+        *hopcount= routeInfo.hopcount;
+        return SUCCESS;
+    }
+    command error_t TreeRoutingInspect.getMetric(uint16_t* metric) {
+        if (metric == NULL) 
+            return FAIL;
+        if (routeInfo.parent == INVALID_ADDR)    
+            return FAIL;
+        *metric = routeInfo.metric;
+        return SUCCESS;
+    }
+
+    command void TreeRoutingInspect.triggerRouteUpdate() {
+      // Random time in interval 64-127ms
+      uint16_t time = call Random.rand16();
+      time &= 0x3f; 
+      time += 64;
+      if (call BeaconTimer.gett0() + call BeaconTimer.getdt() -
+                                     call BeaconTimer.getNow() >= time) {
+         call BeaconTimer.stop();
+         call BeaconTimer.startOneShot(time);
+        }
+     }
+
+    /* RootControl interface */
+    /** sets the current node as a root, if not already a root */
+    /*  returns FAIL if it's not possible for some reason      */
+    command error_t RootControl.setRoot() {
+        bool route_found = FALSE;
+        route_found = (routeInfo.parent == INVALID_ADDR);
+        atomic {
+            state_is_root = 1;
+            routeInfo.parent = my_ll_addr; //myself
+            routeInfo.hopcount = 0;
+            routeInfo.metric = 0;
+        }
+        if (route_found) 
+            signal Routing.routeFound();
+        dbg("TreeRouting","%s I'm a root now!\n",__FUNCTION__);
+        call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, routeInfo.parent, routeInfo.hopcount, routeInfo.metric);
+        return SUCCESS;
+    }
+
+    command error_t RootControl.unsetRoot() {
+        atomic {
+            state_is_root = 0;
+            routeInfoInit(&routeInfo);
+        }
+        dbg("TreeRouting","%s I'm not a root now!\n",__FUNCTION__);
+        post updateRouteTask();
+        return SUCCESS;
+    }
+
+    command bool RootControl.isRoot() {
+        return state_is_root;
+    }
+
+    default event void Routing.noRoute() {
+    }
+    
+    default event void Routing.routeFound() {
+    }
+
+
+    /************************************************************/
+    /* Routing Table Functions                                  */
+
+    /* The routing table keeps info about neighbor's route_info,
+     * and is used when choosing a parent.
+     * The table is simple: 
+     *   - not fragmented (all entries in 0..routingTableActive)
+     *   - not ordered
+     *   - no replacement: eviction follows the LinkEstimator table
+     */
+
+    void routingTableInit() {
+        routingTableActive = 0;
+    }
+
+    /* Returns the index of parent in the table or
+     * routingTableActive if not found */
+    uint8_t routingTableFind(am_addr_t neighbor) {
+        uint8_t i;
+        if (neighbor == INVALID_ADDR)
+            return routingTableActive;
+        for (i = 0; i < routingTableActive; i++) {
+            if (routingTable[i].neighbor == neighbor)
+                break;
+        }
+        return i;
+    }
+
+
+    error_t routingTableUpdateEntry(am_addr_t from, am_addr_t parent, 
+                            uint8_t hopcount, uint16_t metric)
+    {
+        uint8_t idx;
+        uint16_t  linkMetric;
+        linkMetric = evaluateMetric(call LinkEstimator.getLinkQuality(from));
+
+        idx = routingTableFind(from);
+        if (idx == routingTableSize) {
+            //not found and table is full
+            //if (passLinkMetricThreshold(linkMetric))
+                //TODO: add replacement here, replace the worst
+            //}
+            dbg("TreeRouting", "%s FAIL, table full\n", __FUNCTION__);
+            return FAIL;
+        }
+        else if (idx == routingTableActive) {
+            //not found and there is space
+            if (passLinkMetricThreshold(linkMetric)) {
+                atomic {
+                    routingTable[idx].neighbor = from;
+                    routingTable[idx].info.parent = parent;
+                    routingTable[idx].info.hopcount = hopcount;
+                    routingTable[idx].info.metric = metric;
+                    routingTableActive++;
+                }
+                dbg("TreeRouting", "%s OK, new entry\n", __FUNCTION__);
+            } else {
+                dbg("TreeRouting", "%s Fail, link quality (%hu) below threshold\n", __FUNCTION__, linkMetric);
+            }
+        } else {
+            //found, just update
+            atomic {
+                routingTable[idx].neighbor = from;
+                routingTable[idx].info.parent = parent;
+                routingTable[idx].info.hopcount = hopcount;
+                routingTable[idx].info.metric = metric;
+            }
+            dbg("TreeRouting", "%s OK, updated entry\n", __FUNCTION__);
+        }
+        return SUCCESS;
+    }
+
+    /* if this gets expensive, introduce indirection through an array of pointers */
+    error_t routingTableEvict(am_addr_t neighbor) {
+        uint8_t idx,i;
+        idx = routingTableFind(neighbor);
+        if (idx == routingTableActive) 
+            return FAIL;
+        routingTableActive--;
+        for (i = idx; i < routingTableActive; i++) {
+            routingTable[i] = routingTable[i+1];    
+        } 
+        return SUCCESS; 
+    }
+    /*********** end routing table functions ***************/
+
+    /* Default implementations for CollectionDebug calls.
+     * These allow CollectionDebug not to be wired to anything if debugging
+     * is not desired. */
+
+    default command error_t CollectionDebug.logEvent(uint8_t type) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        return SUCCESS;
+    }
+ 
+} 
diff --git a/tos/lib/net/collection/TreeRoutingInspect.nc b/tos/lib/net/collection/TreeRoutingInspect.nc
new file mode 100644
index 00000000..8fbdf735
--- /dev/null
+++ b/tos/lib/net/collection/TreeRoutingInspect.nc
@@ -0,0 +1,57 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @date   $Date$
+ *  @see Net2-WG
+ */
+
+
+interface TreeRoutingInspect {
+  /* Get the parent of the node in the tree.  The pointer is allocated
+   * by the caller.  If the parent is invalid, return FAIL.  The
+   * caller MUST NOT use the value in parent if the return is not
+   * SUCCESS 
+	 */
+	command error_t getParent(am_addr_t* parent);
+
+  /* Get the depth (hopcount) of the node in the tree.  The pointer is
+   * allocated by the caller.  If the parent is invalid, return FAIL
+   * (no info).  The caller MUST NOT use the value in parent if the
+   * return is not SUCCESS 
+	 */
+	command error_t getHopcount(uint8_t* hopcount);
+
+  /* Get the path quality metric for the current path to the root
+   * through the current parent.  The pointer is allocated by the
+   * caller.  If the parent is invalid, return FAIL (no info).  The
+   * caller MUST NOT use the value in parent if the return is not
+   * SUCCESS 
+	 */
+	command error_t getMetric(uint16_t* metric);
+
+  /* This informs the routing engine to update its routing
+   * information, possibly by sending a beacon */
+  command void triggerRouteUpdate();
+}
diff --git a/tos/lib/net/collection/UARTDebugSenderP.nc b/tos/lib/net/collection/UARTDebugSenderP.nc
new file mode 100644
index 00000000..b339d87b
--- /dev/null
+++ b/tos/lib/net/collection/UARTDebugSenderP.nc
@@ -0,0 +1,202 @@
+#include 
+module UARTDebugSenderP {
+    provides {
+        interface CollectionDebug;
+    }
+    uses {
+        interface Boot;
+        interface Pool as MessagePool;
+        interface Queue as SendQueue;
+        interface AMSend as UARTSend;
+    }
+} 
+implementation {
+    message_t uartPacket;
+    bool sending;
+    uint8_t len;
+    uint16_t statLogReceived = 0;
+    uint16_t statEnqueueFail = 0;
+    uint16_t statSendFail = 0;
+    uint16_t statSendDoneFail = 0;
+    uint16_t statSendDoneOk = 0;
+    uint16_t statSendDoneBug = 0;
+ 
+
+    event void Boot.booted() {
+        sending = FALSE;
+        len = sizeof(CollectionDebugMsg);
+        statSendFail = 0;
+        statLogReceived = 0;
+        statEnqueueFail = 0;
+        statSendDoneOk = 0;
+        statSendDoneFail = 0;
+        statSendDoneBug = 0;
+    }
+
+    task void sendTask() {
+        if (sending) {
+            return;
+        } else if (call SendQueue.empty()) {
+            return;
+        } else {
+            message_t* smsg = call SendQueue.head();
+            error_t eval = call UARTSend.send(AM_BROADCAST_ADDR, smsg, len);
+            if (eval == SUCCESS) {
+                sending = TRUE;
+                return;
+            } else {
+                //Drop packet. Don't retry.
+                statSendFail++;
+                call SendQueue.dequeue();
+                call MessagePool.put(smsg);
+                if (! call SendQueue.empty())
+                    post sendTask();
+            }
+        }
+    }
+
+    event void UARTSend.sendDone(message_t *msg, error_t error) {
+        message_t* qh = call SendQueue.head();
+        if (qh == NULL || qh != msg) {
+            //bad mojo
+            statSendDoneBug++;
+        } else {
+            call SendQueue.dequeue();
+            call MessagePool.put(msg);  
+            if (error == SUCCESS) 
+                statSendDoneOk++;
+            else 
+                statSendDoneFail++;
+        }
+        sending = FALSE;
+        if (!call SendQueue.empty()) 
+            post sendTask();
+    }
+
+    command error_t CollectionDebug.logEvent(uint8_t type) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg);
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for FE_SENT_MSG, FE_RCV_MSG, FE_FWD_MSG, FE_DST_MSG */
+    command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg_id, am_addr_t origin, am_addr_t node) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg);
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.msg.msg_uid = msg_id;
+            dbg_msg->data.msg.origin = origin;
+            dbg_msg->data.msg.other_node = node;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for TREE_NEW_PARENT, TREE_ROUTE_INFO */
+    command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg);
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.route_info.parent = parent;
+            dbg_msg->data.route_info.hopcount = hopcount;
+            dbg_msg->data.route_info.metric = metric;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for DBG_1 */ 
+    command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg);
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.arg = arg;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for DBG_2, DBG_3 */
+    command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg);
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.dbg.a = arg1;
+            dbg_msg->data.dbg.b = arg2;
+            dbg_msg->data.dbg.c = arg3;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+
+}
+    
diff --git a/tos/lib/net/collection/UnicastNameFreeRouting.nc b/tos/lib/net/collection/UnicastNameFreeRouting.nc
new file mode 100644
index 00000000..e07ee7fc
--- /dev/null
+++ b/tos/lib/net/collection/UnicastNameFreeRouting.nc
@@ -0,0 +1,42 @@
+/* $Id$ */
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ *  Provides a single next hop on a name-free protocol.
+ *
+ *  @author Philip Levis
+ *  @date   $Date$
+ */
+interface UnicastNameFreeRouting {
+    /**
+     * Get the address of the best next hop set to the destination.
+     * If there is not best next hop, the address is the local address.
+     * @return : The next best hop, or the local address if there is no route.
+     */
+  command am_addr_t nextHop();
+  command bool hasRoute();
+  event void routeFound();
+  event void noRoute();
+  
+}
+
diff --git a/tos/lib/net/collection/collection.draft b/tos/lib/net/collection/collection.draft
new file mode 100644
index 00000000..ea3e489f
--- /dev/null
+++ b/tos/lib/net/collection/collection.draft
@@ -0,0 +1,251 @@
+Collection Service
+
+$Id$
+
+Rodrigo Fonseca, UCB
+Omprakash Gnawali, USC
+Kyle Jamieson, MIT
+
+
+This document describes inital thoughts on the collection protocol to be
+produced by the net2-wg. The main improvements over the defacto standard
+collection from TinyOS 1.x are as follows:
+
+ 1. decoupling of neighbor management and link estimation from the routing
+    establising element
+ 2. more general modularization, in the direction of allowing very different
+    multihop protocols to be implemented along the same lines. This structure can
+    evolve to a more general network layer architecture.
+ 3. decoupling of tree identifier from node address
+
+
+Service:
+
+The service provided by the collection network service is best-effort, multihop
+delivery of packets to the root of a specified tree. The interfaces provided
+are for sending, receiving, intercepting, and snooping packets.  Packets in
+transit can be intercepted for in-network processing, and traffic can be
+snooped by forwarding nodes.
+
+[Rodrigo: This needs discussion, as we are parameterizing the send interface
+ per tree id, and then want to further demultiplex by N_ID.
+ These interfaces are
+ parameterized by a network-layer id (in contrast to an AM id). AM ids are used
+ for multiplexing at the link layer, and NID is used for demultiplexing among
+ different users of the network layer.
+]
+
+Best-effort means that absolute reliability should be obtained by higher layer
+mechanisms, such as end-to-end retransmissions or forward error correcting
+coding. However, it does not preclude network level retransmissions and
+link-level retransmissions. 
+
+There can be multiple trees in a network, and there can be multiple roots in a
+tree.  A network with a single root is a special case of the former. A tree
+with multiple roots will provide the semantics of anycast: the message will be
+delivered to one of the roots.  The specific tree is identified by a tree
+identifier (tree_id).  Tree_id is explicitly decoupled from the node id that is
+the root of the tree, and is considered a network-level name.
+
+This decoupling has some advantages. 
+ 1. allows transparent substitution of one root by another, in case of 
+    failures for example.
+ 2. allows any node to become the root of a tree
+ 3. allows trees with multiple roots
+
+The specific tree(s) an application sends messages to can be configured at
+compile time.  A shim module can be interposed between the network layer and
+the application and provide an address-free sending interface to a specified
+tree_id.
+
+Service decomposition:
+
+There are two main functionalities in the collection network protocol,
+corresponding to data and control planes.  The data plane is responsible for
+forwarding of messages, and the control plane is responsible for the
+establishment of the routes in the network.  In other words, the control plane
+tells *where* to send messages to, while the data plane is responsible for
+*how* and *when* to send messages.  Correspondingly, there are two main modules
+in the implementation: a forwarding engine and a routing engine. The basic
+interface between the two is a lookup call that obtains a set of next hops to
+forward the message to.
+
+The forwarding engine is responsible for the forwarding discipline: queueing,
+scheduling, network-level retransmission. The routing engine is responsible for
+building and maintaining the information necessary to get the next hops for a
+given message. For example, it should maintain the tree structure.  It should
+use the services of a link estimator to provide link quality estimates for
+different neighbors.
+
+Control-plane protocol:
+
+The tree formation protocol is based on a variation of the distance vector
+protocol.  
+
+Control packet format: (in bits)
+
+[sizeof(bits) neighbor_t]:source 4:count 4:total | [ 8:tree_id | 8:root_id | 8:root_seqno | 8:hopcount | 16:cost  ]+ 
+
+source is the neighbor id
+total is how many control packets in this message (if there are many roots that
+      don't fit into a packet)
+count is which one of the total packets in this message this belongs to
+
+Then there is a sequence of cost-to-root messages, specifying the tree_id, the
+root_id in that tree, the
+hopcount of the sending node, the cost to that root through the sender, and the
+sequence number of the root message.
+
+A tree formation message is simply one initiated by the root, in which the
+hopcount and the cost are 0, and the sequence number is incremented with each
+broadcast. The root is the only node which increments the cost-to-root entry
+sequence numbers.
+
+The tree_id allows multiple trees, hopcount allows the tree formation and
+establishment of hopcounts. Cost allows parent selection. Cost MUST be a
+cumulative (additive or multiplicative) measure that represents the cost or
+quality to get a message to the root starting from sending node.  The root_id
+and root_seqno are needed for the prevention of count to infinity problems. 
+
+Each node actively maintains a parent towards the root of a tree. This is the
+neighbor with the lowest composed cost (my cost to the neighbor + the
+neighbor's cost). This parent is not necessarily used for routing: it is used
+to establish the hopcount, and thus the tree structure. A packet can be routed
+to any node that decreases the cost to the root.  Should a parent die, it will
+be readily replaced by another neighbor with a lower cost.  This can be done
+proactively by looking at the neighbor table, or can wait for the next distance
+vector update from a neighbor.
+
+Data-plane protocol:
+
+There are two header fields in the data-plane packets that allow successful
+routing:
+typedef struct {
+	uint8_t tree_id;
+	uint16_t min_cost;
+} nc_header;  //network collection header
+
+The forwarding engine can elect to perform network-level retransmissions to
+alternate next hops should the trasmission to a given next hop fail. This
+allows recoveries in routing on time scales shorter than those required for
+route convergence, and leverages routing engines that can provide multiple next
+hops towards a given destination.  This technique can reduce the buffer
+requirements at forwarding nodes, and spread the load in face of congestion.
+However it is still an open question whether this is the best response: it
+might also spread congestion.
+
+Link Estimation:
+
+Link estimation can be done in a variety of ways, and we do not impose one
+here. It is decoupled from the establishment of routes. There is a narrow
+interface between the link estimator and the routing engine, see interface
+LinkEstimator below.  The one requirement is that the quality returned be
+standardized. Two candidates are the probability of success of a packet, and
+the ETX, or expected number of transmissions to get the message across to the
+other node.  Some protocols might also be interested in one of the reverse or
+forward qualities.  It is the job of the link estimator to convert other
+metrics to the standardized one, and to possibly have its own control traffic
+to exchange reverse link qualities.
+
+There are currently three ways of doing this: using LQI, using RSSI, or using
+an average history of packet losses on a link. In the case of the former, it is
+possible that the link estimator be interposed in the network stack and inserts
+a header with the source address in each outgoing packet.
+
+Some Issues:
+
+Any node can become the root of a tree. Nodes can keep state about a limited
+number of trees. An issue arises when there are more trees active than space in
+the nodes, and there has to be a decision on which tree to keep information
+about.
+
+One solution is to have it be first-come first-serve. Another is to have a
+deterministic priority between tree ids, such that a new tree message will
+displace a lower priority one. Eventually a new tree with higher priority id
+will reach the root of a lower priority one, and the root will silence.
+
+Maybe the simpler solution for now is to have a first come-first serve policy,
+such that a new root will fail to propagate its messages on a network with more
+than one tree.
+
+Interfaces:
+
+
+(The send interface is to be used, parameterized by tree_id)
+interface BasicRouting
+	//To be parameterized by tree_id
+	command result_t getNextHops(neighbor_t* nextHops, uint8_t* n);
+interface CostBasedRouting
+	//To be parameterized by tree_id
+	command uint16_t getMyCost();
+	command uint16_t getNeighborCost(neighbor_t neighbor);
+interface REControl
+	command result_t initializeRH(message_t *msg, uint8_t tree_id);
+	command uint8_t getHeaderSize();
+	command result_t startRoot(uint8_t tree_id);
+	command result_t stopRoot(uint8_t tree_id);
+
+interface LinkEstimator:
+	command uint8_t getLinkQuality(neighbot_t neighbor);
+	command uint8_t getReverseQuality(neighbot_t neighbor);
+	command uint8_t getForwardQuality(neighbot_t neighbor);
+
+interface NeighborTable:
+	event void evicted(neighbot_t neighbor)
+
+(Initially, typedef uint16_t neighbor_t)
+	
+Components:
+
+LinkEstimator {
+	provides {
+		interface LinkEstimator;
+		interface NeighborTable;
+	}
+}
+
+MTreeRoutingEngine
+	provides {
+		REControl;
+		BasicRouting[uint8_t tree_id];
+		CostBasedRouting[uint8_t tree_id];
+	} 
+	uses {
+		LinkEstimator;
+		NeighborTable;
+		SendMsg[CONTROL_AM_ID];
+		ReceiveMsg[CONTROL_AM_ID];
+	}
+}
+
+ForwardingEngine {
+	provides {
+		interface Send[uint8_t tree_id]
+		interface Receive[uint8_t tree_id];
+		interface Intercept;
+		interface Snoop;
+		interface Packet;
+	}
+	uses {
+		interface REControl;
+		interface BasicRouting[uint8_t tree_id];
+		interface CostBasedRouting[uint8_t tree_id];
+		interface SendMsg[COLLECTION_AM_ID];
+		interface ReceiveMsg[COLLECTION_AM_ID];
+	}
+}
+
+Observation: while some of these interfaces are similar to the ones specified
+for multihop routing in TinyOS 1.x, there were several required changes. The
+TinyOS framework assumed address-free protocols, and only one next hop per
+message. There was also a coupling assumed between parent selection and
+neighbor/link quality estimation, which resulted in the exposure of some
+parameters not necessary for the forwarding part. There is parallel between
+RouteSelect and BasicRouting, CostBasedRouting and REControl, while calls such
+as getQuality shouldn't be exposed to the ForwardingEngine.
+
+
+
+
+
+
diff --git a/tos/lib/power/AsyncDeferredPowerManagerP.nc b/tos/lib/power/AsyncDeferredPowerManagerP.nc
new file mode 100644
index 00000000..a3df6e40
--- /dev/null
+++ b/tos/lib/power/AsyncDeferredPowerManagerP.nc
@@ -0,0 +1,119 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This is the internal implementation of the deffered power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to delay the power down of a device by some contant
+ * factor.  Such a policy is useful whenever a device has a long wake-up
+ * latency.  The cost of waiting for the device to power up can be
+ * avoided if the device is requested again before some predetermined
+ * amount of time.
+ *
+ * @param delay -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module AsyncDeferredPowerManagerP(uint32_t delay) {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+    interface ArbiterInfo;
+    interface Timer as TimerMilli;
+  }
+}
+implementation {
+
+  norace struct {
+   uint8_t stopping :1;
+   uint8_t requested :1;
+  } f; //for flags
+
+  task void timerTask() { 
+    call TimerMilli.startOneShot(delay); 
+  }
+
+  command error_t Init.init() {
+    f.stopping = FALSE;
+    f.requested = FALSE;
+    call ArbiterInit.init();
+    call ResourceController.immediateRequest();
+    return SUCCESS;
+  }
+
+  async event void ResourceController.requested() {
+    if(f.stopping == FALSE) {
+      call AsyncStdControl.start();
+      call ResourceController.release();
+    }
+    else atomic f.requested = TRUE;
+  }
+
+  async event void ResourceController.idle() {
+    if(!(call ArbiterInfo.inUse()))
+      post timerTask();
+  }
+
+  event void TimerMilli.fired() {
+    if(call ResourceController.immediateRequest() == SUCCESS) {
+      f.stopping = TRUE;
+      call PowerDownCleanup.cleanup();
+      call AsyncStdControl.stop();
+    }
+    if(f.requested == TRUE) {
+      call AsyncStdControl.start();
+      call ResourceController.release();
+    }
+    atomic {
+      f.stopping = FALSE;
+      f.requested = FALSE;
+    }    
+  }
+
+  event void ResourceController.granted() {
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/AsyncPowerManagerP.nc b/tos/lib/power/AsyncPowerManagerP.nc
new file mode 100644
index 00000000..7c00a483
--- /dev/null
+++ b/tos/lib/power/AsyncPowerManagerP.nc
@@ -0,0 +1,102 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module AsyncPowerManagerP() {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+  }
+}
+implementation {
+
+  norace struct {
+    uint8_t stopping :1;
+    uint8_t requested :1;
+  } f; //for flags
+  
+  command error_t Init.init() {
+    call ArbiterInit.init();
+    call ResourceController.immediateRequest();
+    return SUCCESS;
+  }
+
+  async event void ResourceController.requested() {
+    if(f.stopping == FALSE) {
+      call AsyncStdControl.start();
+      call ResourceController.release();
+    }
+    else atomic f.requested = TRUE;    
+  }
+
+  async event void ResourceController.idle() {
+    if(call ResourceController.immediateRequest() == SUCCESS) {
+      atomic f.stopping = TRUE;
+      call PowerDownCleanup.cleanup();
+      call AsyncStdControl.stop();
+    }
+    if(f.requested == TRUE) {
+      call AsyncStdControl.start();
+      call ResourceController.release();
+    }
+    atomic {
+      f.stopping = FALSE;
+      f.requested = FALSE;
+    }
+  }
+
+  event void ResourceController.granted() {
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc b/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..efbde64c
--- /dev/null
+++ b/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc
@@ -0,0 +1,90 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.

    
+ *
+ * Powerdown of the device is done through the AsyncStdControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the StdControl or
+ * SplitControl interfaces, please use either the
+ * StdControlDeferredPowerManagerC component or the
+ * SplitControlDeferredPowerManagerC component respectively.
+ *
+ * @param delay -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration AsyncStdControlDeferredPowerManagerC(uint32_t delay)
+{
+  provides {
+    interface Init;
+  }
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new AsyncDeferredPowerManagerP(delay) as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.AsyncStdControl = AsyncStdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/AsyncStdControlPowerManagerC.nc b/tos/lib/power/AsyncStdControlPowerManagerC.nc
new file mode 100644
index 00000000..9ccb2182
--- /dev/null
+++ b/tos/lib/power/AsyncStdControlPowerManagerC.nc
@@ -0,0 +1,82 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.

    
+ *
+ * Powerdown of the device is done through the AsyncStdControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the StdControl or
+ * SplitControl interfaces, please use either the
+ * StdControlPowerManagerC component or the
+ * SplitControlPowerManagerC component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration AsyncStdControlPowerManagerC()
+{
+  provides {
+    interface Init;
+  }
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+  }
+}
+implementation {
+  components new AsyncPowerManagerP() as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.AsyncStdControl = AsyncStdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+}
+
diff --git a/tos/lib/power/DeferredPowerManagerP.nc b/tos/lib/power/DeferredPowerManagerP.nc
new file mode 100644
index 00000000..c3184bac
--- /dev/null
+++ b/tos/lib/power/DeferredPowerManagerP.nc
@@ -0,0 +1,146 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This is the internal implementation of the deffered power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to delay the power down of a device by some contant
+ * factor.  Such a policy is useful whenever a device has a long wake-up
+ * latency.  The cost of waiting for the device to power up can be
+ * avoided if the device is requested again before some predetermined
+ * amount of time.
+ *
+ * @param delay -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module DeferredPowerManagerP(uint32_t delay) {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface StdControl;
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+    interface ArbiterInfo;
+    interface Timer as TimerMilli;
+  }
+}
+implementation {
+
+  norace struct {
+   uint8_t stopping :1;
+   uint8_t requested :1;
+  } f; //for flags
+
+  task void startTask() { 
+    call StdControl.start();
+    call SplitControl.start();
+  }
+  task void timerTask() { 
+    call TimerMilli.startOneShot(delay); 
+  }
+
+  command error_t Init.init() {
+    f.stopping = FALSE;
+    f.requested = FALSE;
+    call ArbiterInit.init();
+    call ResourceController.immediateRequest();
+    return SUCCESS;
+  }
+
+  async event void ResourceController.requested() {
+    if(f.stopping == FALSE)
+      post startTask();
+    else atomic f.requested = TRUE;
+  }
+
+  default command error_t StdControl.start() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.start() {
+    signal SplitControl.startDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  event void SplitControl.startDone(error_t error) {
+    call ResourceController.release();
+  }
+
+  async event void ResourceController.idle() {
+    if(!(call ArbiterInfo.inUse()))
+      post timerTask();
+  }
+
+  event void TimerMilli.fired() {
+    if(call ResourceController.immediateRequest() == SUCCESS) {
+      f.stopping = TRUE;
+      call PowerDownCleanup.cleanup();
+      call StdControl.stop();
+      call SplitControl.stop();
+    }
+  }
+
+  event void SplitControl.stopDone(error_t error) {
+    if(f.requested == TRUE) {
+      call StdControl.start();
+      call SplitControl.start();
+    }
+    atomic {
+      f.requested = FALSE;
+      f.stopping = FALSE;
+    }
+  }
+
+  event void ResourceController.granted() {
+  }
+
+  default command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.stop() {
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/PowerDownCleanup.nc b/tos/lib/power/PowerDownCleanup.nc
new file mode 100644
index 00000000..dc403c06
--- /dev/null
+++ b/tos/lib/power/PowerDownCleanup.nc
@@ -0,0 +1,53 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This interface exists to allow a Resource user to cleanup any state
+ * information before a shared Resource is shutdown.  It should be provided
+ * by the user of a shared Resource, and used by the
+ * power managment component for that Resource.  The cleanup()
+ * command will be called by the power manager just before powering down
+ * the shared resource.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use. 
+ */
+
+interface PowerDownCleanup {
+  /**
+   * This command will be called by the power management component of
+   * a shared Resource.  The implementation of this command defines
+   * what must be done just before that shared Resource is shut off.
+   *
+   */
+  async command void cleanup();
+} 
diff --git a/tos/lib/power/PowerManagerP.nc b/tos/lib/power/PowerManagerP.nc
new file mode 100644
index 00000000..691f2b3d
--- /dev/null
+++ b/tos/lib/power/PowerManagerP.nc
@@ -0,0 +1,135 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module PowerManagerP() {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface StdControl;
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+  }
+}
+implementation {
+
+  norace struct {
+   uint8_t stopping :1;
+   uint8_t requested :1;
+  } f; //for flags
+
+  task void startTask() { 
+    call StdControl.start();
+    call SplitControl.start();
+  }
+  task void stopTask() { 
+    call StdControl.stop(); 
+    call SplitControl.stop(); 
+  }
+
+  command error_t Init.init() {
+    f.stopping = FALSE;
+    f.requested = FALSE;
+    call ArbiterInit.init();
+    call ResourceController.immediateRequest();
+    return SUCCESS;
+  }
+
+  async event void ResourceController.requested() {
+    if(f.stopping == FALSE)
+      post startTask();
+    else atomic f.requested = TRUE;
+  }
+  
+  default command error_t StdControl.start() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.start() {
+    signal SplitControl.startDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  event void SplitControl.startDone(error_t error) {
+    call ResourceController.release();
+  }
+  
+  async event void ResourceController.idle() {
+    if(call ResourceController.immediateRequest() == SUCCESS) {
+      f.stopping = TRUE;
+      call PowerDownCleanup.cleanup();
+      post stopTask();
+    }
+  }
+
+  event void SplitControl.stopDone(error_t error) {
+    if(f.requested == TRUE) {
+      call StdControl.start();
+      call SplitControl.start();
+    }
+    atomic {
+      f.requested = FALSE;
+      f.stopping = FALSE;
+    }
+  }
+
+  event void ResourceController.granted() {
+  }
+
+  default command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.stop() {
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/SplitControlDeferredPowerManagerC.nc b/tos/lib/power/SplitControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..256286c8
--- /dev/null
+++ b/tos/lib/power/SplitControlDeferredPowerManagerC.nc
@@ -0,0 +1,89 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.

    
+ *
+ * Powerdown of the device is done through the SplitControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the AsyncStdControl or
+ * StdControl interfaces, please use either the
+ * AsyncStdControlDeferredPowerManagerC component or the
+ * StdControlDeferredPowerManagerC component respectively.
+ *
+ * @param delay -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration SplitControlDeferredPowerManagerC(uint32_t delay) {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new DeferredPowerManagerP(delay) as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.SplitControl = SplitControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/SplitControlPowerManagerC.nc b/tos/lib/power/SplitControlPowerManagerC.nc
new file mode 100644
index 00000000..e1f38b44
--- /dev/null
+++ b/tos/lib/power/SplitControlPowerManagerC.nc
@@ -0,0 +1,81 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.

    
+ *
+ * Powerdown of the device is done through the SplitControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the AsyncStdControl or
+ * StdControl interfaces, please use either the
+ * AsyncStdControlPowerManagerC component or the
+ * StdControlPowerManagerC component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration SplitControlPowerManagerC() {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+  }
+}
+implementation {
+  components  new PowerManagerP() as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.SplitControl = SplitControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+}
+
diff --git a/tos/lib/power/StdControlDeferredPowerManagerC.nc b/tos/lib/power/StdControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..d2f0edab
--- /dev/null
+++ b/tos/lib/power/StdControlDeferredPowerManagerC.nc
@@ -0,0 +1,90 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.

    
+ *
+ * Powerdown of the device is done through the StdControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the AsyncStdControl or
+ * SplitControl interfaces, please use either the
+ * AsyncStdControlDeferredPowerManagerC component or the
+ * SplitControlDeferredPowerManagerC component respectively.
+ *
+ * @param delay -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration StdControlDeferredPowerManagerC(uint32_t delay)
+{
+  provides {
+    interface Init;
+  }
+  uses {
+    interface StdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new DeferredPowerManagerP(delay) as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.StdControl = StdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/StdControlPowerManagerC.nc b/tos/lib/power/StdControlPowerManagerC.nc
new file mode 100644
index 00000000..66a6a2f2
--- /dev/null
+++ b/tos/lib/power/StdControlPowerManagerC.nc
@@ -0,0 +1,82 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.

    
+ *
+ * Powerdown of the device is done through the StdControl
+ * interface, so this component can only be used with those devices that
+ * provide that interface.

    
+ *
+ * For devices providing either the AsyncStdControl or
+ * SplitControl interfaces, please use either the
+ * AsyncStdControPowerManagerC component or the
+ * SplitControlPowerManagerC component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @see  Please refer to TEP 115 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration StdControlPowerManagerC()
+{
+  provides {
+    interface Init;
+  }
+  uses {
+    interface StdControl;
+
+    interface PowerDownCleanup;
+    interface Init as ArbiterInit;
+    interface ResourceController;
+  }
+}
+implementation {
+  components new PowerManagerP() as PowerManager;
+
+  Init = PowerManager;
+ 
+  PowerManager.StdControl = StdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ArbiterInit  = ArbiterInit;
+  PowerManager.ResourceController = ResourceController;
+}
+
diff --git a/tos/lib/serial/HdlcTranslateC.nc b/tos/lib/serial/HdlcTranslateC.nc
new file mode 100644
index 00000000..71a1b18b
--- /dev/null
+++ b/tos/lib/serial/HdlcTranslateC.nc
@@ -0,0 +1,111 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This is an implementation of HDLC serial encoding, supporting framing
+ * through frame delimiter bytes and escape bytes.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+
+module HdlcTranslateC {
+  provides interface SerialFrameComm;
+  uses {
+    interface SerialByteComm;
+    interface Leds;
+  }
+}
+
+implementation {
+  typedef struct {
+    uint8_t sendEscape:1;
+    uint8_t receiveEscape:1;
+  } HdlcState;
+  
+  //norace uint8_t debugCnt = 0;
+  norace HdlcState state = {0,0};
+  norace uint8_t txTemp;
+
+  
+  // TODO: add reset for when SerialM goes no-sync.
+  async command void SerialFrameComm.resetReceive(){
+    state.receiveEscape = 0;
+  }
+  async command void SerialFrameComm.resetSend(){
+    state.sendEscape = 0;
+  }
+  async event void SerialByteComm.get(uint8_t data) {
+    //debugCnt++;
+    // 7E 41 0E 05 04 03 02 01 00 01 8F 7E
+/*     if (debugCnt == 1 && data == 0x7E) call Leds.led0On(); */
+/*     if (debugCnt == 2 && data == 0x41) call Leds.led1On(); */
+/*     if (debugCnt == 3 && data == 0x0E) call Leds.led2On(); */
+
+    if (data == HDLC_FLAG_BYTE) {
+      //call Leds.led1On();
+      signal SerialFrameComm.delimiterReceived();
+      return;
+    }
+    else if (data == HDLC_CTLESC_BYTE) {
+      //call Leds.led1On();
+      state.receiveEscape = 1;
+      return;
+    }
+    else if (state.receiveEscape) {
+      //call Leds.led1On();
+      state.receiveEscape = 0;
+      data = data ^ 0x20;
+    }
+    signal SerialFrameComm.dataReceived(data);
+  }
+
+  async command error_t SerialFrameComm.putDelimiter() {
+    state.sendEscape = 0;
+    return call SerialByteComm.put(HDLC_FLAG_BYTE);
+  }
+  
+  async command error_t SerialFrameComm.putData(uint8_t data) {
+    if (data == HDLC_CTLESC_BYTE || data == HDLC_FLAG_BYTE) {
+      state.sendEscape = 1;
+      txTemp = data ^ 0x20;
+      return call SerialByteComm.put(HDLC_CTLESC_BYTE);
+    }
+    else {
+      return call SerialByteComm.put(data);
+    }
+  }
+
+  async event void SerialByteComm.putDone() {
+    if (state.sendEscape) {
+      state.sendEscape = 0;
+      call SerialByteComm.put(txTemp);
+    }
+    else {
+      signal SerialFrameComm.putDone();
+    }
+  }
+}
diff --git a/tos/lib/serial/README.txt b/tos/lib/serial/README.txt
new file mode 100644
index 00000000..d847bcc4
--- /dev/null
+++ b/tos/lib/serial/README.txt
@@ -0,0 +1,74 @@
+The purpose of this UART stack is to allow arbitary packet
+formats to be encapsulated within a UART frame. The basic 
+problem is that TinyOS needs to support two mote classes. 
+The first are mote end points, which receive and process packets, 
+possibly moving data between link layers. The second are mote
+bridges, which transparently forward data packets between media.
+
+The first class is simple: the UART can support its own active
+messages implementation, which is platform independent.
+An application that wants to send data to a mote generates a
+AM formatted for the UART and sends it to the mote over the 
+serial connection. The UART implementation then provides standard
+2.x accessors for the AM fields, such as destination. In this
+case, the UART is another packet format written into message_t.
+
+The second class is more difficult. The goal for this class is
+that you can communicate with a TinyOS network through data link
+layer packets, rather than at AM layer packets. So, for example,
+you can snoop on all of the 802.15.4 packets being sent and see
+all of the 802.15.4 specific headers. Or, you can send an 802.15.4
+packet to a mote over a serial port and it will just forward it
+over the radio. This functionality allows a PC to directly
+interact with the network, which has been shown to be an
+important requirement, especially when monitoring or testing
+deployed networks.
+
+The problem is more difficult due to how message_t works. As all 
+data link layers are justified on the data payload of the C
+structure, data link headers can start at offsets within the structure
+(as packets must be contiguous in memory). Therefore, to be
+able to read in an 802.15.4 packet over the serial port, the UART
+subsystem needs to know *where* in message_t the packet begins.
+Assuming what comes in over the serial port is correctly formatted,
+then if it knows the offset, the UART stack can just spool the
+bytes directly into the message_t at that offset.
+
+The send direction has a similar issue: the UART layer has to know
+where in the message_t the actual packet begins, and how long the
+entire packet is.
+
+Given that it might need to receive a wide range of packet formats
+encapsulated in a UART frame, the UART frame needs an identifier
+to dispatch on what type of data is within the frame. The basic
+case -- a platform independent AM packet -- is just one of these
+identifiers. This means that the UART provides a parameterized
+send and receive interface, where the parameter is the type of
+data encapsulated in the frame. The receive and send interfaces 
+need to be able to map one of these identifiers to a message_t offset
+as well as calculate the packet length in terms of a data link
+layer (e.g., if the length only pertains to the data payload of
+the encapsulated packet, then the UART system needs to subtract
+the header and footer length from the frame length).
+
+The solution is that every encapsulated packet type has a component
+that implements the SerialPacketInfo interface, which provides
+three commands.
+
+offset(), which returns the offset at which a packet begins in the message_t
+dataLinkLen(), which returns the length of a data link packet given a 
+data payload length
+upperLen(), which returns the length of a payload given a packet
+length 
+
+
+
+
+
+The offset of a given data link packet in a message_t is known
+at compile time: there is no need to store it in RAM. Therefore,
+whe
+
+
+
+
diff --git a/tos/lib/serial/ReceiveBytePacket.nc b/tos/lib/serial/ReceiveBytePacket.nc
new file mode 100644
index 00000000..4ede061d
--- /dev/null
+++ b/tos/lib/serial/ReceiveBytePacket.nc
@@ -0,0 +1,71 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This is the data interface that a serial protocol provides and
+ * a serial dispatcher uses. The dispatcher expects the following pattern
+ * of calls: ((startPacket)+ (byteReceived)* (endPacket)+)*
+ * It should ignore any signals that do not follow this pattern.
+ * The interface is used to separate the state machine of the wire protocol
+ * from the complexities of dispatch.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+interface ReceiveBytePacket {
+
+  
+  /**
+   * Signals the upper layer to indicate that reception of a frame has begun.
+   * Used by the upper layer to prepare for packet reception. If the upper
+   * layer does not want to receive a packet (or isn't ready) it may
+   * return a non-SUCCESS code  such as EBUSY to the lower layer to discard
+   * the frame. The underlying layer may signal endPacket in response to
+   * such a discard request.
+   * @return Returns an error_t code indicating whether the
+   * dispatcher would like to receive a packet (SUCCESS), or not
+   * perhaps because it isn't ready (EBUSY).
+   */
+  async event error_t startPacket();
+
+  /**
+   * Signals the upper layer that a byte of the encapsulated packet has been
+   * received. Passes this byte as a parameter to the function.
+   * @param data A byte of the encapsulated packet that has been received.
+   */
+  async event void byteReceived(uint8_t data);
+  /**
+   * Signalled to indicate that a packet encapsulated withing a serial
+   * frame has been received. SUCCESS should be passed by the lower layer
+   * following verification that the packet has been received correctly.
+   * A value of error_t indicating an error should be passed when the lower
+   * layer's verification test fails or when the lower layer loses sync.
+   * @param result An error_t code indicating whether the framer has
+   * passed all bytes of an encapsulated packet it receives from
+   * serial to the dispatcher (SUCCESS) or not (FAIL).
+   */
+  async event void endPacket(error_t result);
+}
+
diff --git a/tos/lib/serial/SendBytePacket.nc b/tos/lib/serial/SendBytePacket.nc
new file mode 100644
index 00000000..fd06201d
--- /dev/null
+++ b/tos/lib/serial/SendBytePacket.nc
@@ -0,0 +1,84 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+ /**
+ * This is an interface that a serial framing protocol provides and a serial
+ * dispatcher uses. The call sequence should be as follows:
+ * The dispatcher should call startSend, specifying the first byte to
+ * send. The framing protocol can then signal as many nextBytes as it
+ * wants/needs, to spool in the bytes. It continues to do so until it receives
+ * a sendComplete call, which will almost certainly happen within a nextByte
+ * signal (i.e., re-entrant to the framing protocol).
+
+ * This allows the framing protocol to buffer as many bytes as it needs to to meet
+ * timing requirements, jitter, etc. 
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+
+interface SendBytePacket {
+  /**
+   * The dispatcher may initiate a serial transmission by calling this function
+   * and passing the first byte to be transmitted.
+   * @param first_byte The first byte to be transmitted.
+   * @return Returns an error_t code indicating either that the framer
+   * has the resources available to transmit the frame (SUCCESS) or
+   * not (EBUSY).
+   */
+  async command error_t startSend(uint8_t first_byte);
+
+  /**
+   * The dispatcher must indicate when the end-of-packet has been reached and does
+   * so by calling completeSend. The function may be called from within the
+   * implementation of a nextByte event.
+   * @return Returns an error_t code indicating whether the framer accepts
+   * this notification (SUCCESS) or not (FAIL).
+   */
+  async command error_t completeSend();
+
+  /**
+   * Used by the framer to request the next byte to transmit. The
+   * framer may allocate a buffer to pre-spool some or all of a
+   * packet; or it may request and transmit a byte at a time. If there
+   * are no more bytes to send, the dispatcher must call completeSend
+   * before returning from this function.
+   * @return The dispatcher must return the next byte to transmit
+   */
+  async event uint8_t nextByte();
+
+  /**
+   * The framer signals sendCompleted to indicate that it is done transmitting a
+   * packet on the dispatcher's behalf. A non-SUCCESS error_t code indicates that
+   * there was a problem in transmission.
+   * @param error The framer indicates whether it has successfully
+   * accepted the entirety of the packet from the dispatcher (SUCCESS)
+   * or not (FAIL).
+   */
+  async event void sendCompleted(error_t error);
+}
+
+
+
diff --git a/tos/lib/serial/Serial.h b/tos/lib/serial/Serial.h
new file mode 100644
index 00000000..500e137a
--- /dev/null
+++ b/tos/lib/serial/Serial.h
@@ -0,0 +1,124 @@
+//$Id$
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author: Phil Buonadonna
+ * 
+ */
+
+/**
+ * @author Phil Buonadonna
+ * @author Lewis Girod
+ * @author Ben Greenstein
+ * @author Philip Levis
+ * @date   August 7 2005
+ */
+
+#ifndef SERIAL_H
+#define SERIAL_H
+#include "AM.h"
+
+typedef uint8_t uart_id_t;
+
+#define UQ_SERIALQUEUE_SEND "SerialQueueP.Send"
+
+enum {
+  HDLC_FLAG_BYTE	   = 0x7e,
+  HDLC_CTLESC_BYTE	   = 0x7d,
+};
+
+// message_t type dispatch
+
+enum {
+  TOS_SERIAL_ACTIVE_MESSAGE_ID = 0,
+  TOS_SERIAL_CC1000_ID = 1,
+  TOS_SERIAL_802_15_4_ID = 2,
+  TOS_SERIAL_UNKNOWN_ID = 255,
+};
+
+// Framer-level dispatch
+enum {
+  SERIAL_PROTO_ACK = 67,
+  SERIAL_PROTO_PACKET_ACK = 68,
+  SERIAL_PROTO_PACKET_NOACK = 69,
+  SERIAL_PROTO_PACKET_UNKNOWN = 255
+};
+
+typedef struct radio_stats {
+  uint8_t version;
+  uint8_t flags;
+  uint8_t reserved;
+  uint8_t platform;
+  uint16_t MTU;
+  uint16_t radio_crc_fail;
+  uint16_t radio_queue_drops;
+  uint16_t serial_crc_fail;
+  uint16_t serial_tx_fail;
+  uint16_t serial_short_packets;
+  uint16_t serial_proto_drops;
+} radio_stats_t;
+
+typedef nx_struct serial_header {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} serial_header_t;
+
+typedef nx_struct serial_packet {
+  serial_header_t header;
+  nx_uint8_t data[];
+} serial_packet_t;
+
+#endif
diff --git a/tos/lib/serial/Serial802_5_4C.nc b/tos/lib/serial/Serial802_5_4C.nc
new file mode 100644
index 00000000..c6187fe6
--- /dev/null
+++ b/tos/lib/serial/Serial802_5_4C.nc
@@ -0,0 +1,49 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of communication 802.15.4 message_t packets over the
+ * serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+configuration Serial802_15_4C {
+  provides {
+    interface Send;
+    interface Receive;
+  }
+  uses interface Leds;
+}
+implementation { 
+  components SerialPacketInfo802_15_4P as Info, SerialDispatcherC;
+
+  Init = SerialDispatcherC;
+  Leds = SerialDispatcherC;
+  Send = SerialDispatcherC.Send[TOS_SERIAL_802_15_4_ID];
+  Receive = SerialDispatcherC.Receive[TOS_SERIAL_802_15_4_ID];
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_802_15_4_ID] -> Info;
+}
diff --git a/tos/lib/serial/SerialAMQueueP.nc b/tos/lib/serial/SerialAMQueueP.nc
new file mode 100644
index 00000000..7bc33cd0
--- /dev/null
+++ b/tos/lib/serial/SerialAMQueueP.nc
@@ -0,0 +1,52 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The fair-share AM send queue.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+#include "Serial.h"
+
+configuration SerialAMQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> SerialActiveMessageC;
+  AMQueueImplP.AMPacket -> SerialActiveMessageC;
+  AMQueueImplP.Packet -> SerialActiveMessageC;
+  
+}
+
diff --git a/tos/lib/serial/SerialAMReceiverC.nc b/tos/lib/serial/SerialAMReceiverC.nc
new file mode 100644
index 00000000..72ad7481
--- /dev/null
+++ b/tos/lib/serial/SerialAMReceiverC.nc
@@ -0,0 +1,49 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized AM reception abstraction.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration SerialAMReceiverC(am_id_t amId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components SerialActiveMessageC as AM;
+
+  Receive = AM.Receive[amId];
+  Packet = AM;
+  AMPacket = AM;
+}
diff --git a/tos/lib/serial/SerialAMSenderC.nc b/tos/lib/serial/SerialAMSenderC.nc
new file mode 100644
index 00000000..04b5a916
--- /dev/null
+++ b/tos/lib/serial/SerialAMSenderC.nc
@@ -0,0 +1,59 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized active message send abstraction. Each instantiation
+ * of AMSenderC has its own queue of depth one. Therefore, it does not
+ * have to contend with other AMSenderC instantiations for queue space.
+ * The underlying implementation schedules the packets in these queues
+ * using some form of fair-share queueing.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "Serial.h"
+
+generic configuration SerialAMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components new AMQueueEntryP(AMId) as AMQueueEntryP;
+  components SerialAMQueueP, SerialActiveMessageC as AM;
+
+  AMQueueEntryP.Send -> SerialAMQueueP.Send[unique(UQ_SERIALQUEUE_SEND)];
+  AMQueueEntryP.AMPacket -> AM;
+  
+  AMSend = AMQueueEntryP;
+  Packet = AM;
+  AMPacket = AM;
+  Acks = AM;
+}
diff --git a/tos/lib/serial/SerialActiveMessageC.nc b/tos/lib/serial/SerialActiveMessageC.nc
new file mode 100644
index 00000000..d4894771
--- /dev/null
+++ b/tos/lib/serial/SerialActiveMessageC.nc
@@ -0,0 +1,62 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+configuration SerialActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+  uses interface Leds;
+}
+implementation {
+  components new SerialActiveMessageP() as AM, SerialDispatcherC;
+  components SerialPacketInfoActiveMessageP as Info, MainC;
+
+  MainC.SoftwareInit -> SerialDispatcherC;
+  Leds = SerialDispatcherC;
+  SplitControl = SerialDispatcherC;
+  
+  AMSend = AM;
+  Receive = AM;
+  Packet = AM;
+  AMPacket = AM;
+  PacketAcknowledgements = AM;
+  
+  AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+}
diff --git a/tos/lib/serial/SerialActiveMessageP.nc b/tos/lib/serial/SerialActiveMessageP.nc
new file mode 100644
index 00000000..3a123a9b
--- /dev/null
+++ b/tos/lib/serial/SerialActiveMessageP.nc
@@ -0,0 +1,164 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include 
+
+generic module SerialActiveMessageP () {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+  }
+}
+implementation {
+
+  serial_header_t* getHeader(message_t* msg) {
+    return (serial_header_t*)(msg->data - sizeof(serial_header_t));
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t dest,
+					  message_t* msg,
+					  uint8_t len) {
+    serial_header_t* header = getHeader(msg);
+    header->addr = dest;
+    header->type = id;
+    header->length = len;
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) {
+   return;
+ }
+
+ default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) {
+   return msg;
+ }
+ 
+  
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    return;
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    serial_header_t* header = getHeader(msg);    
+    return header->length;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    if (len != NULL) { 
+      *len = call Packet.payloadLength(msg);
+    }
+    return msg->data;
+  }
+
+  command am_addr_t AMPacket.address() {
+    return 0;
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->addr = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return TRUE;
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    serial_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  async command error_t PacketAcknowledgements.requestAck( message_t* msg ) {
+    return FAIL;
+  }
+  async command error_t PacketAcknowledgements.noAck( message_t* msg ) {
+    return SUCCESS;
+  }
+   
+  async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+
+}
diff --git a/tos/lib/serial/SerialByteComm.nc b/tos/lib/serial/SerialByteComm.nc
new file mode 100644
index 00000000..6aa7c998
--- /dev/null
+++ b/tos/lib/serial/SerialByteComm.nc
@@ -0,0 +1,54 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * A basic byte-level interface to a serial port.
+ *
+ * @author David Gay
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+interface SerialByteComm {
+
+  /** 
+   * Put a single byte to the serial port.
+   * @param data The byte to send to the serial port.
+   * @return Returns an error_t code indicating whether this byte was
+   * successfully put (SUCCESS) or not (FAIL).
+   */
+  async command error_t put(uint8_t data);
+
+  /** 
+   * Receive a single byte from the serial port.
+   * @param data The byte that has been received from the serial port.
+   */
+  async event void get(uint8_t data);
+
+  /** 
+   * Split phase event to indicate that the last put request
+   * has completed.
+   */
+  async event void putDone();
+}
diff --git a/tos/lib/serial/SerialDispatcherC.nc b/tos/lib/serial/SerialDispatcherC.nc
new file mode 100644
index 00000000..67a5b213
--- /dev/null
+++ b/tos/lib/serial/SerialDispatcherC.nc
@@ -0,0 +1,72 @@
+//$Id$
+
+/* "Copyright (c) 2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+
+/**
+ * This component provides functionality to send many different kinds
+ * of serial packets on top of a general packet sending component. It
+ * achieves this by knowing where the different packets in a message_t
+ * exist through the SerialPacketInfo interface.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+configuration SerialDispatcherC {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface Receive[uart_id_t];
+    interface Send[uart_id_t];
+  }
+  uses {
+    interface SerialPacketInfo[uart_id_t];
+    interface Leds;
+  }
+}
+implementation {
+  components SerialP, new SerialDispatcherP(), 
+    HdlcTranslateC, 
+    PlatformSerialC;
+  
+  Send = SerialDispatcherP;
+  Receive = SerialDispatcherP;
+  SerialPacketInfo = SerialDispatcherP.PacketInfo;
+  SplitControl = SerialP;
+  
+  Init = SerialP;
+  Init = PlatformSerialC;
+  Leds = SerialP;
+  Leds = SerialDispatcherP;
+  Leds = HdlcTranslateC;
+
+  SerialDispatcherP.ReceiveBytePacket -> SerialP;
+  SerialDispatcherP.SendBytePacket -> SerialP;
+  
+  SerialP.SerialFrameComm -> HdlcTranslateC;
+  SerialP.SerialControl -> PlatformSerialC;
+  
+  HdlcTranslateC.SerialByteComm -> PlatformSerialC;
+  
+}
diff --git a/tos/lib/serial/SerialDispatcherP.nc b/tos/lib/serial/SerialDispatcherP.nc
new file mode 100644
index 00000000..cc85a3f3
--- /dev/null
+++ b/tos/lib/serial/SerialDispatcherP.nc
@@ -0,0 +1,364 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This component provides functionality to send many different kinds
+ * of serial packets on top of a general packet sending component. It
+ * achieves this by knowing where the different packets in a message_t
+ * exist through the SerialPacketInfo interface.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+
+generic module SerialDispatcherP() {
+  provides {
+    interface Receive[uart_id_t id];
+    interface Send[uart_id_t id];
+  }
+  uses {
+    interface SerialPacketInfo as PacketInfo[uart_id_t id];
+    interface ReceiveBytePacket;
+    interface SendBytePacket;
+    interface Leds;
+  }
+}
+implementation {
+
+  typedef enum {
+    SEND_STATE_IDLE = 0,
+    SEND_STATE_BEGIN = 1,
+    SEND_STATE_DATA = 2
+  } send_state_t;
+
+  enum {
+    RECV_STATE_IDLE = 0,
+    RECV_STATE_BEGIN = 1,
+    RECV_STATE_DATA = 2,
+  }; 
+  
+  typedef struct {
+    uint8_t which:1;
+    uint8_t bufZeroLocked:1;
+    uint8_t bufOneLocked:1;
+    uint8_t state:2;
+  } recv_state_t;
+  
+  // We are not busy, the current buffer to use is zero,
+  // neither buffer is locked, and we are idle
+  recv_state_t receiveState = {0, 0, 0, RECV_STATE_IDLE};
+  uint8_t recvType = TOS_SERIAL_UNKNOWN_ID;
+  uint8_t recvIndex = 0;
+
+  /* This component provides double buffering. */
+  message_t messages[2];     // buffer allocation
+  message_t* messagePtrs[2] = { &messages[0], &messages[1]};
+  
+  // We store a separate receiveBuffer variable because indexing
+  // into a pointer array can be costly, and handling interrupts
+  // is time critical.
+  uint8_t* receiveBuffer = (uint8_t*)(&messages[0]);
+
+  uint8_t *sendBuffer = NULL;
+  send_state_t sendState = SEND_STATE_IDLE;
+  uint8_t sendLen = 0;
+  uint8_t sendIndex = 0;
+  norace error_t sendError = SUCCESS;
+  bool sendCancelled = FALSE;
+  uint8_t sendId = 0;
+
+
+  uint8_t receiveTaskPending = FALSE;
+  uart_id_t receiveTaskType = 0;
+  uint8_t receiveTaskWhich;
+  message_t *receiveTaskBuf = NULL;
+  uint8_t receiveTaskSize = 0;
+
+  command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) {
+    if (sendState != SEND_STATE_IDLE) {
+      return EBUSY;
+    }
+
+    sendState = SEND_STATE_DATA;
+    sendId = id;
+    sendCancelled = FALSE;
+    atomic {
+      sendError = SUCCESS;
+      sendBuffer = (uint8_t*)msg;
+      sendIndex = call PacketInfo.offset[id]();
+      // sendLen is where in the buffer the packet stops.
+      // This is the length of the packet, plus its start point
+      sendLen = call PacketInfo.dataLinkLength[id](msg, len) + sendIndex;
+    }
+    if (call SendBytePacket.startSend(id) == SUCCESS) {
+      return SUCCESS;
+    }
+    else {
+      sendState = SEND_STATE_IDLE;
+      return FAIL;
+    }
+  }
+
+  command uint8_t Send.maxPayloadLength[uint8_t id]() {
+    return (sizeof(message_t));
+  }
+
+  command void* Send.getPayload[uint8_t id](message_t* m) {
+    return m;
+  }
+
+  command void* Receive.getPayload[uint8_t id](message_t* m, uint8_t* len) {
+    if (len != NULL) {
+      *len = 0;
+    }
+    return m;
+  }
+
+  command uint8_t Receive.payloadLength[uint8_t id](message_t* m) {
+    return 0;
+  }
+
+  task void signalSendDone(){
+    error_t error;
+
+    sendState = SEND_STATE_IDLE;
+    atomic error = sendError;
+
+    if (sendCancelled) error = ECANCEL;
+    signal Send.sendDone[sendId]((message_t *)sendBuffer, error);
+  }
+
+  command error_t Send.cancel[uint8_t id](message_t *msg){
+    if (sendState == SEND_STATE_DATA && sendBuffer == ((uint8_t *)msg) &&
+	id == sendId){
+      call SendBytePacket.completeSend();
+      sendCancelled = TRUE;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  async event uint8_t SendBytePacket.nextByte() {
+    uint8_t b;
+    uint8_t indx;
+    atomic {
+      b = sendBuffer[sendIndex];
+      sendIndex++;
+      indx = sendIndex;
+    }
+    if (indx > sendLen) {
+      call SendBytePacket.completeSend();
+      return 0;
+    }
+    else {
+      return b;
+    }
+  }
+  async event void SendBytePacket.sendCompleted(error_t error){
+    atomic sendError = error;
+    post signalSendDone();
+  }
+
+  bool isCurrentBufferLocked() {
+    return (receiveState.which)? receiveState.bufZeroLocked : receiveState.bufOneLocked;
+  }
+
+  void lockCurrentBuffer() {
+    if (receiveState.which) {
+      receiveState.bufOneLocked = 1;
+    }
+    else {
+      receiveState.bufZeroLocked = 1;
+    }
+  }
+
+  void unlockBuffer(uint8_t which) {
+    if (which) {
+      receiveState.bufOneLocked = 0;
+    }
+    else {
+      receiveState.bufZeroLocked = 0;
+    }
+  }
+  
+  void receiveBufferSwap() {
+    receiveState.which = (receiveState.which)? 0: 1;
+    receiveBuffer = (uint8_t*)(messagePtrs[receiveState.which]);
+  }
+  
+  async event error_t ReceiveBytePacket.startPacket() {
+    error_t result = SUCCESS;
+    atomic {
+      if (!isCurrentBufferLocked()) {
+        // We are implicitly in RECV_STATE_IDLE, as it is the only
+        // way our current buffer could be unlocked.
+        lockCurrentBuffer();
+        receiveState.state = RECV_STATE_BEGIN;
+        recvIndex = 0;
+        recvType = TOS_SERIAL_UNKNOWN_ID;
+      }
+      else {
+        result = EBUSY;
+      }
+    }
+    return result;
+  }
+
+  async event void ReceiveBytePacket.byteReceived(uint8_t b) {
+    atomic {
+      switch (receiveState.state) {
+      case RECV_STATE_BEGIN:
+        receiveState.state = RECV_STATE_DATA;
+        recvIndex = call PacketInfo.offset[b]();
+        recvType = b;
+        break;
+        
+      case RECV_STATE_DATA:
+        if (recvIndex < sizeof(message_t)) {
+          receiveBuffer[recvIndex] = b;
+          recvIndex++;
+        }
+        else {
+          // Drop extra bytes that do not fit in a message_t.
+          // We assume that either the higher layer knows what to
+          // do with partial packets, or performs sanity checks (e.g.,
+          // CRC).
+        }
+        break;
+        
+      case RECV_STATE_IDLE:
+      default:
+        // Do nothing. This case can be reached if the component
+        // does not have free buffers: it will ignore a packet start
+        // and stay in the IDLE state.
+      }
+    }
+  }
+  
+  task void receiveTask(){
+    uart_id_t myType;
+    message_t *myBuf;
+    uint8_t mySize;
+    uint8_t myWhich;
+    atomic {
+      myType = receiveTaskType;
+      myBuf = receiveTaskBuf;
+      mySize = receiveTaskSize;
+      myWhich = receiveTaskWhich;
+    }
+    mySize -= call PacketInfo.offset[myType]();
+    mySize = call PacketInfo.upperLength[myType](myBuf, mySize);
+    myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize);
+    atomic {
+      messagePtrs[myWhich] = myBuf;
+      unlockBuffer(myWhich);
+      receiveTaskPending = FALSE;
+    }
+  }
+
+  async event void ReceiveBytePacket.endPacket(error_t result) {
+    uint8_t postsignalreceive = FALSE;
+    atomic {
+      if (!receiveTaskPending && result == SUCCESS){
+        postsignalreceive = TRUE;
+        receiveTaskPending = TRUE;
+        receiveTaskType = recvType;
+        receiveTaskWhich = receiveState.which;
+        receiveTaskBuf = (message_t *)receiveBuffer;
+        receiveTaskSize = recvIndex;
+        receiveBufferSwap();
+        receiveState.state = RECV_STATE_IDLE;
+      }
+    }
+    if (postsignalreceive){
+      post receiveTask();
+    }    
+
+    // These are all local variables to release component state that
+    // will allow the component to start receiving serial packets
+    // ASAP.
+    //
+    // We need myWhich in case we happen to receive a whole new packet
+    // before the signal returns, at which point receiveState.which
+    // might revert back to us (via receiveBufferSwap()).
+    
+/*     uart_id_t myType;   // What is the type of the packet in flight?  */
+/*     uint8_t myWhich;  // Which buffer ptr entry is it? */
+/*     uint8_t mySize;   // How large is it? */
+/*     message_t* myBuf; // A pointer, for buffer swapping */
+
+    // First, copy out all of the important state so we can receive
+    // the next packet. Then do a receiveBufferSwap, which will
+    // tell the component to use the other available buffer.
+    // If the buffer is 
+/*     atomic { */
+/*       myType = recvType; */
+/*       myWhich = receiveState.which; */
+/*       myBuf = (message_t*)receiveBuffer; */
+/*       mySize = recvIndex; */
+/*       receiveBufferSwap(); */
+/*       receiveState.state = RECV_STATE_IDLE; */
+/*     } */
+
+/*     mySize -= call PacketInfo.offset[myType](); */
+/*     mySize = call PacketInfo.upperLength[myType](myBuf, mySize); */
+
+/*     if (result == SUCCESS){ */
+/*       // TODO is the payload the same as the message? */
+/*       myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize); */
+/*     } */
+/*     atomic { */
+/*       messagePtrs[myWhich] = myBuf; */
+/*       if (myWhich) { */
+/*         unlockBuffer(myWhich); */
+/*       } */
+/*     } */
+  }
+
+  default async command uint8_t PacketInfo.offset[uart_id_t id](){
+    return 0;
+  }
+  default async command uint8_t PacketInfo.dataLinkLength[uart_id_t id](message_t *msg,
+                                                          uint8_t upperLen){
+    return 0;
+  }
+  default async command uint8_t PacketInfo.upperLength[uart_id_t id](message_t *msg,
+                                                       uint8_t dataLinkLen){
+    return 0;
+  }
+
+
+  default event message_t *Receive.receive[uart_id_t idxxx](message_t *msg,
+                                                         void *payload,
+                                                         uint8_t len){
+    return msg;
+  }
+  default event void Send.sendDone[uart_id_t idxxx](message_t *msg, error_t error){
+    return;
+  }
+
+  
+}
diff --git a/tos/lib/serial/SerialFrameComm.nc b/tos/lib/serial/SerialFrameComm.nc
new file mode 100644
index 00000000..fe1fea00
--- /dev/null
+++ b/tos/lib/serial/SerialFrameComm.nc
@@ -0,0 +1,90 @@
+//$Id$
+
+/* "Copyright (c) 2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * This interface sits between a serial byte encoding component and a
+ * framing/packetizing component. It is to be used with framing protocols
+ * that place delimiters between frames. This interface separates the tasks
+ * of interpreting and coding delimiters and escape bytes from the rest of
+ * the wire protocol.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date   August 7 2005
+ */
+   
+interface SerialFrameComm {
+  /**
+   * Used by the upper layer to request that an interframe delimiter
+   * be sent. The lower layer is responsible for the determining the
+   * actual byte(s) that must be sent to delimit the frame.
+   * @return Returns a error_t code that indicates if the lower layer
+   * was able to put an interframe delimiter to serial (SUCCESS) or
+   * not (FAIL).
+   */
+  async command error_t putDelimiter();
+
+  /**
+   *  Used by the upper layer to request that a byte of data be sent
+   *  over serial.
+   *  @param data The byte to be sent
+   *  @return Returns an error_t code that indicates if the lower layer
+   *  has accepted the byte for sending (SUCCESS) or not (FAIL).
+   */
+  async command error_t putData(uint8_t data);
+
+  /**
+   * Requests that any underlying state associated with send-side frame
+   * delimiting or escaping be reset. Used to initialize the lower
+   * layer's send path and/or cancel a frame mid-transmission.
+   */
+  async command void resetSend();
+
+  /**
+   * Requests that any underlying state associated with receive-side
+   * frame or escaping be reset. Used to initialize the lower layer's
+   * receive path and/or cancel a frame mid-reception when sync is lost.
+   */
+  async command void resetReceive();
+
+  /**
+   * Signals the upper layer that an inter-frame delimiter has been 
+   * received from the serial connection.
+   */
+  async event void delimiterReceived();
+
+  /**
+   * Signals the upper layer that a byte of data has been received
+   * from the serial connection. It passes this byte as a function
+   * parameter.  
+   * @param data The byte of data that has been received
+   * from the serial connection
+   */  
+  async event void dataReceived(uint8_t data);
+
+  /**
+   * Split-phase event to signal when the lower layer has finished writing
+   * the last request (either putDelimiter or putData) to serial.
+   */
+  async event void putDone(); 
+}
diff --git a/tos/lib/serial/SerialP.nc b/tos/lib/serial/SerialP.nc
new file mode 100644
index 00000000..57f3df2c
--- /dev/null
+++ b/tos/lib/serial/SerialP.nc
@@ -0,0 +1,729 @@
+// $Id$
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author: Phil Buonadonna
+ * Revision: $Revision$
+ * 
+ */
+
+/*
+ * 
+ * This modules provides framing for TOS_Msgs using PPP-HDLC-like
+ * framing (see RFC 1662).  When sending, a TOS_Msg is encapsulated in
+ * an HDLC frame.  Receiving is similar EXCEPT that the component
+ * expects a special token byte be received before the data
+ * payload. The purpose of the token is to feed back an
+ * acknowledgement to the sender which serves as a crude form of
+ * flow-control.
+ *
+ * @author Phil Buonadonna
+ * @author Lewis Girod
+ * @author Ben Greenstein
+ * @date   August 7 2005
+ */
+
+
+#include "AM.h"
+#include "crc.h"
+
+module SerialP {
+
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface SendBytePacket;
+    interface ReceiveBytePacket;
+  }
+
+  uses {
+    interface SerialFrameComm;
+    interface Leds;
+    interface StdControl as SerialControl;
+  }
+}
+implementation {
+#define NO_TX_SEQNO
+
+  enum {
+    RX_DATA_BUFFER_SIZE = 2,
+    TX_DATA_BUFFER_SIZE = 4,
+    SERIAL_MTU = 255,
+    SERIAL_VERSION = 1,
+    ACK_QUEUE_SIZE = 5,
+  };
+
+  enum {
+    RXSTATE_NOSYNC,
+    RXSTATE_PROTO,
+    RXSTATE_TOKEN,
+    RXSTATE_INFO,
+    RXSTATE_INACTIVE
+  };
+
+  enum {
+    TXSTATE_IDLE,
+    TXSTATE_PROTO,
+    TXSTATE_SEQNO,
+    TXSTATE_INFO,
+    TXSTATE_FCS1,
+    TXSTATE_FCS2,
+    TXSTATE_ENDFLAG,
+    TXSTATE_ENDWAIT,
+    TXSTATE_FINISH,
+    TXSTATE_ERROR,
+    TXSTATE_INACTIVE
+  };
+
+  typedef enum {
+    BUFFER_AVAILABLE,
+    BUFFER_FILLING,
+    BUFFER_COMPLETE,
+  } tx_data_buffer_states_t;
+
+  enum {
+    TX_ACK_INDEX = 0,
+    TX_DATA_INDEX = 1,
+    TX_BUFFER_COUNT = 2,
+  };
+
+
+  typedef struct {
+    uint8_t writePtr;
+    uint8_t readPtr;
+    uint8_t buf[RX_DATA_BUFFER_SIZE+1]; // one wasted byte: writePtr == readPtr means empty
+  } rx_buf_t;
+
+  typedef struct {
+    uint8_t state;
+    uint8_t buf;    
+  } tx_buf_t;
+  
+  typedef struct {
+    uint8_t writePtr;
+    uint8_t readPtr;
+    uint8_t buf[ACK_QUEUE_SIZE+1]; // one wasted byte: writePtr == readPtr means empty    
+  } ack_queue_t;
+
+  /* Buffers */
+
+  rx_buf_t rxBuf;
+  tx_buf_t txBuf[TX_BUFFER_COUNT];
+
+  /* Receive State */
+
+  uint8_t  rxState;
+  uint8_t  rxByteCnt;
+  uint8_t  rxProto;
+  uint8_t  rxSeqno;
+  uint16_t rxCRC;
+
+  /* Transmit State */
+
+  norace uint8_t  txState;
+  norace uint8_t  txByteCnt;
+  norace uint8_t  txProto;
+  norace uint8_t  txSeqno;
+  norace uint16_t txCRC;
+  uint8_t  txPending;
+  norace uint8_t txIndex;
+  
+  /* Ack Queue */
+  ack_queue_t ackQ;
+
+  /* stats */
+  radio_stats_t stats;
+
+  bool offPending = FALSE;
+
+  // Prototypes
+
+  inline void txInit();
+  inline void rxInit();
+  inline void ackInit();
+  inline void statsInit();
+
+  inline bool ack_queue_is_full(); 
+  inline bool ack_queue_is_empty(); 
+  inline void ack_queue_push(uint8_t token);
+  inline uint8_t ack_queue_top();
+  uint8_t ack_queue_pop();
+
+  inline void rx_buffer_init();
+  inline bool rx_buffer_is_full();
+  inline bool rx_buffer_is_empty();
+  inline void rx_buffer_push(uint8_t data);
+  inline uint8_t rx_buffer_top();
+  inline uint8_t rx_buffer_pop();
+  inline uint16_t rx_current_crc();
+
+  void rx_state_machine(bool isDelimeter, uint8_t data);
+  void MaybeScheduleTx();
+  task void RunTx();
+  
+
+
+  inline void txInit(){
+    uint8_t i;
+    atomic for (i = 0; i < TX_BUFFER_COUNT; i++) txBuf[i].state = BUFFER_AVAILABLE;
+    txState = TXSTATE_IDLE;
+    txByteCnt = 0;
+    txProto = 0;
+    txSeqno = 0;
+    txCRC = 0; 
+    txPending = FALSE;
+    txIndex = 0;
+  }
+
+  inline void rxInit(){
+    rxBuf.writePtr = rxBuf.readPtr = 0;
+    rxState = RXSTATE_NOSYNC;
+    rxByteCnt = 0;
+    rxProto = 0;
+    rxSeqno = 0;
+    rxCRC = 0;
+  }
+
+  inline void ackInit(){
+    ackQ.writePtr = ackQ.readPtr = 0;
+  }
+
+  inline void statsInit(){
+    memset(&stats, 0, sizeof(stats));
+    stats.platform = 0; // TODO: set platform
+    stats.MTU = SERIAL_MTU;
+    stats.version = SERIAL_VERSION;
+  }
+  
+  command error_t Init.init() {
+
+    txInit();
+    rxInit();
+    ackInit();
+    statsInit();
+
+    return SUCCESS;
+  }
+
+
+  /*
+   *  buffer and queue manipulation
+   */
+
+  inline bool ack_queue_is_full(){ 
+    uint8_t tmp, tmp2;
+    atomic {
+      tmp = ackQ.writePtr;
+      tmp2 = ackQ.readPtr;
+    }
+    if (++tmp > ACK_QUEUE_SIZE) tmp = 0;
+    return (tmp == tmp2);
+  }
+
+  inline bool ack_queue_is_empty(){
+    bool ret;
+    atomic ret = (ackQ.writePtr == ackQ.readPtr); 
+    return ret;
+  }
+
+  inline void ack_queue_push(uint8_t token) {
+    if (!ack_queue_is_full()){
+      atomic {
+        ackQ.buf[ackQ.writePtr] = token;
+        if (++ackQ.writePtr > ACK_QUEUE_SIZE) ackQ.writePtr = 0;
+      }
+      MaybeScheduleTx();
+    }
+  }
+
+  inline uint8_t ack_queue_top() {
+    uint8_t tmp = 0;
+    atomic {
+      if (!ack_queue_is_empty()){
+        tmp =  ackQ.buf[ackQ.readPtr];
+      }
+    }
+    return tmp;
+  }
+
+  uint8_t ack_queue_pop() {
+    uint8_t retval = 0;
+    atomic {
+      if (ackQ.writePtr != ackQ.readPtr){
+        retval =  ackQ.buf[ackQ.readPtr];
+        if (++(ackQ.readPtr) > ACK_QUEUE_SIZE) ackQ.readPtr = 0;
+      }
+    }
+    return retval;
+  }
+
+
+  /* 
+   * Buffer Manipulation
+   */
+
+  inline void rx_buffer_init(){
+    rxBuf.writePtr = rxBuf.readPtr = 0;
+  }
+  inline bool rx_buffer_is_full() {
+    uint8_t tmp = rxBuf.writePtr;
+    if (++tmp > RX_DATA_BUFFER_SIZE) tmp = 0;
+    return (tmp == rxBuf.readPtr);
+  }
+  inline bool rx_buffer_is_empty(){
+    return (rxBuf.readPtr == rxBuf.writePtr);
+  }
+  inline void rx_buffer_push(uint8_t data){
+    rxBuf.buf[rxBuf.writePtr] = data;
+    if (++(rxBuf.writePtr) > RX_DATA_BUFFER_SIZE) rxBuf.writePtr = 0;
+  }
+  inline uint8_t rx_buffer_top(){
+    uint8_t tmp = rxBuf.buf[rxBuf.readPtr];
+    return tmp;
+  }
+  inline uint8_t rx_buffer_pop(){
+    uint8_t tmp = rxBuf.buf[rxBuf.readPtr];
+    if (++(rxBuf.readPtr) > RX_DATA_BUFFER_SIZE) rxBuf.readPtr = 0;
+    return tmp;
+  }
+  
+  inline uint16_t rx_current_crc(){
+    uint16_t crc;
+    uint8_t tmp = rxBuf.writePtr;
+    tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1);
+    crc = rxBuf.buf[tmp] & 0x00ff;
+    crc = (crc << 8) & 0xFF00;
+    tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1);
+    crc |= (rxBuf.buf[tmp] & 0x00FF);
+    return crc;
+  }
+
+  task void startDoneTask() {
+    call SerialControl.start();
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  task void stopDoneTask() {
+    call SerialControl.stop();
+    signal SplitControl.stopDone(SUCCESS);
+  }
+  
+  command error_t SplitControl.start() {
+    post startDoneTask();
+    return SUCCESS;
+  }
+
+  void testOff() {
+    bool turnOff = FALSE;
+    atomic {
+      if (txState == TXSTATE_INACTIVE &&
+	  rxState == RXSTATE_INACTIVE) {
+	turnOff = TRUE;
+      }
+    }
+    if (turnOff) {
+      post stopDoneTask();
+      atomic offPending = FALSE;
+    }
+    else {
+      atomic offPending = TRUE;
+    }
+  }
+    
+  command error_t SplitControl.stop() {
+    atomic {
+      if (rxState == RXSTATE_NOSYNC) {
+	rxState = RXSTATE_INACTIVE;
+      }
+    }
+    atomic {
+      if (txState == TXSTATE_IDLE) {
+	txState = TXSTATE_INACTIVE;
+      }
+    }
+    testOff();
+    return SUCCESS;
+  }
+
+  /*
+   *  Receive Path
+   */ 
+  
+  
+  async event void SerialFrameComm.delimiterReceived(){
+    rx_state_machine(TRUE,0);
+  }
+  async event void SerialFrameComm.dataReceived(uint8_t data){
+    rx_state_machine(FALSE,data);
+  }
+
+  bool valid_rx_proto(uint8_t proto){
+    switch (proto){
+    case SERIAL_PROTO_PACKET_ACK: 
+      return TRUE;
+    case SERIAL_PROTO_ACK:
+    case SERIAL_PROTO_PACKET_NOACK:
+    default: 
+      return FALSE;
+    }
+  }
+
+  void rx_state_machine(bool isDelimeter, uint8_t data){
+
+    switch (rxState) {
+      
+    case RXSTATE_NOSYNC: 
+      if (isDelimeter) {
+        rxInit();
+        rxState = RXSTATE_PROTO;
+      }
+      break;
+      
+    case RXSTATE_PROTO:
+      if (!isDelimeter){
+        rxCRC = crcByte(rxCRC,data);
+        rxState = RXSTATE_TOKEN;
+        rxProto = data;
+        if (!valid_rx_proto(rxProto))
+          goto nosync;
+        // only supports serial proto packet ack
+        if (rxProto != SERIAL_PROTO_PACKET_ACK){
+          goto nosync;
+        }
+        if (signal ReceiveBytePacket.startPacket() != SUCCESS){
+          goto nosync;
+        }
+      }      
+      break;
+      
+    case RXSTATE_TOKEN:
+      if (isDelimeter) {
+        stats.serial_short_packets++;
+        goto nosync;
+      }
+      else {
+        rxSeqno = data;
+        rxCRC = crcByte(rxCRC,rxSeqno);
+        rxState = RXSTATE_INFO;
+      }
+      break;
+      
+    case RXSTATE_INFO:
+      if (rxByteCnt < SERIAL_MTU){ 
+        if (isDelimeter) { /* handle end of frame */
+          if (rxByteCnt >= 2) {
+            if (rx_current_crc() == rxCRC) {
+              signal ReceiveBytePacket.endPacket(SUCCESS);
+              ack_queue_push(rxSeqno);
+              goto nosync;
+            }
+            else {
+              stats.serial_crc_fail++;
+              goto nosync;
+            }
+          }
+          else {
+            stats.serial_short_packets++;
+            goto nosync;
+          }
+	}
+        else { /* handle new bytes to save */
+          if (rxByteCnt >= 2){ 
+            signal ReceiveBytePacket.byteReceived(rx_buffer_top());
+            rxCRC = crcByte(rxCRC,rx_buffer_pop());
+          }
+	  rx_buffer_push(data);
+          rxByteCnt++;
+        }
+      }
+      
+      /* no valid message.. */
+      else {
+        stats.serial_proto_drops++;
+        goto nosync;
+       }
+      break;
+      
+    default:      
+      goto nosync;
+    }
+    goto done;
+
+  nosync:
+    /* reset all counters, etc */
+    rxInit();
+    call SerialFrameComm.resetReceive();
+    signal ReceiveBytePacket.endPacket(FAIL);
+    if (offPending) {
+      rxState = RXSTATE_INACTIVE;
+      testOff();
+    }
+    /* if this was a flag, start in proto state.. */
+    else if (isDelimeter) {
+      rxState = RXSTATE_PROTO;
+    }
+    
+  done:
+  }
+
+  
+  /*
+   *  Send Path
+   */ 
+
+
+  void MaybeScheduleTx() {
+    atomic {
+      if (txPending == 0) {
+        if (post RunTx() == SUCCESS) {
+          txPending = 1;
+        }
+      }
+    }
+  }
+
+
+  async command error_t SendBytePacket.completeSend(){
+    bool ret = FAIL;
+    atomic {
+        txBuf[TX_DATA_INDEX].state = BUFFER_COMPLETE;
+        ret = SUCCESS;
+    }
+    return ret;
+  }
+
+  async command error_t SendBytePacket.startSend(uint8_t b){
+    bool not_busy = FALSE;
+    atomic {
+      if (txBuf[TX_DATA_INDEX].state == BUFFER_AVAILABLE){
+        txBuf[TX_DATA_INDEX].state = BUFFER_FILLING;
+        txBuf[TX_DATA_INDEX].buf = b;
+        not_busy = TRUE;
+      }
+    }
+    if (not_busy) {
+      MaybeScheduleTx();
+      return SUCCESS;
+    }
+    return EBUSY;
+
+  }
+  
+  task void RunTx() {
+    uint8_t idle;
+    uint8_t done;
+    uint8_t fail;
+    
+    /*
+      the following trigger MaybeScheduleTx, which starts at most one RunTx:
+      1) adding an ack to the ack queue (ack_queue_push())
+      2) starting to send a packet (SendBytePacket.startSend())
+      3) failure to send start delimiter in RunTx
+      4) putDone: 
+    */
+    
+    error_t result = SUCCESS;
+    bool send_completed = FALSE;
+    bool start_it = FALSE;
+    
+    atomic { 
+      txPending = 0;
+      idle = (txState == TXSTATE_IDLE);
+      done = (txState == TXSTATE_FINISH);
+      fail = (txState == TXSTATE_ERROR);
+      if (done || fail){ 
+        txState = TXSTATE_IDLE;
+        txBuf[txIndex].state = BUFFER_AVAILABLE;
+      }
+    }
+    
+    /* if done, call the send done */
+    if (done || fail) {
+      if (fail) atomic stats.serial_tx_fail++;
+      txSeqno++;
+      if (txProto == SERIAL_PROTO_ACK){
+        ack_queue_pop();
+      }
+      else {
+        result = done ? SUCCESS : FAIL;
+        send_completed = TRUE;
+      }
+      idle = TRUE;
+    }
+    
+    /* if idle, set up next packet to TX */ 
+    if (idle) {
+      bool goInactive;
+      atomic goInactive = offPending;
+      if (goInactive) {
+        atomic txState = TXSTATE_INACTIVE;
+      }
+      else {
+        /* acks are top priority */
+        uint8_t myAckState;
+        uint8_t myDataState;
+        atomic {
+          myAckState = txBuf[TX_ACK_INDEX].state;
+          myDataState = txBuf[TX_DATA_INDEX].state;
+        }
+        if (!ack_queue_is_empty() && myAckState == BUFFER_AVAILABLE) {
+          atomic {
+            txBuf[TX_ACK_INDEX].state = BUFFER_COMPLETE;
+            txBuf[TX_ACK_INDEX].buf = ack_queue_top();
+          }
+          txProto = SERIAL_PROTO_ACK;
+          txIndex = TX_ACK_INDEX;
+          start_it = TRUE;
+        }
+        else if (myDataState == BUFFER_FILLING || myDataState == BUFFER_COMPLETE){
+          txProto = SERIAL_PROTO_PACKET_NOACK;
+          txIndex = TX_DATA_INDEX;
+          start_it = TRUE;
+        }
+        else {
+          /* nothing to send now.. */
+        }
+      }
+    }
+    else {
+      /* we're in the middle of transmitting */
+    }
+    
+    if (send_completed){
+      signal SendBytePacket.sendCompleted(result);
+    }
+    
+    if (txState == TXSTATE_INACTIVE) {
+      testOff();
+      return;
+    }
+    
+    if (start_it){
+      /* OK, start transmitting ! */
+      atomic { 
+        txCRC = 0;
+        txByteCnt = 0;
+        txState = TXSTATE_PROTO; 
+      }
+      if (call SerialFrameComm.putDelimiter() != SUCCESS) {
+        atomic txState = TXSTATE_ERROR; 
+        MaybeScheduleTx();
+      }
+    }
+    
+  }
+  
+  async event void SerialFrameComm.putDone() {
+    {
+      error_t txResult = SUCCESS;
+      
+      switch (txState) {
+        
+      case TXSTATE_PROTO:
+
+         txResult = call SerialFrameComm.putData(txProto);
+#ifdef NO_TX_SEQNO
+        txState = TXSTATE_INFO;
+#else
+        txState = TXSTATE_SEQNO;
+#endif
+        txCRC = crcByte(txCRC,txProto);
+        break;
+        
+      case TXSTATE_SEQNO:
+        txResult = call SerialFrameComm.putData(txSeqno);
+        txState = TXSTATE_INFO;
+        txCRC = crcByte(txCRC,txSeqno);
+        break;
+        
+      case TXSTATE_INFO:
+        atomic {
+          txResult = call SerialFrameComm.putData(txBuf[txIndex].buf);
+          txCRC = crcByte(txCRC,txBuf[txIndex].buf);
+          ++txByteCnt;
+          
+          if (txIndex == TX_DATA_INDEX){
+            uint8_t nextByte;
+            nextByte = signal SendBytePacket.nextByte();
+            if (txBuf[txIndex].state == BUFFER_COMPLETE || txByteCnt >= SERIAL_MTU){
+              txState = TXSTATE_FCS1;
+            }
+            else { /* never called on ack b/c ack is BUFFER_COMPLETE initially */
+              txBuf[txIndex].buf = nextByte;
+            }
+          }
+          else { // TX_ACK_INDEX
+            txState = TXSTATE_FCS1;
+          }
+        }
+        break;
+        
+      case TXSTATE_FCS1:
+        txResult = call SerialFrameComm.putData(txCRC & 0xff);
+        txState = TXSTATE_FCS2;
+        break;
+        
+      case TXSTATE_FCS2:
+        txResult = call SerialFrameComm.putData((txCRC >> 8) & 0xff);
+        txState = TXSTATE_ENDFLAG;
+        break;
+        
+      case TXSTATE_ENDFLAG:
+        txResult = call SerialFrameComm.putDelimiter();
+        txState = TXSTATE_ENDWAIT;
+        break;
+        
+      case TXSTATE_ENDWAIT:
+        txState = TXSTATE_FINISH;
+      case TXSTATE_FINISH:
+        MaybeScheduleTx();
+        break;
+      case TXSTATE_ERROR:
+      default:
+        txResult = FAIL; 
+        break;
+      }
+      
+      if (txResult != SUCCESS) {
+        txState = TXSTATE_ERROR;
+        MaybeScheduleTx();
+      }
+    }
+  }
+
+  
+ default event void SplitControl.startDone(error_t err) {}
+ default event void SplitControl.stopDone(error_t err) {}
+}
diff --git a/tos/lib/serial/SerialPacketInfo.nc b/tos/lib/serial/SerialPacketInfo.nc
new file mode 100644
index 00000000..c0b4319c
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfo.nc
@@ -0,0 +1,32 @@
+/**
+ * Accessor methods used by a serial dispatcher to communicate with various
+ * message_t link formats over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ */
+
+interface SerialPacketInfo {
+  /**
+   * Get the offset into a message_t where the header information begins.
+   * @return Returns the offset.
+   */
+  async command uint8_t offset();
+  /**
+   * Get the size of the datalink packet embedded in the message_t, in bytes. 
+   * This is the sum of the payload (upperLen) and the size of the link header.
+   * @param msg A pointer to the message_t to interrogate. (unused)
+   * @param upperLen The size of the payload.
+   * @return Returns the size of the datalink packet.
+   */
+  async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+  /**
+   * Get the size of the payload (in bytes) given the size of the datalink
+   * packet (dataLinkLen) embedded in the message_t.
+   * @param msg A pointer to the message_t to interrogate. (unused)
+   * @param dataLinkLength The size of the datalink packet.
+   * @return Returns the size of the payload.
+   */
+  async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+}
diff --git a/tos/lib/serial/SerialPacketInfo802_15_4P.nc b/tos/lib/serial/SerialPacketInfo802_15_4P.nc
new file mode 100644
index 00000000..ead437a6
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfo802_15_4P.nc
@@ -0,0 +1,47 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of the metdata necessary for a dispatcher to
+ * communicate 802.15.4 message_t packets over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "802_15_4.h"
+module SerialPacketInfo802_15_4P {
+  provides interface SerialPacketInfo as Info;
+}
+implementation {
+  async command uint8_t Info.offset() {
+    return sizeof(TOSRadioHeader) - sizeof(TOS802Header);
+  }
+  async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) {
+    return upperLen + sizeof(TOS802Header) + sizeof(TOS802Footer);
+  }
+  async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) {
+    return dataLinkLen - (sizeof(TOS802Header) + sizeof(TOS802Footer));
+  }
+}
diff --git a/tos/lib/serial/SerialPacketInfoActiveMessageP.nc b/tos/lib/serial/SerialPacketInfoActiveMessageP.nc
new file mode 100644
index 00000000..32d383e6
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfoActiveMessageP.nc
@@ -0,0 +1,50 @@
+//$Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of the metadata neccessary for a dispatcher to
+ * communicate with basic active messages packets over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+
+module SerialPacketInfoActiveMessageP {
+  provides interface SerialPacketInfo as Info;
+}
+implementation {
+
+  async command uint8_t Info.offset() {
+    return (uint8_t)(sizeof(message_header_t) - sizeof(serial_header_t));
+  }
+  async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) {
+    return upperLen + sizeof(serial_header_t);
+  }
+  async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) {
+    return dataLinkLen - sizeof(serial_header_t);
+  }
+}
+
diff --git a/tos/lib/serial/SerialQueueP.nc b/tos/lib/serial/SerialQueueP.nc
new file mode 100644
index 00000000..831022f4
--- /dev/null
+++ b/tos/lib/serial/SerialQueueP.nc
@@ -0,0 +1,51 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The fair-share AM send queue.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "Serial.h"
+
+configuration SerialQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> SerialActiveMessageC;
+  AMQueueImplP.AMPacket -> SerialActiveMessageC;
+  AMQueueImplP.Packet -> SerialActiveMessageC;
+  
+}
+
diff --git a/tos/lib/timer/Alarm.nc b/tos/lib/timer/Alarm.nc
new file mode 100644
index 00000000..93ef1f95
--- /dev/null
+++ b/tos/lib/timer/Alarm.nc
@@ -0,0 +1,107 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * An Alarm is a low-level interface intended for precise timing.
+ *
+ * 
    An Alarm is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * 
    An Alarm's second parameter is its "width", i.e., the number of
+ * bits used to represent time values. Width is indicated by including
+ * the appropriate size integer type as an Alarm parameter.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Alarm.
+ * @param size_type An integer type representing time values for this Alarm.
+ *
+ * @author Cory Sharp 
+ */
+
+interface Alarm
+{
+  // basic interface
+  /**
+   * Set a single-short alarm to some time units in the future. Replaces
+   * any current alarm time. Equivalent to start(getNow(), dt). The
+   * fired will be signaled when the alarm expires.
+   *
+   * @param dt Time until the alarm fires.
+   */
+  async command void start(size_type dt);
+
+  /**
+   * Cancel an alarm. Note that the fired event may have
+   * already been signaled (even if your code has not yet started
+   * executing).
+   */
+  async command void stop();
+
+  /**
+   * Signaled when the alarm expires.
+   */
+  async event void fired();
+
+  // extended interface
+  /**
+   * Check if alarm is running. Note that a FALSE return does not indicate
+   * that the fired event will not be signaled (it may have
+   * already started executing, but not reached your code yet).
+   *
+   * @return TRUE if the alarm is still running.
+   */
+  async command bool isRunning();
+
+  /**
+   * Set a single-short alarm to time t0+dt. Replaces any current alarm
+   * time. The fired will be signaled when the alarm expires.
+   * Alarms set in the past will fire "soon".
+   * 
+   * 
    Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the getNow's result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for alarm.
+   * @param dt Alarm time as offset from t0.
+   */
+  async command void startAt(size_type t0, size_type dt);
+
+  /**
+   * Return the current time.
+   * @return Current time.
+   */
+  async command size_type getNow();
+
+  /**
+   * Return the time the currently running alarm will fire or the time that
+   * the previously running alarm was set to fire.
+   * @return Alarm time.
+   */
+  async command size_type getAlarm();
+}
+
diff --git a/tos/lib/timer/AlarmToTimerC.nc b/tos/lib/timer/AlarmToTimerC.nc
new file mode 100644
index 00000000..a4b6fe33
--- /dev/null
+++ b/tos/lib/timer/AlarmToTimerC.nc
@@ -0,0 +1,96 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * AlarmToTimerC converts a 32-bit Alarm to a Timer.  
+ *
+ * 
    See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the Alarm and
+ * Timer being converted.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module AlarmToTimerC(typedef precision_tag)
+{
+  provides interface Timer;
+  uses interface Alarm;
+}
+implementation
+{
+  // there might be ways to save bytes here, but I'll do it in the obviously
+  // right way for now
+  uint32_t m_t0;
+  uint32_t m_dt;
+  bool m_oneshot;
+
+  void start(uint32_t t0, uint32_t dt, bool oneshot)
+  {
+    m_t0 = t0;
+    m_dt = dt;
+    m_oneshot = oneshot;
+    call Alarm.startAt(t0, dt);
+  }
+
+  command void Timer.startPeriodic(uint32_t dt)
+  { start(call Alarm.getNow(), dt, FALSE); }
+
+  command void Timer.startOneShot(uint32_t dt)
+  { start(call Alarm.getNow(), dt, TRUE); }
+
+  command void Timer.stop()
+  { call Alarm.stop(); }
+
+  task void fired()
+  { 
+    if(m_oneshot == FALSE)
+      start(call Alarm.getAlarm(), m_dt, FALSE);
+    signal Timer.fired();
+  }
+
+  async event void Alarm.fired()
+  { post fired(); }
+
+  command bool Timer.isRunning()
+  { return call Alarm.isRunning(); }
+
+  command bool Timer.isOneShot()
+  { return m_oneshot; }
+
+  command void Timer.startPeriodicAt(uint32_t t0, uint32_t dt)
+  { start(t0, dt, FALSE); }
+
+  command void Timer.startOneShotAt(uint32_t t0, uint32_t dt)
+  { start(t0, dt, TRUE); }
+
+  command uint32_t Timer.getNow()
+  { return call Alarm.getNow(); }
+
+  command uint32_t Timer.gett0()
+  { return m_t0; }
+
+  command uint32_t Timer.getdt()
+  { return m_dt; }
+}
+
diff --git a/tos/lib/timer/BusyWait.nc b/tos/lib/timer/BusyWait.nc
new file mode 100644
index 00000000..5751a934
--- /dev/null
+++ b/tos/lib/timer/BusyWait.nc
@@ -0,0 +1,57 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * BusyWait is a low-level interface intended for busy waiting for short
+ * durations.
+ *
+ * 
    BusyWait is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * 
    BusyWait's second parameter is its "width", i.e., the number of bits
+ * used to represent time values. Width is indicated by including the
+ * appropriate size integer type as a BusyWait parameter.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this BusyWait
+ *   interface.
+ * @param size_type An integer type representing time values for this 
+ *   BusyWait interface.
+ *
+ * @author Cory Sharp 
+ */
+
+interface BusyWait
+{
+  /**
+   * Busy wait for (at least) dt time units. Use sparingly, when the
+   * cost of using an Alarm or Timer would be too high.
+   * @param dt Time to busy wait for.
+   */
+  async command void wait(size_type dt);
+}
+
diff --git a/tos/lib/timer/BusyWaitCounterC.nc b/tos/lib/timer/BusyWaitCounterC.nc
new file mode 100644
index 00000000..ab2b718d
--- /dev/null
+++ b/tos/lib/timer/BusyWaitCounterC.nc
@@ -0,0 +1,76 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * BusyWaitCounterC uses a Counter to implement the BusyWait interface
+ * (block until a specified amount of time elapses). See TEP102 for more
+ * details.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of the BusyWait
+ *   interface.
+ * @param size_type An integer type representing time values for the
+ *   BusyWait interface.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module BusyWaitCounterC(typedef precision_tag, typedef size_type @integer())
+{
+  provides interface BusyWait;
+  uses interface Counter;
+}
+implementation
+{
+  enum
+  {
+    HALF_MAX_SIZE_TYPE = ((size_type)1) << (8*sizeof(size_type)-1),
+  };
+
+  async command void BusyWait.wait(size_type dt)
+  {
+    atomic
+    {
+      // comparisons are <= to guarantee a wait at least as long as dt
+
+      size_type t0 = call Counter.get();
+
+      if(dt > HALF_MAX_SIZE_TYPE)
+      {
+        dt -= HALF_MAX_SIZE_TYPE;
+        while((call Counter.get() - t0) <= dt);
+        t0 += dt;
+        dt = HALF_MAX_SIZE_TYPE;
+      }
+
+      while((call Counter.get() - t0) <= dt);
+    }
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/Counter.nc b/tos/lib/timer/Counter.nc
new file mode 100644
index 00000000..583dc382
--- /dev/null
+++ b/tos/lib/timer/Counter.nc
@@ -0,0 +1,73 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * A Counter counts time in some units and in some width, signaling
+ * overflow.
+ *
+ * 
    A Counter is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * 
    A Counter's second parameter is its "width", i.e., the number of
+ * bits used to represent time values. Width is indicated by including
+ * the appropriate size integer type as a Counter parameter.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ * @param size_type An integer type representing time values for this Counter.
+ *
+ * @author Cory Sharp 
+ */
+
+interface Counter
+{
+  /** 
+   * Return counter value. Counters start at boot - some time sources may
+   * stop counting while the processor is in low-power mode.
+   * @return Current counter value.
+   */
+  async command size_type get();
+
+  /** 
+   * Return TRUE if an overflow event will occur after the outermost atomic
+   * block is exits.  FALSE otherwise.
+   * @return Counter pending overflow status.
+   */
+  async command bool isOverflowPending();
+
+  /**
+   * Cancel a pending overflow interrupt.
+   */
+  async command void clearOverflow();
+
+  /**
+   * Signals that the current time has overflowed.  That is, the current
+   * time has wrapped around from its maximum value to zero.
+   */ 
+  async event void overflow();
+}
+
diff --git a/tos/lib/timer/CounterToLocalTimeC.nc b/tos/lib/timer/CounterToLocalTimeC.nc
new file mode 100644
index 00000000..07dc6e35
--- /dev/null
+++ b/tos/lib/timer/CounterToLocalTimeC.nc
@@ -0,0 +1,51 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter.  
+ *
+ * 
    See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the LocalTime and
+ * Counter being converted.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module CounterToLocalTimeC(typedef precision_tag)
+{
+  provides interface LocalTime;
+  uses interface Counter;
+}
+implementation
+{
+  async command uint32_t LocalTime.get()
+  {
+    return call Counter.get();
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/LocalTime.nc b/tos/lib/timer/LocalTime.nc
new file mode 100644
index 00000000..6645e9f0
--- /dev/null
+++ b/tos/lib/timer/LocalTime.nc
@@ -0,0 +1,52 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * A LocalTime interface counts time in some units. If you need to detect
+ * time overflow, you should use a component offering the Counter
+ * interface.
+ *
+ * 
    The LocalTime interface is parameterised by its "precision"
+ * (milliseconds, microseconds, etc), identified by a type. This prevents,
+ * e.g., unintentionally mixing components expecting milliseconds with
+ * those expecting microseconds as those interfaces have a different type.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ *
+ * @author Cory Sharp 
+ */
+
+interface LocalTime
+{
+  /** 
+   * Return current time. Time starts counting at boot - some time sources
+   * may stop counting while the processor is in low-power mode.
+   *
+   * @return Current time.
+   */
+  async command uint32_t get();
+}
+
diff --git a/tos/lib/timer/Timer.h b/tos/lib/timer/Timer.h
new file mode 100644
index 00000000..0cc6d794
--- /dev/null
+++ b/tos/lib/timer/Timer.h
@@ -0,0 +1,38 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+// The TinyOS Timer structures are discussed in TEP 102.
+#ifndef TIMER_H
+#define TIMER_H
+
+typedef struct { } TMilli;
+typedef struct { } T32khz;
+typedef struct { } TMicro;
+
+#define UQ_TIMER_MILLI "HilTimerMilliC.Timer"
+#define UQ_TIMER_32KHZ "HilTimer32khzC.Timer"
+#define UQ_TIMER_MICRO "HilTimerMicroC.Timer"
+
+#endif
+
diff --git a/tos/lib/timer/Timer.nc b/tos/lib/timer/Timer.nc
new file mode 100644
index 00000000..e1e16962
--- /dev/null
+++ b/tos/lib/timer/Timer.nc
@@ -0,0 +1,142 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+#include "Timer.h"
+
+/**
+ * A Timer is TinyOS's general purpose timing interface. For more precise
+ * timing, you may wish to use a (platform-specific) component offering
+ * an Alarm interface.
+ *
+ * 
    A Timer is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Alarm.
+ *
+ * @author Cory Sharp 
+ */
+
+interface Timer
+{
+  // basic interface 
+  /**
+   * Set a periodic timer to repeat every dt time units. Replaces any
+   * current timer settings. Equivalent to startPeriodicAt(getNow(),
+   * dt). The fired will be signaled every dt units (first
+   * event in dt units).
+   *
+   * @param dt Time until the timer fires.
+   */
+  command void startPeriodic(uint32_t dt);
+
+  /**
+   * Set a single-short timer to some time units in the future. Replaces
+   * any current timer settings. Equivalent to startOneShotAt(getNow(),
+   * dt). The fired will be signaled when the timer expires.
+   *
+   * @param dt Time until the timer fires.
+   */
+  command void startOneShot(uint32_t dt);
+
+  /**
+   * Cancel a timer.
+   */
+  command void stop();
+
+  /**
+   * Signaled when the timer expires (one-shot) or repeats (periodic).
+   */
+  event void fired();
+
+  // extended interface
+  /**
+   * Check if timer is running. Periodic timers run until stopped or
+   * replaced, one-shot timers run until their deadline expires.
+   *
+   * @return TRUE if the timer is still running.
+   */
+  command bool isRunning();
+
+  /**
+   * Check if this is a one-shot timer.
+   * @return TRUE for one-shot timers, FALSE for periodic timers.
+   */
+  command bool isOneShot();
+
+  /**
+   * Set a periodic timer to repeat every dt time units. Replaces any
+   * current timer settings. The fired will be signaled every
+   * dt units (first event at t0+dt units). Periodic timers set in the past
+   * will get a bunch of events in succession, until the timer "catches up".
+   *
+   * 
    Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the getNow's result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for timer.
+   * @param dt Time until the timer fires.
+   */
+  command void startPeriodicAt(uint32_t t0, uint32_t dt);
+
+  /**
+   * Set a single-short timer to time t0+dt. Replaces any current timer
+   * settings. The fired will be signaled when the timer
+   * expires. Timers set in the past will fire "soon".
+   *
+   * 
    Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the getNow's result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for timer.
+   * @param dt Time until the timer fires.
+   */
+  command void startOneShotAt(uint32_t t0, uint32_t dt);
+
+
+  /**
+   * Return the current time.
+   * @return Current time.
+   */
+  command uint32_t getNow();
+
+  /**
+   * Return the time anchor for the previously started timer or the time of
+   * the previous event for periodic timers. The next fired event will occur
+   * at gett0() + getdt().
+   * @return Timer's base time.
+   */
+  command uint32_t gett0();
+
+  /**
+   * Return the delay or period for the previously started timer. The next
+   * fired event will occur at gett0() + getdt().
+   * @return Timer's interval.
+   */
+  command uint32_t getdt();
+}
+
diff --git a/tos/lib/timer/TransformAlarmC.nc b/tos/lib/timer/TransformAlarmC.nc
new file mode 100644
index 00000000..0915ff38
--- /dev/null
+++ b/tos/lib/timer/TransformAlarmC.nc
@@ -0,0 +1,173 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * TransformAlarmC decreases precision and/or widens an Alarm.  An already
+ * widened Counter component is used to help.
+ *
+ * 
    See TEP102 for more details.
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   Alarm.
+ * @param to_size_type The type for the width of the transformed Alarm.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   Alarm.
+ * @param from_size_type The type for the width of the original Alarm.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   bit_shift_right larger than transformed time units.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module TransformAlarmC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right)
+{
+  /**
+   * The transformed Alarm.
+   */
+  provides interface Alarm;
+
+  /**
+   * Users of this component must wire Counter to an already-widened
+   * Counter (with the same precision as the new Alarm). See
+   * TransformCounterC for one possible implementation.
+   */
+  uses interface Counter;
+
+  /**
+   * The original Alarm.
+   */
+  uses interface Alarm as AlarmFrom;
+}
+implementation
+{
+  to_size_type m_t0;
+  to_size_type m_dt;
+
+  enum
+  {
+    MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right,
+    MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2,
+  };
+
+  async command to_size_type Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command to_size_type Alarm.getAlarm()
+  {
+    atomic return m_t0 + m_dt;
+    //return m_t0 + m_dt;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call AlarmFrom.isRunning();
+  }
+
+  async command void Alarm.stop()
+  {
+    call AlarmFrom.stop();
+  }
+
+  void set_alarm()
+  {
+    to_size_type now = call Counter.get(), expires, remaining;
+
+    /* m_t0 is assumed to be in the past. If it's > now, we assume
+       that time has wrapped around */
+
+    expires = m_t0 + m_dt;
+
+    /* The cast is necessary to get correct wrap-around arithmetic */
+    remaining = (to_size_type)(expires - now);
+
+    /* if (expires <= now) remaining = 0; in wrap-around arithmetic */
+    if (m_t0 <= now)
+      {
+	if (expires >= m_t0 && // if it wraps, it's > now
+	    expires <= now)
+	  remaining = 0;
+      }
+    else
+      {
+	if (expires >= m_t0 || // didn't wrap so < now
+	    expires <= now)
+	  remaining = 0;
+      }
+    if (remaining > MAX_DELAY)
+      {
+	m_t0 = now + MAX_DELAY;
+	m_dt = remaining - MAX_DELAY;
+	remaining = MAX_DELAY;
+      }
+    else
+      {
+	m_t0 += m_dt;
+	m_dt = 0;
+      }
+    call AlarmFrom.startAt((from_size_type)now << bit_shift_right,
+			   (from_size_type)remaining << bit_shift_right);
+  }
+
+  async command void Alarm.startAt(to_size_type t0, to_size_type dt)
+  {
+    atomic
+    {
+      m_t0 = t0;
+      m_dt = dt;
+      set_alarm();
+    }
+  }
+
+  async command void Alarm.start(to_size_type dt)
+  {
+    call Alarm.startAt(call Alarm.getNow(), dt);
+  }
+
+  async event void AlarmFrom.fired()
+  {
+    atomic
+    {
+      if(m_dt == 0)
+      {
+	signal Alarm.fired();
+      }
+      else
+      {
+	set_alarm();
+      }
+    }
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+
+  default async event void Alarm.fired()
+  {
+  }
+}
diff --git a/tos/lib/timer/TransformAlarmCounterC.nc b/tos/lib/timer/TransformAlarmCounterC.nc
new file mode 100644
index 00000000..ce13fb37
--- /dev/null
+++ b/tos/lib/timer/TransformAlarmCounterC.nc
@@ -0,0 +1,268 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TransformAlarmCounterC decreases precision and/or widens an Alarm/Counter
+ * pair. This component has a reduced interrupt overhead compared to using
+ * TransformAlarmC and TransformCounterC separately. However, it is not as 
+ * useful for hardware timers with multiple compare registers.
+ *
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   interfaces.
+ * @param to_size_type The type for the width of the transformed interfaces.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   interfaces.
+ * @param from_size_type The type for the width of the original interfaces.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   bit_shift_right larger than transformed time units.
+ * @param upper_count_type A type large enough to store the upper bits --
+ *   those needed above from_size_type after its shift right to fill
+ *   to_size_type.
+ *
+ * @author Cory Sharp 
+ * @author David Gay
+ */
+
+generic module TransformAlarmCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer() )
+{
+  provides interface Alarm as Alarm;
+  provides interface Counter as Counter;
+  uses interface Counter as CounterFrom;
+  uses interface Alarm as AlarmFrom;
+}
+implementation
+{
+  upper_count_type m_upper;
+  to_size_type m_t0;
+  to_size_type m_dt;
+  uint8_t m_skip_overflows;
+
+  enum
+  {
+    MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right,
+    MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2,
+  };
+
+  enum
+  {
+    LOW_SHIFT_RIGHT = bit_shift_right,
+    HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT,
+    NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right,
+    // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type)
+    // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type)
+    // 3. and allow for the strange case of NUM_UPPER_BITS == 0
+    OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0,
+  };
+
+  void set_alarm();
+
+  async command to_size_type Counter.get()
+  {
+    to_size_type rv = 0;
+    atomic
+    {
+      upper_count_type high = m_upper;
+      from_size_type low = call CounterFrom.get();
+      if (call CounterFrom.isOverflowPending())
+      {
+	// If we signalled CounterFrom.overflow, that might trigger a
+	// Counter.overflow, which breaks atomicity.  The right thing to do
+	// increment a cached version of high without overflow signals.
+	// m_upper will be handled normally as soon as the out-most atomic
+	// block is left unless Clear.clearOverflow is called in the interim.
+	// This is all together the expected behavior.
+	high++;
+	low = call CounterFrom.get();
+      }
+      {
+	to_size_type high_to = high;
+	to_size_type low_to = low >> LOW_SHIFT_RIGHT;
+	rv = (high_to << HIGH_SHIFT_LEFT) | low_to;
+      }
+    }
+    return rv;
+  }
+
+  // isOverflowPending only makes sense when it's already part of a larger
+  // async block, so there's no async inside the command itself, where it
+  // wouldn't do anything useful.
+
+  async command bool Counter.isOverflowPending()
+  {
+    return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK)
+	   && call CounterFrom.isOverflowPending();
+  }
+
+  // clearOverflow also only makes sense inside a larger atomic block, but we
+  // include the inner atomic block to ensure consistent internal state just in
+  // case someone calls it non-atomically.
+
+  async command void Counter.clearOverflow()
+  {
+    atomic
+    {
+      if (call Counter.isOverflowPending())
+      {
+	m_upper++;
+	call CounterFrom.clearOverflow();
+      }
+    }
+  }
+
+  async event void CounterFrom.overflow()
+  {
+    atomic
+    {
+
+      m_upper++;
+      if ((m_upper & OVERFLOW_MASK) == 0)
+	signal Counter.overflow();
+
+      if (m_skip_overflows && !--m_skip_overflows)
+	set_alarm();
+    }
+  }
+
+  async command to_size_type Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command to_size_type Alarm.getAlarm()
+  {
+    atomic return m_t0 + m_dt;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call AlarmFrom.isRunning();
+  }
+
+  async command void Alarm.stop()
+  {
+    call AlarmFrom.stop();
+  }
+
+  void set_alarm()
+  {
+    to_size_type now = call Counter.get(), expires, remaining;
+
+    /* m_t0 is assumed to be in the past. If it's > now, we assume
+       that time has wrapped around */
+
+    expires = m_t0 + m_dt;
+
+    /* The cast is necessary to get correct wrap-around arithmetic */
+    remaining = (to_size_type)(expires - now);
+
+    /* if (expires <= now) remaining = 0; in wrap-around arithmetic */
+    if (m_t0 <= now)
+      {
+	if (expires >= m_t0 && // if it wraps, it's > now
+	    expires <= now)
+	  remaining = 0;
+      }
+    else
+      {
+	if (expires >= m_t0 || // didn't wrap so < now
+	    expires <= now)
+	  remaining = 0;
+      }
+
+    if (remaining > MAX_DELAY * 2)
+      {
+	if (remaining >= MAX_DELAY * 2 * (to_size_type)256)
+	  m_skip_overflows = 255;
+	else
+	  m_skip_overflows = remaining / (MAX_DELAY * 2);
+	return;
+      }
+    else
+      m_skip_overflows = 0;
+
+    if (remaining > MAX_DELAY)
+      {
+	m_t0 = now + MAX_DELAY;
+	m_dt = remaining - MAX_DELAY;
+	remaining = MAX_DELAY;
+      }
+    else
+      {
+	m_t0 += m_dt;
+	m_dt = 0;
+      }
+    call AlarmFrom.startAt((from_size_type)now << bit_shift_right,
+			   (from_size_type)remaining << bit_shift_right);
+  }
+
+  async command void Alarm.startAt(to_size_type t0, to_size_type dt)
+  {
+    atomic
+    {
+      m_t0 = t0;
+      m_dt = dt;
+      set_alarm();
+    }
+  }
+
+  async command void Alarm.start(to_size_type dt)
+  {
+    call Alarm.startAt(call Alarm.getNow(), dt);
+  }
+
+  async event void AlarmFrom.fired()
+  {
+    atomic
+    {
+      if (m_dt == 0)
+      {
+	signal Alarm.fired();
+      }
+      else
+      {
+	set_alarm();
+      }
+    }
+  }
+
+  default async event void Alarm.fired()
+  {
+  }
+  default async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/TransformCounterC.nc b/tos/lib/timer/TransformCounterC.nc
new file mode 100644
index 00000000..53752f0d
--- /dev/null
+++ b/tos/lib/timer/TransformCounterC.nc
@@ -0,0 +1,132 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * TransformCounterC decreases precision and/or widens an Counter.
+ *
+ * 
    See TEP102 for more details.
+ *
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   Counter.
+ * @param to_size_type The type for the width of the transformed Counter.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   Counter.
+ * @param from_size_type The type for the width of the original Counter.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   bit_shift_right larger than transformed time units.
+ * @param upper_count_type A type large enough to store the upper bits --
+ *   those needed above from_size_type after its shift right to fill
+ *   to_size_type.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module TransformCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer())
+{
+  provides interface Counter as Counter;
+  uses interface Counter as CounterFrom;
+}
+implementation
+{
+  upper_count_type m_upper;
+
+  enum
+  {
+    LOW_SHIFT_RIGHT = bit_shift_right,
+    HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT,
+    NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right,
+    // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type)
+    // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type)
+    // 3. and allow for the strange case of NUM_UPPER_BITS == 0
+    OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0,
+  };
+
+  async command to_size_type Counter.get()
+  {
+    to_size_type rv = 0;
+    atomic
+    {
+      upper_count_type high = m_upper;
+      from_size_type low = call CounterFrom.get();
+      if (call CounterFrom.isOverflowPending())
+      {
+	// If we signalled CounterFrom.overflow, that might trigger a
+	// Counter.overflow, which breaks atomicity.  The right thing to do
+	// increment a cached version of high without overflow signals.
+	// m_upper will be handled normally as soon as the out-most atomic
+	// block is left unless Clear.clearOverflow is called in the interim.
+	// This is all together the expected behavior.
+	high++;
+	low = call CounterFrom.get();
+      }
+      {
+	to_size_type high_to = high;
+	to_size_type low_to = low >> LOW_SHIFT_RIGHT;
+	rv = (high_to << HIGH_SHIFT_LEFT) | low_to;
+      }
+    }
+    return rv;
+  }
+
+  // isOverflowPending only makes sense when it's already part of a larger
+  // async block, so there's no async inside the command itself, where it
+  // wouldn't do anything useful.
+
+  async command bool Counter.isOverflowPending()
+  {
+    return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK)
+	   && call CounterFrom.isOverflowPending();
+  }
+
+  // clearOverflow also only makes sense inside a larger atomic block, but we
+  // include the inner atomic block to ensure consistent internal state just in
+  // case someone calls it non-atomically.
+
+  async command void Counter.clearOverflow()
+  {
+    atomic
+    {
+      if (call Counter.isOverflowPending())
+      {
+	m_upper++;
+	call CounterFrom.clearOverflow();
+      }
+    }
+  }
+
+  async event void CounterFrom.overflow()
+  {
+    atomic
+    {
+      m_upper++;
+      if ((m_upper & OVERFLOW_MASK) == 0)
+	signal Counter.overflow();
+    }
+  }
+}
+
diff --git a/tos/lib/timer/VirtualizeAlarmC.nc b/tos/lib/timer/VirtualizeAlarmC.nc
new file mode 100644
index 00000000..50e78469
--- /dev/null
+++ b/tos/lib/timer/VirtualizeAlarmC.nc
@@ -0,0 +1,156 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * VirtualizeAlarmC uses a single Alarm to create up to 255 virtual alarms.
+ * Note that a virtualized Alarm will have significantly more overhead than
+ * an Alarm built on a hardware compare register.
+ *
+ * @param precision_tag A type indicating the precision of the Alarm being 
+ *   virtualized.
+ * @param num_alarms Number of virtual alarms to create.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module VirtualizeAlarmC(typedef precision_tag, typedef size_type @integer(), int num_alarms)
+{
+  provides interface Init;
+  provides interface Alarm as Alarm[uint8_t id];
+  uses interface Alarm as AlarmFrom;
+}
+implementation
+{
+  enum {
+    NUM_ALARMS = num_alarms,
+  };
+
+  size_type m_t0[NUM_ALARMS];
+  size_type m_dt[NUM_ALARMS];
+  bool m_isset[NUM_ALARMS];
+
+  command error_t Init.init()
+  {
+    return SUCCESS;
+  }
+
+  void setAlarm(size_type now)
+  {
+    size_type t0 = 0;
+    size_type dt = 0;
+    bool isNotSet = TRUE;
+    uint8_t id;
+
+    for(id=0; idSee TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of the Timer being 
+ *   virtualized.
+ * @param max_timers Number of virtual timers to create.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module VirtualizeTimerC(typedef precision_tag, int max_timers)
+{
+  provides interface Timer as Timer[uint8_t num];
+  uses interface Timer as TimerFrom;
+}
+implementation
+{
+  enum
+  {
+    NUM_TIMERS = max_timers,
+    END_OF_LIST = 255,
+  };
+
+  typedef struct
+  {
+    uint32_t t0;
+    uint32_t dt;
+    bool isoneshot : 1;
+    bool isrunning : 1;
+    bool _reserved : 6;
+  } Timer_t;
+
+  Timer_t m_timers[NUM_TIMERS];
+
+  task void executeTimersNow();
+
+  void executeTimers(uint32_t then)
+  {
+    uint32_t min_remaining = ~(uint32_t)0;
+    bool min_remaining_isset = FALSE;
+    int num;
+
+    for(num=0; numisrunning)
+      {
+	// Calculate "remaining" before the timer is fired.  If a timer
+	// restarts itself in a fired event, then we 1) need a consistent
+	// "remaining" value to work with, and no worries because 2) all
+	// start commands post executeTimersNow, so the timer will be
+	// recomputed later, anyway.
+
+	int32_t elapsed = then - timer->t0;
+	uint32_t remaining = timer->dt - elapsed;
+	bool compute_min_remaining = TRUE;
+
+	// If the elapsed time is negative, then t0 is in the future, so
+	// don't process it.  This implies:
+	//   1) t0 in the future is okay
+	//   2) dt can be at most maxval(uint32_t)/2
+
+	if ((elapsed >= 0) && (timer->dt <= (uint32_t)elapsed))
+	{
+	  if (timer->isoneshot)
+	  {
+	    timer->isrunning = FALSE;
+	    compute_min_remaining = FALSE;
+	  }
+	  else
+	  {
+	    // The remaining time is non-positive (the timer had fired).
+	    // So add dt to convert it to remaining for the next event.
+	    timer->t0 += timer->dt;
+	    remaining += timer->dt; 
+	  }
+
+	  signal Timer.fired[num]();
+	}
+
+	// check isrunning in case the timer was stopped in the fired event
+
+	if (compute_min_remaining && timer->isrunning)
+	{
+	  if (remaining < min_remaining)
+	    min_remaining = remaining;
+	  min_remaining_isset = TRUE;
+	}
+      }
+    }
+
+    if (min_remaining_isset)
+    {
+      uint32_t now = call TimerFrom.getNow();
+      uint32_t elapsed = now - then;
+      if (min_remaining <= elapsed)
+	post executeTimersNow();
+      else
+	call TimerFrom.startOneShotAt(now, min_remaining - elapsed);
+    }
+  }
+  
+
+  event void TimerFrom.fired()
+  {
+    executeTimers(call TimerFrom.gett0() + call TimerFrom.getdt());
+  }
+
+  task void executeTimersNow()
+  {
+    call TimerFrom.stop();
+    executeTimers(call TimerFrom.getNow());
+  }
+
+  void startTimer(uint8_t num, uint32_t t0, uint32_t dt, bool isoneshot)
+  {
+    Timer_t* timer = &m_timers[num];
+    timer->t0 = t0;
+    timer->dt = dt;
+    timer->isoneshot = isoneshot;
+    timer->isrunning = TRUE;
+    post executeTimersNow();
+  }
+
+  command void Timer.startPeriodic[uint8_t num](uint32_t dt)
+  {
+    startTimer(num, call TimerFrom.getNow(), dt, FALSE);
+  }
+
+  command void Timer.startOneShot[uint8_t num](uint32_t dt)
+  {
+    startTimer(num, call TimerFrom.getNow(), dt, TRUE);
+  }
+
+  command void Timer.stop[uint8_t num]()
+  {
+    m_timers[num].isrunning = FALSE;
+  }
+
+  command bool Timer.isRunning[uint8_t num]()
+  {
+    return m_timers[num].isrunning;
+  }
+
+  command bool Timer.isOneShot[uint8_t num]()
+  {
+    return m_timers[num].isoneshot;
+  }
+
+  command void Timer.startPeriodicAt[uint8_t num](uint32_t t0, uint32_t dt)
+  {
+    startTimer(num, t0, dt, FALSE);
+  }
+
+  command void Timer.startOneShotAt[uint8_t num](uint32_t t0, uint32_t dt)
+  {
+    startTimer(num, t0, dt, TRUE);
+  }
+
+  command uint32_t Timer.getNow[uint8_t num]()
+  {
+    return call TimerFrom.getNow();
+  }
+
+  command uint32_t Timer.gett0[uint8_t num]()
+  {
+    return m_timers[num].t0;
+  }
+
+  command uint32_t Timer.getdt[uint8_t num]()
+  {
+    return m_timers[num].dt;
+  }
+
+  default event void Timer.fired[uint8_t num]()
+  {
+  }
+}
+
diff --git a/tos/lib/tossim/ActiveMessageAddressC.nc b/tos/lib/tossim/ActiveMessageAddressC.nc
new file mode 100644
index 00000000..078d51db
--- /dev/null
+++ b/tos/lib/tossim/ActiveMessageAddressC.nc
@@ -0,0 +1,65 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ * Accessor methods for Active Messages.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+module ActiveMessageAddressC  {
+  provides async command am_addr_t amAddress();
+  provides async command void setAmAddress(am_addr_t a);
+}
+implementation {
+  bool set = FALSE;
+  am_addr_t addr;
+
+  async command am_addr_t amAddress() {
+    if (!set) {
+      addr = TOS_NODE_ID;
+      set = TRUE;
+    }
+    return addr;
+  }
+
+  async command void setAmAddress(am_addr_t a) {
+    set = TRUE;
+    addr = a;
+  }
+}
diff --git a/tos/lib/tossim/ActiveMessageC.nc b/tos/lib/tossim/ActiveMessageC.nc
new file mode 100644
index 00000000..4c86ea12
--- /dev/null
+++ b/tos/lib/tossim/ActiveMessageC.nc
@@ -0,0 +1,69 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components TossimActiveMessageP as AM;
+  components TossimPacketModelC as Network;
+  components UscGainInterferenceModelC as Model;
+  components ActiveMessageAddressC as Address;
+  components MainC;
+  
+  MainC.SoftwareInit -> Network;
+  SplitControl = Network;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = Network;
+
+  AM.Model -> Network.Packet;
+  AM.amAddress -> Address;
+  
+  Network.GainRadioModel -> Model;
+}
+
diff --git a/tos/lib/tossim/BinaryInterferenceModelC.nc b/tos/lib/tossim/BinaryInterferenceModelC.nc
new file mode 100644
index 00000000..4235a6d4
--- /dev/null
+++ b/tos/lib/tossim/BinaryInterferenceModelC.nc
@@ -0,0 +1,168 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * A binary interference model with length-independent packet error
+ * rates (the old TOSSIM-packet story).
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+#include 
+
+module BinaryInterferenceModelC {
+  provides interface SimpleRadioModel as Model;
+}
+
+implementation {
+
+  message_t* outgoing;
+  bool requestAck;
+  
+  void sim_binary_ack_handle(sim_event_t* evt)  {
+    if (outgoing != NULL && requestAck) {
+      signal Model.acked(outgoing);
+    }
+  }
+
+  sim_event_t receiveEvent;
+  sim_time_t clearTime = 0;
+  bool collision = FALSE;
+  message_t* incoming = NULL;
+  int incomingSource;
+
+  
+  command bool Model.clearChannel() {
+    dbg("Binary", "Checking clear channel @ %s: %i\n", sim_time_string(), (clearTime < sim_time()));
+    return clearTime < sim_time();
+  }
+
+  
+  void sim_schedule_ack(int source, sim_time_t time) {
+    sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t));
+    ackEvent->mote = source;
+    ackEvent->force = 0;
+    ackEvent->cancelled = 0;
+    ackEvent->time = time;
+    ackEvent->handle = sim_binary_ack_handle;
+    ackEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(ackEvent);
+  }
+  
+  void sim_binary_receive_handle(sim_event_t* evt) {
+    // If there was no collision, and we pass the loss
+    // rate...
+    if (!collision) {
+      double loss = sim_binary_loss(incomingSource, sim_node());
+      int randVal = sim_random() % 1000000;
+      dbg("Binary", "Handling receive event for %i.\n", sim_node());
+      loss *= 1000000.0;
+      if (randVal < (int)loss) {
+	signal Model.receive(incoming);
+
+	loss = sim_binary_loss(sim_node(), incomingSource);
+	randVal = sim_random() % 1000000;
+	loss *= 1000000.0;
+	if (randVal < (int)loss) {
+	  sim_schedule_ack(incomingSource, sim_time());
+	}
+      }
+      else {
+	dbg("Binary", "Packet lost.\n");
+      }
+    }
+    else {
+      dbg("Binary", "Receive event for %i was a collision.\n", sim_node());
+    }
+    incoming = NULL;
+  }
+
+  void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg) {
+    if (incoming == NULL) {
+      dbg("Binary", "Formatting reception event for %i.\n", sim_node());
+      receiveEvent.time = endTime;
+      receiveEvent.mote = sim_node();
+      receiveEvent.cancelled = 0;
+      receiveEvent.force = 0;
+      receiveEvent.handle = sim_binary_receive_handle;
+      receiveEvent.cleanup = sim_queue_cleanup_none;
+      incoming = msg;
+      sim_queue_insert(&receiveEvent);
+      incoming = msg;
+      incomingSource = source;
+    }
+  }
+  
+  void sim_binary_put(int dest, message_t* msg, sim_time_t endTime, bool receive) {
+    int prevNode = sim_node();
+    sim_set_node(dest);
+    if (clearTime < sim_time() && receive) {
+      dbg("Binary", "Enqueing reception event for %i.\n", dest);
+      enqueue_receive_event(prevNode, endTime - 1, msg);
+      collision = FALSE;
+    }
+    else {
+      collision = TRUE;
+    }
+    if (endTime > clearTime) {
+      clearTime = endTime;
+    }
+    sim_set_node(prevNode);
+  }
+
+
+  command void Model.putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime) {
+    link_t* link = sim_binary_first(sim_node());
+    requestAck = FALSE;
+    outgoing = msg;
+    dbg("Binary", "Node %i broadcasting, first link is 0x%p.\n", sim_node(), sim_binary_first(sim_node()));
+    while (link != NULL) {
+      int other = link->mote;
+      dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), other);
+      sim_binary_put(other, msg, endTime, TRUE);
+      link = sim_binary_next(link);
+    }
+  }
+
+  command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime) {
+    link_t* link = sim_binary_first(sim_node());
+    requestAck = ack;
+    outgoing = msg;
+    
+    while (link != NULL) {
+      int other = link->mote;
+      sim_binary_put(other, msg, endTime, other == dest);
+      dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), dest);
+      link = sim_binary_next(link);
+    }
+  }
+    
+
+  
+  
+ default event void Model.receive(message_t* msg) {}
+
+
+}
diff --git a/tos/lib/tossim/DemoSensorC.nc b/tos/lib/tossim/DemoSensorC.nc
new file mode 100644
index 00000000..57c8a3bb
--- /dev/null
+++ b/tos/lib/tossim/DemoSensorC.nc
@@ -0,0 +1,30 @@
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+generic configuration DemoSensorC(){
+  provides interface Read;
+}
+implementation {
+  components new ConstantSensorC(uint16_t, 0xbeef);
+  Read = ConstantSensorC;
+}
diff --git a/tos/lib/tossim/Driver.c b/tos/lib/tossim/Driver.c
new file mode 100644
index 00000000..f5368220
--- /dev/null
+++ b/tos/lib/tossim/Driver.c
@@ -0,0 +1,28 @@
+#include 
+
+int main() {
+  Tossim* t = new Tossim(NULL);
+  t->init();
+  //t->addChannel("Scheduler", fdopen(1, "w"));
+  //t->addChannel("TossimPacketModelC", fdopen(1, "w"));
+  t->addChannel("LedsC", fdopen(1, "w"));
+  t->addChannel("AM", fdopen(1, "w"));
+
+  Radio* r = t->radio();
+    
+  for (int i = 0; i < 2; i++) {
+    printf("Mote %i at %i\n", i, 15000000 * i + 1);
+    Mote* m = t->getNode(i);
+    m->bootAtTime(15000000 * i + 1);
+    r->setNoise(i, -77.0, 3);
+    for (int j = 0; j < 2; j++) {
+      if (i != j) {
+        r->add(i, j, -50.0);
+      }
+    }
+  }
+
+  for (int i = 0; i < 60; i++) {
+    t->runNextEvent();
+  }
+}
diff --git a/tos/lib/tossim/GainRadioModel.nc b/tos/lib/tossim/GainRadioModel.nc
new file mode 100644
index 00000000..688e07a2
--- /dev/null
+++ b/tos/lib/tossim/GainRadioModel.nc
@@ -0,0 +1,52 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The interface to a gain-based radio model, which considers
+ * signal strength of transmission and propagation. It also
+ * includes a clear channel estimate. The actual implementation
+ * of the model (e.g., noise, signal collision) is generally
+ * C-based.
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include "TinyError.h"
+
+interface GainRadioModel {
+  command void putOnAirTo(int dest,
+			  message_t* msg,
+			  bool ack,
+			  sim_time_t endTime,
+			  double gain);
+
+  command void setClearValue(double value);
+  command bool clearChannel();
+  
+  event void acked(message_t* msg);
+  event void receive(message_t* msg);
+  event bool shouldAck(message_t* msg);
+}
diff --git a/tos/lib/tossim/HilTimerMilliC.nc b/tos/lib/tossim/HilTimerMilliC.nc
new file mode 100644
index 00000000..0f1b4a2f
--- /dev/null
+++ b/tos/lib/tossim/HilTimerMilliC.nc
@@ -0,0 +1,173 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This is a TOSSIM-specific implementation of TimerMilliC that
+ * directly emulates timers rather than their underlying hardware.  It
+ * is intended to be a basic fill-in for microcontrollers that do not
+ * have TOSSIM simulation support.
+ *
+ * @author Philip Levis
+ * @date   December 1 2005
+ */
+
+#include 
+
+module HilTimerMilliC {
+  provides interface Init;
+  provides interface Timer as TimerMilli[uint8_t num];
+}
+implementation {
+
+  enum {
+    TIMER_COUNT = uniqueCount("UQ_TIMER_MILLI")
+  };
+
+  typedef struct tossim_timer {
+    uint32_t t0;
+    uint32_t dt;
+    bool isPeriodic;
+    bool isActive;
+    sim_event_t* evt;
+  } tossim_timer_t;
+
+  tossim_timer_t timers[TIMER_COUNT];
+  sim_time_t initTime;
+
+  void initializeEvent(sim_event_t* evt, uint8_t timerID);
+  
+  sim_time_t clockToSim(sim_time_t clockVal) {
+    return (clockVal * sim_ticks_per_sec()) / 1024;
+  }
+
+  sim_time_t simToClock(sim_time_t sim) {
+    return (sim * 1024) / sim_ticks_per_sec();
+  }
+  
+  command error_t Init.init() {
+    memset(timers, 0, sizeof(timers));
+    initTime = sim_time();
+    return SUCCESS;
+  }
+  
+  command void TimerMilli.startPeriodic[uint8_t id]( uint32_t dt ) {
+    call TimerMilli.startPeriodicAt[id](call TimerMilli.getNow[id](), dt);
+  }
+  command void TimerMilli.startOneShot[uint8_t id]( uint32_t dt ) {
+    call TimerMilli.startOneShotAt[id](call TimerMilli.getNow[id](), dt);
+  }
+
+  command void TimerMilli.stop[uint8_t id]() {
+    timers[id].isActive = 0;
+    if (timers[0].evt != NULL) {
+      timers[0].evt->cancelled = 1;
+      timers[0].evt->cleanup = sim_queue_cleanup_total;
+      timers[0].evt = NULL;
+    }
+  }
+
+  // extended interface
+  command bool TimerMilli.isRunning[uint8_t id]() {return timers[id].isActive;}
+  command bool TimerMilli.isOneShot[uint8_t id]() {return !timers[id].isActive;}
+  
+  command void TimerMilli.startPeriodicAt[uint8_t id]( uint32_t t0, uint32_t dt ) {
+    call TimerMilli.startOneShotAt[id](t0, dt);
+    timers[id].isPeriodic = 1;
+  }
+  command void TimerMilli.startOneShotAt[uint8_t id]( uint32_t t0, uint32_t dt ) {
+    uint32_t currentTime = call TimerMilli.getNow[id]();
+    sim_time_t fireTime = sim_time();
+
+    call TimerMilli.stop[id]();
+    
+    timers[id].evt = sim_queue_allocate_event();
+    initializeEvent(timers[id].evt, id);
+
+    fireTime += clockToSim(dt);
+    
+    // Be careful about signing and casts, etc.
+    if (currentTime > t0) {
+      fireTime -= clockToSim(currentTime - t0);
+    }
+    else {
+      fireTime += clockToSim(t0 - currentTime);      
+    }
+
+    timers[id].evt->time = fireTime;
+    timers[id].isPeriodic = 0;
+    timers[id].isActive = 1;
+    timers[id].t0 = t0;
+    timers[id].dt = dt;
+
+    sim_queue_insert(timers[id].evt);
+  }
+    
+  command uint32_t TimerMilli.getNow[uint8_t id]() {
+    sim_time_t nowTime = sim_time();
+    nowTime -= initTime;
+    nowTime = simToClock(nowTime);
+    return nowTime & 0xffffffff;
+  }
+  
+  command uint32_t TimerMilli.gett0[uint8_t id]() {
+    return timers[id].t0;
+  }
+  command uint32_t TimerMilli.getdt[uint8_t id]() {
+    return timers[id].dt;
+  }
+
+  void tossim_timer_handle(sim_event_t* evt) {
+    uint8_t* datum = (uint8_t*)evt->data;
+    uint8_t id = *datum;
+    signal TimerMilli.fired[id]();
+
+    // We should only re-enqueue the event if it is a follow-up firing
+    // of the same timer.  If the timer is stopped, it's a one shot,
+    // or someone has started a new timer, don't re-enqueue it.
+    if (timers[id].isActive &&
+	timers[id].isPeriodic &&
+	timers[id].evt == evt) {
+      evt->time = evt->time += clockToSim(timers[id].dt);
+      sim_queue_insert(evt);
+    }
+    // If we aren't enqueueing it, and nobody has done something that
+    // would cause the event to have been garbage collected, then do
+    // so.
+    else if (timers[id].evt == evt) {
+      call TimerMilli.stop[id]();
+    }
+  }
+  
+  void initializeEvent(sim_event_t* evt, uint8_t timerID) {
+    uint8_t* data = (uint8_t*)malloc(sizeof(uint8_t));
+    *data = timerID;
+
+    evt->handle = tossim_timer_handle;
+    evt->cleanup = sim_queue_cleanup_none;
+    evt->data = data;
+  }
+
+ default event void TimerMilli.fired[uint8_t id]() {}
+}
+
diff --git a/tos/lib/tossim/MainC.nc b/tos/lib/tossim/MainC.nc
new file mode 100644
index 00000000..6babd868
--- /dev/null
+++ b/tos/lib/tossim/MainC.nc
@@ -0,0 +1,67 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This version of Main is the system interface the TinyOS boot
+ * sequence in TOSSIM. It wires the boot sequence implementation to
+ * the scheduler and hardware resources. Unlike the standard Main,
+ * it does not actually define the main function, as a
+ * TOSSIM simulation is triggered from Python.
+ *
+ * @author Philip Levis
+ * @date   August 6 2005
+ */
+
+// $Id$
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, SimMainP, TinySchedulerC;
+  
+  // SimMoteP is not referred to by any component here.
+  // It is included to make sure nesC loads it, as it
+  // includes functionality many other systems depend on.
+  components SimMoteP;
+  
+  SimMainP.Scheduler -> TinySchedulerC;
+  SimMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = SimMainP.SoftwareInit;
+  Boot = SimMainP;
+
+  // This component may not be used by the application, but it must
+  // be included. This is because there are Python calls that deliver
+  // packets, and those python calls must terminate somewhere. If
+  // the application does not wire this up to, e.g., ActiveMessageC,
+  // the default handlers make sure nothing happens when a script
+  // tries to deliver a packet to a node that has no radio stack.
+  components TossimActiveMessageP;
+  
+}
+
diff --git a/tos/lib/tossim/PlatformC.nc b/tos/lib/tossim/PlatformC.nc
new file mode 100644
index 00000000..2dd2a8ba
--- /dev/null
+++ b/tos/lib/tossim/PlatformC.nc
@@ -0,0 +1,42 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The default simulation platform, which does nothing.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+// $Id$
+
+module PlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    dbg("PlatformC", "Initialized mote.\n");
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/lib/tossim/README b/tos/lib/tossim/README
new file mode 100644
index 00000000..2c3c7c29
--- /dev/null
+++ b/tos/lib/tossim/README
@@ -0,0 +1,21 @@
+README for tinyos-2.x/tos/lib/tossim
+
+This directory contains the core code for the TOSSIM TinyOS simulator.
+One characteristic of TOSSIM is that it can controlled through a
+Python script. Building simple yet efficient support for this requires 
+presenting most TOSSIM abstractions in a C++ interface, which is then
+transformed into a Python interface with the SWIG tool.
+
+This leads most TOSSIM abstractions to have three levels: C, nesC, 
+and C++. Because nesC cannot call C++ and vice versa, TOSSIM exports
+its important call points as C functions. It links simple C++ wrapper
+classes against the simulation binary. Python can then call through
+the C++ interface.
+
+The files tossim.h and tossim.c, for example, are the basic TOSSIM
+C++ classes of Mote, Tossim, and Variable. These call functions 
+in sim_tossim.c, which other parts of TOSSIM also call.
+
+The examples/ directory contains some sample Python scripts. 
+
+
diff --git a/tos/lib/tossim/SerialActiveMessageC.nc b/tos/lib/tossim/SerialActiveMessageC.nc
new file mode 100644
index 00000000..4d317337
--- /dev/null
+++ b/tos/lib/tossim/SerialActiveMessageC.nc
@@ -0,0 +1,183 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+#include 
+#include 
+
+module SerialActiveMessageC {
+  provides {
+    interface SplitControl;
+    
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+  uses {
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  serial_header_t* getHeader(message_t* amsg) {
+    return (serial_header_t*)(amsg->data - sizeof(serial_header_t));
+  }
+
+  task void startDone() { signal SplitControl.startDone(SUCCESS); }
+  task void stopDone() { signal SplitControl.stopDone(SUCCESS); }
+
+  command error_t SplitControl.start() {
+    post startDone();
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    post stopDone();
+    return SUCCESS;
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    return FAIL;
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return FAIL;
+  }
+  
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->addr = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+    serial_header_t* header = getHeader(amsg);
+    header->type = t;
+  }
+ 
+  command void Packet.clear(message_t* msg) {}
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return getHeader(msg)->length;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    if (len != NULL) {
+      *len = call Packet.payloadLength(msg);
+    }
+    return msg->data;
+  }
+
+  async command error_t Acks.requestAck(message_t* msg) {
+    return FAIL;
+  }
+
+  async command error_t Acks.noAck(message_t* msg) {
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+ default command am_addr_t amAddress() {
+   return 0;
+ }
+ 
+}
diff --git a/tos/lib/tossim/SimMainP.nc b/tos/lib/tossim/SimMainP.nc
new file mode 100644
index 00000000..66fad992
--- /dev/null
+++ b/tos/lib/tossim/SimMainP.nc
@@ -0,0 +1,87 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * SimMainP implements the TOSSIM TinyOS boot sequence, as documented
+ * in TEP 107. It differs from RealMainP (its mote counterpart) in that
+ * it does not actually define a main function.
+ *
+ * @author Philip Levis
+ * @date   August 17 2005
+ */
+
+static void __nesc_nido_initialise(int node);
+
+module SimMainP {
+  provides interface Boot;
+  uses interface Scheduler;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+
+  int sim_main_start_mote() __attribute__ ((C, spontaneous)) {
+    char timeBuf[128];
+    atomic {
+      /* First, initialize the Scheduler so components can post
+	 tasks. Initialize all of the very hardware specific stuff, such
+	 as CPU settings, counters, etc. After the hardware is ready,
+	 initialize the requisite software components and start
+	 execution.*/
+      
+      call Scheduler.init(); 
+      
+      /* Initialize the platform. Then spin on the Scheduler, passing
+       * FALSE so it will not put the system to sleep if there are no
+       * more tasks; if no tasks remain, continue on to software
+       * initialization */
+      call PlatformInit.init();    
+      while (call Scheduler.runNextTask());
+      
+      /* Initialize software components.Then spin on the Scheduler,
+       * passing FALSE so it will not put the system to sleep if there
+       * are no more tasks; if no tasks remain, the system has booted
+       * successfully.*/
+      call SoftwareInit.init(); 
+      while (call Scheduler.runNextTask());
+    }
+    
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    sim_print_now(timeBuf, 128);
+    dbg("SimMainP", "Mote %li signaling boot at time %s.\n", sim_node(), timeBuf);
+    signal Boot.booted();
+    
+    /* Normally, at this point a mote enters a while(1) loop to
+     * execute tasks. In TOSSIM, this call completes: posted tasks
+     * are part of the global TOSSIM event loop. Look at
+     * SimSchedulerBasicP for more details. */
+    return 0;
+  }
+
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
diff --git a/tos/lib/tossim/SimMote.nc b/tos/lib/tossim/SimMote.nc
new file mode 100644
index 00000000..1b21385e
--- /dev/null
+++ b/tos/lib/tossim/SimMote.nc
@@ -0,0 +1,42 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * TOSSIM-specific interface to access a mote's state. TinyOS programs
+ * should never use this interface.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+interface SimMote {
+  async command long long int getEuid();
+  async command void setEuid(long long int euid);
+  async command long long int getStartTime();
+  async command bool isOn();
+  async command int getVariableInfo(char* name, void** ptr, size_t* len);
+  command void turnOn();
+  async command void turnOff();
+}
diff --git a/tos/lib/tossim/SimMoteP.nc b/tos/lib/tossim/SimMoteP.nc
new file mode 100644
index 00000000..bea63ddd
--- /dev/null
+++ b/tos/lib/tossim/SimMoteP.nc
@@ -0,0 +1,185 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+
+/**
+ * The TOSSIM abstraction of a mote. By putting simulation state into
+ * a component, we can scale and reference this state automatically
+ * using nesC's rewriting, rather than managing and indexing into
+ * arrays manually.
+ *
+ * @author Phil Levis
+ * @date   August 19 2005
+ */
+
+// $Id$
+
+module SimMoteP {
+  provides interface SimMote;
+}
+
+implementation {
+  long long int euid;
+  long long int startTime;
+  bool isOn;
+  sim_event_t* bootEvent;
+  
+  async command long long int SimMote.getEuid() {
+    return euid;
+  }
+  async command void SimMote.setEuid(long long int e) {
+    euid = e;
+  }
+  async command long long int SimMote.getStartTime() {
+    return startTime;
+  }
+  async command bool SimMote.isOn() {
+    return isOn;
+  }
+
+  async command int SimMote.getVariableInfo(char* name, void** addr, size_t* size) {
+    return __nesc_nido_resolve(sim_node(), name, (uintptr_t*)addr, (size_t*)size);
+  }
+
+  command void SimMote.turnOn() {
+    if (!isOn) {
+      if (bootEvent != NULL) {
+	bootEvent->cancelled = TRUE;
+      }
+      __nesc_nido_initialise(sim_node());
+      startTime = sim_time();
+      dbg("SimMoteP", "Setting start time to %llu\n", startTime);
+      isOn = TRUE;
+      sim_main_start_mote();
+    }
+  }
+
+  async command void SimMote.turnOff() {
+    isOn = FALSE;
+  }
+
+  
+  long long int sim_mote_euid(int mote) __attribute__ ((C, spontaneous)) {
+    long long int result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getEuid();
+    sim_set_node(tmp);
+    return result;
+  }
+
+  void sim_mote_set_euid(int mote, long long int id)  __attribute__ ((C, spontaneous)) {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.setEuid(id);
+    sim_set_node(tmp);
+  }
+  
+  long long int sim_mote_start_time(int mote) __attribute__ ((C, spontaneous)) {
+    long long int result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getStartTime();
+    sim_set_node(tmp);
+    return result;
+  }
+
+  int sim_mote_get_variable_info(int mote, char* name, void** ptr, size_t* len) __attribute__ ((C, spontaneous)) {
+    int result;
+    int tmpID = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getVariableInfo(name, ptr, len);
+    dbg("SimMoteP", "Fetched %s of %i to be %p with len %i (result %i)\n", name, mote, *ptr, *len, result);
+    sim_set_node(tmpID);
+    return result;
+  }
+  
+  void sim_mote_set_start_time(int mote, long long int t) __attribute__ ((C, spontaneous)) {
+    int tmpID = sim_node();
+    sim_set_node(mote);
+    startTime = t;
+    dbg("SimMoteP", "Setting start time to %llu\n", startTime);
+    sim_set_node(tmpID);
+    return;
+  }
+  
+  bool sim_mote_is_on(int mote) __attribute__ ((C, spontaneous)) {
+    bool result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.isOn();
+    sim_set_node(tmp);
+    return result;
+  }
+  
+  void sim_mote_turn_on(int mote) __attribute__ ((C, spontaneous)) {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.turnOn();
+    sim_set_node(tmp);
+  }
+  
+  void sim_mote_turn_off(int mote) __attribute__ ((C, spontaneous)) {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.turnOff();
+    sim_set_node(tmp);
+  }
+
+  void sim_mote_boot_handle(sim_event_t* e) {
+    char buf[128];
+    sim_print_now(buf, 128);
+	   
+    bootEvent = (sim_event_t*)NULL;
+    dbg("SimMoteP", "Turning on mote %i at time %s.\n", (int)sim_node(), buf);
+    call SimMote.turnOn();
+  }
+  
+  void sim_mote_enqueue_boot_event(int mote) __attribute__ ((C, spontaneous)) {
+    int tmp = sim_node();
+    sim_set_node(mote);
+
+    if (bootEvent != NULL)  {
+      if (bootEvent->time == startTime) {
+	// In case we have a cancelled boot event.
+	bootEvent->cancelled = FALSE;
+	return;
+      }
+      else {
+	bootEvent->cancelled = TRUE;
+      }
+    }
+    
+    bootEvent = (sim_event_t*) malloc(sizeof(sim_event_t));
+    bootEvent->time = startTime;
+    bootEvent->mote = mote;
+    bootEvent->force = TRUE;
+    bootEvent->data = NULL;
+    bootEvent->handle = sim_mote_boot_handle;
+    bootEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(bootEvent);
+    
+    sim_set_node(tmp);
+  }
+
+}
diff --git a/tos/lib/tossim/SimSchedulerBasicP.nc b/tos/lib/tossim/SimSchedulerBasicP.nc
new file mode 100644
index 00000000..58318e34
--- /dev/null
+++ b/tos/lib/tossim/SimSchedulerBasicP.nc
@@ -0,0 +1,220 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * SimSchedulerBasic implements the default TinyOS scheduler sequence
+ * (documented in TEP 106) for the TOSSIM platform. Its major departure
+ * from the standard TinyOS scheduler is that tasks are executed
+ * within TOSSIM events. This introduces task latency.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   August 19 2005
+ */
+
+
+#include 
+
+module SimSchedulerBasicP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation
+{
+  enum
+  {
+    NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"),
+    NO_TASK = 255,
+  };
+
+  uint8_t m_head;
+  uint8_t m_tail;
+  uint8_t m_next[NUM_TASKS];
+
+  /* This simulation state is kept on a per-node basis.
+     Better to take advantage of nesC's automatic state replication
+     than try to do it ourselves. */
+  bool sim_scheduler_event_pending = FALSE;
+  sim_event_t sim_scheduler_event;
+
+  int sim_config_task_latency() {return 100;}
+  
+
+  /* Only enqueue the event for execution if it is
+     not already enqueued. If there are more tasks in the
+     queue, the event will re-enqueue itself (see the handle
+     function). */
+  
+  void sim_scheduler_submit_event() {
+    if (sim_scheduler_event_pending == FALSE) {
+      sim_scheduler_event.time = sim_time() + sim_config_task_latency();
+      sim_queue_insert(&sim_scheduler_event);
+      sim_scheduler_event_pending = TRUE;
+    }
+  }
+
+  void sim_scheduler_event_handle(sim_event_t* e) {
+    sim_scheduler_event_pending = FALSE;
+
+    // If we successfully executed a task, re-enqueue the event. This
+    // will always succeed, as sim_scheduler_event_pending was just
+    // set to be false.  Note that this means there will be an extra
+    // execution (on an empty task queue). We could optimize this
+    // away, but this code is cleaner, and more accurately reflects
+    // the real TinyOS main loop.
+    
+    if (call Scheduler.runNextTask()) {
+      sim_scheduler_submit_event();
+    }
+  }
+
+  
+  /* Initialize a scheduler event. This should only be done
+   * once, when the scheduler is initialized. */
+  void sim_scheduler_event_init(sim_event_t* e) {
+    e->mote = sim_node();
+    e->force = 0;
+    e->data = NULL;
+    e->handle = sim_scheduler_event_handle;
+    e->cleanup = sim_queue_cleanup_none;
+  }
+
+
+
+  // Helper functions (internal functions) intentionally do not have atomic
+  // sections.  It is left as the duty of the exported interface functions to
+  // manage atomicity to minimize chances for binary code bloat.
+
+  // move the head forward
+  // if the head is at the end, mark the tail at the end, too
+  // mark the task as not in the queue
+  uint8_t popTask()
+  {
+    if( m_head != NO_TASK )
+    {
+      uint8_t id = m_head;
+      m_head = m_next[m_head];
+      if( m_head == NO_TASK )
+      {
+	m_tail = NO_TASK;
+      }
+      m_next[id] = NO_TASK;
+      return id;
+    }
+    else
+    {
+      return NO_TASK;
+    }
+  }
+  
+  bool isWaiting( uint8_t id )
+  {
+    return (m_next[id] != NO_TASK) || (m_tail == id);
+  }
+
+  bool pushTask( uint8_t id )
+  {
+    if( !isWaiting(id) )
+    {
+      if( m_head == NO_TASK )
+      {
+	m_head = id;
+	m_tail = id;
+      }
+      else
+      {
+	m_next[m_tail] = id;
+	m_tail = id;
+      }
+      return TRUE;
+    }
+    else
+    {
+      return FALSE;
+    }
+  }
+  
+  command void Scheduler.init()
+  {
+    dbg("Scheduler", "Initializing scheduler.\n");
+    atomic
+    {
+      memset( m_next, NO_TASK, sizeof(m_next) );
+      m_head = NO_TASK;
+      m_tail = NO_TASK;
+
+      sim_scheduler_event_pending = FALSE;
+      sim_scheduler_event_init(&sim_scheduler_event);
+    }
+  }
+  
+  command bool Scheduler.runNextTask()
+  {
+    uint8_t nextTask;
+    atomic
+    {
+      nextTask = popTask();
+      if( nextTask == NO_TASK )
+      {
+	dbg("Scheduler", "Told to run next task, but no task to run.\n");
+	return FALSE;
+      }
+    }
+    dbg("Scheduler", "Running task %hhu.\n", nextTask);
+    signal TaskBasic.runTask[nextTask]();
+    return TRUE;
+  }
+
+  command void Scheduler.taskLoop() {
+    // This should never run.
+  }
+  
+  /**
+   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
+   */
+  
+  async command error_t TaskBasic.postTask[uint8_t id]()
+  {
+    error_t result;
+    atomic {
+      result =  pushTask(id) ? SUCCESS : EBUSY;
+    }
+    if (result == SUCCESS) {
+      dbg("Scheduler", "Posting task %hhu.\n", id);
+      sim_scheduler_submit_event();
+    }
+    else {
+      dbg("Scheduler", "Posting task %hhu, but already posted.\n", id);
+    }
+    return result;
+  }
+
+  default event void TaskBasic.runTask[uint8_t id]()
+  {
+  }
+
+
+
+}
+
diff --git a/tos/lib/tossim/SimpleRadioModel.nc b/tos/lib/tossim/SimpleRadioModel.nc
new file mode 100644
index 00000000..b09fde32
--- /dev/null
+++ b/tos/lib/tossim/SimpleRadioModel.nc
@@ -0,0 +1,45 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The interface to a simple radio model, which has per-link bit error
+ * probabilities and assumes complete interferences (the old TOSSIM
+ * story).
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include "TinyError.h"
+
+interface SimpleRadioModel {
+  command void putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime);
+  command void putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime);
+  command bool clearChannel();
+  
+  event void acked(message_t* msg);
+  
+  event void receive(message_t* msg);
+}
diff --git a/tos/lib/tossim/TOSSIM.py b/tos/lib/tossim/TOSSIM.py
new file mode 100644
index 00000000..13ff1c4e
--- /dev/null
+++ b/tos/lib/tossim/TOSSIM.py
@@ -0,0 +1,299 @@
+# This file was created automatically by SWIG.
+# Don't modify this file, modify the SWIG interface instead.
+# This file is compatible with both classic and new-style classes.
+
+import _TOSSIM
+
+def _swig_setattr(self,class_type,name,value):
+    if (name == "this"):
+        if isinstance(value, class_type):
+            self.__dict__[name] = value.this
+            if hasattr(value,"thisown"): self.__dict__["thisown"] = value.thisown
+            del value.thisown
+            return
+    method = class_type.__swig_setmethods__.get(name,None)
+    if method: return method(self,value)
+    self.__dict__[name] = value
+
+def _swig_getattr(self,class_type,name):
+    method = class_type.__swig_getmethods__.get(name,None)
+    if method: return method(self)
+    raise AttributeError,name
+
+import types
+try:
+    _object = types.ObjectType
+    _newclass = 1
+except AttributeError:
+    class _object : pass
+    _newclass = 0
+del types
+
+
+class MAC(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, MAC, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, MAC, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, MAC, 'this', _TOSSIM.new_MAC(*args))
+        _swig_setattr(self, MAC, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_MAC):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def initHigh(*args): return _TOSSIM.MAC_initHigh(*args)
+    def initLow(*args): return _TOSSIM.MAC_initLow(*args)
+    def high(*args): return _TOSSIM.MAC_high(*args)
+    def low(*args): return _TOSSIM.MAC_low(*args)
+    def symbolsPerSec(*args): return _TOSSIM.MAC_symbolsPerSec(*args)
+    def bitsPerSymbol(*args): return _TOSSIM.MAC_bitsPerSymbol(*args)
+    def preambleLength(*args): return _TOSSIM.MAC_preambleLength(*args)
+    def exponentBase(*args): return _TOSSIM.MAC_exponentBase(*args)
+    def maxIterations(*args): return _TOSSIM.MAC_maxIterations(*args)
+    def minFreeSamples(*args): return _TOSSIM.MAC_minFreeSamples(*args)
+    def rxtxDelay(*args): return _TOSSIM.MAC_rxtxDelay(*args)
+    def ackTime(*args): return _TOSSIM.MAC_ackTime(*args)
+    def setInitHigh(*args): return _TOSSIM.MAC_setInitHigh(*args)
+    def setInitLow(*args): return _TOSSIM.MAC_setInitLow(*args)
+    def setHigh(*args): return _TOSSIM.MAC_setHigh(*args)
+    def setLow(*args): return _TOSSIM.MAC_setLow(*args)
+    def setSymbolsPerSec(*args): return _TOSSIM.MAC_setSymbolsPerSec(*args)
+    def setBitsBerSymbol(*args): return _TOSSIM.MAC_setBitsBerSymbol(*args)
+    def setPreambleLength(*args): return _TOSSIM.MAC_setPreambleLength(*args)
+    def setExponentBase(*args): return _TOSSIM.MAC_setExponentBase(*args)
+    def setMaxIterations(*args): return _TOSSIM.MAC_setMaxIterations(*args)
+    def setMinFreeSamples(*args): return _TOSSIM.MAC_setMinFreeSamples(*args)
+    def setRxtxDelay(*args): return _TOSSIM.MAC_setRxtxDelay(*args)
+    def setAckTime(*args): return _TOSSIM.MAC_setAckTime(*args)
+
+class MACPtr(MAC):
+    def __init__(self, this):
+        _swig_setattr(self, MAC, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, MAC, 'thisown', 0)
+        _swig_setattr(self, MAC,self.__class__,MAC)
+_TOSSIM.MAC_swigregister(MACPtr)
+
+class Radio(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Radio, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Radio, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, Radio, 'this', _TOSSIM.new_Radio(*args))
+        _swig_setattr(self, Radio, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_Radio):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def add(*args): return _TOSSIM.Radio_add(*args)
+    def gain(*args): return _TOSSIM.Radio_gain(*args)
+    def connected(*args): return _TOSSIM.Radio_connected(*args)
+    def remove(*args): return _TOSSIM.Radio_remove(*args)
+    def setNoise(*args): return _TOSSIM.Radio_setNoise(*args)
+    def setSensitivity(*args): return _TOSSIM.Radio_setSensitivity(*args)
+
+class RadioPtr(Radio):
+    def __init__(self, this):
+        _swig_setattr(self, Radio, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, Radio, 'thisown', 0)
+        _swig_setattr(self, Radio,self.__class__,Radio)
+_TOSSIM.Radio_swigregister(RadioPtr)
+
+class Packet(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Packet, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Packet, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, Packet, 'this', _TOSSIM.new_Packet(*args))
+        _swig_setattr(self, Packet, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_Packet):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def setDestination(*args): return _TOSSIM.Packet_setDestination(*args)
+    def destination(*args): return _TOSSIM.Packet_destination(*args)
+    def setLength(*args): return _TOSSIM.Packet_setLength(*args)
+    def length(*args): return _TOSSIM.Packet_length(*args)
+    def setType(*args): return _TOSSIM.Packet_setType(*args)
+    def type(*args): return _TOSSIM.Packet_type(*args)
+    def data(*args): return _TOSSIM.Packet_data(*args)
+    def setData(*args): return _TOSSIM.Packet_setData(*args)
+    def maxLength(*args): return _TOSSIM.Packet_maxLength(*args)
+    def setStrength(*args): return _TOSSIM.Packet_setStrength(*args)
+    def deliver(*args): return _TOSSIM.Packet_deliver(*args)
+    def deliverNow(*args): return _TOSSIM.Packet_deliverNow(*args)
+
+class PacketPtr(Packet):
+    def __init__(self, this):
+        _swig_setattr(self, Packet, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, Packet, 'thisown', 0)
+        _swig_setattr(self, Packet,self.__class__,Packet)
+_TOSSIM.Packet_swigregister(PacketPtr)
+
+class variable_string_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, variable_string_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, variable_string_t, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    __swig_setmethods__["type"] = _TOSSIM.variable_string_t_type_set
+    __swig_getmethods__["type"] = _TOSSIM.variable_string_t_type_get
+    if _newclass:type = property(_TOSSIM.variable_string_t_type_get, _TOSSIM.variable_string_t_type_set)
+    __swig_setmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_set
+    __swig_getmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_get
+    if _newclass:ptr = property(_TOSSIM.variable_string_t_ptr_get, _TOSSIM.variable_string_t_ptr_set)
+    __swig_setmethods__["len"] = _TOSSIM.variable_string_t_len_set
+    __swig_getmethods__["len"] = _TOSSIM.variable_string_t_len_get
+    if _newclass:len = property(_TOSSIM.variable_string_t_len_get, _TOSSIM.variable_string_t_len_set)
+    __swig_setmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_set
+    __swig_getmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_get
+    if _newclass:isArray = property(_TOSSIM.variable_string_t_isArray_get, _TOSSIM.variable_string_t_isArray_set)
+    def __init__(self, *args):
+        _swig_setattr(self, variable_string_t, 'this', _TOSSIM.new_variable_string_t(*args))
+        _swig_setattr(self, variable_string_t, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_variable_string_t):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+
+class variable_string_tPtr(variable_string_t):
+    def __init__(self, this):
+        _swig_setattr(self, variable_string_t, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, variable_string_t, 'thisown', 0)
+        _swig_setattr(self, variable_string_t,self.__class__,variable_string_t)
+_TOSSIM.variable_string_t_swigregister(variable_string_tPtr)
+
+class nesc_app_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, nesc_app_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, nesc_app_t, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    __swig_setmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_set
+    __swig_getmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_get
+    if _newclass:numVariables = property(_TOSSIM.nesc_app_t_numVariables_get, _TOSSIM.nesc_app_t_numVariables_set)
+    __swig_setmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_set
+    __swig_getmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_get
+    if _newclass:variableNames = property(_TOSSIM.nesc_app_t_variableNames_get, _TOSSIM.nesc_app_t_variableNames_set)
+    __swig_setmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_set
+    __swig_getmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_get
+    if _newclass:variableTypes = property(_TOSSIM.nesc_app_t_variableTypes_get, _TOSSIM.nesc_app_t_variableTypes_set)
+    __swig_setmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_set
+    __swig_getmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_get
+    if _newclass:variableArray = property(_TOSSIM.nesc_app_t_variableArray_get, _TOSSIM.nesc_app_t_variableArray_set)
+    def __init__(self, *args):
+        _swig_setattr(self, nesc_app_t, 'this', _TOSSIM.new_nesc_app_t(*args))
+        _swig_setattr(self, nesc_app_t, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_nesc_app_t):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+
+class nesc_app_tPtr(nesc_app_t):
+    def __init__(self, this):
+        _swig_setattr(self, nesc_app_t, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, nesc_app_t, 'thisown', 0)
+        _swig_setattr(self, nesc_app_t,self.__class__,nesc_app_t)
+_TOSSIM.nesc_app_t_swigregister(nesc_app_tPtr)
+
+class Variable(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Variable, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Variable, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, Variable, 'this', _TOSSIM.new_Variable(*args))
+        _swig_setattr(self, Variable, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_Variable):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def getData(*args): return _TOSSIM.Variable_getData(*args)
+
+class VariablePtr(Variable):
+    def __init__(self, this):
+        _swig_setattr(self, Variable, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, Variable, 'thisown', 0)
+        _swig_setattr(self, Variable,self.__class__,Variable)
+_TOSSIM.Variable_swigregister(VariablePtr)
+
+class Mote(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Mote, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Mote, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, Mote, 'this', _TOSSIM.new_Mote(*args))
+        _swig_setattr(self, Mote, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_Mote):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def id(*args): return _TOSSIM.Mote_id(*args)
+    def euid(*args): return _TOSSIM.Mote_euid(*args)
+    def setEuid(*args): return _TOSSIM.Mote_setEuid(*args)
+    def bootTime(*args): return _TOSSIM.Mote_bootTime(*args)
+    def bootAtTime(*args): return _TOSSIM.Mote_bootAtTime(*args)
+    def isOn(*args): return _TOSSIM.Mote_isOn(*args)
+    def turnOff(*args): return _TOSSIM.Mote_turnOff(*args)
+    def turnOn(*args): return _TOSSIM.Mote_turnOn(*args)
+    def getVariable(*args): return _TOSSIM.Mote_getVariable(*args)
+
+class MotePtr(Mote):
+    def __init__(self, this):
+        _swig_setattr(self, Mote, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, Mote, 'thisown', 0)
+        _swig_setattr(self, Mote,self.__class__,Mote)
+_TOSSIM.Mote_swigregister(MotePtr)
+
+class Tossim(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Tossim, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Tossim, name)
+    def __repr__(self):
+        return "" % (self.this,)
+    def __init__(self, *args):
+        _swig_setattr(self, Tossim, 'this', _TOSSIM.new_Tossim(*args))
+        _swig_setattr(self, Tossim, 'thisown', 1)
+    def __del__(self, destroy=_TOSSIM.delete_Tossim):
+        try:
+            if self.thisown: destroy(self)
+        except: pass
+    def init(*args): return _TOSSIM.Tossim_init(*args)
+    def time(*args): return _TOSSIM.Tossim_time(*args)
+    def ticksPerSecond(*args): return _TOSSIM.Tossim_ticksPerSecond(*args)
+    def setTime(*args): return _TOSSIM.Tossim_setTime(*args)
+    def timeStr(*args): return _TOSSIM.Tossim_timeStr(*args)
+    def currentNode(*args): return _TOSSIM.Tossim_currentNode(*args)
+    def getNode(*args): return _TOSSIM.Tossim_getNode(*args)
+    def setCurrentNode(*args): return _TOSSIM.Tossim_setCurrentNode(*args)
+    def addChannel(*args): return _TOSSIM.Tossim_addChannel(*args)
+    def removeChannel(*args): return _TOSSIM.Tossim_removeChannel(*args)
+    def runNextEvent(*args): return _TOSSIM.Tossim_runNextEvent(*args)
+    def mac(*args): return _TOSSIM.Tossim_mac(*args)
+    def radio(*args): return _TOSSIM.Tossim_radio(*args)
+    def newPacket(*args): return _TOSSIM.Tossim_newPacket(*args)
+
+class TossimPtr(Tossim):
+    def __init__(self, this):
+        _swig_setattr(self, Tossim, 'this', this)
+        if not hasattr(self,"thisown"): _swig_setattr(self, Tossim, 'thisown', 0)
+        _swig_setattr(self, Tossim,self.__class__,Tossim)
+_TOSSIM.Tossim_swigregister(TossimPtr)
+
+
diff --git a/tos/lib/tossim/TinySchedulerC.nc b/tos/lib/tossim/TinySchedulerC.nc
new file mode 100644
index 00000000..c02df08a
--- /dev/null
+++ b/tos/lib/tossim/TinySchedulerC.nc
@@ -0,0 +1,43 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * TOSSIM-specific scheduler implementation, which models
+ * tasks as simulation events (in order to capture delay).
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation {
+  components SimSchedulerBasicP as Sched;
+  Scheduler = Sched;
+  TaskBasic = Sched;
+}
+
diff --git a/tos/lib/tossim/TossimActiveMessageP.nc b/tos/lib/tossim/TossimActiveMessageP.nc
new file mode 100644
index 00000000..c618bda7
--- /dev/null
+++ b/tos/lib/tossim/TossimActiveMessageP.nc
@@ -0,0 +1,231 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+#include 
+
+module TossimActiveMessageP {
+  provides {
+    
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+  }
+  uses {
+    interface TossimPacketModel as Model;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  message_t buffer;
+  message_t* bufferPointer = &buffer;
+  
+  tossim_header_t* getHeader(message_t* amsg) {
+    return (tossim_header_t*)(amsg->data - sizeof(tossim_header_t));
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    tossim_header_t* header = getHeader(amsg);
+    header->type = id;
+    header->addr = addr;
+    header->length = len;
+    return call Model.send((int)addr, amsg, len + sizeof(tossim_header_t));
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call Model.cancel(msg);
+  }
+  
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command void* Receive.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command void* Snoop.getPayload[am_id_t id](message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Snoop.payloadLength[am_id_t id](message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  event void Model.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  /* Receiving a packet */
+
+  event void Model.receive(message_t* msg) {
+    uint8_t len;
+    void* payload;
+    
+    memcpy(bufferPointer, msg, sizeof(message_t));
+    payload = call Packet.getPayload(bufferPointer, &len);
+
+    if (call AMPacket.isForMe(msg)) {
+      dbg("AM", "Received active message (%p) of type %hhu and length %hhu for me @ %s.\n", bufferPointer, call AMPacket.type(bufferPointer), len, sim_time_string());
+      bufferPointer = signal Receive.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len);
+    }
+    else {
+      dbg("AM", "Snooped on active message of type %hhu and length %hhu for %hu @ %s.\n", call AMPacket.type(bufferPointer), len, call AMPacket.destination(bufferPointer), sim_time_string());
+      bufferPointer = signal Snoop.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len);
+    }
+  }
+
+  event bool Model.shouldAck(message_t* msg) {
+    tossim_header_t* header = getHeader(msg);
+    if (header->addr == call amAddress()) {
+      dbg("Acks", "addressed to me so ack it,");
+      return TRUE;
+    }
+    return FALSE;
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->addr;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    tossim_header_t* header = getHeader(amsg);
+    header->addr = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+    tossim_header_t* header = getHeader(amsg);
+    header->type = t;
+  }
+ 
+  command void Packet.clear(message_t* msg) {}
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return getHeader(msg)->length;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    if (len != NULL) {
+      *len = call Packet.payloadLength(msg);
+    }
+    return msg->data;
+  }
+
+  //command am_group_t AMPacket.group(message_t* amsg) {
+  //  return amsg->header.group;
+  //}
+  
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+ default command error_t Model.send(int node, message_t* msg, uint8_t len) {
+   return FAIL;
+ }
+
+ default command error_t Model.cancel(message_t* msg) {
+   return FAIL;
+ }
+
+ default command am_addr_t amAddress() {
+   return 0;
+ }
+  
+ void active_message_deliver_handle(sim_event_t* evt) {
+   message_t* m = (message_t*)evt->data;
+   dbg("Packet", "Delivering packet to %i at %s\n", (int)sim_node(), sim_time_string());
+   signal Model.receive(m);
+ }
+ 
+ sim_event_t* allocate_deliver_event(int node, message_t* msg, sim_time_t t) {
+   sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+   evt->mote = node;
+   evt->time = t;
+   evt->handle = active_message_deliver_handle;
+   evt->cleanup = sim_queue_cleanup_event;
+   evt->cancelled = 0;
+   evt->force = 0;
+   evt->data = msg;
+   return evt;
+ }
+ 
+ void active_message_deliver(int node, message_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)) {
+   sim_event_t* evt = allocate_deliver_event(node, msg, t);
+   sim_queue_insert(evt);
+ }
+ 
+}
diff --git a/tos/lib/tossim/TossimPacketModel.nc b/tos/lib/tossim/TossimPacketModel.nc
new file mode 100644
index 00000000..9f6ffc02
--- /dev/null
+++ b/tos/lib/tossim/TossimPacketModel.nc
@@ -0,0 +1,80 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The interface to a packet-level radio simulation, which may sit
+ * on top of higher fidelity simulators.
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include 
+#include 
+
+interface TossimPacketModel {
+
+  /** 
+    * Send a packet with a data payload of len. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    */ 
+  command error_t send(int node, message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was cancelled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully cancelled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    * A successful call to cancel must always result in a 
+    * sendFailed event, and never a sendSucceeded event.
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. msg
+    * is the sent buffer, and error indicates whether the
+    * send was succesful, and if not, the cause of the failure.
+    */ 
+  event void sendDone(message_t* msg, error_t error);
+
+
+  /**
+   * Signal that a packet was received. Note that there is no buffer
+   * swap: a component using this interface must copy out the message
+   * if it needs it.
+   */
+  
+  event void receive(message_t* msg);
+
+  event bool shouldAck(message_t* msg);
+}
diff --git a/tos/lib/tossim/TossimPacketModelC.nc b/tos/lib/tossim/TossimPacketModelC.nc
new file mode 100644
index 00000000..d503330f
--- /dev/null
+++ b/tos/lib/tossim/TossimPacketModelC.nc
@@ -0,0 +1,301 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * This packet-level radio component implements a basic CSMA
+ * algorithm. It derives its constants from sim_csma.c. The algorithm
+ * is as follows:
+ *
+ * Transmit iff you measure a clear channel min_free_samples() in a row.
+ * Sample up to max_iterations() times. If you do not detect a free
+ * channel in this time, signal sendDone with an error of EBUSY.
+ * If max_iterations() is zero, then sample indefinitely.
+ *
+ * On a send request, use an initial backoff in the range of
+ * init_low() to init_high().
+ * Subsequent backoffs are in the range
+         
    (low, high) * exponent_base() ^ iterations
    
+ *
+ * The default exponent_base is 1 (constant backoff).
+ *
+ *
+ * @author Philip Levis
+ * @date Dec 16 2005
+ *
+ */
+
+#include 
+#include 
+
+module TossimPacketModelC { 
+  provides {
+    interface Init;
+    interface SplitControl as Control;
+    interface PacketAcknowledgements;
+    interface TossimPacketModel as Packet;
+  }
+  uses interface GainRadioModel;
+}
+implementation {
+  bool initialized = FALSE;
+  bool running = FALSE;
+  uint8_t backoffCount;
+  uint8_t neededFreeSamples;
+  message_t* sending = NULL;
+  uint8_t sendingLength = 0;
+  int destNode;
+  
+  message_t receiveBuffer;
+  
+  tossim_metadata_t* getMetadata(message_t* msg) {
+    return (tossim_metadata_t*)(&msg->metadata);
+  }
+  
+  command error_t Init.init() {
+    dbg("TossimPacketModelC", "TossimPacketModelC: Init.init() called\n");
+    initialized = TRUE;
+    return SUCCESS;
+  }
+
+  task void startDoneTask() {
+    running = TRUE;
+    signal Control.startDone(SUCCESS);
+  }
+
+  task void stopDoneTask() {
+    running = FALSE;
+    signal Control.stopDone(SUCCESS);
+  }
+  
+  command error_t Control.start() {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.start() called before initialization!\n");
+      return FAIL;
+    }
+    dbg("TossimPacketModelC", "TossimPacketModelC: Control.start() called.\n");
+    post startDoneTask();
+    return SUCCESS;
+  }
+  command error_t Control.stop() {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.stop() called before initialization!\n");
+      return FAIL;
+    }
+    running = FALSE;
+    dbg("TossimPacketModelC", "TossimPacketModelC: Control.stop() called.\n");
+    post stopDoneTask();
+    return SUCCESS;
+  }
+
+  
+  
+  async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+    tossim_metadata_t* meta = getMetadata(msg);
+    meta->ack = TRUE;
+    return SUCCESS;
+  }
+
+  async command error_t PacketAcknowledgements.noAck(message_t* ack) {
+    tossim_metadata_t* meta = getMetadata(ack);
+    meta->ack = FALSE;
+    return SUCCESS;
+  }
+
+  async command error_t PacketAcknowledgements.wasAcked(message_t* ack) {
+    tossim_metadata_t* meta = getMetadata(ack);
+    return meta->ack;
+  }
+
+  task void sendDoneTask() {
+    message_t* msg = sending;
+    tossim_metadata_t* meta = getMetadata(msg);
+    meta->ack = 0;
+    meta->strength = 0;
+    meta->time = 0;
+    sending = FALSE;
+    signal Packet.sendDone(msg, SUCCESS);
+  }
+
+  command error_t Packet.cancel(message_t* msg) {
+    return FAIL;
+  }
+
+  void start_csma();
+
+  command error_t Packet.send(int dest, message_t* msg, uint8_t len) {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not initialized!\n");
+      return EOFF;
+    }
+    if (!running) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not running!\n");
+      return EOFF;
+
+    }
+    if (sending != NULL) {
+      return EBUSY;
+    }
+    sendingLength = len; 
+    sending = msg;
+    destNode = dest;
+    backoffCount = 0;
+    neededFreeSamples = sim_csma_min_free_samples();
+    start_csma();
+    return SUCCESS;
+  }
+
+  sim_event_t sendEvent;
+  void send_backoff(sim_event_t* evt);
+  void send_transmit(sim_event_t* evt);
+  void send_transmit_done(sim_event_t* evt);
+  
+  void start_csma() {
+    sim_time_t first_sample;
+
+    // The backoff is in terms of symbols. So take a random number
+    // in the range of backoff times, and multiply it by the
+    // sim_time per symbol.
+    sim_time_t backoff = sim_random();
+    backoff %= (sim_csma_init_high() - sim_csma_init_low());
+    backoff += sim_csma_init_low();
+    backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+    dbg("TossimPacketModelC", "Starting CMSA with %lli.\n", backoff);
+    first_sample = sim_time() + backoff;
+
+    sendEvent.mote = sim_node();
+    sendEvent.time = first_sample;
+    sendEvent.force = 0;
+    sendEvent.cancelled = 0;
+
+    sendEvent.handle = send_backoff;
+    sendEvent.cleanup = sim_queue_cleanup_none;
+    sim_queue_insert(&sendEvent);
+  }
+
+
+  void send_backoff(sim_event_t* evt) {
+    backoffCount++;
+    if (call GainRadioModel.clearChannel()) {
+      neededFreeSamples--;
+    }
+    else {
+      neededFreeSamples = sim_csma_min_free_samples();
+    }
+    if (neededFreeSamples == 0) {
+      sim_time_t delay;
+      delay = sim_csma_rxtx_delay();
+      delay *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+      evt->time += delay;
+      
+      evt->handle = send_transmit;
+      sim_queue_insert(evt);
+    }
+    else if (sim_csma_max_iterations() == 0 ||
+	     backoffCount <= sim_csma_max_iterations()) {
+      sim_time_t backoff = sim_random();
+      sim_time_t modulo = sim_csma_high() - sim_csma_low();
+      modulo *= pow(sim_csma_exponent_base(), backoffCount);
+      backoff %= modulo;
+									
+      backoff += sim_csma_init_low();
+      backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+      evt->time += backoff;
+      sim_queue_insert(evt);
+    }
+    else {
+      message_t* rval = sending;
+      sending = NULL;
+      dbg("TossimPacketModelC", "PACKET: Failed to send packet due to busy channel.\n");
+      signal Packet.sendDone(rval, EBUSY);
+    }
+  }
+
+  int sim_packet_header_length() {
+    return sizeof(tossim_header_t);
+  }
+  
+  void send_transmit(sim_event_t* evt) {
+    sim_time_t duration;
+    tossim_metadata_t* metadata = getMetadata(sending);
+    
+    duration = 8 * (sendingLength + sim_packet_header_length());
+    duration /= sim_csma_bits_per_symbol();
+    duration += sim_csma_preamble_length();
+    
+    if (metadata->ack) {
+      duration += sim_csma_ack_time();
+    }
+    duration *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+
+    evt->time += duration;
+    evt->handle = send_transmit_done;
+
+    dbg("TossimPacketModelC", "PACKET: Broadcasting packet to everyone.\n");
+    call GainRadioModel.putOnAirTo(destNode, sending, metadata->ack, evt->time, 0.0);
+    metadata->ack = 0;
+
+    evt->time += (sim_csma_rxtx_delay() *  (sim_ticks_per_sec() / sim_csma_symbols_per_sec()));
+
+    dbg("TossimPacketModelC", "PACKET: Send done at %llu.\n", evt->time);
+	
+    sim_queue_insert(evt);
+  }
+
+  void send_transmit_done(sim_event_t* evt) {
+    message_t* rval = sending;
+    sending = NULL;
+    dbg("TossimPacketModelC", "PACKET: Signaling send done at %llu.\n", sim_time());
+    signal Packet.sendDone(rval, SUCCESS);
+  }
+
+  event void GainRadioModel.receive(message_t* msg) {
+    if (running) {
+      signal Packet.receive(msg);
+    }
+  }
+
+  uint8_t error = 0;
+  
+  event void GainRadioModel.acked(message_t* msg) {
+    if (running) {
+      tossim_metadata_t* metadata = getMetadata(sending);
+      metadata->ack = 1;
+      if (msg != sending) {
+	error = 1;
+	dbg("TossimPacketModelC", "Requested ack for 0x%x, but outgoing packet is 0x%x.\n", msg, sending);
+      }
+    }
+  }
+
+  event bool GainRadioModel.shouldAck(message_t* msg) {
+    if (running) {
+      return signal Packet.shouldAck(msg);
+    }
+    else {
+      return FALSE;
+    }
+  }
+}
+
diff --git a/tos/lib/tossim/TossimRadioMsg.h b/tos/lib/tossim/TossimRadioMsg.h
new file mode 100644
index 00000000..29b7fd88
--- /dev/null
+++ b/tos/lib/tossim/TossimRadioMsg.h
@@ -0,0 +1,22 @@
+#ifndef TOSSIM_RADIO_MSG_H
+#define TOSSIM_RADIO_MSG_H
+
+#include "AM.h"
+
+typedef nx_struct tossim_header {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_id_t type;
+} tossim_header_t;
+
+typedef nx_struct tossim_footer {
+  nxle_uint16_t crc;  
+} tossim_footer_t;
+
+typedef nx_struct tossim_metadata {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+} tossim_metadata_t;
+
+#endif
diff --git a/tos/lib/tossim/UscGainInterferenceModelC.nc b/tos/lib/tossim/UscGainInterferenceModelC.nc
new file mode 100644
index 00000000..71a18bc5
--- /dev/null
+++ b/tos/lib/tossim/UscGainInterferenceModelC.nc
@@ -0,0 +1,273 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * This interference model is based off experimental data gathered
+ * from mica2 nodes by Dongjin Son and Bhaskar Krishnamachari at USC.
+ * It simplifies their observations in two ways. First, rather than
+ * a smooth curve, this model makes a binary interference assumption
+ * when the packets are within 3dBm of each other (their curve is very
+ * sharp, so this seems like an OK simplification for now). Second,
+ * it uses an additive signal strength model for interference. Their
+ * results (as one might expect from colliding sinusoids) show that
+ * interference signal strength is more complex than this.
+ *
+ * @author Philip Levis
+ * @date   Jun 1 2006
+ */ 
+
+#include 
+
+module UscGainInterferenceModelC {
+  provides interface GainRadioModel as Model;
+}
+
+implementation {
+
+  
+  message_t* outgoing; // If I'm sending, this is my outgoing packet
+  bool requestAck;
+  bool receiving = 0;  // Whether or not I think I'm receiving a packet
+  struct receive_message;
+  typedef struct receive_message receive_message_t;
+  
+  struct receive_message {
+    int source;
+    sim_time_t start;
+    sim_time_t end;
+    double power;
+    bool lost;
+    bool ack;
+    message_t* msg;
+    receive_message_t* next;
+  };
+
+  receive_message_t* outstandingReceptionHead = NULL;
+
+  receive_message_t* allocate_receive_message();
+  sim_event_t* allocate_receive_event(sim_time_t t, receive_message_t* m);
+
+  /**
+   * Heard signal is equal to the signal strength of ambient noise
+   * plus the signal strength of all transmissions. The pow() and
+   * log() calls transform dBm into energy and back.
+   */
+  
+  double heardSignal() {
+    receive_message_t* current = outstandingReceptionHead;
+    double localNoise = sim_gain_sample_noise(sim_node());
+    double sig = pow(10.0, localNoise / 10.0);
+    dbg("Gain", "Computing noise @ %s: %0.2f", sim_time_string(), localNoise);
+    while (current != NULL) {
+      sig += pow(10.0, current->power / 10.0);
+      	dbg_clear("Gain", " ");
+      if (current->power >= 0.0) {
+	dbg_clear("Gain", "+");
+      }
+      dbg_clear("Gain", "%0.2f ", current->power);
+      current = current->next;
+    }
+    dbg_clear("Gain", " = %0.2f\n", 10.0 * log(sig) / log(10.0));
+    return 10.0 * log(sig) / log(10.0);
+  }
+  
+  void sim_gain_ack_handle(sim_event_t* evt)  {
+    if (outgoing != NULL && requestAck && sim_mote_is_on(sim_node())) {
+      signal Model.acked(outgoing);
+    }
+  }
+
+  sim_event_t receiveEvent;
+  // This clear threshold comes from the CC2420 data sheet
+  double clearThreshold = -95.0;
+  bool collision = FALSE;
+  message_t* incoming = NULL;
+  int incomingSource;
+
+  command void Model.setClearValue(double value) {
+    clearThreshold = value;
+    dbg("Gain", "Setting clear threshold to %f\n", clearThreshold);
+	
+  }
+  
+  command bool Model.clearChannel() {
+    double channel = heardSignal();
+    dbg("Gain", "Checking clear channel @ %s: %f <= %f \n", sim_time_string(), channel, clearThreshold);
+    return channel < clearThreshold;
+  }
+
+  void sim_gain_schedule_ack(int source, sim_time_t t) {
+    sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t));
+    ackEvent->mote = source;
+    ackEvent->force = 1;
+    ackEvent->cancelled = 0;
+    ackEvent->time = t;
+    ackEvent->handle = sim_gain_ack_handle;
+    ackEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(ackEvent);
+  }
+
+  void sim_gain_receive_handle(sim_event_t* evt) {
+    receive_message_t* mine = (receive_message_t*)evt->data;
+    receive_message_t* predecessor = NULL;
+    receive_message_t* list = outstandingReceptionHead;
+    dbg("Gain", "Handling reception event @ %s.\n", sim_time_string());
+    while (list != NULL) {
+      if (list->next == mine) {
+	predecessor = list;
+      }
+      if (list != mine) {
+	if ((list->power - sim_gain_sensitivity()) < heardSignal()) {
+	  dbg("Gain", "Lost packet from %i as power %lf was too low\n", list->source, list->power);
+	  list->lost = 1;
+	}
+      }
+      list = list->next;
+    }
+    if (predecessor) {
+      predecessor->next = mine->next;
+    }
+    else if (mine == outstandingReceptionHead) { // must be head
+      outstandingReceptionHead = mine->next;
+    }
+    else {
+      dbgerror("Gain", "Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n");
+    }
+
+    if ((mine->power - sim_gain_sensitivity()) < heardSignal()) {
+      dbg("Gain", "Lost packet as power %lf was too low\n", mine->power);
+      mine->lost = 1;
+    }
+    
+    if (!mine->lost) {
+      dbg_clear("Gain", "  -signaling reception, ");
+      signal Model.receive(mine->msg);
+      if (mine->ack) {
+        dbg_clear("Gain", " acknowledgment requested, ");
+      }
+      else {
+        dbg_clear("Gain", " no acknowledgment requested.\n");
+      }
+      // If we scheduled an ack, receiving = 0 when it completes
+      if (mine->ack && signal Model.shouldAck(mine->msg)) {
+        dbg_clear("Gain", " scheduling ack.\n");
+	sim_gain_schedule_ack(mine->source, sim_time() + 1); 
+      }
+      // We're searching for new packets again
+      receiving = 0;
+    } // If the packet was lost, then we're searching for new packets again
+    else {
+      receiving = 0;
+      dbg_clear("Gain", "  -packet was lost.\n");
+    }
+    free(mine);
+  }
+  
+  
+  // Create a record that a node is receiving a packet,
+  // enqueue a receive event to figure out what happens.
+  void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg, bool receive, double power) {
+    sim_event_t* evt;
+    receive_message_t* rcv = allocate_receive_message();
+    double sigStr = heardSignal();
+    rcv->source = source;
+    rcv->start = sim_time();
+    rcv->end = endTime;
+    rcv->power = power;
+    rcv->msg = msg;
+    rcv->lost = 0;
+    rcv->ack = receive;
+    
+    // If I'm off, I never receive the packet, but I need to keep track of
+    // it in case I turn on and someone else starts sending me a weaker
+    // packet. So I don't set receiving to 1, but I keep track of
+    // the signal strength.
+    if (!sim_mote_is_on(sim_node())) { 
+      dbg("Gain", "Lost packet from %i due to %i being off\n", source, sim_node());
+      rcv->lost = 1;
+    }
+    else {
+      if ((sigStr + sim_gain_sensitivity()) >= power) {
+	dbg("Gain", "Lost packet from %i due to power being too low (%f >= %f)\n", source, sigStr, power);
+	rcv->lost = 1;
+      }
+      else if (receiving) {
+	dbg("Gain", "Lost packet from %i due to being in the midst of a reception.\n", source);
+	rcv->lost = 1;
+      }
+      if (power >= sim_gain_noise_mean(sim_node()) + sim_gain_noise_range(sim_node())) {
+	receiving = 1;
+      }
+    }
+    rcv->next = outstandingReceptionHead;
+    
+    outstandingReceptionHead = rcv;
+    evt = allocate_receive_event(endTime, rcv);
+    sim_queue_insert(evt);
+  }
+  
+  void sim_gain_put(int dest, message_t* msg, sim_time_t endTime, bool receive, double power) {
+    int prevNode = sim_node();
+    dbg("Gain", "Enqueing reception event for %i at %llu.\n", dest, endTime);
+    sim_set_node(dest);
+    enqueue_receive_event(prevNode, endTime, msg, receive, power);
+    sim_set_node(prevNode);
+  }
+
+  command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double power) {
+    gain_entry_t* link = sim_gain_first(sim_node());
+    requestAck = ack;
+    outgoing = msg;
+    dbg("Gain", "Node %i transmitting to %i, finishes at %llu.\n", sim_node(), dest, endTime);
+
+    while (link != NULL) {
+      int other = link->mote;
+      sim_gain_put(other, msg, endTime, ack && (other == dest), power + link->gain);
+      link = sim_gain_next(link);
+    }
+  }
+    
+
+  
+  
+ default event void Model.receive(message_t* msg) {}
+
+ sim_event_t* allocate_receive_event(sim_time_t endTime, receive_message_t* msg) {
+   sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+   evt->mote = sim_node();
+   evt->time = endTime;
+   evt->handle = sim_gain_receive_handle;
+   evt->cleanup = sim_queue_cleanup_event;
+   evt->cancelled = 0;
+   evt->force = 1; // Need to keep track of air even when node is off
+   evt->data = msg;
+   return evt;
+ }
+
+ receive_message_t* allocate_receive_message() {
+   return (receive_message_t*)malloc(sizeof(receive_message_t));
+ }
+ 
+}
diff --git a/tos/lib/tossim/csma.c b/tos/lib/tossim/csma.c
new file mode 100644
index 00000000..a27f7f1d
--- /dev/null
+++ b/tos/lib/tossim/csma.c
@@ -0,0 +1,63 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * C++ implementation of the default TOSSIM CSMA model.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include 
+
+Csma::Csma() {}
+Csma::~Csma() {}
+
+int Csma::initHigh() {return sim_csma_init_high();}
+int Csma::initLow() {return sim_csma_init_low();}
+int Csma::high() {return sim_csma_high();}
+int Csma::low() {return sim_csma_low();}
+int Csma::symbolsPerSec() {return sim_csma_symbols_per_sec();}
+int Csma::bitsPerSymbol() {return sim_csma_bits_per_symbol();}
+int Csma::preambleLength() {return sim_csma_preamble_length();}
+int Csma::exponentBase() {return sim_csma_exponent_base();}
+int Csma::maxIterations() {return sim_csma_max_iterations();}
+int Csma::minFreeSamples() {return sim_csma_min_free_samples();}
+int Csma::rxtxDelay() {return sim_csma_rxtx_delay();}
+int Csma::ackTime() {return sim_csma_ack_time();}
+
+void Csma::setInitHigh(int val) {sim_csma_set_init_high(val);}
+void Csma::setInitLow(int val) {sim_csma_set_init_low(val);}
+void Csma::setHigh(int val) {sim_csma_set_high(val);}
+void Csma::setLow(int val) {sim_csma_set_low(val);}
+void Csma::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);}
+void Csma::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);}
+void Csma::setPreambleLength(int val) {sim_csma_set_preamble_length(val);}
+void Csma::setExponentBase(int val) {sim_csma_set_exponent_base(val);}
+void Csma::setMaxIterations(int val) {sim_csma_set_max_iterations(val);}
+void Csma::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);}
+void Csma::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);}
+void Csma::setAckTime(int val); {sim_csma_set_ack_time(val);}
+
+#endif
diff --git a/tos/lib/tossim/csma.h b/tos/lib/tossim/csma.h
new file mode 100644
index 00000000..a24e2d7f
--- /dev/null
+++ b/tos/lib/tossim/csma.h
@@ -0,0 +1,67 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef CSMA_H_INCLUDED
+#define CSMA_H_INCLUDED
+
+class Csma {
+ public:
+  Csma();
+  ~Csma();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength(); // in symbols
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); // in symbols
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val); // in symbols
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val); // in symbols int 
+}
+
+#endif
diff --git a/tos/lib/tossim/examples/packets.py b/tos/lib/tossim/examples/packets.py
new file mode 100644
index 00000000..465d4bbd
--- /dev/null
+++ b/tos/lib/tossim/examples/packets.py
@@ -0,0 +1,45 @@
+# This file is an example Python script from the TOSSIM tutorial.
+# It is intended to be used with the RadioCountToLeds application.
+
+import sys
+from TOSSIM import *
+from RadioCountMsg import *
+
+t = Tossim([])
+m = t.mac();
+r = t.radio();
+
+t.addChannel("RadioCountToLedsC", sys.stdout);
+t.addChannel("LedsC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range(0, 60):
+  t.runNextEvent();
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
+print "Delivering " + msg.__str__() + " to 0 at " + str(t.time() + 3);
+pkt.deliver(0, t.time() + 3)
+
+
+for i in range(0, 20):
+  t.runNextEvent();
+
diff --git a/tos/lib/tossim/examples/variables.py b/tos/lib/tossim/examples/variables.py
new file mode 100644
index 00000000..58b24c4e
--- /dev/null
+++ b/tos/lib/tossim/examples/variables.py
@@ -0,0 +1,30 @@
+# This is an example script from the TOSSIM tutorials.
+# It can be used with any TinyOS application.
+
+from tinyos.tossim.TossimApp import *
+from TOSSIM import *
+
+n = NescApp()
+t = Tossim(n.variables.variables())
+m = t.getNode(0)
+
+for i in range(0, 1):
+  m = t.getNode(i);
+  time = ((79 + t.ticksPerSecond() / 100) * i + 1)
+  m.bootAtTime(time);
+  print "Mote " + str(i) + " set to boot at " + str(time);
+
+for i in range(0, 500):
+  t.runNextEvent();
+
+v = m.getVariable("SimMoteP.startTime")
+v2 = m.getVariable("SimSchedulerBasicP.m_head");
+
+print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">"
+
+for i in range(0, 500):
+  t.runNextEvent();
+
+print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">"
+
+
diff --git a/tos/lib/tossim/gain/line70nodes.txt b/tos/lib/tossim/gain/line70nodes.txt
new file mode 100644
index 00000000..b0734d1f
--- /dev/null
+++ b/tos/lib/tossim/gain/line70nodes.txt
@@ -0,0 +1,75 @@
+% This is the sample topology file (chain topology), the node id should start with 0
+% The format is 
+%   nodeid  x  y
+
+0	0	0
+1	1	0
+2	2	0
+3	3	0
+4	4	0
+5	5	0
+6	6	0
+7	7	0
+8	8	0
+9	9	0
+10	10	0
+11	11	0
+12	12	0
+13	13	0
+14	14	0
+15	15	0
+16	16	0
+17	17	0
+18	18	0
+19	19	0
+20	20	0
+21	21	0
+22	22	0
+23	23	0
+24	24	0
+25	25	0
+26	26	0
+27	27	0
+28	28	0
+29	29	0
+30	30	0
+31	31	0
+32	32	0
+33	33	0
+34	34	0
+35	35	0
+36	36	0
+37	37	0
+38	38	0
+39	39	0
+40	40	0
+41	41	0
+42	42	0
+43	43	0
+44	44	0
+45	45	0
+46	46	0
+47	47	0
+48	48	0
+49	49	0
+50	50	0
+51	51	0
+52	52	0
+53	53	0
+54	54	0
+55	55	0
+56	56	0
+57	57	0
+58	58	0
+59	59	0
+60	60	0
+61	61	0
+62	62	0
+63	63	0
+64	64	0
+65	65	0
+66	66	0
+67	67	0
+68	68	0
+69	69	0
+70	70	0
diff --git a/tos/lib/tossim/gain/mica2grid.txt b/tos/lib/tossim/gain/mica2grid.txt
new file mode 100644
index 00000000..77a6b1d0
--- /dev/null
+++ b/tos/lib/tossim/gain/mica2grid.txt
@@ -0,0 +1,128 @@
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+%
+% "Copyright (c) 2004 The University of Southern California"
+% All rights reserved.
+%
+% Permission to use, copy, modify, and distribute this software and its
+% documentation for any purpose, without fee, and without written agreement
+% is hereby granted, provided that the above copyright notice, the following
+% two paragraphs and the author appear in all copies of this software.
+%	
+% NO REPRESENTATIONS ARE MADE ABOUT THE SUITABILITY OF THE SOFTWARE FOR ANY
+% PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY.
+%
+% Neither the software developers, the Autonomous Network Research Group
+% (ANRG), or USC, shall be liable for any damages suffered from using this
+% software.
+%
+% Author:		Marco Zuniga
+% Director: Prof. Bhaskar Krishnamachari
+% Autonomous Networks Research Group, University of Southern California
+% http://ceng.usc.edu/~anrg/
+% Contact: marcozun@usc.edu
+%
+% Date last modified:	2004/06/23 marcozun
+%
+% Description:  configuration file for link gain model
+%
+% This example configuration file will produce a network topology for TOSSIM
+% that represents a mica2 network deployed in a tight (1m spacing) 15x15 grid.
+%
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%
+%
+% Channel Parameters
+%
+%%%%%%%%%%%%%%%%%%%%%%
+%
+% The channel model is based on the Log-Normal Shadowing Path Loss Model.
+% It defines the gain at which other nodes receive a signal when a node
+% transmits. All values must be positive. Parameters:
+%     PATH_LOSS_EXPONENT           an adimensional constant
+%     SHADOWING_STANDARD_DEVIATION in dB
+%     PL_D0                        close-in reference pathloss, in dB 
+%     D0                           close-in reference distance, in meters 
+
+PATH_LOSS_EXPONENT = 3.0;
+SHADOWING_STANDARD_DEVIATION = 4.0;
+PL_D0 = 55.0;
+D0 = 1.0;
+
+%%%%%%%%%%%%%%%%%%%%
+%
+% Radio Parameters 
+%
+%%%%%%%%%%%%%%%%%%%%
+%
+% The radio parameters provide a mechanism to incorporate node variations.
+% These variations introduce link asymmetry. The variations have a static
+% and a dynamic component. WHITE_GAUSSIAN_NOISE encodes the dynamic
+% variation of a node's noise floor readings at runtime, while the
+% covariance matrix encodes the static differences in noise floor and
+% output strength across nodes.
+%
+% Parameters:
+%     NOISE_FLOOR          the baseline noise floor in dBm
+%     WHITE_GAUSSIAN_NOISE the standard deviation of noise measurements
+%     S11, S12, S21, S22   the values of the covariance matrix that
+%                          represents hardware variations.
+%     S11                  the per-node variance of the noise floor
+%     S12                  covariance between noise floor and output power
+%     S21                  must be equal to S12
+%     S22                  the per-node variance of output power
+
+
+NOISE_FLOOR = -105.0;
+WHITE_GAUSSIAN_NOISE = 4;
+
+% These values are for MICA2 radios.
+S11 = 3.7;
+S12 = -3.3;
+S21 = -3.3;
+S22 = 6.0;
+
+%%%%%%%%%%%%%%%%%%%%%%%
+%		  
+% Topology Parameters 
+%		  
+%%%%%%%%%%%%%%%%%%%%%%%
+%
+% Terrain dimensions and node positions are in meters.
+% Parameters:
+%     TOPOLOGY       the basic topology to use, whose valid values are:
+%                      1 for a GRID
+%                      2 for a UNIFORM distribution
+%                      3 for a RANDOM distribution
+%                      4 for positions read from a FILE
+%                    details:
+%                      o GRID: Node placement starts at (0, 0). You must
+%                      specify the GRID_UNIT variable (spacing in meters).
+%                      The number of nodes has to be square of an integer.
+%                      o UNIFORM: Based on the number of nodes, the physical
+%                      terrain is divided into a number of cells. Within
+%                      each cell, a node is placed randomly.
+%                      o RANDOM: Nodes are placed randomly within the physical
+%                      terrain.
+%                      o FILE: Position of nodes is read from TOPOLOGY_FILE
+%                      (user-defined). The format of the file is:
+%                           nodeid  Xcoordinate  Ycoordinate
+%                      The nodeid values must start with 0.
+%     TERRAIN_DIMENSIONS_X the width of the terrain area (meters)
+%     TERRAIN_DIMENSIONS_Y the depth of the terrain area (meters)
+%                          
+
+TOPOLOGY = 1;
+GRID_UNIT = 5.0;
+NUMBER_OF_NODES = 225;
+
+% topology file provided by user
+%TOPOLOGY_FILE = topologyFile.m;
+
+% Physical terrain (meters), not required when user provides topology file
+% nor in GRID topologies.
+% The density (NUMBER_OF_NODES / area) can not be higher than
+% 0.5 nodes / D0^2.
+%TERRAIN_DIMENSIONS_X = 50.0;
+%TERRAIN_DIMENSIONS_Y = 50.0;
+
diff --git a/tos/lib/tossim/generate-swig.bash b/tos/lib/tossim/generate-swig.bash
new file mode 100644
index 00000000..67f84c27
--- /dev/null
+++ b/tos/lib/tossim/generate-swig.bash
@@ -0,0 +1,31 @@
+#!/bin/bash
+
+# "Copyright (c) 2005 Stanford University. All rights reserved.
+#
+# Permission to use, copy, modify, and distribute this software and
+# its documentation for any purpose, without fee, and without written
+# agreement is hereby granted, provided that the above copyright
+# notice, the following two paragraphs and the author appear in all
+# copies of this software.
+# 
+# IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+# ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+# IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+# DAMAGE.
+# 
+# STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+# INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+# PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+# HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+# ENHANCEMENTS, OR MODIFICATIONS."
+#
+# Simple script that generates the Python interfaces to TOSSIM.
+#
+# Author: Philip Levis
+#
+# $Id$
+
+swig -shadow -python -c++ tossim.i
+
diff --git a/tos/lib/tossim/hardware.h b/tos/lib/tossim/hardware.h
new file mode 100644
index 00000000..4e31f1bd
--- /dev/null
+++ b/tos/lib/tossim/hardware.h
@@ -0,0 +1 @@
+#include 
diff --git a/tos/lib/tossim/hashtable.c b/tos/lib/tossim/hashtable.c
new file mode 100644
index 00000000..f1452011
--- /dev/null
+++ b/tos/lib/tossim/hashtable.c
@@ -0,0 +1,274 @@
+/* Copyright (C) 2004 Christopher Clark  */
+
+#include "hashtable.h"
+#include "hashtable_private.h"
+#include 
+#include 
+#include 
+#include 
+
+/*
+Credit for primes table: Aaron Krowne
+ http://br.endernet.org/~akrowne/
+ http://planetmath.org/encyclopedia/GoodHashTablePrimes.html
+*/
+static const unsigned int primes[] = {
+53, 97, 193, 389,
+769, 1543, 3079, 6151,
+12289, 24593, 49157, 98317,
+196613, 393241, 786433, 1572869,
+3145739, 6291469, 12582917, 25165843,
+50331653, 100663319, 201326611, 402653189,
+805306457, 1610612741
+};
+const unsigned int prime_table_length = sizeof(primes)/sizeof(primes[0]);
+const float max_load_factor = 0.65;
+
+/*****************************************************************************/
+struct hashtable *
+create_hashtable(unsigned int minsize,
+                 unsigned int (*hashf) (void*),
+                 int (*eqf) (void*,void*))
+{
+    struct hashtable *h;
+    unsigned int pindex, size = primes[0];
+    /* Check requested hashtable isn't too large */
+    if (minsize > (1u << 30)) return NULL;
+    /* Enforce size as prime */
+    for (pindex=0; pindex < prime_table_length; pindex++) {
+        if (primes[pindex] > minsize) { size = primes[pindex]; break; }
+    }
+    h = (struct hashtable *)malloc(sizeof(struct hashtable));
+    if (NULL == h) return NULL; /*oom*/
+    h->table = (struct entry **)malloc(sizeof(struct entry*) * size);
+    if (NULL == h->table) { free(h); return NULL; } /*oom*/
+    memset(h->table, 0, size * sizeof(struct entry *));
+    h->tablelength  = size;
+    h->primeindex   = pindex;
+    h->entrycount   = 0;
+    h->hashfn       = hashf;
+    h->eqfn         = eqf;
+    h->loadlimit    = (unsigned int) ceil(size * max_load_factor);
+    return h;
+}
+
+/*****************************************************************************/
+unsigned int
+hash(struct hashtable *h, void *k)
+{
+    /* Aim to protect against poor hash functions by adding logic here
+     * - logic taken from java 1.4 hashtable source */
+    unsigned int i = h->hashfn(k);
+    i += ~(i << 9);
+    i ^=  ((i >> 14) | (i << 18)); /* >>> */
+    i +=  (i << 4);
+    i ^=  ((i >> 10) | (i << 22)); /* >>> */
+    return i;
+}
+
+/*****************************************************************************/
+static int
+hashtable_expand(struct hashtable *h)
+{
+    /* Double the size of the table to accomodate more entries */
+    struct entry **newtable;
+    struct entry *e;
+    struct entry **pE;
+    unsigned int newsize, i, tindex;
+    /* Check we're not hitting max capacity */
+    if (h->primeindex == (prime_table_length - 1)) return 0;
+    newsize = primes[++(h->primeindex)];
+
+    newtable = (struct entry **)malloc(sizeof(struct entry*) * newsize);
+    if (NULL != newtable)
+    {
+        memset(newtable, 0, newsize * sizeof(struct entry *));
+        /* This algorithm is not 'stable'. ie. it reverses the list
+         * when it transfers entries between the tables */
+        for (i = 0; i < h->tablelength; i++) {
+            while (NULL != (e = h->table[i])) {
+                h->table[i] = e->next;
+                tindex = indexFor(newsize,e->h);
+                e->next = newtable[tindex];
+                newtable[tindex] = e;
+            }
+        }
+        free(h->table);
+        h->table = newtable;
+    }
+    /* Plan B: realloc instead */
+    else 
+    {
+        newtable = (struct entry **)
+                   realloc(h->table, newsize * sizeof(struct entry *));
+        if (NULL == newtable) { (h->primeindex)--; return 0; }
+        h->table = newtable;
+        memset(newtable[h->tablelength], 0, newsize - h->tablelength);
+        for (i = 0; i < h->tablelength; i++) {
+            for (pE = &(newtable[i]), e = *pE; e != NULL; e = *pE) {
+                tindex = indexFor(newsize,e->h);
+                if (tindex == i)
+                {
+                    pE = &(e->next);
+                }
+                else
+                {
+                    *pE = e->next;
+                    e->next = newtable[tindex];
+                    newtable[tindex] = e;
+                }
+            }
+        }
+    }
+    h->tablelength = newsize;
+    h->loadlimit   = (unsigned int) ceil(newsize * max_load_factor);
+    return -1;
+}
+
+/*****************************************************************************/
+unsigned int
+hashtable_count(struct hashtable *h)
+{
+    return h->entrycount;
+}
+
+/*****************************************************************************/
+int
+hashtable_insert(struct hashtable *h, void *k, void *v)
+{
+    /* This method allows duplicate keys - but they shouldn't be used */
+    unsigned int tindex;
+    struct entry *e;
+    if (++(h->entrycount) > h->loadlimit)
+    {
+        /* Ignore the return value. If expand fails, we should
+         * still try cramming just this value into the existing table
+         * -- we may not have memory for a larger table, but one more
+         * element may be ok. Next time we insert, we'll try expanding again.*/
+        hashtable_expand(h);
+    }
+    e = (struct entry *)malloc(sizeof(struct entry));
+    if (NULL == e) { --(h->entrycount); return 0; } /*oom*/
+    e->h = hash(h,k);
+    tindex = indexFor(h->tablelength,e->h);
+    e->k = k;
+    e->v = v;
+    e->next = h->table[tindex];
+    h->table[tindex] = e;
+    return -1;
+}
+
+/*****************************************************************************/
+void * /* returns value associated with key */
+hashtable_search(struct hashtable *h, void *k)
+{
+    struct entry *e;
+    unsigned int hashvalue, tindex;
+    hashvalue = hash(h,k);
+    tindex = indexFor(h->tablelength,hashvalue);
+    e = h->table[tindex];
+    while (NULL != e)
+    {
+        /* Check hash value to short circuit heavier comparison */
+        if ((hashvalue == e->h) && (h->eqfn(k, e->k))) return e->v;
+        e = e->next;
+    }
+    return NULL;
+}
+
+/*****************************************************************************/
+void * /* returns value associated with key */
+hashtable_remove(struct hashtable *h, void *k)
+{
+    /* TODO: consider compacting the table when the load factor drops enough,
+     *       or provide a 'compact' method. */
+
+    struct entry *e;
+    struct entry **pE;
+    void *v;
+    unsigned int hashvalue, tindex;
+
+    hashvalue = hash(h,k);
+    tindex = indexFor(h->tablelength,hash(h,k));
+    pE = &(h->table[tindex]);
+    e = *pE;
+    while (NULL != e)
+    {
+        /* Check hash value to short circuit heavier comparison */
+        if ((hashvalue == e->h) && (h->eqfn(k, e->k)))
+        {
+            *pE = e->next;
+            h->entrycount--;
+            v = e->v;
+            freekey(e->k);
+            free(e);
+            return v;
+        }
+        pE = &(e->next);
+        e = e->next;
+    }
+    return NULL;
+}
+
+/*****************************************************************************/
+/* destroy */
+void
+hashtable_destroy(struct hashtable *h, int free_values)
+{
+    unsigned int i;
+    struct entry *e, *f;
+    struct entry **table = h->table;
+    if (free_values)
+    {
+        for (i = 0; i < h->tablelength; i++)
+        {
+            e = table[i];
+            while (NULL != e)
+            { f = e; e = e->next; freekey(f->k); free(f->v); free(f); }
+        }
+    }
+    else
+    {
+        for (i = 0; i < h->tablelength; i++)
+        {
+            e = table[i];
+            while (NULL != e)
+            { f = e; e = e->next; freekey(f->k); free(f); }
+        }
+    }
+    free(h->table);
+    free(h);
+}
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
diff --git a/tos/lib/tossim/hashtable.h b/tos/lib/tossim/hashtable.h
new file mode 100644
index 00000000..b90781ab
--- /dev/null
+++ b/tos/lib/tossim/hashtable.h
@@ -0,0 +1,199 @@
+/* Copyright (C) 2002 Christopher Clark  */
+
+#ifndef __HASHTABLE_CWC22_H__
+#define __HASHTABLE_CWC22_H__
+
+struct hashtable;
+
+/* Example of use:
+ *
+ *      struct hashtable  *h;
+ *      struct some_key   *k;
+ *      struct some_value *v;
+ *
+ *      static unsigned int         hash_from_key_fn( void *k );
+ *      static int                  keys_equal_fn ( void *key1, void *key2 );
+ *
+ *      h = create_hashtable(16, hash_from_key_fn, keys_equal_fn);
+ *      k = (struct some_key *)     malloc(sizeof(struct some_key));
+ *      v = (struct some_value *)   malloc(sizeof(struct some_value));
+ *
+ *      (initialise k and v to suitable values)
+ * 
+ *      if (! hashtable_insert(h,k,v) )
+ *      {     exit(-1);               }
+ *
+ *      if (NULL == (found = hashtable_search(h,k) ))
+ *      {    printf("not found!");                  }
+ *
+ *      if (NULL == (found = hashtable_remove(h,k) ))
+ *      {    printf("Not found\n");                 }
+ *
+ */
+
+/* Macros may be used to define type-safe(r) hashtable access functions, with
+ * methods specialized to take known key and value types as parameters.
+ * 
+ * Example:
+ *
+ * Insert this at the start of your file:
+ *
+ * DEFINE_HASHTABLE_INSERT(insert_some, struct some_key, struct some_value);
+ * DEFINE_HASHTABLE_SEARCH(search_some, struct some_key, struct some_value);
+ * DEFINE_HASHTABLE_REMOVE(remove_some, struct some_key, struct some_value);
+ *
+ * This defines the functions 'insert_some', 'search_some' and 'remove_some'.
+ * These operate just like hashtable_insert etc., with the same parameters,
+ * but their function signatures have 'struct some_key *' rather than
+ * 'void *', and hence can generate compile time errors if your program is
+ * supplying incorrect data as a key (and similarly for value).
+ *
+ * Note that the hash and key equality functions passed to create_hashtable
+ * still take 'void *' parameters instead of 'some key *'. This shouldn't be
+ * a difficult issue as they're only defined and passed once, and the other
+ * functions will ensure that only valid keys are supplied to them.
+ *
+ * The cost for this checking is increased code size and runtime overhead
+ * - if performance is important, it may be worth switching back to the
+ * unsafe methods once your program has been debugged with the safe methods.
+ * This just requires switching to some simple alternative defines - eg:
+ * #define insert_some hashtable_insert
+ *
+ */
+
+/*****************************************************************************
+ * create_hashtable
+   
+ * @name                    create_hashtable
+ * @param   minsize         minimum initial size of hashtable
+ * @param   hashfunction    function for hashing keys
+ * @param   key_eq_fn       function for determining key equality
+ * @return                  newly created hashtable or NULL on failure
+ */
+
+struct hashtable *
+create_hashtable(unsigned int minsize,
+                 unsigned int (*hashfunction) (void*),
+                 int (*key_eq_fn) (void*,void*));
+
+/*****************************************************************************
+ * hashtable_insert
+   
+ * @name        hashtable_insert
+ * @param   h   the hashtable to insert into
+ * @param   k   the key - hashtable claims ownership and will free on removal
+ * @param   v   the value - does not claim ownership
+ * @return      non-zero for successful insertion
+ *
+ * This function will cause the table to expand if the insertion would take
+ * the ratio of entries to table size over the maximum load factor.
+ *
+ * This function does not check for repeated insertions with a duplicate key.
+ * The value returned when using a duplicate key is undefined -- when
+ * the hashtable changes size, the order of retrieval of duplicate key
+ * entries is reversed.
+ * If in doubt, remove before insert.
+ */
+
+int 
+hashtable_insert(struct hashtable *h, void *k, void *v);
+
+#define DEFINE_HASHTABLE_INSERT(fnname, keytype, valuetype) \
+int fnname (struct hashtable *h, keytype *k, valuetype *v) \
+{ \
+    return hashtable_insert(h,k,v); \
+}
+
+/*****************************************************************************
+ * hashtable_search
+   
+ * @name        hashtable_search
+ * @param   h   the hashtable to search
+ * @param   k   the key to search for  - does not claim ownership
+ * @return      the value associated with the key, or NULL if none found
+ */
+
+void *
+hashtable_search(struct hashtable *h, void *k);
+
+#define DEFINE_HASHTABLE_SEARCH(fnname, keytype, valuetype) \
+valuetype * fnname (struct hashtable *h, keytype *k) \
+{ \
+    return (valuetype *) (hashtable_search(h,k)); \
+}
+
+/*****************************************************************************
+ * hashtable_remove
+   
+ * @name        hashtable_remove
+ * @param   h   the hashtable to remove the item from
+ * @param   k   the key to search for  - does not claim ownership
+ * @return      the value associated with the key, or NULL if none found
+ */
+
+void * /* returns value */
+hashtable_remove(struct hashtable *h, void *k);
+
+#define DEFINE_HASHTABLE_REMOVE(fnname, keytype, valuetype) \
+valuetype * fnname (struct hashtable *h, keytype *k) \
+{ \
+    return (valuetype *) (hashtable_remove(h,k)); \
+}
+
+
+/*****************************************************************************
+ * hashtable_count
+   
+ * @name        hashtable_count
+ * @param   h   the hashtable
+ * @return      the number of items stored in the hashtable
+ */
+unsigned int
+hashtable_count(struct hashtable *h);
+
+
+/*****************************************************************************
+ * hashtable_destroy
+   
+ * @name        hashtable_destroy
+ * @param   h   the hashtable
+ * @param       free_values     whether to call 'free' on the remaining values
+ */
+
+void
+hashtable_destroy(struct hashtable *h, int free_values);
+
+#endif /* __HASHTABLE_CWC22_H__ */
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
diff --git a/tos/lib/tossim/hashtable_private.h b/tos/lib/tossim/hashtable_private.h
new file mode 100644
index 00000000..3e95f600
--- /dev/null
+++ b/tos/lib/tossim/hashtable_private.h
@@ -0,0 +1,85 @@
+/* Copyright (C) 2002, 2004 Christopher Clark  */
+
+#ifndef __HASHTABLE_PRIVATE_CWC22_H__
+#define __HASHTABLE_PRIVATE_CWC22_H__
+
+#include "hashtable.h"
+
+/*****************************************************************************/
+struct entry
+{
+    void *k, *v;
+    unsigned int h;
+    struct entry *next;
+};
+
+struct hashtable {
+    unsigned int tablelength;
+    struct entry **table;
+    unsigned int entrycount;
+    unsigned int loadlimit;
+    unsigned int primeindex;
+    unsigned int (*hashfn) (void *k);
+    int (*eqfn) (void *k1, void *k2);
+};
+
+/*****************************************************************************/
+unsigned int
+hash(struct hashtable *h, void *k);
+
+/*****************************************************************************/
+/* indexFor */
+static inline unsigned int
+indexFor(unsigned int tablelength, unsigned int hashvalue) {
+    return (hashvalue % tablelength);
+};
+
+/* Only works if tablelength == 2^N */
+/*static inline unsigned int
+indexFor(unsigned int tablelength, unsigned int hashvalue)
+{
+    return (hashvalue & (tablelength - 1u));
+}
+*/
+
+/*****************************************************************************/
+#define freekey(X) free(X)
+/*define freekey(X) ; */
+
+
+/*****************************************************************************/
+
+#endif /* __HASHTABLE_PRIVATE_CWC22_H__*/
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
diff --git a/tos/lib/tossim/heap.c b/tos/lib/tossim/heap.c
new file mode 100644
index 00000000..e82eccea
--- /dev/null
+++ b/tos/lib/tossim/heap.c
@@ -0,0 +1,199 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* Authors:             Philip Levis
+ *
+ */
+
+/*
+ *   FILE: heap.h
+ * AUTHOR: Philip Levis 
+ *   DESC: Simple array-based priority heap for discrete event simulation.
+ */
+
+#include 
+#include  // For memcpy(3)
+#include  // for rand(3)
+#include   // For printf(3)
+
+const int STARTING_SIZE = 511;
+
+#define HEAP_NODE(heap, index) (((node_t*)(heap->data))[index])
+
+typedef struct node {
+  void* data;
+  long long int key;
+} node_t;
+
+void down_heap(heap_t* heap, int findex);
+void up_heap(heap_t* heap, int findex);
+void swap(node_t* first, node_t* second);
+node_t* prev(node_t* node);
+node_t* next(node_t* next);
+
+void init_node(node_t* node) {
+  node->data = NULL;
+  node->key = -1;
+}
+
+void init_heap(heap_t* heap) {
+  heap->size = 0;
+  heap->private_size = STARTING_SIZE;
+  heap->data = malloc(sizeof(node_t) * heap->private_size);
+}
+
+int heap_size(heap_t* heap) {
+  return heap->size;
+}
+
+int is_empty(heap_t* heap) {
+  return heap->size == 0;
+}
+
+int heap_is_empty(heap_t* heap) {
+  return is_empty(heap);
+}
+
+long long int heap_get_min_key(heap_t* heap) {
+  if (is_empty(heap)) {
+    return -1;
+  }
+  else {
+    return HEAP_NODE(heap, 0).key;
+  }
+}
+
+void* heap_peek_min_data(heap_t* heap) {
+  if (is_empty(heap)) {
+    return NULL;
+  }
+  else {
+    return HEAP_NODE(heap, 0).data;
+  }
+}
+
+void* heap_pop_min_data(heap_t* heap, long long int* key) {
+  int last_index = heap->size - 1;
+  void* data = HEAP_NODE(heap, 0).data;
+  if (key != NULL) {
+    *key = HEAP_NODE(heap, 0).key;
+  }
+  HEAP_NODE(heap, 0).data = HEAP_NODE(heap, last_index).data;
+  HEAP_NODE(heap, 0).key = HEAP_NODE(heap, last_index).key;
+
+  heap->size--;
+
+  down_heap(heap, 0);
+
+  return data;
+}
+
+void expand_heap(heap_t* heap) {
+  int new_size = (heap->private_size * 2) + 1;
+  void* new_data = malloc(sizeof(node_t) * new_size);
+
+  //dbg(DBG_SIM, "Resized heap from %i to %i.\n", heap->private_size, new_size);
+  
+  memcpy(new_data, heap->data, (sizeof(node_t) * heap->private_size));
+  free(heap->data);
+
+  heap->data = new_data;
+  heap->private_size = new_size;
+  
+}
+
+void heap_insert(heap_t* heap, void* data, long long int key) {
+  int findex = heap->size;
+  if (findex == heap->private_size) {
+    expand_heap(heap);
+  }
+  
+  findex = heap->size;
+  HEAP_NODE(heap, findex).key = key;
+  HEAP_NODE(heap, findex).data = data;
+  up_heap(heap, findex);
+
+  heap->size++;
+}
+
+void swap(node_t* first, node_t* second) {
+  long long int key;
+  void* data;
+
+  key = first->key;
+  first->key = second->key;
+  second->key = key;
+
+  data = first->data;
+  first->data = second->data;
+  second->data = data;
+}
+
+void down_heap(heap_t* heap, int findex) {
+  int right_index =  ((findex + 1) * 2);
+  int left_index = (findex * 2) + 1;
+
+  if (right_index < heap->size) { // Two children
+    long long int left_key = HEAP_NODE(heap, left_index).key;
+    long long int right_key = HEAP_NODE(heap, right_index).key;
+    int min_key_index = (left_key < right_key)? left_index : right_index;
+
+    if (HEAP_NODE(heap, min_key_index).key < HEAP_NODE(heap, findex).key) {
+      swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, min_key_index)));
+      down_heap(heap, min_key_index);
+    }
+  }
+  else if (left_index >= heap->size) { // No children
+    return;
+  }
+  else { // Only left child
+    long long int left_key = HEAP_NODE(heap, left_index).key;
+    if (left_key < HEAP_NODE(heap, findex).key) {
+      swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, left_index)));
+      return;
+    }
+  }
+}
+
+void up_heap(heap_t* heap, int findex) {
+  int parent_index;
+  if (findex == 0) {
+    return;
+  }
+
+  parent_index = (findex - 1) / 2;
+
+  if (HEAP_NODE(heap, parent_index).key > HEAP_NODE(heap, findex).key) {
+    swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, parent_index)));
+    up_heap(heap, parent_index);
+  }
+}
+
diff --git a/tos/lib/tossim/heap.h b/tos/lib/tossim/heap.h
new file mode 100644
index 00000000..8437be31
--- /dev/null
+++ b/tos/lib/tossim/heap.h
@@ -0,0 +1,66 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* Authors:             Philip Levis
+ *
+ */
+
+/*
+ *   FILE: heap.h
+ * AUTHOR: pal
+ *   DESC: Simple array-based priority heap for discrete event simulation.
+ */
+
+/**
+ * @author Philip Levis
+ */
+
+
+#ifndef HEAP_H_INCLUDED
+#define HEAP_H_INCLUDED
+
+typedef struct heap {
+  int size;
+  void* data;
+  int private_size;
+} heap_t;
+
+void init_heap(heap_t* heap);
+int heap_size(heap_t* heap);
+int heap_is_empty(heap_t* heap);
+
+long long int heap_get_min_key(heap_t* heap);
+void* heap_peek_min_data(heap_t* heap);
+void* heap_pop_min_data(heap_t* heap, long long int* key);
+void heap_insert(heap_t * heap, void* data, long long int key);
+
+
+#endif // HEAP_H_INCLUDED
diff --git a/tos/lib/tossim/mac.c b/tos/lib/tossim/mac.c
new file mode 100644
index 00000000..61fbd2c4
--- /dev/null
+++ b/tos/lib/tossim/mac.c
@@ -0,0 +1,63 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include 
+#include 
+
+MAC::MAC() {}
+MAC::~MAC() {}
+
+int MAC::initHigh() {return sim_csma_init_high();}
+int MAC::initLow() {return sim_csma_init_low();}
+int MAC::high() {return sim_csma_high();}
+int MAC::low() {return sim_csma_low();}
+int MAC::symbolsPerSec() {return sim_csma_symbols_per_sec();}
+int MAC::bitsPerSymbol() {return sim_csma_bits_per_symbol();}
+int MAC::preambleLength() {return sim_csma_preamble_length();}
+int MAC::exponentBase() {return sim_csma_exponent_base();}
+int MAC::maxIterations() {return sim_csma_max_iterations();}
+int MAC::minFreeSamples() {return sim_csma_min_free_samples();}
+int MAC::rxtxDelay() {return sim_csma_rxtx_delay();}
+int MAC::ackTime() {return sim_csma_ack_time();}
+
+void MAC::setInitHigh(int val) {sim_csma_set_init_high(val);}
+void MAC::setInitLow(int val) {sim_csma_set_init_low(val);}
+void MAC::setHigh(int val) {sim_csma_set_high(val);}
+void MAC::setLow(int val) {sim_csma_set_low(val);}
+void MAC::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);}
+void MAC::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);}
+void MAC::setPreambleLength(int val) {sim_csma_set_preamble_length(val);}
+void MAC::setExponentBase(int val) {sim_csma_set_exponent_base(val);}
+void MAC::setMaxIterations(int val) {sim_csma_set_max_iterations(val);}
+void MAC::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);}
+void MAC::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);}
+void MAC::setAckTime(int val) {sim_csma_set_ack_time(val);}
+
diff --git a/tos/lib/tossim/mac.h b/tos/lib/tossim/mac.h
new file mode 100644
index 00000000..e48135bb
--- /dev/null
+++ b/tos/lib/tossim/mac.h
@@ -0,0 +1,67 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef MAC_H_INCLUDED
+#define MAC_H_INCLUDED
+
+class MAC {
+ public:
+  MAC();
+  ~MAC();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength(); // in symbols
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); // in symbols
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val); // in symbols
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val); // in symbols int 
+};
+
+#endif
diff --git a/tos/lib/tossim/mac.i b/tos/lib/tossim/mac.i
new file mode 100644
index 00000000..f51794bd
--- /dev/null
+++ b/tos/lib/tossim/mac.i
@@ -0,0 +1,84 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * SWIG interface specification for a media access control algorithm
+ * and physical data rate in TOSSIM. This file defines the MAC object
+ * which is exported to
+ * the python scripting interface. This particular MAC is CSMA.
+ * Changing the MAC abstraction requires changing or replacing this
+ * file and rerunning generate-swig.bash in lib/tossim. Note that
+ * this abstraction does not represent an actual MAC implementation,
+ * instead merely a set of configuration constants that a CSMA MAC
+ * implementation might use. The default values model the standard
+ * TinyOS CC2420 stack. Most times (rxtxDelay, etc.) are in terms
+ * of symbols. E.g., an rxTxDelay of 32 means 32 symbol times. This
+ * value can be translated into real time with the symbolsPerSec()
+ * call.
+ *
+ * Note that changing this file only changes the Python interface:
+ * you must also change the underlying TOSSIM code so Python
+ * has the proper functions to call. Look at mac.h, mac.c, and
+ * sim_mac.c.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+%module TOSSIMMAC
+
+%{
+#include 
+%}
+
+class MAC {
+ public:
+  MAC();
+  ~MAC();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength();
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); 
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val);
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val);
+};
diff --git a/tos/lib/tossim/packet.c b/tos/lib/tossim/packet.c
new file mode 100644
index 00000000..78268585
--- /dev/null
+++ b/tos/lib/tossim/packet.c
@@ -0,0 +1,107 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include 
+#include 
+
+Packet::Packet() {
+  msgPtr = sim_packet_allocate();
+  allocated = 1;
+}
+
+Packet::Packet(sim_packet_t* m) {
+  if (m != NULL) {
+    msgPtr = m;
+    allocated = 0;
+  }
+  else {
+    msgPtr = sim_packet_allocate();
+    allocated = 1;
+  }
+}
+
+Packet::~Packet() {
+  if (allocated) {
+    sim_packet_free(msgPtr);
+  }
+}
+
+void Packet::setDestination(int dest) {
+  sim_packet_set_destination(msgPtr, (uint16_t)dest);
+}
+int Packet::destination() {
+  return sim_packet_destination(msgPtr);
+}
+
+void Packet::setLength(int len) {
+  sim_packet_set_length(msgPtr, (uint8_t)len);
+}
+int Packet::length() {
+  return sim_packet_length(msgPtr);
+}
+
+void Packet::setType(int type) {
+  sim_packet_set_type(msgPtr, (uint8_t)type);
+}
+int Packet::type() {
+  return sim_packet_type(msgPtr);
+}
+
+char* Packet::data() {
+  char* val =  (char*)sim_packet_data(msgPtr);
+  return val;
+}
+
+void Packet::setData(char* data, int len) {
+  len = (len > maxLength())? maxLength():len;
+  memcpy(sim_packet_data(msgPtr), data, len);
+  setLength(len);
+}
+
+int Packet::maxLength() {
+  return (int)sim_packet_max_length(msgPtr);
+}
+
+void Packet::setStrength(int str) {
+  sim_packet_set_strength(msgPtr, (uint16_t)str);
+}
+
+sim_packet_t* Packet::getPacket() {
+  return msgPtr;
+}
+
+void Packet::deliver(int node, long long int t) {
+  sim_packet_deliver(node, msgPtr, t);
+}
+
+void Packet::deliverNow(int node) {
+  deliver(node, 0);
+}
diff --git a/tos/lib/tossim/packet.h b/tos/lib/tossim/packet.h
new file mode 100644
index 00000000..f59f8c92
--- /dev/null
+++ b/tos/lib/tossim/packet.h
@@ -0,0 +1,68 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef PACKET_H_INCLUDED
+#define PACKET_H_INCLUDED
+
+#include 
+
+class Packet {
+  public:
+    Packet();
+    Packet(sim_packet_t* msg);
+    ~Packet();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+    void setData(char* data, int len);
+    int maxLength();
+    
+    void setStrength(int str);
+
+    sim_packet_t* getPacket();
+
+    void deliver(int node, long long int t);
+    void deliverNow(int node);
+    
+ private:
+    int allocated;
+    sim_packet_t* msgPtr;
+};
+
+#endif
diff --git a/tos/lib/tossim/packet.i b/tos/lib/tossim/packet.i
new file mode 100644
index 00000000..c45f4cbd
--- /dev/null
+++ b/tos/lib/tossim/packet.i
@@ -0,0 +1,67 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * SWIG interface specification for delivering packets to a node
+ * (injecting traffic).
+ *
+ * Note that changing this file only changes the Python interface:
+ * you must also change the underlying TOSSIM code so Python
+ * has the proper functions to call. Look at mac.h, mac.c, and
+ * sim_mac.c.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+
+%{
+#include 
+%}
+
+%apply (char *STRING, int LENGTH) { (char *data, int len) };
+
+class Packet {
+  public:
+    Packet();
+    ~Packet();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+
+    void setData(char* data, int len);	
+    int maxLength();
+    
+    void setStrength(int str);
+
+    void deliver(int node, long long int time);
+    void deliverNow(int node);
+};
diff --git a/tos/lib/tossim/platform_message.h b/tos/lib/tossim/platform_message.h
new file mode 100644
index 00000000..f1a76baf
--- /dev/null
+++ b/tos/lib/tossim/platform_message.h
@@ -0,0 +1,54 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ *
+ */
+ 
+/**
+ * Defining the platform-independently named packet structures to be the
+ * tossim structures.
+ *
+ * @author Philip Levis
+ * @date   Dec 2 2005
+ * Revision:  $Revision$
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include 
+#include 
+
+typedef union message_header {
+  tossim_header_t tossim;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  tossim_footer_t tossim;
+} message_footer_t;
+
+typedef union message_metadata {
+  tossim_metadata_t tossim;
+} message_metadata_t;
+
+#endif
diff --git a/tos/lib/tossim/radio.c b/tos/lib/tossim/radio.c
new file mode 100644
index 00000000..4f62f25c
--- /dev/null
+++ b/tos/lib/tossim/radio.c
@@ -0,0 +1,61 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * C++ implementation of the gain-based TOSSIM radio model.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include 
+#include 
+
+Radio::Radio() {}
+Radio::~Radio() {}
+
+void Radio::add(int src, int dest, double gain) {
+  sim_gain_add(src, dest, gain);
+}
+
+double Radio::gain(int src, int dest) {
+  return sim_gain_value(src, dest);
+}
+
+bool Radio::connected(int src, int dest) {
+  return sim_gain_connected(src, dest);
+}
+
+void Radio::remove(int src, int dest) {
+  sim_gain_remove(src, dest);
+}
+
+void Radio::setNoise(int node, double mean, double range) {
+  sim_gain_set_noise_floor(node, mean, range);
+}
+
+
+void Radio::setSensitivity(double sensitivity) {
+  sim_gain_set_sensitivity(sensitivity);
+}
diff --git a/tos/lib/tossim/radio.h b/tos/lib/tossim/radio.h
new file mode 100644
index 00000000..7309bb24
--- /dev/null
+++ b/tos/lib/tossim/radio.h
@@ -0,0 +1,48 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef RADIO_H_INCLUDED
+#define RADIO_H_INCLUDED
+
+class Radio {
+ public:
+  Radio();
+  ~Radio();
+
+  void add(int src, int dest, double value);
+  double gain(int src, int dest);
+  bool connected(int src, int dest);
+  void remove(int src, int dest);
+  void setNoise(int node, double mean, double range);
+  void setSensitivity(double sensitivity);
+};
+
+#endif
diff --git a/tos/lib/tossim/radio.i b/tos/lib/tossim/radio.i
new file mode 100644
index 00000000..26bcd18c
--- /dev/null
+++ b/tos/lib/tossim/radio.i
@@ -0,0 +1,57 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Stanfoard SWIG interface specification for the TOSSIM radio
+ * propagation model. This file defines the Radio object that
+ * is exported to Python.
+ * This particular radio model is gain-based. If you want to change
+ * the radio model (and the scripting interface), then you must
+ * replace or modify this file and re-run the SWIG interface generation
+ * script generate-swig.bash in lib/tossim. Basic TOSSIM includes
+ * another model, the binary model, which stores packet loss rates
+ * rather than gains.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+%module TOSSIMRadio
+
+%{
+#include 
+%}
+
+class Radio {
+ public:
+  Radio();
+  ~Radio();
+
+  void add(int src, int dest, double gain);
+  double gain(int src, int dest);
+  bool connected(int src, int dest);
+  void remove(int src, int dest);
+  void setNoise(int node, double mean, double range);
+  void setSensitivity(double sensitivity);   
+};
+
diff --git a/tos/lib/tossim/sim_binary.c b/tos/lib/tossim/sim_binary.c
new file mode 100644
index 00000000..a94b6819
--- /dev/null
+++ b/tos/lib/tossim/sim_binary.c
@@ -0,0 +1,111 @@
+#include 
+
+link_t* connectivity[TOSSIM_MAX_NODES];
+
+link_t* allocate_link(int mote);
+void deallocate_link(link_t* link);
+
+link_t* sim_binary_first(int src) __attribute__ ((C, spontaneous)) {
+  return connectivity[src];
+}
+
+link_t* sim_binary_next(link_t* link) __attribute__ ((C, spontaneous)) {
+  return link->next;
+}
+
+void sim_binary_add(int src, int dest, double packetLoss) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      break;
+    }
+    current = current->next;
+  }
+
+  if (current == NULL) {
+    current = allocate_link(dest);
+  }
+  current->mote = dest;
+  current->loss = packetLoss;
+  current->next = connectivity[src];
+  connectivity[src] = current;
+  dbg("Binary", "Adding link from %i to %i with loss %llf\n", src, dest, packetLoss);
+  sim_set_node(temp);
+}
+
+double sim_binary_loss(int src, int dest) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return current->loss;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return 1.0;
+}
+
+bool sim_binary_connected(int src, int dest) __attribute__ ((C, spontaneous)) {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return TRUE;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return FALSE;
+}
+  
+void sim_binary_remove(int src, int dest) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  link_t* prevLink;
+  int temp = sim_node();
+  sim_set_node(src);
+    
+  current = connectivity[src];
+  prevLink = NULL;
+    
+  while (current != NULL) {
+    if (current->mote == dest) {
+      if (prevLink == NULL) {
+	connectivity[src] = current->next;
+      }
+      else {
+	prevLink->next = current->next;
+      }
+      deallocate_link(current);
+      current = prevLink->next;
+    }
+    else {
+      prevLink = current;
+      current = current->next;
+    }
+  }
+  sim_set_node(temp);
+}
+
+ link_t* allocate_link(int mote) {
+   link_t* link = (link_t*)malloc(sizeof(link_t));
+   link->next = NULL;
+   link->mote = mote;
+   link->loss = 1.0;
+   return link;
+ }
+
+ void deallocate_link(link_t* link) {
+   free(link);
+ }
diff --git a/tos/lib/tossim/sim_binary.h b/tos/lib/tossim/sim_binary.h
new file mode 100644
index 00000000..29766cee
--- /dev/null
+++ b/tos/lib/tossim/sim_binary.h
@@ -0,0 +1,63 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The C functions representing the TOSSIM binary interference
+ * model.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id$
+
+
+
+#ifndef SIM_BINARY_H_INCLUDED
+#define SIM_BINARY_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  typedef struct link {
+    int mote;
+    double loss;
+    struct link* next;  
+  } link_t;
+  
+  void sim_binary_add(int src, int dest, double packetLoss);
+  double sim_binary_loss(int src, int dest);
+  bool sim_binary_connected(int src, int dest);
+  void sim_binary_remove(int src, int dest);
+
+  link_t* sim_binary_first(int src);
+  link_t* sim_binary_next(link_t* link);
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_BINARY_H_INCLUDED
diff --git a/tos/lib/tossim/sim_csma.c b/tos/lib/tossim/sim_csma.c
new file mode 100644
index 00000000..5ecd2a26
--- /dev/null
+++ b/tos/lib/tossim/sim_csma.c
@@ -0,0 +1,124 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * C implementation of configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+// $Id$
+
+#include 
+
+int csmaInitHigh = SIM_CSMA_INIT_HIGH;
+int csmaInitLow = SIM_CSMA_INIT_LOW;
+int csmaHigh = SIM_CSMA_HIGH;
+int csmaLow = SIM_CSMA_LOW;
+int csmaSymbolsPerSec = SIM_CSMA_SYMBOLS_PER_SEC;
+int csmaBitsPerSymbol = SIM_CSMA_BITS_PER_SYMBOL;
+int csmaPreambleLength = SIM_CSMA_PREAMBLE_LENGTH;
+int csmaExponentBase = SIM_CSMA_EXPONENT_BASE;
+int csmaMaxIterations = SIM_CSMA_MAX_ITERATIONS;
+int csmaMinFreeSamples = SIM_CSMA_MIN_FREE_SAMPLES;
+int csmaRxTxDelay = SIM_CSMA_RXTX_DELAY;
+int csmaAckTime = SIM_CSMA_ACK_TIME;
+
+int sim_csma_init_high() __attribute__ ((C, spontaneous)) {
+  return csmaInitHigh;
+}
+int sim_csma_init_low() __attribute__ ((C, spontaneous)) {
+  return csmaInitLow;
+}
+int sim_csma_high() __attribute__ ((C, spontaneous)) {
+  return csmaHigh;
+}
+int sim_csma_low() __attribute__ ((C, spontaneous)) {
+  return csmaLow;
+}
+int sim_csma_symbols_per_sec() __attribute__ ((C, spontaneous)) {
+  return csmaSymbolsPerSec;
+}
+int sim_csma_bits_per_symbol() __attribute__ ((C, spontaneous)) {
+  return csmaBitsPerSymbol;
+}
+int sim_csma_preamble_length() __attribute__ ((C, spontaneous)) {
+  return csmaPreambleLength;
+}
+int sim_csma_exponent_base() __attribute__ ((C, spontaneous)) {
+  return csmaExponentBase;;
+}
+int sim_csma_max_iterations() __attribute__ ((C, spontaneous)) {
+  return csmaMaxIterations;
+}
+int sim_csma_min_free_samples() __attribute__ ((C, spontaneous)) {
+  return csmaMinFreeSamples;
+}
+int sim_csma_rxtx_delay() __attribute__ ((C, spontaneous)) {
+  return csmaRxTxDelay;
+}
+int sim_csma_ack_time() __attribute__ ((C, spontaneous)) {
+  return csmaAckTime;
+}
+
+
+
+void sim_csma_set_init_high(int val) __attribute__ ((C, spontaneous)) {
+  csmaInitHigh = val;
+}
+void sim_csma_set_init_low(int val) __attribute__ ((C, spontaneous)) {
+  csmaInitLow = val;
+}
+void sim_csma_set_high(int val) __attribute__ ((C, spontaneous)) {
+  csmaHigh = val;
+}
+void sim_csma_set_low(int val) __attribute__ ((C, spontaneous)) {
+  csmaLow = val;
+}
+void sim_csma_set_symbols_per_sec(int val) __attribute__ ((C, spontaneous)) {
+  csmaSymbolsPerSec = val;
+}
+void sim_csma_set_bits_per_symbol(int val) __attribute__ ((C, spontaneous)) {
+  csmaBitsPerSymbol = val;
+}
+void sim_csma_set_preamble_length(int val) __attribute__ ((C, spontaneous)) {
+  csmaPreambleLength = val;
+}
+void sim_csma_set_exponent_base(int val) __attribute__ ((C, spontaneous)) {
+  csmaExponentBase = val;
+}
+void sim_csma_set_max_iterations(int val) __attribute__ ((C, spontaneous)) {
+  csmaMaxIterations = val;
+}
+void sim_csma_set_min_free_samples(int val) __attribute__ ((C, spontaneous)) {
+  csmaMinFreeSamples = val;
+}
+void sim_csma_set_rxtx_delay(int val) __attribute__ ((C, spontaneous)) {
+  csmaRxTxDelay = val;
+}
+void sim_csma_set_ack_time(int val) __attribute__ ((C, spontaneous)) {
+  csmaAckTime = val;
+}
+
diff --git a/tos/lib/tossim/sim_csma.h b/tos/lib/tossim/sim_csma.h
new file mode 100644
index 00000000..4795f8ea
--- /dev/null
+++ b/tos/lib/tossim/sim_csma.h
@@ -0,0 +1,121 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+// $Id$
+
+#ifndef SIM_CSMA_H_INCLUDED
+#define SIM_CSMA_H_INCLUDED
+
+#ifndef SIM_CSMA_INIT_HIGH
+#define SIM_CSMA_INIT_HIGH 400
+#endif 
+
+#ifndef SIM_CSMA_INIT_LOW
+#define SIM_CSMA_INIT_LOW 20
+#endif
+
+#ifndef SIM_CSMA_HIGH
+#define SIM_CSMA_HIGH 160
+#endif
+
+#ifndef SIM_CSMA_LOW
+#define SIM_CSMA_LOW 20
+#endif
+
+#ifndef SIM_CSMA_SYMBOLS_PER_SEC
+#define SIM_CSMA_SYMBOLS_PER_SEC 65536
+#endif
+
+#ifndef SIM_CSMA_BITS_PER_SYMBOL
+#define SIM_CSMA_BITS_PER_SYMBOL 4
+#endif
+
+#ifndef SIM_CSMA_PREAMBLE_LENGTH
+#define SIM_CSMA_PREAMBLE_LENGTH 12
+#endif
+
+#ifndef SIM_CSMA_MAX_ITERATIONS
+#define SIM_CSMA_MAX_ITERATIONS 0
+#endif
+
+#ifndef SIM_CSMA_EXPONENT_BASE
+#define SIM_CSMA_EXPONENT_BASE 1
+#endif
+
+#ifndef SIM_CSMA_MIN_FREE_SAMPLES
+#define SIM_CSMA_MIN_FREE_SAMPLES 2
+#endif
+
+// 500 us ~= 32 symbols
+#ifndef SIM_CSMA_RXTX_DELAY 
+#define SIM_CSMA_RXTX_DELAY 32
+#endif
+
+// 12 symbol delay + 11 bytes length * (2 bytes/symbol) = 34 symbols
+#ifndef SIM_CSMA_ACK_TIME
+#define SIM_CSMA_ACK_TIME 34
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  int sim_csma_init_high();
+  int sim_csma_init_low();
+  int sim_csma_high();
+  int sim_csma_low();
+  int sim_csma_symbols_per_sec();
+  int sim_csma_bits_per_symbol();
+  int sim_csma_preamble_length(); // in symbols
+  int sim_csma_exponent_base();
+  int sim_csma_max_iterations();
+  int sim_csma_min_free_samples();
+  int sim_csma_rxtx_delay();
+  int sim_csma_ack_time(); // in symbols
+  
+  void sim_csma_set_init_high(int val);
+  void sim_csma_set_init_low(int val);
+  void sim_csma_set_high(int val);
+  void sim_csma_set_low(int val);
+  void sim_csma_set_symbols_per_sec(int val);
+  void sim_csma_set_bits_per_symbol(int val);
+  void sim_csma_set_preamble_length(int val); // in symbols
+  void sim_csma_set_exponent_base(int val);
+  void sim_csma_set_max_iterations(int val);
+  void sim_csma_set_min_free_samples(int val);
+  void sim_csma_set_rxtx_delay(int val);
+  void sim_csma_set_ack_time(int val); // in symbols
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/sim_event_queue.c b/tos/lib/tossim/sim_event_queue.c
new file mode 100644
index 00000000..ce2b390a
--- /dev/null
+++ b/tos/lib/tossim/sim_event_queue.c
@@ -0,0 +1,94 @@
+// $Id$
+
+/*									tab:4
+* "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/**
+ * The simple TOSSIM wrapper around the underlying heap.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+
+#include 
+#include 
+
+static heap_t eventHeap;
+
+void sim_queue_init() __attribute__ ((C, spontaneous)) {
+  init_heap(&eventHeap);
+}
+
+void sim_queue_insert(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "Inserting 0x%p\n", event);
+  heap_insert(&eventHeap, event, event->time);
+}
+
+sim_event_t* sim_queue_pop() __attribute__ ((C, spontaneous)) {
+  long long int key;
+  return (sim_event_t*)(heap_pop_min_data(&eventHeap, &key));
+}
+
+bool sim_queue_is_empty() __attribute__ ((C, spontaneous)) {
+  return heap_is_empty(&eventHeap);
+}
+
+long long int sim_queue_peek_time() __attribute__ ((C, spontaneous)) {
+  if (heap_is_empty(&eventHeap)) {
+    return -1;
+  }
+  else {
+    return heap_get_min_key(&eventHeap);
+  }
+}
+
+
+void sim_queue_cleanup_none(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_none: 0x%p\n", event);
+  // Do nothing. Useful for statically allocated events.
+}
+
+void sim_queue_cleanup_event(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_event: 0x%p\n", event);
+  free(event);
+}
+
+void sim_queue_cleanup_data(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_data: 0x%p\n", event);
+  free (event->data);
+  event->data = NULL;
+}
+    
+void sim_queue_cleanup_total(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_total: 0x%p\n", event);
+  free (event->data);
+  event->data = NULL;
+  free (event);
+}
+
+sim_event_t* sim_queue_allocate_event() {
+  sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+  memset(evt, 0, sizeof(sim_event_t));
+  evt->mote = sim_node();
+  return evt;
+}
diff --git a/tos/lib/tossim/sim_event_queue.h b/tos/lib/tossim/sim_event_queue.h
new file mode 100644
index 00000000..a368213d
--- /dev/null
+++ b/tos/lib/tossim/sim_event_queue.h
@@ -0,0 +1,71 @@
+// $Id$
+
+/*									tab:4
+* "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/**
+ * The event queue is the core of the mote side of TOSSIM. It is a
+ * wrapper around the underlying heap. Unlike the 1.x version, it is
+ * not re-entrant: merging the Python console and TOSSIM means that
+ * functionality like packet injection/reception from external tools
+ * is on the Python side.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+
+#ifndef SIM_EVENT_QUEUE_H_INCLUDED
+#define SIM_EVENT_QUEUE_H_INCLUDED
+
+#include 
+
+struct sim_event;
+typedef struct sim_event sim_event_t;
+
+struct sim_event {
+  sim_time_t time;
+  unsigned long  mote;
+  bool force; // Whether this event type should always be executed
+            // even if a mote is "turned off"
+  bool cancelled; // Whether this event has been cancelled
+  void* data;
+  
+  void (*handle)(sim_event_t* e);
+  void (*cleanup)(sim_event_t* e);
+};
+
+sim_event_t* sim_queue_allocate_event();
+
+void sim_queue_init();
+void sim_queue_insert(sim_event_t* event);
+bool sim_queue_is_empty();
+long long int sim_queue_peek_time();
+sim_event_t* sim_queue_pop();
+
+void sim_queue_cleanup_none(sim_event_t* e);
+void sim_queue_cleanup_event(sim_event_t* e);
+void sim_queue_cleanup_data(sim_event_t* e) ;
+void sim_queue_cleanup_total(sim_event_t* e);
+
+
+#endif // EVENT_QUEUE_H_INCLUDED
diff --git a/tos/lib/tossim/sim_event_queue.o b/tos/lib/tossim/sim_event_queue.o
new file mode 100644
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diff --git a/tos/lib/tossim/sim_gain.c b/tos/lib/tossim/sim_gain.c
new file mode 100644
index 00000000..9e671841
--- /dev/null
+++ b/tos/lib/tossim/sim_gain.c
@@ -0,0 +1,151 @@
+#include 
+
+typedef struct sim_gain_noise {
+  double mean;
+  double range;
+} sim_gain_noise_t;
+
+
+gain_entry_t* connectivity[TOSSIM_MAX_NODES];
+sim_gain_noise_t noise[TOSSIM_MAX_NODES];
+double sensitivity = 4.0;
+
+gain_entry_t* sim_gain_allocate_link(int mote);
+void sim_gain_deallocate_link(gain_entry_t* link);
+
+gain_entry_t* sim_gain_first(int src) __attribute__ ((C, spontaneous)) {
+  return connectivity[src];
+}
+
+gain_entry_t* sim_gain_next(gain_entry_t* link) __attribute__ ((C, spontaneous)) {
+  return link->next;
+}
+
+void sim_gain_add(int src, int dest, double gain) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      break;
+    }
+    current = current->next;
+  }
+
+  if (current == NULL) {
+    current = sim_gain_allocate_link(dest);
+    current->next = connectivity[src];
+    connectivity[src] = current;
+  }
+  current->mote = dest;
+  current->gain = gain;
+  dbg("Gain", "Adding link from %i to %i with gain %f\n", src, dest, gain);
+  sim_set_node(temp);
+}
+
+double sim_gain_value(int src, int dest) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return current->gain;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return 1.0;
+}
+
+bool sim_gain_connected(int src, int dest) __attribute__ ((C, spontaneous)) {
+  gain_entry_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return TRUE;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return FALSE;
+}
+  
+void sim_gain_remove(int src, int dest) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  gain_entry_t* prevLink;
+  int temp = sim_node();
+  sim_set_node(src);
+    
+  current = connectivity[src];
+  prevLink = NULL;
+    
+  while (current != NULL) {
+    if (current->mote == dest) {
+      if (prevLink == NULL) {
+	connectivity[src] = current->next;
+      }
+      else {
+	prevLink->next = current->next;
+      }
+      sim_gain_deallocate_link(current);
+      current = prevLink->next;
+    }
+    else {
+      prevLink = current;
+      current = current->next;
+    }
+  }
+  sim_set_node(temp);
+}
+
+void sim_gain_set_noise_floor(int node, double mean, double range) __attribute__ ((C, spontaneous))  {
+  noise[node].mean = mean;
+  noise[node].range = range;
+}
+
+double sim_gain_noise_mean(int node) {
+  return noise[node].mean;
+}
+
+double sim_gain_noise_range(int node) {
+  return noise[node].range;
+}
+
+// Pick a number a number from the uniform distribution of
+// [mean-range, mean+range].
+double sim_gain_sample_noise(int node)  __attribute__ ((C, spontaneous)) {
+  double val = noise[node].mean;
+  double adjust = (sim_random() % 2000000);
+  adjust /= 1000000.0;
+  adjust -= 1.0;
+  adjust *= noise[node].range;
+  return val + adjust;
+}
+
+gain_entry_t* sim_gain_allocate_link(int mote) {
+  gain_entry_t* link = (gain_entry_t*)malloc(sizeof(gain_entry_t));
+  link->next = NULL;
+  link->mote = mote;
+  link->gain = -10000000.0;
+  return link;
+}
+
+void sim_gain_deallocate_link(gain_entry_t* link) __attribute__ ((C, spontaneous)) {
+  free(link);
+}
+
+void sim_gain_set_sensitivity(double s) __attribute__ ((C, spontaneous)) {
+  sensitivity = s;
+}
+
+double sim_gain_sensitivity() __attribute__ ((C, spontaneous)) {
+  return sensitivity;
+}
diff --git a/tos/lib/tossim/sim_gain.h b/tos/lib/tossim/sim_gain.h
new file mode 100644
index 00000000..30aba273
--- /dev/null
+++ b/tos/lib/tossim/sim_gain.h
@@ -0,0 +1,70 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The C functions that allow TOSSIM-side code to access the SimMoteP
+ * component.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id$
+
+
+
+#ifndef SIM_GAIN_H_INCLUDED
+#define SIM_GAIN_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct gain_entry {
+  int mote;
+  double gain;
+  struct gain_entry* next;  
+} gain_entry_t;
+  
+void sim_gain_add(int src, int dest, double gain);
+double sim_gain_value(int src, int dest);
+bool sim_gain_connected(int src, int dest);
+void sim_gain_remove(int src, int dest);
+void sim_gain_set_noise_floor(int node, double mean, double range);
+double sim_gain_sample_noise(int node);
+double sim_gain_noise_mean(int node);
+double sim_gain_noise_range(int node);
+
+void sim_gain_set_sensitivity(double value);
+double sim_gain_sensitivity();
+  
+gain_entry_t* sim_gain_first(int src);
+gain_entry_t* sim_gain_next(gain_entry_t* e);
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_GAIN_H_INCLUDED
diff --git a/tos/lib/tossim/sim_log.c b/tos/lib/tossim/sim_log.c
new file mode 100644
index 00000000..e1737305
--- /dev/null
+++ b/tos/lib/tossim/sim_log.c
@@ -0,0 +1,311 @@
+// $Id$
+
+/*									tab:4
+* "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM logging system.
+ *
+ * @author Phil Levis
+ * @date   November 9 2005
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+enum {
+  DEFAULT_CHANNEL_SIZE = 8
+};
+
+typedef struct sim_log_output {
+  int num;
+  FILE** files;
+} sim_log_output_t;
+
+typedef struct sim_log_channel {
+  const char* name;
+  int numOutputs;
+  int size;
+  FILE** outputs;
+} sim_log_channel_t;
+
+enum {
+  SIM_LOG_OUTPUT_COUNT = uniqueCount("TOSSIM.debug")
+};
+
+sim_log_output_t outputs[SIM_LOG_OUTPUT_COUNT];
+struct hashtable* channelTable = NULL;
+
+
+static unsigned int sim_log_hash(void* key);
+static int sim_log_eq(void* key1, void* key2);
+
+
+// First we count how many outputs there are,
+// then allocate a FILE** large enough and fill it in.
+// This FILE** might be larger than needed, because
+// the outputs of the channels might have redundancies.
+// E.g., if two channels A and B are both to stdout, then
+// you don't want a channel of "A,B" to be doubly printed
+// to stdout. So when the channel's FILE*s are copied
+// into the debug point output array, this checks
+// for redundancies by checking file descriptors.
+static void fillInOutput(int id, char* name) {
+  char* termination = name;
+  char* namePos = name;
+  int count = 0;
+  char* newName = (char*)malloc(strlen(name) + 1);
+  memset(newName, 0, strlen(name) + 1);
+  // Count the outputs
+  while (termination != NULL) {
+    sim_log_channel_t* channel;
+    
+    termination = strrchr(namePos, ',');
+    // If we've reached the end, just copy to the end
+    if (termination == NULL) {
+      strcpy(newName, namePos);
+    }
+    // Otherwise, memcpy over and null terminate
+    else {
+      memcpy(newName, namePos, (termination - namePos));
+      newName[termination - namePos] = 0;
+    }
+    
+    channel = hashtable_search(channelTable, namePos);
+    if (channel != NULL) {
+      count += channel->numOutputs;
+    }
+
+    namePos = termination + 1;
+  }
+
+  termination = name;
+  namePos = name;
+  
+  // Allocate
+  outputs[id].files = (FILE**)malloc(sizeof(FILE*) * count);
+  outputs[id].num = 0;
+
+  // Fill it in
+  while (termination != NULL) {
+    sim_log_channel_t* channel;
+    
+    termination = strrchr(namePos, ',');
+    // If we've reached the end, just copy to the end
+    if (termination == NULL) {
+      strcpy(newName, namePos);
+    }
+    // Otherwise, memcpy over and null terminate
+    else {
+      memcpy(newName, namePos, (termination - namePos));
+      newName[termination - namePos] = 0;
+    }
+    
+    channel = hashtable_search(channelTable, namePos);
+    if (channel != NULL) {
+      int i, j;
+      for (i = 0; i < channel->numOutputs; i++) {
+	int duplicate = 0;
+	int outputCount = outputs[id].num;
+	// Check if we already have this file descriptor in the output
+	// set, and if so, ignore it.
+	for (j = 0; j < outputCount; j++) {
+	  if (fileno(outputs[id].files[j]) == fileno(channel->outputs[i])) {
+	    duplicate = 1;
+	    j = outputCount;
+	  }
+	}
+	if (!duplicate) {
+	  outputs[id].files[outputCount] = channel->outputs[i];
+	  outputs[id].num++;
+	}
+      }
+    }
+    namePos = termination + 1;
+  }
+}
+
+void sim_log_init() {
+  int i;
+
+  channelTable = create_hashtable(128, sim_log_hash, sim_log_eq);
+  
+  for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) {
+    outputs[i].num = 1;
+    outputs[i].files = (FILE**)malloc(sizeof(FILE*));
+    outputs[i].files[0] = fdopen(1, "w"); // STDOUT
+  }
+  
+}
+
+void sim_log_add_channel(char* name, FILE* file) {
+  sim_log_channel_t* channel;
+  channel = (sim_log_channel_t*)hashtable_search(channelTable, name);
+  
+  // If there's no current entry, allocate one, initialize it,
+  // and insert it.
+  if (channel == NULL) {
+    char* newName = (char*)malloc(strlen(name) + 1);
+    strcpy(newName, name);
+    newName[strlen(name)] = 0;
+    
+    channel = (sim_log_channel_t*)malloc(sizeof(sim_log_channel_t));
+    channel->name = newName;
+    channel->numOutputs = 0;
+    channel->size = DEFAULT_CHANNEL_SIZE;
+    channel->outputs = (FILE**)malloc(sizeof(FILE*) * channel->size);
+    memset(channel->outputs, 0, sizeof(FILE*) * channel->size);
+    hashtable_insert(channelTable, newName, channel);
+  }
+
+  // If the channel output table is full, double the size of
+  // channel->outputs.
+  if (channel->numOutputs == channel->size) {
+    FILE** newOutputs;
+    int newSize = channel->size * 2;
+    
+    newOutputs = (FILE**)malloc(sizeof(FILE*) * newSize);
+    memcpy(newOutputs, channel->outputs, channel->size * sizeof(FILE**));
+
+    free(channel->outputs);
+
+    channel->outputs = newOutputs;
+    channel->size    = newSize;
+  }
+
+  channel->outputs[channel->numOutputs] = file;
+  channel->numOutputs++;
+  sim_log_commit_change();
+}
+
+bool sim_log_remove_channel(char* output, FILE* file) {
+  sim_log_channel_t* channel;
+  int i;
+  channel = (sim_log_channel_t*)hashtable_search(channelTable, output);  
+
+  if (channel == NULL) {
+    return FALSE;
+  }
+
+  // Note: if a FILE* has duplicates, this removes all of them
+  for (i = 0; i < channel->numOutputs; i++) {
+    FILE* f = channel->outputs[i];
+    if (file == f) {
+      memcpy(&channel->outputs[i], &channel->outputs[i + 1], (channel->numOutputs) - (i + 1));
+      channel->outputs[channel->numOutputs - 1] = NULL;
+      channel->numOutputs--;
+    }
+  }
+  
+  return TRUE;
+}
+  
+void sim_log_commit_change() {
+  int i;
+  for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) {
+    if (outputs[i].files != NULL) {
+      outputs[i].num = 0;
+      free(outputs[i].files);
+      outputs[i].files = NULL;
+    }
+  }
+}
+
+
+void sim_log_debug(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    fprintf(file, "DEBUG (%i): ", (int)sim_node());
+    vfprintf(file, format, args); 
+    fflush(file);
+  }
+}
+
+void sim_log_error(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    fprintf(file, "ERROR (%i): ", (int)sim_node());
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+void sim_log_error_clear(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+/* This is the sdbm algorithm, taken from
+   http://www.cs.yorku.ca/~oz/hash.html -pal */
+static unsigned int sim_log_hash(void* key) {
+  char* str = (char*)key;
+  unsigned int hashVal = 0;
+  int c;
+  
+  while ((c = *str++))
+    hashVal = c + (hashVal << 6) + (hashVal << 16) - hashVal;
+  
+  return hashVal;
+}
+
+static int sim_log_eq(void* key1, void* key2) {
+  return strcmp((char*)key1, (char*)key2) == 0;
+}
diff --git a/tos/lib/tossim/sim_log.h b/tos/lib/tossim/sim_log.h
new file mode 100644
index 00000000..ff8f11db
--- /dev/null
+++ b/tos/lib/tossim/sim_log.h
@@ -0,0 +1,71 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TOSSIM logging system. Unlike in TinyOS 1.x, this logging
+ * system supports an arbitrary number of channels, denoted by
+ * a string identifier. A channel can be connected to any number
+ * of outputs, and a debug statement can be associated with any
+ * number of channels.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+
+#ifndef SIM_LOG_H_INCLUDED
+#define SIM_LOG_H_INCLUDED
+
+#ifndef TOSSIM_NO_DEBUG
+#define dbg(s, ...) sim_log_debug(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbg_clear(s, ...) sim_log_debug_clear(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbgerror(s, ...) sim_log_error(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbgerror_clear(s, ...) sim_log_error_clear(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#else
+#define dbg(s, ...)
+#define dbg_clear(s, ...)
+#define dbgerror(s, ...)
+#define dbgerror_clear(s, ...)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void sim_log_init();
+void sim_log_add_channel(char* output, FILE* file);
+bool sim_log_remove_channel(char* output, FILE* file);
+void sim_log_commit_change();
+
+void sim_log_debug(uint16_t id, char* string, const char* format, ...);
+void sim_log_error(uint16_t id, char* string, const char* format, ...);
+void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...);
+void sim_log_error_clear(uint16_t id, char* string, const char* format, ...);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_LOG_H_INCLUDED
diff --git a/tos/lib/tossim/sim_mac.c b/tos/lib/tossim/sim_mac.c
new file mode 100644
index 00000000..747064a7
--- /dev/null
+++ b/tos/lib/tossim/sim_mac.c
@@ -0,0 +1,34 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * This file is where you change which MAC and radio models TOSSIM
+ * incorporates.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include 
+#include 
diff --git a/tos/lib/tossim/sim_mote.h b/tos/lib/tossim/sim_mote.h
new file mode 100644
index 00000000..b3c5eba8
--- /dev/null
+++ b/tos/lib/tossim/sim_mote.h
@@ -0,0 +1,61 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The C functions that allow TOSSIM-side code to access the SimMoteP
+ * component.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id$
+
+
+
+#ifndef SIM_MOTE_H_INCLUDED
+#define SIM_MOTE_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+long long int sim_mote_euid(int mote);
+void sim_mote_set_euid(int mote, long long int euid);
+
+long long int sim_mote_start_time(int mote);
+void sim_mote_set_start_time(int mote, long long int t);
+
+bool sim_mote_is_on(int mote);
+void sim_mote_turn_on(int mote);
+void sim_mote_turn_off(int mote);
+int sim_mote_get_variable_info(int mote, char* name, void** addr, size_t* len);
+void sim_mote_enqueue_boot_event(int mote);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_MOTE_H_INCLUDED
diff --git a/tos/lib/tossim/sim_packet.c b/tos/lib/tossim/sim_packet.c
new file mode 100644
index 00000000..c811b7da
--- /dev/null
+++ b/tos/lib/tossim/sim_packet.c
@@ -0,0 +1,102 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+// $Id$
+
+#include 
+#include 
+
+// NOTE: This function is defined in lib/tossim/ActiveMessageC. It
+// has to be predeclared here because it is defined within that component.
+void active_message_deliver(int node, message_t* m, sim_time_t t);
+
+static tossim_header_t* getHeader(message_t* msg) {
+  return (tossim_header_t*)(msg->data - sizeof(tossim_header_t));
+}
+
+void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->addr = dest;
+}__attribute__ ((C, spontaneous))
+uint16_t sim_packet_destination(sim_packet_t* msg)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->addr;
+}
+  
+void sim_packet_set_length(sim_packet_t* msg, uint8_t length)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->length = length;
+}
+uint16_t sim_packet_length(sim_packet_t* msg)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->length;
+}
+
+void sim_packet_set_type(sim_packet_t* msg, uint8_t type) __attribute__ ((C, spontaneous)){
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->type = type;
+}
+
+uint8_t sim_packet_type(sim_packet_t* msg) __attribute__ ((C, spontaneous)){
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->type;
+}
+
+uint8_t* sim_packet_data(sim_packet_t* p) __attribute__ ((C, spontaneous)){
+  message_t* msg = (message_t*)p;
+  return (uint8_t*)&msg->data;
+}
+void sim_packet_set_strength(sim_packet_t* p, uint16_t str) __attribute__ ((C, spontaneous)){
+  message_t* msg = (message_t*)p;
+  tossim_metadata_t* md = (tossim_metadata_t*)(&msg->metadata);
+  md->strength = str;
+}
+void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)){
+  if (t < sim_time()) {
+    t = sim_time();
+  }
+  dbg("Packet", "sim_packet.c: Delivering packet %p to %i at %llu\n", msg, node, t);
+  active_message_deliver(node, (message_t*)msg, t);
+}
+  
+uint8_t sim_packet_max_length(sim_packet_t* msg) __attribute__ ((C, spontaneous)){
+  return TOSH_DATA_LENGTH;
+}
+
+sim_packet_t* sim_packet_allocate () __attribute__ ((C, spontaneous)){
+  return (sim_packet_t*)malloc(sizeof(message_t));
+}
+
+void sim_packet_free(sim_packet_t* p) __attribute__ ((C, spontaneous)) {
+  printf("sim_packet.c: Freeing packet %p\n", p);
+  free(p);
+}
diff --git a/tos/lib/tossim/sim_packet.h b/tos/lib/tossim/sim_packet.h
new file mode 100644
index 00000000..392ad49d
--- /dev/null
+++ b/tos/lib/tossim/sim_packet.h
@@ -0,0 +1,75 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+// $Id$
+
+#ifndef SIM_PACKET_H_INCLUDED
+#define SIM_PACKET_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  /*
+   * sim_packet_t is a weird beast. It's a dummy type that can stand
+   * in for message_t. We need to use sim_packet_t because gcc can't
+   * understand message_t, due to its network types (nx). So the shim
+   * code between Python and TOSSIM can't mention message_t.  Rather
+   * than use a void*, the shim uses sim_packet_t in order to provide
+   * some type checking. A sim_packet_t* is essentially a Python
+   * friendly pointer to a message_t.
+   */
+  typedef struct sim_packet {} sim_packet_t;
+  
+  void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest);
+  uint16_t sim_packet_destination(sim_packet_t* msg);
+  
+  void sim_packet_set_length(sim_packet_t* msg, uint8_t len);
+  uint16_t sim_packet_length(sim_packet_t* msg);
+
+  void sim_packet_set_type(sim_packet_t* msg, uint8_t type);
+  uint8_t sim_packet_type(sim_packet_t* msg);
+
+  uint8_t* sim_packet_data(sim_packet_t* msg);
+  void sim_packet_set_strength(sim_packet_t* msg, uint16_t str);
+
+  void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t);
+  uint8_t sim_packet_max_length(sim_packet_t* msg);
+
+  sim_packet_t* sim_packet_allocate();
+  void sim_packet_free(sim_packet_t* m);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_PACKET_H_INCLUDED
diff --git a/tos/lib/tossim/sim_tossim.c b/tos/lib/tossim/sim_tossim.c
new file mode 100644
index 00000000..f56fa761
--- /dev/null
+++ b/tos/lib/tossim/sim_tossim.c
@@ -0,0 +1,165 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static sim_time_t sim_ticks;
+static unsigned long current_node;
+static int sim_seed;
+
+static int __nesc_nido_resolve(int mote, char* varname, uintptr_t* addr, size_t* size);
+
+void sim_init() __attribute__ ((C, spontaneous)) {
+  sim_queue_init();
+  sim_log_init();
+  sim_log_commit_change();
+
+  {
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    sim_seed = tv.tv_usec;
+  } 
+}
+
+void sim_end() __attribute__ ((C, spontaneous)) {
+  sim_queue_init();
+}
+
+
+
+int sim_random() __attribute__ ((C, spontaneous)) {
+  uint32_t mlcg,p,q;
+  uint64_t tmpseed;
+  tmpseed =  (uint64_t)33614U * (uint64_t)sim_seed;
+  q = tmpseed;    /* low */
+  q = q >> 1;
+  p = tmpseed >> 32 ;             /* hi */
+  mlcg = p + q;
+  if (mlcg & 0x80000000) {
+    mlcg = mlcg & 0x7FFFFFFF;
+    mlcg++;
+  }
+  sim_seed = mlcg;
+  return mlcg;
+}
+
+void sim_random_seed(int seed) __attribute__ ((C, spontaneous)) {
+  sim_seed = seed;
+}
+
+sim_time_t sim_time() __attribute__ ((C, spontaneous)) {
+  return sim_ticks;
+}
+void sim_set_time(sim_time_t t) __attribute__ ((C, spontaneous)) {
+  sim_ticks = t;
+}
+
+sim_time_t sim_ticks_per_sec() __attribute__ ((C, spontaneous)) {
+  return 10000000000ULL;
+}
+
+unsigned long sim_node() __attribute__ ((C, spontaneous)) {
+  return current_node;
+}
+void sim_set_node(unsigned long node) __attribute__ ((C, spontaneous)) {
+  current_node = node;
+  TOS_NODE_ID = node;
+}
+
+bool sim_run_next_event() __attribute__ ((C, spontaneous)) {
+  bool result = FALSE;
+  if (!sim_queue_is_empty()) {
+    sim_event_t* event = sim_queue_pop();
+    sim_set_time(event->time);
+    sim_set_node(event->mote);
+
+    dbg("Tossim", "CORE: popping event for %i at %llu... ", sim_node(), sim_time());
+    if (sim_mote_is_on(event->mote) || event->force) {
+      result = TRUE;
+      dbg_clear("Tossim", " mote is on (or forced event), run it.\n");
+      event->handle(event);
+    }
+    else {
+      dbg_clear("Tossim", "\n");
+    }
+    event->cleanup(event);
+  }
+
+  return result;
+}
+
+int sim_print_time(char* buf, int len, sim_time_t ftime) __attribute__ ((C, spontaneous)) {
+  int hours;
+  int minutes;
+  int seconds;
+  sim_time_t  secondBillionths;
+
+  secondBillionths = (ftime % sim_ticks_per_sec());
+  if (sim_ticks_per_sec() > (sim_time_t)1000000000) {
+    secondBillionths /= (sim_ticks_per_sec() / (sim_time_t)1000000000);
+  }
+  else {
+    secondBillionths *= ((sim_time_t)1000000000 / sim_ticks_per_sec());
+  }
+
+  seconds = (int)(ftime / sim_ticks_per_sec());
+  minutes = seconds / 60;
+  hours = minutes / 60;
+  seconds %= 60;
+  minutes %= 60;
+  buf[len-1] = 0;
+  return snprintf(buf, len - 1, "%i:%i:%i.%09llu", hours, minutes, seconds, secondBillionths);
+}
+
+int sim_print_now(char* buf, int len) __attribute__ ((C, spontaneous)) {
+  return sim_print_time(buf, len, sim_time());
+}
+
+char simTimeBuf[128];
+char* sim_time_string() __attribute__ ((C, spontaneous)) {
+  sim_print_now(simTimeBuf, 128);
+  return simTimeBuf;
+}
+
+void sim_add_channel(char* channel, FILE* file) __attribute__ ((C, spontaneous)) {
+  sim_log_add_channel(channel, file);
+}
+
+bool sim_remove_channel(char* channel, FILE* file)  __attribute__ ((C, spontaneous)) {
+  return sim_log_remove_channel(channel, file);
+}
diff --git a/tos/lib/tossim/sim_tossim.h b/tos/lib/tossim/sim_tossim.h
new file mode 100644
index 00000000..6c8bc362
--- /dev/null
+++ b/tos/lib/tossim/sim_tossim.h
@@ -0,0 +1,73 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+#ifndef SIM_TOSSIM_H_INCLUDED
+#define SIM_TOSSIM_H_INCLUDED
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef long long int sim_time_t;
+  
+void sim_init();
+void sim_start();
+void sim_end();
+
+void sim_random_seed(int seed);
+int sim_random();
+  
+sim_time_t sim_time();
+void sim_set_time(sim_time_t time);
+sim_time_t sim_ticks_per_sec();
+  
+unsigned long sim_node();
+void sim_set_node(unsigned long node);
+
+int sim_print_time(char* buf, int bufLen, sim_time_t time);
+int sim_print_now(char* buf, int bufLen);
+char* sim_time_string();
+
+void sim_add_channel(char* channel, FILE* file);
+bool sim_remove_channel(char* channel, FILE* file);
+  
+bool sim_run_next_event();
+
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt b/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt
new file mode 100644
index 00000000..dc5c7939
--- /dev/null
+++ b/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt
@@ -0,0 +1,50625 @@
+gain	0	1	-87.04
+gain	1	0	-88.02
+gain	0	2	-89.58
+gain	2	0	-90.40
+gain	0	3	-96.56
+gain	3	0	-98.69
+gain	0	4	-108.45
+gain	4	0	-112.72
+gain	0	5	-99.72
+gain	5	0	-104.43
+gain	0	6	-107.02
+gain	6	0	-108.16
+gain	0	7	-112.03
+gain	7	0	-110.56
+gain	0	8	-106.75
+gain	8	0	-111.25
+gain	0	9	-107.25
+gain	9	0	-107.24
+gain	0	10	-115.74
+gain	10	0	-118.04
+gain	0	11	-117.77
+gain	11	0	-121.51
+gain	0	12	-112.05
+gain	12	0	-113.75
+gain	0	13	-118.28
+gain	13	0	-116.20
+gain	0	14	-116.72
+gain	14	0	-117.27
+gain	0	15	-77.28
+gain	15	0	-73.96
+gain	0	16	-87.97
+gain	16	0	-85.90
+gain	0	17	-93.46
+gain	17	0	-94.17
+gain	0	18	-100.62
+gain	18	0	-102.33
+gain	0	19	-96.70
+gain	19	0	-99.46
+gain	0	20	-102.53
+gain	20	0	-103.39
+gain	0	21	-107.64
+gain	21	0	-108.75
+gain	0	22	-107.87
+gain	22	0	-112.21
+gain	0	23	-107.76
+gain	23	0	-111.42
+gain	0	24	-108.33
+gain	24	0	-114.86
+gain	0	25	-112.34
+gain	25	0	-114.67
+gain	0	26	-117.18
+gain	26	0	-118.87
+gain	0	27	-110.74
+gain	27	0	-112.92
+gain	0	28	-112.29
+gain	28	0	-112.19
+gain	0	29	-114.82
+gain	29	0	-120.37
+gain	0	30	-92.53
+gain	30	0	-95.74
+gain	0	31	-99.21
+gain	31	0	-100.79
+gain	0	32	-102.31
+gain	32	0	-103.64
+gain	0	33	-103.22
+gain	33	0	-104.73
+gain	0	34	-105.83
+gain	34	0	-105.22
+gain	0	35	-114.75
+gain	35	0	-116.53
+gain	0	36	-100.94
+gain	36	0	-104.41
+gain	0	37	-104.79
+gain	37	0	-110.20
+gain	0	38	-108.21
+gain	38	0	-105.78
+gain	0	39	-110.24
+gain	39	0	-109.41
+gain	0	40	-109.80
+gain	40	0	-110.14
+gain	0	41	-116.08
+gain	41	0	-118.49
+gain	0	42	-123.16
+gain	42	0	-123.22
+gain	0	43	-116.98
+gain	43	0	-115.81
+gain	0	44	-116.43
+gain	44	0	-118.33
+gain	0	45	-96.06
+gain	45	0	-98.89
+gain	0	46	-91.85
+gain	46	0	-94.59
+gain	0	47	-89.61
+gain	47	0	-90.28
+gain	0	48	-104.50
+gain	48	0	-109.05
+gain	0	49	-105.33
+gain	49	0	-108.74
+gain	0	50	-108.51
+gain	50	0	-108.26
+gain	0	51	-108.71
+gain	51	0	-106.95
+gain	0	52	-106.94
+gain	52	0	-112.45
+gain	0	53	-112.63
+gain	53	0	-112.66
+gain	0	54	-107.14
+gain	54	0	-110.74
+gain	0	55	-115.13
+gain	55	0	-113.89
+gain	0	56	-117.57
+gain	56	0	-121.23
+gain	0	57	-115.98
+gain	57	0	-116.42
+gain	0	58	-118.12
+gain	58	0	-120.27
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diff --git a/tos/lib/tossim/topologies/layout.py b/tos/lib/tossim/topologies/layout.py
new file mode 100644
index 00000000..7c375d0a
--- /dev/null
+++ b/tos/lib/tossim/topologies/layout.py
@@ -0,0 +1,285 @@
+#!/usr/bin/env python
+
+import pygtk
+pygtk.require('2.0')
+import gtk
+
+class Mote:
+    def __init__(self):
+        self.x = 0
+        self.y = 0
+        self.selected = False
+
+class HelloWorld:
+    def hello(self, widget, data=None):
+        print "Hello World"
+
+    def delete_event(self, widget, event, data=None):
+        print "delete event occured"
+        return False
+
+    def destroy(self, widget, data=None):
+        gtk.main_quit()
+
+    def addButton(self, string, function, data=None):
+        button = gtk.Button(string)
+        button.connect("clicked", function, data)
+        self.buttonArea.add(button)
+        button.show()
+
+    def close(self, x1, y1, x2, y2):
+        x1 -= x2
+        y1 -= y2
+        x1 *= x1
+        y1 *= y1
+        if (x1 + y1 < 50):
+            print "close: ", x1, " ", y1
+            return True
+        else:
+            print "not close: ", x1, " ", y1 
+            return False
+
+    def within(self, m, x1, y1, x2, y2):
+        gX = max(x1, x2) + 5
+        lX = min(x1, x2) - 5
+        gY = max(y1, y2) + 5
+        lY = min(y1, y2) - 5
+        if (m.x >= lX and m.x <= gX and
+            m.y >= lY and m.y <= gY):
+            print "X: ", lX, "<=", m.x, "<=", gX
+            print "Y: ", lY, "<=", m.y, "<=", gY
+            return True
+        else:
+            print "X: ", lX, ">", m.x, ">", gX
+            print "Y: ", lY, ">", m.y, ">", gY
+            return False
+        
+    def button_press_event(self, widget, event):
+        if event.button == 1 and self.pixmap != None:
+            x = event.x
+            y = event.y
+            print "press at ", x, " ", y
+            self.start_x = event.x
+            self.start_y = event.y
+            self.dx = 0
+            self.dy = 0
+            self.new_target = True
+
+            for m in self.selected:
+                if self.close(m.x, m.y, x, y):
+                    self.new_target = False
+                            
+            if self.new_target:
+                for m in self.selected:
+                    m.selected = False
+                self.selected = []
+                
+            self.redraw_motes()
+
+    def button_release_event(self, widget, event):
+        if event.button == 1 and self.pixmap != None:
+            if self.new_target:
+                x = event.x
+                y = event.y
+                print "release at ", x, " ", y
+                for m in self.motes:
+                    if self.within(m, x, y, self.start_x, self.start_y):
+                        m.selected = True
+                        self.selected.append(m)
+                        self.redraw_motes()
+                        self.new_target = False
+            else:
+                for m in self.selected:
+                    m.x += self.dx
+                    m.y += self.dy
+                    
+            self.dx = 0
+            self.dy = 0
+            self.redraw_motes()
+            
+    def drag_event(self, widget, event):
+        x = y = state = None
+        if event.is_hint:
+            x, y, state = event.window.get_pointer()
+        else:
+            x = event.x
+            y = event.y
+            state = event.state
+            
+        if state & gtk.gdk.BUTTON1_MASK and self.pixmap != None:
+            if not self.new_target:
+                self.dx = event.x - self.start_x
+                self.dy = event.y - self.start_y
+                self.redraw_motes()
+                print "drag"
+
+                
+    def configure_event(self, widget, event):
+        self.widget = widget
+        self.x, self.y, self.width, self.height = widget.get_allocation()
+        self.pixmap = gtk.gdk.Pixmap(widget.window, self.width, self.height)
+        self.pixmap.draw_rectangle(widget.get_style().white_gc, True, 0, 0, self.width, self.height)
+        print "Configuring ", self.x, " ", self.y, " ", self.height, " ", self.width
+        return True
+    
+    def expose_event(self, widget, event):
+        x , y, width, height = event.area
+        print "expose"
+        widget.window.draw_drawable(widget.get_style().fg_gc[gtk.STATE_NORMAL],
+                                    self.pixmap, x, y, x, y, width, height)
+        return False
+
+    def redraw_motes(self):
+        self.pixmap.draw_rectangle(self.widget.get_style().white_gc, True, 0, 0, self.width, self.height)
+        self.widget.queue_draw_area(0, 0, self.width, self.height)
+        for mote in self.motes:
+            self.draw_mote(mote)
+            
+    def draw_mote(self, mote):
+        x = mote.x
+        y = mote.y
+        if mote.selected:
+            x += self.dx
+            y += self.dy
+            
+        rect = (int(x-5), int(y-5), 10, 10)
+        gc = self.widget.get_style().black_gc
+        if mote.selected:
+            gc = self.widget.get_style().light_gc[gtk.STATE_SELECTED]
+            
+        self.pixmap.draw_rectangle(gc, True,
+                                   rect[0], rect[1], rect[2], rect[3])
+
+    def createDrawPanel(self):
+        self.moteArea = gtk.DrawingArea()
+        self.moteArea.set_size_request(400,400)
+        self.drawArea.add(self.moteArea)
+        self.moteArea.show()
+        self.moteArea.connect("expose_event", self.expose_event)
+        self.moteArea.connect("configure_event", self.configure_event)
+        
+        self.moteArea.connect("motion_notify_event", self.drag_event)
+        self.moteArea.connect("button_press_event", self.button_press_event)
+        self.moteArea.connect("button_release_event", self.button_release_event)
+
+        self.moteArea.set_events(gtk.gdk.EXPOSURE_MASK
+                               | gtk.gdk.LEAVE_NOTIFY_MASK
+                               | gtk.gdk.BUTTON_PRESS_MASK
+                               | gtk.gdk.POINTER_MOTION_MASK
+                               | gtk.gdk.POINTER_MOTION_HINT_MASK
+                               | gtk.gdk.BUTTON_RELEASE_MASK)
+
+
+    def createButtonPanel(self):
+        self.addButton("Add", self.addNode)
+        self.addButton("Remove", self.removeSelected)
+        self.addButton("Print", self.printTopology)
+
+        table = gtk.Table(2, 2, True)
+        
+        label = gtk.Label("Area")
+        label.set_justify(gtk.JUSTIFY_LEFT)
+        label.show()
+        self.distanceText = gtk.TextBuffer()
+        self.distanceText.set_text("100")
+        view = gtk.TextView(self.distanceText)
+        table.attach(label, 0, 1, 0, 1)
+        table.attach(view, 1, 2, 0, 1)
+        view.show()    
+
+        label = gtk.Label("File")
+        label.set_justify(gtk.JUSTIFY_LEFT)
+        label.show()
+        self.fileText = gtk.TextBuffer()
+        self.fileText.set_text("layout.txt")
+        view = gtk.TextView(self.fileText)
+        view.show()
+        table.attach(label, 0, 1, 1, 2)
+        table.attach(view, 1, 2, 1, 2)
+
+        self.buttonArea.add(table)
+        table.set_row_spacings(4)
+        table.show()
+        self.addButton("Quit", self.quit);
+        
+    def __init__(self):
+        self.window = gtk.Window(gtk.WINDOW_TOPLEVEL)
+        self.window.connect("delete_event", self.delete_event)
+        self.window.connect("destroy", self.destroy)
+        self.window.set_border_width(10)
+
+        self.buttonArea = gtk.VBox()
+        self.drawArea = gtk.VBox()
+        self.totalArea = gtk.HBox()
+        self.totalArea.add(self.buttonArea)
+        self.totalArea.add(self.drawArea)
+
+        self.createDrawPanel()
+        self.createButtonPanel()
+        
+        self.window.add(self.totalArea)
+        self.buttonArea.show()
+        self.drawArea.show()
+        self.totalArea.show()
+        self.window.show()
+
+        self.motes = []
+
+        # For clicking and selecting motes
+        self.selected = []
+        self.new_target = False
+        self.start_x = 0
+        self.start_y = 0
+        self.dx = 0
+        self.dy = 0
+        
+    def add_mote(self, x, y):
+        m = Mote()
+        m.x = x
+        m.y = y
+        self.motes.append(m)
+
+    def addNode(self, widget, data=None):
+        self.add_mote(50, 50)
+        self.redraw_motes()
+        print "add node"
+
+    def removeSelected(self, widget, data=None):
+        for m in self.selected:
+            for other in self.motes:
+                if m == other:
+                    self.motes.remove(m)
+        self.selected = []
+        self.redraw_motes()
+        print "remove selected"
+
+    def printTopology(self, widget, data=None):
+        counter = 0
+        startiter, enditer = self.fileText.get_bounds()
+        filename = self.fileText.get_text(startiter, enditer)
+        file = open(filename, "w")
+        for m in self.motes:
+            x = m.x
+            y = m.y
+            startiter, enditer = self.distanceText.get_bounds()
+            text = self.distanceText.get_text(startiter, enditer)
+            x *= int(text)
+            y *= int(text)
+            x /= 400
+            y /= 400
+            file.write(str(counter) + " "+ str(x) + " "+ str(y) + "\n")
+        print "print topology"
+
+    def quit(self, widget, data=None):
+        gtk.main_quit()
+        
+    def main(self):
+        gtk.main()
+
+
+
+if __name__ == "__main__":
+    hello = HelloWorld()
+    hello.main()
+
+   
diff --git a/tos/lib/tossim/tos.h b/tos/lib/tossim/tos.h
new file mode 100644
index 00000000..1126b2bd
--- /dev/null
+++ b/tos/lib/tossim/tos.h
@@ -0,0 +1,94 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+#ifndef TOS_H_INCLUDED
+#define TOS_H_INCLUDED
+
+#if !defined(__CYGWIN__)
+#if defined(__MSP430__)
+#include 
+#else
+#include 
+#endif
+#else //cygwin
+#include 
+#include 
+#include 
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef __cplusplus
+typedef uint8_t bool;
+#endif
+
+enum { FALSE = 0, TRUE = 1 };
+
+extern uint16_t TOS_NODE_ID;
+
+#define PROGMEM
+
+#ifndef TOSSIM_MAX_NODES
+#define TOSSIM_MAX_NODES 1000
+#endif
+
+#include 
+#include 
+#include 
+#include 
+
+// We only want to include these files if we are compiling TOSSIM proper,
+// that is, the C file representing the TinyOS application. The TinyOS
+// build process means that this is the only really good place to put
+// them.
+#ifdef TOSSIM
+
+struct @atmostonce { };
+struct @atleastonce { };
+struct @exactlyonce { };
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
+
+#endif
diff --git a/tos/lib/tossim/tossim.c b/tos/lib/tossim/tossim.c
new file mode 100644
index 00000000..f8af15c7
--- /dev/null
+++ b/tos/lib/tossim/tossim.c
@@ -0,0 +1,243 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of TOSSIM C++ classes. Generally just directly
+ * call their C analogues.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+uint16_t TOS_NODE_ID = 1;
+
+Variable::Variable(char* str, char* formatStr, int array, int which) {
+  name = str;
+  format = formatStr;
+  isArray = array;
+  mote = which;
+  
+  int sLen = strlen(name);
+  realName = (char*)malloc(sLen + 1);
+  memcpy(realName, name, sLen + 1);
+  realName[sLen] = 0;
+
+  for (int i = 0; i < sLen; i++) {
+    if (realName[i] == '.') {
+      realName[i] = '$';
+    }
+  }
+
+  //  printf("Creating %s realName: %s format: %s %s\n", name, realName, formatStr, array? "[]":"");
+
+  if (sim_mote_get_variable_info(mote, realName, &ptr, &len) == 0) {
+    data = (char*)malloc(len + 1);
+    data[len] = 0;
+  }
+  else {
+    printf("Could not find variable %s\n", realName);
+    data = NULL;
+    ptr = NULL;
+  }
+}
+
+Variable::~Variable() {
+  free(data);
+}
+
+variable_string_t Variable::getData() {
+  if (data != NULL && ptr != NULL) {
+    str.ptr = data;
+    str.type = format;
+    str.len = len;
+    str.isArray = isArray;
+    //    printf("Getting %s %s %s\n", format, isArray? "[]":"", name);
+    memcpy(data, ptr, len);
+  }
+  else {
+    str.ptr = "";
+    str.type = "";
+    str.len = strlen("");
+    str.isArray = 0;
+  }
+  return str;
+}
+
+Mote::Mote(nesc_app_t* n) {
+  app = n;
+}
+Mote::~Mote(){}
+
+unsigned long Mote::id() {
+  return nodeID;
+}
+
+long long int Mote::euid() {
+  return sim_mote_euid(nodeID);
+}
+
+void Mote::setEuid(long long int val) {
+  sim_mote_set_euid(nodeID, val);
+}
+
+long long int Mote::bootTime() {
+  return sim_mote_start_time(nodeID);
+}
+
+void Mote::bootAtTime(long long int time) {
+  sim_mote_set_start_time(nodeID, time);
+  sim_mote_enqueue_boot_event(nodeID);
+}
+
+bool Mote::isOn() {
+  return sim_mote_is_on(nodeID);
+}
+
+void Mote::turnOff() {
+  sim_mote_turn_off(nodeID);
+}
+
+void Mote::turnOn() {
+  sim_mote_turn_on(nodeID);
+}
+
+void Mote::setID(unsigned long val) {
+  nodeID = val;
+}
+
+Variable* Mote::getVariable(char* name) {
+  char* typeStr = "";
+  int isArray;
+  // Could hash this for greater efficiency,
+  // but that would either require transformation
+  // in Tossim class or a more complex typemap.
+  if (app != NULL) {
+    for (int i = 0; i < app->numVariables; i++) {
+      if(strcmp(name, app->variableNames[i]) == 0) {
+	typeStr = app->variableTypes[i];
+	isArray = app->variableArray[i];
+	break;
+      }
+    }
+  }
+  //  printf("Getting variable %s of type %s %s\n", name, typeStr, isArray? "[]" : "");
+  return new Variable(name, typeStr, isArray, nodeID);
+}
+
+Tossim::Tossim(nesc_app_t* n) {
+  app = n;
+  init();
+}
+
+Tossim::~Tossim() {
+  sim_end();
+}
+
+void Tossim::init() {
+  sim_init();
+  motes = (Mote**)malloc(sizeof(Mote*) * (TOSSIM_MAX_NODES + 1));
+  memset(motes, 0, sizeof(Mote*) * TOSSIM_MAX_NODES);
+}
+
+long long int Tossim::time() {
+  return sim_time();
+}
+
+long long int Tossim::ticksPerSecond() {
+  return sim_ticks_per_sec();
+}
+
+char* Tossim::timeStr() {
+  sim_print_now(timeBuf, 256);
+  return timeBuf;
+}
+
+void Tossim::setTime(long long int val) {
+  sim_set_time(val);
+}
+
+Mote* Tossim::currentNode() {
+  return getNode(sim_node());
+}
+
+Mote* Tossim::getNode(unsigned long nodeID) {
+  if (nodeID > TOSSIM_MAX_NODES) {
+    nodeID = TOSSIM_MAX_NODES;
+    // log an error, asked for an invalid node
+  }
+  else {
+    if (motes[nodeID] == NULL) {
+      motes[nodeID] = new Mote(app);
+      if (nodeID == TOSSIM_MAX_NODES) {
+	motes[nodeID]->setID(0xffff);
+      }
+      else {
+	motes[nodeID]->setID(nodeID);
+      }
+    }
+    return motes[nodeID];
+  }
+}
+
+void Tossim::setCurrentNode(unsigned long nodeID) {
+  sim_set_node(nodeID);
+}
+
+void Tossim::addChannel(char* channel, FILE* file) {
+  sim_add_channel(channel, file);
+}
+
+bool Tossim::removeChannel(char* channel, FILE* file) {
+  return sim_remove_channel(channel, file);
+}
+
+bool Tossim::runNextEvent() {
+  return sim_run_next_event();
+}
+
+MAC* Tossim::mac() {
+  return new MAC();
+}
+
+Radio* Tossim::radio() {
+  return new Radio();
+}
+
+Packet* Tossim::newPacket() {
+  return new Packet();
+}
diff --git a/tos/lib/tossim/tossim.h b/tos/lib/tossim/tossim.h
new file mode 100644
index 00000000..11628cb6
--- /dev/null
+++ b/tos/lib/tossim/tossim.h
@@ -0,0 +1,134 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Declaration of C++ objects representing TOSSIM abstractions.
+ * Used to generate Python objects.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id$
+
+#ifndef TOSSIM_H_INCLUDED
+#define TOSSIM_H_INCLUDED
+
+//#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+typedef struct variable_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();
+  
+ private:
+  char* name;
+  char* realName;
+  char* format;
+  int mote;
+  void* ptr;
+  char* data;
+  size_t len;
+  int isArray;
+  variable_string_t str;
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  void setID(unsigned long id);  
+
+  Variable* getVariable(char* name);
+  
+ private:
+  unsigned long nodeID;
+  nesc_app_t* app;
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond();
+  char* timeStr();
+  void setTime(long long int time);
+  
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+  
+  bool runNextEvent();
+
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+
+ private:
+  char timeBuf[256];
+  nesc_app_t* app;
+  Mote** motes;
+};
+
+
+
+#endif // TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/tossim.i b/tos/lib/tossim/tossim.i
new file mode 100644
index 00000000..e819846d
--- /dev/null
+++ b/tos/lib/tossim/tossim.i
@@ -0,0 +1,377 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * SWIG interface specification for TOSSIM. This file defines
+ * the top-level TOSSIM and Mote objects which are exported to
+ * Python. The typemap at the beginning allows a script to
+ * use Python files as a parameter to a function that takes a
+ * FILE* as a parameter (e.g., the logging system in sim_log.h).
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+%module TOSSIM
+
+%{
+#include 
+#include 
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+%}
+
+%include mac.i
+%include radio.i
+%include packet.i
+
+%typemap(python,in) FILE * {
+  if (!PyFile_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+    return NULL;
+  }
+  $1 = PyFile_AsFile($input);
+}
+
+%typemap(python,out) variable_string_t {
+  if ($1.isArray) {
+    //printf("Generating array %s\n", $1.type);
+    $result = listFromArray  ($1.type, $1.ptr, $1.len);
+  }
+  else {
+    //printf("Generating scalar %s\n", $1.type);
+    $result = valueFromScalar($1.type, $1.ptr, $1.len);
+  }
+  if ($result == NULL) {
+    PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+  }
+}
+
+
+%typemap(python,in) nesc_app_t* {
+  if (!PyList_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+    return NULL;
+  }
+  else {
+    int size = PyList_Size($input);
+    int i = 0;
+    nesc_app_t* app;
+
+    if (size % 3 != 0) {
+      PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+      return NULL;
+    }
+
+    app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+
+    app->numVariables = size / 3;
+    app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+
+    memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+
+    for (i = 0; i < app->numVariables; i++) {
+      PyObject* name = PyList_GetItem($input, 3 * i);
+      PyObject* array = PyList_GetItem($input, (3 * i) + 1);
+      PyObject* format = PyList_GetItem($input, (3 * i) + 2);
+      if (PyString_Check(name) && PyString_Check(format)) {
+        app->variableNames[i] = PyString_AsString(name);
+        app->variableTypes[i] = PyString_AsString(format);
+        if (strcmp(PyString_AsString(array), "array") == 0) {
+          app->variableArray[i] = 1;
+          //printf("%s is an array\n", PyString_AsString(name));
+        }
+        else {
+          app->variableArray[i] = 0;
+          //printf("%s is a scalar\n", PyString_AsString(name));
+        }
+      }
+      else {
+        app->variableNames[i] = "";
+        app->variableTypes[i] = "";
+      }
+    }
+
+    $1 = app;
+  }
+}
+
+typedef struct var_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();  
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  Variable* getVariable(char* name);
+
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond(); 
+  void setTime(long long int time);
+  char* timeStr();
+
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+
+  bool runNextEvent();
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+};
+
+
diff --git a/tos/lib/tossim/tossim_wrap.cxx b/tos/lib/tossim/tossim_wrap.cxx
new file mode 100644
index 00000000..6eb304a7
--- /dev/null
+++ b/tos/lib/tossim/tossim_wrap.cxx
@@ -0,0 +1,3435 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.21
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+#define SWIGPYTHON
+
+#ifdef __cplusplus
+template class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper& rhs);
+};                                                    
+#endif
+
+
+#include "Python.h"
+
+/*************************************************************** -*- c -*-
+ * python/precommon.swg
+ *
+ * Rename all exported symbols from common.swg, to avoid symbol
+ * clashes if multiple interpreters are included
+ *
+ ************************************************************************/
+
+#define SWIG_TypeRegister    SWIG_Python_TypeRegister
+#define SWIG_TypeCheck       SWIG_Python_TypeCheck
+#define SWIG_TypeCast        SWIG_Python_TypeCast
+#define SWIG_TypeDynamicCast SWIG_Python_TypeDynamicCast
+#define SWIG_TypeName        SWIG_Python_TypeName
+#define SWIG_TypeQuery       SWIG_Python_TypeQuery
+#define SWIG_TypeClientData  SWIG_Python_TypeClientData
+#define SWIG_PackData        SWIG_Python_PackData 
+#define SWIG_UnpackData      SWIG_Python_UnpackData 
+
+
+/***********************************************************************
+ * common.swg
+ *
+ *     This file contains generic SWIG runtime support for pointer
+ *     type checking as well as a few commonly used macros to control
+ *     external linkage.
+ *
+ * Author : David Beazley (beazley@cs.uchicago.edu)
+ *
+ * Copyright (c) 1999-2000, The University of Chicago
+ * 
+ * This file may be freely redistributed without license or fee provided
+ * this copyright message remains intact.
+ ************************************************************************/
+
+#include 
+
+#if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#  if defined(_MSC_VER) || defined(__GNUC__)
+#    if defined(STATIC_LINKED)
+#      define SWIGEXPORT(a) a
+#      define SWIGIMPORT(a) extern a
+#    else
+#      define SWIGEXPORT(a) __declspec(dllexport) a
+#      define SWIGIMPORT(a) extern a
+#    endif
+#  else
+#    if defined(__BORLANDC__)
+#      define SWIGEXPORT(a) a _export
+#      define SWIGIMPORT(a) a _export
+#    else
+#      define SWIGEXPORT(a) a
+#      define SWIGIMPORT(a) a
+#    endif
+#  endif
+#else
+#  define SWIGEXPORT(a) a
+#  define SWIGIMPORT(a) a
+#endif
+
+#ifdef SWIG_GLOBAL
+#  define SWIGRUNTIME(a) SWIGEXPORT(a)
+#else
+#  define SWIGRUNTIME(a) static a
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *(*swig_converter_func)(void *);
+typedef struct swig_type_info *(*swig_dycast_func)(void **);
+
+typedef struct swig_type_info {
+  const char             *name;
+  swig_converter_func     converter;
+  const char             *str;
+  void                   *clientdata;
+  swig_dycast_func        dcast;
+  struct swig_type_info  *next;
+  struct swig_type_info  *prev;
+} swig_type_info;
+
+#ifdef SWIG_NOINCLUDE
+
+SWIGIMPORT(swig_type_info *) SWIG_TypeRegister(swig_type_info *);
+SWIGIMPORT(swig_type_info *) SWIG_TypeCheck(char *c, swig_type_info *);
+SWIGIMPORT(void *)           SWIG_TypeCast(swig_type_info *, void *);
+SWIGIMPORT(swig_type_info *) SWIG_TypeDynamicCast(swig_type_info *, void **);
+SWIGIMPORT(const char *)     SWIG_TypeName(const swig_type_info *);
+SWIGIMPORT(swig_type_info *) SWIG_TypeQuery(const char *);
+SWIGIMPORT(void)             SWIG_TypeClientData(swig_type_info *, void *);
+SWIGIMPORT(char *)           SWIG_PackData(char *, void *, int);
+SWIGIMPORT(char *)           SWIG_UnpackData(char *, void *, int);
+
+#else
+
+static swig_type_info *swig_type_list = 0;
+
+/* Register a type mapping with the type-checking */
+SWIGRUNTIME(swig_type_info *)
+SWIG_TypeRegister(swig_type_info *ti) {
+  swig_type_info *tc, *head, *ret, *next;
+  /* Check to see if this type has already been registered */
+  tc = swig_type_list;
+  while (tc) {
+    if (strcmp(tc->name, ti->name) == 0) {
+      /* Already exists in the table.  Just add additional types to the list */
+      if (tc->clientdata) ti->clientdata = tc->clientdata;
+      head = tc;
+      next = tc->next;
+      goto l1;
+    }
+    tc = tc->prev;
+  }
+  head = ti;
+  next = 0;
+
+  /* Place in list */
+  ti->prev = swig_type_list;
+  swig_type_list = ti;
+
+  /* Build linked lists */
+  l1:
+  ret = head;
+  tc = ti + 1;
+  /* Patch up the rest of the links */
+  while (tc->name) {
+    head->next = tc;
+    tc->prev = head;
+    head = tc;
+    tc++;
+  }
+  if (next) next->prev = head;
+  head->next = next;
+  return ret;
+}
+
+/* Check the typename */
+SWIGRUNTIME(swig_type_info *) 
+SWIG_TypeCheck(char *c, swig_type_info *ty) {
+  swig_type_info *s;
+  if (!ty) return 0;        /* Void pointer */
+  s = ty->next;             /* First element always just a name */
+  do {
+    if (strcmp(s->name,c) == 0) {
+      if (s == ty->next) return s;
+      /* Move s to the top of the linked list */
+      s->prev->next = s->next;
+      if (s->next) {
+        s->next->prev = s->prev;
+      }
+      /* Insert s as second element in the list */
+      s->next = ty->next;
+      if (ty->next) ty->next->prev = s;
+      ty->next = s;
+      s->prev = ty;
+      return s;
+    }
+    s = s->next;
+  } while (s && (s != ty->next));
+  return 0;
+}
+
+/* Cast a pointer up an inheritance hierarchy */
+SWIGRUNTIME(void *) 
+SWIG_TypeCast(swig_type_info *ty, void *ptr) {
+  if ((!ty) || (!ty->converter)) return ptr;
+  return (*ty->converter)(ptr);
+}
+
+/* Dynamic pointer casting. Down an inheritance hierarchy */
+SWIGRUNTIME(swig_type_info *) 
+SWIG_TypeDynamicCast(swig_type_info *ty, void **ptr) {
+  swig_type_info *lastty = ty;
+  if (!ty || !ty->dcast) return ty;
+  while (ty && (ty->dcast)) {
+    ty = (*ty->dcast)(ptr);
+    if (ty) lastty = ty;
+  }
+  return lastty;
+}
+
+/* Return the name associated with this type */
+SWIGRUNTIME(const char *)
+SWIG_TypeName(const swig_type_info *ty) {
+  return ty->name;
+}
+
+/* Search for a swig_type_info structure */
+SWIGRUNTIME(swig_type_info *)
+SWIG_TypeQuery(const char *name) {
+  swig_type_info *ty = swig_type_list;
+  while (ty) {
+    if (ty->str && (strcmp(name,ty->str) == 0)) return ty;
+    if (ty->name && (strcmp(name,ty->name) == 0)) return ty;
+    ty = ty->prev;
+  }
+  return 0;
+}
+
+/* Set the clientdata field for a type */
+SWIGRUNTIME(void)
+SWIG_TypeClientData(swig_type_info *ti, void *clientdata) {
+  swig_type_info *tc, *equiv;
+  if (ti->clientdata == clientdata) return;
+  ti->clientdata = clientdata;
+  equiv = ti->next;
+  while (equiv) {
+    if (!equiv->converter) {
+      tc = swig_type_list;
+      while (tc) {
+        if ((strcmp(tc->name, equiv->name) == 0))
+          SWIG_TypeClientData(tc,clientdata);
+        tc = tc->prev;
+      }
+    }
+    equiv = equiv->next;
+  }
+}
+
+/* Pack binary data into a string */
+SWIGRUNTIME(char *)
+SWIG_PackData(char *c, void *ptr, int sz) {
+  static char hex[17] = "0123456789abcdef";
+  int i;
+  unsigned char *u = (unsigned char *) ptr;
+  register unsigned char uu;
+  for (i = 0; i < sz; i++,u++) {
+    uu = *u;
+    *(c++) = hex[(uu & 0xf0) >> 4];
+    *(c++) = hex[uu & 0xf];
+  }
+  return c;
+}
+
+/* Unpack binary data from a string */
+SWIGRUNTIME(char *)
+SWIG_UnpackData(char *c, void *ptr, int sz) {
+  register unsigned char uu = 0;
+  register int d;
+  unsigned char *u = (unsigned char *) ptr;
+  int i;
+  for (i = 0; i < sz; i++, u++) {
+    d = *(c++);
+    if ((d >= '0') && (d <= '9'))
+      uu = ((d - '0') << 4);
+    else if ((d >= 'a') && (d <= 'f'))
+      uu = ((d - ('a'-10)) << 4);
+    d = *(c++);
+    if ((d >= '0') && (d <= '9'))
+      uu |= (d - '0');
+    else if ((d >= 'a') && (d <= 'f'))
+      uu |= (d - ('a'-10));
+    *u = uu;
+  }
+  return c;
+}
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+/***********************************************************************
+ * python.swg
+ *
+ *     This file contains the runtime support for Python modules
+ *     and includes code for managing global variables and pointer
+ *     type checking.
+ *
+ * Author : David Beazley (beazley@cs.uchicago.edu)
+ ************************************************************************/
+
+#include "Python.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SWIG_PY_INT     1
+#define SWIG_PY_FLOAT   2
+#define SWIG_PY_STRING  3
+#define SWIG_PY_POINTER 4
+#define SWIG_PY_BINARY  5
+
+/* Flags for pointer conversion */
+
+#define SWIG_POINTER_EXCEPTION     0x1
+#define SWIG_POINTER_DISOWN        0x2
+
+/* Exception handling in wrappers */
+#define SWIG_fail   goto fail
+
+/* Constant information structure */
+typedef struct swig_const_info {
+    int type;
+    char *name;
+    long lvalue;
+    double dvalue;
+    void   *pvalue;
+    swig_type_info **ptype;
+} swig_const_info;
+
+/* Common SWIG API */
+#define SWIG_ConvertPtr(obj, pp, type, flags) \
+  SWIG_Python_ConvertPtr(obj, pp, type, flags)
+#define SWIG_NewPointerObj(p, type, flags) \
+  SWIG_Python_NewPointerObj(p, type, flags)
+#define SWIG_MustGetPtr(p, type, argnum, flags) \
+  SWIG_Python_MustGetPtr(p, type, argnum, flags)
+
+/* Python-specific SWIG API */
+#define SWIG_newvarlink() \
+  SWIG_Python_newvarlink()
+#define SWIG_addvarlink(p, name, get_attr, set_attr) \
+  SWIG_Python_addvarlink(p, name, get_attr, set_attr)
+#define SWIG_ConvertPacked(obj, ptr, sz, ty, flags) \
+  SWIG_Python_ConvertPacked(obj, ptr, sz, ty, flags)
+#define SWIG_NewPackedObj(ptr, sz, type) \
+  SWIG_Python_NewPackedObj(ptr, sz, type)
+#define SWIG_InstallConstants(d, constants) \
+  SWIG_Python_InstallConstants(d, constants)
+
+#ifdef SWIG_NOINCLUDE
+
+SWIGIMPORT(int)               SWIG_Python_ConvertPtr(PyObject *, void **, swig_type_info *, int);
+SWIGIMPORT(PyObject *)        SWIG_Python_NewPointerObj(void *, swig_type_info *,int own);
+SWIGIMPORT(void *)            SWIG_Python_MustGetPtr(PyObject *, swig_type_info *, int, int);
+SWIGIMPORT(PyObject *)        SWIG_Python_newvarlink(void);
+SWIGIMPORT(void)              SWIG_Python_addvarlink(PyObject *, char *, PyObject *(*)(void), int (*)(PyObject *));
+SWIGIMPORT(int)               SWIG_Python_ConvertPacked(PyObject *, void *, int sz, swig_type_info *, int);
+SWIGIMPORT(PyObject *)        SWIG_Python_NewPackedObj(void *, int sz, swig_type_info *);
+SWIGIMPORT(void)              SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]);
+
+#else
+
+/* -----------------------------------------------------------------------------
+ * global variable support code.
+ * ----------------------------------------------------------------------------- */
+
+typedef struct swig_globalvar {   
+  char       *name;                  /* Name of global variable */
+  PyObject *(*get_attr)(void);       /* Return the current value */
+  int       (*set_attr)(PyObject *); /* Set the value */
+  struct swig_globalvar *next;
+} swig_globalvar;
+
+typedef struct swig_varlinkobject {
+  PyObject_HEAD
+  swig_globalvar *vars;
+} swig_varlinkobject;
+
+static PyObject *
+swig_varlink_repr(swig_varlinkobject *v) {
+  v = v;
+  return PyString_FromString("");
+}
+
+static int
+swig_varlink_print(swig_varlinkobject *v, FILE *fp, int flags) {
+  swig_globalvar  *var;
+  flags = flags;
+  fprintf(fp,"Global variables { ");
+  for (var = v->vars; var; var=var->next) {
+    fprintf(fp,"%s", var->name);
+    if (var->next) fprintf(fp,", ");
+  }
+  fprintf(fp," }\n");
+  return 0;
+}
+
+static PyObject *
+swig_varlink_getattr(swig_varlinkobject *v, char *n) {
+  swig_globalvar *var = v->vars;
+  while (var) {
+    if (strcmp(var->name,n) == 0) {
+      return (*var->get_attr)();
+    }
+    var = var->next;
+  }
+  PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+  return NULL;
+}
+
+static int
+swig_varlink_setattr(swig_varlinkobject *v, char *n, PyObject *p) {
+  swig_globalvar *var = v->vars;
+  while (var) {
+    if (strcmp(var->name,n) == 0) {
+      return (*var->set_attr)(p);
+    }
+    var = var->next;
+  }
+  PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+  return 1;
+}
+
+statichere PyTypeObject varlinktype = {
+  PyObject_HEAD_INIT(0)              
+  0,
+  (char *)"swigvarlink",              /* Type name    */
+  sizeof(swig_varlinkobject),         /* Basic size   */
+  0,                                  /* Itemsize     */
+  0,                                  /* Deallocator  */ 
+  (printfunc) swig_varlink_print,     /* Print        */
+  (getattrfunc) swig_varlink_getattr, /* get attr     */
+  (setattrfunc) swig_varlink_setattr, /* Set attr     */
+  0,                                  /* tp_compare   */
+  (reprfunc) swig_varlink_repr,       /* tp_repr      */    
+  0,                                  /* tp_as_number */
+  0,                                  /* tp_as_mapping*/
+  0,                                  /* tp_hash      */
+};
+
+/* Create a variable linking object for use later */
+SWIGRUNTIME(PyObject *)
+SWIG_Python_newvarlink(void) {
+  swig_varlinkobject *result = 0;
+  result = PyMem_NEW(swig_varlinkobject,1);
+  varlinktype.ob_type = &PyType_Type;    /* Patch varlinktype into a PyType */
+  result->ob_type = &varlinktype;
+  result->vars = 0;
+  result->ob_refcnt = 0;
+  Py_XINCREF((PyObject *) result);
+  return ((PyObject*) result);
+}
+
+SWIGRUNTIME(void)
+SWIG_Python_addvarlink(PyObject *p, char *name, PyObject *(*get_attr)(void), int (*set_attr)(PyObject *p)) {
+  swig_varlinkobject *v;
+  swig_globalvar *gv;
+  v= (swig_varlinkobject *) p;
+  gv = (swig_globalvar *) malloc(sizeof(swig_globalvar));
+  gv->name = (char *) malloc(strlen(name)+1);
+  strcpy(gv->name,name);
+  gv->get_attr = get_attr;
+  gv->set_attr = set_attr;
+  gv->next = v->vars;
+  v->vars = gv;
+}
+
+/* Convert a pointer value */
+SWIGRUNTIME(int)
+SWIG_Python_ConvertPtr(PyObject *obj, void **ptr, swig_type_info *ty, int flags) {
+  swig_type_info *tc;
+  char  *c = 0;
+  static PyObject *SWIG_this = 0;
+  int    newref = 0;
+  PyObject  *pyobj = 0;
+
+  if (!obj) return 0;
+  if (obj == Py_None) {
+    *ptr = 0;
+    return 0;
+  }
+#ifdef SWIG_COBJECT_TYPES
+  if (!(PyCObject_Check(obj))) {
+    if (!SWIG_this)
+      SWIG_this = PyString_FromString("this");
+    pyobj = obj;
+    obj = PyObject_GetAttr(obj,SWIG_this);
+    newref = 1;
+    if (!obj) goto type_error;
+    if (!PyCObject_Check(obj)) {
+      Py_DECREF(obj);
+      goto type_error;
+    }
+  }  
+  *ptr = PyCObject_AsVoidPtr(obj);
+  c = (char *) PyCObject_GetDesc(obj);
+  if (newref) Py_DECREF(obj);
+  goto cobject;
+#else
+  if (!(PyString_Check(obj))) {
+    if (!SWIG_this)
+      SWIG_this = PyString_FromString("this");
+    pyobj = obj;
+    obj = PyObject_GetAttr(obj,SWIG_this);
+    newref = 1;
+    if (!obj) goto type_error;
+    if (!PyString_Check(obj)) {
+      Py_DECREF(obj);
+      goto type_error;
+    }
+  } 
+  c = PyString_AsString(obj);
+  /* Pointer values must start with leading underscore */
+  if (*c != '_') {
+    *ptr = (void *) 0;
+    if (strcmp(c,"NULL") == 0) {
+      if (newref) { Py_DECREF(obj); }
+      return 0;
+    } else {
+      if (newref) { Py_DECREF(obj); }
+      goto type_error;
+    }
+  }
+  c++;
+  c = SWIG_UnpackData(c,ptr,sizeof(void *));
+  if (newref) { Py_DECREF(obj); }
+#endif
+
+#ifdef SWIG_COBJECT_TYPES
+cobject:
+#endif
+
+  if (ty) {
+    tc = SWIG_TypeCheck(c,ty);
+    if (!tc) goto type_error;
+    *ptr = SWIG_TypeCast(tc,(void*) *ptr);
+  }
+
+  if ((pyobj) && (flags & SWIG_POINTER_DISOWN)) {
+    PyObject *zero = PyInt_FromLong(0);
+    PyObject_SetAttrString(pyobj,(char*)"thisown",zero);
+    Py_DECREF(zero);
+  }
+  return 0;
+
+type_error:
+  if (flags & SWIG_POINTER_EXCEPTION) {
+    if (ty && c) {
+      char *temp = (char *) malloc(64+strlen(ty->name)+strlen(c));
+      sprintf(temp,"Type error. Got %s, expected %s", c, ty->name);
+      PyErr_SetString(PyExc_TypeError, temp);
+      free((char *) temp);
+    } else {
+      PyErr_SetString(PyExc_TypeError,"Expected a pointer");
+    }
+  }
+  return -1;
+}
+
+/* Convert a pointer value, signal an exception on a type mismatch */
+SWIGRUNTIME(void *)
+SWIG_Python_MustGetPtr(PyObject *obj, swig_type_info *ty, int argnum, int flags) {
+  void *result;
+  SWIG_Python_ConvertPtr(obj, &result, ty, flags | SWIG_POINTER_EXCEPTION);
+  return result;
+}
+
+/* Convert a packed value value */
+SWIGRUNTIME(int)
+SWIG_Python_ConvertPacked(PyObject *obj, void *ptr, int sz, swig_type_info *ty, int flags) {
+  swig_type_info *tc;
+  char  *c = 0;
+
+  if ((!obj) || (!PyString_Check(obj))) goto type_error;
+  c = PyString_AsString(obj);
+  /* Pointer values must start with leading underscore */
+  if (*c != '_') goto type_error;
+  c++;
+  c = SWIG_UnpackData(c,ptr,sz);
+  if (ty) {
+    tc = SWIG_TypeCheck(c,ty);
+    if (!tc) goto type_error;
+  }
+  return 0;
+
+type_error:
+
+  if (flags) {
+    if (ty && c) {
+      char *temp = (char *) malloc(64+strlen(ty->name)+strlen(c));
+      sprintf(temp,"Type error. Got %s, expected %s", c, ty->name);
+      PyErr_SetString(PyExc_TypeError, temp);
+      free((char *) temp);
+    } else {
+      PyErr_SetString(PyExc_TypeError,"Expected a pointer");
+    }
+  }
+  return -1;
+}
+
+/* Create a new pointer object */
+SWIGRUNTIME(PyObject *)
+SWIG_Python_NewPointerObj(void *ptr, swig_type_info *type, int own) {
+  PyObject *robj;
+  if (!ptr) {
+    Py_INCREF(Py_None);
+    return Py_None;
+  }
+#ifdef SWIG_COBJECT_TYPES
+  robj = PyCObject_FromVoidPtrAndDesc((void *) ptr, (char *) type->name, NULL);
+#else
+  {
+    char result[1024];
+    char *r = result;
+    *(r++) = '_';
+    r = SWIG_PackData(r,&ptr,sizeof(void *));
+    strcpy(r,type->name);
+    robj = PyString_FromString(result);
+  }
+#endif
+  if (!robj || (robj == Py_None)) return robj;
+  if (type->clientdata) {
+    PyObject *inst;
+    PyObject *args = Py_BuildValue((char*)"(O)", robj);
+    Py_DECREF(robj);
+    inst = PyObject_CallObject((PyObject *) type->clientdata, args);
+    Py_DECREF(args);
+    if (inst) {
+      if (own) {
+        PyObject *n = PyInt_FromLong(1);
+        PyObject_SetAttrString(inst,(char*)"thisown",n);
+        Py_DECREF(n);
+      }
+      robj = inst;
+    }
+  }
+  return robj;
+}
+
+SWIGRUNTIME(PyObject *)
+SWIG_Python_NewPackedObj(void *ptr, int sz, swig_type_info *type) {
+  char result[1024];
+  char *r = result;
+  if ((2*sz + 1 + strlen(type->name)) > 1000) return 0;
+  *(r++) = '_';
+  r = SWIG_PackData(r,ptr,sz);
+  strcpy(r,type->name);
+  return PyString_FromString(result);
+}
+
+/* Install Constants */
+SWIGRUNTIME(void)
+SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]) {
+  int i;
+  PyObject *obj;
+  for (i = 0; constants[i].type; i++) {
+    switch(constants[i].type) {
+    case SWIG_PY_INT:
+      obj = PyInt_FromLong(constants[i].lvalue);
+      break;
+    case SWIG_PY_FLOAT:
+      obj = PyFloat_FromDouble(constants[i].dvalue);
+      break;
+    case SWIG_PY_STRING:
+      obj = PyString_FromString((char *) constants[i].pvalue);
+      break;
+    case SWIG_PY_POINTER:
+      obj = SWIG_NewPointerObj(constants[i].pvalue, *(constants[i]).ptype,0);
+      break;
+    case SWIG_PY_BINARY:
+      obj = SWIG_NewPackedObj(constants[i].pvalue, constants[i].lvalue, *(constants[i].ptype));
+      break;
+    default:
+      obj = 0;
+      break;
+    }
+    if (obj) {
+      PyDict_SetItemString(d,constants[i].name,obj);
+      Py_DECREF(obj);
+    }
+  }
+}
+
+#endif
+
+/* Contract support */
+
+#define SWIG_contract_assert(expr, msg) if (!(expr)) { PyErr_SetString(PyExc_RuntimeError, (char *) msg ); goto fail; } else
+
+#ifdef __cplusplus
+}
+#endif
+
+
+/* -------- TYPES TABLE (BEGIN) -------- */
+
+#define  SWIGTYPE_p_Radio swig_types[0] 
+#define  SWIGTYPE_p_nesc_app_t swig_types[1] 
+#define  SWIGTYPE_p_FILE swig_types[2] 
+#define  SWIGTYPE_p_MAC swig_types[3] 
+#define  SWIGTYPE_p_Packet swig_types[4] 
+#define  SWIGTYPE_p_Variable swig_types[5] 
+#define  SWIGTYPE_p_Tossim swig_types[6] 
+#define  SWIGTYPE_p_variable_string_t swig_types[7] 
+#define  SWIGTYPE_p_Mote swig_types[8] 
+#define  SWIGTYPE_p_p_char swig_types[9] 
+#define  SWIGTYPE_p_int swig_types[10] 
+static swig_type_info *swig_types[12];
+
+/* -------- TYPES TABLE (END) -------- */
+
+
+/*-----------------------------------------------
+              @(target):= _TOSSIM.so
+  ------------------------------------------------*/
+#define SWIG_init    init_TOSSIM
+
+#define SWIG_name    "_TOSSIM"
+
+#include 
+#include 
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+
+
+#include 
+
+
+#include 
+
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+static PyObject *_wrap_new_MAC(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)":new_MAC")) goto fail;
+    result = (MAC *)new MAC();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_MAC, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_MAC(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_MAC",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_initHigh(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_initHigh",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->initHigh();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_initLow(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_initLow",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->initLow();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_high(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_high",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->high();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_low(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_low",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->low();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_symbolsPerSec(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_symbolsPerSec",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->symbolsPerSec();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_bitsPerSymbol(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_bitsPerSymbol",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->bitsPerSymbol();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_preambleLength(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_preambleLength",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->preambleLength();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_exponentBase(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_exponentBase",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->exponentBase();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_maxIterations(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_maxIterations",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->maxIterations();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_minFreeSamples(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_minFreeSamples",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->minFreeSamples();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_rxtxDelay(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_rxtxDelay",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->rxtxDelay();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_ackTime(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:MAC_ackTime",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->ackTime();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setInitHigh(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setInitHigh",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setInitHigh(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setInitLow(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setInitLow",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setInitLow(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setHigh(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setHigh",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setHigh(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setLow(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setLow",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setLow(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setSymbolsPerSec(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setSymbolsPerSec",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setSymbolsPerSec(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setBitsBerSymbol(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setBitsBerSymbol",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setBitsBerSymbol(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setPreambleLength(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setPreambleLength",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setPreambleLength(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setExponentBase(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setExponentBase",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setExponentBase(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setMaxIterations(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setMaxIterations",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setMaxIterations(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setMinFreeSamples(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setMinFreeSamples",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setMinFreeSamples(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setRxtxDelay(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setRxtxDelay",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setRxtxDelay(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_MAC_setAckTime(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    MAC *arg1 = (MAC *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:MAC_setAckTime",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_MAC,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setAckTime(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * MAC_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_MAC, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_new_Radio(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)":new_Radio")) goto fail;
+    result = (Radio *)new Radio();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Radio, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_Radio(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_Radio",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_add(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    double arg4 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oiid:Radio_add",&obj0,&arg2,&arg3,&arg4)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->add(arg2,arg3,arg4);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_gain(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    double result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oii:Radio_gain",&obj0,&arg2,&arg3)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (double)(arg1)->gain(arg2,arg3);
+    
+    resultobj = PyFloat_FromDouble(result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_connected(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    bool result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oii:Radio_connected",&obj0,&arg2,&arg3)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (bool)(arg1)->connected(arg2,arg3);
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_remove(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oii:Radio_remove",&obj0,&arg2,&arg3)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->remove(arg2,arg3);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_setNoise(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    int arg2 ;
+    double arg3 ;
+    double arg4 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oidd:Radio_setNoise",&obj0,&arg2,&arg3,&arg4)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setNoise(arg2,arg3,arg4);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Radio_setSensitivity(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Radio *arg1 = (Radio *) 0 ;
+    double arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Od:Radio_setSensitivity",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Radio,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setSensitivity(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * Radio_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_Radio, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_new_Packet(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)":new_Packet")) goto fail;
+    result = (Packet *)new Packet();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Packet, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_Packet(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_Packet",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_setDestination(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:Packet_setDestination",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setDestination(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_destination(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Packet_destination",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->destination();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_setLength(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:Packet_setLength",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setLength(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_length(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Packet_length",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->length();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_setType(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:Packet_setType",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setType(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_type(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Packet_type",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->type();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_data(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    char *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Packet_data",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (char *)(arg1)->data();
+    
+    resultobj = result ? PyString_FromString(result) : Py_BuildValue((char*)"");
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_setData(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    char *arg2 ;
+    int arg3 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Packet_setData",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    {
+        arg2 = (char *) PyString_AsString(obj1);
+        arg3 = (int) PyString_Size(obj1);
+    }
+    (arg1)->setData(arg2,arg3);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_maxLength(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Packet_maxLength",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int)(arg1)->maxLength();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_setStrength(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:Packet_setStrength",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->setStrength(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_deliver(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    long long arg3 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj2 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OiO:Packet_deliver",&obj0,&arg2,&obj2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg3 = (long long) PyLong_AsLongLong(obj2);
+    if (PyErr_Occurred()) SWIG_fail;
+    (arg1)->deliver(arg2,arg3);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Packet_deliverNow(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Packet *arg1 = (Packet *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:Packet_deliverNow",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Packet,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->deliverNow(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * Packet_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_Packet, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_variable_string_t_type_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    char *arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Os:variable_string_t_type_set",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    {
+        if (arg1->type) delete [] arg1->type;
+        if (arg2) {
+            arg1->type = (char *) (new char[strlen(arg2)+1]);
+            strcpy((char *) arg1->type,arg2);
+        } else {
+            arg1->type = 0;
+        }
+    }
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_type_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    char *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:variable_string_t_type_get",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (char *) ((arg1)->type);
+    
+    resultobj = result ? PyString_FromString(result) : Py_BuildValue((char*)"");
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_ptr_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    char *arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Os:variable_string_t_ptr_set",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    {
+        if (arg1->ptr) delete [] arg1->ptr;
+        if (arg2) {
+            arg1->ptr = (char *) (new char[strlen(arg2)+1]);
+            strcpy((char *) arg1->ptr,arg2);
+        } else {
+            arg1->ptr = 0;
+        }
+    }
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_ptr_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    char *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:variable_string_t_ptr_get",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (char *) ((arg1)->ptr);
+    
+    resultobj = result ? PyString_FromString(result) : Py_BuildValue((char*)"");
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_len_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:variable_string_t_len_set",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    if (arg1) (arg1)->len = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_len_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:variable_string_t_len_get",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int) ((arg1)->len);
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_isArray_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:variable_string_t_isArray_set",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    if (arg1) (arg1)->isArray = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_variable_string_t_isArray_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:variable_string_t_isArray_get",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (int) ((arg1)->isArray);
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_new_variable_string_t(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)":new_variable_string_t")) goto fail;
+    result = (variable_string_t *)new variable_string_t();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_variable_string_t, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_variable_string_t(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    variable_string_t *arg1 = (variable_string_t *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_variable_string_t",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_variable_string_t,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * variable_string_t_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_variable_string_t, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_nesc_app_t_numVariables_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    int arg2 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Oi:nesc_app_t_numVariables_set",&obj0,&arg2)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    if (arg1) (arg1)->numVariables = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_numVariables_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    int result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_numVariables_get",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (int) ((arg1)->numVariables);
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableNames_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    char **arg2 = (char **) 0 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableNames_set",&obj0,&obj1)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    if ((SWIG_ConvertPtr(obj1,(void **) &arg2, SWIGTYPE_p_p_char,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    if (arg1) (arg1)->variableNames = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableNames_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    char **result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableNames_get",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (char **) ((arg1)->variableNames);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_p_char, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableTypes_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    char **arg2 = (char **) 0 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableTypes_set",&obj0,&obj1)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    if ((SWIG_ConvertPtr(obj1,(void **) &arg2, SWIGTYPE_p_p_char,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    if (arg1) (arg1)->variableTypes = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableTypes_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    char **result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableTypes_get",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (char **) ((arg1)->variableTypes);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_p_char, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableArray_set(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    int *arg2 = (int *) 0 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableArray_set",&obj0,&obj1)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    if ((SWIG_ConvertPtr(obj1,(void **) &arg2, SWIGTYPE_p_int,SWIG_POINTER_EXCEPTION | SWIG_POINTER_DISOWN )) == -1) SWIG_fail;
+    if (arg1) (arg1)->variableArray = arg2;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_nesc_app_t_variableArray_get(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    int *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableArray_get",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (int *) ((arg1)->variableArray);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_int, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_new_nesc_app_t(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)":new_nesc_app_t")) goto fail;
+    result = (nesc_app_t *)new nesc_app_t();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_nesc_app_t, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_nesc_app_t(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_nesc_app_t",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * nesc_app_t_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_nesc_app_t, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_new_Variable(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    char *arg1 ;
+    char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    Variable *result;
+    
+    if(!PyArg_ParseTuple(args,(char *)"ssii:new_Variable",&arg1,&arg2,&arg3,&arg4)) goto fail;
+    result = (Variable *)new Variable(arg1,arg2,arg3,arg4);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Variable, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_Variable(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Variable *arg1 = (Variable *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_Variable",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Variable,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Variable_getData(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Variable *arg1 = (Variable *) 0 ;
+    variable_string_t result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Variable_getData",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Variable,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (arg1)->getData();
+    
+    {
+        if ((&result)->isArray) {
+            //printf("Generating array %s\n", (&result)->type);
+            resultobj = listFromArray  ((&result)->type, (&result)->ptr, (&result)->len);
+        }
+        else {
+            //printf("Generating scalar %s\n", (&result)->type);
+            resultobj = valueFromScalar((&result)->type, (&result)->ptr, (&result)->len);
+        }
+        if (resultobj == NULL) {
+            PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+        }
+    }
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * Variable_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_Variable, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_new_Mote(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    Mote *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:new_Mote",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (Mote *)new Mote(arg1);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Mote, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_Mote(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_Mote",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_id(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    unsigned long result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_id",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (unsigned long)(arg1)->id();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_euid(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    long long result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_euid",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (long long)(arg1)->euid();
+    
+    resultobj = PyLong_FromLongLong(result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_setEuid(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    long long arg2 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Mote_setEuid",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg2 = (long long) PyLong_AsLongLong(obj1);
+    if (PyErr_Occurred()) SWIG_fail;
+    (arg1)->setEuid(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_bootTime(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    long long result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_bootTime",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (long long)(arg1)->bootTime();
+    
+    resultobj = PyLong_FromLongLong(result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_bootAtTime(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    long long arg2 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Mote_bootAtTime",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg2 = (long long) PyLong_AsLongLong(obj1);
+    if (PyErr_Occurred()) SWIG_fail;
+    (arg1)->bootAtTime(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_isOn(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    bool result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_isOn",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (bool)(arg1)->isOn();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_turnOff(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_turnOff",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->turnOff();
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_turnOn(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Mote_turnOn",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->turnOn();
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Mote_getVariable(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Mote *arg1 = (Mote *) 0 ;
+    char *arg2 ;
+    Variable *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"Os:Mote_getVariable",&obj0,&arg2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Mote,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (Variable *)(arg1)->getVariable(arg2);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Variable, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * Mote_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_Mote, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyObject *_wrap_new_Tossim(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+    Tossim *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:new_Tossim",&obj0)) goto fail;
+    {
+        if (!PyList_Check(obj0)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+            return NULL;
+        }
+        else {
+            int size = PyList_Size(obj0);
+            int i = 0;
+            nesc_app_t* app;
+            
+            if (size % 3 != 0) {
+                PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+                return NULL;
+            }
+            
+            app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+            
+            app->numVariables = size / 3;
+            app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+            app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+            
+            memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+            memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+            
+            for (i = 0; i < app->numVariables; i++) {
+                PyObject* name = PyList_GetItem(obj0, 3 * i);
+                PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+                PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+                if (PyString_Check(name) && PyString_Check(format)) {
+                    app->variableNames[i] = PyString_AsString(name);
+                    app->variableTypes[i] = PyString_AsString(format);
+                    if (strcmp(PyString_AsString(array), "array") == 0) {
+                        app->variableArray[i] = 1;
+                        //printf("%s is an array\n", PyString_AsString(name));
+                    }
+                    else {
+                        app->variableArray[i] = 0;
+                        //printf("%s is a scalar\n", PyString_AsString(name));
+                    }
+                }
+                else {
+                    app->variableNames[i] = "";
+                    app->variableTypes[i] = "";
+                }
+            }
+            
+            arg1 = app;
+        }
+    }
+    result = (Tossim *)new Tossim(arg1);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Tossim, 1);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_delete_Tossim(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:delete_Tossim",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    delete arg1;
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_init(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_init",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    (arg1)->init();
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_time(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    long long result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_time",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (long long)(arg1)->time();
+    
+    resultobj = PyLong_FromLongLong(result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_ticksPerSecond(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    long long result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_ticksPerSecond",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (long long)(arg1)->ticksPerSecond();
+    
+    resultobj = PyLong_FromLongLong(result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_setTime(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    long long arg2 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Tossim_setTime",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg2 = (long long) PyLong_AsLongLong(obj1);
+    if (PyErr_Occurred()) SWIG_fail;
+    (arg1)->setTime(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_timeStr(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    char *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_timeStr",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (char *)(arg1)->timeStr();
+    
+    resultobj = result ? PyString_FromString(result) : Py_BuildValue((char*)"");
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_currentNode(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    Mote *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_currentNode",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (Mote *)(arg1)->currentNode();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Mote, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_getNode(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    unsigned long arg2 ;
+    Mote *result;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Tossim_getNode",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg2 = (unsigned long) PyInt_AsLong(obj1);
+    if (PyErr_Occurred()) SWIG_fail;
+    result = (Mote *)(arg1)->getNode(arg2);
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Mote, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_setCurrentNode(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    unsigned long arg2 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj1 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OO:Tossim_setCurrentNode",&obj0,&obj1)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    arg2 = (unsigned long) PyInt_AsLong(obj1);
+    if (PyErr_Occurred()) SWIG_fail;
+    (arg1)->setCurrentNode(arg2);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_addChannel(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    char *arg2 ;
+    FILE *arg3 = (FILE *) 0 ;
+    PyObject * obj0 = 0 ;
+    PyObject * obj2 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OsO:Tossim_addChannel",&obj0,&arg2,&obj2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    {
+        if (!PyFile_Check(obj2)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+            return NULL;
+        }
+        arg3 = PyFile_AsFile(obj2);
+    }
+    (arg1)->addChannel(arg2,arg3);
+    
+    Py_INCREF(Py_None); resultobj = Py_None;
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_removeChannel(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    char *arg2 ;
+    FILE *arg3 = (FILE *) 0 ;
+    bool result;
+    PyObject * obj0 = 0 ;
+    PyObject * obj2 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"OsO:Tossim_removeChannel",&obj0,&arg2,&obj2)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    {
+        if (!PyFile_Check(obj2)) {
+            PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+            return NULL;
+        }
+        arg3 = PyFile_AsFile(obj2);
+    }
+    result = (bool)(arg1)->removeChannel(arg2,arg3);
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_runNextEvent(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    bool result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_runNextEvent",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (bool)(arg1)->runNextEvent();
+    
+    resultobj = PyInt_FromLong((long)result);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_mac(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    MAC *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_mac",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (MAC *)(arg1)->mac();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_MAC, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_radio(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    Radio *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_radio",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (Radio *)(arg1)->radio();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Radio, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject *_wrap_Tossim_newPacket(PyObject *self, PyObject *args) {
+    PyObject *resultobj;
+    Tossim *arg1 = (Tossim *) 0 ;
+    Packet *result;
+    PyObject * obj0 = 0 ;
+    
+    if(!PyArg_ParseTuple(args,(char *)"O:Tossim_newPacket",&obj0)) goto fail;
+    if ((SWIG_ConvertPtr(obj0,(void **) &arg1, SWIGTYPE_p_Tossim,SWIG_POINTER_EXCEPTION | 0 )) == -1) SWIG_fail;
+    result = (Packet *)(arg1)->newPacket();
+    
+    resultobj = SWIG_NewPointerObj((void *) result, SWIGTYPE_p_Packet, 0);
+    return resultobj;
+    fail:
+    return NULL;
+}
+
+
+static PyObject * Tossim_swigregister(PyObject *self, PyObject *args) {
+    PyObject *obj;
+    if (!PyArg_ParseTuple(args,(char*)"O", &obj)) return NULL;
+    SWIG_TypeClientData(SWIGTYPE_p_Tossim, obj);
+    Py_INCREF(obj);
+    return Py_BuildValue((char *)"");
+}
+static PyMethodDef SwigMethods[] = {
+	 { (char *)"new_MAC", _wrap_new_MAC, METH_VARARGS },
+	 { (char *)"delete_MAC", _wrap_delete_MAC, METH_VARARGS },
+	 { (char *)"MAC_initHigh", _wrap_MAC_initHigh, METH_VARARGS },
+	 { (char *)"MAC_initLow", _wrap_MAC_initLow, METH_VARARGS },
+	 { (char *)"MAC_high", _wrap_MAC_high, METH_VARARGS },
+	 { (char *)"MAC_low", _wrap_MAC_low, METH_VARARGS },
+	 { (char *)"MAC_symbolsPerSec", _wrap_MAC_symbolsPerSec, METH_VARARGS },
+	 { (char *)"MAC_bitsPerSymbol", _wrap_MAC_bitsPerSymbol, METH_VARARGS },
+	 { (char *)"MAC_preambleLength", _wrap_MAC_preambleLength, METH_VARARGS },
+	 { (char *)"MAC_exponentBase", _wrap_MAC_exponentBase, METH_VARARGS },
+	 { (char *)"MAC_maxIterations", _wrap_MAC_maxIterations, METH_VARARGS },
+	 { (char *)"MAC_minFreeSamples", _wrap_MAC_minFreeSamples, METH_VARARGS },
+	 { (char *)"MAC_rxtxDelay", _wrap_MAC_rxtxDelay, METH_VARARGS },
+	 { (char *)"MAC_ackTime", _wrap_MAC_ackTime, METH_VARARGS },
+	 { (char *)"MAC_setInitHigh", _wrap_MAC_setInitHigh, METH_VARARGS },
+	 { (char *)"MAC_setInitLow", _wrap_MAC_setInitLow, METH_VARARGS },
+	 { (char *)"MAC_setHigh", _wrap_MAC_setHigh, METH_VARARGS },
+	 { (char *)"MAC_setLow", _wrap_MAC_setLow, METH_VARARGS },
+	 { (char *)"MAC_setSymbolsPerSec", _wrap_MAC_setSymbolsPerSec, METH_VARARGS },
+	 { (char *)"MAC_setBitsBerSymbol", _wrap_MAC_setBitsBerSymbol, METH_VARARGS },
+	 { (char *)"MAC_setPreambleLength", _wrap_MAC_setPreambleLength, METH_VARARGS },
+	 { (char *)"MAC_setExponentBase", _wrap_MAC_setExponentBase, METH_VARARGS },
+	 { (char *)"MAC_setMaxIterations", _wrap_MAC_setMaxIterations, METH_VARARGS },
+	 { (char *)"MAC_setMinFreeSamples", _wrap_MAC_setMinFreeSamples, METH_VARARGS },
+	 { (char *)"MAC_setRxtxDelay", _wrap_MAC_setRxtxDelay, METH_VARARGS },
+	 { (char *)"MAC_setAckTime", _wrap_MAC_setAckTime, METH_VARARGS },
+	 { (char *)"MAC_swigregister", MAC_swigregister, METH_VARARGS },
+	 { (char *)"new_Radio", _wrap_new_Radio, METH_VARARGS },
+	 { (char *)"delete_Radio", _wrap_delete_Radio, METH_VARARGS },
+	 { (char *)"Radio_add", _wrap_Radio_add, METH_VARARGS },
+	 { (char *)"Radio_gain", _wrap_Radio_gain, METH_VARARGS },
+	 { (char *)"Radio_connected", _wrap_Radio_connected, METH_VARARGS },
+	 { (char *)"Radio_remove", _wrap_Radio_remove, METH_VARARGS },
+	 { (char *)"Radio_setNoise", _wrap_Radio_setNoise, METH_VARARGS },
+	 { (char *)"Radio_setSensitivity", _wrap_Radio_setSensitivity, METH_VARARGS },
+	 { (char *)"Radio_swigregister", Radio_swigregister, METH_VARARGS },
+	 { (char *)"new_Packet", _wrap_new_Packet, METH_VARARGS },
+	 { (char *)"delete_Packet", _wrap_delete_Packet, METH_VARARGS },
+	 { (char *)"Packet_setDestination", _wrap_Packet_setDestination, METH_VARARGS },
+	 { (char *)"Packet_destination", _wrap_Packet_destination, METH_VARARGS },
+	 { (char *)"Packet_setLength", _wrap_Packet_setLength, METH_VARARGS },
+	 { (char *)"Packet_length", _wrap_Packet_length, METH_VARARGS },
+	 { (char *)"Packet_setType", _wrap_Packet_setType, METH_VARARGS },
+	 { (char *)"Packet_type", _wrap_Packet_type, METH_VARARGS },
+	 { (char *)"Packet_data", _wrap_Packet_data, METH_VARARGS },
+	 { (char *)"Packet_setData", _wrap_Packet_setData, METH_VARARGS },
+	 { (char *)"Packet_maxLength", _wrap_Packet_maxLength, METH_VARARGS },
+	 { (char *)"Packet_setStrength", _wrap_Packet_setStrength, METH_VARARGS },
+	 { (char *)"Packet_deliver", _wrap_Packet_deliver, METH_VARARGS },
+	 { (char *)"Packet_deliverNow", _wrap_Packet_deliverNow, METH_VARARGS },
+	 { (char *)"Packet_swigregister", Packet_swigregister, METH_VARARGS },
+	 { (char *)"variable_string_t_type_set", _wrap_variable_string_t_type_set, METH_VARARGS },
+	 { (char *)"variable_string_t_type_get", _wrap_variable_string_t_type_get, METH_VARARGS },
+	 { (char *)"variable_string_t_ptr_set", _wrap_variable_string_t_ptr_set, METH_VARARGS },
+	 { (char *)"variable_string_t_ptr_get", _wrap_variable_string_t_ptr_get, METH_VARARGS },
+	 { (char *)"variable_string_t_len_set", _wrap_variable_string_t_len_set, METH_VARARGS },
+	 { (char *)"variable_string_t_len_get", _wrap_variable_string_t_len_get, METH_VARARGS },
+	 { (char *)"variable_string_t_isArray_set", _wrap_variable_string_t_isArray_set, METH_VARARGS },
+	 { (char *)"variable_string_t_isArray_get", _wrap_variable_string_t_isArray_get, METH_VARARGS },
+	 { (char *)"new_variable_string_t", _wrap_new_variable_string_t, METH_VARARGS },
+	 { (char *)"delete_variable_string_t", _wrap_delete_variable_string_t, METH_VARARGS },
+	 { (char *)"variable_string_t_swigregister", variable_string_t_swigregister, METH_VARARGS },
+	 { (char *)"nesc_app_t_numVariables_set", _wrap_nesc_app_t_numVariables_set, METH_VARARGS },
+	 { (char *)"nesc_app_t_numVariables_get", _wrap_nesc_app_t_numVariables_get, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableNames_set", _wrap_nesc_app_t_variableNames_set, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableNames_get", _wrap_nesc_app_t_variableNames_get, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableTypes_set", _wrap_nesc_app_t_variableTypes_set, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableTypes_get", _wrap_nesc_app_t_variableTypes_get, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableArray_set", _wrap_nesc_app_t_variableArray_set, METH_VARARGS },
+	 { (char *)"nesc_app_t_variableArray_get", _wrap_nesc_app_t_variableArray_get, METH_VARARGS },
+	 { (char *)"new_nesc_app_t", _wrap_new_nesc_app_t, METH_VARARGS },
+	 { (char *)"delete_nesc_app_t", _wrap_delete_nesc_app_t, METH_VARARGS },
+	 { (char *)"nesc_app_t_swigregister", nesc_app_t_swigregister, METH_VARARGS },
+	 { (char *)"new_Variable", _wrap_new_Variable, METH_VARARGS },
+	 { (char *)"delete_Variable", _wrap_delete_Variable, METH_VARARGS },
+	 { (char *)"Variable_getData", _wrap_Variable_getData, METH_VARARGS },
+	 { (char *)"Variable_swigregister", Variable_swigregister, METH_VARARGS },
+	 { (char *)"new_Mote", _wrap_new_Mote, METH_VARARGS },
+	 { (char *)"delete_Mote", _wrap_delete_Mote, METH_VARARGS },
+	 { (char *)"Mote_id", _wrap_Mote_id, METH_VARARGS },
+	 { (char *)"Mote_euid", _wrap_Mote_euid, METH_VARARGS },
+	 { (char *)"Mote_setEuid", _wrap_Mote_setEuid, METH_VARARGS },
+	 { (char *)"Mote_bootTime", _wrap_Mote_bootTime, METH_VARARGS },
+	 { (char *)"Mote_bootAtTime", _wrap_Mote_bootAtTime, METH_VARARGS },
+	 { (char *)"Mote_isOn", _wrap_Mote_isOn, METH_VARARGS },
+	 { (char *)"Mote_turnOff", _wrap_Mote_turnOff, METH_VARARGS },
+	 { (char *)"Mote_turnOn", _wrap_Mote_turnOn, METH_VARARGS },
+	 { (char *)"Mote_getVariable", _wrap_Mote_getVariable, METH_VARARGS },
+	 { (char *)"Mote_swigregister", Mote_swigregister, METH_VARARGS },
+	 { (char *)"new_Tossim", _wrap_new_Tossim, METH_VARARGS },
+	 { (char *)"delete_Tossim", _wrap_delete_Tossim, METH_VARARGS },
+	 { (char *)"Tossim_init", _wrap_Tossim_init, METH_VARARGS },
+	 { (char *)"Tossim_time", _wrap_Tossim_time, METH_VARARGS },
+	 { (char *)"Tossim_ticksPerSecond", _wrap_Tossim_ticksPerSecond, METH_VARARGS },
+	 { (char *)"Tossim_setTime", _wrap_Tossim_setTime, METH_VARARGS },
+	 { (char *)"Tossim_timeStr", _wrap_Tossim_timeStr, METH_VARARGS },
+	 { (char *)"Tossim_currentNode", _wrap_Tossim_currentNode, METH_VARARGS },
+	 { (char *)"Tossim_getNode", _wrap_Tossim_getNode, METH_VARARGS },
+	 { (char *)"Tossim_setCurrentNode", _wrap_Tossim_setCurrentNode, METH_VARARGS },
+	 { (char *)"Tossim_addChannel", _wrap_Tossim_addChannel, METH_VARARGS },
+	 { (char *)"Tossim_removeChannel", _wrap_Tossim_removeChannel, METH_VARARGS },
+	 { (char *)"Tossim_runNextEvent", _wrap_Tossim_runNextEvent, METH_VARARGS },
+	 { (char *)"Tossim_mac", _wrap_Tossim_mac, METH_VARARGS },
+	 { (char *)"Tossim_radio", _wrap_Tossim_radio, METH_VARARGS },
+	 { (char *)"Tossim_newPacket", _wrap_Tossim_newPacket, METH_VARARGS },
+	 { (char *)"Tossim_swigregister", Tossim_swigregister, METH_VARARGS },
+	 { NULL, NULL }
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (BEGIN) -------- */
+
+static swig_type_info _swigt__p_Radio[] = {{"_p_Radio", 0, "Radio *", 0},{"_p_Radio"},{0}};
+static swig_type_info _swigt__p_nesc_app_t[] = {{"_p_nesc_app_t", 0, "nesc_app_t *", 0},{"_p_nesc_app_t"},{0}};
+static swig_type_info _swigt__p_FILE[] = {{"_p_FILE", 0, "FILE *", 0},{"_p_FILE"},{0}};
+static swig_type_info _swigt__p_MAC[] = {{"_p_MAC", 0, "MAC *", 0},{"_p_MAC"},{0}};
+static swig_type_info _swigt__p_Packet[] = {{"_p_Packet", 0, "Packet *", 0},{"_p_Packet"},{0}};
+static swig_type_info _swigt__p_Variable[] = {{"_p_Variable", 0, "Variable *", 0},{"_p_Variable"},{0}};
+static swig_type_info _swigt__p_Tossim[] = {{"_p_Tossim", 0, "Tossim *", 0},{"_p_Tossim"},{0}};
+static swig_type_info _swigt__p_variable_string_t[] = {{"_p_variable_string_t", 0, "variable_string_t *", 0},{"_p_variable_string_t"},{0}};
+static swig_type_info _swigt__p_Mote[] = {{"_p_Mote", 0, "Mote *", 0},{"_p_Mote"},{0}};
+static swig_type_info _swigt__p_p_char[] = {{"_p_p_char", 0, "char **", 0},{"_p_p_char"},{0}};
+static swig_type_info _swigt__p_int[] = {{"_p_int", 0, "int *", 0},{"_p_int"},{0}};
+
+static swig_type_info *swig_types_initial[] = {
+_swigt__p_Radio, 
+_swigt__p_nesc_app_t, 
+_swigt__p_FILE, 
+_swigt__p_MAC, 
+_swigt__p_Packet, 
+_swigt__p_Variable, 
+_swigt__p_Tossim, 
+_swigt__p_variable_string_t, 
+_swigt__p_Mote, 
+_swigt__p_p_char, 
+_swigt__p_int, 
+0
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (END) -------- */
+
+static swig_const_info swig_const_table[] = {
+{0}};
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+extern "C"
+#endif
+SWIGEXPORT(void) SWIG_init(void) {
+    static PyObject *SWIG_globals = 0; 
+    static int       typeinit = 0;
+    PyObject *m, *d;
+    int       i;
+    if (!SWIG_globals) SWIG_globals = SWIG_newvarlink();
+    m = Py_InitModule((char *) SWIG_name, SwigMethods);
+    d = PyModule_GetDict(m);
+    
+    if (!typeinit) {
+        for (i = 0; swig_types_initial[i]; i++) {
+            swig_types[i] = SWIG_TypeRegister(swig_types_initial[i]);
+        }
+        typeinit = 1;
+    }
+    SWIG_InstallConstants(d,swig_const_table);
+    
+}
+
diff --git a/tos/platforms/README b/tos/platforms/README
new file mode 100644
index 00000000..7fa7ea76
--- /dev/null
+++ b/tos/platforms/README
@@ -0,0 +1,24 @@
+This directory contains hardware platforms that TinyOS runs on. A hardware
+platform is a collection of "chips," such as microcontrollers, radios,
+and non-volatile storage, whose implementations can be found in tos/chips.
+
+A platform includes code for the hardware resources that chip functionality 
+depend on. For example, the CC1000 chip has a software networking stack (in
+chips/cc1000), which depends on being able to send bytes to the CC1000
+chip over an SPI bus. How the SPI bus works is platform dependent (e.g.,
+it could be shared between several chips and require software arbitration).
+Therefore, the mica2 platform, which has a CC1000 radio, connects the
+CC1000 code to an SPI bus that its microcontroller, an ATmega128, provides.
+
+Every platform directory has a ".platform" file, which specifies 
+flags and options to the nesC compiler. For example, the native compiler
+ncc uses to compile a binary depends on what microcontroller a platform
+has, so a .platform file generally specifies the compiler with the 
+"-gcc" option. Also, as platforms depend on a collection of chips, the
+.platform file specifies those chips with "-I" options.
+
+The standard TinyOS boot sequence depends on a platform providing
+a few components; details can be found in TEP 107.
+
+Phil Levis, last updated: 7/7/2005
+
diff --git a/tos/platforms/btnode3/.platform b/tos/platforms/btnode3/.platform
new file mode 100644
index 00000000..f76588ce
--- /dev/null
+++ b/tos/platforms/btnode3/.platform
@@ -0,0 +1,45 @@
+#
+# FILE: btnode3/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/platforms/btnode3
+  %T/platforms/btnode3/chips/cc1000
+  %T/platforms/mica
+  %T/platforms/mica2
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/serial
+  %T/lib/power
+  %T/lib/timer
+  
+#  %T/platforms/mica2/chips/at45db not existent on btnode3
+#  %T/platforms/mica/chips/at45db  not existent on btnode3
+#  %T/chips/at45db
+  
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/btnode3/Leds.nc b/tos/platforms/btnode3/Leds.nc
new file mode 100644
index 00000000..088719b2
--- /dev/null
+++ b/tos/platforms/btnode3/Leds.nc
@@ -0,0 +1,140 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2006 ETH Zurich. 
+ * "Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Jan Beutel
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+
+
+  /**
+   * Turn on LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3On();
+
+  /**
+   * Turn off LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3Off();
+
+   /**
+   * Toggle LED 3; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led3Toggle();
+
+
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LED_LED0, LED_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * 
     (call Leds.get() & LEDS_LED2) 
    
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * set().
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * 
     call Leds.set(LEDS_LED0 | LEDS_LED2); 
    
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * 
    call Leds.set(call Leds.get() | LEDS_LED1);
    
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/platforms/btnode3/LedsC.nc b/tos/platforms/btnode3/LedsC.nc
new file mode 100644
index 00000000..6beda184
--- /dev/null
+++ b/tos/platforms/btnode3/LedsC.nc
@@ -0,0 +1,44 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2006 ETH Zurich.  
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/**
+ * @author Joe Polastre
+ * @author Jan Beutel
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+  LedsP.Led3 -> PlatformLedsC.Led3;
+}
+
diff --git a/tos/platforms/btnode3/LedsP.nc b/tos/platforms/btnode3/LedsP.nc
new file mode 100644
index 00000000..c7a46621
--- /dev/null
+++ b/tos/platforms/btnode3/LedsP.nc
@@ -0,0 +1,185 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2006 ETH Zurich.  
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Jan Beutel
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+    interface GeneralIO as Led3;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led3.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+      call Led3.set();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg("LedsC", "LEDS: Led 1 on.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Off() {
+    dbg("LedsC", "LEDS: Led 1 off.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg("LedsC", "LEDS: Led 1 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg("LedsC", "LEDS: Led 2 on.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Off() {
+    dbg("LedsC", "LEDS: Led 2 off.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg("LedsC", "LEDS: Led 2 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 2 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg("LedsC", "LEDS: Led 3 on.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Off() {
+    dbg("LedsC", "LEDS: Led 3 off.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg("LedsC", "LEDS: Led 3 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 3 on.\n");
+  }
+
+  async command void Leds.led3On() {
+    dbg("LedsC", "LEDS: Led 4 on.\n");
+    call Led3.clr();
+  }
+
+  async command void Leds.led3Off() {
+    dbg("LedsC", "LEDS: Led 4 off.\n");
+    call Led3.set();
+  }
+
+  async command void Leds.led3Toggle() {
+    call Led3.toggle();
+    if (call Led3.get())
+      dbg("LedsC", "LEDS: Led 4 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 4 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+      if (call Led3.get()) {
+	rval |= LEDS_LED3;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led3Off();
+      }
+      if (val & LEDS_LED3) {
+	call Leds.led3On();
+      }
+      else {
+	call Leds.led3Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/btnode3/MotePlatformC.nc b/tos/platforms/btnode3/MotePlatformC.nc
new file mode 100644
index 00000000..98cceb14
--- /dev/null
+++ b/tos/platforms/btnode3/MotePlatformC.nc
@@ -0,0 +1,31 @@
+/* $Id$
+ * Copyright (c) 2006 ETH Zurich.
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is btnode3-specific.
+ * 
+ * @author David Gay
+ * @author Jan Beutel
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplCC1000InitP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = MotePlatformP;
+  PlatformInit = HplCC1000InitP;
+  
+  MotePlatformP.SerialIdPin -> IO.PortA4; //TODO: btnode3 does not support this
+  SubInit = MotePlatformP.SubInit;
+  
+}
diff --git a/tos/platforms/btnode3/MotePlatformP.nc b/tos/platforms/btnode3/MotePlatformP.nc
new file mode 100644
index 00000000..d15773ca
--- /dev/null
+++ b/tos/platforms/btnode3/MotePlatformP.nc
@@ -0,0 +1,47 @@
+/* $Id$
+ * Copyright (c) 2006 ETH Zurich.
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is btnode3-specific.
+ * 
+ * @author David Gay
+ * @author Jan Beutel
+ */
+module MotePlatformP
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins high to initialize LED's and radio and IO power 
+    // Set port C as output only
+    PORTC = 0xff;
+    DDRC = 0xff;
+    
+    // TODO: release Bluetooth reset pin
+    
+    //btnode3: set latch_select PB5 for now
+    PORTB = 0x20;
+    DDRB = 0x20;
+
+    // Prevent sourcing current
+//    call SerialIdPin.makeI0xffnput(); 
+//    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/btnode3/PlatformLedsC.nc b/tos/platforms/btnode3/PlatformLedsC.nc
new file mode 100644
index 00000000..085768b5
--- /dev/null
+++ b/tos/platforms/btnode3/PlatformLedsC.nc
@@ -0,0 +1,53 @@
+// $Id$
+
+/**
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * @author Martin Turon 
+ * @author Jan Beutel
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  provides interface GeneralIO as Led3;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+    
+  Led0 = IO.PortC1;  // Pin C1 = Red LED
+  Led1 = IO.PortC3;  // Pin C3 = Green LED
+  Led2 = IO.PortC2;  // Pin C2 = Yellow LED
+  Led3 = IO.PortC0;  // Pin C0 = Blue LED
+}
+
diff --git a/tos/platforms/btnode3/VoltageC.nc b/tos/platforms/btnode3/VoltageC.nc
new file mode 100644
index 00000000..8786d043
--- /dev/null
+++ b/tos/platforms/btnode3/VoltageC.nc
@@ -0,0 +1,43 @@
+/// $Id$
+
+/**
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+/**
+ * @author Hu Siquan 
+ * @author Jan Beutel
+ */
+configuration VoltageC
+{
+  provides interface StdControl;	
+  provides interface Read;
+}
+implementation
+{
+  components VoltageP, new AdcReadClientC() as VoltageChannel,
+    HplAtm128GeneralIOC as Pins;
+  
+  StdControl  = VoltageP;  
+  Read = VoltageChannel;
+  VoltageChannel.Atm128AdcConfig -> VoltageP;
+  VoltageP.BAT_MON -> Pins.PortF3;
+}
diff --git a/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..c27b2ee5
--- /dev/null
+++ b/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,54 @@
+// $Id$
+/*									tab:4
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ *
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * @author David Gay
+ * @author Jan Beutel
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortE7; //btnode3 definitions
+  HplCC1000P.PALE -> IO.PortD5;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+//  HplCC1000SpiP.OC1C -> IO.PortB7; //not available on BTnode3
+}
diff --git a/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc b/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc
new file mode 100644
index 00000000..ee7f1b32
--- /dev/null
+++ b/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc
@@ -0,0 +1,116 @@
+// $Id$
+
+/*									tab:4
+ * Copyright (c) 2006 ETH Zurich.  
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level functions to access the CC1000 bus. Built using the mica2
+ * hardware SPI.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ * @author Jan Beutel
+ */
+
+
+module HplCC1000SpiP {
+  provides interface Init as PlatformInit;
+  provides interface HplCC1000Spi;
+  //uses interface PowerManagement;
+  uses {
+    interface GeneralIO as SpiSck;
+    interface GeneralIO as SpiMiso;
+    interface GeneralIO as SpiMosi;
+    //interface GeneralIO as OC1C;
+  }
+}
+implementation
+{
+  uint8_t outgoingByte;
+
+  command error_t PlatformInit.init() {
+    call SpiSck.makeInput();
+    //call OC1C.makeInput();
+    call HplCC1000Spi.rxMode();
+    return SUCCESS;
+  }
+
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    register uint8_t temp = SPDR;
+    SPDR = outgoingByte;
+    signal HplCC1000Spi.dataReady(temp);
+  }
+  default async event void HplCC1000Spi.dataReady(uint8_t data) { }
+  
+
+  async command void HplCC1000Spi.writeByte(uint8_t data) {
+    atomic outgoingByte = data;
+  }
+
+  async command bool HplCC1000Spi.isBufBusy() {
+    return bit_is_clear(SPSR, SPIF);
+  }
+
+  async command uint8_t HplCC1000Spi.readByte() {
+    return SPDR;
+  }
+
+  async command void HplCC1000Spi.enableIntr() {
+    //sbi(SPCR,SPIE);
+    SPCR = 0xc0;
+    CLR_BIT(DDRB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.disableIntr() {
+    CLR_BIT(SPCR, SPIE);
+    SET_BIT(DDRB, 0);
+    CLR_BIT(PORTB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.initSlave() {
+    atomic {
+      CLR_BIT(SPCR, CPOL);		// Set proper polarity...
+      CLR_BIT(SPCR, CPHA);		// ...and phase
+      SET_BIT(SPCR, SPIE);	// enable spi port
+      SET_BIT(SPCR, SPE);
+    } 
+  }
+	
+  async command void HplCC1000Spi.txMode() {
+    call SpiMiso.makeOutput();
+    call SpiMosi.makeOutput();
+  }
+
+  async command void HplCC1000Spi.rxMode() {
+    call SpiMiso.makeInput();
+    call SpiMosi.makeInput();
+  }
+}
diff --git a/tos/platforms/btnode3/hardware.h b/tos/platforms/btnode3/hardware.h
new file mode 100644
index 00000000..4a872291
--- /dev/null
+++ b/tos/platforms/btnode3/hardware.h
@@ -0,0 +1,60 @@
+/**                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2006 ETH Zurich.
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad 
+ *  @author Matt Miller 
+ *  @author Martin Turon 
+ *  @author Jan Beutel 
+ * 
+ *  $Id$
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include 
+#include 
+
+// A/D constants (channels, etc)
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC2,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // not available on BTnode3
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC3,
+};
+
+enum {
+  PLATFORM_MHZ = 8 // Approximate clock frequency (closest power of 2)
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/eyesIFX/.family b/tos/platforms/eyesIFX/.family
new file mode 100644
index 00000000..72d3f983
--- /dev/null
+++ b/tos/platforms/eyesIFX/.family
@@ -0,0 +1,39 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+
+push( @includes, qw(
+
+  %T/platforms/eyesIFX
+  %T/platforms/eyesIFX/chips/tda5250
+  %T/platforms/eyesIFX/chips/ad5200
+  %T/platforms/eyesIFX/sensors
+  %T/platforms/eyesIFX/byte_radio
+  %T/chips/tda5250
+  %T/chips/tda5250/mac
+  %T/chips/ad5200
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/sensors
+  %T/chips/msp430/usart
+  %T/chips/msp430/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/byte_radio
+  %T/lib/power
+) );
+
+push (@opts, qw(
+
+  -gcc=msp430-gcc
+  -fnesc-target=msp430
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+) );
+
+push @opts, "-mingw-gcc" if $cygwin;
\ No newline at end of file
diff --git a/tos/platforms/eyesIFX/ActiveMessageC.nc b/tos/platforms/eyesIFX/ActiveMessageC.nc
new file mode 100644
index 00000000..06c24061
--- /dev/null
+++ b/tos/platforms/eyesIFX/ActiveMessageC.nc
@@ -0,0 +1,73 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the eyesIFX platforms. This is a naming wrapper
+ * around the TDA5250 Active Message layer.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components Tda5250ActiveMessageC as AM;
+
+  SplitControl = AM;
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/eyesIFX/LedsP.nc b/tos/platforms/eyesIFX/LedsP.nc
new file mode 100644
index 00000000..0666cfff
--- /dev/null
+++ b/tos/platforms/eyesIFX/LedsP.nc
@@ -0,0 +1,157 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The implementation of the standard LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  
+#ifndef dbg
+#define dbg(n,msg)
+#endif  
+
+  command error_t Init.init() {
+    atomic {
+      dbg(DBG_BOOT, "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.clr();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg(DBG_LED, "LEDS: Led 0 on.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Off() {
+    dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 0 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg(DBG_LED, "LEDS: Led 1 on.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Off() {
+    dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg(DBG_LED, "LEDS: Led 2 on.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Off() {
+    dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 2 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+        rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+        rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+        rval |= LEDS_LED2;
+      }
+    return rval;
+  }
+}
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+        call Leds.led0On();
+      }
+      else {
+        call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+        call Leds.led1On();
+      }
+      else {
+        call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+        call Leds.led2On();
+      }
+      else {
+        call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/eyesIFX/Msp430Timer32khzMapC.nc b/tos/platforms/eyesIFX/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..0702d8fa
--- /dev/null
+++ b/tos/platforms/eyesIFX/Msp430Timer32khzMapC.nc
@@ -0,0 +1,73 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+//@author Cory Sharp 
+
+/*
+  Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz
+  hardware timers on the MSP430 that are available for compile time allocation
+  by "new Alarm32khzC()", "new AlarmMilliC()", and so on.
+
+  Platforms based on the Msp430 are encouraged to copy in and override this
+  file, presenting only the hardware timers that are available for allocation
+  on that platform.
+*/
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformC.nc b/tos/platforms/eyesIFX/PlatformC.nc
new file mode 100644
index 00000000..4beccbf4
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformC.nc
@@ -0,0 +1,41 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP
+    , Msp430ClockC
+    ;
+
+  Init = PlatformP;
+  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformLedsC.nc b/tos/platforms/eyesIFX/PlatformLedsC.nc
new file mode 100644
index 00000000..8f937dbc
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformLedsC.nc
@@ -0,0 +1,63 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ * @author Vlado Handziski (modifications for eyesIFX)
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  provides interface GeneralIO as Led3;
+  uses interface Init;
+}
+implementation
+{
+  components
+    HplMsp430GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    , new Msp430GpioC() as Led3Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> HplMsp430GeneralIOC.Port50;
+
+  Led1 = Led1Impl;
+  Led1Impl -> HplMsp430GeneralIOC.Port51;
+
+  Led2 = Led2Impl;
+  Led2Impl -> HplMsp430GeneralIOC.Port52;
+
+  Led3 = Led3Impl;
+  Led3Impl -> HplMsp430GeneralIOC.Port53;
+
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformP.nc b/tos/platforms/eyesIFX/PlatformP.nc
new file mode 100644
index 00000000..aa262041
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformP.nc
@@ -0,0 +1,17 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as Msp430ClockInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call Msp430ClockInit.init();
+    TOSH_SET_PIN_DIRECTIONS();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+  default command error_t LedsInit.init() { return SUCCESS; }
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformSerialC.nc b/tos/platforms/eyesIFX/PlatformSerialC.nc
new file mode 100644
index 00000000..91e9b3e3
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformSerialC.nc
@@ -0,0 +1,14 @@
+configuration PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+  components new Uart1C() as UartC, eyesIFXSerialP;
+
+  Init = UartC;
+  StdControl = UartC;
+  SerialByteComm = UartC;
+  StdControl = eyesIFXSerialP;
+  eyesIFXSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/eyesIFX/RadioDataLinkC.nc b/tos/platforms/eyesIFX/RadioDataLinkC.nc
new file mode 100644
index 00000000..63f0feb3
--- /dev/null
+++ b/tos/platforms/eyesIFX/RadioDataLinkC.nc
@@ -0,0 +1,87 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provides preamble sampling csma with timestamping
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+configuration RadioDataLinkC {
+    provides {
+      interface SplitControl; 
+      interface Send;
+      interface Receive;
+      interface Packet;
+      interface PacketAcknowledgements;
+    }
+}
+implementation
+{
+    components 
+        //Change components below as desired
+        Tda5250RadioC as Radio,                  //The actual Tda5250 radio over which data is receives/transmitted
+        UartPhyC as UartPhy,                     //The UartPhy turns Bits into Bytes
+        PacketSerializerP  as PacketSerializer,  //The PacketSerializer turns Bytes into Packets
+        CsmaMacC as Mac,                         //The MAC protocol to use
+        //SyncSampleMacC as Mac,
+        LinkLayerC as Llc;                       //The Link Layer Control module to use
+    
+    //Don't change wirings below this point, just change which components
+    //They are compposed of in the list above             
+    
+    components MainC;
+    MainC.SoftwareInit -> PacketSerializer;
+            
+    SplitControl = Llc;
+    Llc.MacSplitControl -> Mac.SplitControl;
+    Llc.RadioSplitControl -> Radio.SplitControl;
+  
+    Send = Llc.Send;
+    Receive = Llc.Receive;
+    PacketAcknowledgements = Llc;
+    Packet = PacketSerializer;
+  
+    Llc.SendDown->Mac.MacSend;
+    Llc.ReceiveLower->Mac.MacReceive;
+    Llc.Packet->PacketSerializer.Packet;
+    
+    Mac.PacketSend->PacketSerializer.PhySend;
+    Mac.PacketReceive->PacketSerializer.PhyReceive;  
+    Mac.Tda5250Control->Radio;
+    Mac.UartPhyControl -> UartPhy;
+    
+    PacketSerializer.RadioByteComm -> UartPhy.SerializerRadioByteComm;
+    PacketSerializer.PhyPacketTx -> UartPhy.PhyPacketTx;
+    PacketSerializer.PhyPacketRx -> UartPhy.PhyPacketRx;
+    
+    UartPhy.RadioByteComm -> Radio.RadioByteComm;
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc
new file mode 100644
index 00000000..f3b3add6
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc
@@ -0,0 +1,69 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+ /**
+ * Configuration for the fixed Rssi Threshold module.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+configuration RssiFixedThresholdCMC
+{
+    provides {
+        interface StdControl;
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;
+        interface ChannelMonitorData;
+        interface BatteryLevel;
+    }    
+}
+implementation
+{
+    components RssiFixedThresholdCMP,
+        new RssiSensorVccC() as Rssi,
+        new BatteryLevelSensorC() as Voltage,
+        // PlatformLedsC,
+        new TimerMilliC() as Timer,
+        MainC;
+
+    MainC.SoftwareInit -> RssiFixedThresholdCMP;
+    StdControl = RssiFixedThresholdCMP;
+
+    RssiFixedThresholdCMP.Rssi -> Rssi;
+    // RssiFixedThresholdCMP.RssiAdcResource -> Rssi;
+
+    RssiFixedThresholdCMP.Voltage -> Voltage;
+
+    ChannelMonitor = RssiFixedThresholdCMP;
+    ChannelMonitorControl = RssiFixedThresholdCMP;
+    ChannelMonitorData = RssiFixedThresholdCMP;
+    BatteryLevel = RssiFixedThresholdCMP;
+    // RssiFixedThresholdCMP.Led3 -> PlatformLedsC.Led3;
+    RssiFixedThresholdCMP.Timer -> Timer;    
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc
new file mode 100644
index 00000000..0a90a91c
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc
@@ -0,0 +1,447 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+includes shellsort;
+module RssiFixedThresholdCMP {
+    provides {
+      interface Init;
+      interface StdControl;
+      interface ChannelMonitor;
+      interface ChannelMonitorControl;
+      interface ChannelMonitorData;
+      interface BatteryLevel;
+
+    }
+    uses {     
+        // interface ReadNow as Rssi;
+        interface Read as Rssi;
+        interface Read as Voltage;
+        interface Timer as Timer;
+        // interface Resource as RssiAdcResource;
+        // interface GeneralIO as Led3;
+    }
+}
+implementation
+{    
+//#define CM_DEBUG                    // debug...
+    /* Measure internal voltage every 5s */
+#define VOLTAGE_SAMPLE_INTERVALL 5000
+
+    /* 
+     * Number of samples for noisefloor estimation
+     * Actually the size of the array for the median
+     */
+#define NSAMPLES 5
+        
+    /*
+     * If the channel is seen more then DEADLOCK times 
+     * in a row busy, update noisefloor nonetheless.
+     */
+#define DEADLOCK 10
+        
+    /* 
+     * Initital noisefloor from data sheet ca. 350mV 
+     * Seems to depend on many things, usually values around
+     * 250 mV are observed for the eyesIFXv2 node, but 450 has also 
+     * been measured as noise floor. It is also not stable, depending
+     * on the placement of the node (USB cable shielding!) 
+     */
+#define NOISE_FLOOR 480 // raw value compared to 3V
+
+    // mu + 3*sigma -> rare event, outlier? 
+#define THREE_SIGMA          145
+
+    // 93 mV measured against 3V Vcc 
+#define INITIAL_BUSY_DELTA   127
+    
+    // 3000/2 mV measured against 2.5V Ref
+#define INITIAL_BATTERY_LEVEL 2457 
+
+    /*** calibration stuff *************************/
+#define UPDATE_NF_RUNS   10
+#define MINIMUM_POSITION 0
+#define RSSI_SAMPLE_INTERVALL   20 // it makes no sense to check the channel too often
+
+    /*** variable type definitions ******************/
+    typedef enum {
+        VOID,
+        CALIBRATE, // update noisefloor
+        IDLE,      // noisefloor up to date, nothing is currently attempted
+        CCA,       // in clear channel assessment
+        SNR        // measureing SNR
+    } state_t;
+    
+    /****************  Variables  *******************/
+    state_t state;       // what we try to do
+    int16_t gradient;    // how to convert mV to dB in mV/dB
+
+    uint16_t noisefloor;       // [raw value against Vcc]
+    uint16_t batteryLevel;     // [raw value against 2.5V ref]
+    
+    /* if the rssi value exceeds noisefloor + busyDelta
+     * the channel is busy
+     */
+    uint16_t busyDelta;    // [raw value against Vcc]
+    
+    // noise floor estimation
+    uint16_t rssisamples[NSAMPLES];
+    uint8_t rssiindex;
+
+    // deadlock protection counter
+    uint8_t deadlockCounter;
+
+    // last rssi reading
+    uint16_t rssi;           // rssi in [mV]
+    
+    /****************  Tasks  *******************/
+    task void UpdateNoiseFloorTask();
+    task void GetChannelStateTask();
+    task void SnrReadyTask();
+    task void CalibrateNoiseFloorTask();
+    task void GetSnrTask();
+    task void CalibrateTask();
+    task void GetVoltageTask();
+    error_t ccaCheckValue();
+
+    /***************** Helper function *************/
+#ifdef CM_DEBUG
+    void signalFailure() {
+      atomic {
+        for(;;) {
+          ;
+        }
+      }
+    }
+#else
+    inline void signalFailure() {
+    };
+#endif
+
+    int16_t computeSNR() {
+        uint32_t delta;
+        uint16_t snr;
+        uint16_t r;
+        atomic r = rssi;
+        if(r > noisefloor) {
+             delta = r - noisefloor;
+             // speedily cacluate
+             // (2*batteryLevel*2500mV*delta)/(4095*4095*gradient)
+             snr = ((((uint32_t)batteryLevel*39)>>5)*delta>>12)/gradient;
+        } else {
+            snr = 0;
+        }
+        return snr;
+    }
+    /**************** Init *******************/
+    command error_t Init.init() {
+        atomic {
+            noisefloor = NOISE_FLOOR;
+            rssiindex = 0;
+            batteryLevel = INITIAL_BATTERY_LEVEL;
+            busyDelta = INITIAL_BUSY_DELTA;
+            state = VOID;
+            gradient = 14; // gradient of TDA5250
+            /* call Led3.makeOutput(); 
+               call Led3.clr(); */
+        }
+        return SUCCESS;
+    }
+    
+    /**************** StdControl *******************/   
+    command error_t StdControl.start() { 
+        return post GetVoltageTask();
+    }
+   
+    command error_t StdControl.stop() {
+        call Timer.stop();
+        return SUCCESS;
+    }
+     
+    /**************** RSSI *******************/
+    void rssiRead() {
+        if(call Rssi.read() != SUCCESS) signalFailure();
+    }
+    
+    event void Rssi.readDone(error_t result, uint16_t data) {
+        if(result == SUCCESS) {
+            // call Led3.clr();
+            // call RssiAdcResource.release();
+            rssi = data;
+            atomic {
+                switch(state) {
+                    case CCA:
+                        ccaCheckValue();
+                        break;
+                    case SNR:
+                        post SnrReadyTask();    
+                        break;
+                    case CALIBRATE:
+                        post CalibrateNoiseFloorTask();    
+                        break;
+                    default:
+                        break;
+                }
+            }
+        } else {
+            rssiRead();
+        }
+    }
+    
+
+    /**************** Voltage *******************/
+    void readVoltage() {
+        if(call Voltage.read() != SUCCESS) post GetVoltageTask();
+    }
+    
+    task void GetVoltageTask() {
+        readVoltage();
+    }
+    
+    event void Voltage.readDone(error_t result, uint16_t data) {
+        uint16_t nbl;
+        int16_t d;
+        uint16_t nbD;
+        uint16_t bD;
+        if(result == SUCCESS) {
+            nbl = data;
+            atomic bD = busyDelta;
+            d = batteryLevel - nbl;
+            if(d > 75 || d < -75) {
+                // recalculate busyDelta,
+                // noisefloor already adapted by floating
+                nbD = ((uint32_t)batteryLevel*(uint32_t)busyDelta)/(uint32_t)nbl;
+                atomic busyDelta = nbD;
+                batteryLevel = nbl;
+            }
+        } else {
+            post GetVoltageTask();
+        }
+    }
+    
+    /**************** ChannelMonitor *******************/  
+    async command error_t ChannelMonitor.start() {
+        error_t res = SUCCESS;
+        atomic {
+            if(state != VOID) {
+                if(state == IDLE) {
+                    state = CCA;
+                    res = SUCCESS;
+                }
+                post GetChannelStateTask();
+            }
+        }
+        return res;
+    }
+
+    async command void ChannelMonitor.rxSuccess() {
+        atomic {
+            if((deadlockCounter > 0) && (deadlockCounter < DEADLOCK)) {
+                --deadlockCounter;
+            }
+        }
+    }
+    
+    task void GetChannelStateTask() {
+        atomic {
+            if((state != IDLE) && (state != CCA)) {
+                post GetChannelStateTask();
+            } else {
+              state = CCA;
+              rssiRead();
+              //if(call RssiAdcResource.request() != SUCCESS) signalFailure();
+            }
+        }
+    }
+        
+    void addSample()  {
+        if(rssiindex < NSAMPLES) rssisamples[rssiindex++] = rssi;
+        deadlockCounter = 0;
+        if(rssiindex >= NSAMPLES) post UpdateNoiseFloorTask();
+    }
+               
+    
+    void channelBusy () {
+        atomic {
+            if(++deadlockCounter >= DEADLOCK) addSample();
+            state = IDLE;
+        }
+        signal ChannelMonitor.channelBusy();
+    }
+
+    void channelIdle() {
+        atomic {
+            addSample();
+            state = IDLE;
+        }
+        signal ChannelMonitor.channelIdle();
+    }
+
+    error_t ccaCheckValue() {
+        uint16_t data;
+        atomic data = rssi;
+        if(data < noisefloor + busyDelta) {
+            channelIdle();
+        } else {
+            channelBusy();
+        }
+        return SUCCESS;
+    }
+
+    task void UpdateNoiseFloorTask() {
+        shellsort(rssisamples,NSAMPLES);
+        atomic { 
+            noisefloor = (5*noisefloor + rssisamples[NSAMPLES/2])/6;
+            rssiindex = 0; 
+        }
+    }
+
+    /**************** ChannelMonitorControl ************/ 
+
+    command async error_t ChannelMonitorControl.updateNoiseFloor() {
+        return post CalibrateTask();
+    }
+
+    task void CalibrateTask() {
+        atomic {
+            if((state != IDLE) && (state != VOID)) {
+                post CalibrateTask();
+            } else {
+                state = CALIBRATE;
+                deadlockCounter = 0;
+                call Timer.stop();
+                call Timer.startPeriodic(RSSI_SAMPLE_INTERVALL);
+            }
+        }
+    }
+
+    task void CalibrateNoiseFloorTask() {
+        atomic {
+            if(rssiindex < NSAMPLES) {
+                rssisamples[rssiindex++] = rssi;
+            } else { 
+                shellsort(rssisamples,NSAMPLES);
+                if(rssisamples[MINIMUM_POSITION] < noisefloor + THREE_SIGMA)  {
+                    noisefloor = (7*noisefloor + rssisamples[NSAMPLES/2])/8;
+                    ++deadlockCounter;
+                }
+                else {
+                    noisefloor += THREE_SIGMA/8;
+                }
+                rssiindex = 0; 
+            }
+            if(deadlockCounter > UPDATE_NF_RUNS) {
+                state = IDLE;
+                deadlockCounter = 0;
+                call Timer.stop();
+                call Timer.startPeriodic(VOLTAGE_SAMPLE_INTERVALL);
+                signal ChannelMonitorControl.updateNoiseFloorDone();
+            }
+        }
+    }
+
+    event void Timer.fired() {
+        state_t s;
+        atomic s = state;
+        if(s != CALIBRATE) {
+            readVoltage();
+        } else {
+          rssiRead();
+          //  call RssiAdcResource.request();
+        }
+    }
+    
+    /**************** ChannelMonitorData ************/  
+    async command void ChannelMonitorData.setGradient(int16_t grad) {
+        // needed to convert RSSI into dB
+        atomic gradient = grad;
+    }
+    
+    async command int16_t ChannelMonitorData.getGradient() {
+        int16_t v;
+        atomic v = gradient;
+        return v;
+    }
+    
+    async command uint16_t ChannelMonitorData.getNoiseFloor() {
+        uint16_t v;
+        atomic v = noisefloor;
+        return v;
+    }
+
+    /** get SNR in dB **/
+
+    async command error_t ChannelMonitorData.getSnr() {
+        error_t res = SUCCESS;
+        if(state != VOID) {
+             post GetSnrTask();
+        } else {
+             res = FAIL;
+        }
+        return res;
+    }
+
+    task void GetSnrTask() {
+        atomic {
+            if(state != IDLE) {
+                post GetSnrTask();
+            } else {
+              state = SNR;
+              rssiRead();
+              // if(call RssiAdcResource.request() != SUCCESS) signalFailure();     
+            }
+        }
+    }
+    
+    task void SnrReadyTask() {
+        int16_t snr;
+        snr = computeSNR();
+        atomic state = IDLE;
+        signal ChannelMonitorData.getSnrDone(snr);
+    }
+
+    default async event void ChannelMonitorData.getSnrDone(int16_t snr) {
+    }
+
+    /***** BatteryLevel ***************/
+    // get the batterylevel in mV
+    async command uint16_t BatteryLevel.getLevel() {
+        uint16_t l;
+        atomic l = batteryLevel;
+        return (uint32_t)l*39>>5;
+    }
+    
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/UartPhyC.nc b/tos/platforms/eyesIFX/byte_radio/UartPhyC.nc
new file mode 100644
index 00000000..e3dad86b
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/UartPhyC.nc
@@ -0,0 +1,77 @@
+/*
+* Copyright (c) 2006, Technische Universitaet Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitaet Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* - Description ---------------------------------------------------------
+*
+* - Revision -------------------------------------------------------------
+* $Revision$
+* $Date$
+* @author: Philipp Huppertz 
+* ========================================================================
+*/
+
+/**
+ * Configuration for the byte radio physical layer. Together with the
+ * PacketSerializerP the UartPhyP module turns byte streams into packets.
+ *
+ * @see PacketSerializerP
+ *
+ * @author Philipp Huppertz 
+ */
+ 
+configuration UartPhyC
+{
+  provides{
+    interface PhyPacketTx;
+    interface RadioByteComm as SerializerRadioByteComm;
+    interface PhyPacketRx;
+    interface UartPhyControl;
+  }
+  uses {
+    interface RadioByteComm;
+  }
+}
+implementation
+{
+    components 
+        new Alarm32khzC() as RxByteTimer,
+        UartPhyP,
+//         PlatformLedsC,
+        MainC;
+    
+    MainC.SoftwareInit -> UartPhyP;
+    PhyPacketRx = UartPhyP;
+    SerializerRadioByteComm = UartPhyP;
+    RadioByteComm = UartPhyP;
+    PhyPacketTx = UartPhyP;
+    UartPhyControl = UartPhyP;
+    
+    UartPhyP.RxByteTimer -> RxByteTimer;
+//     PlatformLedsC.Led0 <- UartPhyP.Led0;
+//     PlatformLedsC.Led1 <- UartPhyP.Led1;
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/UartPhyP.nc b/tos/platforms/eyesIFX/byte_radio/UartPhyP.nc
new file mode 100644
index 00000000..9601314a
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/UartPhyP.nc
@@ -0,0 +1,319 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz 
+ * ========================================================================
+ */
+
+#include "manchester.h"
+
+/**
+ * Implementation of the physical layer for the eyesIFX byte radio.
+ * Together with the PacketSerializerP this module turns byte streams 
+ * into packets.
+ *
+ * @author Kevin Klues 
+ * @author Philipp Huppertz 
+ */
+module UartPhyP {
+    provides {
+        interface Init;
+        interface PhyPacketTx;
+        interface RadioByteComm as SerializerRadioByteComm;
+        interface PhyPacketRx;
+        interface UartPhyControl;
+    }
+    uses {
+        interface RadioByteComm;
+        interface Alarm as RxByteTimer;
+    }
+}
+implementation
+{
+    /* Module Definitions  */
+    typedef enum {
+        STATE_PREAMBLE,
+        STATE_SYNC,
+        STATE_SFD,
+        STATE_HEADER_DONE,
+        STATE_DATA_HIGH,
+        STATE_DATA_LOW,
+        STATE_FOOTER_START,
+        STATE_FOOTER_DONE
+    } phyState_t;
+
+
+
+
+#define PREAMBLE_LENGTH   4
+#define BYTE_TIME         22
+#define PREAMBLE_BYTE     0x55
+#define SYNC_BYTE         0xFF
+#define SFD_BYTE          0x05
+
+    /** Module Global Variables  */
+    phyState_t phyState;    // Current Phy state State
+    uint16_t preambleCount;
+    uint16_t numPreambles;  // Number of preambles to send before the packet
+    uint8_t byteTime;       // max. time between two bytes
+    uint8_t bufByte;
+    
+    /* Local Function Declarations */
+    void TransmitNextByte();
+    void ReceiveNextByte(uint8_t data);
+
+    /* Radio Init */
+    command error_t Init.init(){
+        atomic {
+            phyState = STATE_PREAMBLE;
+            numPreambles = PREAMBLE_LENGTH;
+            byteTime = BYTE_TIME;
+        }
+        return SUCCESS;
+    }
+    
+    command error_t UartPhyControl.setNumPreambles(uint16_t numPreambleBytes) {
+        atomic {
+            numPreambles = numPreambleBytes;
+        }
+        return SUCCESS;
+    }
+    
+    command error_t UartPhyControl.setByteTimeout(uint8_t byteTimeout) {
+        if (call RxByteTimer.isRunning() == TRUE) {
+            return FAIL;
+        } else {
+            atomic byteTime = byteTimeout * 33;
+            return SUCCESS;
+        }
+    }
+    
+    async command bool UartPhyControl.isBusy() {
+        return phyState != STATE_PREAMBLE;
+    }
+    
+    void resetState() {
+        atomic {
+            call RxByteTimer.stop();
+            switch(phyState) {
+                case STATE_SYNC:
+                case STATE_SFD:
+                    signal PhyPacketRx.recvHeaderDone(FAIL);
+                    break;
+                case STATE_DATA_HIGH:
+                case STATE_DATA_LOW:
+                case STATE_FOOTER_START:
+                    signal PhyPacketRx.recvFooterDone(FAIL);
+                    break;
+                default:
+                    break;
+            }
+            phyState = STATE_PREAMBLE; 
+        }
+    }
+    
+    async event void RxByteTimer.fired() {
+        // no bytes have arrived, so...
+        resetState();
+    }
+
+    async command void PhyPacketTx.sendHeader() {
+        atomic {
+            phyState = STATE_PREAMBLE;
+            preambleCount = numPreambles;
+        }
+        TransmitNextByte();
+    }
+
+    async command void SerializerRadioByteComm.txByte(uint8_t data) {
+        bufByte = data;
+        call RadioByteComm.txByte(manchesterEncodeNibble((bufByte & 0xf0) >> 4));
+        phyState = STATE_DATA_LOW;
+    }
+
+    async command bool SerializerRadioByteComm.isTxDone() {
+        return call RadioByteComm.isTxDone();
+    }
+
+    async command void PhyPacketTx.sendFooter() {
+        atomic phyState = STATE_FOOTER_START;
+        TransmitNextByte();
+    }
+
+
+    /* Radio Recv */
+    async command void PhyPacketRx.recvFooter() {
+        // currently there is no footer
+        // atomic phyState = STATE_FOOTER_START;
+        atomic {
+            phyState = STATE_PREAMBLE;
+        }
+        call RxByteTimer.stop();
+        signal PhyPacketRx.recvFooterDone(SUCCESS);
+    }
+
+    
+    /* Tx Done */
+    async event void RadioByteComm.txByteReady(error_t error) {
+        if(error == SUCCESS) {
+            TransmitNextByte();
+        } else {
+            atomic {
+                signal SerializerRadioByteComm.txByteReady(error);
+                phyState = STATE_PREAMBLE;
+            }
+        }
+    }
+
+    void TransmitNextByte() {
+        atomic {
+            switch(phyState) {
+                case STATE_PREAMBLE:
+                    if(preambleCount > 0) {
+                        preambleCount--;
+                    } else {
+                        phyState = STATE_SYNC;
+                    }
+                    call RadioByteComm.txByte(PREAMBLE_BYTE);
+                    break;
+                case STATE_SYNC:
+                    phyState = STATE_SFD;
+                    call RadioByteComm.txByte(SYNC_BYTE);
+                    break;
+                case STATE_SFD:
+                    phyState = STATE_HEADER_DONE;
+                    call RadioByteComm.txByte(SFD_BYTE);
+                    break;
+                case STATE_HEADER_DONE:
+                    phyState = STATE_DATA_HIGH;
+                    signal PhyPacketTx.sendHeaderDone();
+                    break;
+                case STATE_DATA_HIGH:
+                    signal SerializerRadioByteComm.txByteReady(SUCCESS);
+                    break;
+                case STATE_DATA_LOW:
+                    call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f));
+                    phyState = STATE_DATA_HIGH;                    
+                    break;
+                case STATE_FOOTER_START:
+                    /* Pseudo-Footer: the MSP430 has two buffers: one for
+                     * transmit, one to store the next byte to be transmitted,
+                     * this footer fills the next-to-transmit buffer, to make
+                     * sure that the last real byte is actually
+                     * transmitted. The byte stored by this call may not be
+                     * transmitted fully or not at all. 
+                     */
+                    phyState = STATE_FOOTER_DONE;
+                    call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f));
+                    break;
+                case STATE_FOOTER_DONE:
+                    phyState = STATE_PREAMBLE;
+                    signal PhyPacketTx.sendFooterDone();
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+
+    /* Rx Done */
+    async event void RadioByteComm.rxByteReady(uint8_t data) {
+        call RxByteTimer.start(byteTime);
+        ReceiveNextByte(data);
+    }
+
+    /* Receive the next Byte from the USART */
+    void ReceiveNextByte(uint8_t data) {
+        uint8_t decodedByte;
+        atomic {
+            switch(phyState) {
+                case STATE_SYNC:
+                    if(data != PREAMBLE_BYTE) {
+                        if (data == SFD_BYTE) {
+                            signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                            phyState = STATE_DATA_HIGH;
+                        } else {
+                            phyState = STATE_SFD;
+                        } 
+                    }
+                    break;
+                case STATE_SFD:
+                    if (data == SFD_BYTE) {
+                        signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                        phyState = STATE_DATA_HIGH;
+                    } else {
+                        phyState = STATE_PREAMBLE; 
+                    }
+                    break;
+                case STATE_PREAMBLE:
+                    if(data == PREAMBLE_BYTE) {
+                        phyState = STATE_SYNC;
+                    } 
+                    break;
+                case STATE_DATA_HIGH:
+                    decodedByte = manchesterDecodeByte(data);
+                    if(decodedByte != 0xff) {
+                        bufByte = decodedByte << 4;
+                        phyState = STATE_DATA_LOW;
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_DATA_LOW:
+                    decodedByte = manchesterDecodeByte(data);
+                    if(decodedByte != 0xff) {
+                        bufByte |= decodedByte;
+                        phyState = STATE_DATA_HIGH;
+                        signal SerializerRadioByteComm.rxByteReady(bufByte);
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                    // maybe there will be a time.... we will need this. but for now there is no footer
+                    //case STATE_FOOTER_START:
+                    //phyState = STATE_FOOTER_DONE;
+                    //break;
+                    //case STATE_FOOTER_DONE:
+                    //phyState = STATE_NULL;
+                    //signal PhyPacketRx.recvFooterDone(TRUE);
+                    //break;
+                default:
+                    break;
+            }
+        }
+    }
+
+}
diff --git a/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc b/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc
new file mode 100644
index 00000000..f312dcce
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the IO pins to the AD5200 Pot on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues 
+ */
+configuration AD5200PotIOC
+{
+  provides interface GeneralIO as AD5200PotENPOT;
+  provides interface GeneralIO as AD5200PotSDPOT;
+}
+implementation {
+  components
+      HplMsp430GeneralIOC as MspGeneralIO
+    , new Msp430GpioC() as rENPOT
+    , new Msp430GpioC() as rSDPOT
+    ;
+
+  AD5200PotENPOT = rENPOT;
+  AD5200PotSDPOT = rSDPOT;
+
+  rENPOT -> MspGeneralIO.Port24;
+  rSDPOT -> MspGeneralIO.Port23;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataC.nc b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataC.nc
new file mode 100644
index 00000000..0bab5bdf
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataC.nc
@@ -0,0 +1,65 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision$
+* $Date$
+* ========================================================================
+*/
+
+#include "msp430baudrates.h"
+#include "tda5250BusResourceId.h"
+
+/**
+ * Controlling the TDA5250 at the HPL layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+configuration HplTda5250DataC {
+  provides {
+    interface Init;
+    interface HplTda5250Data;
+    interface Resource as Resource;
+  }
+}
+implementation {
+
+
+  components HplTda5250DataP
+      , new Msp430Usart0C()
+      , Tda5250RadioIOC
+      ;
+
+  Init = HplTda5250DataP;
+  Resource = HplTda5250DataP.Resource;
+  HplTda5250Data = HplTda5250DataP;
+
+  HplTda5250DataP.DATA -> Tda5250RadioIOC.Tda5250RadioDATA;
+  HplTda5250DataP.Usart -> Msp430Usart0C;
+  HplTda5250DataP.UsartInterrupts -> Msp430Usart0C;
+  HplTda5250DataP.UartResource -> Msp430Usart0C.Resource;
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc
new file mode 100644
index 00000000..153022eb
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the IO pins to the TDA5250 Radio on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues 
+ */
+configuration Tda5250RadioIOC
+{
+  provides interface GeneralIO as Tda5250RadioBUSM;
+  provides interface GeneralIO as Tda5250RadioENTDA;
+  provides interface GeneralIO as Tda5250RadioTXRX;
+  provides interface GeneralIO as Tda5250RadioDATA;
+  provides interface GeneralIO as Tda5250RadioPWDDD;
+}
+implementation {
+  components
+      HplMsp430GeneralIOC as MspGeneralIO
+    , new Msp430GpioC() as rBUSM
+    , new Msp430GpioC() as rENTDA
+    , new Msp430GpioC() as rTXRX
+    , new Msp430GpioC() as rDATA
+    , new Msp430GpioC() as rPWDD
+    ;
+
+  Tda5250RadioBUSM = rBUSM;
+  Tda5250RadioENTDA = rENTDA;
+  Tda5250RadioTXRX = rTXRX;
+  Tda5250RadioDATA = rDATA;
+  Tda5250RadioPWDDD = rPWDD;
+
+  rBUSM -> MspGeneralIO.Port15;
+  rENTDA -> MspGeneralIO.Port16;
+  rTXRX -> MspGeneralIO.Port14;
+  rDATA -> MspGeneralIO.Port11;
+  rPWDD -> MspGeneralIO.Port10;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc
new file mode 100644
index 00000000..da20a7cf
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the PWDDD interrupt for the TDA5250 Radio
+ * on the eyesIFX platforms.
+ *
+ * @author Kevin Klues 
+ */
+configuration Tda5250RadioInterruptC
+{
+  provides interface GpioInterrupt;
+}
+implementation
+{
+  components
+      HplMsp430InterruptC
+    , new Msp430InterruptC()
+    ;
+
+    GpioInterrupt = Msp430InterruptC.Interrupt;
+    Msp430InterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc
new file mode 100644
index 00000000..ef85d939
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Controlling the TDA5250 at the HPL layer for use with the MSP430 on the
+ * eyesIFX platforms, Configuration.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250BusResourceId.h"
+
+/**
+ * Configuration file for the registers of TDA5250 Radio on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+configuration Tda5250RegCommC {
+  provides {
+    interface Init;
+    interface Tda5250RegComm;
+    interface Pot;
+    interface Resource;
+  }
+}
+implementation {
+  components new Msp430Spi0C() as Spi
+           , Tda5250RegCommP
+           , Tda5250RadioIOC
+           , AD5200P
+           , AD5200PotIOC
+           ;
+
+  Init = Tda5250RegCommP;
+  Init = AD5200P;
+  Pot = AD5200P.Pot;
+  Resource = Tda5250RegCommP.Resource;
+
+  Tda5250RegComm = Tda5250RegCommP;
+
+  Tda5250RegCommP.BusM -> Tda5250RadioIOC.Tda5250RadioBUSM;
+
+  Tda5250RegCommP.SpiByte -> Spi;
+  Tda5250RegCommP.SpiResource -> Spi;
+
+  AD5200P.ENPOT -> AD5200PotIOC.AD5200PotENPOT;
+  AD5200P.SDPOT -> AD5200PotIOC.AD5200PotSDPOT;
+  AD5200P.SpiByte -> Spi;
+
+
+
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceId.h b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceId.h
new file mode 100644
index 00000000..12b8e245
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceId.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2006, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+#include "msp430UsartResource.h"
+
+#ifndef TDA5250BUSRESOURCEID_H
+#define TDA5250BUSRESOURCEID_H
+
+enum {
+    TDA5250_UART_BUS_ID = unique(MSP430_UARTO_BUS)
+};
+
+#endif
diff --git a/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h b/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h
new file mode 100644
index 00000000..50104698
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegDefaultSettings Header File
+ * Defines the default values of the registers for the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGDEFAULTSETTINGS_H
+#define TDA5250REGDEFAULTSETTINGS_H
+
+// Default values of data registers
+#define TDA5250_REG_DEFAULT_SETTING_CONFIG           0x94F9
+#define TDA5250_REG_DEFAULT_SETTING_FSK              0x0A0C
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING      0x0012
+#define TDA5250_REG_DEFAULT_SETTING_LPF              0x6A
+#define TDA5250_REG_DEFAULT_SETTING_ON_TIME          0xFEC0
+#define TDA5250_REG_DEFAULT_SETTING_OFF_TIME         0xF380
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1        0x0000
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2        0x0001
+#define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3         0xFF
+#define TDA5250_REG_DEFAULT_SETTING_CLK_DIV          0x08
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG      0x01
+#define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD         0xFFFF
+
+#endif //TDA5250REGDEFAULTSETTINGS_H
+
diff --git a/tos/platforms/eyesIFX/eyesIFXSerialP.nc b/tos/platforms/eyesIFX/eyesIFXSerialP.nc
new file mode 100644
index 00000000..a24703a4
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXSerialP.nc
@@ -0,0 +1,14 @@
+module eyesIFXSerialP {
+ provides interface StdControl;
+ uses interface Resource;
+}
+implementation {
+ command error_t StdControl.start(){
+   return call Resource.immediateRequest();
+ }
+ command error_t StdControl.stop(){
+   call Resource.release();
+   return SUCCESS;
+ }
+ event void Resource.granted(){}
+}
diff --git a/tos/platforms/eyesIFX/eyesIFXv1/.platform b/tos/platforms/eyesIFX/eyesIFXv1/.platform
new file mode 100644
index 00000000..d85c1202
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv1/.platform
@@ -0,0 +1,17 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+
+push( @includes, qw(
+
+  %T/platforms/eyesIFX/eyesIFXv1
+  %T/platforms/eyesIFX/chips/stm25p
+  %T/chips/stm25p
+) );
+
+push ( @opts, qw(
+
+  -mmcu=msp430x149
+) );
+
diff --git a/tos/platforms/eyesIFX/eyesIFXv1/hardware.h b/tos/platforms/eyesIFX/eyesIFXv1/hardware.h
new file mode 100644
index 00000000..8c1e786b
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv1/hardware.h
@@ -0,0 +1,229 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id$
+ *
+ */
+
+#ifndef TOSH_HARDWARE_EYESIFX
+#define TOSH_HARDWARE_EYESIFX
+
+#include "msp430hardware.h"
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2);
+
+// Debug Pin assignments
+TOSH_ASSIGN_PIN(DEBUG_PIN1, 1, 2);
+TOSH_ASSIGN_PIN(DEBUG_PIN2, 1, 3);
+
+TOSH_ASSIGN_PIN(LED0, 5, 0);
+TOSH_ASSIGN_PIN(LED1, 5, 1);
+TOSH_ASSIGN_PIN(LED2, 5, 2);
+TOSH_ASSIGN_PIN(LED3, 5, 3);
+
+// TDA5250 assignments
+TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD
+TOSH_ASSIGN_PIN(TDA_DATA, 1, 1);  // TDA DATA (timerA, CCI0A)
+TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4);  // TDA TX/RX
+TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5);  // TDA BUSM
+TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA
+
+// USART0 assignments
+TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250)
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);   // USART0 -> data1 (TDA5250)
+TOSH_ASSIGN_PIN(URXD0, 3, 5);   // USART0 -> data1 (TDA5250)
+
+// USART1 assignments
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);   // USART1 -> ST3232
+TOSH_ASSIGN_PIN(URXD1, 3, 7);   // USART1 -> ST3232
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// Sensor assignments
+TOSH_ASSIGN_PIN(RSSI, 6, 3);
+TOSH_ASSIGN_PIN(TEMP, 6, 0);
+TOSH_ASSIGN_PIN(LIGHT, 6, 2);
+TOSH_ASSIGN_PIN(ADC_A1, 6, 1);
+
+// Potentiometer
+TOSH_ASSIGN_PIN(POT_EN, 2, 4);
+TOSH_ASSIGN_PIN(POT_SD, 2, 3);
+
+// TimerA output
+TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7
+TOSH_ASSIGN_PIN(TIMERA1, 1, 2);
+TOSH_ASSIGN_PIN(TIMERA2, 1, 3);
+
+// TimerB output
+TOSH_ASSIGN_PIN(TIMERB0, 4, 0);
+TOSH_ASSIGN_PIN(TIMERB1, 4, 1);
+TOSH_ASSIGN_PIN(TIMERB2, 4, 2);
+
+// SMCLK output
+TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7
+
+// ACLK output
+TOSH_ASSIGN_PIN(ACLK, 2, 0); 
+
+// Flash 
+TOSH_ASSIGN_PIN(FLASH_CS, 1, 7);
+
+// send a bit via bit-banging to the flash
+void TOSH_FLASH_M25P_DP_bit(bool set) {
+  if (set)
+    TOSH_SET_SIMO0_PIN();
+  else
+    TOSH_CLR_SIMO0_PIN();
+  TOSH_SET_UCLK0_PIN();
+  TOSH_CLR_UCLK0_PIN();
+}
+
+inline void TOSH_wait(void)
+{
+  nop(); nop();
+}
+
+inline void uwait(uint16_t u) 
+{ 
+  /*
+  uint16_t i;
+  if (u < 500)
+    for (i=2; i < u; i++) { 
+      asm volatile("nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   ::);
+    }
+  else
+    for (i=0; i < u; i++) { 
+      asm volatile("nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   ::);
+    }
+  */
+  uint16_t t0 = TAR;
+  while((TAR - t0) <= u);
+} 
+
+void TOSH_FLASH_M25P_DP() {
+  //  SIMO0, UCLK0
+  TOSH_MAKE_SIMO0_OUTPUT();
+  TOSH_MAKE_UCLK0_OUTPUT();
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_SET_FLASH_CS_PIN();
+
+  TOSH_wait();
+
+  // initiate sequence;
+  TOSH_CLR_FLASH_CS_PIN();
+  TOSH_CLR_UCLK0_PIN();
+  
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 0
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 1
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 2
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 3
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 4
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 5
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 6
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 7
+
+  TOSH_SET_FLASH_CS_PIN();
+
+  TOSH_SET_SIMO0_PIN();
+  TOSH_MAKE_SIMO0_INPUT();
+  TOSH_MAKE_UCLK0_INPUT();
+}
+
+
+#undef atomic
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+atomic {
+ P1OUT = 0x00;
+  P2OUT = 0x00;
+  P3OUT = 0x00;
+  P4OUT = 0x00;
+  P5OUT = 0x00;
+  P6OUT = 0x00;
+
+  P1SEL = 0x00;
+  P2SEL = 0x00;
+  P3SEL = 0x00;
+  P4SEL = 0x00;
+  P5SEL = 0x00;
+  P6SEL = 0x00;
+ 
+    P1DIR = 0x07;
+//  P2DIR = 0xff;
+//  P3DIR = 0xff;
+    P4DIR = 0xff;
+    P5DIR = 0x0f;
+    P6DIR = 0xf0;
+
+
+  TOSH_CLR_TDA_PWDDD_PIN(); // radio has to be on on power-up
+  TOSH_MAKE_TDA_PWDDD_OUTPUT();
+
+  TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio
+  TOSH_MAKE_TDA_ENTDA_OUTPUT();
+  
+  TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+ 
+  TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode
+  TOSH_MAKE_POT_SD_OUTPUT();
+
+  TOSH_SET_POT_EN_PIN(); // deselect potentiometer
+  TOSH_MAKE_POT_EN_OUTPUT();
+
+  TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor
+  TOSH_MAKE_TEMP_INPUT();
+  TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor
+  TOSH_MAKE_LIGHT_INPUT();
+
+  P1IE = 0;
+  P2IE = 0;
+
+  // wait 12ms for the radio and flash to start
+  uwait(1024*12);
+   //
+  // Put the flash in deep sleep state
+  TOSH_FLASH_M25P_DP();
+  TOSH_SET_TDA_PWDDD_PIN(); // put the radio in sleep
+}
+}
+#endif //TOSH_HARDWARE_H
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/.platform b/tos/platforms/eyesIFX/eyesIFXv2/.platform
new file mode 100644
index 00000000..fba02385
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/.platform
@@ -0,0 +1,16 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+
+push( @includes, qw(
+
+  %T/platforms/eyesIFX/eyesIFXv2
+  %T/platforms/eyesIFX/chips/at45db
+  %T/chips/at45db
+) );
+
+push ( @opts, qw(
+
+  -mmcu=msp430x1611
+) );
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/hardware.h b/tos/platforms/eyesIFX/eyesIFXv2/hardware.h
new file mode 100644
index 00000000..e07d4116
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/hardware.h
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id$
+ *
+ */
+
+#ifndef TOSH_HARDWARE_EYESIFXV2
+#define TOSH_HARDWARE_EYESIFXV2
+
+#include "msp430hardware.h"
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2);
+
+TOSH_ASSIGN_PIN(LED0, 5, 0);
+TOSH_ASSIGN_PIN(LED1, 5, 1);
+TOSH_ASSIGN_PIN(LED2, 5, 2);
+TOSH_ASSIGN_PIN(LED3, 5, 3);
+
+// TDA5250 assignments
+TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5);  // TDA BUSM
+TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA
+TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4);  // TDA TX/RX
+TOSH_ASSIGN_PIN(TDA_DATA, 1, 1);  // TDA DATA (timerA, CCI0A)
+TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD
+
+// USART0 assignments
+TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250)
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);   // USART0 -> data1 (TDA5250)
+TOSH_ASSIGN_PIN(URXD0, 3, 5);   // USART0 -> data1 (TDA5250)
+
+// USART1 assignments
+
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);   // USART1 -> USB
+TOSH_ASSIGN_PIN(URXD1, 3, 7);   // USART1 -> USB
+/*
+void TOSH_SEL_SIMO1_IOFUNC() { }
+void TOSH_SEL_SOMI1_IOFUNC() { }
+void TOSH_SEL_UCLK1_IOFUNC() { }
+void TOSH_SEL_SIMO1_MODFUNC() { }
+void TOSH_SEL_SOMI1_MODFUNC() { }
+void TOSH_SEL_UCLK1_MODFUNC() { }
+*/
+// Sensor assignments
+TOSH_ASSIGN_PIN(RSSI, 6, 3);
+TOSH_ASSIGN_PIN(TEMP, 6, 0);
+TOSH_ASSIGN_PIN(LIGHT, 6, 2);
+TOSH_ASSIGN_PIN(VREF, 6, 7);
+TOSH_ASSIGN_PIN(B0, 6, 4);
+TOSH_ASSIGN_PIN(B1, 6, 5);
+TOSH_ASSIGN_PIN(B2, 6, 7);
+TOSH_ASSIGN_PIN(B3, 6, 6);
+TOSH_ASSIGN_PIN(B4, 6, 1);
+
+
+// Potentiometer
+TOSH_ASSIGN_PIN(POT_EN, 2, 4);
+TOSH_ASSIGN_PIN(POT_SD, 2, 3);
+
+// TimerA output
+TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7
+TOSH_ASSIGN_PIN(TIMERA1, 1, 2);
+TOSH_ASSIGN_PIN(TIMERA2, 1, 3);
+
+// TimerB output
+TOSH_ASSIGN_PIN(TIMERB0, 4, 0);
+TOSH_ASSIGN_PIN(TIMERB1, 4, 1);
+TOSH_ASSIGN_PIN(TIMERB2, 4, 2);
+
+// SMCLK output
+TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7
+
+// ACLK output
+TOSH_ASSIGN_PIN(ACLK, 2, 0);
+
+// Flash
+TOSH_ASSIGN_PIN(FLASH_CS, 1, 7);
+
+TOSH_ASSIGN_PIN(DEBUG_1, 1, 1);
+TOSH_ASSIGN_PIN(DEBUG_2, 1, 2);
+TOSH_ASSIGN_PIN(DEBUG_3, 1, 3);
+
+inline void uwait(uint16_t u) 
+{ 
+  uint16_t t0 = TAR;
+  while((TAR - t0) <= u);
+} 
+
+
+#undef atomic
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+
+  // Default seting is I/O and output zero.
+
+atomic {
+
+  P1OUT = 0x00;
+  P2OUT = 0x00;
+  P3OUT = 0x00;
+  P4OUT = 0x00;
+  P5OUT = 0x00;
+  P6OUT = 0x00;
+
+  P1SEL = 0x00;
+  P2SEL = 0x00;
+  P3SEL = 0x00;
+  P4SEL = 0x00;
+  P5SEL = 0x00;
+  P6SEL = 0x00;
+ 
+    P1DIR = 0x07;
+//  P2DIR = 0xff;
+//  P3DIR = 0xff;
+    P4DIR = 0xff;
+    P5DIR = 0x0f;
+    P6DIR = 0xf0;
+
+  TOSH_MAKE_TDA_PWDDD_OUTPUT();
+  TOSH_MAKE_TDA_ENTDA_OUTPUT();
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_MAKE_POT_SD_OUTPUT();
+  TOSH_MAKE_POT_EN_OUTPUT();
+
+
+ // wait 12ms for the radio to start
+  uwait(1024*12);
+
+  TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio
+  TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode
+  TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode
+  TOSH_SET_POT_EN_PIN(); // deselect potentiometer
+  TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor
+  TOSH_MAKE_TEMP_INPUT();
+  TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor
+  TOSH_MAKE_LIGHT_INPUT();
+
+  P1IE = 0;
+  P2IE = 0;
+
+  TOSH_SET_TDA_PWDDD_PIN(); // put radio in sleep
+}
+}
+#endif //TOSH_HARDWARE_EYESIFXV2
diff --git a/tos/platforms/eyesIFX/platform_message.h b/tos/platforms/eyesIFX/platform_message.h
new file mode 100644
index 00000000..084b0d02
--- /dev/null
+++ b/tos/platforms/eyesIFX/platform_message.h
@@ -0,0 +1,64 @@
+/* $Id$
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific TDA5250 packet structures.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 Modifications)
+ * @date   May 16 2005
+ * Revision:  $Revision$
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+#include "tda5250_message.h"
+
+typedef union message_header_t {
+  tda5250_header_t radio;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer_t {
+  tda5250_footer_t radio;
+} message_footer_t;
+
+typedef union message_metadata_t {
+  tda5250_metadata_t radio;
+} message_metadata_t;
+
+typedef tda5250_header_t message_radio_header_t;
+typedef tda5250_footer_t message_radio_footer_t;
+typedef tda5250_metadata_t message_radio_metadata_t;
+
+#endif
diff --git a/tos/platforms/eyesIFX/sensors/BatteryLevel.nc b/tos/platforms/eyesIFX/sensors/BatteryLevel.nc
new file mode 100644
index 00000000..e2acfae6
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/BatteryLevel.nc
@@ -0,0 +1,39 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Measure Battery Level in mV using the internal voltage
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+interface BatteryLevel {
+    // get the batterylevel in mV
+    async command uint16_t getLevel();
+}
diff --git a/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc b/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc
new file mode 100644
index 00000000..e29c8e13
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc
@@ -0,0 +1,57 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+#include 
+generic configuration BatteryLevelSensorC()
+{
+    provides {
+        interface Read as Read;
+        interface ReadNow as ReadNow;
+        interface Resource as ReadNowResource;
+    }
+}
+implementation
+{
+    components SensorSettingsC as Settings;
+             
+    components new AdcReadClientC() as AdcReadClient;
+    Read = AdcReadClient;
+    AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[INTERNAL_VOLTAGE_REF_2_5V];
+  
+    components new AdcReadNowClientC() as AdcReadNowClient;
+    ReadNow = AdcReadNowClient;
+    ReadNowResource = AdcReadNowClient;
+    AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[INTERNAL_VOLTAGE_REF_2_5V];
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorC.nc
new file mode 100644
index 00000000..fc19335a
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/**
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the Read and
+ * ReadStream interface. Which actual sensor this is, is variable
+ * defined in the implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include 
+generic configuration DemoSensorC()
+{
+  provides {
+    interface Read;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadClientC() as AdcReadClient;
+  components new ReadShiftC(4) as ReadShift;
+
+  Read = ReadShift;
+  ReadShift.ReadRaw -> AdcReadClient;
+  AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[PHOTO_SENSOR_DEFAULT];
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc
new file mode 100644
index 00000000..0370d3e1
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the ReadNow and
+ * interface. Which actual sensor this is, is variable and defined in the
+ * implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+
+#include 
+generic configuration DemoSensorNowC()
+{
+  provides {
+    interface Resource;
+    interface ReadNow;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  components new ReadNowShiftC(4) as ReadNowShift;
+  
+  ReadNow = ReadNowShift;
+  ReadNowShift.ReadNowRaw -> AdcReadNowClient;
+  Resource = AdcReadNowClient;
+  AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[PHOTO_SENSOR_DEFAULT];  
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc
new file mode 100644
index 00000000..c5ff85a4
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/**
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the Read and
+ * ReadStream interface. Which actual sensor this is, is variable
+ * defined in the implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include 
+generic configuration DemoSensorStreamC()
+{
+  provides {
+    interface ReadStream;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadStreamClientC() as AdcReadStreamClient;
+  components new ReadStreamShiftC(4) as ReadStreamShift;
+    
+  ReadStream = ReadStreamShift;
+  ReadStreamShift.ReadStreamRaw -> AdcReadStreamClient;
+  AdcReadStreamClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[PHOTO_SENSOR_DEFAULT];
+}
diff --git a/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc b/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc
new file mode 100644
index 00000000..731640b1
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * onboard photo sensor on the eyesIFXv{1,2} platform.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include 
+generic configuration PhotoSensorC()
+{
+  provides {
+    interface Read as Read;
+    interface ReadNow as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+             
+  components new AdcReadClientC() as AdcReadClient;
+  Read = AdcReadClient;
+  AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[PHOTO_SENSOR_DEFAULT];
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[PHOTO_SENSOR_DEFAULT];
+}
+
diff --git a/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc
new file mode 100644
index 00000000..55671d80
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+generic module ReadNowShiftC(uint8_t bits)
+{
+  provides interface ReadNow as ReadNowShifted;
+  uses interface ReadNow as ReadNowRaw;
+}
+implementation
+{
+  async command error_t ReadNowShifted.read() { return call ReadNowRaw.read(); }
+  async event void ReadNowRaw.readDone(error_t result, uint16_t val) 
+  { 
+    signal ReadNowShifted.readDone(result, (val << bits)); 
+  }
+}
diff --git a/tos/platforms/eyesIFX/sensors/ReadShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadShiftC.nc
new file mode 100644
index 00000000..b2a1e3ec
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadShiftC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+generic module ReadShiftC(uint8_t bits)
+{
+  provides interface Read as ReadShifted;
+  uses interface Read as ReadRaw;
+}
+implementation
+{
+  command error_t ReadShifted.read() { return call ReadRaw.read(); }
+  event void ReadRaw.readDone(error_t result, uint16_t val) 
+  { 
+    signal ReadShifted.readDone(result, (val << bits)); 
+  }
+}
diff --git a/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc
new file mode 100644
index 00000000..11c825b1
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+generic module ReadStreamShiftC(uint8_t bits)
+{
+  provides interface ReadStream as ReadStreamShifted;
+  uses interface ReadStream as ReadStreamRaw;
+}
+implementation
+{
+  command error_t ReadStreamShifted.postBuffer(uint16_t* buf, uint16_t count) 
+  {
+    return call ReadStreamRaw.postBuffer(buf, count);
+  }
+  
+  command error_t ReadStreamShifted.read(uint32_t usPeriod) 
+  { 
+    return call ReadStreamRaw.read(usPeriod); 
+  }
+
+  event void ReadStreamRaw.bufferDone(error_t result, 
+			 uint16_t* buf, uint16_t count)
+  {
+    uint16_t i;
+    if (result == SUCCESS)
+      for (i=0; i
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform.
+ * Note: The radio must be configured to output the RSSI on the pin!
+ *
+ * @author Jan Hauer
+ */
+
+#include 
+generic configuration RssiSensorC()
+{
+  provides {
+    interface Read as Read;
+    interface ReadNow as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+             
+  components new AdcReadClientC() as AdcReadClient;
+  Read = AdcReadClient;
+  AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[RSSI_SENSOR_REF_1_5V];
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[RSSI_SENSOR_REF_1_5V];
+}
diff --git a/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc b/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc
new file mode 100644
index 00000000..d4baa1b3
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc
@@ -0,0 +1,67 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform.
+ * Note: The radio must be configured to output the RSSI on the pin!
+ *
+ * @author Jan Hauer
+ */
+
+#include 
+generic configuration RssiSensorVccC()
+{
+    provides {
+        interface Read as Read;
+        interface ReadNow as ReadNow;
+        interface Resource as ReadNowResource;
+    }
+}
+implementation
+{
+    components SensorSettingsC as Settings;
+             
+    components new AdcReadClientC() as AdcReadClient;
+    Read = AdcReadClient;
+    AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[RSSI_SENSOR_VCC];
+  
+    components new AdcReadNowClientC() as AdcReadNowClient;
+    ReadNow = AdcReadNowClient;
+    ReadNowResource = AdcReadNowClient;
+    AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[RSSI_SENSOR_VCC];
+}
diff --git a/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc b/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc
new file mode 100644
index 00000000..6d755145
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc
@@ -0,0 +1,60 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/**
+ * Default ADC channel configuration for eyesIFXv1 and eyesIFXv2. Future
+ * eyesIFX platforms may shadow this configuration (and sensors.h) in their
+ * respective subdirectory.
+ *
+ * @author Jan Hauer
+ */
+
+#include 
+module SensorSettingsC {
+    provides interface Msp430Adc12Config[uint8_t type];  
+}
+implementation
+{
+    async command msp430adc12_channel_config_t Msp430Adc12Config.getChannelSettings[uint8_t type]() {
+        msp430adc12_channel_config_t config;
+        if(type < SENSOR_SENTINEL) {
+            config = sensorconfigurations[type];
+        } else {
+            config = sensorconfigurations[SENSOR_SENTINEL];
+        }
+        return config;
+    }
+}
+
diff --git a/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc b/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc
new file mode 100644
index 00000000..084cb671
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * onboard temperature sensor on the eyesIFXv{1,2} platform.
+ *
+ * @author Jan Hauer
+ */
+
+#include 
+generic configuration TempExtSensorC()
+{
+  provides {
+    interface Read as Read;
+    interface ReadNow as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+             
+  components new AdcReadClientC() as AdcReadClient;
+  Read = AdcReadClient;
+  AdcReadClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[TEMP_SENSOR_DEFAULT];
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.Msp430Adc12Config -> Settings.Msp430Adc12Config[TEMP_SENSOR_DEFAULT];
+}
diff --git a/tos/platforms/eyesIFX/sensors/sensors.h b/tos/platforms/eyesIFX/sensors/sensors.h
new file mode 100644
index 00000000..a5e39eea
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/sensors.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * @author: Jan Hauer 
+ * ========================================================================
+ */
+
+#ifndef SENSORS_H
+#define SENSORS_H
+
+#include 
+
+enum {
+  PHOTO_SENSOR_LOW_FREQ,
+  PHOTO_SENSOR_HIGH_FREQ,
+  PHOTO_SENSOR_DEFAULT,
+  PHOTO_SENSOR_VCC,
+  
+  TEMP_SENSOR_LOW_FREQ,
+  TEMP_SENSOR_HIGH_FREQ,
+  TEMP_SENSOR_DEFAULT,
+  
+  RSSI_SENSOR_VCC,
+  RSSI_SENSOR_REF_1_5V,
+  RSSI_SENSOR_DEFAULT,
+
+  INTERNAL_VOLTAGE_REF_2_5V,
+  INTERNAL_TEMP_HIGH_FREQ,
+
+  // add more entries here
+
+  // last entry
+  SENSOR_SENTINEL
+};
+
+const msp430adc12_channel_config_t sensorconfigurations[] = {
+    /* PHOTO_SENSOR_LOW_FREQ */
+    { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+      SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+      SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* PHOTO_SENSOR_HIGH_FREQ  */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 
+    },
+    /* PHOTO_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* PHOTO_SENSOR_VCC */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_LOW_FREQ */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_HIGH_FREQ */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_16_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_16_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_VCC */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_REF_1_5V */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_VOLTAGE_REF_2_5V */
+    {
+        SUPPLY_VOLTAGE_HALF_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_TEMP_HIGH_FREQ */
+    {
+        TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* your stuff here */
+    /* SENSOR_SENTINEL */
+    {
+        INPUT_CHANNEL_NONE,0,0,0,0,0,0,0
+    }
+};
+
+
+#endif
+
diff --git a/tos/platforms/intelmote2/.platform b/tos/platforms/intelmote2/.platform
new file mode 100644
index 00000000..636c0ca0
--- /dev/null
+++ b/tos/platforms/intelmote2/.platform
@@ -0,0 +1,46 @@
+#
+# FILE: intelmote2/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+#
+# $Id$
+#
+
+push ( @includes, qw(
+
+  %T/platforms/intelmote2
+  %T/platforms/intelmote2/chips/cc2420
+  %T/platforms/intelmote2/chips/da9030
+  %T/platforms/intelmote2/chips/pxa271
+  %T/chips/cc2420
+  %T/chips/pxa27x
+  %T/chips/pxa27x/lib
+  %T/chips/pxa27x/timer
+  %T/chips/pxa27x/gpio
+  %T/chips/pxa27x/dma
+  %T/chips/pxa27x/ssp
+  %T/chips/pxa27x/i2c
+  %T/chips/pxa27x/uart
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/gpio
+) );
+
+@opts = qw(
+
+  -gcc=xscale-elf-gcc
+  -nostartfiles
+  -fnesc-target=env
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{NESC_MACHINE} = "pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
+
+
diff --git a/tos/platforms/intelmote2/ActiveMessageC.nc b/tos/platforms/intelmote2/ActiveMessageC.nc
new file mode 100644
index 00000000..01e8b032
--- /dev/null
+++ b/tos/platforms/intelmote2/ActiveMessageC.nc
@@ -0,0 +1,71 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the mica2 platform. This is a naming wrapper
+ * around the CC1000 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+  
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/intelmote2/DemoSensorC.nc b/tos/platforms/intelmote2/DemoSensorC.nc
new file mode 100644
index 00000000..06de2b7f
--- /dev/null
+++ b/tos/platforms/intelmote2/DemoSensorC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the Intel Mote v2 provides a
+ * voltage reading from the da9030 PMIC. 
+ *
+ * Conversion from ADC reading to voltage:
+ *  VBAT = (2.65/256)*(ADC) + 2.65
+ *
+ * @author Gilman Tolle 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation
+{
+  components DemoSensorP;
+  components PMICC;
+
+  Read = DemoSensorP;
+  DemoSensorP.PMIC -> PMICC.PMIC;
+}
diff --git a/tos/platforms/intelmote2/DemoSensorP.nc b/tos/platforms/intelmote2/DemoSensorP.nc
new file mode 100644
index 00000000..315fda2f
--- /dev/null
+++ b/tos/platforms/intelmote2/DemoSensorP.nc
@@ -0,0 +1,60 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ * @author Phil Buonadonna
+ */
+
+module DemoSensorP {
+  provides interface Read as Read;
+  uses interface PMIC;
+}
+implementation {
+
+  task void doRead();
+
+  command error_t Read.read() {
+    post doRead();
+    return SUCCESS;
+  }
+  
+  task void doRead() {
+    error_t error;
+    uint8_t value;
+    
+    atomic { 
+      error = call PMIC.getBatteryVoltage(&value);
+    }
+
+    if (error != SUCCESS) value = 0;
+
+    signal Read.readDone(SUCCESS, (uint16_t)value);
+  }
+}
diff --git a/tos/platforms/intelmote2/HilTimerMilliC.nc b/tos/platforms/intelmote2/HilTimerMilliC.nc
new file mode 100644
index 00000000..af8f6e8d
--- /dev/null
+++ b/tos/platforms/intelmote2/HilTimerMilliC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer as TimerMilli[ uint8_t num ];
+}
+
+implementation
+{
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)) as VirtTimersMilli32;
+  components new AlarmToTimerC(TMilli) as AlarmToTimerMilli32;
+  components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli32;
+  components HalPXA27xOSTimerMapC;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarmMilli32;
+
+  TimerMilli = VirtTimersMilli32.Timer;
+
+  VirtTimersMilli32.TimerFrom -> AlarmToTimerMilli32.Timer;
+
+  AlarmToTimerMilli32.Alarm -> PhysAlarmMilli32.Alarm;
+
+  PhysAlarmMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarmMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/platforms/intelmote2/IM2InitSerialP.nc b/tos/platforms/intelmote2/IM2InitSerialP.nc
new file mode 100644
index 00000000..2be8d771
--- /dev/null
+++ b/tos/platforms/intelmote2/IM2InitSerialP.nc
@@ -0,0 +1,58 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+module IM2InitSerialP 
+{
+  provides interface Init;
+  uses {
+    interface HplPXA27xGPIOPin as TXD;
+    interface HplPXA27xGPIOPin as RXD;
+  }
+}
+
+implementation 
+{
+  command error_t Init.init() {
+    call TXD.setGAFRpin(STUART_TXD_ALTFN);
+    call TXD.setGPDRbit(TRUE);
+    call RXD.setGAFRpin(STUART_RXD_ALTFN);
+    call RXD.setGPDRbit(FALSE);
+
+    return SUCCESS;
+  }
+
+  async event void TXD.interruptGPIOPin() { return;} 
+  async event void RXD.interruptGPIOPin() { return;} 
+}
diff --git a/tos/platforms/intelmote2/PlatformC.nc b/tos/platforms/intelmote2/PlatformC.nc
new file mode 100644
index 00000000..d99c739e
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+  provides interface PlatformReset;
+
+}
+
+implementation
+{
+  components PlatformP,PMICC;
+  components HplPXA27xOSTimerC;
+
+  Init = PlatformP;
+  PlatformReset = PlatformP;
+
+  PlatformP.PMICInit -> PMICC.Init;
+  PlatformP.OST0M3 -> HplPXA27xOSTimerC.OST0M3;
+  PlatformP.PXA27xWD -> HplPXA27xOSTimerC.OSTWDCntl;
+
+}
diff --git a/tos/platforms/intelmote2/PlatformLedsC.nc b/tos/platforms/intelmote2/PlatformLedsC.nc
new file mode 100644
index 00000000..f81dac7c
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformLedsC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+
+implementation
+{
+  components GeneralIOC;
+  components PlatformP;
+
+  Init = PlatformP.InitL3;
+
+  Led0 = GeneralIOC.GeneralIO[RED_LED_PIN];
+  Led1 = GeneralIOC.GeneralIO[GREEN_LED_PIN];
+  Led2 = GeneralIOC.GeneralIO[BLUE_LED_PIN];
+}
diff --git a/tos/platforms/intelmote2/PlatformP.nc b/tos/platforms/intelmote2/PlatformP.nc
new file mode 100644
index 00000000..a81d1224
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformP.nc
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+
+#include "hardware.h"
+
+module PlatformP {
+  provides interface Init;
+  provides interface PlatformReset;
+  uses {
+    interface Init as InitL0;
+    interface Init as InitL1;
+    interface Init as InitL2;
+    interface Init as InitL3;
+    interface Init as PMICInit;
+  }
+  uses interface HplPXA27xOSTimer as OST0M3;
+  uses interface HplPXA27xOSTimerWatchdog as PXA27xWD;
+}
+implementation {
+
+  //void enableICache() @C();
+  command error_t Init.init() {
+
+    // Enable clocks to critical components 
+    CKEN = (CKEN22_MEMC | CKEN20_IMEM | CKEN15_PMI2C | CKEN9_OST);
+    // Set the arbiter to something meaningful for this platform
+    ARB_CNTL = (ARB_CNTL_CORE_PARK | 
+		ARB_CNTL_LCD_WT(0) | ARB_CNTL_DMA_WT(1) | ARB_CNTL_CORE_WT(4));
+
+
+    OSCC = (OSCC_OON);
+    while ((OSCC & OSCC_OOK) == 0);
+    
+    TOSH_SET_PIN_DIRECTIONS();
+
+    // Enable access to CP6 (Interrupt Controller processor)
+    // Enable access to Intel WMMX enhancements
+    asm volatile ("mcr p15,0,%0,c15,c1,0\n\t": : "r" (0x43));
+
+#ifdef PXA27X_13M
+     // Place PXA27X into 13M w/ PPLL enabled...
+    // other bits are ignored...but might be useful later
+    CCCR = (CCCR_CPDIS | CCCR_L(8) | CCCR_2N(2) | CCCR_A);
+    asm volatile (
+		  "mcr p14,0,%0,c6,c0,0\n\t"
+		  :
+		  : "r" (CLKCFG_F)
+		  );
+
+#else
+    // Place PXA27x into 104/104 MHz mode
+    CCCR = CCCR_L(8) | CCCR_2N(2) | CCCR_A; 
+    asm volatile (
+		  "mcr p14,0,%0,c6,c0,0\n\t"
+		  :
+		  : "r" (CLKCFG_B | CLKCFG_F | CLKCFG_T)
+		  );
+#endif
+
+    // Initialize Memory/Flash subsystems
+    SA1110 = SA1110_SXSTACK(1);
+    MSC0 = MSC0 | MSC_RBW024 | MSC_RBUFF024 | MSC_RT024(2) ;
+    MSC1 = MSC1 | MSC_RBW024;
+    MSC2 = MSC2 | MSC_RBW024;
+    MECR = 0;
+    // PXA271 Required initialization settings
+    MDCNFG = (MDCNFG_SETALWAYS | MDCNFG_DTC2(0x3) | 
+	      MDCNFG_STACK0 | MDCNFG_DTC0(0x3) | MDCNFG_DNB0 | 
+	      MDCNFG_DRAC0(0x2) | MDCNFG_DCAC0(0x1) | MDCNFG_DWID0 /* |
+								      MDCNFG_DE0 */);
+    MDREFR = (MDREFR & ~(MDREFR_K0DB4 | MDREFR_K0DB2)) | MDREFR_K0DB2;
+
+    enableICache();
+    initSyncFlash();
+
+    // Place all global platform initialization before this command.
+    // return call SubInit.init();
+    call InitL0.init();
+    call InitL1.init();
+    call InitL2.init();
+    call InitL3.init();
+
+    //call PMICInit.init();
+    return SUCCESS;
+  }
+
+  async command void PlatformReset.reset() {
+    call OST0M3.setOSMR(call OST0M3.getOSCR() + 1000);
+    call PXA27xWD.enableWatchdog();
+    while (1);
+    return; // Should never get here.
+  }
+
+  async event void OST0M3.fired() 
+  {
+    call OST0M3.setOIERbit(FALSE);
+    call OST0M3.clearOSSRbit();
+    return;
+  }
+
+  default command error_t InitL0.init() { return SUCCESS; }
+  default command error_t InitL1.init() { return SUCCESS; }
+  default command error_t InitL2.init() { return SUCCESS; }
+  default command error_t InitL3.init() { return SUCCESS; }
+
+}
+
diff --git a/tos/platforms/intelmote2/PlatformReset.nc b/tos/platforms/intelmote2/PlatformReset.nc
new file mode 100644
index 00000000..15b6b53b
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformReset.nc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+interface PlatformReset {
+  async command void reset();
+}
diff --git a/tos/platforms/intelmote2/PlatformResetC.nc b/tos/platforms/intelmote2/PlatformResetC.nc
new file mode 100644
index 00000000..995ad693
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformResetC.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+configuration PlatformResetC {
+  provides interface PlatformReset;
+}
+
+implementation {
+  components PlatformC;
+
+  PlatformReset = PlatformC;
+
+}
diff --git a/tos/platforms/intelmote2/PlatformSerialC.nc b/tos/platforms/intelmote2/PlatformSerialC.nc
new file mode 100644
index 00000000..bd66b267
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformSerialC.nc
@@ -0,0 +1,59 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+
+  components new HalPXA27xSerialP(115200); 
+  components HplPXA27xSTUARTC;
+  components HplPXA27xGPIOC;
+  components IM2InitSerialP;
+
+  Init = HalPXA27xSerialP;
+  Init = IM2InitSerialP;
+  StdControl = HalPXA27xSerialP;
+  SerialByteComm = HalPXA27xSerialP;
+  
+  HalPXA27xSerialP.UARTInit -> HplPXA27xSTUARTC.Init;
+  HalPXA27xSerialP.UART -> HplPXA27xSTUARTC.STUART;
+
+  IM2InitSerialP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_TXD];
+  IM2InitSerialP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_RXD];
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..acc5235c
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,55 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+generic configuration HplCC2420AlarmC() 
+{
+
+  provides interface Init;
+  //provides interface Alarm as Alarm32khz16;
+  provides interface Alarm as Alarm32khz32;
+
+}
+
+implementation 
+{
+
+  components new Alarm32khzC();
+
+  Init = Alarm32khzC;
+  //Alarm32khz16 = Alarm32khzC.Alarm32khz16;
+  Alarm32khz32 = Alarm32khzC.Alarm32khz32;
+  
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..7aba0623
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,50 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+configuration HplCC2420InterruptsC 
+{
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation 
+{
+  components GeneralIOC;
+  components new SoftCaptureC();
+
+  CaptureSFD = SoftCaptureC.GpioCapture;
+  InterruptCCA = GeneralIOC.GpioInterrupt[CC2420_CCA_PIN];
+  InterruptFIFOP = GeneralIOC.GpioInterrupt[CC2420_FIFOP_PIN];
+
+  SoftCaptureC.GpioInterrupt -> GeneralIOC.GpioInterrupt[CC2420_SFD_PIN];  
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..0311e1b4
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,59 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+configuration HplCC2420PinsC 
+{
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation 
+{
+  components GeneralIOC;
+  
+  CCA = GeneralIOC.GeneralIO[CC2420_CCA_PIN];
+  CSN = GeneralIOC.GeneralIO[CC2420_CSN_PIN];
+  FIFO = GeneralIOC.GeneralIO[CC2420_FIFO_PIN];
+  FIFOP = GeneralIOC.GeneralIO[CC2420_FIFOP_PIN];
+  RSTN = GeneralIOC.GeneralIO[CC2420_RSTN_PIN];
+  SFD = GeneralIOC.GeneralIO[CC2420_SFD_PIN];
+  VREN = GeneralIOC.GeneralIO[CC2420_VREN_PIN];
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..539dcf68
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,60 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration HplCC2420SpiC() 
+{
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation 
+{
+
+  enum {
+    SPI_CLIENT_ID = unique("CC2420SpiClient")
+  };
+
+  components IM2CC2420SpiP;
+ 
+  Resource = IM2CC2420SpiP.Resource[SPI_CLIENT_ID];
+  SpiByte = IM2CC2420SpiP.SpiByte;
+  SpiPacket = IM2CC2420SpiP.SpiPacket[SPI_CLIENT_ID];
+
+  components PlatformP;
+  IM2CC2420SpiP.Init <- PlatformP.InitL3;
+
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc
new file mode 100644
index 00000000..f1252cfc
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc
@@ -0,0 +1,62 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+module IM2CC2420InitSpiP 
+{
+  
+  provides interface Init;
+  uses {
+    interface HplPXA27xGPIOPin as SCLK;
+    interface HplPXA27xGPIOPin as TXD;
+    interface HplPXA27xGPIOPin as RXD;
+  }
+}
+
+implementation 
+{
+  command error_t Init.init() {
+    call SCLK.setGAFRpin(SSP3_SCLK_ALTFN);
+    call SCLK.setGPDRbit(TRUE);
+    call TXD.setGAFRpin(SSP3_TXD_ALTFN);
+    call TXD.setGPDRbit(TRUE);
+    call RXD.setGAFRpin(SSP3_RXD_ALTFN);
+    call RXD.setGPDRbit(FALSE);
+
+    return SUCCESS;
+  }
+  async event void SCLK.interruptGPIOPin() { return;} 
+  async event void TXD.interruptGPIOPin() { return;} 
+  async event void RXD.interruptGPIOPin() { return;} 
+
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc
new file mode 100644
index 00000000..7787169a
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc
@@ -0,0 +1,76 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+configuration IM2CC2420SpiP 
+{
+  
+  provides interface Init;
+  provides interface Resource[uint8_t id];
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+
+}
+
+implementation 
+{
+
+  components new FcfsArbiterC("CC2420SpiClient");
+  components new HalPXA27xSpiDMAM(0,1,0x7,FALSE) as HalPXA27xSpiM; // 6.5 Mbps, 8bit width
+  //components new HalPXA27xSpiPioM(0,1,0x7,FALSE) as HalPXA27xSpiM; // SPI, 6.5 Mbps, 8bit width, noRWOT
+  components IM2CC2420InitSpiP;
+  components HplPXA27xSSP3C;
+  components HplPXA27xDMAC;
+  components HplPXA27xGPIOC;
+  components PlatformP;
+
+  Init = IM2CC2420InitSpiP;
+  Init = FcfsArbiterC.Init;
+  Init = HalPXA27xSpiM.Init;
+
+  SpiByte = HalPXA27xSpiM;
+  SpiPacket = HalPXA27xSpiM;
+  Resource = FcfsArbiterC;
+
+  IM2CC2420InitSpiP.SCLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_SCLK];
+  IM2CC2420InitSpiP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_TXD];
+  IM2CC2420InitSpiP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_RXD];
+
+  HalPXA27xSpiM.RxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[0];
+  HalPXA27xSpiM.TxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[1];
+  HalPXA27xSpiM.SSPRxDMAInfo -> HplPXA27xSSP3C.SSPRxDMAInfo;
+  HalPXA27xSpiM.SSPTxDMAInfo -> HplPXA27xSSP3C.SSPTxDMAInfo;
+
+  HalPXA27xSpiM.SSP -> HplPXA27xSSP3C.HplPXA27xSSP;
+  
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMIC.nc b/tos/platforms/intelmote2/chips/da9030/PMIC.nc
new file mode 100644
index 00000000..afa8d59e
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMIC.nc
@@ -0,0 +1,58 @@
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+
+/*
+ *
+ * Authors:	Lama Nachman, Robert Adler
+ */
+
+interface PMIC {
+  /*
+   * Set the voltage of the regulator controling the core
+   *
+   * @param core voltage specified in one of the supported trim values
+   *
+   * @return none
+   */
+  command error_t setCoreVoltage(uint8_t trimValue);
+  command error_t shutDownLDOs();
+  
+  command error_t getBatteryVoltage(uint8_t *val);
+  command error_t enableAutoCharging(bool enable);
+  command error_t enableManualCharging(bool enable);  
+  command error_t chargingStatus(uint8_t *vBat, uint8_t *vChg, uint8_t *iChg);  
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMICC.nc b/tos/platforms/intelmote2/chips/da9030/PMICC.nc
new file mode 100644
index 00000000..fdea88f2
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMICC.nc
@@ -0,0 +1,95 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors: Lama Nachman, Robert Adler
+ */
+configuration PMICC{
+  provides{
+    interface Init;
+    interface PMIC;
+  }
+}
+
+implementation{
+  components PMICM;
+  components new TimerMilliC();
+  components HplPXA27xPI2CC, HplPXA27xGPIOC;
+  components PlatformP;
+
+  Init = PMICM;
+  PMIC = PMICM;
+
+  PMICM.Init <- PlatformP.InitL2;
+
+  PMICM.chargeMonitorTimer -> TimerMilliC;
+  PMICM.PMICGPIO -> HplPXA27xGPIOC.HplPXA27xGPIOPin[1];
+  PMICM.PI2C -> HplPXA27xPI2CC.I2C;
+  PMICM.PlatformReset -> PlatformP.PlatformReset;
+
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMICM.nc b/tos/platforms/intelmote2/chips/da9030/PMICM.nc
new file mode 100644
index 00000000..e4887649
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMICM.nc
@@ -0,0 +1,415 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/*
+ *
+ * Authors:  Lama Nachman, Robert Adler
+ */
+
+#define START_RADIO_LDO 1
+#define START_SENSOR_BOARD_LDO 1
+/*
+ * VCC_MEM is connected to BUCK2 by default, make sure you have a board
+ * that has the right resistor settings before disabling BUCK2
+ */
+#define DISABLE_BUCK2 0	
+
+//#include "trace.h"
+#include "Timer.h"
+#include "pmic.h"
+
+module PMICM {
+  provides{
+    interface Init;
+    interface PMIC;
+  }
+
+  uses interface Timer as chargeMonitorTimer;
+  uses interface HplPXA27xGPIOPin as PMICGPIO;
+  uses interface HplPXA27xI2C as PI2C;
+  uses interface PlatformReset;
+}
+
+implementation {
+#include "pmic.h"
+  
+  bool gotReset;
+  
+  
+  error_t readPMIC(uint8_t address, uint8_t *value, uint8_t numBytes){
+    //send the PMIC the address that we want to read
+    if(numBytes > 0){
+      call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); 
+      call PI2C.setICR(call PI2C.getICR() | ICR_START);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      
+      //actually send the address terminated with a STOP
+      call PI2C.setIDBR(address);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_START);
+      call PI2C.setICR(call PI2C.getICR() | ICR_STOP);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP);
+      
+      //actually request the read of the data
+      call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1 | 1);
+      call PI2C.setICR(call PI2C.getICR() | ICR_START); 
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB);
+      while(call PI2C.getICR() & ICR_TB);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_START);
+      
+      //using Page Read Mode
+      while (numBytes > 1){
+	call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+	while(call PI2C.getICR() & ICR_TB);
+	*value = call PI2C.getIDBR(); 
+	value++;
+	numBytes--;
+      }
+      
+      call PI2C.setICR(call PI2C.getICR() | ICR_STOP);
+      call PI2C.setICR(call PI2C.getICR() | ICR_ACKNAK);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      *value = call PI2C.getIDBR(); 
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); 
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_ACKNAK);
+      
+      return SUCCESS;
+    }
+    else{
+      return FAIL;
+    }
+  }
+
+  error_t writePMIC(uint8_t address, uint8_t value){
+    call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_START); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+    
+    PIDBR = address;
+    call PI2C.setICR(call PI2C.getICR() & ~ICR_START); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+
+    PIDBR = value;
+    call PI2C.setICR(call PI2C.getICR() | ICR_STOP); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+    call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); PICR &= ~ICR_STOP;
+
+    return SUCCESS;
+  }
+  
+  void startLDOs() {
+    //uint8_t temp;
+    uint8_t oldVal, newVal;
+
+#if START_SENSOR_BOARD_LDO 
+    // TODO : Need to move out of here to sensor board functions
+    readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal | ARC1_LDO10_EN | ARC1_LDO11_EN;	// sensor board
+    writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+    newVal = oldVal | BRC2_LDO10_EN | BRC2_LDO11_EN;
+    writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+#endif
+
+#if START_RADIO_LDO
+    // TODO : Move to radio start
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal | BRC1_LDO5_EN; 
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+#endif
+
+#if DISABLE_BUCK2  // Disable BUCK2 if VCC_MEM is not configured to use BUCK2
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~BRC1_BUCK_EN;
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+#endif
+
+#if 0
+    // Configure above LDOs, Radio and sensor board LDOs to turn off in sleep
+    // TODO : Sleep setting doesn't work
+    temp = BSC1_LDO1(1) | BSC1_LDO2(1) | BSC1_LDO3(1) | BSC1_LDO4(1);
+    writePMIC(PMIC_B_SLEEP_CONTROL_1, temp);
+    temp = BSC2_LDO5(1) | BSC2_LDO7(1) | BSC2_LDO8(1) | BSC2_LDO9(1);
+    writePMIC(PMIC_B_SLEEP_CONTROL_2, temp);
+    temp = BSC3_LDO12(1); 
+    writePMIC(PMIC_B_SLEEP_CONTROL_3, temp);
+#endif
+  }
+
+  error_t startPMICstuff() {
+    //command result_t StdControl.start(){ XXX-pb
+    //init unit
+    uint8_t val[3];
+    //call PI2CInterrupt.enable(); XXX-pb
+
+  }
+
+  command error_t Init.init(){
+    uint8_t val[3];
+    PCFR |= PCFR_PI2C_EN; // Overrides GPIO settings on pins
+    call PI2C.setICR(call PI2C.getICR() | (ICR_IUE | ICR_SCLE));
+    atomic{
+      gotReset=FALSE;
+    }    
+
+    call PMICGPIO.setGAFRpin(0);
+    call PMICGPIO.setGPDRbit(FALSE);
+    call PMICGPIO.setGFERbit(TRUE);
+    /*
+     * Reset the watchdog, switch it to an interrupt, so we can disable it
+     * Ignore SLEEP_N pin, enable H/W reset via button 
+     */
+    writePMIC(PMIC_SYS_CONTROL_A, 
+              SCA_RESET_WDOG | SCA_WDOG_ACTION | SCA_HWRES_EN);
+
+    // Disable all interrupts from PMIC except for ONKEY button
+    writePMIC(PMIC_IRQ_MASK_A, ~IMA_ONKEY_N);
+    writePMIC(PMIC_IRQ_MASK_B, 0xFF);
+    writePMIC(PMIC_IRQ_MASK_C, 0xFF);
+    
+    //read out the EVENT registers so that we can receive interrupts
+    readPMIC(PMIC_EVENTS, val, 3);
+
+    // Set default core voltage to 0.85 V
+    call PMIC.setCoreVoltage(B2R1_TRIM_P85_V);
+
+    startLDOs();
+    return SUCCESS;
+  }
+
+  async event void PI2C.interruptI2C() { //PI2CInterrupt.fired(){
+    uint32_t status, update=0;
+    status = call PI2C.getISR(); //PISR;
+    if(status & ISR_ITE){
+      update |= ISR_ITE;
+      //trace(DBG_USR1,"sent data");
+    }
+
+    if(status & ISR_BED){
+      update |= ISR_BED;
+      //trace(DBG_USR1,"bus error");
+    }
+    call PI2C.setISAR(update); //PISR = update;
+  }
+  
+  async event void PMICGPIO.interruptGPIOPin(){
+    uint8_t events[3];
+    bool localGotReset;
+   
+    //call PMICGPIO.call PMICInterrupt.clear(); XXX autocleard by GPIO module
+   
+    readPMIC(PMIC_EVENTS, events, 3);
+   
+    if(events[EVENTS_A_OFFSET] & EA_ONKEY_N){
+      atomic{
+        localGotReset = gotReset;
+      }
+      if(localGotReset==TRUE){
+	call PlatformReset.reset();
+      }
+      else{
+        atomic{
+	  gotReset=TRUE;
+        }
+      }
+    }
+    else{
+      //trace(DBG_USR1,"PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]);
+    }
+  }
+
+  /*
+   * The Buck2 controls the core voltage, set to appropriate trim value
+   */
+  command error_t PMIC.setCoreVoltage(uint8_t trimValue) {
+    writePMIC(PMIC_BUCK2_REG1, (trimValue & B2R1_TRIM_MASK) | B2R1_GO);
+    return SUCCESS;
+  }
+  
+  command error_t PMIC.shutDownLDOs() {
+    uint8_t temp;
+    uint8_t oldVal, newVal;
+    /* 
+     * Shut down all LDOs that are not controlled by the sleep mode
+     * Note, we assume here the LDO10 & LDO11 (sensor board) will be off
+     * Should be moved to sensor board control
+     */
+
+    // LDO1, LDO4, LDO6, LDO7, LDO8, LDO9, LDO10, LDO 11, LDO13, LDO14
+
+    readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~ARC1_LDO13_EN & ~ARC1_LDO14_EN;
+    newVal = newVal & ~ARC1_LDO10_EN & ~ARC1_LDO11_EN;	// sensor board
+    writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~BRC1_LDO1_EN & ~BRC1_LDO4_EN & ~BRC1_LDO5_EN &
+             ~BRC1_LDO6_EN & ~BRC1_LDO7_EN;
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+    newVal = oldVal & ~BRC2_LDO8_EN & ~BRC2_LDO9_EN & ~BRC2_LDO10_EN &
+             ~BRC2_LDO11_EN & ~BRC2_LDO14_EN & ~BRC2_SIMCP_EN;
+    writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+    
+    return SUCCESS;
+  }
+
+  error_t getPMICADCVal(uint8_t channel, uint8_t *val){
+    uint8_t oldval;
+    error_t rval;
+    
+    //read out the old value so that we can reset at the end
+    rval = readPMIC(PMIC_ADC_MAN_CONTROL, &oldval,1);
+    if (rval == SUCCESS) {
+      rval = writePMIC(PMIC_ADC_MAN_CONTROL, PMIC_AMC_ADCMUX(channel) | 
+		       PMIC_AMC_MAN_CONV | PMIC_AMC_LDO_INT_Enable);
+    }
+    if (rval == SUCCESS) {
+      rval = readPMIC(PMIC_MAN_RES,val,1);
+    }
+    if (rval == SUCCESS) {
+    //reset to old state
+    rval = writePMIC(PMIC_ADC_MAN_CONTROL, oldval);
+    }
+
+    return rval;
+  }
+
+  command error_t PMIC.getBatteryVoltage(uint8_t *val){
+    //for now, let's use the manual conversion mode
+    return getPMICADCVal(0, val);
+  }
+  
+  command error_t PMIC.chargingStatus(uint8_t *vBat, uint8_t *vChg, 
+                                       uint8_t *iChg){
+    getPMICADCVal(0, vBat);
+    getPMICADCVal(2, vChg);
+    getPMICADCVal(1, iChg);
+    return SUCCESS;
+  }  
+  
+  command error_t PMIC.enableAutoCharging(bool enable){
+    return SUCCESS;
+  }
+  
+  command error_t PMIC.enableManualCharging(bool enable){
+    //just turn on or off the LED for now!!
+    uint8_t val;
+    
+    if(enable){
+      //want to turn on the charger
+      getPMICADCVal(2, &val);
+      //if charger is present due some stuff...75 should be 4.65V or so 
+      if(val > 75 ) {
+	//trace(DBG_USR1,"Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035));
+	//write the total timeout to be 8 hours
+	writePMIC(PMIC_TCTR_CONTROL,8);
+	//enable the charger at 100mA and 4.35V
+	writePMIC(PMIC_CHARGE_CONTROL,PMIC_CC_CHARGE_ENABLE | PMIC_CC_ISET(1) | PMIC_CC_VSET(7));
+	//turn on the LED
+	writePMIC(PMIC_LED1_CONTROL,0x80);
+	//start a timer to monitor our progress every 5 minutes!
+	call chargeMonitorTimer.startPeriodic(300000);
+      }
+      else{
+	//trace(DBG_USR1,"Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035));
+      }
+    }
+    else{
+      //turn off the charger and the LED
+      call PMIC.getBatteryVoltage(&val);
+      //trace(DBG_USR1,"Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
+      //disable everything that we enabled
+      writePMIC(PMIC_TCTR_CONTROL,0);
+      writePMIC(PMIC_CHARGE_CONTROL,0);
+      writePMIC(PMIC_LED1_CONTROL,0x00);
+    }
+    return SUCCESS; 
+  }  
+  
+  event void chargeMonitorTimer.fired(){
+    uint8_t val;
+    call PMIC.getBatteryVoltage(&val);
+    //stop when vBat>4V
+    if(val>130){
+      call PMIC.enableManualCharging(FALSE);
+      call chargeMonitorTimer.stop();
+    }
+    return;
+  }
+
+
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/pmic.h b/tos/platforms/intelmote2/chips/da9030/pmic.h
new file mode 100644
index 00000000..3c2fbc71
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/pmic.h
@@ -0,0 +1,225 @@
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:  Lama Nachman, Robbie Adler
+ *
+ * This file includes the PMIC command defintions.  We are using the Dialog
+ * DA9030 part. 
+ *
+ */
+
+#ifndef PMIC_H
+#define PMIC_H
+
+// I2C slave addr
+#define PMIC_SLAVE_ADDR 0x49
+
+// Register BUCK2 with DVC1
+#define PMIC_BUCK2_REG1 0x15
+
+// Register BUCK2 with DVC2
+#define PMIC_BUCK2_REG2 0x16
+
+// LDO on/off control in App Reg space
+#define PMIC_A_REG_CONTROL_1 0x17
+#define PMIC_A_REG_CONTROL_2 0x18
+
+#define PMIC_EVENTS                 (0x01)	// 3 byte array
+#define PMIC_EVENTA                 (0x01)
+#define PMIC_EVENTB                 (0x02)
+#define PMIC_EVENTC                 (0x03)
+#define PMIC_STATUS                 (0x04)
+#define PMIC_IRQ_MASK_A             (0x05)
+#define PMIC_IRQ_MASK_B             (0x06)
+#define PMIC_IRQ_MASK_C             (0x07)
+#define PMIC_SYS_CONTROL_A          (0x08)
+#define PMIC_SYS_CONTROL_C          (0x80)
+
+#define PMIC_CHARGE_CONTROL         (0x28)
+#define PMIC_CC_CHARGE_ENABLE       (1<<7)
+#define PMIC_CC_ISET(_x)            (((_x) & 0xF) << 3)
+#define PMIC_CC_VSET(_x)            (((_x) & 0x7))
+
+#define PMIC_TCTR_CONTROL           (0x2A)
+
+#define PMIC_ADC_MAN_CONTROL        (0x30)
+#define PMIC_AMC_ADCMUX(_x)         ((_x & 0x7))
+#define PMIC_AMC_MAN_CONV           (1<<3)
+#define PMIC_AMC_LDO_INT_Enable     (1<<4)
+
+#define PMIC_MAN_RES                (0x40)
+#define PMIC_LED1_CONTROL           (0x20)
+
+// LDO on/off control in Baseband Reg space
+#define PMIC_B_REG_CONTROL_1 0x97
+#define PMIC_B_REG_CONTROL_2 0x98
+#define PMIC_B_SLEEP_CONTROL_1 0x99
+#define PMIC_B_SLEEP_CONTROL_2 0x9A
+#define PMIC_B_SLEEP_CONTROL_3 0x9B
+
+// IRQ_MASK_A
+#define IMA_ONKEY_N 0x1
+#define IMA_PWREN1 0x2
+#define IMA_EXTON 0x4
+#define IMA_CHDET 0x8
+#define IMA_TBAT 0x10
+#define IMA_VBATMON_1 0x20
+#define IMA_VBATMON_2 0x40
+#define IMA_CHIOVER 0x80
+ 
+//IRQ_MASK_B
+#define IMB_TCTO 0x1
+#define IMB_CCTO 0x2
+#define IMB_ADC_READY 0x4
+#define IMB_VBUS_VALID_4_4 0x8
+#define IMB_VBUS_VALID_4_0 0x10
+#define IMB_SESSION_VALID 0x20
+#define IMB_SRP_DETECT 0x40
+#define IMB_WDOG 0x80
+
+// SYS_CONTROL_A
+#define SCA_SLEEP_N_EN 0x1
+#define SCA_SHUTDOWN 0x2
+#define SCA_HWRES_EN 0x4
+#define SCA_WDOG_ACTION 0x8
+#define SCA_TWDSCALE(_x) (((_x) & 7) << 4)
+#define SCA_RESET_WDOG 0x80
+
+// Events registers A, B, C
+#define EVENTS_A_OFFSET 0
+#define EA_ONKEY_N 0x1
+#define EA_PWREN1 0x2
+#define EA_EXTON 0x4
+#define EA_CHDET 0x8
+#define EA_TBAT 0x10
+#define EA_VBATMON 0x20
+#define EA_VBATMON_TXON 0x40
+#define EA_CHIOVER 0x80
+
+#define EVENTS_B_OFFSET 1
+#define EVENTS_C_OFFSET 2
+
+// BUCK2 Reg 1
+#define B2R1_TRIM_MASK 0x1f
+#define B2R1_TRIM_P85_V 0x0
+#define B2R1_TRIM_P875_V 0x1
+#define B2R1_TRIM_P9_V 0x2
+#define B2R1_TRIM_P925_V 0x3
+#define B2R1_TRIM_P95_V 0x4
+#define B2R1_TRIM_P975_V 0x5
+#define B2R1_TRIM_1_V 0x6
+#define B2R1_TRIM_1_125_V 0xB
+#define B2R1_TRIM_1_25_V 0x10
+#define B2R1_SLEEP 0x40
+#define B2R1_GO 0x80
+
+// Reg Control 1 for App processor reg space: Enable/Disable LDOs
+#define ARC1_BUCK2_EN 0x1	// on
+#define ARC1_LDO10_EN 0x2	// off
+#define ARC1_LDO11_EN 0x4	// off
+#define ARC1_LDO13_EN 0x8	// off
+#define ARC1_LDO14_EN 0x10	// off
+#define ARC1_LDO15_EN 0x20	// on
+#define ARC1_LDO16_EN 0x40	// on
+#define ARC1_LDO17_EN 0x80	// off
+
+// Reg Control 2 for App processor reg space : Enable/Disable LDOs
+#define ARC2_LDO18_EN 0x1	// on
+#define ARC2_LDO19_EN 0x2	// on
+#define ARC2_SIMCP_EN 0x40	// off
+
+// Reg Control 1 for Baseband reg space
+#define BRC1_BUCK_EN 0x1	// off
+#define BRC1_LDO1_EN 0x2	// off
+#define BRC1_LDO2_EN 0x4	// off
+#define BRC1_LDO3_EN 0x8	// BB
+#define BRC1_LDO4_EN 0x10	// off
+#define BRC1_LDO5_EN 0x20	// radio
+#define BRC1_LDO6_EN 0x40	// off
+#define BRC1_LDO7_EN 0x80	// off
+
+// Reg Control 2 for Baseband reg space
+#define BRC2_LDO8_EN 0x1	// off
+#define BRC2_LDO9_EN 0x2	// off
+#define BRC2_LDO10_EN 0x4	// sensor board
+#define BRC2_LDO11_EN 0x8	// sensor board
+#define BRC2_LDO12_EN 0x10	// BB_IO
+#define BRC2_LDO14_EN 0x20	// off
+#define BRC2_SIMCP_EN 0x40	// off
+#define BRC2_SLEEP 0x80	 	// off
+
+// Sleep control 1 for Baseband reg space
+#define BSC1_LDO1(_x)            (((_x) & 0x3) << 0)
+#define BSC1_LDO2(_x)            (((_x) & 0x3) << 2)
+#define BSC1_LDO3(_x)            (((_x) & 0x3) << 4)
+#define BSC1_LDO4(_x)            (((_x) & 0x3) << 6)
+
+// Sleep control 2 for Baseband reg space
+#define BSC2_LDO5(_x)            (((_x) & 0x3) << 0)
+#define BSC2_LDO7(_x)            (((_x) & 0x3) << 2)
+#define BSC2_LDO8(_x)            (((_x) & 0x3) << 4)
+#define BSC2_LDO9(_x)            (((_x) & 0x3) << 6)
+
+// Sleep control 3 for Baseband reg space
+#define BSC3_LDO12(_x)            (((_x) & 0x3) << 0)
+
+#endif //PMIC_H
diff --git a/tos/platforms/intelmote2/chips/pxa271/BlockStorageC.nc b/tos/platforms/intelmote2/chips/pxa271/BlockStorageC.nc
new file mode 100644
index 00000000..e2d21e5f
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/BlockStorageC.nc
@@ -0,0 +1,53 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the block storage abstraction for the pxa271
+ * embedded flash.
+ *
+ * @author Philip Buonadonna
+ * @version $Revision$ $Date$
+ */
+
+generic configuration BlockStorageC( volume_id_t volume_id ) {
+
+  provides interface BlockRead;
+  provides interface BlockWrite;
+}
+
+implementation {
+
+  enum {
+    BLOCK_ID = unique( "pxa271p30.Block" ),
+    VOLUME_ID = unique( "pxa27xp30.Volume" ),
+  };
+
+}
diff --git a/tos/platforms/intelmote2/chips/pxa271/Flash.nc b/tos/platforms/intelmote2/chips/pxa271/Flash.nc
new file mode 100644
index 00000000..f37915fb
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/Flash.nc
@@ -0,0 +1,32 @@
+/**
+ * Interface for writing and erasing in flash memory
+ *
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+
+interface Flash
+{
+  /**
+   * Writes numBytes of the buffer data to the address in flash specified
+   * by addr. This function will only set bits low for the bytes it is 
+   * supposed to write to.If addr connot be written to for any reason returns
+   * FAIL, otherwise returns SUCCESS.
+   *
+   * @returns SUCCESS or FAIL.
+   */
+  command error_t write(uint32_t addr, uint8_t* data, uint32_t numBytes);
+
+  /**
+   * Erases the block of flash that contains addr, setting all bits to 1.
+   * If this function fails for any reason it will return FAIL, otherwise 
+   * SUCCESS.
+   *
+   * @returns SUCCESS or FAIL.
+   */
+  command error_t erase(uint32_t addr);
+}
+
+
+
diff --git a/tos/platforms/intelmote2/chips/pxa271/FlashC.nc b/tos/platforms/intelmote2/chips/pxa271/FlashC.nc
new file mode 100644
index 00000000..c01c24bd
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/FlashC.nc
@@ -0,0 +1,17 @@
+/* 
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+
+configuration FlashC {
+  provides interface Flash;
+}
+implementation {
+  components 
+    Main,
+    FlashM;
+
+  Main.StdControl -> FlashM;
+  Flash = FlashM;
+}
diff --git a/tos/platforms/intelmote2/chips/pxa271/HalP30P.nc b/tos/platforms/intelmote2/chips/pxa271/HalP30P.nc
new file mode 100644
index 00000000..67e39e4a
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/HalP30P.nc
@@ -0,0 +1,235 @@
+/* 
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+module HalP30P {
+  provides interface Init;
+  provides interface Flash; //does not allow writing into FLASH_PROTECTED_REGION
+  uses interface HplP30;
+}
+implementation {
+  
+#include 
+#define FLASH_PARTITION_COUNT 16
+#define FLASH_PARTITION_SIZE 0x200000
+#define FLASH_PROTECTED_REGION 0x00200000
+#define FLASH_PROGRAM_BUFFER_SIZE 32
+  //#define FLASH_NOT_SUPPORTED 0x100
+  enum {
+    FLASH_STATE_READ_INACTIVE, 
+    FLASH_STATE_PROGRAM,
+    FLASH_STATE_ERASE,
+    FLASH_STATE_READ_ACTIVE
+  };
+
+  uint8_t FlashPartitionState[FLASH_PARTITION_COUNT];
+  uint8_t init = 0, programBufferSupported = 2, currBlock = 0;
+  
+  command error_t Init.init() {
+    int i = 0;
+    if(init != 0)
+      return SUCCESS;
+    init = 1;
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++) 
+      FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE;
+    
+    return SUCCESS;
+  }
+  
+  uint16_t writeHelper(uint32_t addr, uint8_t* data, uint32_t numBytes,
+		       uint8_t prebyte, uint8_t postbyte){
+    uint32_t i = 0, j = 0, k = 0;
+    error_t status;
+    uint16_t buffer[FLASH_PROGRAM_BUFFER_SIZE];
+    
+    if(numBytes == 0)
+      return FAIL;
+    
+    if(addr % 2 == 1){
+      status = call HplP30.progWord(addr - 1, prebyte | (data[i] << 8));
+      i++;
+      if(status != SUCCESS)
+	return FAIL;
+    }
+    
+    if(addr % 2 == numBytes % 2){
+      if(programBufferSupported == 1)
+	for(; i < numBytes; i = k){
+	  for(j = 0, k = i; k < numBytes && 
+		j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2)
+	    buffer[j] = data[k] | (data[k + 1] << 8);
+	  status = call HplP30.progBuffer(addr + i, buffer, j);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      else
+	for(; i < numBytes; i+=2){
+	  status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+    }
+    else{
+      if(programBufferSupported == 1)
+	for(; i < numBytes - 1; i = k){
+	  for(j = 0, k = i; k < numBytes - 1 && 
+		j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2)
+	    buffer[j] = data[k] | (data[k + 1] << 8);
+	  status = call HplP30.progBuffer(addr + i, buffer, j);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      else
+	for(; i < numBytes - 1; i+=2){
+	  status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      status = call HplP30.progWord(addr + i, data[i] | (postbyte << 8));
+      if(status != SUCCESS)
+	return FAIL;
+    }
+    return SUCCESS;
+  }
+  
+  void writeExitHelper(uint32_t addr, uint32_t numBytes){
+    uint32_t i = 0;
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE;
+  }
+  
+  command error_t Flash.write(uint32_t addr, uint8_t* data, uint32_t numBytes) {
+    uint32_t i;
+    uint16_t status;
+    uint8_t blocklen;
+    uint32_t blockAddr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE;
+    
+    if(addr + numBytes > 0x02000000) //not in the flash memory space
+      return FAIL;
+    if(addr < FLASH_PROTECTED_REGION)
+      return FAIL;
+    
+    
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++)
+      if(i != addr / FLASH_PARTITION_SIZE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE)
+	return FAIL;
+    
+    
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      if(FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE)
+	return FAIL;
+    
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      FlashPartitionState[i] = FLASH_STATE_PROGRAM;
+
+    atomic{
+      for(blocklen = 0, i = blockAddr;
+	  i < addr + numBytes;
+	  i += P30_BLOCK_SIZE, blocklen++)
+	call HplP30.blkUnlock(i); //unlock(i);
+      
+      if(programBufferSupported == 2){
+	uint16_t testBuf[1];
+	
+	if(addr % 2 == 0){
+	  testBuf[0] = data[0] | ((*((uint8_t *)(addr + 1))) << 8);
+	  status = call HplP30.progBuffer(addr, testBuf, 1);
+	}
+	else{
+	  testBuf[0] = *((uint8_t *)(addr - 1)) | (data[0] << 8);
+	  status = call HplP30.progBuffer(addr - 1, testBuf, 1);
+	}      
+	if(status != SUCCESS)
+	  programBufferSupported = 0;
+	else 
+	  programBufferSupported = 1;
+      }
+    }
+    if(blocklen == 1){
+      atomic status = writeHelper(addr,data,numBytes,0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+    }
+    else{
+      uint32_t bytesLeft = numBytes;
+      atomic status = writeHelper(addr,data, blockAddr + P30_BLOCK_SIZE - addr,0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+      bytesLeft = numBytes - (P30_BLOCK_SIZE - (addr - blockAddr));
+      for(i = 1; i < blocklen - 1; i++){
+	atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, (uint8_t *)(data + numBytes - bytesLeft),
+				    P30_BLOCK_SIZE,0xFF,0xFF);
+	bytesLeft -= P30_BLOCK_SIZE;
+	if(status == FAIL){
+	  writeExitHelper(addr, numBytes);
+	  return FAIL;
+	}
+      }
+      atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, data + (numBytes - bytesLeft), bytesLeft, 0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+    }
+    
+    writeExitHelper(addr, numBytes);
+    return SUCCESS;
+  }
+  
+  command error_t Flash.erase(uint32_t addr){
+    uint16_t status, i;
+    uint32_t j;
+    
+    if(addr > 0x02000000) //not in the flash memory space
+      return FAIL;
+    if(addr < FLASH_PROTECTED_REGION)
+      return FAIL;
+    
+    addr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE;
+    
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++)
+      if(i != addr / FLASH_PARTITION_SIZE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE)
+	return FAIL;
+    
+    if(FlashPartitionState[addr / FLASH_PARTITION_SIZE] != FLASH_STATE_READ_INACTIVE)
+      return FAIL;
+    
+    FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_ERASE;
+    
+    for(j = 0; j < P30_BLOCK_SIZE; j++){
+      uint32_t tempCheck = *(uint32_t *)(addr + j);
+      if(tempCheck != 0xFFFFFFFF)
+	break;
+      if(j == P30_BLOCK_SIZE - 1){
+	FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE;
+	return SUCCESS;
+      }
+    }
+    atomic{
+      call HplP30.blkUnlock(addr);
+      //      status = eraseFlash(addr);
+      status = call HplP30.blkErase(addr);
+    }
+    FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE;
+    if(status != SUCCESS)
+      return FAIL;
+    
+    return SUCCESS;
+  }
+  
+}
diff --git a/tos/platforms/intelmote2/chips/pxa271/HplP30.nc b/tos/platforms/intelmote2/chips/pxa271/HplP30.nc
new file mode 100644
index 00000000..9bf20ef3
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/HplP30.nc
@@ -0,0 +1,43 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Phil Buonadonna
+ */
+
+interface HplP30 {
+
+  async command error_t progWord(uint32_t addr, uint16_t word);
+  async command error_t progBuffer(uint32_t addr, uint16_t *data, uint8_t len);
+  async command error_t blkErase(uint32_t blkaddr);
+  async command error_t blkLock(uint32_t blkaddr);
+  async command error_t blkUnlock(uint32_t blkaddr);
+
+}
diff --git a/tos/platforms/intelmote2/chips/pxa271/HplP30P.nc b/tos/platforms/intelmote2/chips/pxa271/HplP30P.nc
new file mode 100644
index 00000000..b9f49a9a
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/pxa271/HplP30P.nc
@@ -0,0 +1,166 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Phil Buonadonna
+ *
+ */
+#include 
+module HplP30P {
+  provides interface HplP30;
+}
+
+implementation {
+
+  volatile uint16_t * devBaseAddress = (uint16_t *)(0x0);
+
+  async command error_t HplP30.progWord(uint32_t addr, uint16_t word) {
+    volatile uint16_t *blkAddress = (uint16_t *)addr;
+    uint32_t result;
+
+    *devBaseAddress = P30_READ_CLRSTATUS;
+    *blkAddress = P30_WRITE_WORDPRGSETUP;
+    *blkAddress = word;
+
+    do {
+      result = *blkAddress;
+    } while ((result & P30_SR_DWS) == 0);
+
+    *blkAddress = P30_READ_READARRAY;
+
+    if (result & (P30_SR_PS | P30_SR_VPPS | P30_SR_BLS)) {
+      return FAIL;
+    }
+
+    return SUCCESS;
+
+  }
+
+  async command error_t HplP30.progBuffer(uint32_t addr, uint16_t *data, uint8_t len) {
+    volatile uint16_t *blkAddress = (uint16_t *)addr;
+    uint32_t i,result;
+    error_t error = SUCCESS;
+
+    if (len <= 0) {
+      error = EINVAL;
+      goto done;
+    }
+
+    *devBaseAddress = P30_READ_CLRSTATUS;
+    *blkAddress = P30_WRITE_BUFPRG;
+
+    result = *blkAddress;
+    if ((result & P30_SR_DWS) == 0) {
+      error = FAIL;
+      goto cleanup;
+    }
+
+    *blkAddress = len-1;
+    
+    for (i=0;itext
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+  .data           : AT (ADDR(.text) + SIZEOF(.text))
+  {
+    __data_start = . ;
+    *(.data .data.* .gnu.linkonce.d.*)
+    *(.gnu.linkonce.d*)
+    _edata = .;
+    PROVIDE (edata = .);
+  } > data
+  .bss SIZEOF(.data) + ADDR(.data) :
+  {
+    __bss_start = .;
+    __bss_start__ = .;
+   *(.dynbss)
+   *(.bss .bss.* .gnu.linkonce.b.*)
+   *(COMMON)
+    _end = .;
+    _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
+    PROVIDE (end = .);
+  } >data
+   __data_load_start = LOADADDR(.data);
+   __data_load_end = __data_load_start + SIZEOF(.data);
+  /* Stabs debugging sections.  */
+  .stab          0 : { *(.stab) }
+  .stabstr       0 : { *(.stabstr) }
+  .stab.excl     0 : { *(.stab.excl) }
+  .stab.exclstr  0 : { *(.stab.exclstr) }
+  .stab.index    0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment       0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+    .stack         0x80000 :
+  {
+    _stack = .;
+    *(.stack)
+  }
+  /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/tos/platforms/intelmote2/toscrt0.s b/tos/platforms/intelmote2/toscrt0.s
new file mode 100644
index 00000000..0f7810f7
--- /dev/null
+++ b/tos/platforms/intelmote2/toscrt0.s
@@ -0,0 +1,264 @@
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors: Phil Buonadonna,David Gay
+ * Date last modified:  $Revision$
+ *
+ */
+			
+	.equ	ARM_CPSR_MODE_MASK,(0x0000001F)
+	.equ	ARM_CPSR_INT_MASK,(0x000000C0)
+	.equ	ARM_CPSR_COND_MASK,(0xF8000000)
+	
+	.equ	ARM_CPSR_MODE_USR,(0x10)
+	.equ	ARM_CPSR_MODE_FIQ,(0x11)
+	.equ	ARM_CPSR_MODE_IRQ,(0x12)
+	.equ	ARM_CPSR_MODE_SVC,(0x13)
+	.equ	ARM_CPSR_MODE_ABT,(0x17)
+	.equ	ARM_CPSR_MODE_UND,(0x1B)
+	.equ	ARM_CPSR_MODE_SYS,(0x1F)
+
+	.equ	ARM_CPSR_BIT_N,(0x80000000)
+	.equ	ARM_CPSR_BIT_Z,(0x40000000)
+	.equ	ARM_CPSR_BIT_C,(0x20000000)
+	.equ	ARM_CPSR_BIT_V,(0x10000000)
+	.equ	ARM_CPSR_BIT_Q,(0x08000000)
+	
+	.equ	ARM_CPSR_BIT_I,(0x00000080)
+	.equ	ARM_CPSR_BIT_F,(0x00000040)
+	.equ	ARM_CPRS_BIT_T,(0x00000020)
+
+	.equ   _TOS_STACK_SIZE,(0x400)		@ TinyOS Exception stack sizes
+	.equ   _TOS_ISRAM_PHYSBASE,(0x5C000000)	@ Internal SRAM on PXA27X
+	.text
+	
+.globl start
+start:
+	mrs	r0, CPSR
+	bic	r0, r0, #ARM_CPSR_MODE_MASK
+	orr	r0, r0, #(ARM_CPSR_MODE_SVC | ARM_CPSR_INT_MASK)
+	msr	cpsr_cf, r0
+	
+	/* Initialize the stack pointers for all modes */
+	mov	r0,#_TOS_ISRAM_PHYSBASE
+	ldr	r2, =(256*1024 - 4)		@ and go to the last slot (256K - 4)
+	add	r2,r2,r0
+	
+	mov	r0, #ARM_CPSR_MODE_ABT			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+
+	mov	r0, #ARM_CPSR_MODE_UND	
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+	
+	mov	r0, #ARM_CPSR_MODE_FIQ			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+
+	mov	r0, #ARM_CPSR_MODE_IRQ			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #(_TOS_STACK_SIZE * 2)
+	
+	mov	r0, #ARM_CPSR_MODE_SVC			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	
+		
+	/* copy data */
+	ldr	r0, =__data_load_start
+	ldr	r1, =__data_load_end
+	ldr	r2, =__data_start
+.Lcopy:	
+	cmp	r0, r1
+	beq	.Lcopydone
+	ldrb	r3, [r0], #1
+	strb	r3, [r2], #1
+	b	.Lcopy
+.Lcopydone:
+	/* clear bss */
+	ldr	r0, =__bss_start__
+	ldr	r1, =__bss_end__
+	mov	r2, #0
+.Lclear:	
+	cmp	r0, r1
+	beq	.Lcleardone
+	strb	r2, [r0], #1
+	b	.Lclear
+.Lcleardone:	
+	mov	r0, #0 /* argc? */
+	mov	r1, #0 /* argv? */
+	bl	main
+
+.L1:	
+	nop
+	b	.L1
+
+@if we receive and interrupt that we don't handle, behavior will depend on whether we're in release or not
+.ifdef RELEASE 
+@reboot...assumes that we started out in supervisor mode..and that we'll be returning  
+hplarmv_undef:
+	movs PC, #0
+hplarmv_swi:
+	movs PC, #0
+hplarmv_pabort:
+	movs PC, #0
+hplarmv_dabort:
+	movs PC, #0
+hplarmv_reserved:
+	movs PC, #0
+hplarmv_irq:
+	movs PC, #0
+hplarmv_fiq:	
+	movs PC, #0
+.else
+@infinite loop so that we can detect what happened with a debugger
+@in future, we'll want to blink specific LED patter or something for the USER...or perhaps blue light of death
+hplarmv_undef:
+	b hplarmv_undef	
+hplarmv_swi:
+	b hplarmv_swi
+hplarmv_pabort:
+	b hplarmv_pabort
+hplarmv_dabort:
+	b hplarmv_dabort
+hplarmv_reserved:
+	b hplarmv_reserved	
+hplarmv_irq:
+	b hplarmv_irq	
+hplarmv_fiq:	
+	b hplarmv_fiq
+.endif
+
+reset_handler_start:
+@ reset handler should first check whether this is a debug exception
+@ or a real RESET event.
+@ NOTE: r13 is only safe register to use.
+@ - For RESET, donÂ’t really care about which register is used
+@ - For debug exception, r13=DBG_r13, prevents application registers
+@ - from being corrupted, before debug handler can save.
+	mrs r13, cpsr
+	and r13, r13, #0x1f
+	cmp r13, #0x15			@ are we in DBG mode?
+	beq dbg_handler_stub		@ if so, go to the dbg handler stub
+	mov r13, #0x8000001c		@ otherwise, enable debug, set MOE bits
+	mcr p14, 0, r13, c10, c0, 0	@ and continue with the reset handler
+@ normal reset handler initialization follows code here,
+@ or branch to the reset handler.	
+	b	start
+
+.align 5 @ align code to a cache line boundary.
+dbg_handler_stub:
+@ First save the state of the IC enable/disable bit in DBG_LR[0].
+	mrc p15, 0, r13, c1, c0, 0
+	and r13, r13, #0x1000
+	orr r14, r14, r13, lsr #12
+@ Next, enable the IC.
+	mrc p15, 0, r13, c1, c0, 0
+	orr r13, r13, #0x1000
+	mcr p15, 0, r13, c1, c0, 0
+@ do a sync operation to ensure all outstanding instr fetches have
+@ completed before continuing. The invalidate cache line function
+@ serves as a synchronization operation, thatÂ’s why it is used
+@ here. The target line is some scratch address in memory.
+	adr r13, line2
+	mcr p15, 0, r13, c7, c5, 1
+@ invalidate BTB. make sure downloaded vector table does not hit one of
+@ the applicationÂ’s branches cached in the BTB, branch to the wrong place
+	mcr p15, 0, r13, c7, c5, 6
+@ Now, send ‘ready for download’ message to debugger, indicating debugger
+@ can begin the download. ‘ready for download’ = 0x00B00000.
+TXloop:
+	mrc p14, 0, r15, c14, c0, 0	@ first make sure TX reg. is available
+	bvs TXloop
+	mov r13, #0x00B00000
+	mcr p14, 0, r13, c8, c0, 0	@ now write to TX
+@ Wait for debugger to indicate that the download is complete.
+	RXloop:
+	mrc p14, 0, r15, c14, c0, 0	@ spin in loop waiting for data from the
+	bpl RXloop			@ debugger in RX.
+@ before reading the RX register to get the address to branch to, restore
+@ the state of the IC (saved in DBG_r14[0]) to the value it have at the
+@ start of the debug handler stub. Also, note it must be restored before	
+@ reading the RX register because of limited scratch registers (r13)
+	mrc p15, 0, r13, c1, c0, 0
+@ First, check DBG_LR[0] to see if the IC was enabled or disabled
+	tst r14, #0x1
+@ Then, if it was previously disabled, then disable it now, otherwise,
+@ thereÂ’s no need to change the state, because its already enabled.
+	biceq r13, r13, #0x1000
+	mcr p15, 0, r13, c1, c0, 0
+@ Restore the link register value
+	bic r14, r14, #0x1
+@ Now r13 can be used to read RX and get the target address to branch to.
+	mrc p14, 0, r13, c9, c0, 0	@ Read RX and
+	mov pc, r13			@ branch to downloaded address.
+@ scratch memory space used by the invalidate IC line function above.
+.align 5 @ make sure it starts at a cache line
+@ boundary, so nothing else is affected
+line2:
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0	
+	
+	.weak hplarmv_undef, hplarmv_swi, hplarmv_pabort, hplarmv_dabort, hplarmv_reserved, hplarmv_irq, hplarmv_fiq
+
+	.section	.vectors
+	b	reset_handler_start
+	b	hplarmv_undef
+	b	hplarmv_swi
+	b	hplarmv_pabort
+	b	hplarmv_dabort
+	b	hplarmv_reserved
+	b	hplarmv_irq
+	b	hplarmv_fiq
+
+.end
+	
+
+	
\ No newline at end of file
diff --git a/tos/platforms/mica/Alarm32khz32C.nc b/tos/platforms/mica/Alarm32khz32C.nc
new file mode 100644
index 00000000..6f58eaba
--- /dev/null
+++ b/tos/platforms/mica/Alarm32khz32C.nc
@@ -0,0 +1,39 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica
+ * family 32kHz Alarm is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ * 
    
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). Note that creating one of these Alarms consumes a 16-bit
+ * 32kHz Alarm (see Alarm32khz16C).
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+generic configuration Alarm32khz32C()
+{
+  provides interface Alarm;
+}
+implementation
+{
+  components new AlarmOne16C() as Alarm16, Counter32khz32C as Counter32,
+    new TransformAlarmC(T32khz, uint32_t, TOne, uint16_t,
+			MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) as Transform32;
+
+  Alarm = Transform32;
+  Transform32.AlarmFrom -> Alarm16;
+  Transform32.Counter -> Counter32;
+}
diff --git a/tos/platforms/mica/AlarmCounterMilliP.nc b/tos/platforms/mica/AlarmCounterMilliP.nc
new file mode 100644
index 00000000..2714aade
--- /dev/null
+++ b/tos/platforms/mica/AlarmCounterMilliP.nc
@@ -0,0 +1,52 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Configure hardware timer 0 for use as the mica family's millisecond
+ * timer.  This component does not follow the TEP102 HAL guidelines as
+ * there is only one compare register for timer 0, which is used to
+ * implement HilTimerMilliC. Hence it isn't useful to expose an
+ * AlarmMilliC or CounterMillIC component.
+ * 
+ * @author David Gay 
+ * @author Martin Turon 
+ */
+
+configuration AlarmCounterMilliP
+{
+  provides interface Init;
+  provides interface Alarm as AlarmMilli32;
+  provides interface Counter as CounterMilli32;
+}
+implementation
+{
+  components HplAtm128Timer0AsyncC as Timer0, PlatformC,
+    new Atm128TimerInitC(uint8_t, ATM128_CLK8_DIVIDE_32) as MilliInit,
+    new Atm128AlarmC(TMilli, uint8_t, 2) as MilliAlarm,
+    new Atm128CounterC(TMilli, uint8_t) as MilliCounter, 
+    new TransformAlarmCounterC(TMilli, uint32_t, TMilli, uint8_t, 0, uint32_t)
+      as Transform32;
+
+  // Top-level interface wiring
+  AlarmMilli32 = Transform32;
+  CounterMilli32 = Transform32;
+
+  // Strap in low-level hardware timer (Timer0Async)
+  Init = MilliInit;
+  MilliInit.Timer -> Timer0.Timer;
+  MilliAlarm.HplAtm128Timer -> Timer0.Timer;
+  MilliAlarm.HplAtm128Compare -> Timer0.Compare;
+  MilliCounter.Timer -> Timer0.Timer;
+  PlatformC.SubInit -> Timer0;
+
+  // Alarm Transform Wiring
+  Transform32.AlarmFrom -> MilliAlarm;
+  Transform32.CounterFrom -> MilliCounter;
+}
diff --git a/tos/platforms/mica/AlarmMicro32C.nc b/tos/platforms/mica/AlarmMicro32C.nc
new file mode 100644
index 00000000..45e827dd
--- /dev/null
+++ b/tos/platforms/mica/AlarmMicro32C.nc
@@ -0,0 +1,41 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit microsecond Alarm component as per TEP102 HAL guidelines. The
+ * mica family microsecond Alarm is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency, or the 
+ * MeasureClockC.calibrateMicro() command to convert a number of microseconds
+ * to the near-microsecond units used by this component.
+ * 
    
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). Note that creating one of these Alarms consumes a 16-bit
+ * microsecond Alarm (see AlarmMicro16C).
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+generic configuration AlarmMicro32C()
+{
+  provides interface Alarm;
+}
+implementation
+{
+  components new AlarmThree16C() as Alarm16, CounterMicro32C as Counter32,
+    new TransformAlarmC(TMicro, uint32_t, TThree, uint16_t,
+			MICA_DIVIDE_THREE_FOR_MICRO_LOG2) as Transform32;
+
+  Alarm = Transform32;
+  Transform32.AlarmFrom -> Alarm16;
+  Transform32.Counter -> Counter32;
+}
diff --git a/tos/platforms/mica/AlarmOne16C.nc b/tos/platforms/mica/AlarmOne16C.nc
new file mode 100644
index 00000000..50cf9321
--- /dev/null
+++ b/tos/platforms/mica/AlarmOne16C.nc
@@ -0,0 +1,45 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica
+ * family 32kHz Alarm is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ * 
    
+ * Assumes an ~8MHz CPU clock, replace this component if you are running at
+ * a radically different frequency.
+ * 
    
+ * Upto three of these alarms can be created (one per hardware compare
+ * register).
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+generic configuration AlarmOne16C()
+{
+  provides interface Alarm;
+}
+implementation
+{
+  components HplAtm128Timer1C as HWTimer, InitOneP,
+    new Atm128AlarmC(TOne, uint16_t, 3) as NAlarm;
+  
+  enum {
+    COMPARE_ID = unique(UQ_TIMER1_COMPARE)
+  };
+
+  Alarm = NAlarm;
+
+  NAlarm.HplAtm128Timer -> HWTimer.Timer;
+  NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID];
+}
diff --git a/tos/platforms/mica/AlarmThree16C.nc b/tos/platforms/mica/AlarmThree16C.nc
new file mode 100644
index 00000000..bd085974
--- /dev/null
+++ b/tos/platforms/mica/AlarmThree16C.nc
@@ -0,0 +1,47 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit microsecond Alarm component as per TEP102 HAL guidelines. The
+ * mica family microsecond Alarm is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency, or the 
+ * MeasureClockC.calibrateMicro() command to convert a number of microseconds
+ * to the near-microsecond units used by this component.
+ * 
    
+ * Assumes an ~8MHz CPU clock, replace this component if you are running at
+ * a radically different frequency.
+ * 
    
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). 
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+generic configuration AlarmThree16C()
+{
+  provides interface Alarm;
+}
+implementation
+{
+  components HplAtm128Timer3C as HWTimer, InitThreeP,
+    new Atm128AlarmC(TThree, uint16_t, 100) as NAlarm;
+  
+  enum {
+    COMPARE_ID = unique(UQ_TIMER3_COMPARE)
+  };
+
+  Alarm = NAlarm;
+
+  NAlarm.HplAtm128Timer -> HWTimer.Timer;
+  NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID];
+}
diff --git a/tos/platforms/mica/BusyWaitMicroC.nc b/tos/platforms/mica/BusyWaitMicroC.nc
new file mode 100644
index 00000000..654c5b4e
--- /dev/null
+++ b/tos/platforms/mica/BusyWaitMicroC.nc
@@ -0,0 +1,80 @@
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Busy wait component as per TEP102. Supports waiting for at least some
+ * number of microseconds. This functionality should be used sparingly,
+ * when the overhead of posting a Timer or Alarm is greater than simply
+ * busy waiting.
+ *
+ * @author David Gay
+ */
+
+module BusyWaitMicroC
+{
+  provides interface BusyWait;
+}
+implementation
+{
+  inline async command void BusyWait.wait(uint16_t dt) {
+  /* In most cases (constant arg), the test is elided at compile-time */
+  if (dt)
+#if MHZ == 1
+    {
+      dt = (dt + 3) >> 2;
+    /* loop takes 4 cycles. */
+      asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+    }
+#elif MHZ == 2
+    {
+      dt = (dt + 1) >> 1;
+    /* loop takes 4 cycles. */
+      asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+    }
+#elif MHZ == 4
+    /* loop takes 4 cycles. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+#elif MHZ == 8
+    /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz
+       clock, and 1.09uS if running on the external crystal. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	adiw	%0,1\n"
+"	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+#else
+#error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8."
+#endif
+  }
+}
diff --git a/tos/platforms/mica/Counter32khz32C.nc b/tos/platforms/mica/Counter32khz32C.nc
new file mode 100644
index 00000000..e32f6c36
--- /dev/null
+++ b/tos/platforms/mica/Counter32khz32C.nc
@@ -0,0 +1,35 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica
+ * family 32kHz clock is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+configuration Counter32khz32C
+{
+  provides interface Counter;
+}
+implementation
+{
+  components CounterOne16C as Counter16, 
+    new TransformCounterC(T32khz, uint32_t, T32khz, uint16_t,
+			  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2,
+			  counter_one_overflow_t) as Transform32;
+
+  Counter = Transform32;
+  Transform32.CounterFrom -> Counter16;
+}
diff --git a/tos/platforms/mica/CounterMicro32C.nc b/tos/platforms/mica/CounterMicro32C.nc
new file mode 100644
index 00000000..ce35dc70
--- /dev/null
+++ b/tos/platforms/mica/CounterMicro32C.nc
@@ -0,0 +1,35 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit microsecond Counter component as per TEP102 HAL guidelines. The
+ * mica family microsecond clock is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+configuration CounterMicro32C
+{
+  provides interface Counter;
+}
+implementation
+{
+  components CounterThree16C as Counter16, 
+    new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t,
+			  MICA_DIVIDE_THREE_FOR_MICRO_LOG2,
+			  counter_three_overflow_t) as Transform32;
+
+  Counter = Transform32;
+  Transform32.CounterFrom -> Counter16;
+}
diff --git a/tos/platforms/mica/CounterOne16C.nc b/tos/platforms/mica/CounterOne16C.nc
new file mode 100644
index 00000000..c043b96a
--- /dev/null
+++ b/tos/platforms/mica/CounterOne16C.nc
@@ -0,0 +1,33 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica
+ * family 32kHz clock is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+configuration CounterOne16C
+{
+  provides interface Counter;
+}
+implementation
+{
+  components HplAtm128Timer1C as HWTimer, InitOneP,
+    new Atm128CounterC(TOne, uint16_t) as NCounter;
+  
+  Counter = NCounter;
+  NCounter.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/CounterThree16C.nc b/tos/platforms/mica/CounterThree16C.nc
new file mode 100644
index 00000000..00592e99
--- /dev/null
+++ b/tos/platforms/mica/CounterThree16C.nc
@@ -0,0 +1,33 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit microsecond Counter component as per TEP102 HAL guidelines. The
+ * mica family microsecond clock is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay 
+ */
+
+#include 
+
+configuration CounterThree16C
+{
+  provides interface Counter;
+}
+implementation
+{
+  components HplAtm128Timer3C as HWTimer, InitThreeP,
+    new Atm128CounterC(TThree, uint16_t) as NCounter;
+  
+  Counter = NCounter;
+  NCounter.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/HilTimerMilliC.nc b/tos/platforms/mica/HilTimerMilliC.nc
new file mode 100644
index 00000000..9e8ce0f8
--- /dev/null
+++ b/tos/platforms/mica/HilTimerMilliC.nc
@@ -0,0 +1,58 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Millisecond timer for the mica family (see TEP102). The "millisecond"
+ * timer system is built on hardware timer 0, running at 1024Hz.
+ *
+ * @author Cory Sharp 
+ * @author Martin Turon 
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC {
+  provides interface Init;
+  provides interface Timer as TimerMilli[uint8_t num];
+  provides interface LocalTime;
+}
+implementation {
+
+  enum {
+    TIMER_COUNT = uniqueCount(UQ_TIMER_MILLI)
+  };
+
+  components AlarmCounterMilliP, new AlarmToTimerC(TMilli),
+    new VirtualizeTimerC(TMilli, TIMER_COUNT),
+    new CounterToLocalTimeC(TMilli);
+
+  Init = AlarmCounterMilliP;
+
+  TimerMilli = VirtualizeTimerC;
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmCounterMilliP;
+
+  LocalTime = CounterToLocalTimeC;
+  CounterToLocalTimeC.Counter -> AlarmCounterMilliP;
+}
+
+
diff --git a/tos/platforms/mica/InitOneP.nc b/tos/platforms/mica/InitOneP.nc
new file mode 100644
index 00000000..16f687ac
--- /dev/null
+++ b/tos/platforms/mica/InitOneP.nc
@@ -0,0 +1,28 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal mica-family timer component. Sets up hardware timer 1 to run
+ * at cpu clock / 256, at boot time. Assumes an ~8MHz CPU clock, replace
+ * this component if you are running at a radically different frequency.
+ *
+ * @author David Gay
+ */
+
+#include 
+
+configuration InitOneP { }
+implementation {
+  components PlatformC, HplAtm128Timer1C as HWTimer,
+    new Atm128TimerInitC(uint16_t, MICA_PRESCALER_ONE) as InitOne;
+
+  PlatformC.SubInit -> InitOne;
+  InitOne.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/InitThreeP.nc b/tos/platforms/mica/InitThreeP.nc
new file mode 100644
index 00000000..ed7d7423
--- /dev/null
+++ b/tos/platforms/mica/InitThreeP.nc
@@ -0,0 +1,28 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal mica-family timer component. Sets up hardware timer 3 to run
+ * at cpu clock / 8, at boot time. Assumes an ~8MHz CPU clock, replace
+ * this component if you are running at a radically different frequency.
+ *
+ * @author David Gay
+ */
+
+#include 
+
+configuration InitThreeP { }
+implementation {
+  components PlatformC, HplAtm128Timer3C as HWTimer,
+    new Atm128TimerInitC(uint16_t, MICA_PRESCALER_THREE) as InitThree;
+
+  PlatformC.SubInit -> InitThree;
+  InitThree.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/MeasureClockC.nc b/tos/platforms/mica/MeasureClockC.nc
new file mode 100644
index 00000000..898d8018
--- /dev/null
+++ b/tos/platforms/mica/MeasureClockC.nc
@@ -0,0 +1,124 @@
+// $Id$
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include 
+#include 
+
+/**
+ * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate
+ * interface so that other components can adjust their calibration as
+ * needed.
+ *
+ * @author David Gay
+ */
+
+module MeasureClockC {
+  provides {
+    /**
+     * This code MUST be called from PlatformP only, hence the exactlyonce.
+     */
+    interface Init @exactlyonce();
+    interface Atm128Calibrate;
+  }
+}
+implementation 
+{
+  enum {
+    /* This is expected number of cycles per jiffy at the platform's
+       specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */
+    MAGIC = 488 / (16 / PLATFORM_MHZ)
+  };
+
+  uint16_t cycles;
+
+  command error_t Init.init() {
+    /* Measure clock cycles per Jiffy (1/32768s) */
+    /* This code doesn't use the HPL to avoid timing issues when compiling
+       with debugging on */
+    atomic
+      {
+	uint8_t now, wraps;
+	uint16_t start;
+
+	/* Setup timer0 to count 32 jiffies, and timer1 cpu cycles */
+	TCCR1B = 1 << CS10;
+	ASSR = 1 << AS0;
+	TCCR0 = 1 << CS01 | 1 << CS00;
+
+	/* Wait for 1s for counter to stablilize after power-up (yes, it
+	   really does take that long). That's 122 wrap arounds of timer 1
+	   at 8MHz. */
+	start = TCNT1;
+	for (wraps = MAGIC / 2; wraps; )
+	  {
+	    uint16_t next = TCNT1;
+
+	    if (next < start)
+	      wraps--;
+	    start = next;
+	  }
+
+	/* Wait for a TCNT0 change */
+	now = TCNT0;
+	while (TCNT0 == now) ;
+
+	/* Read cpu cycles and wait for next TCNT0 change */
+	start = TCNT1;
+	now = TCNT0;
+	while (TCNT0 == now) ;
+	cycles = TCNT1;
+
+	cycles = (cycles - start + 16) >> 5;
+
+	/* Reset to boot state */
+	ASSR = TCCR1B = TCCR0 = 0;
+	TCNT0 = 0;
+	TCNT1 = 0;
+	ETIFR = TIFR = 0xff;
+	while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
+	  ;
+      }
+    return SUCCESS;
+  }
+
+  async command uint16_t Atm128Calibrate.cyclesPerJiffy() {
+    return cycles;
+  }
+
+  async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) {
+    return scale32(n + MAGIC / 2, cycles, MAGIC);
+  }
+
+  async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) {
+    return scale32(n + (cycles >> 1), MAGIC, cycles);
+  }
+
+  async command uint8_t Atm128Calibrate.adcPrescaler() {
+    /* This is also log2(cycles/3.05). But that's a pain to compute */
+    if (cycles >= 390)
+      return ATM128_ADC_PRESCALE_128;
+    if (cycles >= 195)
+      return ATM128_ADC_PRESCALE_64;
+    if (cycles >= 97)
+      return ATM128_ADC_PRESCALE_32;
+    if (cycles >= 48)
+      return ATM128_ADC_PRESCALE_16;
+    if (cycles >= 24)
+      return ATM128_ADC_PRESCALE_8;
+    if (cycles >= 12)
+      return ATM128_ADC_PRESCALE_4;
+    return ATM128_ADC_PRESCALE_2;
+  }
+
+  async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) {
+    // value is (cycles*32768) / (8*baudrate) - 1
+    return ((uint32_t)cycles << 12) / baudrate - 1;
+  }
+}
diff --git a/tos/platforms/mica/MicaBusAdc.nc b/tos/platforms/mica/MicaBusAdc.nc
new file mode 100644
index 00000000..1acb1b18
--- /dev/null
+++ b/tos/platforms/mica/MicaBusAdc.nc
@@ -0,0 +1,21 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A simplistic beginning to providing a standard interface to the mica-family
+ * 51-pin bus. Just provides the PW0-PW7 digital I/O pins.
+ */
+
+interface MicaBusAdc {
+  /**
+   * Return the A/D channel number to use for one of the ADCn pins.
+   */
+  async command uint8_t getChannel();
+}
diff --git a/tos/platforms/mica/MicaBusC.nc b/tos/platforms/mica/MicaBusC.nc
new file mode 100644
index 00000000..0c9d82a1
--- /dev/null
+++ b/tos/platforms/mica/MicaBusC.nc
@@ -0,0 +1,60 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A simplistic beginning to providing a standard interface to the mica-family
+ * 51-pin bus. Just provides the PW0-PW7 digital I/O pins and returns the
+ * ADC channel number for the ADC pins.
+ * @author David Gay
+ */
+
+configuration MicaBusC {
+  provides {
+    interface GeneralIO as PW0;
+    interface GeneralIO as PW1;
+    interface GeneralIO as PW2;
+    interface GeneralIO as PW3;
+    interface GeneralIO as PW4;
+    interface GeneralIO as PW5;
+    interface GeneralIO as PW6;
+    interface GeneralIO as PW7;
+
+    /* Separate interfaces to allow inlining to occur */
+    interface MicaBusAdc as Adc0;
+    interface MicaBusAdc as Adc1;
+    interface MicaBusAdc as Adc2;
+    interface MicaBusAdc as Adc3;
+    interface MicaBusAdc as Adc4;
+    interface MicaBusAdc as Adc5;
+    interface MicaBusAdc as Adc6;
+    interface MicaBusAdc as Adc7;
+  }
+}
+implementation {
+  components HplAtm128GeneralIOC as Pins, MicaBusP;
+
+  PW0 = Pins.PortC0;
+  PW1 = Pins.PortC1;
+  PW2 = Pins.PortC2;
+  PW3 = Pins.PortC3;
+  PW4 = Pins.PortC4;
+  PW5 = Pins.PortC5;
+  PW6 = Pins.PortC6;
+  PW7 = Pins.PortC7;
+
+  Adc0 = MicaBusP.Adc0;
+  Adc1 = MicaBusP.Adc1;
+  Adc2 = MicaBusP.Adc2;
+  Adc3 = MicaBusP.Adc3;
+  Adc4 = MicaBusP.Adc4;
+  Adc5 = MicaBusP.Adc5;
+  Adc6 = MicaBusP.Adc6;
+  Adc7 = MicaBusP.Adc7;
+}
diff --git a/tos/platforms/mica/MicaBusP.nc b/tos/platforms/mica/MicaBusP.nc
new file mode 100644
index 00000000..a35c1a2c
--- /dev/null
+++ b/tos/platforms/mica/MicaBusP.nc
@@ -0,0 +1,37 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component of the simplistic mica bus interface.
+ * @author David Gay
+ */
+
+module MicaBusP {
+  provides {
+    interface MicaBusAdc as Adc0;
+    interface MicaBusAdc as Adc1;
+    interface MicaBusAdc as Adc2;
+    interface MicaBusAdc as Adc3;
+    interface MicaBusAdc as Adc4;
+    interface MicaBusAdc as Adc5;
+    interface MicaBusAdc as Adc6;
+    interface MicaBusAdc as Adc7;
+  }
+}
+implementation {
+  async command uint8_t Adc0.getChannel() { return 0; }
+  async command uint8_t Adc1.getChannel() { return 1; }
+  async command uint8_t Adc2.getChannel() { return 2; }
+  async command uint8_t Adc3.getChannel() { return 3; }
+  async command uint8_t Adc4.getChannel() { return 4; }
+  async command uint8_t Adc5.getChannel() { return 5; }
+  async command uint8_t Adc6.getChannel() { return 6; }
+  async command uint8_t Adc7.getChannel() { return 7; }
+}
diff --git a/tos/platforms/mica/MicaTimer.h b/tos/platforms/mica/MicaTimer.h
new file mode 100644
index 00000000..63a6a164
--- /dev/null
+++ b/tos/platforms/mica/MicaTimer.h
@@ -0,0 +1,117 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef MICATIMER_H
+#define MICATIMER_H
+
+/* This file defines the rates at which the mica family's atmega128 timer 1
+   and 3 timers run at. The goal is to present the user with microsend and
+   32khz timers, but it may not be possible to run the timers at these rates
+   (because of the limited prescaler selection).
+
+   So TinyOS picks a prescaler (based on the selected processor MHz) for
+   each of these timers, and builds corresponding 16-bit alarms&counters
+   (AlarmOne16C, AlarmThree16C, CounterOne16C, CounterThree16C) over
+   hardware timers 1 and 3. TinyOS then divides these hardware timers by
+   the appropriate power of 2 to get approximate 32-bit 32kHz and 1MHz
+   alarms and counters (Alarm32khz32C, AlarmMicro32C, Counter32khz32C,
+   CounterMicro32C).
+
+   The constants and typedefs for all this configuration are defined here,
+   based on the value of the MHZ preprocessor symbol, which shoud approximate
+   the platform's MHZ rate.
+
+   Note that the timers thus obtained will not be exactly at 32768Hz or
+   1MHz, because the clock doesn't divide by a power of two to those frequencies,
+   and/or the clock frequency is not accurate. If you need more accurate timing,
+   you should use the calibration functions offered by the Atm128Calibrate interface
+   provided by PlatformC.
+*/
+
+#include 
+#include 
+
+/* Some types for the non-standard rates that mica timers might be running
+   at.
+ */
+typedef struct { } T64khz;
+typedef struct { } T128khz;
+typedef struct { } T2mhz;
+typedef struct { } T4mhz;
+
+/* TX is the typedef for the rate of timer X, 
+   MICA_PRESCALER_X is the prescaler for timer X,
+   MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by
+     to get rate Y,
+   counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0,
+     uint32_t otherwise.
+*/
+
+#if MHZ == 1
+typedef T128khz TOne;
+typedef TMicro TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 2,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0
+};
+
+#elif MHZ == 2
+typedef T32khz TOne;
+typedef T2mhz TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 1
+};
+
+#elif MHZ == 4
+typedef T64khz TOne;
+typedef T4mhz TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 1,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 2
+};
+
+#elif MHZ == 8
+typedef T32khz TOne;
+typedef TMicro TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_256,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0
+};
+
+#else
+#error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8."
+#endif
+
+enum {
+  PLATFORM_MHZ = MHZ
+};
+
+#endif
diff --git a/tos/platforms/mica/PlatformC.nc b/tos/platforms/mica/PlatformC.nc
new file mode 100644
index 00000000..d75de59a
--- /dev/null
+++ b/tos/platforms/mica/PlatformC.nc
@@ -0,0 +1,55 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Initialisation component for mica-family platforms. See TEP107. Each 
+ * mica-family member must also provide a MotePlatformC with initialisation
+ * specific to that member.
+ *
+ * @author Martin Turon 
+ */
+
+#include "hardware.h"
+
+configuration PlatformC {
+  provides {
+    interface Init;
+    /**
+     * Provides calibration information for other components.
+     */
+    interface Atm128Calibrate;
+  }
+  uses interface Init as SubInit;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MeasureClockC;
+  
+  Init = PlatformP;
+  Atm128Calibrate = MeasureClockC;
+
+  PlatformP.MeasureClock -> MeasureClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+  MotePlatformC.SubInit = SubInit;
+}
diff --git a/tos/platforms/mica/PlatformLedsC.nc b/tos/platforms/mica/PlatformLedsC.nc
new file mode 100644
index 00000000..3d8aa009
--- /dev/null
+++ b/tos/platforms/mica/PlatformLedsC.nc
@@ -0,0 +1,50 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Platform-specific LED interface.
+ *
+ * @author Martin Turon 
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+
+  Led0 = IO.PortA2;  // Pin A2 = Red LED
+  Led1 = IO.PortA1;  // Pin A1 = Green LED
+  Led2 = IO.PortA0;  // Pin A0 = Yellow LED
+}
diff --git a/tos/platforms/mica/PlatformP.nc b/tos/platforms/mica/PlatformP.nc
new file mode 100644
index 00000000..48d0fc06
--- /dev/null
+++ b/tos/platforms/mica/PlatformP.nc
@@ -0,0 +1,65 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Internal platform boot code.
+ *
+ * @author Martin Turon 
+ */
+
+#include "hardware.h"
+
+module PlatformP
+{
+  provides interface Init;
+  uses interface Init as MoteInit;
+  uses interface Init as MeasureClock;
+
+}
+implementation
+{
+  void power_init() {
+      atomic {
+	MCUCR = _BV(SE);      // Internal RAM, IDLE, rupt vector at 0x0002,
+			      // enable sleep instruction!
+      }
+  }
+
+  command error_t Init.init()
+  {
+    error_t ok;
+
+    /* First thing is to measure the clock frequency */
+    ok = call MeasureClock.init();
+    ok = ecombine(ok, call MoteInit.init());
+
+    if (ok != SUCCESS)
+      return ok;
+
+    power_init();
+
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/mica/PlatformSerialC.nc b/tos/platforms/mica/PlatformSerialC.nc
new file mode 100644
index 00000000..f2122ee4
--- /dev/null
+++ b/tos/platforms/mica/PlatformSerialC.nc
@@ -0,0 +1,46 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * A platform's basic UART abstraction. On a mica mote, this is UART0 of
+ * the HPL.
+ *
+ * @author Martin Turon 
+ * @author Philip Levis
+ * @date August 7 2005
+ */
+
+configuration PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+  components HplAtm128UartC as UART, PlatformC;
+
+  SerialByteComm = UART.Uart0;
+  Init = UART.Uart0Init;
+  StdControl = UART.Uart0RxControl;
+  StdControl = UART.Uart0TxControl;
+}
diff --git a/tos/platforms/mica/chips/at45db/HplAt45dbC.nc b/tos/platforms/mica/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..79788c4e
--- /dev/null
+++ b/tos/platforms/mica/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,31 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * AT45DB flash chip HPL for mica family. Each family member must provide
+ * and HplAt45dbIOC component implementing the SPIByte and HplAt45dbByte
+ * interfaces required by HplAt45dbByteC.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbC {
+  provides interface HplAt45db @atmostonce();
+}
+implementation {
+  // 9 because the AT45DB041B has 264 byte pages (log2 page size rounded up)
+  components new HplAt45dbByteC(9), HplAt45dbIOC;
+
+  HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> HplAt45dbIOC;
+  HplAt45dbByteC.FlashSpi -> HplAt45dbIOC;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbIOC;
+}
diff --git a/tos/platforms/mica/sim/HilTimerMilliC.nc b/tos/platforms/mica/sim/HilTimerMilliC.nc
new file mode 100644
index 00000000..f082eb49
--- /dev/null
+++ b/tos/platforms/mica/sim/HilTimerMilliC.nc
@@ -0,0 +1,55 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Millisecond timer for the mica family (see TEP102). The "millisecond"
+ * timer system is built on hardware timer 0, running at 1024Hz.
+ *
+ * @author Cory Sharp 
+ * @author Martin Turon 
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer as TimerMilli[uint8_t num];
+  provides interface LocalTime;
+}
+implementation
+{
+  components AlarmCounterMilliP, new AlarmToTimerC(TMilli),
+    new VirtualizeTimerC(TMilli, uniqueCount(UQ_TIMER_MILLI)),
+    new CounterToLocalTimeC(TMilli);
+
+  Init = AlarmCounterMilliP;
+
+  TimerMilli = VirtualizeTimerC;
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmCounterMilliP;
+
+  LocalTime = CounterToLocalTimeC;
+  CounterToLocalTimeC.Counter -> AlarmCounterMilliP;
+}
+
+
diff --git a/tos/platforms/mica/sim/MeasureClockC.nc b/tos/platforms/mica/sim/MeasureClockC.nc
new file mode 100644
index 00000000..7a1ba0c9
--- /dev/null
+++ b/tos/platforms/mica/sim/MeasureClockC.nc
@@ -0,0 +1,32 @@
+#include "scale.h"
+
+/**
+ * Simulation version of MeasureClockC for the mica platform. See 
+ * tos/platforms/mica/MeasureClockC.nc for more details.
+ *
+ * @author Phil Levis
+ */
+
+module MeasureClockC {
+  /* This code MUST be called from PlatformP only, hence the exactlyonce */
+  provides interface Init @exactlyonce();
+
+  provides {
+    command uint16_t cyclesPerJiffy();
+    command uint32_t calibrateMicro(uint32_t n);
+  }
+}
+implementation 
+{
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command uint16_t cyclesPerJiffy() {
+    return (1 << 8);
+  }
+
+  command uint32_t calibrateMicro(uint32_t n) {
+    return scale32(n + 122, 244, (1 << 32));
+  }
+}
diff --git a/tos/platforms/mica/sim/PlatformC.nc b/tos/platforms/mica/sim/PlatformC.nc
new file mode 100644
index 00000000..a76b3335
--- /dev/null
+++ b/tos/platforms/mica/sim/PlatformC.nc
@@ -0,0 +1,48 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * @author Martin Turon 
+ */
+
+#include "hardware.h"
+
+configuration PlatformC {
+  provides {
+    interface Init;
+    command uint32_t calibrateMicro(uint32_t n);
+  }
+  uses interface Init as SubInit;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MeasureClockC;
+  
+  Init = PlatformP;
+  PlatformP.MoteInit -> MotePlatformC;
+  MotePlatformC.SubInit = SubInit;
+  PlatformP.MeasureClock -> MeasureClockC;
+
+}
+
diff --git a/tos/platforms/mica2/.platform b/tos/platforms/mica2/.platform
new file mode 100644
index 00000000..51055de1
--- /dev/null
+++ b/tos/platforms/mica2/.platform
@@ -0,0 +1,41 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc. 
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/platforms/mica
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/mica2/ActiveMessageC.nc b/tos/platforms/mica2/ActiveMessageC.nc
new file mode 100644
index 00000000..4f252583
--- /dev/null
+++ b/tos/platforms/mica2/ActiveMessageC.nc
@@ -0,0 +1,70 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ * The Active Message layer on the mica2 platform. This is a naming wrapper
+ * around the CC1000 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components CC1000ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/mica2/DemoSensorC.nc b/tos/platforms/mica2/DemoSensorC.nc
new file mode 100644
index 00000000..0be4fd2c
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorC.nc
@@ -0,0 +1,24 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation {
+  components new VoltageC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/platforms/mica2/DemoSensorNowC.nc b/tos/platforms/mica2/DemoSensorNowC.nc
new file mode 100644
index 00000000..85cf76a9
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorNowC.nc
@@ -0,0 +1,26 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new VoltageNowC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/mica2/DemoSensorStreamC.nc b/tos/platforms/mica2/DemoSensorStreamC.nc
new file mode 100644
index 00000000..1c7850f3
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorStreamC.nc
@@ -0,0 +1,24 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream;
+}
+implementation {
+  components new VoltageStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/platforms/mica2/MotePlatformC.nc b/tos/platforms/mica2/MotePlatformC.nc
new file mode 100644
index 00000000..b44f624f
--- /dev/null
+++ b/tos/platforms/mica2/MotePlatformC.nc
@@ -0,0 +1,29 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplCC1000InitP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = MotePlatformP;
+  PlatformInit = HplCC1000InitP;
+  
+  MotePlatformP.SerialIdPin -> IO.PortA4;
+  SubInit = MotePlatformP.SubInit;
+  
+}
diff --git a/tos/platforms/mica2/MotePlatformP.nc b/tos/platforms/mica2/MotePlatformP.nc
new file mode 100644
index 00000000..65eb5ff0
--- /dev/null
+++ b/tos/platforms/mica2/MotePlatformP.nc
@@ -0,0 +1,38 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+module MotePlatformP
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins low
+    PORTC = 0;
+    DDRC = 0xff;
+
+    // Prevent sourcing current
+    call SerialIdPin.makeInput(); 
+    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/mica2/NestedResourceC.nc b/tos/platforms/mica2/NestedResourceC.nc
new file mode 100644
index 00000000..a1ef26c7
--- /dev/null
+++ b/tos/platforms/mica2/NestedResourceC.nc
@@ -0,0 +1,62 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Package up two resources as one. Requests and releases are passed on to
+ * both resources. granted is only signaled when both Resources are granted.
+ *
+ * @author David Gay
+ */
+
+generic module NestedResourceC() {
+  provides interface Resource;
+  uses {
+    /**
+     * First Resource to merge. This Resource MUST NOT be wired elsewhere.
+     */
+    interface Resource as Resource1;
+
+    /**
+     * Second Resource to merge. This Resource MUST NOT be wired elsewhere.
+     */
+    interface Resource as Resource2;
+  }
+}
+implementation
+{
+  async command error_t Resource.request() {
+    return call Resource1.request();
+  }
+
+  event void Resource1.granted() {
+    call Resource2.request();
+  }
+
+  event void Resource2.granted() {
+    signal Resource.granted();
+  }
+  async command error_t Resource.immediateRequest() {
+    if (call Resource1.immediateRequest() == SUCCESS)
+      {
+	if (call Resource2.immediateRequest() == SUCCESS)
+	  return SUCCESS;
+	call Resource1.release();
+      }
+    return EBUSY;
+  }
+
+  async command void Resource.release() {
+    call Resource1.release();
+    call Resource2.release();
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call Resource1.isOwner();
+  }
+}
diff --git a/tos/platforms/mica2/VoltageC.nc b/tos/platforms/mica2/VoltageC.nc
new file mode 100644
index 00000000..e1dbd137
--- /dev/null
+++ b/tos/platforms/mica2/VoltageC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Voltage sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration VoltageC() {
+  provides interface Read;
+}
+implementation {
+  components new AdcReadClientC(), VoltageDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> VoltageDeviceP;
+  AdcReadClientC.ResourceConfigure -> VoltageDeviceP;
+}
diff --git a/tos/platforms/mica2/VoltageDeviceP.nc b/tos/platforms/mica2/VoltageDeviceP.nc
new file mode 100644
index 00000000..63e94665
--- /dev/null
+++ b/tos/platforms/mica2/VoltageDeviceP.nc
@@ -0,0 +1,32 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for voltage sensor. Arbitrates access to the voltage
+ * sensor and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+configuration VoltageDeviceP {
+  provides {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components VoltageP, HplAtm128GeneralIOC as Pins;
+
+  Atm128AdcConfig = VoltageP;
+  ResourceConfigure = VoltageP;
+
+  VoltageP.BatMon -> Pins.PortA5;
+}
diff --git a/tos/platforms/mica2/VoltageNowC.nc b/tos/platforms/mica2/VoltageNowC.nc
new file mode 100644
index 00000000..edf0c183
--- /dev/null
+++ b/tos/platforms/mica2/VoltageNowC.nc
@@ -0,0 +1,29 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Voltage sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration VoltageNowC() {
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new AdcReadNowClientC(), VoltageDeviceP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.Atm128AdcConfig -> VoltageDeviceP;
+  AdcReadNowClientC.ResourceConfigure -> VoltageDeviceP;
+}
diff --git a/tos/platforms/mica2/VoltageP.nc b/tos/platforms/mica2/VoltageP.nc
new file mode 100644
index 00000000..e4376aa7
--- /dev/null
+++ b/tos/platforms/mica2/VoltageP.nc
@@ -0,0 +1,59 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+/**
+ * Internal component for voltage sensor reading.
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+module VoltageP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig as VoltageConfig;
+  }
+  uses interface GeneralIO as BatMon;	
+}
+implementation {
+  async command uint8_t VoltageConfig.getChannel() {
+    return CHANNEL_BATTERY;
+  }
+
+  async command uint8_t VoltageConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t VoltageConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call BatMon.makeOutput();
+    call BatMon.set();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call BatMon.clr();
+  }
+}
diff --git a/tos/platforms/mica2/VoltageStreamC.nc b/tos/platforms/mica2/VoltageStreamC.nc
new file mode 100644
index 00000000..6749d892
--- /dev/null
+++ b/tos/platforms/mica2/VoltageStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Voltage sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components VoltageDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> VoltageDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> VoltageDeviceP;
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc b/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc
new file mode 100644
index 00000000..4304413d
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc
@@ -0,0 +1,41 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level access functions for the AT45DB flash on the mica2 and micaz.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbIOC {
+  provides {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation {
+  // Wire up byte I/O to At45db
+  components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, HplAtm128InterruptC, PlatformC;
+  components BusyWaitMicroC;
+  components new NoArbiterC();
+
+  Resource = NoArbiterC;
+  FlashSpi = HplAt45dbIOP;
+  HplAt45dbByte = HplAt45dbIOP;
+
+  PlatformC.SubInit -> HplAt45dbIOP;
+  HplAt45dbIOP.Select -> Pins.PortA3;
+  HplAt45dbIOP.Clk -> Pins.PortD5;
+  HplAt45dbIOP.In -> Pins.PortD2;
+  HplAt45dbIOP.Out -> Pins.PortD3;
+  HplAt45dbIOP.InInterrupt -> HplAtm128InterruptC.Int2;
+  HplAt45dbIOP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc b/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc
new file mode 100644
index 00000000..135eb3f7
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc
@@ -0,0 +1,158 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the onboard AT45DB flash chip.
+ * 
    
+ * Note: This component includes optimised bit-banging SPI code with the
+ * pins hardwired.  Don't copy it to some other platform without
+ * understanding it (see txByte).
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+#include "Timer.h"
+
+module HplAt45dbIOP {
+  provides {
+    interface Init;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface GeneralIO as Select;
+    interface GeneralIO as Clk;
+    interface GeneralIO as Out;
+    interface GeneralIO as In;
+    interface HplAtm128Interrupt as InInterrupt;
+    interface BusyWait;
+  }
+}
+implementation
+{
+  // We use SPI mode 0 (clock low at select time)
+
+  command error_t Init.init() {
+    call Select.makeOutput();
+    call Select.set();
+    call Clk.clr();
+    call Clk.makeOutput();
+    call Out.set();
+    call Out.makeOutput();
+    call In.clr();
+    call In.makeInput();
+
+    call InInterrupt.disable();
+    call InInterrupt.edge(TRUE);
+
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() {
+    call Clk.clr(); // ensure SPI mode 0
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+#define BITINIT \
+  uint8_t clrClkAndData = PORTD & ~0x28
+
+#define BIT(n) \
+	PORTD = clrClkAndData; \
+	asm __volatile__ \
+        (  "sbrc %2," #n "\n" \
+	 "\tsbi 18,3\n" \
+	 "\tsbi 18,5\n" \
+	 "\tsbic 16,2\n" \
+	 "\tori %0,1<<" #n "\n" \
+	 : "=d" (spiIn) : "0" (spiIn), "r" (spiOut))
+
+  async command void FlashSpi.write(uint8_t spiOut, uint8_t *pspiIn) {
+    uint8_t spiIn = 0;
+
+    // This atomic ensures integrity at the hardware level...
+    atomic
+      {
+	BITINIT;
+
+	BIT(7);
+	BIT(6);
+	BIT(5);
+	BIT(4);
+	BIT(3);
+	BIT(2);
+	BIT(1);
+	BIT(0);
+      }
+
+    *pspiIn = spiIn;
+  }
+
+  task void avail() {
+    signal HplAt45dbByte.idle();
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    // Setup interrupt on rising edge of flash in
+    atomic
+      {
+	call InInterrupt.clear();
+	call InInterrupt.enable();
+	call Clk.clr();
+	// We need to wait at least 2 cycles here (because of the signal
+	// acquisition delay). It's also good to wait a few microseconds
+	// to get the fast ("FAIL") exit from wait (reads are twice as fast
+	// with a 2us delay...)
+	call BusyWait.wait(2);
+
+	if (call In.get())
+	  signal InInterrupt.fired(); // already high
+      }
+  }
+
+  async event void InInterrupt.fired() {
+    call InInterrupt.disable();
+    post avail();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    call Clk.set();
+    call Clk.clr();
+    // Wait for compare value to propagate
+    asm volatile("nop");
+    asm volatile("nop");
+    return !call In.get();
+  }
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h b/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..3a1ef279
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,45 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 2048,
+  AT45_PAGE_SIZE = 264,
+  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc
new file mode 100644
index 00000000..7fcf6500
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc
@@ -0,0 +1,54 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * HPL for the CC1000 radio, for the mica2 platform.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000C {
+  provides {
+    interface Read as RssiAdc;
+    interface HplCC1000Spi;
+    interface HplCC1000;
+  }
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP;
+  components new AdcReadClientC() as RssiChannel;
+
+  HplCC1000 = HplCC1000P;
+  HplCC1000Spi = HplCC1000SpiP;
+  RssiAdc = RssiChannel;
+
+  RssiChannel.Atm128AdcConfig -> HplCC1000P;
+
+  // HplCC1000M, HplCC1000SpiM are wired in HplCC1000InitC which is always
+  // included (see MotePlatformC.nc).
+}
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..c05bfd98
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,54 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortA6;
+  HplCC1000P.PALE -> IO.PortD4;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+}
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc
new file mode 100644
index 00000000..d8ad7ee3
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc
@@ -0,0 +1,207 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the CC1000.
+ *
+ * @author Jaein Jeong
+ * @author Philip Buonadonna
+ */
+
+#include "Atm128Adc.h"
+#include "CC1000Const.h"
+
+module HplCC1000P {
+  provides {
+    interface Init as PlatformInit;
+    interface HplCC1000;
+    interface Atm128AdcConfig as RssiConfig;
+  }
+  uses {
+    /* These are the CC1000 pin names */
+    interface GeneralIO as CHP_OUT;
+    interface GeneralIO as PALE;
+    interface GeneralIO as PCLK;
+    interface GeneralIO as PDATA;
+  }
+}
+implementation
+{
+  command error_t PlatformInit.init() {
+    call CHP_OUT.makeInput();
+    call PALE.makeOutput();
+    call PCLK.makeOutput();
+    call PDATA.makeOutput();
+    call PALE.set();
+    call PDATA.set();
+    call PCLK.set();
+
+    // MAIN register to power down mode. Shut everything off
+    call HplCC1000.write(CC1K_MAIN,
+			 1 << CC1K_RX_PD |
+			 1 << CC1K_TX_PD | 
+			 1 << CC1K_FS_PD |
+			 1 << CC1K_CORE_PD |
+			 1 << CC1K_BIAS_PD |
+			 1 << CC1K_RESET_N);
+    call HplCC1000.write(CC1K_PA_POW, 0);  // turn off rf amp
+    return SUCCESS;
+  }
+  
+  command void HplCC1000.init() {
+  }
+
+  //********************************************************/
+  // function: write                                       */
+  // description: accepts a 7 bit address and 8 bit data,  */
+  //    creates an array of ones and zeros for each, and   */
+  //    uses a loop counting thru the arrays to get        */
+  //    consistent timing for the chipcon radio control    */
+  //    interface.  PALE active low, followed by 7 bits    */
+  //    msb first of address, then lsb high for write      */
+  //    cycle, followed by 8 bits of data msb first.  data */
+  //    is clocked out on the falling edge of PCLK.        */
+  // Input:  7 bit address, 8 bit data                     */
+  //********************************************************/
+
+  async command void HplCC1000.write(uint8_t addr, uint8_t data) {
+    char cnt = 0;
+
+    // address cycle starts here
+    addr <<= 1;
+    call PALE.clr();  // enable PALE
+    for (cnt=0;cnt<7;cnt++)  // send addr PDATA msb first
+    {
+      if (addr&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      addr <<= 1;
+    }
+    call PDATA.set();
+    call PCLK.clr();   // toggle the PCLK
+    call PCLK.set();
+
+    call PALE.set();  // disable PALE
+
+    // data cycle starts here
+    for (cnt=0;cnt<8;cnt++)  // send data PDATA msb first
+    {
+      if (data&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      data <<= 1;
+    }
+    call PALE.set();
+    call PDATA.set();
+    call PCLK.set();
+  }
+
+  //********************************************************/
+  // function: read                                        */
+  // description: accepts a 7 bit address,                 */
+  //    creates an array of ones and zeros for each, and   */
+  //    uses a loop counting thru the arrays to get        */
+  //    consistent timing for the chipcon radio control    */
+  //    interface.  PALE active low, followed by 7 bits    */
+  //    msb first of address, then lsb low for read        */
+  //    cycle, followed by 8 bits of data msb first.  data */
+  //    is clocked in on the falling edge of PCLK.         */
+  // Input:  7 bit address                                 */
+  // Output:  8 bit data                                   */
+  //********************************************************/
+
+  async command uint8_t HplCC1000.read(uint8_t addr) {
+    int cnt;
+    uint8_t din;
+    uint8_t data = 0;
+
+    // address cycle starts here
+    addr <<= 1;
+    call PALE.clr();  // enable PALE
+    for (cnt=0;cnt<7;cnt++)  // send addr PDATA msb first
+    {
+      if (addr&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      addr <<= 1;
+    }
+    call PDATA.clr();
+    call PCLK.clr();   // toggle the PCLK
+    call PCLK.set();
+
+    call PDATA.makeInput();  // read data from chipcon
+    call PALE.set();  // disable PALE
+
+    // data cycle starts here
+    for (cnt=7;cnt>=0;cnt--)  // send data PDATA msb first
+    {
+      call PCLK.clr();  // toggle the PCLK
+      din = call PDATA.get();
+      if(din)
+        data = (data<<1)|0x01;
+      else
+        data = (data<<1)&0xfe;
+      call PCLK.set();
+    }
+
+    call PALE.set();
+    call PDATA.makeOutput();
+    call PDATA.set();
+
+    return data;
+  }
+
+
+  async command bool HplCC1000.getLOCK() {
+    return call CHP_OUT.get();
+  }
+
+  async command uint8_t RssiConfig.getChannel() {
+    return CHANNEL_RSSI;
+  }
+
+  async command uint8_t RssiConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t RssiConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+}
+  
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
new file mode 100644
index 00000000..67a0d5f3
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
@@ -0,0 +1,114 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level functions to access the CC1000 bus. Built using the mica2
+ * hardware SPI.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ */
+
+
+module HplCC1000SpiP {
+  provides interface Init as PlatformInit;
+  provides interface HplCC1000Spi;
+  //uses interface PowerManagement;
+  uses {
+    interface GeneralIO as SpiSck;
+    interface GeneralIO as SpiMiso;
+    interface GeneralIO as SpiMosi;
+    interface GeneralIO as OC1C;
+  }
+}
+implementation
+{
+  uint8_t outgoingByte;
+
+  command error_t PlatformInit.init() {
+    call SpiSck.makeInput();
+    call OC1C.makeInput();
+    call HplCC1000Spi.rxMode();
+    return SUCCESS;
+  }
+
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    register uint8_t temp = SPDR;
+    SPDR = outgoingByte;
+    signal HplCC1000Spi.dataReady(temp);
+  }
+  default async event void HplCC1000Spi.dataReady(uint8_t data) { }
+  
+
+  async command void HplCC1000Spi.writeByte(uint8_t data) {
+    atomic outgoingByte = data;
+  }
+
+  async command bool HplCC1000Spi.isBufBusy() {
+    return bit_is_clear(SPSR, SPIF);
+  }
+
+  async command uint8_t HplCC1000Spi.readByte() {
+    return SPDR;
+  }
+
+  async command void HplCC1000Spi.enableIntr() {
+    //sbi(SPCR,SPIE);
+    SPCR = 0xc0;
+    CLR_BIT(DDRB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.disableIntr() {
+    CLR_BIT(SPCR, SPIE);
+    SET_BIT(DDRB, 0);
+    CLR_BIT(PORTB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.initSlave() {
+    atomic {
+      CLR_BIT(SPCR, CPOL);		// Set proper polarity...
+      CLR_BIT(SPCR, CPHA);		// ...and phase
+      SET_BIT(SPCR, SPIE);	// enable spi port
+      SET_BIT(SPCR, SPE);
+    } 
+  }
+	
+  async command void HplCC1000Spi.txMode() {
+    call SpiMiso.makeOutput();
+    call SpiMosi.makeOutput();
+  }
+
+  async command void HplCC1000Spi.rxMode() {
+    call SpiMiso.makeInput();
+    call SpiMosi.makeInput();
+  }
+}
diff --git a/tos/platforms/mica2/hardware.h b/tos/platforms/mica2/hardware.h
new file mode 100644
index 00000000..54a81d29
--- /dev/null
+++ b/tos/platforms/mica2/hardware.h
@@ -0,0 +1,64 @@
+/*                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad 
+ *  @author Matt Miller 
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include 
+#include 
+
+// A/D channels
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // normally unpopulated
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC7,
+};
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/mica2/platform_message.h b/tos/platforms/mica2/platform_message.h
new file mode 100644
index 00000000..08726e54
--- /dev/null
+++ b/tos/platforms/mica2/platform_message.h
@@ -0,0 +1,59 @@
+/* $Id$
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ * Revision:  $Revision$
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "CC1000Msg.h"
+#include "Serial.h"
+
+typedef union message_header {
+  cc1000_header_t cc1k;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc1000_footer_t cc1k;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc1000_metadata_t cc1k;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/mica2dot/.platform b/tos/platforms/mica2dot/.platform
new file mode 100644
index 00000000..7d4b0ec4
--- /dev/null
+++ b/tos/platforms/mica2dot/.platform
@@ -0,0 +1,45 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc. 
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/platforms/mica2dot
+  %T/platforms/mica2
+  %T/platforms/mica
+  %T/platforms/mica2dot/chips/cc1000
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/platforms/mica2dot/chips/at45db
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/mica2dot/DemoSensorC.nc b/tos/platforms/mica2dot/DemoSensorC.nc
new file mode 100644
index 00000000..b8adf38a
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorC.nc
@@ -0,0 +1,24 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation {
+  components new TempC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/platforms/mica2dot/DemoSensorNowC.nc b/tos/platforms/mica2dot/DemoSensorNowC.nc
new file mode 100644
index 00000000..3c6e8f98
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorNowC.nc
@@ -0,0 +1,26 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new TempNowC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/mica2dot/DemoSensorStreamC.nc b/tos/platforms/mica2dot/DemoSensorStreamC.nc
new file mode 100644
index 00000000..d11cf051
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorStreamC.nc
@@ -0,0 +1,24 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream;
+}
+implementation {
+  components new TempStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/platforms/mica2dot/MotePlatformC.nc b/tos/platforms/mica2dot/MotePlatformC.nc
new file mode 100644
index 00000000..cbc03eeb
--- /dev/null
+++ b/tos/platforms/mica2dot/MotePlatformC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * For the mica2dot, we leave everything as inputs except as explicitly
+ * configured otherwise by other components.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components HplCC1000InitP;
+
+  PlatformInit = HplCC1000InitP;
+  SubInit = PlatformInit;
+}
diff --git a/tos/platforms/mica2dot/PlatformLedsC.nc b/tos/platforms/mica2dot/PlatformLedsC.nc
new file mode 100644
index 00000000..103d7bd9
--- /dev/null
+++ b/tos/platforms/mica2dot/PlatformLedsC.nc
@@ -0,0 +1,51 @@
+// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+
+/**
+ * Platform-specific LED interface.
+ *
+ * @author Martin Turon , David Gay
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components new NoPinC();
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+
+  Led0 = IO.PortA2;  // Pin A2 = Red LED
+  Led1 = NoPinC;
+  Led2 = NoPinC;
+}
diff --git a/tos/platforms/mica2dot/TempC.nc b/tos/platforms/mica2dot/TempC.nc
new file mode 100644
index 00000000..19443731
--- /dev/null
+++ b/tos/platforms/mica2dot/TempC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempC() {
+  provides interface Read;
+}
+implementation {
+  components new AdcReadClientC(), TempDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/TempDeviceP.nc b/tos/platforms/mica2dot/TempDeviceP.nc
new file mode 100644
index 00000000..0571cbe3
--- /dev/null
+++ b/tos/platforms/mica2dot/TempDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for temp sensor. Arbitrates access to the temp
+ * sensor and automatically turns it on or off based on user requests.
+ *
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+configuration TempDeviceP {
+  provides {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components TempP, HplAtm128GeneralIOC as Pins;
+
+  Atm128AdcConfig = TempP;
+  ResourceConfigure = TempP;
+
+  TempP.BatMon -> Pins.PortC6;
+  TempP.BatMonRef -> Pins.PortC7;
+}
diff --git a/tos/platforms/mica2dot/TempNowC.nc b/tos/platforms/mica2dot/TempNowC.nc
new file mode 100644
index 00000000..ebb63ca1
--- /dev/null
+++ b/tos/platforms/mica2dot/TempNowC.nc
@@ -0,0 +1,29 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempNowC() {
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new AdcReadNowClientC(), TempDeviceP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadNowClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/TempP.nc b/tos/platforms/mica2dot/TempP.nc
new file mode 100644
index 00000000..e852dc50
--- /dev/null
+++ b/tos/platforms/mica2dot/TempP.nc
@@ -0,0 +1,65 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+/**
+ * Internal component for temp sensor reading.
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+module TempP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig as TempConfig;
+  }
+  uses {
+    interface GeneralIO as BatMon;
+    interface GeneralIO as BatMonRef;
+  }
+}
+implementation {
+  async command uint8_t TempConfig.getChannel() {
+    return CHANNEL_BATTERY_THERMISTOR;
+  }
+
+  async command uint8_t TempConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t TempConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call BatMonRef.makeOutput();
+    call BatMonRef.set();
+    call BatMon.makeOutput();
+    call BatMon.clr();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call BatMon.makeInput();
+    call BatMonRef.makeInput();
+  }
+}
diff --git a/tos/platforms/mica2dot/TempStreamC.nc b/tos/platforms/mica2dot/TempStreamC.nc
new file mode 100644
index 00000000..7bb06bed
--- /dev/null
+++ b/tos/platforms/mica2dot/TempStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components TempDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/VoltageDeviceP.nc b/tos/platforms/mica2dot/VoltageDeviceP.nc
new file mode 100644
index 00000000..f8081095
--- /dev/null
+++ b/tos/platforms/mica2dot/VoltageDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for voltage sensor. Arbitrates access to the voltage
+ * sensor and automatically turns it on or off based on user requests.
+ *
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+configuration VoltageDeviceP {
+  provides {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components VoltageP, HplAtm128GeneralIOC as Pins;
+
+  Atm128AdcConfig = VoltageP;
+  ResourceConfigure = VoltageP;
+
+  VoltageP.BatMon -> Pins.PortC6;
+  VoltageP.BatMonRef -> Pins.PortC7;
+}
diff --git a/tos/platforms/mica2dot/VoltageP.nc b/tos/platforms/mica2dot/VoltageP.nc
new file mode 100644
index 00000000..dc3884b4
--- /dev/null
+++ b/tos/platforms/mica2dot/VoltageP.nc
@@ -0,0 +1,64 @@
+/// $Id$
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL CROSSBOW TECHNOLOGY OR ANY OF ITS LICENSORS BE LIABLE TO 
+ * ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL 
+ * DAMAGES ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF CROSSBOW OR ITS LICENSOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH 
+ * DAMAGE. 
+ *
+ * CROSSBOW TECHNOLOGY AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY 
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS 
+ * ON AN "AS IS" BASIS, AND NEITHER CROSSBOW NOR ANY LICENSOR HAS ANY 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR 
+ * MODIFICATIONS.
+ */
+/**
+ * Internal component for voltage sensor reading.
+ *
+ * @author Hu Siquan 
+ * @author David Gay
+ */
+
+module VoltageP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig as VoltageConfig;
+  }
+  uses {
+    interface GeneralIO as BatMon;
+    interface GeneralIO as BatMonRef;
+  }
+}
+implementation {
+  async command uint8_t VoltageConfig.getChannel() {
+    return CHANNEL_BATTERY_THERMISTOR;
+  }
+
+  async command uint8_t VoltageConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t VoltageConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call BatMonRef.makeOutput();
+    call BatMonRef.clr();
+    call BatMon.makeInput();
+    call BatMon.clr();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call BatMonRef.makeInput();
+  }
+}
diff --git a/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc
new file mode 100644
index 00000000..84df3001
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc
@@ -0,0 +1,38 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level access functions for the AT45DB flash on the mica2 and micaz.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbIOC {
+  provides {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation {
+  // Wire up byte I/O to At45db
+  components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC;
+  components new NoArbiterC();
+
+  Resource = NoArbiterC;
+  FlashSpi = HplAt45dbIOP;
+  HplAt45dbByte = HplAt45dbIOP;
+
+  PlatformC.SubInit -> HplAt45dbIOP;
+  HplAt45dbIOP.Select -> Pins.PortE5;
+  HplAt45dbIOP.Clk -> Pins.PortA3;
+  HplAt45dbIOP.In -> Pins.PortA6;
+  HplAt45dbIOP.Out -> Pins.PortA7;
+}
diff --git a/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc
new file mode 100644
index 00000000..cf7e565e
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc
@@ -0,0 +1,138 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the onboard AT45DB flash chip.
+ * 
    
+ * Note: This component includes optimised bit-banging SPI code with the
+ * pins hardwired.  Don't copy it to some other platform without
+ * understanding it (see txByte).
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+#include "Timer.h"
+
+module HplAt45dbIOP {
+  provides {
+    interface Init;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface GeneralIO as Select;
+    interface GeneralIO as Clk;
+    interface GeneralIO as Out;
+    interface GeneralIO as In;
+  }
+}
+implementation
+{
+  // We use SPI mode 0 (clock low at select time)
+
+  command error_t Init.init() {
+    call Select.makeOutput();
+    call Select.set();
+    call Clk.clr();
+    call Clk.makeOutput();
+    call Out.set();
+    call Out.makeOutput();
+    call In.clr();
+    call In.makeInput();
+
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() {
+    call Clk.clr(); // ensure SPI mode 0
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+#define BITINIT \
+  uint8_t clrClkAndData = PORTA & ~0x88
+
+#define BIT(n) \
+	PORTA = clrClkAndData; \
+	asm __volatile__ \
+        (  "sbrc %2," #n "\n" \
+	 "\tsbi 27,7\n" \
+	 "\tsbi 27,3\n" \
+	 "\tsbic 25,6\n" \
+	 "\tori %0,1<<" #n "\n" \
+	 : "=d" (spiIn) : "0" (spiIn), "r" (spiOut))
+
+  async command void FlashSpi.write(uint8_t spiOut, uint8_t *pspiIn) {
+    uint8_t spiIn = 0;
+
+    // This atomic ensures integrity at the hardware level...
+    atomic
+      {
+	BITINIT;
+
+	BIT(7);
+	BIT(6);
+	BIT(5);
+	BIT(4);
+	BIT(3);
+	BIT(2);
+	BIT(1);
+	BIT(0);
+      }
+
+    *pspiIn = spiIn;
+  }
+
+  task void idleWait() {
+    if (call In.get())
+      signal HplAt45dbByte.idle();
+    else
+      post idleWait();
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    call Clk.clr();
+    post idleWait();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    call Clk.set();
+    call Clk.clr();
+    // Wait for compare value to propagate
+    asm volatile("nop");
+    asm volatile("nop");
+    return !call In.get();
+  }
+}
diff --git a/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..6de8986e
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,54 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortE7;
+  HplCC1000P.PALE -> IO.PortD5;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+}
diff --git a/tos/platforms/mica2dot/hardware.h b/tos/platforms/mica2dot/hardware.h
new file mode 100644
index 00000000..f2e9c07a
--- /dev/null
+++ b/tos/platforms/mica2dot/hardware.h
@@ -0,0 +1,63 @@
+/*                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad 
+ *  @author Matt Miller 
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include 
+#include 
+
+// A/D channels
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_BATTERY_THERMISTOR = ATM128_ADC_SNGL_ADC1
+};
+
+#ifndef MHZ
+/* Clock rate is 4MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 4
+#endif
+
+enum {
+  PLATFORM_BAUDRATE = 19200L
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/micaz/.platform b/tos/platforms/micaz/.platform
new file mode 100644
index 00000000..101b18c3
--- /dev/null
+++ b/tos/platforms/micaz/.platform
@@ -0,0 +1,42 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/platforms/mica
+  %T/platforms/micaz/chips/cc2420
+  %T/chips/cc2420
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/i2c
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/micaz/ActiveMessageC.nc b/tos/platforms/micaz/ActiveMessageC.nc
new file mode 100644
index 00000000..144605a4
--- /dev/null
+++ b/tos/platforms/micaz/ActiveMessageC.nc
@@ -0,0 +1,71 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the micaZ platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+  
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/micaz/BusyWaitMicroC.nc b/tos/platforms/micaz/BusyWaitMicroC.nc
new file mode 100644
index 00000000..63085212
--- /dev/null
+++ b/tos/platforms/micaz/BusyWaitMicroC.nc
@@ -0,0 +1,46 @@
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+module BusyWaitMicroC
+{
+  provides interface BusyWait;
+}
+implementation
+{
+  inline async command void BusyWait.wait(uint16_t dt) {
+  /* In most cases (constant arg), the test is elided at compile-time */
+  if (dt)
+    /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz
+       clock, and 1.09uS if running on the external crystal. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	adiw	%0,1\n"
+"	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+  }
+}
diff --git a/tos/platforms/micaz/DemoSensorC.nc b/tos/platforms/micaz/DemoSensorC.nc
new file mode 100644
index 00000000..b5c615ee
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorC.nc
@@ -0,0 +1,28 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - the DemoSensor returns
+ * a constant value of 0xbeef, or just reads the ground value for the
+ * stream sensor.
+ *
+ * @author Philip Levis
+ * @authod David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation
+{
+  components new ConstantSensorC(uint16_t, 0xbeef) as DemoChannel;
+
+  Read = DemoChannel;
+}
diff --git a/tos/platforms/micaz/DemoSensorNowC.nc b/tos/platforms/micaz/DemoSensorNowC.nc
new file mode 100644
index 00000000..47b2ad1d
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorNowC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - this DemoSensor just reads
+ * the ground value.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation {
+  components new AdcReadNowClientC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/micaz/DemoSensorStreamC.nc b/tos/platforms/micaz/DemoSensorStreamC.nc
new file mode 100644
index 00000000..0849582b
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorStreamC.nc
@@ -0,0 +1,29 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - the DemoSensor returns
+ * a constant value of 0xbeef, or just reads the ground value for the
+ * stream sensor.
+ *
+ * @author Philip Levis
+ * @authod David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream;
+}
+implementation
+{
+  components new AdcReadStreamClientC();
+
+  // An unconfigure atm128 ReadStream sensor reads the "ground" channel.
+  ReadStream = AdcReadStreamClientC;
+}
diff --git a/tos/platforms/micaz/MotePlatformC.nc b/tos/platforms/micaz/MotePlatformC.nc
new file mode 100644
index 00000000..f8d9d4f9
--- /dev/null
+++ b/tos/platforms/micaz/MotePlatformC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplAtm128GeneralIOC;
+
+  PlatformInit = MotePlatformP;
+  
+  MotePlatformP.SerialIdPin -> HplAtm128GeneralIOC.PortA4;
+  SubInit = MotePlatformP.SubInit;
+}
diff --git a/tos/platforms/micaz/MotePlatformP.nc b/tos/platforms/micaz/MotePlatformP.nc
new file mode 100644
index 00000000..a45787ea
--- /dev/null
+++ b/tos/platforms/micaz/MotePlatformP.nc
@@ -0,0 +1,41 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * The micaZ portion of a mica-family initialisation that is
+ * mote-specific.
+ * 
+ * @author David Gay
+ */
+module MotePlatformP
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins low
+    PORTC = 0;
+    DDRC = 0xff;
+
+    // Prevent sourcing current
+    call SerialIdPin.makeInput(); 
+    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..816193cd
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,76 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A platform independent abstraction of an asynchronous 32KHz, 16-bit
+ * timer for the CC2420. As these timers (the Alarm interface) are
+ * usually part of an HAL, they are platform specific. But as the
+ * CC2420 needs to be cross-platform, this component bridges between
+ * the two, providing a platform-independent abstraction of
+ * CC2420-specific Alarm. This is a Atmega128 implementation that
+ * uses the Compare1A register.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+#include "Atm128Timer.h"
+
+generic configuration HplCC2420AlarmC() {
+  provides interface Alarm;
+  provides interface Init;
+}
+
+implementation {
+  components new Alarm32khz32C(), NoInitC;
+
+  Init = NoInitC;
+  Alarm = Alarm32khz32C;
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..73b522f0
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components new Atm128GpioCaptureC() as CaptureSFDC;
+  components HplAtm128Timer1C as Timer1C;
+  CaptureSFD = CaptureSFDC;
+  CaptureSFDC.Atm128Capture -> Timer1C.Capture;
+
+  components new Atm128GpioInterruptC() as InterruptFIFOPC;
+  components HplAtm128InterruptC as Interrupts;
+  InterruptFIFOP = InterruptFIFOPC;
+  InterruptFIFOPC.Atm128Interrupt -> Interrupts.Int6;
+
+  components HplCC2420InterruptsP, HplCC2420PinsC, new TimerMilliC();
+  InterruptCCA   = HplCC2420InterruptsP.CCA;
+  HplCC2420InterruptsP.CCATimer -> TimerMilliC;
+  HplCC2420InterruptsP.CC_CCA -> HplCC2420PinsC.CCA;
+  
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc
new file mode 100644
index 00000000..b4fc3c7f
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc
@@ -0,0 +1,151 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MicaZ implementation of the CC2420 interrupts. FIFOP is a real
+ * interrupt, while CCA and FIFO are emulated through timer polling.
+ * 
    + *  $Id$
+ * 
    + *
+ * @author Philip Levis
+ * @author Matt Miller
+ * @version @version $Revision$ $Date$
+ */
+
+#include "Timer.h"
+
+module HplCC2420InterruptsP {
+  provides {
+    interface GpioInterrupt as CCA;
+  }
+  uses {
+    interface GeneralIO as CC_CCA;
+    interface Timer as CCATimer;
+  }
+}
+implementation {
+  norace uint8_t ccaWaitForState;
+  norace uint8_t ccaLastState;
+  bool ccaTimerDisabled = FALSE;
+  // Add stdcontrol.init/.start to setup TimerCapture timebase
+
+  // ************* CCA Interrupt handlers and dispatch *************
+  
+  /**
+   * enable an edge interrupt on the CCA pin
+   NOT an interrupt in MICAz. Implement as a timer polled pin monitor
+   */
+
+  task void CCATask() {
+    atomic {
+      if (!ccaTimerDisabled) 
+	call CCATimer.startOneShot(1);
+    }
+  }
+  
+  async command error_t CCA.enableRisingEdge() { 
+    atomic ccaWaitForState = TRUE; //save the state we are waiting for
+    atomic ccaTimerDisabled = FALSE;
+    ccaLastState = call CC_CCA.get(); //get current state
+    post CCATask();
+    return SUCCESS;
+  }
+
+  async command error_t CCA.enableFallingEdge() { 
+    atomic ccaWaitForState = FALSE; //save the state we are waiting for
+    atomic ccaTimerDisabled = FALSE;
+    ccaLastState = call CC_CCA.get(); //get current state
+    post CCATask();
+    return SUCCESS;
+  }
+
+  /**
+   * disables CCA interrupts
+   */
+  void task stopTask() {
+    atomic{
+      if (ccaTimerDisabled) {
+	call CCATimer.stop();
+      }
+    }
+  }
+  async command error_t CCA.disable() {
+    atomic ccaTimerDisabled = TRUE;
+    post stopTask();
+    return SUCCESS;
+  }
+
+  /**
+   * TImer Event fired so now check for CCA	level
+   */
+  event void CCATimer.fired() {
+    uint8_t CCAState;
+    atomic {
+      if (ccaTimerDisabled) {
+	return;
+      }
+    }
+    //check CCA state
+    CCAState = call CC_CCA.get(); //get current state
+    //here if waiting for an edge
+    if ((ccaLastState != ccaWaitForState) && (CCAState == ccaWaitForState)) {
+      signal CCA.fired();
+    }//if CCA Pin is correct and edge found
+    //restart timer and try again
+    ccaLastState = CCAState;
+    post CCATask();
+    return;
+  }//CCATimer.fired
+
+ default async event void CCA.fired() {}
+
+} //Module HPLCC2420InterruptM
+  
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..3b5cdc6d
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,88 @@
+/*									tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Mapping the CC2420 pins to Atmega128 pins for the micaZ platform.
+ * Information on the function of these pins can be found on pages
+ * 14-15 of the CC2420 datasheet (rev 1.2).
+ *
+ * 
    + * $Id$
+ * 
    
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+configuration HplCC2420PinsC {
+  provides {
+    interface GeneralIO as CCA;
+    interface GeneralIO as CSN;
+    interface GeneralIO as FIFO;
+    interface GeneralIO as FIFOP;
+    interface GeneralIO as RSTN;
+    interface GeneralIO as SFD;
+    interface GeneralIO as VREN;
+  }
+}
+
+implementation {
+
+  components HplAtm128GeneralIOC as IO;
+  
+  CCA    = IO.PortD6;
+  CSN    = IO.PortB0;
+  FIFO   = IO.PortB7;
+  FIFOP  = IO.PortE6;
+  RSTN   = IO.PortA6;
+  SFD    = IO.PortD4;
+  VREN   = IO.PortA5;
+
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..03f283f5
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration HplCC2420SpiC() {
+
+  provides interface Init;
+  provides interface Resource;
+
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+  components Atm128SpiC;
+
+  Init = Atm128SpiC;
+  Resource = Atm128SpiC.Resource[ unique("Atm128SpiC.Resource") ];
+  SpiByte = Atm128SpiC;
+  SpiPacket = Atm128SpiC;
+
+}
diff --git a/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc b/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc
new file mode 100644
index 00000000..c1e87034
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc
@@ -0,0 +1,65 @@
+/*                                                                      tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Configuration representing the SPI device of the CC2420 for the micaZ
+ * platform. The basic mapping is this:
+ *  
      
+ *   
    • the platform independent chips/CC2420 maps to HplCC2420SpiC;
      • 
+ *   
    • HplCC2420SpiC on the micaZ maps to Atm128SpiC;
      • 
+ *   
    • under TOSSIM Atm128SpiC maps to SimAtm128SpiDeviceC;
      • 
+ *   
    • SimAtm128SpiDeviceC maps to the actual simulation implementation in micaz/chips/cc2420/sim
      • 
+ *  
    
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+configuration SimAtm128SpiDeviceC {
+
+  provides interface Init;
+  provides interface Resource[uint8_t];
+  provides interface SPIByte;
+  provides interface SPIPacket;
+
+  uses interface Resource as SubResource[uint8_t];
+  uses interface ArbiterInfo;
+  uses interface McuPowerState;
+  
+}
+
+implementation {
+
+  components SimCC2420C;
+
+  Init = SimCC2420C;
+  Resource = SimCC2420C.SpiResource;
+  SPIByte = SimCC2420C;
+  SPIPacket = SimCC2420C;
+
+  SubResource = SimCC2420C.SubSpiResource;
+  ArbiterInfo = SimCC2420C;
+  McuPowerState = SimCC2420C;
+  
+}
diff --git a/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc b/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc
new file mode 100644
index 00000000..12780325
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc
@@ -0,0 +1,66 @@
+/*                                                                      tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Simulated implementation of the CC2420 radio chip. It is an
+ * SPI end point, and also signals some interrupts/GPIO pins.\
+ * This is a pretty complicated component, so be aware that it
+ * may be very helpful to have the CC2420 data sheet nearby.
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+module SimCC2420C {
+
+  provides {
+    interface Init;
+    interface Resource[uint8_t] as SpiResource;
+    interface SPIByte;
+    interface SPIPacket;
+    interface GeneralIO as CCA;
+    interface GeneralIO as CSN;
+    interface GeneralIO as FIFO;
+    interface GeneralIO as FIFOP;
+    interface GeneralIO as RSTN;
+    interface GeneralIO as SFD;
+    interface GeneralIO as VREN;
+    interface GpioCapture as CaptureSFD;
+    interface GpioInterrupt as InterruptFIFOP;
+  }
+  
+  uses {
+    interface Resource[uint8_t] as SubSpiResource;
+    interface ArbiterInfo as SpiUser;
+    interface McuPowerState;
+  }
+
+  
+}
+
+implementation {
+
+  
+  
+}
diff --git a/tos/platforms/micaz/hardware.h b/tos/platforms/micaz/hardware.h
new file mode 100644
index 00000000..caba7f0c
--- /dev/null
+++ b/tos/platforms/micaz/hardware.h
@@ -0,0 +1,62 @@
+/**                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad 
+ *  @author Matt Miller 
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+#include 
+#include 
+
+// A/D channels
+enum {
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1    // normally unpopulated
+};
+
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/micaz/platform_message.h b/tos/platforms/micaz/platform_message.h
new file mode 100644
index 00000000..c860be68
--- /dev/null
+++ b/tos/platforms/micaz/platform_message.h
@@ -0,0 +1,59 @@
+/* $Id$
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ * Revision:  $Revision$
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "CC2420.h"
+#include "Serial.h"
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc2420_metadata_t cc2420;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/micaz/sim/.platform b/tos/platforms/micaz/sim/.platform
new file mode 100644
index 00000000..030ff3c7
--- /dev/null
+++ b/tos/platforms/micaz/sim/.platform
@@ -0,0 +1,38 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/platforms/micaz
+  %T/platforms/mica
+  %T/platforms/micaz/chips/cc2420
+  %T/chips/cc2420
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/adc
+  %T/lib/timer
+  %T/lib/serial
+
+) );
+
+@opts = qw(
+
+  -gcc=gcc
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/micaz/sim/platform_hardware.h b/tos/platforms/micaz/sim/platform_hardware.h
new file mode 100644
index 00000000..04f50796
--- /dev/null
+++ b/tos/platforms/micaz/sim/platform_hardware.h
@@ -0,0 +1,59 @@
+/**                                                                     tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad 
+ *  @author Matt Miller 
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include 
+#include 
+
+// A/D constants (channels, etc)
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // normally unpopulated
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC7,
+  CHANNEL_BANDGAP    = 30,
+  CHANNEL_GND        = 31,
+//  ATM128_ADC_PRESCALE = ATM128_ADC_PRESCALE_64,  // normal mica2 prescaler value
+  ATM128_TIMER0_TICKSPPS = 32768,
+};
+
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/null/.platform b/tos/platforms/null/.platform
new file mode 100644
index 00000000..ddb80d41
--- /dev/null
+++ b/tos/platforms/null/.platform
@@ -0,0 +1,22 @@
+#
+# FILE: null/.platform
+# 
+# A do-nothing platform. A good target for mig when using external types.
+#
+# $Id$
+#
+push( @includes, qw(
+
+  %T/lib/timer
+  %T/lib/serial
+
+) );
+
+@opts = qw(
+
+  -gcc=gcc
+  -fnesc-target=pc
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
diff --git a/tos/platforms/null/ActiveMessageC.nc b/tos/platforms/null/ActiveMessageC.nc
new file mode 100644
index 00000000..73893f8e
--- /dev/null
+++ b/tos/platforms/null/ActiveMessageC.nc
@@ -0,0 +1,122 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+implementation {
+
+
+  command error_t SplitControl.start() {
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    return SUCCESS;
+  }
+
+  command error_t AMSend.send[uint8_t id](am_addr_t addr, message_t* msg, uint8_t len) {
+    return SUCCESS;
+  }
+
+  command error_t AMSend.cancel[uint8_t id](message_t* msg) {
+    return SUCCESS;
+  }
+
+  command uint8_t AMSend.maxPayloadLength[uint8_t id]() {
+    return 0;
+  }
+
+  command void* AMSend.getPayload[uint8_t id](message_t* msg) {
+    return NULL;
+  }
+
+  command void Packet.clear(message_t* msg) {
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return 0;
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return 0;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    return msg;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+  }
+
+  command am_addr_t AMPacket.address() {
+    return 0;
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    return 0;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return FALSE;
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    return 0;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+  }
+
+  command void* Receive.getPayload[uint8_t id](message_t* msg, uint8_t* len) {
+    return NULL;
+  }
+
+  command uint8_t Receive.payloadLength[uint8_t id](message_t* msg) {
+    return 0;
+  }
+
+  command void* Snoop.getPayload[uint8_t id](message_t* msg, uint8_t* len) {
+    return NULL;
+  }
+
+  command uint8_t Snoop.payloadLength[uint8_t id](message_t* msg) {
+    return 0;
+  }
+
+  async command error_t Acks.requestAck( message_t* msg ) {
+    return SUCCESS;
+  }
+
+  async command error_t Acks.noAck( message_t* msg ) {
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+}
diff --git a/tos/platforms/null/BlockStorageC.nc b/tos/platforms/null/BlockStorageC.nc
new file mode 100644
index 00000000..f517ea0a
--- /dev/null
+++ b/tos/platforms/null/BlockStorageC.nc
@@ -0,0 +1,47 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+#include "Storage.h"
+
+generic module BlockStorageC(volume_id_t volid) {
+  provides {
+    interface BlockWrite;
+    interface BlockRead;
+  }
+}
+implementation {
+  command error_t BlockWrite.write( storage_addr_t addr, void* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+
+  command error_t BlockWrite.erase() {
+    return SUCCESS;
+  }
+
+  command error_t BlockWrite.commit() {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.read( storage_addr_t addr, void* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.verify() {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.computeCrc( storage_addr_t addr, storage_len_t len ) {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/DemoSensorC.nc b/tos/platforms/null/DemoSensorC.nc
new file mode 100644
index 00000000..1e6f8883
--- /dev/null
+++ b/tos/platforms/null/DemoSensorC.nc
@@ -0,0 +1,34 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Null platform demo sensor code.
+ *
+ * @author David Gay
+ */
+generic module DemoSensorC()
+{
+  provides interface Read;
+  provides interface ReadStream;
+}
+implementation
+{
+  command error_t Read.read() {
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.postBuffer(uint16_t *buf, uint16_t count) {
+    return SUCCESS;
+  }
+
+   command error_t ReadStream.read(uint32_t usPeriod) {
+     return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/null/DemoSensorNowC.nc b/tos/platforms/null/DemoSensorNowC.nc
new file mode 100644
index 00000000..8169f761
--- /dev/null
+++ b/tos/platforms/null/DemoSensorNowC.nc
@@ -0,0 +1,41 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Null platform demo sensor code.
+ *
+ * @author David Gay
+ */
+generic module DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation
+{
+  async command error_t Resource.request() {
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest() {
+    return SUCCESS;
+  }
+
+  async command void Resource.release() {
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return true;
+  }
+
+  async command error_t ReadNow.read() {
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/null/HilTimerMilliC.nc b/tos/platforms/null/HilTimerMilliC.nc
new file mode 100644
index 00000000..323e38e7
--- /dev/null
+++ b/tos/platforms/null/HilTimerMilliC.nc
@@ -0,0 +1,66 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer as TimerMilli[ uint8_t num ];
+  provides interface LocalTime;
+}
+implementation
+{
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command void TimerMilli.startPeriodic[ uint8_t num ]( uint32_t dt ) {
+  }
+
+  command void TimerMilli.startOneShot[ uint8_t num ]( uint32_t dt ) {
+  }
+
+  command void TimerMilli.stop[ uint8_t num ]() {
+  }
+
+  command bool TimerMilli.isRunning[ uint8_t num ]() {
+    return FALSE;
+  }
+
+  command bool TimerMilli.isOneShot[ uint8_t num ]() {
+    return FALSE;
+  }
+
+  command void TimerMilli.startPeriodicAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
+  }
+
+  command void TimerMilli.startOneShotAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
+  }
+
+  command uint32_t TimerMilli.getNow[ uint8_t num ]() {
+    return 0;
+  }
+
+  command uint32_t TimerMilli.gett0[ uint8_t num ]() {
+    return 0;
+  }
+
+  command uint32_t TimerMilli.getdt[ uint8_t num ]() {
+    return 0;
+  }
+
+  async command uint32_t LocalTime.get() {
+    return 0;
+  }
+}
diff --git a/tos/platforms/null/McuSleepC.nc b/tos/platforms/null/McuSleepC.nc
new file mode 100644
index 00000000..20b8722b
--- /dev/null
+++ b/tos/platforms/null/McuSleepC.nc
@@ -0,0 +1,27 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+}
+implementation {
+  async command void McuSleep.sleep() {
+  }
+
+  async command void McuPowerState.update() {
+  }
+}
diff --git a/tos/platforms/null/PlatformC.nc b/tos/platforms/null/PlatformC.nc
new file mode 100644
index 00000000..ca024cc5
--- /dev/null
+++ b/tos/platforms/null/PlatformC.nc
@@ -0,0 +1,22 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformC { 
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/PlatformLedsC.nc b/tos/platforms/null/PlatformLedsC.nc
new file mode 100644
index 00000000..c10e511c
--- /dev/null
+++ b/tos/platforms/null/PlatformLedsC.nc
@@ -0,0 +1,84 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+
+  async command void Led0.set() {
+  }
+
+  async command void Led0.clr() {
+  }
+
+  async command void Led0.toggle() {
+  }
+
+  async command bool Led0.get() {
+    return FALSE;
+  }
+
+  async command void Led0.makeInput() {
+  }
+
+  async command void Led0.makeOutput() {
+    call Init.init();
+  }
+
+  async command void Led1.set() {
+  }
+
+  async command void Led1.clr() {
+  }
+
+  async command void Led1.toggle() {
+  }
+
+  async command bool Led1.get() {
+    return FALSE;
+  }
+
+  async command void Led1.makeInput() {
+  }
+
+  async command void Led1.makeOutput() {
+    call Init.init();
+  }
+
+  async command void Led2.set() {
+  }
+
+  async command void Led2.clr() {
+  }
+
+  async command void Led2.toggle() {
+  }
+
+  async command bool Led2.get() {
+    return FALSE;
+  }
+
+  async command void Led2.makeInput() {
+  }
+
+  async command void Led2.makeOutput() {
+    call Init.init();
+  }
+}
diff --git a/tos/platforms/null/PlatformSerialC.nc b/tos/platforms/null/PlatformSerialC.nc
new file mode 100644
index 00000000..94ff26b5
--- /dev/null
+++ b/tos/platforms/null/PlatformSerialC.nc
@@ -0,0 +1,36 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+  async command error_t SerialByteComm.put(uint8_t data) {
+    return SUCCESS;
+  }
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/Storage_chip.h b/tos/platforms/null/Storage_chip.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/null/hardware.h b/tos/platforms/null/hardware.h
new file mode 100644
index 00000000..3c52c2a8
--- /dev/null
+++ b/tos/platforms/null/hardware.h
@@ -0,0 +1,11 @@
+inline void __nesc_enable_interrupt() { }
+inline void __nesc_disable_interrupt() { }
+
+typedef uint8_t __nesc_atomic_t;
+
+inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() {
+  return 0;
+}
+
+inline void __nesc_atomic_end(__nesc_atomic_t x) @spontaneous() { }
+inline void __nesc_atomic_sleep() { }
diff --git a/tos/platforms/null/platform_message.h b/tos/platforms/null/platform_message.h
new file mode 100644
index 00000000..0968318d
--- /dev/null
+++ b/tos/platforms/null/platform_message.h
@@ -0,0 +1,32 @@
+// $Id$
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+
+typedef union message_header {
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  nx_uint8_t dummy;
+} message_footer_t;
+
+typedef union message_metadata {
+  nx_uint8_t dummy;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform
new file mode 100644
index 00000000..47747321
--- /dev/null
+++ b/tos/platforms/telosa/.platform
@@ -0,0 +1,32 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+  %T/platforms/telosa
+  %T/platforms/telosa/chips/cc2420
+  %T/chips/cc2420
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/bus
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+
+) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x149
+  -fnesc-target=msp430
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
diff --git a/tos/platforms/telosa/ActiveMessageC.nc b/tos/platforms/telosa/ActiveMessageC.nc
new file mode 100644
index 00000000..4c14028d
--- /dev/null
+++ b/tos/platforms/telosa/ActiveMessageC.nc
@@ -0,0 +1,71 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/telosa/DemoSensorC.nc b/tos/platforms/telosa/DemoSensorC.nc
new file mode 100644
index 00000000..009c1abf
--- /dev/null
+++ b/tos/platforms/telosa/DemoSensorC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * @author: Jan Hauer 
+ * @version $Revision$ $Date$
+ * ========================================================================
+ */
+
+configuration DemoSensorC
+{
+  provides interface StdControl;
+  provides interface AcquireData;
+}
+implementation
+{
+  components InternalVoltageC as DemoChannel;
+  
+  StdControl = DemoChannel;
+  AcquireData = DemoChannel;
+}
diff --git a/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc b/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc
new file mode 100644
index 00000000..070c76f9
--- /dev/null
+++ b/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc
@@ -0,0 +1,15 @@
+module MSP430ADC12ChannelConfigM {
+  uses interface MSP430ADC12ChannelConfig;  
+}
+implementation
+{
+  async event msp430adc12_channel_config_t MSP430ADC12ChannelConfig.getConfigurationData(uint8_t channel) {
+    msp430adc12_channel_config_t config = {
+      channel, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_1_5,
+      SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+      SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 };
+
+    return config;
+  }
+}
+
diff --git a/tos/platforms/telosa/MotePlatformC.nc b/tos/platforms/telosa/MotePlatformC.nc
new file mode 100644
index 00000000..08760bba
--- /dev/null
+++ b/tos/platforms/telosa/MotePlatformC.nc
@@ -0,0 +1,59 @@
+module MotePlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    //LEDS
+    TOSH_SET_RED_LED_PIN();
+    TOSH_SET_GREEN_LED_PIN();
+    TOSH_SET_YELLOW_LED_PIN();
+    TOSH_MAKE_RED_LED_OUTPUT();
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+    TOSH_MAKE_YELLOW_LED_OUTPUT();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_SOMI0_INPUT();
+    TOSH_MAKE_SIMO0_INPUT();
+    TOSH_MAKE_UCLK0_INPUT();
+    TOSH_MAKE_SOMI1_INPUT();
+    TOSH_MAKE_SIMO1_INPUT();
+    TOSH_MAKE_UCLK1_INPUT();
+    TOSH_SET_RADIO_RESET_PIN();
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_CLR_RADIO_VREF_PIN();
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SET_RADIO_CSN_PIN();
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_MAKE_RADIO_GIO0_INPUT();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+    TOSH_MAKE_RADIO_GIO1_INPUT();
+
+    //UART PINS
+    TOSH_MAKE_UTXD0_INPUT();
+    TOSH_MAKE_URXD0_INPUT();
+    TOSH_MAKE_UTXD1_INPUT();
+    TOSH_MAKE_URXD1_INPUT();
+  
+    //PROG PINS
+    TOSH_MAKE_PROG_RX_INPUT();
+    TOSH_MAKE_PROG_TX_INPUT();
+
+    //FLASH PINS
+    TOSH_MAKE_FLASH_PWR_OUTPUT();
+    TOSH_SET_FLASH_PWR_PIN();
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_CS_PIN();
+
+    //HUMIDITY PINS
+    TOSH_MAKE_HUM_SCL_OUTPUT();
+    TOSH_MAKE_HUM_SDA_OUTPUT();
+    TOSH_MAKE_HUM_PWR_OUTPUT();
+    TOSH_CLR_HUM_SCL_PIN();
+    TOSH_CLR_HUM_SDA_PIN();
+    TOSH_CLR_HUM_PWR_PIN();
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/telosa/Msp430Timer32khzMapC.nc b/tos/platforms/telosa/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..74ca3845
--- /dev/null
+++ b/tos/platforms/telosa/Msp430Timer32khzMapC.nc
@@ -0,0 +1,75 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khzC()", "new
+ * AlarmMilliC()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp 
+ * @version $Revision$ $Date$
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  // Timer pin B1 is used by the CC2420 radio's SFD pin
+  // this is the only difference between the default 32khz map
+  // and the map on telos
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
+  Msp430Compare[1] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
+  Msp430Compare[2] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
+  Msp430Compare[3] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
+  Msp430Compare[4] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
+  Msp430Compare[5] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/telosa/PlatformC.nc b/tos/platforms/telosa/PlatformC.nc
new file mode 100644
index 00000000..ca1ad414
--- /dev/null
+++ b/tos/platforms/telosa/PlatformC.nc
@@ -0,0 +1,41 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision$ $Date$
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, Msp430ClockC;
+
+  Init = PlatformP;
+  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
+  PlatformP.MoteInit -> MotePlatformC;
+}
+
diff --git a/tos/platforms/telosa/PlatformLedsC.nc b/tos/platforms/telosa/PlatformLedsC.nc
new file mode 100644
index 00000000..39f229d6
--- /dev/null
+++ b/tos/platforms/telosa/PlatformLedsC.nc
@@ -0,0 +1,57 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision$ $Date$
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port54;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port55;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port56;
+
+}
+
diff --git a/tos/platforms/telosa/PlatformP.nc b/tos/platforms/telosa/PlatformP.nc
new file mode 100644
index 00000000..14451789
--- /dev/null
+++ b/tos/platforms/telosa/PlatformP.nc
@@ -0,0 +1,18 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as Msp430ClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call Msp430ClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+}
diff --git a/tos/platforms/telosa/PlatformSerialC.nc b/tos/platforms/telosa/PlatformSerialC.nc
new file mode 100644
index 00000000..edb0f17b
--- /dev/null
+++ b/tos/platforms/telosa/PlatformSerialC.nc
@@ -0,0 +1,14 @@
+configuration PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+  components new Uart1C() as UartC, TelosSerialP;
+
+  Init = UartC;
+  StdControl = UartC;
+  StdControl = TelosSerialP;
+  SerialByteComm = UartC;
+  TelosSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/telosa/TelosSerialP.nc b/tos/platforms/telosa/TelosSerialP.nc
new file mode 100644
index 00000000..82efe3fc
--- /dev/null
+++ b/tos/platforms/telosa/TelosSerialP.nc
@@ -0,0 +1,14 @@
+module TelosSerialP {
+  provides interface StdControl;
+  uses interface Resource;
+}
+implementation {
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+}
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..61caff4e
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm as Alarm32khz16;
+  provides interface Alarm as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khzC();
+
+  Init = Alarm32khzC;
+  Alarm32khz16 = Alarm32khzC.Alarm32khz16;
+  Alarm32khz32 = Alarm32khzC.Alarm32khz32;
+  
+}
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..105c7373
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components Counter32khzC;
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components Msp430TimerC;
+  components new GpioCaptureC() as CaptureSFDC;
+  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1;
+  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1;
+  CaptureSFDC.GeneralIO -> GeneralIOC.Port41;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port10;
+
+  CaptureSFD = CaptureSFDC.Capture;
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+
+}
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..5349a117
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port14;
+  CSNM -> GeneralIOC.Port42;
+  FIFOM -> GeneralIOC.Port13;
+  FIFOPM -> GeneralIOC.Port10;
+  RSTNM -> GeneralIOC.Port46;
+  SFDM -> GeneralIOC.Port41;
+  VRENM -> GeneralIOC.Port45;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..4a924907
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi0C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
new file mode 100644
index 00000000..d68b9b62
--- /dev/null
+++ b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HamamatsuS1087ParC is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration HamamatsuS1087ParC() {
+  provides interface Read;
+  provides interface ReadStream;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS1087ParP;
+  AdcReadClientC.Msp430Adc12Config -> HamamatsuS1087ParP;
+  AdcReadStreamClientC.Msp430Adc12Config -> HamamatsuS1087ParP;
+}
diff --git a/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
new file mode 100644
index 00000000..401ce095
--- /dev/null
+++ b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+/**
+ * HamamatsuS1087ParP is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+module HamamatsuS1087ParP {
+  provides interface Msp430Adc12Config;
+}
+implementation {
+
+  async command msp430adc12_channel_config_t Msp430Adc12Config.getChannelSettings() {
+    msp430adc12_channel_config_t config = {
+      inch: INPUT_CHANNEL_A4,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+    };
+
+    return config;
+  }
+}
diff --git a/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc
new file mode 100644
index 00000000..2a6f99a8
--- /dev/null
+++ b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HamamatsuS10871TsrC is a driver for a total solar radiation sensor
+ * available on the telosb platform.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration HamamatsuS10871TsrC() {
+  provides interface Read;
+  provides interface ReadStream;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS10871TsrP;
+  AdcReadClientC.Msp430Adc12Config -> HamamatsuS10871TsrP;
+  AdcReadStreamClientC.Msp430Adc12Config -> HamamatsuS10871TsrP;
+}
diff --git a/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc
new file mode 100644
index 00000000..18f98fdc
--- /dev/null
+++ b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+/**
+ * HamamatsuS10871TsrP is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+module HamamatsuS10871TsrP {
+  provides interface Msp430Adc12Config;
+}
+implementation {
+
+  async command msp430adc12_channel_config_t Msp430Adc12Config.getChannelSettings() {
+    msp430adc12_channel_config_t config = {
+      inch: INPUT_CHANNEL_A5,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+    };
+
+    return config;
+  }
+}
diff --git a/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
new file mode 100644
index 00000000..29eaac82
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+configuration HalSensirionSht11C {
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  components MainC;
+  MainC.SoftwareInit -> HplSensirionSht11C;
+
+  components HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+  
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -> TimerMilliC;
+
+  components LedsC;
+  SensirionSht11LogicP.Leds -> LedsC;
+}
diff --git a/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
new file mode 100644
index 00000000..1a135c8e
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplSensirionSht11C {
+  provides interface Init;
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+  components HplMsp430GeneralIOC;
+  
+  components new Msp430GpioC() as DATAM;
+  components new Msp430GpioC() as SCKM;
+  components new Msp430GpioC() as PWRM;
+
+  DATAM -> HplMsp430GeneralIOC.Port15;
+  SCKM -> HplMsp430GeneralIOC.Port16;
+  PWRM -> HplMsp430GeneralIOC.Port17;
+
+  DATA = DATAM;
+  SCK = SCKM;
+
+  components HplSensirionSht11P;
+  HplSensirionSht11P.PWR -> PWRM;
+  HplSensirionSht11P.DATA -> DATAM;
+  HplSensirionSht11P.SCK -> SCKM;
+
+  components new TimerMilliC();
+  HplSensirionSht11P.Timer -> TimerMilliC;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptDATAC;
+  InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port15;
+  InterruptDATA = InterruptDATAC.Interrupt;
+
+  components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+  Init = Arbiter;
+  Resource = Arbiter;
+  
+  components new SplitControlPowerManagerC();
+  Init = SplitControlPowerManagerC;
+  SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
+  SplitControlPowerManagerC.ArbiterInit -> Arbiter.Init;
+  SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+  SplitControlPowerManagerC.ResourceController -> Arbiter.ResourceController;
+}
diff --git a/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc b/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
new file mode 100644
index 00000000..012d2726
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+module HplSensirionSht11P {
+  provides interface SplitControl;
+  uses interface Timer;
+  uses interface GeneralIO as PWR;
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as SCK;
+}
+implementation {
+  task void stopTask();
+
+  command error_t SplitControl.start() {
+    call PWR.makeOutput();
+    call PWR.set();
+    call Timer.startOneShot( 11 );
+    return SUCCESS;
+  }
+  
+  event void Timer.fired() {
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+    call SCK.makeInput();
+    call SCK.clr();
+    call DATA.makeInput();
+    call DATA.clr();
+    call PWR.clr();
+    post stopTask();
+    return SUCCESS;
+  }
+
+  task void stopTask() {
+    signal SplitControl.stopDone( SUCCESS );
+  }
+}
+
diff --git a/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
new file mode 100644
index 00000000..6adb709f
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration SensirionSht11C() {
+  provides interface Read as Temperature;
+  provides interface Read as Humidity;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  Humidity = SensirionSht11ReaderP.Humidity;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
diff --git a/tos/platforms/telosa/hardware.h b/tos/platforms/telosa/hardware.h
new file mode 100644
index 00000000..405ba4f3
--- /dev/null
+++ b/tos/platforms/telosa/hardware.h
@@ -0,0 +1,86 @@
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+
+#include "msp430hardware.h"
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 5, 4);
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
+TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
+TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
+TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
+
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
+TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
+TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// ADC
+TOSH_ASSIGN_PIN(ADC0, 6, 0);
+TOSH_ASSIGN_PIN(ADC1, 6, 1);
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+
+// HUMIDITY
+TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
+TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
+TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+
+void HUMIDITY_MAKE_CLOCK_OUTPUT() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
+void HUMIDITY_MAKE_CLOCK_INPUT() { TOSH_MAKE_HUM_SCL_INPUT(); }
+void HUMIDITY_CLEAR_CLOCK() { TOSH_CLR_HUM_SCL_PIN(); }
+void HUMIDITY_SET_CLOCK() { TOSH_SET_HUM_SCL_PIN(); }
+void HUMIDITY_MAKE_DATA_OUTPUT() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
+void HUMIDITY_MAKE_DATA_INPUT() { TOSH_MAKE_HUM_SDA_INPUT(); }
+void HUMIDITY_CLEAR_DATA() { TOSH_CLR_HUM_SDA_PIN(); }
+void HUMIDITY_SET_DATA() { TOSH_SET_HUM_SDA_PIN(); }
+char HUMIDITY_GET_DATA() { return TOSH_READ_HUM_SDA_PIN(); }
+
+#define HUMIDITY_TIMEOUT_MS          30
+#define HUMIDITY_TIMEOUT_TRIES       20
+
+enum {
+  // Sensirion Humidity addresses and commands
+  TOSH_HUMIDITY_ADDR = 5,
+  TOSH_HUMIDTEMP_ADDR = 3,
+  TOSH_HUMIDITY_RESET = 0x1E
+};
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+
+// PROGRAMMING PINS (tri-state)
+//TOSH_ASSIGN_PIN(TCK, );
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/telosa/platform_message.h b/tos/platforms/telosa/platform_message.h
new file mode 100644
index 00000000..0c4b3b5a
--- /dev/null
+++ b/tos/platforms/telosa/platform_message.h
@@ -0,0 +1,58 @@
+/* $Id$
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision$ $Date$
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include 
+#include 
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform
new file mode 100644
index 00000000..79068cee
--- /dev/null
+++ b/tos/platforms/telosb/.platform
@@ -0,0 +1,42 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+  %T/platforms/telosb
+  %T/platforms/telosb/chips/stm25p
+  %T/platforms/telosa
+  %T/platforms/telosa/chips/cc2420
+  %T/platforms/telosa/chips/s1087
+  %T/platforms/telosa/chips/s10871
+  %T/platforms/telosa/chips/sht11
+  %T/chips/cc2420
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/stm25p
+  %T/chips/sht11
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/telosb/DemoSensorC.nc b/tos/platforms/telosb/DemoSensorC.nc
new file mode 100644
index 00000000..154a36b0
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/telosb/DemoSensorNowC.nc b/tos/platforms/telosb/DemoSensorNowC.nc
new file mode 100644
index 00000000..b361595a
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorNowC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/telosb/DemoSensorStreamC.nc b/tos/platforms/telosb/DemoSensorStreamC.nc
new file mode 100644
index 00000000..d94e5eeb
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/telosb/MotePlatformC.nc b/tos/platforms/telosb/MotePlatformC.nc
new file mode 100644
index 00000000..d471bd16
--- /dev/null
+++ b/tos/platforms/telosb/MotePlatformC.nc
@@ -0,0 +1,103 @@
+module MotePlatformC {
+  provides interface Init;
+}
+implementation {
+
+  inline void uwait(uint16_t u) { 
+    uint16_t t0 = TAR;
+    while((TAR - t0) <= u);
+  } 
+
+  inline void TOSH_wait() {
+    nop(); nop();
+  }
+
+  // send a bit via bit-banging to the flash
+  void TOSH_FLASH_M25P_DP_bit(bool set) {
+    if (set)
+      TOSH_SET_SIMO0_PIN();
+    else
+      TOSH_CLR_SIMO0_PIN();
+    TOSH_SET_UCLK0_PIN();
+    TOSH_CLR_UCLK0_PIN();
+  }
+
+  // put the flash into deep sleep mode
+  // important to do this by default
+  void TOSH_FLASH_M25P_DP() {
+    //  SIMO0, UCLK0
+    TOSH_MAKE_SIMO0_OUTPUT();
+    TOSH_MAKE_UCLK0_OUTPUT();
+    TOSH_MAKE_FLASH_HOLD_OUTPUT();
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_HOLD_PIN();
+    TOSH_SET_FLASH_CS_PIN();
+
+    TOSH_wait();
+
+    // initiate sequence;
+    TOSH_CLR_FLASH_CS_PIN();
+    TOSH_CLR_UCLK0_PIN();
+  
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 0
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 1
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 2
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 3
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 4
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 5
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 6
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 7
+
+    TOSH_SET_FLASH_CS_PIN();
+
+    TOSH_SET_SIMO0_PIN();
+    TOSH_MAKE_SIMO0_INPUT();
+    TOSH_MAKE_UCLK0_INPUT();
+    TOSH_CLR_FLASH_HOLD_PIN();
+  }
+
+  command error_t Init.init() {
+    // reset all of the ports to be input and using i/o functionality
+    atomic
+      {
+	P1SEL = 0;
+	P2SEL = 0;
+	P3SEL = 0;
+	P4SEL = 0;
+	P5SEL = 0;
+	P6SEL = 0;
+
+	P1DIR = 0xe0;
+	P1OUT = 0x00;
+ 
+	P2DIR = 0x7b;
+	P2OUT = 0x10;
+
+	P3DIR = 0xf1;
+	P3OUT = 0x00;
+
+	P4DIR = 0xfd;
+	P4OUT = 0xdd;
+
+	P5DIR = 0xff;
+	P5OUT = 0xff;
+
+	P6DIR = 0xff;
+	P6OUT = 0x00;
+
+	P1IE = 0;
+	P2IE = 0;
+
+	// the commands above take care of the pin directions
+	// there is no longer a need for explicit set pin
+	// directions using the TOSH_SET/CLR macros
+
+	// wait 10ms for the flash to startup
+	uwait(1024*10);
+	// Put the flash in deep sleep state
+	TOSH_FLASH_M25P_DP();
+
+      }//atomic
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/telosb/VoltageC.nc b/tos/platforms/telosb/VoltageC.nc
new file mode 100644
index 00000000..2da64b63
--- /dev/null
+++ b/tos/platforms/telosb/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration VoltageC() {
+  provides interface Read;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/telosb/VoltageStreamC.nc b/tos/platforms/telosb/VoltageStreamC.nc
new file mode 100644
index 00000000..2c278344
--- /dev/null
+++ b/tos/platforms/telosb/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc b/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc
new file mode 100644
index 00000000..34a53596
--- /dev/null
+++ b/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for a ST M25P chip
+ * connected to a TI MSP430.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplStm25pPinsC {
+
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as Hold;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as HplGeneralIOC;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as HoldM;
+
+  CSNM -> HplGeneralIOC.Port44;
+  HoldM -> HplGeneralIOC.Port47;
+
+  CSN = CSNM;
+  Hold = HoldM;
+
+}
diff --git a/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc b/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc
new file mode 100644
index 00000000..45ba29ed
--- /dev/null
+++ b/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the Spi bus for a ST M25P chip connected to a
+ * TI MSP430.
+ *
+ * @author Jonathan Hui 
+ * @version $Revision$ $Date$
+ */
+
+configuration HplStm25pSpiC {
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+  components new Msp430Spi0C() as SpiC;
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+
+}
diff --git a/tos/platforms/telosb/hardware.h b/tos/platforms/telosb/hardware.h
new file mode 100644
index 00000000..62754f88
--- /dev/null
+++ b/tos/platforms/telosb/hardware.h
@@ -0,0 +1,96 @@
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+//#include "MSP430ADC12.h"
+//#include "CC2420Const.h"
+//#include "AM.h"
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 5, 4);
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
+TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
+TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
+TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
+
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
+TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
+TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// ADC
+TOSH_ASSIGN_PIN(ADC0, 6, 0);
+TOSH_ASSIGN_PIN(ADC1, 6, 1);
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+
+// HUMIDITY
+TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
+TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
+TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+TOSH_ASSIGN_PIN(GIO2, 2, 3);
+TOSH_ASSIGN_PIN(GIO3, 2, 6);
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);
+
+void HUMIDITY_MAKE_CLOCK_OUTPUT() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
+void HUMIDITY_MAKE_CLOCK_INPUT() { TOSH_MAKE_HUM_SCL_INPUT(); }
+void HUMIDITY_CLEAR_CLOCK() { TOSH_CLR_HUM_SCL_PIN(); }
+void HUMIDITY_SET_CLOCK() { TOSH_SET_HUM_SCL_PIN(); }
+void HUMIDITY_MAKE_DATA_OUTPUT() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
+void HUMIDITY_MAKE_DATA_INPUT() { TOSH_MAKE_HUM_SDA_INPUT(); }
+void HUMIDITY_CLEAR_DATA() { TOSH_CLR_HUM_SDA_PIN(); }
+void HUMIDITY_SET_DATA() { TOSH_SET_HUM_SDA_PIN(); }
+char HUMIDITY_GET_DATA() { return TOSH_READ_HUM_SDA_PIN(); }
+
+#define HUMIDITY_TIMEOUT_MS          30
+#define HUMIDITY_TIMEOUT_TRIES       20
+
+enum {
+  // Sensirion Humidity addresses and commands
+  TOSH_HUMIDITY_ADDR = 5,
+  TOSH_HUMIDTEMP_ADDR = 3,
+  TOSH_HUMIDITY_RESET = 0x1E
+};
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7);
+
+// PROGRAMMING PINS (tri-state)
+//TOSH_ASSIGN_PIN(TCK, );
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+// need to undef atomic inside header files or nesC ignores the directive
+#undef atomic
+
+#endif // _H_hardware_h
diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform
new file mode 100644
index 00000000..08914897
--- /dev/null
+++ b/tos/platforms/tinynode/.platform
@@ -0,0 +1,45 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+
+push( @includes, qw(
+
+  %T/platforms/tinynode/chips/xe1205
+  %T/platforms/tinynode/chips/mm74hc595
+
+  %T/chips/xe1205/conf
+  %T/chips/xe1205/phy
+  %T/chips/xe1205/mac
+  %T/chips/xe1205
+
+  %T/../beta/tos/chips/mm74hc595
+
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/stm25p
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+
+) );
+
+
+@opts = qw(
+	-gcc=msp430-gcc
+	-mmcu=msp430x1611
+        -fnesc-target=msp430
+        -fnesc-no-debug
+	-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
+#@commonplatforms = ("msp430");
+
diff --git a/tos/platforms/tinynode/ActiveMessageC.nc b/tos/platforms/tinynode/ActiveMessageC.nc
new file mode 100644
index 00000000..8d0c2662
--- /dev/null
+++ b/tos/platforms/tinynode/ActiveMessageC.nc
@@ -0,0 +1,70 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the TinyNode platform. This is a naming wrapper
+ * around the XE1205 Active Message layer.
+ *
+ * @author Philip Levis, Henri Dubois-Ferriere
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl @atleastonce();
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components XE1205ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/tinynode/DemoSensorC.nc b/tos/platforms/tinynode/DemoSensorC.nc
new file mode 100644
index 00000000..154a36b0
--- /dev/null
+++ b/tos/platforms/tinynode/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/tinynode/LedsP.nc b/tos/platforms/tinynode/LedsP.nc
new file mode 100644
index 00000000..0666cfff
--- /dev/null
+++ b/tos/platforms/tinynode/LedsP.nc
@@ -0,0 +1,157 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The implementation of the standard LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  
+#ifndef dbg
+#define dbg(n,msg)
+#endif  
+
+  command error_t Init.init() {
+    atomic {
+      dbg(DBG_BOOT, "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.clr();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg(DBG_LED, "LEDS: Led 0 on.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Off() {
+    dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 0 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg(DBG_LED, "LEDS: Led 1 on.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Off() {
+    dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg(DBG_LED, "LEDS: Led 2 on.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Off() {
+    dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 2 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+        rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+        rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+        rval |= LEDS_LED2;
+      }
+    return rval;
+  }
+}
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+        call Leds.led0On();
+      }
+      else {
+        call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+        call Leds.led1On();
+      }
+      else {
+        call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+        call Leds.led2On();
+      }
+      else {
+        call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/tinynode/PlatformC.nc b/tos/platforms/tinynode/PlatformC.nc
new file mode 100644
index 00000000..73b1e248
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformC.nc
@@ -0,0 +1,41 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP
+    , Msp430ClockC
+    ;
+
+  Init = PlatformP;
+  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
+}
+
diff --git a/tos/platforms/tinynode/PlatformLedsC.nc b/tos/platforms/tinynode/PlatformLedsC.nc
new file mode 100644
index 00000000..b776e45d
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformLedsC.nc
@@ -0,0 +1,54 @@
+// $Id$
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Joe Polastre
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0; // red
+  provides interface GeneralIO as Led1; // green
+  provides interface GeneralIO as Led2; // yellow
+  uses interface Init;
+}
+implementation
+{
+  components 
+  HplMsp430GeneralIOC as GeneralIOC, 
+    new Msp430GpioC() as Led0Impl,
+    new Msp430GpioC() as Led1Impl,
+    new Msp430GpioC() as Led2Impl;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port15;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port23;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port24;
+
+  components PlatformP;
+  Init = PlatformP.LedsInit;
+}
+
diff --git a/tos/platforms/tinynode/PlatformP.nc b/tos/platforms/tinynode/PlatformP.nc
new file mode 100644
index 00000000..81e9dbfb
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as Msp430ClockInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call Msp430ClockInit.init();
+    TOSH_SET_PIN_DIRECTIONS();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
+
diff --git a/tos/platforms/tinynode/PlatformSerialC.nc b/tos/platforms/tinynode/PlatformSerialC.nc
new file mode 100644
index 00000000..d2cc7a00
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformSerialC.nc
@@ -0,0 +1,14 @@
+configuration PlatformSerialC {
+  provides interface Init;
+  provides interface StdControl;
+  provides interface SerialByteComm;
+}
+implementation {
+  components new Uart1C() as UartC, TinyNodeSerialP;
+
+  Init = UartC;
+  StdControl = UartC;
+  StdControl = TinyNodeSerialP;
+  SerialByteComm = UartC;
+  TinyNodeSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/tinynode/TinyNodeSerialP.nc b/tos/platforms/tinynode/TinyNodeSerialP.nc
new file mode 100644
index 00000000..92187c58
--- /dev/null
+++ b/tos/platforms/tinynode/TinyNodeSerialP.nc
@@ -0,0 +1,14 @@
+module TinyNodeSerialP {
+  provides interface StdControl;
+  uses interface Resource;
+}
+implementation {
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+}
diff --git a/tos/platforms/tinynode/VoltageC.nc b/tos/platforms/tinynode/VoltageC.nc
new file mode 100644
index 00000000..2da64b63
--- /dev/null
+++ b/tos/platforms/tinynode/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration VoltageC() {
+  provides interface Read;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc
new file mode 100644
index 00000000..317ddb84
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc
@@ -0,0 +1,59 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * HPL implementation of interrupts for the Semtech
+ * XE1205 radio connected to a TI MSP430 processor on the 
+ * tinynode platform.
+ *
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration HplXE1205InterruptsC {
+
+  provides interface GpioInterrupt as Interrupt0;
+  provides interface GpioInterrupt as Interrupt1;
+}
+
+implementation{
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as Interrupt0C;
+  components new Msp430InterruptC() as Interrupt1C;
+  Interrupt0C.HplInterrupt -> HplMsp430InterruptC.Port20;
+  Interrupt1C.HplInterrupt -> HplMsp430InterruptC.Port21;
+
+  Interrupt0 = Interrupt0C.Interrupt;
+  Interrupt1 = Interrupt1C.Interrupt;
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc
new file mode 100644
index 00000000..4a180fc9
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc
@@ -0,0 +1,88 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * HPL implementation of general-purpose I/O for the Semtech XE1205
+ * radio connected to a TI MSP430 processor on a tinynode platform.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+configuration HplXE1205PinsC {
+
+  provides interface GeneralIO as Irq0Pin      @atmostonce();
+  provides interface GeneralIO as Irq1Pin      @atmostonce();
+  provides interface GeneralIO as AntSelTXPin  @atmostonce();
+  provides interface GeneralIO as AntSelRXPin  @atmostonce();
+  provides interface GeneralIO as DataPin      @atmostonce();
+  provides interface GeneralIO as ModeSel0Pin  @atmostonce();
+  provides interface GeneralIO as ModeSel1Pin  @atmostonce();
+  provides interface GeneralIO as NssDataPin   @atmostonce();
+  provides interface GeneralIO as NssConfigPin @atmostonce();
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC;
+  components new Msp430GpioC() as Irq0PinM;
+  components new Msp430GpioC() as Irq1PinM;
+  components new Msp430GpioC() as AntSelTXM;
+  components new Msp430GpioC() as AntSelRXM;
+  components new Msp430GpioC() as DataM;
+  components new Msp430GpioC() as ModeSel0M;
+  components new Msp430GpioC() as ModeSel1M;
+  components new Msp430GpioC() as NssConfigM;
+  components new Msp430GpioC() as NssDataM;
+
+  Irq0PinM -> HplMsp430GeneralIOC.Port20;
+  Irq1PinM -> HplMsp430GeneralIOC.Port21;
+  AntSelTXM -> HplMsp430GeneralIOC.Port27;
+  AntSelRXM -> HplMsp430GeneralIOC.Port26;
+  DataM -> HplMsp430GeneralIOC.Port57;
+  ModeSel0M -> HplMsp430GeneralIOC.Port34;
+  ModeSel1M -> HplMsp430GeneralIOC.Port35;
+  NssConfigM -> HplMsp430GeneralIOC.Port14;
+  NssDataM -> HplMsp430GeneralIOC.Port10;
+
+
+  Irq0Pin = Irq0PinM;
+  Irq1Pin = Irq1PinM;
+  AntSelTXPin = AntSelTXM;
+  AntSelRXPin = AntSelRXM;
+  DataPin = DataM;
+  ModeSel0Pin = ModeSel0M;
+  ModeSel1Pin = ModeSel1M;
+  NssConfigPin = NssConfigM;
+  NssDataPin = NssDataM;
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc
new file mode 100644
index 00000000..2b1d2738
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc
@@ -0,0 +1,58 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * HPL implementation of the SPI bus for the Xemics XE1205 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+generic configuration HplXE1205SpiC() {
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+  components new Msp430Spi0C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/tinynode/hardware.h b/tos/platforms/tinynode/hardware.h
new file mode 100644
index 00000000..eaa80051
--- /dev/null
+++ b/tos/platforms/tinynode/hardware.h
@@ -0,0 +1,213 @@
+/* 
+ * Copyright (c) 2005-2006, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+/*
+ * Platform definitions for tinynode platform
+ *
+ * @author Remy Blank
+ * @author Henri Dubois-Ferriere
+ * @author Roger Meier
+ *
+ */
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+
+// XE1205 radio
+TOSH_ASSIGN_PIN(NSS_DATA, 1, 0);
+TOSH_ASSIGN_PIN(DATA, 5, 7);
+TOSH_ASSIGN_PIN(NSS_CONFIG, 1, 4);
+TOSH_ASSIGN_PIN(IRQ0, 2, 0);
+TOSH_ASSIGN_PIN(IRQ1, 2, 1);
+TOSH_ASSIGN_PIN(SW_RX, 2, 6);
+TOSH_ASSIGN_PIN(SW_TX, 2, 7);
+TOSH_ASSIGN_PIN(POR, 3, 0);
+TOSH_ASSIGN_PIN(SCK, 3, 3);
+TOSH_ASSIGN_PIN(SW0, 3, 4);
+TOSH_ASSIGN_PIN(SW1, 3, 5);
+
+// LED
+TOSH_ASSIGN_PIN(RED_LED, 1, 5);		// on tinynode
+TOSH_ASSIGN_PIN(RED_LED2, 1, 6);	// external, for compatibility with Mica
+TOSH_ASSIGN_PIN(GREEN_LED, 2, 3);
+TOSH_ASSIGN_PIN(YELLOW_LED, 2, 4);
+// TOSH_ASSIGN_PIN(RED_LED2, 1, 5);	// external, for compatibility with Mica
+// TOSH_ASSIGN_PIN(GREEN_LED, 1, 3);
+// TOSH_ASSIGN_PIN(YELLOW_LED, 1, 2);
+
+// Other IO
+TOSH_ASSIGN_PIN(TEMPE, 5, 4);		// optional temperature sensor
+TOSH_ASSIGN_PIN(NVSUPE, 5, 5);		// voltage supply monitor
+TOSH_ASSIGN_PIN(NREGE, 5, 6);		// voltage regulator enable
+
+// UART0 pins (shared with XE1205 radio)
+TOSH_ASSIGN_PIN(STE0, 3, 0);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// UART1 pins
+TOSH_ASSIGN_PIN(STE1, 5, 0);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+// ADC
+TOSH_ASSIGN_PIN(TEMP, 6, 0);		// channel 0: optional temperature sensor
+TOSH_ASSIGN_PIN(VSUP, 6, 1);		// channel 1: supply monitor
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+TOSH_ASSIGN_PIN(ADC4, 6, 4);
+TOSH_ASSIGN_PIN(ADC5, 6, 5);
+TOSH_ASSIGN_PIN(ADC6, 6, 6);
+TOSH_ASSIGN_PIN(ADC7, 6, 7);
+
+// External FLASH
+TOSH_ASSIGN_PIN(NFL_RST, 4, 6);
+TOSH_ASSIGN_PIN(NFL_CS, 4, 7);
+TOSH_ASSIGN_PIN(FLASH_RST, 4, 6);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 7);
+
+// PROGRAMMING PINS (tri-state)
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+// Oscillator resistance
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+// unused
+TOSH_ASSIGN_PIN(P12, 1, 2);
+TOSH_ASSIGN_PIN(P13, 1, 3);
+TOSH_ASSIGN_PIN(P16, 1, 6);
+TOSH_ASSIGN_PIN(P23, 2, 3);
+TOSH_ASSIGN_PIN(P24, 2, 4);
+TOSH_ASSIGN_PIN(P40, 4, 0);
+TOSH_ASSIGN_PIN(P41, 4, 1);
+
+// unconnected
+TOSH_ASSIGN_PIN(NOT_CONNECTED1, 1, 7);
+TOSH_ASSIGN_PIN(NOT_CONNECTED2, 4, 2);
+TOSH_ASSIGN_PIN(NOT_CONNECTED3, 4, 3);
+TOSH_ASSIGN_PIN(NOT_CONNECTED4, 4, 4);
+TOSH_ASSIGN_PIN(NOT_CONNECTED5, 4, 5);
+	
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+	//LEDS
+	TOSH_CLR_RED_LED_PIN();
+	TOSH_MAKE_RED_LED_OUTPUT();		
+
+	// XE1205 radio
+	//	TOSH_SET_NSS_DATA_PIN();
+	//	TOSH_MAKE_NSS_DATA_OUTPUT();
+	//	TOSH_CLR_DATA_PIN();
+	//	TOSH_MAKE_DATA_OUTPUT();
+	//	TOSH_SET_NSS_CONFIG_PIN();
+	//	TOSH_MAKE_NSS_CONFIG_OUTPUT();
+	//	TOSH_CLR_IRQ0_PIN();
+	//	TOSH_MAKE_IRQ0_OUTPUT();
+	//	TOSH_CLR_IRQ1_PIN();
+	//	TOSH_MAKE_IRQ1_OUTPUT();
+	//	TOSH_CLR_SW_RX_PIN();
+	//	TOSH_MAKE_SW_RX_OUTPUT();
+	//	TOSH_CLR_SW_TX_PIN();
+	//	TOSH_MAKE_SW_TX_OUTPUT();
+	TOSH_MAKE_POR_INPUT();
+
+	// SPI0
+	TOSH_CLR_SCK_PIN();
+	TOSH_MAKE_SCK_OUTPUT();
+	
+	// antenna switch
+	//	TOSH_CLR_SW0_PIN();
+	//	TOSH_MAKE_SW0_OUTPUT();
+	//	TOSH_CLR_SW1_PIN();
+	//	TOSH_MAKE_SW1_OUTPUT();
+
+	// optional temperature sensor
+	TOSH_CLR_TEMPE_PIN();
+	TOSH_MAKE_TEMPE_OUTPUT();
+	TOSH_MAKE_TEMP_INPUT();
+	TOSH_SEL_TEMP_MODFUNC();
+
+	// voltage supply monitor
+	TOSH_SET_NVSUPE_PIN();
+	TOSH_MAKE_NVSUPE_INPUT();
+	TOSH_MAKE_VSUP_INPUT();
+	TOSH_SEL_VSUP_MODFUNC();
+
+	// voltage regulator
+	TOSH_SET_NREGE_PIN();			// disable regulator for low power mode
+	TOSH_MAKE_NREGE_OUTPUT();
+
+	//UART PINS
+	TOSH_MAKE_UTXD1_INPUT();
+	TOSH_MAKE_URXD1_INPUT();
+	TOSH_SEL_UTXD1_IOFUNC();
+
+	// External FLASH
+	TOSH_SET_FLASH_RST_PIN();
+	TOSH_MAKE_FLASH_RST_OUTPUT();
+	TOSH_SET_FLASH_CS_PIN();
+	TOSH_MAKE_FLASH_CS_OUTPUT();
+		
+	//PROG PINS
+	TOSH_MAKE_PROG_RX_INPUT();
+	TOSH_MAKE_PROG_TX_INPUT();
+
+	// ROSC PIN
+	TOSH_SET_ROSC_PIN();
+	TOSH_MAKE_ROSC_OUTPUT();
+
+	// set unconnected pins to avoid instability
+	TOSH_SET_NOT_CONNECTED1_PIN();
+	TOSH_SET_NOT_CONNECTED2_PIN();
+	TOSH_SET_NOT_CONNECTED3_PIN();
+	TOSH_SET_NOT_CONNECTED4_PIN();
+	TOSH_SET_NOT_CONNECTED5_PIN();
+	TOSH_MAKE_NOT_CONNECTED1_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED2_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED3_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED4_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED5_OUTPUT();
+}
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/tinynode/platform_message.h b/tos/platforms/tinynode/platform_message.h
new file mode 100644
index 00000000..821bb8aa
--- /dev/null
+++ b/tos/platforms/tinynode/platform_message.h
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "XE1205.h"
+#include "Serial.h"
+
+typedef union message_header {
+  xe1205_header_t xe1205;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  xe1205_footer_t xe1205;
+} message_footer_t;
+
+typedef union message_metadata {
+  xe1205_metadata_t xe1205;
+} message_metadata_t;
+
+#endif
diff --git a/tos/sensorboards/basicsb/.sensor b/tos/sensorboards/basicsb/.sensor
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/sensorboards/basicsb/DemoSensorC.nc b/tos/sensorboards/basicsb/DemoSensorC.nc
new file mode 100644
index 00000000..3e67b8e2
--- /dev/null
+++ b/tos/sensorboards/basicsb/DemoSensorC.nc
@@ -0,0 +1,23 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC() {
+  provides interface Read;
+}
+implementation {
+  components new PhotoC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/sensorboards/basicsb/DemoSensorStreamC.nc b/tos/sensorboards/basicsb/DemoSensorStreamC.nc
new file mode 100644
index 00000000..cb763a78
--- /dev/null
+++ b/tos/sensorboards/basicsb/DemoSensorStreamC.nc
@@ -0,0 +1,23 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components new PhotoStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/sensorboards/basicsb/PhotoC.nc b/tos/sensorboards/basicsb/PhotoC.nc
new file mode 100644
index 00000000..6c13ea3c
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration PhotoC() {
+  provides interface Read;
+}
+implementation {
+  components new AdcReadClientC(), PhotoDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> PhotoDeviceP;
+  AdcReadClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/PhotoDeviceP.nc b/tos/sensorboards/basicsb/PhotoDeviceP.nc
new file mode 100644
index 00000000..bc026617
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb photodiode. Arbitrates access to the photo
+ * diode and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+configuration PhotoDeviceP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+}
+implementation {
+  components PhotoP, MicaBusC;
+
+  ResourceConfigure = PhotoP;
+  Atm128AdcConfig = PhotoP;
+
+  PhotoP.PhotoPin -> MicaBusC.PW1;
+  PhotoP.PhotoAdc -> MicaBusC.Adc6;
+}
diff --git a/tos/sensorboards/basicsb/PhotoP.nc b/tos/sensorboards/basicsb/PhotoP.nc
new file mode 100644
index 00000000..24d68df0
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoP.nc
@@ -0,0 +1,47 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * basicsb photodiode power control and ADC configuration.
+ * @author David Gay 
+ */
+module PhotoP
+{
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+  uses {
+    interface GeneralIO as PhotoPin;
+    interface MicaBusAdc as PhotoAdc;
+  }
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call PhotoAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call PhotoPin.makeOutput();
+    call PhotoPin.set();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call PhotoPin.clr();
+  }
+}
diff --git a/tos/sensorboards/basicsb/PhotoStreamC.nc b/tos/sensorboards/basicsb/PhotoStreamC.nc
new file mode 100644
index 00000000..63901fb0
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration PhotoStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components PhotoDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> PhotoDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/TempC.nc b/tos/sensorboards/basicsb/TempC.nc
new file mode 100644
index 00000000..1835518e
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration TempC() {
+  provides interface Read;
+}
+implementation {
+  components new AdcReadClientC(), TempDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/TempDeviceP.nc b/tos/sensorboards/basicsb/TempDeviceP.nc
new file mode 100644
index 00000000..234e67e4
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb tempdiode. Arbitrates access to the temp
+ * diode and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+configuration TempDeviceP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+}
+implementation {
+  components TempP, MicaBusC;
+
+  ResourceConfigure = TempP;
+  Atm128AdcConfig = TempP;
+
+  TempP.TempPin -> MicaBusC.PW2;
+  TempP.TempAdc -> MicaBusC.Adc5;
+}
diff --git a/tos/sensorboards/basicsb/TempP.nc b/tos/sensorboards/basicsb/TempP.nc
new file mode 100644
index 00000000..4301ac28
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempP.nc
@@ -0,0 +1,47 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * basicsb thermistor power control and ADC configuration.
+ * @author David Gay 
+ */
+module TempP
+{
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+  uses {
+    interface GeneralIO as TempPin;
+    interface MicaBusAdc as TempAdc;
+  }
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call TempAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call TempPin.makeOutput();
+    call TempPin.set();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call TempPin.clr();
+  }
+}
diff --git a/tos/sensorboards/basicsb/TempStreamC.nc b/tos/sensorboards/basicsb/TempStreamC.nc
new file mode 100644
index 00000000..6159031c
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration TempStreamC() {
+  provides interface ReadStream;
+}
+implementation {
+  components TempDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/basicsb.h b/tos/sensorboards/basicsb/basicsb.h
new file mode 100644
index 00000000..7da6a68c
--- /dev/null
+++ b/tos/sensorboards/basicsb/basicsb.h
@@ -0,0 +1,11 @@
+#ifndef BASICSB_H
+#define BASICSB_H
+
+#define UQ_TEMPDEVICE "TempDeviceP.Resource"
+#define UQ_TEMPDEVICE_STREAM "TempDeviceStreamP.Resource"
+
+#define UQ_PHOTODEVICE "PhotoDeviceP.Resource"
+#define UQ_PHOTODEVICE_STREAM "PhotoDeviceStreamP.Resource"
+
+
+#endif
diff --git a/tos/sensorboards/im2sb/.sensor b/tos/sensorboards/im2sb/.sensor
new file mode 100644
index 00000000..d75d4b5f
--- /dev/null
+++ b/tos/sensorboards/im2sb/.sensor
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2005-2006 Arch Rock Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the Arch Rock Corporation nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE
+#
+# FILE: im2sb/.sensor
+# 
+# Includes that should take precedence come first.  Sensorboard "superclasses"
+# come before because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current sensorboard's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id$
+#
+push( @includes, qw(
+  %T/sensorboards/im2sb
+  %T/chips/lis3l02dq
+  %T/chips/max136x
+  %T/chips/sht11
+  %T/chips/tmp175
+  %T/chips/tsl2561
+
+) );
diff --git a/tos/sensorboards/im2sb/HalSensirionSht11C.nc b/tos/sensorboards/im2sb/HalSensirionSht11C.nc
new file mode 100644
index 00000000..f5f9a02b
--- /dev/null
+++ b/tos/sensorboards/im2sb/HalSensirionSht11C.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+configuration HalSensirionSht11C {
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  components MainC;
+  MainC.SoftwareInit -> HplSensirionSht11C;
+
+  components HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+  
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -> TimerMilliC;
+
+  components NoLedsC;
+  SensirionSht11LogicP.Leds -> NoLedsC;
+}
diff --git a/tos/sensorboards/im2sb/HplSensirionSht11C.nc b/tos/sensorboards/im2sb/HplSensirionSht11C.nc
new file mode 100644
index 00000000..94045358
--- /dev/null
+++ b/tos/sensorboards/im2sb/HplSensirionSht11C.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle 
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+#include 
+
+configuration HplSensirionSht11C {
+  provides interface Init;
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+  components GeneralIOC;
+
+  DATA = GeneralIOC.GeneralIO[GPIO_SHT11_DATA];
+  SCK = GeneralIOC.GeneralIO[GPIO_SHT11_CLK];
+  InterruptDATA = GeneralIOC.GpioInterrupt[GPIO_SHT11_DATA];
+
+  components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+  Init = Arbiter;
+  Resource = Arbiter;
+}
diff --git a/tos/sensorboards/im2sb/HplSensirionSht11P.nc b/tos/sensorboards/im2sb/HplSensirionSht11P.nc
new file mode 100644
index 00000000..075d6868
--- /dev/null
+++ b/tos/sensorboards/im2sb/HplSensirionSht11P.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Phil Buonadonna 
+ * @version $Revision$ $Date$
+ */
+
+module HplSensirionSht11P {
+  provides interface SplitControl;
+  uses interface Timer;
+  uses interface HPlPXA27xGPIOPin as DATA;
+  uses interface HPLPXA27xGPIOPin as SCK;
+}
+implementation {
+  task void stopTask();
+
+  command error_t SplitControl.start() {
+    call DATA.setGAFRpin(0);
+    call SCK.setGAFRpin(0);
+    call Timer.startOneShot( 11 );
+    return SUCCESS;
+  }
+  
+  event void Timer.fired() {
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+    call SCK.setGPDRbit(FALSE);
+    call SCK.setGPCRbit();
+    call DATA.setGPDRbit(FALSE);
+    call DATA.setGPCRbit();
+    post stopTask();
+    return SUCCESS;
+  }
+
+  task void stopTask() {
+    signal SplitControl.stopDone( SUCCESS );
+  }
+}
+
diff --git a/tos/sensorboards/im2sb/LIS3L02DQC.nc b/tos/sensorboards/im2sb/LIS3L02DQC.nc
new file mode 100644
index 00000000..9f223576
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQC.nc
@@ -0,0 +1,71 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+
+generic configuration LIS3L02DQC() {
+  //provides interface Init;
+  provides interface SplitControl;
+  provides interface Read as AccelX;
+  provides interface Read as AccelY;
+  provides interface Read as AccelZ;
+  provides interface HalLIS3L02DQAdvanced;
+}
+
+implementation {
+  components new HalLIS3L02DQReaderP();
+  components HalLIS3L02DQControlP;
+  AccelX = HalLIS3L02DQReaderP.AccelX;
+  AccelY = HalLIS3L02DQReaderP.AccelY;
+  AccelZ = HalLIS3L02DQReaderP.AccelZ;
+  HalLIS3L02DQAdvanced = HalLIS3L02DQControlP.Advanced;
+  
+  enum { ACCELX_KEY = unique("LIS3L02DQ.Resource"),
+	 ACCELY_KEY = unique("LIS3L02DQ.Resource"),
+	 ACCELZ_KEY = unique("LIS3L02DQ.Resource"),
+	 ADV_KEY = unique("LIS3L02DQ.Resource"),
+	 READER_ID = unique("LIS3L02DQ.HplAccess"),
+  };
+
+  components LIS3L02DQInternalC;
+  HalLIS3L02DQReaderP.AccelXResource -> LIS3L02DQInternalC.Resource[ACCELX_KEY];
+  HalLIS3L02DQReaderP.AccelYResource -> LIS3L02DQInternalC.Resource[ACCELY_KEY];
+  HalLIS3L02DQReaderP.AccelZResource -> LIS3L02DQInternalC.Resource[ACCELZ_KEY];
+  HalLIS3L02DQControlP.Resource -> LIS3L02DQInternalC.Resource[ADV_KEY];
+  HalLIS3L02DQReaderP.Hpl -> LIS3L02DQInternalC.HplLIS3L02DQ[READER_ID];
+
+  SplitControl = LIS3L02DQInternalC;
+}
diff --git a/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc b/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc
new file mode 100644
index 00000000..489f9d63
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc
@@ -0,0 +1,79 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+
+configuration LIS3L02DQInternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplLIS3L02DQ[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  components new FcfsArbiterC( "LIS3L02DQ.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  MainC.SoftwareInit -> Arbiter;
+
+  components HplLIS3L02DQLogicSPIP as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components HplPXA27xSSP1C;
+  // 0: Motorola SPI
+  // 3: random guess what SSP Clock Rate should be
+  // 7: 8 bit data size OR 15: 16 bit data size?
+  // FALSE: No "Receive without transmit"
+  components new HalPXA27xSpiPioM(0, 128, 7, FALSE) as HalSpi;
+  HalSpi.SSP -> HplPXA27xSSP1C;
+  MainC.SoftwareInit -> HalSpi;
+  Logic.SpiPacket -> HalSpi.SpiPacket[unique("SPIInstance")];
+
+  components LIS3L02DQInternalP as Internal;
+  HplLIS3L02DQ = Internal;
+  Internal.ToHPLC -> Logic.HplLIS3L02DQ;
+  
+  SplitControl = Logic;
+
+  components HplPXA27xGPIOC;
+  Logic.SPICLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_SCLK];
+  Logic.SPIFRM -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_SFRM];
+  Logic.SPIRxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_RXD];
+  Logic.SPITxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_TXD];
+
+  components HalLIS3L02DQControlP as Control;
+  Control.Hpl -> Logic;
+  
+}
diff --git a/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc b/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc
new file mode 100644
index 00000000..f5598239
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc
@@ -0,0 +1,67 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+module LIS3L02DQInternalP {
+  provides interface HplLIS3L02DQ[uint8_t id];
+  uses interface HplLIS3L02DQ as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+
+  command error_t HplLIS3L02DQ.getReg[uint8_t id](uint8_t regAddr) {
+    currentId = id;
+    return call ToHPLC.getReg(regAddr);
+  }
+  command error_t HplLIS3L02DQ.setReg[uint8_t id](uint8_t regAddr, uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setReg(regAddr, val);
+  }
+  async event void ToHPLC.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    signal HplLIS3L02DQ.getRegDone[currentId](error, regAddr, val);
+  }
+  async event void ToHPLC.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    signal HplLIS3L02DQ.setRegDone[currentId](error, regAddr, val);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplLIS3L02DQ.alertThreshold[currentId]();
+  }
+
+  default async event void HplLIS3L02DQ.getRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
+  default async event void HplLIS3L02DQ.setRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
+}
diff --git a/tos/sensorboards/im2sb/MAX136xC.nc b/tos/sensorboards/im2sb/MAX136xC.nc
new file mode 100644
index 00000000..a600e9e5
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xC.nc
@@ -0,0 +1,64 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+#include "MAX136x.h"
+
+generic configuration MAX136xC() {
+  provides interface Read as ADC;
+  provides interface HalMAX136xAdvanced;
+  provides interface SplitControl;
+}
+
+implementation {
+  components new HalMAX136xReaderP();
+  components HalMAX136xControlP;
+
+  ADC = HalMAX136xReaderP.ADC;
+
+  enum { ADC_KEY = unique("MAX136x.Resource"),
+	 ADV_KEY = unique("MAX136x.Resource"),
+	 READER_ID = unique("MAX136x.HplAccess"),
+  };
+
+  components MAX136xInternalC;
+  HalMAX136xReaderP.MAX136xResource -> MAX136xInternalC.Resource[ADC_KEY];
+  HalMAX136xReaderP.HplMAX136x -> MAX136xInternalC.HplMAX136x[READER_ID];
+  HalMAX136xControlP.Resource -> MAX136xInternalC.Resource[ADV_KEY];
+  HalMAX136xAdvanced = HalMAX136xControlP;
+
+  SplitControl = MAX136xInternalC;
+}
diff --git a/tos/sensorboards/im2sb/MAX136xInternalC.nc b/tos/sensorboards/im2sb/MAX136xInternalC.nc
new file mode 100644
index 00000000..3c564f27
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xInternalC.nc
@@ -0,0 +1,68 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration MAX136xInternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplMAX136x[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  components new FcfsArbiterC( "MAX136x.Resource" )as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  MainC.SoftwareInit -> Arbiter;
+
+  components new HplMAX136xLogicP(MAX136_SLAVE_ADDR) as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components HalPXA27xI2CMasterC as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components MAX136xInternalP as Internal;
+  HplMAX136x = Internal.HplMAX136x;
+  Internal.ToHPLC -> Logic.HplMAX136x;
+
+  SplitControl = Logic;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+  
+  components HalMAX136xControlP;
+  HalMAX136xControlP.HplMAX136x -> Logic;
+}
diff --git a/tos/sensorboards/im2sb/MAX136xInternalP.nc b/tos/sensorboards/im2sb/MAX136xInternalP.nc
new file mode 100644
index 00000000..e1157bf7
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xInternalP.nc
@@ -0,0 +1,66 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module MAX136xInternalP {
+  provides interface HplMAX136x[uint8_t id];
+  uses interface HplMAX136x as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+
+  command error_t HplMAX136x.measureChannels[uint8_t id](uint8_t *buf, uint8_t len) {
+    currentId = id;
+    return call ToHPLC.measureChannels(buf, len);
+  }
+  command error_t HplMAX136x.setConfig[uint8_t id](uint8_t *cfgbuf, uint8_t len) {
+    currentId = id;
+    return call ToHPLC.setConfig(cfgbuf, len);
+  }
+  async event void ToHPLC.measureChannelsDone(error_t error, uint8_t *buf, uint8_t len) {
+    signal HplMAX136x.measureChannelsDone[currentId](error, buf, len);
+  }
+  async event void ToHPLC.setConfigDone(error_t error, uint8_t *cfgbuf, uint8_t len) {
+    signal HplMAX136x.setConfigDone[currentId](error, cfgbuf, len);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplMAX136x.alertThreshold[currentId]();
+  }
+
+
+  default async event void HplMAX136x.measureChannelsDone[uint8_t id]( error_t error, uint8_t *buf, uint8_t len ) {}
+  default async event void HplMAX136x.setConfigDone[uint8_t id]( error_t error , uint8_t *cfgbuf, uint8_t len) {}
+  default async event void HplMAX136x.alertThreshold[uint8_t id]() {}
+}
diff --git a/tos/sensorboards/im2sb/SensirionSht11C.nc b/tos/sensorboards/im2sb/SensirionSht11C.nc
new file mode 100644
index 00000000..5ec4f693
--- /dev/null
+++ b/tos/sensorboards/im2sb/SensirionSht11C.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Phil Buonadonna 
+ * @author Gilman Tolles 
+ * @version $Revision$ $Date$
+ */
+
+generic configuration SensirionSht11C() {
+  provides interface Read as Temperature;
+  provides interface Read as Humidity;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  Humidity = SensirionSht11ReaderP.Humidity;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
diff --git a/tos/sensorboards/im2sb/TMP175C.nc b/tos/sensorboards/im2sb/TMP175C.nc
new file mode 100644
index 00000000..d4f0423d
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175C.nc
@@ -0,0 +1,62 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+generic configuration TMP175C() {
+  provides interface Read as Temperature;
+  provides interface HalTMP175Advanced;
+  provides interface SplitControl;
+  //provides interface Init;
+}
+
+implementation {
+  components new HalTMP175ReaderP();
+  components HalTMP175ControlP;
+  Temperature = HalTMP175ReaderP.Temperature;
+
+  enum { TMP_KEY = unique("TMP175.Resource"),
+	 ADV_KEY = unique("TMP175.Resource"),
+	 READER_ID = unique("TMP175.HplAccess"),
+  };
+
+  components TMP175InternalC;
+  HalTMP175ReaderP.TMP175Resource -> TMP175InternalC.Resource[TMP_KEY];
+  HalTMP175ControlP.TMP175Resource -> TMP175InternalC.Resource[ADV_KEY];
+  HalTMP175ReaderP.HplTMP175 -> TMP175InternalC.HplTMP175[READER_ID];
+  HalTMP175Advanced = HalTMP175ControlP.HalTMP175Advanced;
+
+  SplitControl = TMP175InternalC;
+}
diff --git a/tos/sensorboards/im2sb/TMP175InternalC.nc b/tos/sensorboards/im2sb/TMP175InternalC.nc
new file mode 100644
index 00000000..0d631a3a
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175InternalC.nc
@@ -0,0 +1,77 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration TMP175InternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplTMP175[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  enum {
+    ADV_ID = unique("TMP175.HplAccess"),
+  };
+  
+  components new FcfsArbiterC( "TMP175.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  MainC.SoftwareInit -> Arbiter;
+
+  components new HplTMP175LogicP(TMP175_SLAVE_ADDR) as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components GeneralIOC;
+  Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP175_TEMP_ALERT];
+  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP175_TEMP_ALERT];
+
+  components HalPXA27xI2CMasterC as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components TMP175InternalP as Internal;
+  HplTMP175 = Internal.HplTMP175;
+  Internal.ToHPLC -> Logic.HplTMP175;
+
+  SplitControl = Logic;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+
+  components HalTMP175ControlP;
+  HalTMP175ControlP.HplTMP175 -> Logic;
+  
+}
diff --git a/tos/sensorboards/im2sb/TMP175InternalP.nc b/tos/sensorboards/im2sb/TMP175InternalP.nc
new file mode 100644
index 00000000..2fe92c90
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175InternalP.nc
@@ -0,0 +1,82 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module TMP175InternalP {
+  provides interface HplTMP175[uint8_t id];
+  uses interface HplTMP175 as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+
+  command error_t HplTMP175.measureTemperature[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureTemperature();
+  }
+  command error_t HplTMP175.setConfigReg[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setConfigReg(val);
+  }
+  command error_t HplTMP175.setTLowReg[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTLowReg(val);
+  }
+  command error_t HplTMP175.setTHighReg[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHighReg(val);
+  }
+
+  async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) {
+    signal HplTMP175.measureTemperatureDone[currentId](error, val);
+  }
+  async event void ToHPLC.setConfigRegDone(error_t error) {
+    signal HplTMP175.setConfigRegDone[currentId](error);
+  }
+  async event void ToHPLC.setTLowRegDone(error_t error) {
+    signal HplTMP175.setTLowRegDone[currentId](error);
+  }
+  async event void ToHPLC.setTHighRegDone(error_t error) {
+    signal HplTMP175.setTHighRegDone[currentId](error);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplTMP175.alertThreshold[currentId]();
+  }
+
+  default async event void HplTMP175.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; }
+  default async event void HplTMP175.setConfigRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.setTLowRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.setTHighRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.alertThreshold[uint8_t id]() { return; }
+}
diff --git a/tos/sensorboards/im2sb/Tsl2561C.nc b/tos/sensorboards/im2sb/Tsl2561C.nc
new file mode 100644
index 00000000..abded58f
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561C.nc
@@ -0,0 +1,70 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+generic configuration Tsl2561C() {
+  provides interface Read as BroadbandPhoto;
+  provides interface Read as IRPhoto;
+  provides interface HalTsl2561Advanced;
+  provides interface SplitControl; // this is for power control?
+  //provides interface Init;
+}
+implementation {
+  components new HalTsl2561ReaderP();
+  components HalTsl2561ControlP;
+
+  BroadbandPhoto = HalTsl2561ReaderP.BroadbandPhoto;
+  IRPhoto = HalTsl2561ReaderP.IRPhoto;
+
+  enum { BB_KEY = unique("Tsl2561.Resource"),
+	 IR_KEY = unique("Tsl2561.Resource"),
+	 ADV_KEY = unique("Tsl2561.Resource"),
+	 READER_ID = unique("Tsl2561.HplAccess"),
+  };
+
+  components Tsl2561InternalC;
+  HalTsl2561ReaderP.BroadbandResource -> Tsl2561InternalC.Resource[BB_KEY];
+  HalTsl2561ReaderP.IRResource -> Tsl2561InternalC.Resource[IR_KEY];
+  HalTsl2561ControlP.Resource -> Tsl2561InternalC.Resource[ADV_KEY];
+
+  HalTsl2561ReaderP.HplTSL256x -> Tsl2561InternalC.HplTSL256x[READER_ID];
+
+  HalTsl2561Advanced = HalTsl2561ControlP.HalTsl2561Advanced;
+
+  // for debugging
+  SplitControl = Tsl2561InternalC;
+}
+
diff --git a/tos/sensorboards/im2sb/Tsl2561InternalC.nc b/tos/sensorboards/im2sb/Tsl2561InternalC.nc
new file mode 100644
index 00000000..94794f83
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561InternalC.nc
@@ -0,0 +1,76 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration Tsl2561InternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplTSL256x[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  enum { ADV_ID = unique("Tsl2561.HplAccess"),
+
+  };
+
+  components new FcfsArbiterC( "Tsl2561.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  MainC.SoftwareInit -> Arbiter;
+  
+  components new HplTSL2561LogicP(TSL2561_SLAVE_ADDR) as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components GeneralIOC;
+  Logic.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_TSL2561_LIGHT_INT];
+  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TSL2561_LIGHT_INT];
+
+  components HalPXA27xI2CMasterC as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components Tsl2561InternalP as Internal;
+  HplTSL256x = Internal.HplTSL256x;
+  Internal.ToHPLC -> Logic.HplTSL256x;
+
+  SplitControl = Logic;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+
+  components HalTsl2561ControlP;
+  HalTsl2561ControlP.HplTSL256x -> Logic;
+}
diff --git a/tos/sensorboards/im2sb/Tsl2561InternalP.nc b/tos/sensorboards/im2sb/Tsl2561InternalP.nc
new file mode 100644
index 00000000..0f6df7e5
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561InternalP.nc
@@ -0,0 +1,114 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module Tsl2561InternalP {
+  provides interface HplTSL256x[uint8_t id];
+  uses interface HplTSL256x as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+  
+  command error_t HplTSL256x.measureCh0[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureCh0();
+  }
+  command error_t HplTSL256x.measureCh1[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureCh1();
+  }
+  command error_t HplTSL256x.setCONTROL[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setCONTROL(val);
+  }
+  command error_t HplTSL256x.setTIMING[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setTIMING(val);
+  }
+  command error_t HplTSL256x.setTHRESHLOW[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHRESHLOW(val);
+  }
+  command error_t HplTSL256x.setTHRESHHIGH[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHRESHHIGH(val);
+  }
+  command error_t HplTSL256x.setINTERRUPT[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setINTERRUPT(val);
+  }
+  command error_t HplTSL256x.getID[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.getID();
+  }
+  
+  async event void ToHPLC.measureCh0Done(error_t result, uint16_t val) {
+    signal HplTSL256x.measureCh0Done[currentId](result, val);
+  }
+  async event void ToHPLC.measureCh1Done(error_t result, uint16_t val) {
+    signal HplTSL256x.measureCh1Done[currentId](result, val);
+  }
+  async event void ToHPLC.setCONTROLDone(error_t error) {
+    signal HplTSL256x.setCONTROLDone[currentId](error);
+  }
+  async event void ToHPLC.setTIMINGDone(error_t error) {
+    signal HplTSL256x.setTIMINGDone[currentId](error);
+  }
+  async event void ToHPLC.setTHRESHLOWDone(error_t error) {
+    signal HplTSL256x.setTHRESHLOWDone[currentId](error);
+  }
+  async event void ToHPLC.setTHRESHHIGHDone(error_t error) {
+    signal HplTSL256x.setTHRESHHIGHDone[currentId](error);
+  }
+  async event void ToHPLC.setINTERRUPTDone(error_t error) {
+    signal HplTSL256x.setINTERRUPTDone[currentId](error);
+  }
+  async event void ToHPLC.getIDDone(error_t error, uint8_t idval) {
+    signal HplTSL256x.getIDDone[currentId](error, idval);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplTSL256x.alertThreshold[currentId]();
+  }
+
+  default async event void HplTSL256x.measureCh0Done[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.measureCh1Done[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.setCONTROLDone[uint8_t id]( error_t error ){ return; }
+  default async event void HplTSL256x.setTIMINGDone[uint8_t id](error_t error){ return; }
+  default async event void HplTSL256x.setTHRESHLOWDone[uint8_t id](error_t error){ return;} 
+  default async event void HplTSL256x.setTHRESHHIGHDone[uint8_t id](error_t error){ return; }
+  default async event void HplTSL256x.setINTERRUPTDone[uint8_t id](error_t error){ return;} 
+  default async event void HplTSL256x.getIDDone[uint8_t id](error_t error, uint8_t idval){ return; }
+  default async event void HplTSL256x.alertThreshold[uint8_t id](){ return; }
+}
diff --git a/tos/sensorboards/im2sb/im2sb.h b/tos/sensorboards/im2sb/im2sb.h
new file mode 100644
index 00000000..156b0cb0
--- /dev/null
+++ b/tos/sensorboards/im2sb/im2sb.h
@@ -0,0 +1,54 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna 
+ * Revision: $Revision$
+ *
+ */
+
+#ifndef _IM2SB_H
+#define _IM2SB_H
+
+#define GPIO_SHT11_DATA			(100)
+#define GPIO_SHT11_CLK			(98)
+
+#define GPIO_TSL2561_LIGHT_INT		(99)
+#define GPIO_MAX1363_ANALOG_INT		(99)
+
+#define GPIO_LIS3L02DQ_RDY_INT		(96)
+#define GPIO_TMP175_TEMP_ALERT		(96)
+
+#define TSL2561_SLAVE_ADDR (0x49)
+#define TMP175_SLAVE_ADDR (0x48)
+#define MAX136_SLAVE_ADDR (0x35)
+
+#endif /* _IM2SB_H */
diff --git a/tos/sensorboards/mts300/.sensor b/tos/sensorboards/mts300/.sensor
new file mode 100644
index 00000000..125b3ef2
--- /dev/null
+++ b/tos/sensorboards/mts300/.sensor
@@ -0,0 +1,15 @@
+#
+# FILE: mts300/.sensor
+# 
+# Includes that should take precedence come first.  Sensorboard "superclasses"
+# come before because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current sensorboard's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id$
+#
+push( @includes, qw(
+  %T/sensorboards/mts300
+#  %T/chips/atm128/adc
+) );
diff --git a/tos/sensorboards/mts300/SensorMts300C.nc b/tos/sensorboards/mts300/SensorMts300C.nc
new file mode 100644
index 00000000..26381448
--- /dev/null
+++ b/tos/sensorboards/mts300/SensorMts300C.nc
@@ -0,0 +1,57 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+configuration SensorMts300C
+{
+    provides {
+	interface Init;                 //!< Standard Initialization
+	interface StdControl;           //!< Start/Stop for Power Management
+	interface AcquireData as Temp;  //!< Thermister
+	interface AcquireData as Light; //!< Photo sensor
+    }
+}
+implementation 
+{
+    components 
+	SensorMts300P,
+	HplGeneralIOC as IO,
+	new AdcChannelC(1) as SensorADC,
+	new OskiTimerMilliC() as WarmUpTimer
+	;
+
+    Init       = SensorMts300P.Init;
+    StdControl = SensorMts300P.StdControl;
+    Temp       = SensorMts300P.Temp;
+    Light      = SensorMts300P.Light;
+
+    SensorMts300P.SensorADC -> SensorADC;
+    SensorMts300P.TempPower -> IO.PortE6;
+    SensorMts300P.LightPower -> IO.PortE5;
+    SensorMts300P.WarmUpTimer -> WarmUpTimer;
+}
diff --git a/tos/sensorboards/mts300/SensorMts300P.nc b/tos/sensorboards/mts300/SensorMts300P.nc
new file mode 100644
index 00000000..3e1fb5d1
--- /dev/null
+++ b/tos/sensorboards/mts300/SensorMts300P.nc
@@ -0,0 +1,304 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ *  Permission to use, copy, modify, and distribute this software and its
+ *  documentation for any purpose, without fee, and without written
+ *  agreement is hereby granted, provided that the above copyright
+ *  notice, the (updated) modification history and the author appear in
+ *  all copies of this source code.
+ *
+ *  Permission is also granted to distribute this software under the
+ *  standard BSD license as contained in the TinyOS distribution.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS 
+ *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+ *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA, 
+ *  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
+ *  THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Martin Turon 
+ *
+ *  $Id$
+ */
+
+#include "Timer.h"
+
+/**
+ * This component is the "platform" of the sensorboard space.
+ * It handles particulars of initialization, and glues all the
+ * member sensor "chips" into one place.  The current implementation 
+ * is overly monolithic, and should be divided into smaller 
+ * components that handle each individual sensor.  The temperature
+ * and light sensors are tightly coupled however and in the case
+ * of the micaz, interfere with the radio (INT2), so more can
+ * be done to clean up the design here.
+ * 
+ * @author  Martin Turon
+ * @date    October 19, 2005
+ */
+module SensorMts300P
+{
+    provides {
+	interface Init;                 //!< Standard Initialization
+	interface StdControl;           //!< Start/Stop for Power Management
+	interface AcquireData as Temp;  //!< Thermister
+	interface AcquireData as Light; //!< Photo sensor
+    }
+
+    uses {
+	interface GeneralIO as TempPower;
+	interface GeneralIO as LightPower;
+	interface AcquireData as SensorADC;
+	interface Timer as WarmUpTimer;
+    }
+}
+implementation 
+{
+    enum {
+	STATE_IDLE = 0,
+	STATE_LIGHT_WARMING,   //!< Powering on sensor
+	STATE_LIGHT_READY,     //!< Power up of sensor complete
+	STATE_LIGHT_SAMPLING,  //!< Sampling sensor
+	STATE_TEMP_WARMING,    //!< Powering on sensor
+	STATE_TEMP_READY,      //!< Power up of sensor complete
+	STATE_TEMP_SAMPLING,   //!< Sampling sensor
+    };
+
+    /// Yes, this could be a simple uint8_t.  There used to be more bits here,
+    /// but they were optimized out and removed.
+    union {
+	uint8_t flat;
+	struct {
+	    uint8_t state       : 4;   //!< sensorboard state
+	} bits;
+    } g_flags;
+
+   /**
+    * Initialize this component. Initialization should not assume that
+    * any component is running: init() cannot call any commands besides
+    * those that initialize other components. 
+    *
+    */
+    command error_t Init.init() {
+	g_flags.flat = STATE_IDLE;
+    }
+
+    /**
+     * Start the component and its subcomponents.
+     *
+     * @return SUCCESS if the component was successfully started.
+     */
+    command error_t StdControl.start() {
+    }
+    
+    /**
+     * Stop the component and pertinent subcomponents (not all
+     * subcomponents may be turned off due to wakeup timers, etc.).
+     *
+     * @return SUCCESS if the component was successfully stopped.
+     */
+    command error_t StdControl.stop() {
+	call TempPower.clr();
+	call LightPower.clr();
+	call TempPower.makeInput();
+	call LightPower.makeInput();
+	atomic g_flags.bits.state = STATE_IDLE;
+    }
+
+    /** Turns on the light sensor and turns the thermistor off. */
+    void switchLightOn() {
+	atomic g_flags.bits.state = STATE_LIGHT_WARMING;
+	call TempPower.clr();
+	call TempPower.makeInput();
+	call LightPower.makeOutput();
+	call LightPower.set();
+	call WarmUpTimer.startOneShot(10);
+    }
+
+    /** Turns on the thermistor and turns the light sensor off. */
+    void switchTempOn() {
+	atomic g_flags.bits.state = STATE_TEMP_WARMING;
+	call LightPower.clr();
+	call LightPower.makeInput();
+	call TempPower.makeOutput();
+	call TempPower.set();
+	call WarmUpTimer.startOneShot(10);
+    }
+
+    task void getLightSample() {
+	switch (g_flags.bits.state) {
+	    case STATE_TEMP_WARMING:
+	    case STATE_TEMP_READY:
+	    case STATE_TEMP_SAMPLING:
+		// If Temperature is busy, repost and try again later.
+		// This will not let the CPU sleep.  Add delay timer.
+		post getLightSample();
+		return;
+
+	    case STATE_IDLE: 
+		// Okay, grab the sensor.
+		switchLightOn();
+		return;
+		
+	    case STATE_LIGHT_WARMING:
+		// Warm-up Timer will switch out of this state.
+		return;
+
+	    case STATE_LIGHT_READY:
+		// Start the sample.
+		atomic { g_flags.bits.state = STATE_LIGHT_SAMPLING; }
+		call SensorADC.getData();
+		return;
+
+	    case STATE_LIGHT_SAMPLING:
+		// SensorADC.dataReady will switch out of this state.
+		return;
+	}
+    }
+
+    task void getTempSample() {
+	switch (g_flags.bits.state) {
+	    case STATE_LIGHT_WARMING:
+	    case STATE_LIGHT_READY:
+	    case STATE_LIGHT_SAMPLING:
+		// If Temperature is busy, repost and try again later.
+		// This will not let the CPU sleep.  Add delay timer.
+		post getLightSample();
+		return;
+
+	    case STATE_IDLE: 
+		// Okay, grab the sensor.
+		switchTempOn();
+		return;
+		
+	    case STATE_TEMP_WARMING:
+		// Warm-up Timer will switch out of this state.
+		return;
+
+	    case STATE_TEMP_READY:
+		// Start the sample.
+		atomic { g_flags.bits.state = STATE_TEMP_SAMPLING; }
+		call SensorADC.getData();
+		return;
+
+	    case STATE_TEMP_SAMPLING:
+		// SensorADC.dataReady will switch out of this state.
+		return;
+	}
+    }
+
+    /** 
+     * Start Temperature data acquisition.  
+     *
+     *   This will post a task which will handle sequential states:
+     *      WARMING, READY, SAMPLING, DONE (IDLE)
+     *   and repost itself until it is completed.
+     *
+     * @return SUCCESS if request accepted, EBUSY if it is refused
+     *    'dataReady' or 'error' will be signaled if SUCCESS is returned
+     */
+    command error_t Temp.getData() {
+	post getTempSample();	
+	return SUCCESS;
+    }
+
+    /** 
+     * Start Light data acquisition.
+     *
+     *   This will post a task which will handle sequential states:
+     *      WARMING, READY, SAMPLING, DONE (IDLE)
+     *   and repost itself until it is completed.
+     *
+     *  @return SUCCESS if request accepted, EBUSY if it is refused
+     *    'dataReady' or 'error' will be signaled if SUCCESS is returned
+     */
+    command error_t Light.getData() {
+	post getLightSample();	
+	return SUCCESS;
+    }
+
+    /** 
+     * Timer to allow either thermistor or light sensor to warm up for 10 msec.
+     */
+    event void WarmUpTimer.fired() {
+	switch (g_flags.bits.state) {
+	    case STATE_LIGHT_WARMING:
+		atomic { g_flags.bits.state = STATE_LIGHT_READY; }
+		post getLightSample();
+		return;
+
+	    case STATE_TEMP_WARMING:
+		atomic { g_flags.bits.state = STATE_TEMP_READY; }
+		post getTempSample();
+		return;
+
+	    default:
+		//ERROR!!!
+		signal Light.error(-1);
+		signal Temp.error(-1);
+      	}
+	// Worst case -- return to the IDLE state so next task can progress !!
+	atomic { g_flags.bits.state = STATE_IDLE; }
+    }
+
+    /** 
+     * Data has been acquired.
+     * @param data Acquired value
+     *   Values are "left-justified" within each 16-bit integer, i.e., if
+     *   the data is acquired with n bits of precision, each value is 
+     *   shifted left by 16-n bits.
+     */
+    event void SensorADC.dataReady(uint16_t data) {
+	switch (g_flags.bits.state) {
+	    case STATE_LIGHT_SAMPLING:
+		signal Light.dataReady(data);
+		break;
+
+	    case STATE_TEMP_SAMPLING:
+		signal Temp.dataReady(data);
+		break;
+
+	    default:
+		//ERROR!!!
+		signal Light.error(data);
+		signal Temp.error(data);
+      	}
+	// ADC.dataReady must return to IDLE state so next task can progress !!
+	atomic { g_flags.bits.state = STATE_IDLE; }
+    }
+
+
+    /** 
+     * Signal that the data acquisition failed
+     * @param info error information
+     */
+    event void SensorADC.error(uint16_t info) {
+	switch (g_flags.bits.state) {
+	    case STATE_LIGHT_SAMPLING:
+		signal Light.error(info);
+		break;
+
+	    case STATE_TEMP_SAMPLING:
+		signal Temp.error(info);
+		break;
+
+	    default:
+		//ERROR!!!
+		signal Light.error(info);
+		signal Temp.error(info);
+      	}
+	// ADC.dataReady must return to IDLE state so next task can progress !!
+	atomic { g_flags.bits.state = STATE_IDLE; }
+    }
+}
+
+
+
+
+
diff --git a/tos/system/AMQueueEntryP.nc b/tos/system/AMQueueEntryP.nc
new file mode 100644
index 00000000..c1c0f380
--- /dev/null
+++ b/tos/system/AMQueueEntryP.nc
@@ -0,0 +1,69 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Internal AM component that fills in needed packet fields for the 
+ * AMSend -> Send transformation.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+generic module AMQueueEntryP(am_id_t amId) {
+  provides interface AMSend;
+  uses{
+    interface Send;
+    interface AMPacket;
+  }
+}
+
+implementation {
+
+  command error_t AMSend.send(am_addr_t dest,
+			      message_t* msg,
+			      uint8_t len) {
+    call AMPacket.setDestination(msg, dest);
+    call AMPacket.setType(msg, amId);
+    return call Send.send(msg, len);
+  }
+
+  command error_t AMSend.cancel(message_t* msg) {
+    return call Send.cancel(msg);
+  }
+
+  event void Send.sendDone(message_t* m, error_t err) {
+    signal AMSend.sendDone(m, err);
+  }
+  
+  command uint8_t AMSend.maxPayloadLength() {
+    return call Send.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload(message_t* m) {
+    return call Send.getPayload(m);
+  }
+  
+}
diff --git a/tos/system/AMQueueImplP.nc b/tos/system/AMQueueImplP.nc
new file mode 100644
index 00000000..aa75dafa
--- /dev/null
+++ b/tos/system/AMQueueImplP.nc
@@ -0,0 +1,187 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * An AM send queue that provides a Service Instance pattern for
+ * formatted packets and calls an underlying AMSend in a round-robin
+ * fashion. Used to share L2 bandwidth between different communication
+ * clients.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+generic module AMQueueImplP(int numClients) {
+  provides interface Send[uint8_t client];
+  uses{
+    interface AMSend[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+  }
+}
+
+implementation {
+
+  
+  enum {
+    QUEUE_EMPTY = 255,
+  };
+
+  typedef struct {
+    message_t* msg;
+  } queue_entry_t;
+  
+  uint8_t current = QUEUE_EMPTY;
+  queue_entry_t queue[numClients];
+
+
+  void tryToSend();
+  
+  void nextPacket() {
+    uint16_t i;
+    uint8_t initial = current;
+    if (initial == QUEUE_EMPTY) {
+      initial = 0;
+    }
+    i = initial;
+    for (; i < (initial + numClients); i++) {
+      uint8_t client = (uint8_t)i % numClients;
+      if (queue[client].msg != NULL) {
+	current = client;
+	return;
+      }
+    }
+    current = QUEUE_EMPTY;
+  }
+  
+
+  /**
+   * Accepts a properly formatted AM packet for later sending.
+   * Assumes that someone has filled in the AM packet fields
+   * (destination, AM type).
+   *
+   * @param msg - the message to send
+   * @param len - the length of the payload
+   *
+   */
+  
+  command error_t Send.send[uint8_t clientId](message_t* msg,
+                                              uint8_t len) {
+    if (clientId > numClients) {return FAIL;}
+    if (queue[clientId].msg != NULL) {return EBUSY;}
+    dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg);
+
+    queue[clientId].msg = msg;
+    call Packet.setPayloadLength(msg, len);
+    
+    if (current == QUEUE_EMPTY) {
+      error_t err;
+      am_id_t amId = call AMPacket.type(msg);
+      am_addr_t dest = call AMPacket.destination(msg);
+
+      dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg);
+      current = clientId;
+
+      err = call AMSend.send[amId](dest, msg, len);
+      if (err != SUCCESS) {
+        dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__);
+	current = QUEUE_EMPTY;
+	queue[clientId].msg = NULL;
+      }
+      return err;
+    }
+    else {
+      dbg("AMQueue", "AMQueue: request to send from %hhu (%p): queue not empty\n", clientId, msg);
+    }
+    return SUCCESS;
+  }
+
+  command error_t Send.cancel[uint8_t clientId](message_t* msg) {
+    if (clientId > numClients ||         // Not a valid client    
+	queue[clientId].msg == NULL ||    // No packet pending
+	queue[clientId].msg != msg) {     // Not the right packet
+      return FAIL;
+    }
+    if (current == clientId) {
+      am_id_t amId = call AMPacket.type(msg);
+      error_t err = call AMSend.cancel[amId](msg);
+      if (err == SUCCESS) {
+	// remove it from the queue
+	nextPacket();
+      }
+      return err;
+    }
+    else {
+      queue[clientId].msg = NULL;
+      return SUCCESS;
+    }
+  }
+
+  task void errorTask() {
+    message_t* msg = queue[current].msg;
+    queue[current].msg = NULL;
+    signal Send.sendDone[current](msg, FAIL);
+    tryToSend();
+  }
+
+  // NOTE: Increments current!
+  void tryToSend() {
+    nextPacket();
+    if (current != QUEUE_EMPTY) {
+      error_t nextErr;
+      message_t* nextMsg = queue[current].msg;
+      am_id_t nextId = call AMPacket.type(nextMsg);
+      am_addr_t nextDest = call AMPacket.destination(nextMsg);
+      uint8_t len = call Packet.payloadLength(nextMsg);
+      nextErr = call AMSend.send[nextId](nextDest, nextMsg, len);
+      if (nextErr != SUCCESS) {
+	post errorTask();
+      }
+    }
+  }
+  
+  event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) {
+    if (queue[current].msg == msg) {
+      uint8_t last = current;
+      dbg("PointerBug", "%s received send done for %p, signaling for %p.\n", __FUNCTION__, msg, queue[current].msg);
+      queue[last].msg = NULL;
+      tryToSend();
+      signal Send.sendDone[last](msg, err);
+    }
+  }
+  
+  command uint8_t Send.maxPayloadLength[uint8_t id]() {
+    return call AMSend.maxPayloadLength[0]();
+  }
+
+  command void* Send.getPayload[uint8_t id](message_t* m) {
+    return call AMSend.getPayload[0](m);
+  }
+
+ default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) {
+   // Do nothing
+ }
+}
diff --git a/tos/system/AMQueueP.nc b/tos/system/AMQueueP.nc
new file mode 100644
index 00000000..415168ed
--- /dev/null
+++ b/tos/system/AMQueueP.nc
@@ -0,0 +1,51 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The fair-share send queue for AM radio communication.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+configuration AMQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_AMQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), ActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> ActiveMessageC;
+  AMQueueImplP.AMPacket -> ActiveMessageC;
+  AMQueueImplP.Packet -> ActiveMessageC;
+  
+}
+
diff --git a/tos/system/AMReceiverC.nc b/tos/system/AMReceiverC.nc
new file mode 100644
index 00000000..b4e6e250
--- /dev/null
+++ b/tos/system/AMReceiverC.nc
@@ -0,0 +1,49 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized AM reception abstraction.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMReceiverC(am_id_t amId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  Receive = ActiveMessageC.Receive[amId];
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+}
diff --git a/tos/system/AMSenderC.nc b/tos/system/AMSenderC.nc
new file mode 100644
index 00000000..eba17537
--- /dev/null
+++ b/tos/system/AMSenderC.nc
@@ -0,0 +1,59 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized active message send abstraction. Each instantiation
+ * of AMSenderC has its own queue of depth one. Therefore, it does not
+ * have to contend with other AMSenderC instantiations for queue space.
+ * The underlying implementation schedules the packets in these queues
+ * using some form of fair-share queueing.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components new AMQueueEntryP(AMId) as AMQueueEntryP;
+  components AMQueueP, ActiveMessageC;
+
+  AMQueueEntryP.Send -> AMQueueP.Send[unique(UQ_AMQUEUE_SEND)];
+  AMQueueEntryP.AMPacket -> ActiveMessageC;
+  
+  AMSend = AMQueueEntryP;
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+  Acks = ActiveMessageC;
+}
diff --git a/tos/system/AMSnooperC.nc b/tos/system/AMSnooperC.nc
new file mode 100644
index 00000000..19ba8358
--- /dev/null
+++ b/tos/system/AMSnooperC.nc
@@ -0,0 +1,50 @@
+// $Id$
+/*
+ * "Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualization of snooping on overheard packets that are not
+ * destined to this node. 
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSnooperC(am_id_t AMId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  Receive = ActiveMessageC.Snoop[AMId];
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+}
diff --git a/tos/system/AMSnoopingReceiverC.nc b/tos/system/AMSnoopingReceiverC.nc
new file mode 100644
index 00000000..8ee33837
--- /dev/null
+++ b/tos/system/AMSnoopingReceiverC.nc
@@ -0,0 +1,51 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized abstraction to hearing all packets of a given AM type,
+ * whether destined for this node or not.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSnoopingReceiverC(am_id_t AMId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageImpl;
+
+  Receive = ActiveMessageImpl.Snoop[AMId];
+  Receive = ActiveMessageImpl.Receive[AMId];
+  Packet = ActiveMessageImpl;
+  AMPacket = ActiveMessageImpl;
+}
diff --git a/tos/system/ActiveMessageAddressC.nc b/tos/system/ActiveMessageAddressC.nc
new file mode 100644
index 00000000..a6fa6dd6
--- /dev/null
+++ b/tos/system/ActiveMessageAddressC.nc
@@ -0,0 +1,64 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ * Component that stores the node's active message address.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+module ActiveMessageAddressC  {
+  provides async command am_addr_t amAddress();
+  provides async command void setAmAddress(am_addr_t a);
+}
+implementation {
+  am_addr_t addr = TOS_AM_ADDRESS;
+
+  /**
+   * Get the node's default AM address.
+   * @return address
+   */
+  async command am_addr_t amAddress() {
+    return addr;
+  }
+  
+  /**
+   * Set the node's default AM address.
+   *
+   * @param a - the address.
+   */
+  async command void setAmAddress(am_addr_t a) {
+    addr = a;
+  }
+}
diff --git a/tos/system/ActiveMessageImplP.nc b/tos/system/ActiveMessageImplP.nc
new file mode 100644
index 00000000..264fb357
--- /dev/null
+++ b/tos/system/ActiveMessageImplP.nc
@@ -0,0 +1,64 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * The underlying configuration of the AM layer.  and exports
+ * the AM interfaces. Deprecated and so should not be wired to.
+ *
+ * @author Philip Levis
+ * @date   January 5 2005
+ */ 
+
+#include "AM.h"
+
+configuration ActiveMessageImplP {
+  provides {
+    interface SplitControl;      
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  SplitControl = ActiveMessageC;
+  AMSend = ActiveMessageC;
+  Receive = ActiveMessageC.Receive;
+  Snoop = ActiveMessageC.Snoop;
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+  PacketAcknowledgements = ActiveMessageC;
+}
diff --git a/tos/system/ArbitratedReadC.nc b/tos/system/ArbitratedReadC.nc
new file mode 100644
index 00000000..ead23acc
--- /dev/null
+++ b/tos/system/ArbitratedReadC.nc
@@ -0,0 +1,57 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a Read interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. See tos/chips/atm128/adc for an example of using ArbitratedReadC 
+ * in a safe way.
+ *
+ * @param width_t Width of the underlying Read interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadC(typedef width_t) {
+  provides interface Read[uint8_t client];
+  uses {
+    interface Read as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  command error_t Read.read[uint8_t client]() {
+#if 1
+    return call Resource.request[client]();
+#else
+    signal Resource.granted[client]();
+    return SUCCESS;
+#endif
+  }
+
+  event void Resource.granted[uint8_t client]() {
+    call Service.read[client]();
+  }
+
+  event void Service.readDone[uint8_t client](error_t result, width_t data) {
+    call Resource.release[client]();
+    signal Read.readDone[client](result, data);
+  }
+
+  default async command error_t Resource.request[uint8_t client]() { 
+    return FAIL; 
+  }
+  default async command void Resource.release[uint8_t client]() { }
+  default event void Read.readDone[uint8_t client](error_t result, width_t data) { }
+  default command error_t Service.read[uint8_t client]() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/system/ArbitratedReadNowC.nc b/tos/system/ArbitratedReadNowC.nc
new file mode 100644
index 00000000..43975457
--- /dev/null
+++ b/tos/system/ArbitratedReadNowC.nc
@@ -0,0 +1,54 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a ReadNow interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. 
+ *
+ * @param width_t Width of the underlying ReadNow interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadNowC(typedef width_t) {
+  provides interface ReadNow[uint8_t client];
+  uses {
+    interface ReadNow as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  async command error_t ReadNow.read[uint8_t client]() {
+    error_t req = call Resource.immediateRequest[client]();
+
+    if (req != SUCCESS)
+      return req;
+
+    call Service.read[client]();
+    return SUCCESS;
+  }
+
+  async event void Service.readDone[uint8_t client](error_t result, width_t data) {
+    call Resource.release[client]();
+    signal ReadNow.readDone[client](result, data);
+  }
+
+  default async command error_t Resource.immediateRequest[uint8_t client]() { 
+    return FAIL; 
+  }
+  default async command void Resource.release[uint8_t client]() { }
+  default async event void ReadNow.readDone[uint8_t client](error_t result, width_t data) { }
+  default async command error_t Service.read[uint8_t client]() {
+    return SUCCESS;
+  }
+  event void Resource.granted[uint8_t client]() { }
+}
diff --git a/tos/system/ArbitratedReadStreamC.nc b/tos/system/ArbitratedReadStreamC.nc
new file mode 100644
index 00000000..c1af8c3d
--- /dev/null
+++ b/tos/system/ArbitratedReadStreamC.nc
@@ -0,0 +1,86 @@
+/* $Id$
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a Read interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. See tos/chips/atm128/adc for an example of using
+ * ArbitratedReadStreamC in a safe way.
+ *
+ * @param width_t Width of the underlying ReadStream interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadStreamC(uint8_t nClients, typedef val_t) {
+  provides interface ReadStream[uint8_t client];
+  uses {
+    interface ReadStream as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  uint32_t period[nClients];
+
+  command error_t ReadStream.postBuffer[uint8_t client](val_t* buf, uint16_t count)
+  {
+    return call Service.postBuffer[client](buf, count);
+  }
+
+  command error_t ReadStream.read[uint8_t client](uint32_t usPeriod)
+  {
+    error_t ok = call Resource.request[client]();
+
+    if (ok == SUCCESS)
+      period[client] = usPeriod;
+
+    return ok;
+  }
+
+  event void Service.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
+  {
+    signal ReadStream.bufferDone[client](result, buf, count);
+  }
+
+  event void Service.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
+  {
+    call Resource.release[client]();
+    signal ReadStream.readDone[client](result, actualPeriod);
+  }
+
+  event void Resource.granted[uint8_t client]() {
+    call Service.read[client](period[client]);
+  }
+
+  /* Defaults to keep compiler happy */
+  default async command error_t Resource.request[uint8_t client]() { 
+    return SUCCESS; 
+  }
+  default async command void Resource.release[uint8_t client]() { }
+
+  default command error_t Service.postBuffer[uint8_t client](val_t* buf, uint16_t count)
+  {
+    return FAIL;
+  }
+
+  default command error_t Service.read[uint8_t client](uint32_t usPeriod)
+  {
+    return FAIL;
+  }
+
+  default event void ReadStream.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
+  {
+  }
+
+  default event void ReadStream.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
+  {
+  }
+}
diff --git a/tos/system/BitVectorC.nc b/tos/system/BitVectorC.nc
new file mode 100644
index 00000000..b3387934
--- /dev/null
+++ b/tos/system/BitVectorC.nc
@@ -0,0 +1,109 @@
+//$Id$
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Generic bit vector implementation. Note that if you use this bit vector
+ * from interrupt code, you must use appropriate atomic
+ * statements to ensure atomicity.
+ *
+ * @param max_bits Bit vector length.
+ *
+ * @author Cory Sharp 
+ */
+
+generic module BitVectorC(uint16_t max_bits)
+{
+  provides interface Init;
+  provides interface BitVector;
+}
+implementation
+{
+  typedef uint8_t int_type;
+
+  enum
+  {
+    ELEMENT_SIZE = 8*sizeof(int_type),
+    ARRAY_SIZE = (max_bits + ELEMENT_SIZE-1) / ELEMENT_SIZE,
+  };
+
+  int_type m_bits[ ARRAY_SIZE ];
+
+  uint16_t getIndex(uint16_t bitnum)
+  {
+    return bitnum / ELEMENT_SIZE;
+  }
+
+  uint16_t getMask(uint16_t bitnum)
+  {
+    return 1 << (bitnum % ELEMENT_SIZE);
+  }
+
+  command error_t Init.init()
+  {
+    call BitVector.clearAll();
+    return SUCCESS;
+  }
+
+  async command void BitVector.clearAll()
+  {
+    memset(m_bits, 0, sizeof(m_bits));
+  }
+
+  async command void BitVector.setAll()
+  {
+    memset(m_bits, 255, sizeof(m_bits));
+  }
+
+  async command bool BitVector.get(uint16_t bitnum)
+  {
+    return (m_bits[getIndex(bitnum)] & getMask(bitnum)) ? TRUE : FALSE;
+  }
+
+  async command void BitVector.set(uint16_t bitnum)
+  {
+    m_bits[getIndex(bitnum)] |= getMask(bitnum);
+  }
+
+  async command void BitVector.clear(uint16_t bitnum)
+  {
+    m_bits[getIndex(bitnum)] &= ~getMask(bitnum);
+  }
+
+  async command void BitVector.toggle(uint16_t bitnum)
+  {
+    m_bits[getIndex(bitnum)] ^= getMask(bitnum);
+  }
+
+  async command void BitVector.assign(uint16_t bitnum, bool value)
+  {
+    if(value)
+      call BitVector.set(bitnum);
+    else
+      call BitVector.clear(bitnum);
+  }
+
+  async command uint16_t BitVector.size()
+  {
+    return max_bits;
+  }
+}
+
diff --git a/tos/system/ConstantSensorC.nc b/tos/system/ConstantSensorC.nc
new file mode 100644
index 00000000..d567f82c
--- /dev/null
+++ b/tos/system/ConstantSensorC.nc
@@ -0,0 +1,47 @@
+/// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ *
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ *
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * Simple sensor emulator that just outputs a constant value. 
+ *
+ * @author Philip Levis
+ * @date   Oct 31 2005
+ */
+  
+generic module ConstantSensorC(typedef width_t @integer(), uint32_t val) { 
+  provides interface Read;
+}
+implementation
+{
+  task void senseResult() {
+    signal Read.readDone(SUCCESS, val);
+  }
+
+  command error_t Read.read() {
+    return post senseResult();
+  }
+  
+}
diff --git a/tos/system/FcfsArbiterC.nc b/tos/system/FcfsArbiterC.nc
new file mode 100644
index 00000000..386976c6
--- /dev/null
+++ b/tos/system/FcfsArbiterC.nc
@@ -0,0 +1,341 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.

    
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in FCFS order)
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource becomes idle and any
+ * user can put in a request and immediately receive access to the
+ * Resource.
+ *
+ * @param resourceName -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic module FcfsArbiterC(char resourceName[]) {
+  provides {
+    interface Init;
+    interface Resource[uint8_t id];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+  }
+}
+implementation {
+
+  enum {RES_IDLE, RES_GRANTING, RES_BUSY};
+  enum {NO_RES = 0xFF};
+  enum {CONTROLLER_ID = uniqueCount(resourceName) + 1};
+
+  uint8_t state = RES_IDLE;
+  uint8_t resId = NO_RES;
+  uint8_t reqResId = NO_RES;
+  uint8_t resQ[uniqueCount(resourceName)];
+  uint8_t qHead = NO_RES;
+  uint8_t qTail = NO_RES;
+  bool irp = FALSE;
+  
+  task void grantedTask();
+  task void requestedTask();
+  error_t queueRequest(uint8_t id);
+  void grantNextRequest();
+  
+  bool requested(uint8_t id) {
+    return resQ[id] != NO_RES || qTail == id;
+  }
+
+  /**  
+    Initialize the Arbiter to the idle state
+  */
+  command error_t Init.init() {
+    memset( resQ, NO_RES, sizeof( resQ ) );
+    return SUCCESS;
+  }  
+  
+  /**
+    Request the use of the shared resource
+    
+    If the user has not already requested access to the 
+    resource, the request will be either served immediately 
+    or queued for later service in an FCFS fashion.  
+    A SUCCESS value will be returned and the user will receive 
+    the granted() event in synchronous context once it has 
+    been given access to the resource.
+    
+    Whenever requests are queued, the current owner of the bus 
+    will receive a requested() event, notifying him that another
+    user would like to have access to the resource.
+    
+    If the user has already requested access to the resource and
+    is waiting on a pending granted() event, an EBUSY value will 
+    be returned to the caller.
+  */
+  async command error_t Resource.request[uint8_t id]() {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      if(resId == CONTROLLER_ID)
+        post requestedTask();
+      return queueRequest( id );
+    }
+  } 
+
+  async command error_t ResourceController.request() {
+    return call Resource.request[CONTROLLER_ID]();
+  }
+  
+  /**
+  * Request immediate access to the shared resource.  Requests are
+  * not queued, and no granted event is returned.  A return value 
+  * of SUCCESS signifies that the resource has been granted to you,
+  * while a return value of EBUSY signifies that the resource is 
+  * currently being used.
+  */
+  uint8_t tryImmediateRequest(uint8_t id) {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_BUSY;
+        resId = id;
+        return id;
+      }
+      return resId;
+    }     
+  }
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    uint8_t ownerId = tryImmediateRequest(id);
+
+    if(ownerId == id) {
+      call ResourceConfigure.configure[id]();
+      return SUCCESS;
+    }
+    else if(ownerId == CONTROLLER_ID){
+      atomic {
+        irp = TRUE;  //indicate that immediateRequest is pending
+        reqResId = id; //Id to grant resource to if can
+      }  
+      signal ResourceController.requested();
+      atomic {
+        ownerId = resId;   //See if I have been granted the resource
+        irp = FALSE;  //Indicate that immediate request no longer pending
+      }
+      if(ownerId == id) {
+        call ResourceConfigure.configure[id]();
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+    else return EBUSY;
+  }  
+  async command error_t ResourceController.immediateRequest() {
+    return call Resource.immediateRequest[CONTROLLER_ID]();
+  }
+ 
+  /**
+    Release the use of the shared resource
+    
+    The resource will only actually be released if
+    there are no pending requests for the resource.
+    If requests are pending, then the next pending request
+    will be serviced, according to a Fist come first serve
+    arbitration scheme.  If no requests are currently 
+    pending, then the resource is released, and any 
+    users can put in a request for immediate access to 
+    the resource.
+  */
+  async command void Resource.release[uint8_t id]() {
+    uint8_t currentState;
+    atomic {
+      if (state == RES_BUSY && resId == id) {
+        if (irp)
+          resId = reqResId;
+	else grantNextRequest();
+	call ResourceConfigure.unconfigure[id]();
+      }
+      currentState = state;
+    }
+    if(currentState == RES_IDLE)
+      signal ResourceController.idle();
+  } 
+  async command void ResourceController.release() {
+    call Resource.release[CONTROLLER_ID]();
+  }
+    
+  /**
+    Check if the Resource is currently in use
+  */    
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if ( state == RES_IDLE )
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */      
+  async command uint8_t ArbiterInfo.userId() {
+    atomic return resId;
+  }
+
+  /**
+   * Returns my user id.
+   */      
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id) return TRUE;
+      else return FALSE;
+    }
+  }
+  async command uint8_t ResourceController.isOwner() {
+    return call Resource.isOwner[CONTROLLER_ID]();
+  }
+  
+  //Grant a request to the next Pending user
+    //in FCFS order
+  void grantNextRequest() {
+    resId = NO_RES;
+    if(qHead != NO_RES) {
+      uint8_t id = qHead;
+      qHead = resQ[qHead];
+      if(qHead == NO_RES)
+        qTail = NO_RES;
+      resQ[id] = NO_RES;
+      reqResId = id;
+      state = RES_GRANTING;
+      post grantedTask();
+    }
+    else {
+      state = RES_IDLE;
+    }
+  }
+  
+  //Queue the requests so that they can be granted
+    //in FCFS order after release of the resource
+  error_t queueRequest(uint8_t id) {
+    atomic {
+      if( !requested( id ) ) { 
+	      if(qHead == NO_RES )
+	        qHead = id;
+	      else
+	        resQ[qTail] = id;
+	      qTail = id;
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+  }
+  
+  //Task for pulling the Resource.granted() signal
+    //into synchronous context  
+  task void grantedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId = reqResId;
+      state = RES_BUSY;
+    }
+    call ResourceConfigure.configure[tmpId]();
+    signal Resource.granted[tmpId]();
+  }
+
+  //Task for pulling the ResourceController.requested() signal
+    //into synchronous context  
+  task void requestedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId;
+    }
+    if(tmpId == CONTROLLER_ID)
+      signal ResourceController.requested();
+  }
+  
+  //Default event/command handlers for all of the other
+    //potential users/providers of the parameterized interfaces 
+    //that have not been connected to.  
+  default event void Resource.granted[uint8_t id]() {
+    signal ResourceController.granted();
+  }
+  default event void ResourceController.granted() {
+  }
+  default async event void ResourceController.requested() {
+  }
+  default async event void ResourceController.idle() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/FcfsPriorityArbiterC.nc b/tos/system/FcfsPriorityArbiterC.nc
new file mode 100644
index 00000000..93adc231
--- /dev/null
+++ b/tos/system/FcfsPriorityArbiterC.nc
@@ -0,0 +1,403 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$
+ * ========================================================================
+ */
+
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.

    
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  An additional ResourceController interface is
+ * provided to allow clients of differing Priorities to control the
+ * Resource according to some policy implemented in an external
+ * component. This component provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in first-come
+ * first-served order) that has a pending request will ge granted control
+ * of the resource.  If there are no pending requests, then the resource
+ * becomes idle and any user can put in a request and immediately receive
+ * access to the Resource.
+ *
+ * @param resourceName -- The name of the Resource being shared
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ * @author Philipp Huppertz
+ */
+
+generic module FcfsPriorityArbiterC(char resourceName[]) {
+  provides {
+    interface Init;
+    interface Resource[uint8_t id];
+    interface ResourceController as HighPriorityClient;
+    interface ResourceController as LowPriorityClient;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+  }
+}
+implementation {
+
+  enum {RES_IDLE, RES_GRANTING, RES_BUSY};
+  enum {NO_RES = 0xFF};
+  enum {LOW_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 1};
+  enum {HIGH_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 2};
+
+  uint8_t state = RES_IDLE;
+  uint8_t resId = NO_RES;
+  uint8_t reqResId = NO_RES;
+  uint8_t resQ[uniqueCount(resourceName)];
+  uint8_t qHead = NO_RES;
+  uint8_t qTail = NO_RES;
+  bool hpreq = FALSE;   // request from the high priority client
+  bool irp = FALSE;     // immediate request pending
+
+  task void grantedTask();
+  error_t queueRequest(uint8_t id);
+  void grantNextRequest();
+
+  bool requested(uint8_t id) {
+    return ( ( resQ[id] != NO_RES ) || ( qTail == id ) );
+  }
+
+  /**
+    Initialize the Arbiter to the idle state
+  */
+  command error_t Init.init() {
+    memset( resQ, NO_RES, sizeof( resQ ) );
+    return SUCCESS;
+  }
+
+  /**
+    Request the use of the shared resource
+
+    If the user has not already requested access to the
+    resource, the request will be either served immediately
+    or queued for later service in an FCFS fashion.
+    A SUCCESS value will be returned and the user will receive
+    the granted() event in synchronous context once it has
+    been given access to the resource.
+
+    Whenever requests are queued, the highest priority client
+    will receive a requested() event after he receives granted(),
+    notifying him that another user would like to have access to the resource.
+
+    If the user has already requested access to the resource and
+    is waiting on a pending granted() event, an EBUSY value will
+    be returned to the caller.
+  */
+  async command error_t Resource.request[uint8_t id]() {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      if (resId == LOW_PRIORITY_CLIENT_ID)  {
+        signal LowPriorityClient.requested();
+      } else if (resId == HIGH_PRIORITY_CLIENT_ID) {
+        signal HighPriorityClient.requested();
+      }
+      return queueRequest( id );
+    }
+  }
+
+  async command error_t LowPriorityClient.request() {
+    atomic {
+      if((state == RES_IDLE) && (!hpreq)) {
+        state = RES_GRANTING;
+        reqResId = LOW_PRIORITY_CLIENT_ID;
+        post grantedTask();
+        return SUCCESS;
+      }
+    }
+    return EBUSY;
+  }
+
+  async command error_t HighPriorityClient.request() {
+    atomic {
+      if (resId == LOW_PRIORITY_CLIENT_ID)  {
+        signal LowPriorityClient.requested();
+      }
+      hpreq = TRUE;
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = HIGH_PRIORITY_CLIENT_ID;
+        post grantedTask();
+      }
+      return SUCCESS;
+    }
+  }
+
+  /**
+  * Request immediate access to the shared resource.  Requests are
+  * not queued, and no granted event is returned.  A return value
+  * of SUCCESS signifies that the resource has been granted to you,
+  * while a return value of EBUSY signifies that the resource is
+  * currently being used.
+  */
+  uint8_t tryImmediateRequest(uint8_t id) {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_BUSY;
+        resId = id;
+        return id;
+      }
+      return resId;
+    }
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    uint8_t ownerId = tryImmediateRequest(id);
+
+    if(ownerId == id) {
+      call ResourceConfigure.configure[id]();
+      return SUCCESS;
+    } else if( ownerId == LOW_PRIORITY_CLIENT_ID ){
+      atomic {
+        irp = TRUE;     //indicate that immediateRequest is pending
+        reqResId = id;  //Id to grant resource to if can
+      }
+      signal LowPriorityClient.requested();
+      atomic {
+        ownerId = resId;   //See if I have been granted the resource
+        irp = FALSE;       //Indicate that immediate request no longer pending
+      }
+      if(ownerId == id) {
+        call ResourceConfigure.configure[id]();
+        return SUCCESS;
+      }
+      return EBUSY;
+    } else {
+      return EBUSY;
+    }
+  }
+
+  async command error_t LowPriorityClient.immediateRequest() {
+    return call Resource.immediateRequest[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command error_t HighPriorityClient.immediateRequest() {
+    return call Resource.immediateRequest[HIGH_PRIORITY_CLIENT_ID]();
+  }
+
+  /**
+    Release the use of the shared resource
+
+    The resource will only actually be released if
+    there are no pending requests for the resource.
+    If requests are pending, then the next pending request
+    will be serviced, according to a Fist come first serve
+    arbitration scheme.  If no requests are currently
+    pending, then the resource is released, and any
+    users can put in a request for immediate access to
+    the resource.
+  */
+  async command void Resource.release[uint8_t id]() {
+    uint8_t currentState;
+    atomic {
+      if (state == RES_BUSY && resId == id) {
+        if (irp)
+          resId = reqResId;
+        else grantNextRequest();
+	call ResourceConfigure.unconfigure[id]();
+      }
+      currentState = state;
+    }
+    if (currentState == RES_IDLE)  {
+      signal HighPriorityClient.idle();
+      signal LowPriorityClient.idle();
+    }
+  }
+  async command void LowPriorityClient.release() {
+    call Resource.release[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command void HighPriorityClient.release() {
+    call Resource.release[HIGH_PRIORITY_CLIENT_ID]();
+  }
+  /**
+    Check if the Resource is currently in use
+  */
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if ( state == RES_IDLE )
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */
+  async command uint8_t ArbiterInfo.userId() {
+    atomic return resId;
+  }
+
+  /**
+   * Returns my user id.
+   */
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id) return TRUE;
+      else return FALSE;
+    }
+  }
+  async command uint8_t LowPriorityClient.isOwner() {
+    return call Resource.isOwner[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command uint8_t HighPriorityClient.isOwner() {
+    return call Resource.isOwner[HIGH_PRIORITY_CLIENT_ID]();
+  }
+
+  //Grant a request to the next Pending user
+    //in FCFS order
+  void grantNextRequest() {
+    resId = NO_RES;
+    // do not grant, if highest priority client had the resource before
+    if ( (hpreq) && (resId != HIGH_PRIORITY_CLIENT_ID) ) {
+      atomic {
+        hpreq = FALSE;
+      }
+      reqResId = HIGH_PRIORITY_CLIENT_ID;
+      state = RES_GRANTING;
+      post grantedTask();
+    } else {
+      if(qHead != NO_RES) {
+        uint8_t id = qHead;
+        qHead = resQ[qHead];
+        if(qHead == NO_RES) {
+          qTail = NO_RES;
+        }
+        resQ[id] = NO_RES;
+        reqResId = id;
+        state = RES_GRANTING;
+        post grantedTask();
+      } else {
+        state = RES_IDLE;
+      }
+    }
+  }
+
+  //Queue the requests so that they can be granted
+    //in FCFS order after release of the resource
+  error_t queueRequest(uint8_t id) {
+    atomic {
+      if( !requested( id ) ) {
+        if(qHead == NO_RES ) {
+          qHead = id;
+        } else {
+          resQ[qTail] = id;
+        }
+        qTail = id;
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+  }
+
+  //Task for pulling the Resource.granted() signal
+    //into synchronous context
+  task void grantedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId = reqResId;
+      state = RES_BUSY;
+    }
+    if (tmpId == HIGH_PRIORITY_CLIENT_ID) {
+      signal HighPriorityClient.granted();
+      // lets throw pending request at him...
+      atomic {
+        if (qHead != NO_RES) {
+        signal HighPriorityClient.requested();
+        }
+      }
+    } else if (tmpId == LOW_PRIORITY_CLIENT_ID) {
+      signal LowPriorityClient.granted();
+    } else {
+      call ResourceConfigure.configure[tmpId]();
+      signal Resource.granted[tmpId]();
+    }
+  }
+
+  //Default event/command handlers for all of the other
+    //potential users/providers of the parameterized interfaces
+    //that have not been connected to.
+  default event void Resource.granted[uint8_t id]() {
+      signal LowPriorityClient.granted();
+  }
+  default event void LowPriorityClient.granted() {
+  }
+  default async event void LowPriorityClient.requested() {
+  }
+  default async event void LowPriorityClient.idle() {
+  }
+  default event void HighPriorityClient.granted() {
+  }
+  default async event void HighPriorityClient.requested() {
+  }
+  default async event void HighPriorityClient.idle() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/LedsC.nc b/tos/system/LedsC.nc
new file mode 100644
index 00000000..74005ac7
--- /dev/null
+++ b/tos/system/LedsC.nc
@@ -0,0 +1,47 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/**
+ *
+ * The basic TinyOS LEDs abstraction.
+ *
+ * @author Phil Buonadonna
+ * @author David Gay
+ * @author Philip Levis
+ * @author Joe Polastre
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+}
+
diff --git a/tos/system/LedsP.nc b/tos/system/LedsP.nc
new file mode 100644
index 00000000..69106ae3
--- /dev/null
+++ b/tos/system/LedsP.nc
@@ -0,0 +1,147 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/system/LruIntCacheC.nc b/tos/system/LruIntCacheC.nc
new file mode 100644
index 00000000..1a8248bf
--- /dev/null
+++ b/tos/system/LruIntCacheC.nc
@@ -0,0 +1,37 @@
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+  * An LRU cache of integers, where insertion represents use.
+  *
+  * @author Rodrigo Fonseca
+  */
+
+generic configuration LruIntCacheC(typedef  cache_key_t@integer(), uint8_t CACHE_SIZE) {
+    provides interface Cache;
+}
+implementation {
+    components MainC, new LruIntCacheP(cache_key_t, CACHE_SIZE) as CacheP;
+    
+    Cache = CacheP;
+    MainC.SoftwareInit -> CacheP;
+}
diff --git a/tos/system/LruIntCacheP.nc b/tos/system/LruIntCacheP.nc
new file mode 100644
index 00000000..040a1165
--- /dev/null
+++ b/tos/system/LruIntCacheP.nc
@@ -0,0 +1,116 @@
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * An LRU cache that stores integer values, where an insert operation
+ * indicates "use".  Inserting an element not in the cache will replace 
+ * the oldest, and inserting an element already in the cache will refresh 
+ * its age.
+ *
+ * @author Rodrigo Fonseca
+ * @author Philip Levis 
+ */
+
+generic module LruIntCacheP(typedef cache_key_t @integer(), uint8_t size) {
+    provides {
+        interface Init;
+        interface Cache;
+    }
+}
+implementation {
+    cache_key_t cache[size];
+    uint8_t first;
+    uint8_t count;
+
+    command error_t Init.init() {
+        first = 0;
+        count = 0;
+        return SUCCESS;
+    } 
+
+    void printCache() {
+#ifdef TOSSIM
+        int i;
+        dbg("Cache","Cache:");
+        for (i = 0; i < count; i++) {
+            dbg_clear("Cache", " %08x", cache[i]);
+            if (i == first)
+                dbg_clear("Cache","*");
+        } 
+        dbg_clear("Cache","\n");
+#endif
+    }
+
+    /* if key is in cache returns the index (offset by first), otherwise returns count */
+    uint8_t lookup(cache_key_t key) {
+        uint8_t i;
+	cache_key_t k;
+        for (i = 0; i < count; i++) {
+	   k = cache[(i + first) % size];
+           if (k == key)
+            break; 
+        }
+        return i;
+    }
+
+    /* remove the entry with index i (relative to first) */
+    void remove(uint8_t i) {
+        uint8_t j;
+        if (i >= count) 
+            return;
+        if (i == 0) {
+            //shift all by moving first
+            first = (first + 1) % size;
+        } else {
+            //shift everyone down
+            for (j = i; j < count; j++) {
+                cache[(j + first) % size] = cache[(j + first + 1) % size];
+            }
+        }
+        count--;
+    }
+
+    command void Cache.insert(cache_key_t key) {
+        uint8_t i;
+        if (count == size ) {
+            //remove someone. If item not in 
+            //cache, remove the first item.
+            //otherwise remove the item temporarily for
+            //reinsertion. This moves the item up in the
+            //LRU stack.
+            i = lookup(key);
+            remove(i % count);
+        }
+        //now count < size
+        cache[(first + count) % size] = key;
+        count++;
+    }
+
+    command bool Cache.lookup(cache_key_t key) {
+        return (lookup(key) < count);
+    }
+
+    command void Cache.flush() {
+      call Init.init(); 
+    }
+
+}
diff --git a/tos/system/MainC.nc b/tos/system/MainC.nc
new file mode 100644
index 00000000..c776a019
--- /dev/null
+++ b/tos/system/MainC.nc
@@ -0,0 +1,59 @@
+// $Id$
+
+/*                                                                      tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id$
+ */
+
+/**
+ * MainC is the system interface the TinyOS boot sequence. It wires the
+ * boot sequence implementation to the scheduler and hardware resources.
+ *
+ * @author Philip Levis
+ * @date   August 6 2005
+ * @see    TEP 107: Boot Sequence
+ */
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+
+  RealMainP.Scheduler -> TinySchedulerC;
+  RealMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = RealMainP;
+}
+
diff --git a/tos/system/NoArbiterC.nc b/tos/system/NoArbiterC.nc
new file mode 100644
index 00000000..1d02f5b9
--- /dev/null
+++ b/tos/system/NoArbiterC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A do-nothing arbiter for non-shared resources which need to pretend to
+ * have arbitration. Just grants all requests, without any error
+ * checking. Does still call ResourceConfigure at the right time.
+ *
+ * @author David Gay
+ */
+
+generic module NoArbiterC() {
+  provides interface Resource;
+  uses interface ResourceConfigure;
+}
+implementation {
+  task void granted() {
+    call ResourceConfigure.configure();
+    signal Resource.granted();
+  }
+
+  async command error_t Resource.request() {
+    post granted();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest() {
+    call ResourceConfigure.configure();
+    return SUCCESS;
+  }  
+
+  async command void Resource.release() {
+    call ResourceConfigure.unconfigure();
+  } 
+
+  async command uint8_t Resource.isOwner() {
+    return TRUE;
+  }
+
+  default async command void ResourceConfigure.configure() { }
+  default async command void ResourceConfigure.unconfigure() { }
+}
diff --git a/tos/system/NoInitC.nc b/tos/system/NoInitC.nc
new file mode 100644
index 00000000..eb87214c
--- /dev/null
+++ b/tos/system/NoInitC.nc
@@ -0,0 +1,25 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A do-nothing Init implementation. Useful for implementing components whose
+ * specification has an Init, but whose implementation doesn't need one.
+ *
+ * @author David Gay 
+ */
+module NoInitC 
+{
+  provides interface Init;
+}
+implementation
+{
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/system/NoLedsC.nc b/tos/system/NoLedsC.nc
new file mode 100644
index 00000000..186c91f2
--- /dev/null
+++ b/tos/system/NoLedsC.nc
@@ -0,0 +1,44 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * A null operation replacement for the LedsC component. As many
+ * components might concurrently signal information through LEDs,
+ * using LedsC and NoLedsC allows an application builder to select
+ * which components control the LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ */
+
+
+configuration NoLedsC {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+  components NoLedsP;
+  Init = NoLedsP;
+  Leds = NoLedsP;
+}
+
diff --git a/tos/system/NoLedsP.nc b/tos/system/NoLedsP.nc
new file mode 100644
index 00000000..c6d7d981
--- /dev/null
+++ b/tos/system/NoLedsP.nc
@@ -0,0 +1,54 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The implementation of the NoLedsC component: every call is a null
+ * operation. See NoLedsC.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ */
+
+module NoLedsP {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+
+  command error_t Init.init() {return SUCCESS;}
+
+  async command void Leds.led0On() {}
+  async command void Leds.led0Off() {}
+  async command void Leds.led0Toggle() {}
+
+  async command void Leds.led1On() {}
+  async command void Leds.led1Off() {}
+  async command void Leds.led1Toggle() {}
+
+  async command void Leds.led2On() {}
+  async command void Leds.led2Off() {}
+  async command void Leds.led2Toggle() {}
+
+  async command uint8_t Leds.get() {return 0;}
+  async command void Leds.set(uint8_t val) {}
+}
diff --git a/tos/system/NoPinC.nc b/tos/system/NoPinC.nc
new file mode 100644
index 00000000..833f75f6
--- /dev/null
+++ b/tos/system/NoPinC.nc
@@ -0,0 +1,29 @@
+/* $Id$
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy pin component.
+ *
+ * @author David Gay
+ */
+
+generic module NoPinC()
+{
+  provides interface GeneralIO;
+}
+implementation
+{
+  async command bool GeneralIO.get() { return 0; }
+  async command void GeneralIO.set() { }
+  async command void GeneralIO.clr() { }
+  async command void GeneralIO.toggle() { }
+  async command void GeneralIO.makeInput() { }
+  async command void GeneralIO.makeOutput() { }
+}
+
diff --git a/tos/system/PoolC.nc b/tos/system/PoolC.nc
new file mode 100644
index 00000000..511bff10
--- /dev/null
+++ b/tos/system/PoolC.nc
@@ -0,0 +1,49 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A general dynamic memory pool component.
+ *
+ *  @author Philip Levis
+ *  @date   $Date$
+ */
+
+generic configuration PoolC(typedef pool_t, uint8_t POOL_SIZE) {
+  provides interface Pool;
+} 
+
+implementation {
+  components MainC, new PoolP(pool_t, POOL_SIZE);
+
+  MainC.SoftwareInit -> PoolP;
+  Pool = PoolP;
+}
diff --git a/tos/system/PoolP.nc b/tos/system/PoolP.nc
new file mode 100644
index 00000000..960b03ba
--- /dev/null
+++ b/tos/system/PoolP.nc
@@ -0,0 +1,107 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ *  Implementation of a general dynamic memory pool component.
+ *  Note that the allocation/deallocation policies are 
+ *  different than traditional dynamic allocators such as
+ *  malloc or slab allocators. When initialized, the Pool
+ *  contains size items of type pool_t.
+ *  These elements can be removed from the pool for use with 
+ *  Pool.get, and new elements can be placed in
+ *  the pool with Pool.put. The pool allows 
+ *  components to put elements besides those which
+ *  were obtained with get. The pool can never have
+ *  more than size elements in it.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date$
+ */
+
+generic module PoolP(typedef pool_t, uint8_t size) {
+  provides {
+    interface Init;
+    interface Pool;
+  }
+}
+implementation {
+  uint8_t free;
+  uint8_t index;
+  pool_t* queue[size];
+  pool_t pool[size];
+
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < size; i++) {
+      queue[i] = &pool[i];
+    }
+    free = size;
+    index = 0;
+    return SUCCESS;
+  }
+  
+  command bool Pool.empty() {
+    return free == 0;
+  }
+  command uint8_t Pool.size() {
+    return free;
+  }
+    
+  command uint8_t Pool.maxSize() {
+    return size;
+  }
+
+  command pool_t* Pool.get() {
+    if (free) {
+      pool_t* rval = queue[index];
+      queue[index] = NULL;
+      free--;
+      index = (index + 1) % size;
+      return rval;
+    }
+    return NULL;
+  }
+
+  command error_t Pool.put(pool_t* newVal) {
+    if (free >= size) {
+      return FAIL;
+    }
+    else {
+      uint8_t emptyIndex = (index + free) % size;
+      queue[emptyIndex] = newVal;
+      free++;
+      return SUCCESS;
+    }
+  }
+}
diff --git a/tos/system/QueueC.nc b/tos/system/QueueC.nc
new file mode 100644
index 00000000..c1fcfd08
--- /dev/null
+++ b/tos/system/QueueC.nc
@@ -0,0 +1,117 @@
+/* $Id$ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A general FIFO queue component, whose queue has a bounded size.
+ *
+ *  @author Philip Levis
+ *  @date   $Date$
+ */
+
+   
+generic module QueueC(typedef queue_t, uint8_t QUEUE_SIZE) {
+  provides interface Queue;
+}
+
+implementation {
+
+  queue_t queue[QUEUE_SIZE];
+  uint8_t head = 0;
+  uint8_t tail = 0;
+  uint8_t size = 0;
+  
+  command bool Queue.empty() {
+    return size == 0;
+  }
+
+  command uint8_t Queue.size() {
+    return size;
+  }
+
+  command uint8_t Queue.maxSize() {
+    return QUEUE_SIZE;
+  }
+
+  command queue_t Queue.head() {
+    return queue[head];
+  }
+
+  void printQueue() {
+#ifdef TOSSIM
+    int i, j;
+    dbg("QueueC", "head <-");
+    for (i = head; i < head + size; i++) {
+      dbg_clear("QueueC", "[");
+      for (j = 0; j < sizeof(queue_t); j++) {
+	uint8_t v = ((uint8_t*)&queue[i % QUEUE_SIZE])[j];
+	dbg_clear("QueueC", "%0.2hhx", v);
+      }
+      dbg_clear("QueueC", "] ");
+    }
+    dbg_clear("QueueC", "<- tail\n");
+#endif
+  }
+  
+  command queue_t Queue.dequeue() {
+    queue_t t = call Queue.head();
+    dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+    if (!call Queue.empty()) {
+      head++;
+      head %= QUEUE_SIZE;
+      size--;
+      printQueue();
+    }
+    return t;
+  }
+
+  command error_t Queue.enqueue(queue_t newVal) {
+    if (call Queue.size() < call Queue.maxSize()) {
+      dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+      queue[tail] = newVal;
+      tail++;
+      tail %= QUEUE_SIZE;
+      size++;
+      printQueue();
+      return SUCCESS;
+    }
+    else {
+      return FAIL;
+    }
+  }
+  
+  command queue_t Queue.element(uint8_t idx) {
+    idx += head;
+    idx %= QUEUE_SIZE;
+    return queue[idx];
+  }  
+
+}
diff --git a/tos/system/RandomC.nc b/tos/system/RandomC.nc
new file mode 100644
index 00000000..61fa927e
--- /dev/null
+++ b/tos/system/RandomC.nc
@@ -0,0 +1,47 @@
+/*
+ * "Copyright (c) 2002-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The standard TinyOS random number generator. If your system requires a 
+ * specific random number generator, it should wire to that component
+ * directly. 
+ *
+ * @author  Barbara Hohlt 
+ * @author  Phil Levis 
+ * @date    March 1 2005
+ */
+
+configuration RandomC {
+  provides interface Init;
+  provides interface ParameterInit as SeedInit;
+  provides interface Random as Random;
+}
+
+implementation {
+  components RandomMlcgC, MainC;
+  
+  MainC.SoftwareInit -> RandomMlcgC;
+
+  Init = RandomMlcgC;
+  SeedInit = RandomMlcgC;
+  Random = RandomMlcgC;
+
+} 
diff --git a/tos/system/RandomLfsrC.nc b/tos/system/RandomLfsrC.nc
new file mode 100644
index 00000000..ce8c94fd
--- /dev/null
+++ b/tos/system/RandomLfsrC.nc
@@ -0,0 +1,54 @@
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  6/25/02
+ */
+
+/**
+ * This is a 16 bit Linear Feedback Shift Register pseudo random number
+ * generator. It is faster than the MLCG generator but does not generate
+ * nearly as good random numbers.
+ *
+ * @author Philip Levis
+ * @author David Gay
+ * @author Alec Woo
+ * @date   Jan 20 2005
+ */
+
+configuration RandomLfsrC
+{
+  provides interface Init;
+  provides interface Random;
+}
+implementation
+{
+  components RandomLfsrP;
+
+  Init = RandomLfsrP;
+  Random = RandomLfsrP;
+}
diff --git a/tos/system/RandomLfsrP.nc b/tos/system/RandomLfsrP.nc
new file mode 100644
index 00000000..c47c4f22
--- /dev/null
+++ b/tos/system/RandomLfsrP.nc
@@ -0,0 +1,91 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ *
+ * Authors:		Alec Woo, David Gay, Philip Levis
+ * Date last modified:  8/8/05
+ *
+ */
+
+/**
+ * This is a 16 bit Linear Feedback Shift Register pseudo random number
+   generator. It is faster than the MLCG generator, but the numbers generated
+ * have less randomness.
+ *
+ * @author Alec Woo
+ * @author David Gay
+ * @author Philip Levis
+ * @date   August 8 2005
+ */
+
+module RandomLfsrP
+{
+  provides interface Init;
+  provides interface Random;
+}
+implementation
+{
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  /* Initialize the seed from the ID of the node */
+  command error_t Init.init() {
+    atomic {
+      shiftReg = 119 * 119 * (TOS_NODE_ID + 1);
+      initSeed = shiftReg;
+      mask = 137 * 29 * (TOS_NODE_ID + 1);
+    }
+    return SUCCESS;
+  }
+
+  /* Return the next 16 bit random number */
+  async command uint16_t Random.rand16() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+    atomic {
+      tmpShiftReg = shiftReg;
+      endbit = ((tmpShiftReg & 0x8000) != 0);
+      tmpShiftReg <<= 1;
+      if (endbit) 
+	tmpShiftReg ^= 0x100b;
+      tmpShiftReg++;
+      shiftReg = tmpShiftReg;
+      tmpShiftReg = tmpShiftReg ^ mask;
+    }
+    return tmpShiftReg;
+  }
+
+  async command uint32_t Random.rand32() {
+    return (uint32_t)call Random.rand16() << 16 | call Random.rand16();
+  }
+}
diff --git a/tos/system/RandomMlcgC.nc b/tos/system/RandomMlcgC.nc
new file mode 100644
index 00000000..b9c0dfd2
--- /dev/null
+++ b/tos/system/RandomMlcgC.nc
@@ -0,0 +1,44 @@
+/*
+ * "Copyright (c) 2002-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * This is the configuration for RandomMlcgC, a 
+ * multiplicative linear congruential generator. 
+ *
+ * @author  Barbara Hohlt
+ * @author  Philip Levis
+ * @date    March 1 2005
+ */
+
+configuration RandomMlcgC {
+  provides interface Init;
+  provides interface ParameterInit as SeedInit;
+  provides interface Random as Random;
+}
+
+implementation {
+  components RandomMlcgP;
+
+  Init = RandomMlcgP;
+  SeedInit = RandomMlcgP;
+  Random = RandomMlcgP;
+
+} 
diff --git a/tos/system/RandomMlcgP.nc b/tos/system/RandomMlcgP.nc
new file mode 100644
index 00000000..b4b48f15
--- /dev/null
+++ b/tos/system/RandomMlcgP.nc
@@ -0,0 +1,88 @@
+/*
+ * "Copyright (c) 2002-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+/** This code is a fast implementation of the Park-Miller Minimal Standard 
+ *  Generator for pseudo-random numbers.  It uses the 32 bit multiplicative 
+ *  linear congruential generator, 
+ *
+ *		S' = (A x S) mod (2^31 - 1) 
+ *
+ *  for A = 16807.
+ *
+ *
+ * @author Barbara Hohlt 
+ * @date   March 1 2005
+ */
+
+module RandomMlcgP {
+  provides interface Init;
+  provides interface ParameterInit as SeedInit;
+  provides interface Random as Random;
+}
+implementation
+{
+    uint32_t seed ;
+
+  /* Initialize the seed from the ID of the node */
+  command error_t Init.init() {
+    atomic  seed = (uint32_t)(TOS_NODE_ID + 1);
+    
+    return SUCCESS;
+  }
+
+  /* Initialize with 16-bit seed */ 
+  command error_t SeedInit.init(uint16_t s) {
+    atomic  seed = (uint32_t)(s + 1);
+    
+    return SUCCESS;
+  }
+
+  /* Return the next 32 bit random number */
+  async command uint32_t Random.rand32() {
+    uint32_t mlcg,p,q;
+    uint64_t tmpseed;
+    atomic
+      {
+	tmpseed =  (uint64_t)33614U * (uint64_t)seed;
+	q = tmpseed; 	/* low */
+	q = q >> 1;
+	p = tmpseed >> 32 ;		/* hi */
+	mlcg = p + q;
+        if (mlcg & 0x80000000) { 
+	  mlcg = mlcg & 0x7FFFFFFF;
+	  mlcg++;
+	}
+	seed = mlcg;
+      }
+    return mlcg; 
+  }
+
+  /* Return low 16 bits of next 32 bit random number */
+  async command uint16_t Random.rand16() {
+    return (uint16_t)call Random.rand32();
+  }
+
+#if 0
+ /* Return high 16 bits of 32 bit number */
+ inline uint16_t getHigh16(uint32_t num) {
+    return num >> 16;
+ }
+#endif
+}
diff --git a/tos/system/RealMainP.nc b/tos/system/RealMainP.nc
new file mode 100644
index 00000000..6ea0e803
--- /dev/null
+++ b/tos/system/RealMainP.nc
@@ -0,0 +1,96 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id$
+ *
+ */
+
+/**
+ * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
+ *
+ * @author Philip Levis
+ * @date   January 17 2005
+ */
+
+module RealMainP {
+  provides interface Boot;
+  uses interface Scheduler;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  int main() __attribute__ ((C, spontaneous)) {
+    atomic
+      {
+	/* First, initialize the Scheduler so components can post
+	   tasks. Initialize all of the very hardware specific stuff, such
+	   as CPU settings, counters, etc. After the hardware is ready,
+	   initialize the requisite software components and start
+	   execution.*/
+    
+	call Scheduler.init(); 
+    
+	/* Initialize the platform. Then spin on the Scheduler, passing
+	 * FALSE so it will not put the system to sleep if there are no
+	 * more tasks; if no tasks remain, continue on to software
+	 * initialization */
+	call PlatformInit.init();    
+	while (call Scheduler.runNextTask());
+
+	/* Initialize software components.Then spin on the Scheduler,
+	 * passing FALSE so it will not put the system to sleep if there
+	 * are no more tasks; if no tasks remain, the system has booted
+	 * successfully.*/
+	call SoftwareInit.init(); 
+	while (call Scheduler.runNextTask());
+      }
+
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    signal Boot.booted();
+
+    /* Spin in the Scheduler */       
+    call Scheduler.taskLoop();
+
+    /* We should never reach this point, but some versions of
+     * gcc don't realize that and issue a warning if we return
+     * void from a non-void function. So include this. */
+    return -1;
+  }
+
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
diff --git a/tos/system/RoundRobinArbiterC.nc b/tos/system/RoundRobinArbiterC.nc
new file mode 100644
index 00000000..921bd524
--- /dev/null
+++ b/tos/system/RoundRobinArbiterC.nc
@@ -0,0 +1,337 @@
+/*
+ * "Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL WASHINGTON UNIVERSITY IN ST. LOUIS BE LIABLE TO ANY PARTY 
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING 
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF WASHINGTON 
+ * UNIVERSITY IN ST. LOUIS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * WASHINGTON UNIVERSITY IN ST. LOUIS SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND WASHINGTON UNIVERSITY IN ST. LOUIS HAS NO 
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS."
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision$
+ * $Date$ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.

    
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in a
+ * round robin fashion.  An array is used to keep track of which users have
+ * put in requests for the resource.  Upon the release of the resource by
+ * one of these users, the array is checked and the next user (in round
+ * robin order) that has a pending request will ge granted control of the
+ * resource.  If there are no pending requests, then the resource becomes
+ * idle and any user can put in a request and immediately receive access to
+ * the round robin order * Resource.
+ *
+ * @param resourceName -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic module RoundRobinArbiterC(char resourceName[]) {
+  provides {
+    interface Init @atleastonce();
+    interface Resource[uint8_t id];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+  }
+}
+implementation {
+  enum {RES_IDLE, RES_GRANTING, RES_BUSY};
+  enum {NO_RES = 0xFF};
+  enum {CONTROLLER_ID = uniqueCount(resourceName) + 1};
+
+  uint8_t state = RES_IDLE;
+  uint8_t resId = NO_RES;
+  uint8_t reqResId;
+  uint8_t request[(uniqueCount(resourceName)-1)/8 + 1];
+  bool irp = FALSE;
+  
+  task void grantedTask();
+  task void requestedTask();
+  void grantNextRequest();
+  
+  /**  
+       Initialize the Arbiter to the idle state
+  */
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  uint8_t requested(uint8_t id) {
+    return request[id / 8] & (1 << (id % 8));
+  }
+
+  void clearRequest(uint8_t id) {
+    request[id / 8] &= ~(1 << (id % 8));
+  }
+  
+  error_t queueRequest(uint8_t id) {
+    if (!requested(id)){
+	    request[id / 8] |=  1 << (id % 8);
+      return SUCCESS;
+    }
+    return EBUSY;
+  }
+  
+  /**
+     Request the use of the shared resource
+    
+     If the user has not already requested access to the 
+     resource, the request will be either served immediately 
+     or queued for later service in a round robin fashion.  
+     A SUCCESS value will be returned and the user will receive 
+     the granted() event in synchronous context once it has 
+     been given access to the resource.
+    
+     Whenever requests are queued, the current owner of the bus 
+     will receive a requested() event, notifying him that another
+     user would like to have access to the resource.
+    
+     If the user has already requested access to the resource and
+     is waiting on a pending granted() event, an EBUSY value will 
+     be returned to the caller.
+  */
+  async command error_t Resource.request[uint8_t id]() {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      if(resId == CONTROLLER_ID)
+        post requestedTask();
+      return queueRequest( id );
+    }
+  } 
+
+  async command error_t ResourceController.request() {
+    return call Resource.request[CONTROLLER_ID]();
+  }
+  
+  /**
+   * Request immediate access to the shared resource.  Requests are
+   * not queued, and no granted event is returned.  A return value 
+   * of SUCCESS signifies that the resource has been granted to you,
+   * while a return value of EBUSY signifies that the resource is 
+   * currently being used.
+   */
+  uint8_t tryImmediateRequest(uint8_t id) {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_BUSY;
+        resId = id;
+        return id;
+      }
+      return resId;
+    }     
+  }
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    uint8_t ownerId = tryImmediateRequest(id);
+
+    if(ownerId == id) {
+      call ResourceConfigure.configure[id]();
+      return SUCCESS;
+    }
+    else if(ownerId == CONTROLLER_ID){
+      atomic {
+        irp = TRUE;  //indicate that immediateRequest is pending
+        reqResId = id; //Id to grant resource to if can
+      }  
+      signal ResourceController.requested();
+      atomic {
+        ownerId = resId;   //See if I have been granted the resource
+        irp = FALSE;  //Indicate that immediate request no longer pending
+      }
+      if(ownerId == id) {
+        call ResourceConfigure.configure[id]();
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+    else return EBUSY;
+  }  
+
+  async command error_t ResourceController.immediateRequest() {
+    return call Resource.immediateRequest[CONTROLLER_ID]();
+  }
+  
+  /**
+     Release the use of the shared resource
+    
+     The resource will only actually be released if
+     there are no pending requests for the resource.
+     If requests are pending, then the next pending request
+     will be serviced, according to a round robin arbitration
+     scheme.  If no requests are currently pending, then the
+     resource is released, and any users can put in a request
+     for immediate access to the resource.
+  */
+  async command void Resource.release[uint8_t id]() {
+    uint8_t currentState;
+    atomic {
+      if (state == RES_BUSY && resId == id) {
+        if(irp)
+          resId = reqResId;
+        else grantNextRequest();
+	call ResourceConfigure.unconfigure[id]();
+      }
+      currentState = state;
+    }
+    if(currentState == RES_IDLE)
+      signal ResourceController.idle();
+  }
+
+  async command void ResourceController.release() {
+    call Resource.release[CONTROLLER_ID]();
+  }
+    
+  /**
+     Check if the Resource is currently in use
+  */    
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if ( state == RES_IDLE )
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+     Returns the current user of the Resource.
+     If there is no current user, the return value
+     will be 0xFF
+  */      
+  async command uint8_t ArbiterInfo.userId() {
+    atomic return resId;
+  }
+
+  /**
+   * Returns my user id.
+   */      
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id) return TRUE;
+      else return FALSE;
+    }
+  }
+  async command uint8_t ResourceController.isOwner() {
+    return call Resource.isOwner[CONTROLLER_ID]();
+  }
+  
+  //Grant a request to the next Pending user
+  //in Round-Robin order
+  void grantNextRequest() {
+    int i;
+    
+    for (i = resId + 1; ; i++) {
+	    if (i >= (uniqueCount(resourceName) + 1))
+	      i = 0;
+	    if (i == resId)
+	      break;
+	    if (requested(i)) {
+	      reqResId = i;
+	      clearRequest(i);
+        resId = NO_RES;
+        state = RES_GRANTING;
+	      post grantedTask();
+	      return;
+	    }  
+    }
+    resId = NO_RES;
+    state = RES_IDLE;
+  }
+  
+  //Task for pulling the Resource.granted() signal
+    //into synchronous context  
+  task void grantedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId = reqResId;
+      state = RES_BUSY;
+    }
+    call ResourceConfigure.configure[tmpId]();
+    signal Resource.granted[tmpId]();
+  }
+
+  //Task for pulling the ResourceController.requested() signal
+    //into synchronous context  
+  task void requestedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId;
+    }
+    if(tmpId == CONTROLLER_ID)
+      signal ResourceController.requested();
+  }
+  
+  //Default event/command handlers for all of the other
+    //potential users/providers of the parameterized interfaces 
+    //that have not been connected to.  
+  default event void Resource.granted[uint8_t id]() {
+    signal ResourceController.granted();
+  }
+  default event void ResourceController.granted() {
+  }
+  default async event void ResourceController.requested() {
+  }
+  default async event void ResourceController.idle() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/SchedulerBasicP.nc b/tos/system/SchedulerBasicP.nc
new file mode 100644
index 00000000..0a62576a
--- /dev/null
+++ b/tos/system/SchedulerBasicP.nc
@@ -0,0 +1,168 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * SchedulerBasicP implements the default TinyOS scheduler sequence, as
+ * documented in TEP 106.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   January 19 2005
+ */
+
+#include "hardware.h"
+
+module SchedulerBasicP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+  uses interface McuSleep;
+}
+implementation
+{
+  enum
+  {
+    NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"),
+    NO_TASK = 255,
+  };
+
+  volatile uint8_t m_head;
+  volatile uint8_t m_tail;
+  volatile uint8_t m_next[NUM_TASKS];
+
+  // Helper functions (internal functions) intentionally do not have atomic
+  // sections.  It is left as the duty of the exported interface functions to
+  // manage atomicity to minimize chances for binary code bloat.
+
+  // move the head forward
+  // if the head is at the end, mark the tail at the end, too
+  // mark the task as not in the queue
+  inline uint8_t popTask()
+  {
+    if( m_head != NO_TASK )
+    {
+      uint8_t id = m_head;
+      m_head = m_next[m_head];
+      if( m_head == NO_TASK )
+      {
+	m_tail = NO_TASK;
+      }
+      m_next[id] = NO_TASK;
+      return id;
+    }
+    else
+    {
+      return NO_TASK;
+    }
+  }
+  
+  bool isWaiting( uint8_t id )
+  {
+    return (m_next[id] != NO_TASK) || (m_tail == id);
+  }
+
+  bool pushTask( uint8_t id )
+  {
+    if( !isWaiting(id) )
+    {
+      if( m_head == NO_TASK )
+      {
+	m_head = id;
+	m_tail = id;
+      }
+      else
+      {
+	m_next[m_tail] = id;
+	m_tail = id;
+      }
+      return TRUE;
+    }
+    else
+    {
+      return FALSE;
+    }
+  }
+  
+  command void Scheduler.init()
+  {
+    atomic
+    {
+      memset( (void *)m_next, NO_TASK, sizeof(m_next) );
+      m_head = NO_TASK;
+      m_tail = NO_TASK;
+    }
+  }
+  
+  command bool Scheduler.runNextTask()
+  {
+    uint8_t nextTask;
+    atomic
+    {
+      nextTask = popTask();
+      if( nextTask == NO_TASK )
+      {
+	return FALSE;
+      }
+    }
+    signal TaskBasic.runTask[nextTask]();
+    return TRUE;
+  }
+
+  command void Scheduler.taskLoop()
+  {
+    for (;;)
+    {
+      uint8_t nextTask;
+
+      atomic
+      {
+	while ((nextTask = popTask()) == NO_TASK)
+	{
+	  call McuSleep.sleep();
+	}
+      }
+      signal TaskBasic.runTask[nextTask]();
+    }
+  }
+
+  /**
+   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
+   */
+  
+  async command error_t TaskBasic.postTask[uint8_t id]()
+  {
+    atomic { return pushTask(id) ? SUCCESS : EBUSY; }
+  }
+
+  default event void TaskBasic.runTask[uint8_t id]()
+  {
+  }
+}
+
diff --git a/tos/system/TimerMilliC.nc b/tos/system/TimerMilliC.nc
new file mode 100644
index 00000000..b8631f98
--- /dev/null
+++ b/tos/system/TimerMilliC.nc
@@ -0,0 +1,46 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The virtualized millisecond timer abstraction. Instantiating this 
+ * component gives an independent millisecond granularity timer.
+ *
+ * @author Philip Levis
+ * @date   January 16 2006
+ * @see    TEP 102: Timers
+ */ 
+
+#include "Timer.h"
+
+generic configuration TimerMilliC() {
+  provides interface Timer;
+}
+implementation {
+  components TimerMilliP;
+
+  // The key to unique is based off of TimerMilliC because TimerMilliImplP
+  // is just a pass-through to the underlying HIL component (TimerMilli).
+  Timer = TimerMilliP.TimerMilli[unique(UQ_TIMER_MILLI)];
+}
+
diff --git a/tos/system/TimerMilliP.nc b/tos/system/TimerMilliP.nc
new file mode 100644
index 00000000..f4000e46
--- /dev/null
+++ b/tos/system/TimerMilliP.nc
@@ -0,0 +1,45 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/**
+ * Components should never wire to this component. This is the
+ * underlying configuration of virtualized millisecond timers. 
+ * It auto-wires wires the timer
+ * implementation (TimerC) to the boot sequence and exports the
+ * various Timer interfaces.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   May 16 2005
+ */ 
+
+#include "Timer.h"
+
+configuration TimerMilliP {
+  provides interface Timer as TimerMilli[uint8_t id];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -> HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+
diff --git a/tos/system/TinySchedulerC.nc b/tos/system/TinySchedulerC.nc
new file mode 100644
index 00000000..fdea3836
--- /dev/null
+++ b/tos/system/TinySchedulerC.nc
@@ -0,0 +1,46 @@
+// $Id$
+/*
+ * "Copyright (c) 2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * The TinyOS scheduler. It provides two interfaces: Scheduler,
+ * for TinyOS to initialize and run tasks, and TaskBasic, the simplext
+ * class of TinyOS tasks (reserved always at-most-once posting,
+ * FIFO, parameter-free). For details and information on how to
+ * replace the scheduler, refer to TEP 106.
+ *
+ * @author  Phil Levis
+ * @date    August 7 2005
+ * @see     TEP 106: Tasks and Schedulers
+ */
+
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation {
+  components SchedulerBasicP as Sched;
+  components McuSleepC as Sleep;
+  Scheduler = Sched;
+  TaskBasic = Sched;
+  Sched.McuSleep -> Sleep;
+}
+
diff --git a/tos/system/crc.h b/tos/system/crc.h
new file mode 100644
index 00000000..708c567b
--- /dev/null
+++ b/tos/system/crc.h
@@ -0,0 +1,69 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef CRC_H
+#define CRC_H
+
+/* We don't want to duplicate this function inside binary components. */
+#ifdef NESC_BUILD_BINARY
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte);
+#else
+/*
+ * Default CRC function. Some microcontrollers may provide more efficient
+ * implementations.
+ *
+ * This CRC-16 function produces a 16-bit running CRC that adheres to the
+ * ITU-T CRC standard.
+ *
+ * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ *
+ */
+uint16_t crcByte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+#endif
+
+#endif
diff --git a/tos/system/dbg.h b/tos/system/dbg.h
new file mode 100644
index 00000000..91d07e6a
--- /dev/null
+++ b/tos/system/dbg.h
@@ -0,0 +1,42 @@
+// $Id$
+
+/*									tab:4
+ * "Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This file is part of the TOSSIM DBG (debug) system.
+ *
+ * @author Philip Levis
+ * @date   2/08/05
+ */
+
+#ifndef DBG_H
+#define DBG_H
+
+#endif /* DBG_H */
diff --git a/tos/system/scale.h b/tos/system/scale.h
new file mode 100644
index 00000000..d249cf82
--- /dev/null
+++ b/tos/system/scale.h
@@ -0,0 +1,22 @@
+#ifndef SCALE_H
+#define SCALE_H
+
+/*
+ * Multiply x by a/b while avoiding overflow when possible. Requires that
+ * a*b <= max value of from_t, and assumes unsigned arithmetic. 
+ *
+ * @param x Number to scale
+ * @param a Numerator of scaling value
+ * @param b Denominator of scaling value
+ * @return x * a/b
+ */
+inline uint32_t scale32(uint32_t x, uint32_t a, uint32_t b) 
+{
+  uint32_t x_over_b = x / b;
+  uint32_t x_mod_b = x % b;
+
+  x_mod_b *= a; // on a separate line just in case some compiler goes weird
+  return x_over_b * a + x_mod_b / b;
+}
+
+#endif
diff --git a/tos/system/tos.h b/tos/system/tos.h
new file mode 100644
index 00000000..38292e8f
--- /dev/null
+++ b/tos/system/tos.h
@@ -0,0 +1,38 @@
+#if !defined(__CYGWIN__)
+#if defined(__MSP430__)
+#include 
+#else
+#include 
+#endif
+#else //cygwin
+#include 
+#include 
+#include 
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+typedef uint8_t bool;
+enum { FALSE = 0, TRUE = 1 };
+
+typedef int8_t nx_bool __attribute__((nx_base(int8)));
+uint16_t TOS_NODE_ID = 1;
+
+/* This macro is used to mark pointers that represent ownership
+   transfer in interfaces. See TEP 3 for more discussion. */
+#define PASS
+
+struct @atmostonce { };
+struct @atleastonce { };
+struct @exactlyonce { };
+
+#ifndef TOSSIM
+#define dbg(s, ...) 
+#define dbgerror(s, ...) 
+#define dbg_clear(s, ...) 
+#define dbgerror_clear(s, ...) 
+#endif
diff --git a/tos/types/AM.h b/tos/types/AM.h
new file mode 100644
index 00000000..a9d4cf0f
--- /dev/null
+++ b/tos/types/AM.h
@@ -0,0 +1,34 @@
+#ifndef AM_H
+#define AM_H
+
+// These are the right types, but ncc currently does not 
+// like parameters being network types
+typedef nx_uint8_t nx_am_id_t;
+typedef nx_uint8_t nx_am_group_t;
+typedef nx_uint16_t nx_am_addr_t;
+
+typedef uint8_t am_id_t;
+typedef uint8_t am_group_t;
+typedef uint16_t am_addr_t;
+
+enum {
+  AM_BROADCAST_ADDR = 0xffff,
+};
+
+#ifndef DEFINED_TOS_AM_GROUP
+#define DEFINED_TOS_AM_GROUP 0x22
+#endif
+
+#ifndef DEFINED_TOS_AM_ADDRESS
+#define DEFINED_TOS_AM_ADDRESS 1
+#endif
+
+enum {
+  TOS_AM_GROUP = DEFINED_TOS_AM_GROUP,
+  TOS_AM_ADDRESS = DEFINED_TOS_AM_ADDRESS
+};
+
+#define UQ_AMQUEUE_SEND "amqueue.send"
+
+#endif
+
diff --git a/tos/types/I2C.h b/tos/types/I2C.h
new file mode 100644
index 00000000..534648fb
--- /dev/null
+++ b/tos/types/I2C.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Phil Buonadonna
+ * @author Philip Levis
+ */
+
+#ifndef _I2C_H
+#define _I2C_H
+
+typedef struct { } TI2CExtdAddr;
+typedef struct { } TI2CBasicAddr;
+
+typedef uint8_t i2c_flags_t;
+
+enum {
+  I2C_START   = 0x01,
+  I2C_STOP    = 0x02,
+  I2C_ACK_END = 0x04,
+};
+
+
+#endif /* _I2C_H */
diff --git a/tos/types/Leds.h b/tos/types/Leds.h
new file mode 100644
index 00000000..bb4c703e
--- /dev/null
+++ b/tos/types/Leds.h
@@ -0,0 +1,40 @@
+//$Id$
+
+/* "Copyright (c) 2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Constants for manipulating LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+enum {
+  LEDS_LED0 = 1 << 0,
+  LEDS_LED1 = 1 << 1,
+  LEDS_LED2 = 1 << 2,
+  LEDS_LED3 = 1 << 3,
+  LEDS_LED4 = 1 << 4,
+  LEDS_LED5 = 1 << 5,
+  LEDS_LED6 = 1 << 6,
+  LEDS_LED7 = 1 << 7
+};
+
diff --git a/tos/types/README b/tos/types/README
new file mode 100644
index 00000000..aac31ad1
--- /dev/null
+++ b/tos/types/README
@@ -0,0 +1,2 @@
+Update this.
+
diff --git a/tos/types/Storage.h b/tos/types/Storage.h
new file mode 100644
index 00000000..3f4add39
--- /dev/null
+++ b/tos/types/Storage.h
@@ -0,0 +1,52 @@
+// $Id$
+
+/*									tab:2
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author: Jonathan Hui 
+ * @author: David Gay 
+ * @version $Revision$ $Date$
+ */
+
+#ifndef STORAGE_H
+#define STORAGE_H
+
+typedef uint8_t volume_id_t;
+typedef uint32_t storage_addr_t;
+typedef uint32_t storage_len_t;
+typedef uint32_t storage_cookie_t;
+
+enum {
+  SEEK_BEGINNING = 0
+};
+
+#include "Storage_chip.h"
+
+#endif
diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h
new file mode 100644
index 00000000..3974a93e
--- /dev/null
+++ b/tos/types/TinyError.h
@@ -0,0 +1,57 @@
+// $Id$
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * @author Phil Levis
+ * @author David Gay
+ * Revision:  $Revision$
+ *
+ * Defines global error codes for error_t in TinyOS.
+ */
+
+#ifndef TINY_ERROR_H_INCLUDED
+#define TINY_ERROR_H_INCLUDED
+
+enum {
+  SUCCESS        = 0,          
+  FAIL           = 1,           // Generic condition: backwards compatible
+  ESIZE          = 2,           // Parameter passed in was too big.
+  ECANCEL        = 3,           // Operation cancelled by a call.
+  EOFF           = 4,           // Subsystem is not active
+  EBUSY          = 5,           // The underlying system is busy; retry later
+  EINVAL         = 6,           // An invalid parameter was passed
+  ERETRY         = 7,           // A rare and transient failure: can retry
+  ERESERVE       = 8,           // Reservation required before usage
+};
+
+typedef uint8_t error_t __attribute__((combine(ecombine)));
+
+error_t ecombine(error_t r1, error_t r2)
+/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error
+     combination function: two successes, or two identical errors are
+     preserved, while conflicting errors are represented by FAIL.
+*/
+{
+  return r1 == r2 ? r1 : FAIL;
+}
+
+#endif
diff --git a/tos/types/message.h b/tos/types/message.h
new file mode 100644
index 00000000..dc66c268
--- /dev/null
+++ b/tos/types/message.h
@@ -0,0 +1,21 @@
+#ifndef __MESSAGE_H__
+#define __MESSAGE_H__
+
+#include "platform_message.h"
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+#ifndef TOS_BCAST_ADDR
+#define TOS_BCAST_ADDR 0xFFFF
+#endif
+
+typedef nx_struct message_t {
+  nx_uint8_t header[sizeof(message_header_t)];
+  nx_uint8_t data[TOSH_DATA_LENGTH];
+  nx_uint8_t footer[sizeof(message_footer_t)];
+  nx_uint8_t metadata[sizeof(message_metadata_t)];
+} message_t;
+
+#endif
-- 
2.39.2


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