From 0bf5623f2aeaf032bfcd2cf183e6b0c66ac413da Mon Sep 17 00:00:00 2001
From: scipio <scipio>
Date: Wed, 28 Nov 2007 19:17:08 +0000
Subject: [PATCH] Merge in Alec's fixes.

---
 tos/chips/atm128/HplAtm128UartP.nc | 26 ++++++++++----------------
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/tos/chips/atm128/HplAtm128UartP.nc b/tos/chips/atm128/HplAtm128UartP.nc
index a6cdf349..c4a1392f 100644
--- a/tos/chips/atm128/HplAtm128UartP.nc
+++ b/tos/chips/atm128/HplAtm128UartP.nc
@@ -105,50 +105,47 @@ implementation {
   }
 
   command error_t Uart0TxControl.start() {
-    SET_BIT(UCSR0B, TXCIE);
     SET_BIT(UCSR0B, TXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart0TxControl.stop() {
-    CLR_BIT(UCSR0B, TXCIE);
     CLR_BIT(UCSR0B, TXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart0RxControl.start() {
-    SET_BIT(UCSR0B, RXCIE);
     SET_BIT(UCSR0B, RXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart0RxControl.stop() {
-    CLR_BIT(UCSR0B, RXCIE);
     CLR_BIT(UCSR0B, RXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
   
   async command error_t HplUart0.enableTxIntr() {
-    SET_BIT(UCSR0B, TXEN);
+    SET_BIT(UCSR0A, TXC);
+    SET_BIT(UCSR0B, TXCIE);
     return SUCCESS;
   }
   
   async command error_t HplUart0.disableTxIntr(){
-    CLR_BIT(UCSR0B, TXEN);
+    CLR_BIT(UCSR0B, TXCIE);
     return SUCCESS;
   }
   
   async command error_t HplUart0.enableRxIntr(){
-    SET_BIT(UCSR0B, RXEN);
+    SET_BIT(UCSR0B, RXCIE);
     return SUCCESS;
   }
 
   async command error_t HplUart0.disableRxIntr(){
-    CLR_BIT(UCSR0B, RXEN);
+    CLR_BIT(UCSR0B, RXCIE);
     return SUCCESS;
   }
   
@@ -202,50 +199,47 @@ implementation {
   }
 
   command error_t Uart1TxControl.start() {
-    SET_BIT(UCSR1B, TXCIE);
     SET_BIT(UCSR1B, TXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart1TxControl.stop() {
-    CLR_BIT(UCSR1B, TXCIE);
     CLR_BIT(UCSR1B, TXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart1RxControl.start() {
-    SET_BIT(UCSR1B, RXCIE);
     SET_BIT(UCSR1B, RXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
 
   command error_t Uart1RxControl.stop() {
-    CLR_BIT(UCSR1B, RXCIE);
     CLR_BIT(UCSR1B, RXEN);
     call McuPowerState.update();
     return SUCCESS;
   }
   
   async command error_t HplUart1.enableTxIntr() {
-    SET_BIT(UCSR1B, TXEN);
+    SET_BIT(UCSR1A, TXC);
+    SET_BIT(UCSR1B, TXCIE);
     return SUCCESS;
   }
   
   async command error_t HplUart1.disableTxIntr(){
-    CLR_BIT(UCSR1B, TXEN);
+    CLR_BIT(UCSR1B, TXCIE);
     return SUCCESS;
   }
   
   async command error_t HplUart1.enableRxIntr(){
-    SET_BIT(UCSR1B, RXEN);
+    SET_BIT(UCSR1B, RXCIE);
     return SUCCESS;
   }
 
   async command error_t HplUart1.disableRxIntr(){
-    CLR_BIT(UCSR1B, RXEN);
+    CLR_BIT(UCSR1B, RXCIE);
     return SUCCESS;
   }
   
-- 
2.39.2