* (c) 2002 by M. P. Ashton <data@ieee.org>
* Originally based in part on work by Texas Instruments Inc.
*
- * $Id: common.h,v 1.5 2006/01/12 00:47:21 cliechti Exp $
+ * $Id: common.h,v 1.6 2008/10/09 15:00:14 sb-sf Exp $
*/
/* Switches: none */
#define SCG0 0x0040
#define SCG1 0x0080
-#ifdef _GNU_ASSEMBLER_ /* Begin #defines for assembler */
+#ifdef __ASSEMBLER__ /* Begin #defines for assembler */
#define LPM0 CPUOFF
#define LPM1 SCG0+CPUOFF
#define LPM2 SCG1+CPUOFF
#define LPM4_EXIT _BIC_SR_IRQ(LPM4_bits) /* Exit Low Power Mode 4 */
#endif /* End #defines for C */
+#if ! defined(__MSP430_WDT_A_BASE__)
+/* Excluded for 5xx architectures where watchdog timer is at a
+ * different address. Use <msp430/wdt_a.h>. */
+
#define WDTCTL_ 0x0120 /* Watchdog Timer Control */
sfrw (WDTCTL,WDTCTL_);
/* The bit names have been prefixed with "WDT" */
#define WDTIS_2 0x0002
#define WDTIS_3 0x0003
+#endif /* __MSP430_WDT_A_BASE__ */
/* Backwards compatibility to older versions of the header files.
Please consider using the new names.
#define __msp430_have_timerb7
#endif
+/* Compatibity with TI standard definitions */
+#if defined(__MSP430X2__)
+#define __MSP430_HAS_MSP430XV2_CPU__ 1
+#endif
+
+#if defined(__MSP430X__)
+#define __MSP430_HAS_MSP430X_CPU__ 1
+#endif
+
#endif