X-Git-Url: https://oss.titaniummirror.com/gitweb/?p=tinyos-2.x.git;a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2FMcuSleepC.nc;h=57c6d393aaefcb522c22cc0738cb56df82d14e24;hp=369737c85e7533cebc1ca6c8ae44fd909b3e0724;hb=18412f7cf0633454a1041c223a5c6cebeadc31c1;hpb=4061448082666ea587f63183d5e69775e7c4ffda

diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/McuSleepC.nc
index 369737c8..57c6d393 100644
--- a/tos/chips/msp430/McuSleepC.nc
+++ b/tos/chips/msp430/McuSleepC.nc
@@ -64,15 +64,19 @@ implementation {
   };
     
   mcu_power_t getPowerState() {
-    mcu_power_t pState = MSP430_POWER_LPM3;
+    mcu_power_t pState = MSP430_POWER_LPM4;
     // TimerA, USART0, USART1 check
     if ((((TACCTL0 & CCIE) ||
 	  (TACCTL1 & CCIE) ||
 	  (TACCTL2 & CCIE)) &&
-	 ((TACTL & TASSEL_3) == TASSEL_2)) ||
-	((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
-	((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
-#ifdef __msp430_have_usart0_with_i2c
+	 ((TACTL & TASSEL_3) == TASSEL_2))
+#ifdef __MSP430_HAS_UART0__
+	|| ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_UART1__
+	|| ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_I2C__
 	 // registers end in "nr" to prevent nesC race condition detection
 	 || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
 	     (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
@@ -80,7 +84,7 @@ implementation {
 	)
       pState = MSP430_POWER_LPM1;
     
-#ifdef __msp430_have_adc12
+#ifdef __MSP430_HAS_ADC12__
     // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
     if (ADC12CTL0 & ADC12ON){
       if (ADC12CTL1 & ADC12SSEL_2){
@@ -114,6 +118,8 @@ implementation {
     }
     temp = msp430PowerBits[powerState] | SR_GIE;
     __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
+    // All of memory may change at this point...
+    asm volatile ("" : : : "memory");
     __nesc_disable_interrupt();
   }