X-Git-Url: https://oss.titaniummirror.com/gitweb/?p=tinyos-2.x.git;a=blobdiff_plain;f=tos%2Fchips%2Fmsp430%2Fusci%2FMsp430UartP.nc;h=6f6384db9618ffef37ebbdfd2a91fa0c6860e702;hp=742c167470cd62d73fda661f01ead91cf509c93a;hb=704e3e7ba90d136a08eb9ed930bf3552b5540517;hpb=753d22d3f0f9764e9a4cdfbefdcf45ff9db4c3cc

diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc
index 742c1674..6f6384db 100644
--- a/tos/chips/msp430/usci/Msp430UartP.nc
+++ b/tos/chips/msp430/usci/Msp430UartP.nc
@@ -163,6 +163,9 @@ implementation {
 
   async event void Interrupts.tx()
   {
+    /* FIXME: this can cause an arbitrarily long ISR, if m_slen is large.
+     * But depending on timing, we may always only write 1 byte.
+     */
     while (m_slen && call Registers.getIfgTx()) {
       call Registers.setTxbuf(*m_sbuf);
       if (--m_slen)
@@ -238,6 +241,9 @@ implementation {
   {
     if (m_robuf) {
       /* receive() takes precedence if active */
+      /* FIXME: an arbitrarily long ISR may occur if m_rlen is large.
+       * But depending on timing, we may always only read 1 byte.
+       */
       while (m_rlen && call Registers.getIfgRx()) {
 	*m_rbuf = byte;
 	if (--m_rlen)