X-Git-Url: https://oss.titaniummirror.com/gitweb/?p=tinyos-2.x.git;a=blobdiff_plain;f=tos%2Fchips%2Fsht11%2FSensirionBusyWaitC.nc;h=d4f51e8b1b5ce0c2a1a9240b76293b033f80ef6d;hp=6140f42ba80a65d92bbd21f3f50c31c255756707;hb=e9bfab607e051bae6afb47b44892ce37541d1b44;hpb=adf1de6c009d13b7b52e68535c63b28f59c97400

diff --git a/tos/chips/sht11/SensirionBusyWaitC.nc b/tos/chips/sht11/SensirionBusyWaitC.nc
index 6140f42b..d4f51e8b 100644
--- a/tos/chips/sht11/SensirionBusyWaitC.nc
+++ b/tos/chips/sht11/SensirionBusyWaitC.nc
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * This BusyWait interface is solely designed for use in providing the
  * necessary 5us timing when bit-banging the SHT1X sensibus clock pin in
@@ -36,10 +36,10 @@
  * is designed for such platforms.  Platforms using higher performance
  * microprocessors may need to override this component with a platform-specific
  * one to provide the necessary wait time.
- * 
+ *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 module SensirionBusyWaitC {
   provides interface BusyWait<TMicro, uint8_t>;
 }