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(parent: d05948d) | patch
Add a BusyWait interface for controlling SHT1X timing requirements.
authorsmckown <smckown@4bc1554a-c7f2-4f65-a403-e0be01f0239c>
Tue, 16 Sep 2008 14:17:50 +0000 (14:17 +0000)
committerR. Steve McKown <rsmckown@gmail.com>
Wed, 26 May 2010 20:33:14 +0000 (14:33 -0600)
commit9b56ef4b539a83c099e348c2283a6717fc4b19a0
tree479d9356720f8c39dc48bcafe4e49b476d74d3b9tree | snapshot
parentd05948de7af127380b8bae332bf2560cd9693cd5commit | diff
Add a BusyWait interface for controlling SHT1X timing requirements.

The default implementation, which does nothing, is probably suitable for all
processors running at about 10 MHz or less.  Implement a platform specific
version to enforce the 5 us timing requirements as per the data sheet.
tos/chips/sht11/SensirionBusyWaitC.nc [new file with mode: 0644] blob
tos/chips/sht11/SensirionSht11LogicP.nc diff | blob | history
tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc diff | blob | history
tos/sensorboards/im2sb/HalSensirionSht11C.nc diff | blob | history
TMI TinyOS 2.x tree. View shortlog at patchset/* tags for clean patch series against upstream.