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(parent: 5630f93) | patch
Add a BusyWait interface for controlling SHT1X timing requirements.
authorsmckown <smckown@4bc1554a-c7f2-4f65-a403-e0be01f0239c>
Tue, 16 Sep 2008 14:17:50 +0000 (14:17 +0000)
committerR. Steve McKown <rsmckown@gmail.com>
Thu, 6 May 2010 15:00:00 +0000 (09:00 -0600)
commitcd3829a77464d427a5c06b24ddaff1ebabb7a5cf
tree2573085812bcd454bf4fc96039289333a2dee0dftree | snapshot
parent5630f939d8460438b4c6182c81a7ca91b0b1210acommit | diff
Add a BusyWait interface for controlling SHT1X timing requirements.

The default implementation, which does nothing, is probably suitable for all
processors running at about 10 MHz or less.  Implement a platform specific
version to enforce the 5 us timing requirements as per the data sheet.
tos/chips/sht11/SensirionBusyWaitC.nc [new file with mode: 0644] blob
tos/chips/sht11/SensirionSht11LogicP.nc diff | blob | history
tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc diff | blob | history
tos/sensorboards/im2sb/HalSensirionSht11C.nc diff | blob | history
TMI TinyOS 2.x tree. View shortlog at patchset/* tags for clean patch series against upstream.