From: R. Steve McKown <rsmckown@gmail.com>
Date: Thu, 8 Apr 2010 00:12:00 +0000 (-0600)
Subject: Fix USCI hanging caused by clearing the TXIFG bit.
X-Git-Tag: debian/2.1.0-4-1tmi~1^2~8
X-Git-Url: https://oss.titaniummirror.com/gitweb/?p=tinyos-2.x.git;a=commitdiff_plain;h=0290d9081acdbe813926612478fbe81e7a44e3c5

Fix USCI hanging caused by clearing the TXIFG bit.

Also removed the commands that allow set/clear of TXIFG, as there is never a
valid reason to do so.
---

diff --git a/tos/chips/msp430/usci/HplMsp430UsciReg.nc b/tos/chips/msp430/usci/HplMsp430UsciReg.nc
index 09c0f1be..1d80fdaf 100644
--- a/tos/chips/msp430/usci/HplMsp430UsciReg.nc
+++ b/tos/chips/msp430/usci/HplMsp430UsciReg.nc
@@ -263,10 +263,6 @@ interface HplMsp430UsciReg {
    * UCxxCTL0 for more information.
    */
   async command bool getIfgRx();
-  async command void setIfgRx();
   async command void clrIfgRx();
   async command bool getIfgTx();
-  async command void setIfgTx();
-  async command void clrIfgTx();
-
 }
diff --git a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
index a9994ade..b46a1c4f 100644
--- a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
+++ b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc
@@ -276,11 +276,6 @@ implementation
     return READ_FLAG(UCxxIfg, UCxxRXIFG);
   }
 
-  async command void Registers.setIfgRx()
-  {
-    SET_FLAG(UCxxIfg, UCxxRXIFG);
-  }
-
   async command void Registers.clrIfgRx()
   {
     CLR_FLAG(UCxxIfg, UCxxRXIFG);
@@ -290,14 +285,4 @@ implementation
   {
     return READ_FLAG(UCxxIfg, UCxxTXIFG);
   }
-
-  async command void Registers.setIfgTx()
-  {
-    SET_FLAG(UCxxIfg, UCxxTXIFG);
-  }
-
-  async command void Registers.clrIfgTx()
-  {
-    CLR_FLAG(UCxxIfg, UCxxTXIFG);
-  }
 }
diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc
index ddf074bd..1b595bfd 100644
--- a/tos/chips/msp430/usci/Msp430UartP.nc
+++ b/tos/chips/msp430/usci/Msp430UartP.nc
@@ -123,7 +123,6 @@ implementation {
       call Registers.clrIeRx();
       call Registers.clrIeTx();
       call Registers.clrIfgRx();
-      call Registers.clrIfgTx();
 
       /* Restore pins to their pre-configure state */
       if (m_pins & PINS_RXD)
@@ -171,7 +170,6 @@ implementation {
     }
     if (m_slen == 0 && m_sobuf) {
       call Registers.clrIeTx();
-      call Registers.clrIfgTx();
       m_sobuf = 0;
       signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
     }