From: r-studio Date: Fri, 9 Apr 2010 09:31:53 +0000 (+0000) Subject: Added TosThreads support for Mulle. X-Git-Url: https://oss.titaniummirror.com/gitweb/?p=tinyos-2.x.git;a=commitdiff_plain;h=e752ee8721ff939905f88168ad62dbbceef179c0 Added TosThreads support for Mulle. From now on the M16c62p code only uses the interrupt stack. The tosthread library would else not work as intended. Added a fix folder in the Mulle platforms folder. Se README in that folder for more information. Did a minor fix to the at45db platform specific code regarding the initialization of the chip. The at45db chip is now initialized through the RealMainP software init so that it will be initialized after the mcu. --- diff --git a/apps/tosthreads/apps/TestBlockStorage/Makefile b/apps/tosthreads/apps/TestBlockStorage/Makefile index f3394f9f..00601d23 100644 --- a/apps/tosthreads/apps/TestBlockStorage/Makefile +++ b/apps/tosthreads/apps/TestBlockStorage/Makefile @@ -1,11 +1,11 @@ COMPONENT=TestBlockStorageAppC -THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode +THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode mulle ifneq ($(filter $(THIS_SUPPORTED_PLATFORMS) clean,$(MAKECMDGOALS)),) ifneq ($(filter tmote telos telosb eyesIFXv1,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_STM25P endif - ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode,$(MAKECMDGOALS)),) + ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode mulle,$(MAKECMDGOALS)),) CFLAGS+=-DUSE_AT45DB endif diff --git a/apps/tosthreads/apps/TestBlockStorage/README b/apps/tosthreads/apps/TestBlockStorage/README index 1528b88a..70d4c38f 100644 --- a/apps/tosthreads/apps/TestBlockStorage/README +++ b/apps/tosthreads/apps/TestBlockStorage/README @@ -10,7 +10,7 @@ block storage. You can install TestBlockStorage on a mote via the following command: make threads install -Valid platforms are currently: tmote, telosb, mica2, micaz and iris +Valid platforms are currently: tmote, telosb, mica2, micaz, iris and mulle This application first checks the size of the block storage volume, and erases it. Then, it randomly writes records, followed by a verification diff --git a/support/make/m16c62p/crt.S b/support/make/m16c62p/crt.S index 6a9cbe9b..1665c5f8 100755 --- a/support/make/m16c62p/crt.S +++ b/support/make/m16c62p/crt.S @@ -62,8 +62,11 @@ _start: /* Setup the FLG register to some sane defaults. */ ldc #0, flg - fset u - ldc #_ustack, sp + /* Clear the U flag. This sets the stack pointer to the interrupt stack. + This is done so that only one stack is used by both interrupt routines + and other code. There would else be a problem when threads are changed + in interrupt routines in the tosthread library. */ + fclr u /* Setup interrupt vector. */ ldc #%hi16(_vectors_variable), intbh diff --git a/support/make/threads.extra b/support/make/threads.extra index b39a734f..6d2b2945 100644 --- a/support/make/threads.extra +++ b/support/make/threads.extra @@ -80,6 +80,13 @@ THREADS_SHIMMER_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/shimmer #Epic specific include directories THREADS_EPIC_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/epic +#M16c62p specific include directories on tested platforms +THREADS_M16C62P_DIR = $(TOS_THREADS_DIR)/chips/m16c62p +THREADS_M16C62P_INCLUDE_DIRS = -I$(THREADS_M16C62P_DIR) + +#Mulle specific include directories +THREADS_MULLE_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mulle + #Add CFLAGS for supported platforms ifneq ($(filter telos telosa telosb tmote,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS) @@ -134,3 +141,8 @@ ifneq ($(filter shimmer,$(MAKECMDGOALS)),) CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS) CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS) endif +ifneq ($(filter mulle,$(MAKECMDGOALS)),) + CFLAGS += $(THREADS_M16C62P_INCLUDE_DIRS) + CFLAGS += $(THREADS_RF230_INCLUDE_DIRS) + CFLAGS += $(THREADS_MULLE_INCLUDE_DIRS) +endif diff --git a/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc b/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc index b38ca0cb..984931e2 100755 --- a/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc +++ b/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc @@ -40,4 +40,9 @@ implementation { HplM16c62pAdc = HplM16c62pAdcP; HplM16c62pAdcP.McuPowerState -> McuSleepC; + +#ifdef THREADS + components PlatformInterruptC; + HplM16c62pAdcP.PlatformInterrupt -> PlatformInterruptC; +#endif } diff --git a/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc b/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc index 01dea2d9..f6d03376 100755 --- a/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc +++ b/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc @@ -34,6 +34,13 @@ module HplM16c62pAdcP { provides interface HplM16c62pAdc; uses interface McuPowerState; + +#ifdef THREADS + uses interface PlatformInterrupt; +#define POST_AMBLE() call PlatformInterrupt.postAmble() +#else +#define POST_AMBLE() +#endif } implementation { @@ -140,6 +147,7 @@ implementation __nesc_enable_interrupt(); signal HplM16c62pAdc.dataReady(data); + POST_AMBLE(); } async command bool HplM16c62pAdc.cancel() { diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc index 8c82ca2c..a8b4de7c 100755 --- a/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc +++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc @@ -100,5 +100,9 @@ implementation IntPin3.IrqSignal -> IrqVector.IntSig3; IntPin4.IrqSignal -> IrqVector.IntSig4; IntPin5.IrqSignal -> IrqVector.IntSig5; +#ifdef THREADS + components PlatformInterruptC; + IrqVector.PlatformInterrupt -> PlatformInterruptC; +#endif } diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc index 64546911..62ced6d2 100755 --- a/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc +++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc @@ -73,6 +73,12 @@ module HplM16c62pInterruptSigP provides interface HplM16c62pInterruptSig as IntSig3; provides interface HplM16c62pInterruptSig as IntSig4; provides interface HplM16c62pInterruptSig as IntSig5; +#ifdef THREADS + uses interface PlatformInterrupt; +#define POST_AMBLE() call PlatformInterrupt.postAmble() +#else +#define POST_AMBLE() +#endif } implementation { @@ -80,36 +86,42 @@ implementation M16C_INTERRUPT_HANDLER(M16C_INT0) { signal IntSig0.fired(); + POST_AMBLE(); } default async event void IntSig1.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT1) { signal IntSig1.fired(); + POST_AMBLE(); } default async event void IntSig2.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT2) { signal IntSig2.fired(); + POST_AMBLE(); } default async event void IntSig3.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT3) { signal IntSig3.fired(); + POST_AMBLE(); } default async event void IntSig4.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT4) { signal IntSig4.fired(); + POST_AMBLE(); } default async event void IntSig5.fired() { } M16C_INTERRUPT_HANDLER(M16C_INT5) { signal IntSig5.fired(); + POST_AMBLE(); } } diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc index d7f07daa..bfc9e2f6 100755 --- a/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc +++ b/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc @@ -165,4 +165,9 @@ implementation TimerB3Ctrl = TimerB3Ctrl_; TimerB4Ctrl = TimerB4Ctrl_; TimerB5Ctrl = TimerB5Ctrl_; + +#ifdef THREADS + components PlatformInterruptC; + IrqVector.PlatformInterrupt -> PlatformInterruptC; +#endif } diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc index 42689764..2be30793 100755 --- a/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc +++ b/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc @@ -41,6 +41,8 @@ * @author Henrik Makitaavola */ +#include "m16c62p_printf.h" + module HplM16c62pTimerInterruptP { provides interface HplM16c62pTimerInterrupt as TimerA0; @@ -54,6 +56,12 @@ module HplM16c62pTimerInterruptP provides interface HplM16c62pTimerInterrupt as TimerB3; provides interface HplM16c62pTimerInterrupt as TimerB4; provides interface HplM16c62pTimerInterrupt as TimerB5; +#ifdef THREADS + uses interface PlatformInterrupt; +#define POST_AMBLE() call PlatformInterrupt.postAmble() +#else +#define POST_AMBLE() +#endif } implementation { @@ -61,66 +69,77 @@ implementation M16C_INTERRUPT_HANDLER(M16C_TMRA0) { signal TimerA0.fired(); + POST_AMBLE(); } default async event void TimerA1.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA1) { signal TimerA1.fired(); + POST_AMBLE(); } default async event void TimerA2.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA2) { signal TimerA2.fired(); + POST_AMBLE(); } default async event void TimerA3.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA3) { signal TimerA3.fired(); + POST_AMBLE(); } default async event void TimerA4.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRA4) { signal TimerA4.fired(); + POST_AMBLE(); } default async event void TimerB0.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB0) { signal TimerB0.fired(); + POST_AMBLE(); } default async event void TimerB1.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB1) { signal TimerB1.fired(); + POST_AMBLE(); } default async event void TimerB2.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB2) { signal TimerB2.fired(); + POST_AMBLE(); } default async event void TimerB3.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB3) { signal TimerB3.fired(); + POST_AMBLE(); } default async event void TimerB4.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB4) { signal TimerB4.fired(); + POST_AMBLE(); } default async event void TimerB5.fired() { } M16C_INTERRUPT_HANDLER(M16C_TMRB5) { signal TimerB5.fired(); + POST_AMBLE(); } } diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartC.nc b/tos/chips/m16c62p/uart/HplM16c62pUartC.nc index c549e11f..301d82c8 100755 --- a/tos/chips/m16c62p/uart/HplM16c62pUartC.nc +++ b/tos/chips/m16c62p/uart/HplM16c62pUartC.nc @@ -142,4 +142,9 @@ implementation HplUart2P.Irq -> Irqs.Uart2; HplUart2P.StopModeControl -> Uart2StopModeControl; + +#ifdef THREADS + components PlatformInterruptC; + Irqs.PlatformInterrupt -> PlatformInterruptC; +#endif } diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc b/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc index 64fad636..e8409e59 100755 --- a/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc +++ b/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc @@ -46,6 +46,13 @@ module HplM16c62pUartInterruptP provides interface HplM16c62pUartInterrupt as Uart0; provides interface HplM16c62pUartInterrupt as Uart1; provides interface HplM16c62pUartInterrupt as Uart2; + +#ifdef THREADS + uses interface PlatformInterrupt; +#define POST_AMBLE() call PlatformInterrupt.postAmble() +#else +#define POST_AMBLE() +#endif } implementation { @@ -53,12 +60,14 @@ implementation M16C_INTERRUPT_HANDLER(M16C_UART0_NACK) { signal Uart0.tx(); + POST_AMBLE(); } default async event void Uart0.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART0_ACK) { signal Uart0.rx(); + POST_AMBLE(); } @@ -66,12 +75,14 @@ implementation M16C_INTERRUPT_HANDLER(M16C_UART1_NACK) { signal Uart1.tx(); + POST_AMBLE(); } default async event void Uart1.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART1_ACK) { signal Uart1.rx(); + POST_AMBLE(); } @@ -79,11 +90,13 @@ implementation M16C_INTERRUPT_HANDLER(M16C_UART2_NACK) { signal Uart2.tx(); + POST_AMBLE(); } default async event void Uart2.rx() { } M16C_INTERRUPT_HANDLER(M16C_UART2_ACK) { signal Uart2.rx(); + POST_AMBLE(); } } diff --git a/tos/lib/tosthreads/lib/printf/PrintfP.nc b/tos/lib/tosthreads/lib/printf/PrintfP.nc index 5f164bfa..04d8ab04 100644 --- a/tos/lib/tosthreads/lib/printf/PrintfP.nc +++ b/tos/lib/tosthreads/lib/printf/PrintfP.nc @@ -122,6 +122,9 @@ implementation { #ifdef _H_atmega128hardware_H int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() { #endif +#ifdef __M16C62PHARDWARE_H__ + int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() { +#endif uint16_t q_size; error_t q_error; diff --git a/tos/platforms/mulle/.platform b/tos/platforms/mulle/.platform index 3a325f0c..4c313671 100755 --- a/tos/platforms/mulle/.platform +++ b/tos/platforms/mulle/.platform @@ -1,4 +1,5 @@ push( @includes, qw( + %T/platforms/mulle/fix %T/platforms/mulle %T/platforms/mulle/chips/rf230 %T/chips/rf2xx/rf230 diff --git a/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc b/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc index f7dcc2fa..e49d1dc5 100644 --- a/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc +++ b/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc @@ -66,5 +66,5 @@ implementation HplAt45dbP.FlashSpi -> Spi; HplAt45dbP.BusyWait -> BusyWaitMicroC; - RealMainP.PlatformInit -> HplAt45dbP.Init; + RealMainP.SoftwareInit -> HplAt45dbP.Init; } diff --git a/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc b/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc index fa206370..fbfbdd0e 100644 --- a/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc +++ b/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc @@ -69,6 +69,8 @@ * * @author Henrik Makitaavola */ + +#include "m16c62p_printf.h" module HplAt45dbP { provides @@ -91,6 +93,11 @@ implementation // TODO(Henrik) Move init code to a SplitControl interface and // change the busy wait into a TimerMilli.startOneShot. command error_t Init.init() { + printf("Ad45db init\n"); + call WP.makeOutput(); + call WP.set(); + call RESET.makeOutput(); + call RESET.set(); call Select.makeOutput(); call Select.set(); call VCC.makeOutput();