From 3fe8f13e05a2bcbc4a224f5a7b7f0ae45398a9b5 Mon Sep 17 00:00:00 2001 From: "R. Steve McKown" Date: Tue, 23 Dec 2014 12:42:27 -0700 Subject: [PATCH] msp430 usci: add setIfgTx(), setIfgRx() With upcoming support for DMA transfers with the USCI peripheral, support for setting the IFG bits will be required. --- tos/chips/msp430/usci/HplMsp430UsciReg.nc | 2 ++ tos/chips/msp430/usci/HplMsp430UsciRegP.nc | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/tos/chips/msp430/usci/HplMsp430UsciReg.nc b/tos/chips/msp430/usci/HplMsp430UsciReg.nc index 59110c82..4a61bbbd 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciReg.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciReg.nc @@ -253,7 +253,9 @@ interface HplMsp430UsciReg { * UCxxCTL0 for more information. */ async command bool getIfgRx(); + async command void setIfgRx(); async command void clrIfgRx(); async command bool getIfgTx(); + async command void setIfgTx(); async command void clrIfgTx(); } diff --git a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc index 9bbf76d1..fcd3c10e 100644 --- a/tos/chips/msp430/usci/HplMsp430UsciRegP.nc +++ b/tos/chips/msp430/usci/HplMsp430UsciRegP.nc @@ -306,6 +306,11 @@ implementation return READ_FLAG(UCxxIfg, UCxxRXIFG); } + async command void Registers.setIfgRx() + { + SET_FLAG(UCxxIfg, UCxxRXIFG); + } + async command void Registers.clrIfgRx() { CLR_FLAG(UCxxIfg, UCxxRXIFG); @@ -316,6 +321,11 @@ implementation return READ_FLAG(UCxxIfg, UCxxTXIFG); } + async command void Registers.setIfgTx() + { + SET_FLAG(UCxxIfg, UCxxTXIFG); + } + async command void Registers.clrIfgTx() { CLR_FLAG(UCxxIfg, UCxxTXIFG); -- 2.39.2