From 5a67cf193fbc146446bc503fe07b02412ebb211e Mon Sep 17 00:00:00 2001 From: mmaroti Date: Mon, 9 Mar 2009 18:12:58 +0000 Subject: [PATCH] make the FastSpiByte interface generic and implement it in Atm128Spi --- tos/chips/atm128/spi/Atm128SpiC.nc | 2 + tos/chips/atm128/spi/Atm128SpiP.nc | 34 +++++++++++++++- tos/platforms/iris/chips/rf230/HplRF2xxC.nc | 3 +- tos/platforms/iris/chips/rf230/HplRF2xxP.nc | 43 --------------------- 4 files changed, 35 insertions(+), 47 deletions(-) diff --git a/tos/chips/atm128/spi/Atm128SpiC.nc b/tos/chips/atm128/spi/Atm128SpiC.nc index c10a9f57..80d92431 100644 --- a/tos/chips/atm128/spi/Atm128SpiC.nc +++ b/tos/chips/atm128/spi/Atm128SpiC.nc @@ -65,6 +65,7 @@ configuration Atm128SpiC { provides interface Init; provides interface SpiByte; + provides interface FastSpiByte; provides interface SpiPacket; provides interface Resource[uint8_t id]; } @@ -76,6 +77,7 @@ implementation { Init = SpiMaster; SpiByte = SpiMaster; + FastSpiByte = SpiMaster; SpiPacket = SpiMaster; Resource = SpiMaster; diff --git a/tos/chips/atm128/spi/Atm128SpiP.nc b/tos/chips/atm128/spi/Atm128SpiP.nc index 6bec916b..d457e42a 100644 --- a/tos/chips/atm128/spi/Atm128SpiP.nc +++ b/tos/chips/atm128/spi/Atm128SpiP.nc @@ -76,6 +76,7 @@ module Atm128SpiP @safe() { provides { interface Init; interface SpiByte; + interface FastSpiByte; interface SpiPacket; interface Resource[uint8_t id]; } @@ -125,13 +126,42 @@ implementation { } async command uint8_t SpiByte.write( uint8_t tx ) { - call Spi.enableSpi(TRUE); - call McuPowerState.update(); + /* no need to enable the SPI bus since that must have been done + when the resource was granted */ + // call Spi.enableSpi(TRUE); + // call McuPowerState.update(); call Spi.write( tx ); while ( !( SPSR & 0x80 ) ); return call Spi.read(); } + inline async command void FastSpiByte.splitWrite(uint8_t data) { + call Spi.write(data); + } + + inline async command uint8_t FastSpiByte.splitRead() { + while( !( SPSR & 0x80 ) ) + ; + return call Spi.read(); + } + + inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) { + uint8_t b; + + while( !( SPSR & 0x80 ) ) + ; + b = call Spi.read(); + call Spi.write(data); + + return b; + } + + inline async command uint8_t FastSpiByte.write(uint8_t data) { + call Spi.write(data); + while( !( SPSR & 0x80 ) ) + ; + return call Spi.read(); + } /** * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE diff --git a/tos/platforms/iris/chips/rf230/HplRF2xxC.nc b/tos/platforms/iris/chips/rf230/HplRF2xxC.nc index cc3c1cf9..8d9a27fc 100644 --- a/tos/platforms/iris/chips/rf230/HplRF2xxC.nc +++ b/tos/platforms/iris/chips/rf230/HplRF2xxC.nc @@ -49,8 +49,7 @@ implementation components Atm128SpiC as SpiC; SpiResource = SpiC.Resource[unique("Atm128SpiC.Resource")]; - - FastSpiByte = HplRF2xxP; + FastSpiByte = SpiC; components HplAtm128GeneralIOC as IO; SLP_TR = IO.PortB7; diff --git a/tos/platforms/iris/chips/rf230/HplRF2xxP.nc b/tos/platforms/iris/chips/rf230/HplRF2xxP.nc index a97f81c6..560fbe6f 100644 --- a/tos/platforms/iris/chips/rf230/HplRF2xxP.nc +++ b/tos/platforms/iris/chips/rf230/HplRF2xxP.nc @@ -21,16 +21,12 @@ * Author: Miklos Maroti */ -#include "Atm128Spi.h" - module HplRF2xxP { provides { interface GpioCapture as IRQ; interface Init as PlatformInit; - - interface FastSpiByte; } uses @@ -83,43 +79,4 @@ implementation { call Capture.stop(); } - - inline async command void FastSpiByte.splitWrite(uint8_t data) - { - // the SPI must have been started, so do not waste time here - // SET_BIT(SPCR, SPE); - - SPDR = data; - } - - inline async command uint8_t FastSpiByte.splitRead() - { - while( !( SPSR & 0x80 ) ) - ; - return SPDR; - } - - inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) - { - uint8_t b; - - while( !( SPSR & 0x80 ) ) - ; - b = SPDR; - SPDR = data; - - return b; - } - - inline async command uint8_t FastSpiByte.write(uint8_t data) - { - // the SPI must have been started, so do not waste time here - // SET_BIT(SPCR, SPE); - - SPDR = data; - while( !( SPSR & 0x80 ) ) - ; - - return SPDR; - } } -- 2.39.2