From 91ef6313cbb108fb4aab68b4762d57c6b0faa97b Mon Sep 17 00:00:00 2001
From: smckown <smckown@4bc1554a-c7f2-4f65-a403-e0be01f0239c>
Date: Tue, 9 Sep 2008 13:47:02 +0000
Subject: [PATCH] These changes allow a BC+ equipped msp430 to properly
 calibrate.

---
 tos/chips/msp430/clock/Msp430ClockP.nc | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/tos/chips/msp430/clock/Msp430ClockP.nc b/tos/chips/msp430/clock/Msp430ClockP.nc
index 55aaba33..e700dd52 100644
--- a/tos/chips/msp430/clock/Msp430ClockP.nc
+++ b/tos/chips/msp430/clock/Msp430ClockP.nc
@@ -42,8 +42,18 @@ implementation
   MSP430REG_NORACE(TBCTL);
   MSP430REG_NORACE(TBIV);
 
+  #if defined(__MSP430_HAS_BC2__)	/* basic clock module+ */
+  #define FIRST_STEP 0x1000
+  #else					/* orig basic clock module */
+  #define RSEL3 0
+  #define FIRST_STEP 0x800
+  #endif
+
   enum
   {
+    DCOX = DCO2 + DCO1 + DCO0,
+    MODX = MOD4 + MOD3 + MOD2 + MOD1 + MOD0,
+    RSELX = RSEL3 + RSEL2 + RSEL1 + RSEL0,
     ACLK_CALIB_PERIOD = 8,
     TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
   };
@@ -68,7 +78,7 @@ implementation
     // .XTS = 0; set low frequency mode for LXFT1
     // .DIVA = 0; set the divisor on ACLK to 1
     // .RSEL, do not modify
-    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+    BCSCTL1 = XT2OFF | (BCSCTL1 & RSELX);
 
     // BCSCTL2
     // .SELM = 0; select DCOCLK as source for MCLK
@@ -159,7 +169,7 @@ implementation
 
   void set_dco_calib( int calib )
   {
-    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
+    BCSCTL1 = (BCSCTL1 & ~RSELX) | ((calib >> 8) & RSELX);
     DCOCTL = calib & 0xff;
   }
 
@@ -197,16 +207,16 @@ implementation
     // Binary search for RSEL,DCO,DCOMOD.
     // It's okay that RSEL isn't monotonic.
 
-    for( calib=0,step=0x800; step!=0; step>>=1 )
+    for( calib=0,step=FIRST_STEP; step!=0; step>>=1 )
     {
       // if the step is not past the target, commit it
       if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
         calib |= step;
     }
 
-    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
-    if( (calib & 0x0e0) == 0x0e0 )
-      calib &= ~0x01f;
+    // if DCOx is all 1s in calib, then MODx is not useable, set it to 0
+    if( (calib & DCOX) == DCOX )
+      calib &= ~MODX;
 
     set_dco_calib( calib );
   }
-- 
2.39.2