X-Git-Url: https://oss.titaniummirror.com/gitweb?a=blobdiff_plain;f=gcc%2Fconfig%2Frs6000%2Faix.h;h=4e736ce3fc231589382dea907339c6bbc932d9a9;hb=6fed43773c9b0ce596dca5686f37ac3fc0fa11c0;hp=d8dde5bbba815ed66311606a1964ad9e7297fb53;hpb=27b11d56b743098deb193d510b337ba22dc52e5c;p=msp430-gcc.git diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h index d8dde5bb..4e736ce3 100644 --- a/gcc/config/rs6000/aix.h +++ b/gcc/config/rs6000/aix.h @@ -1,58 +1,110 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 POWER running AIX. - Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Free Software Foundation, Inc. -This file is part of GNU CC. + This file is part of GCC. -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ /* Yes! We are AIX! */ #define DEFAULT_ABI ABI_AIX -#undef TARGET_AIX +#undef TARGET_AIX #define TARGET_AIX 1 + +/* AIX always has a TOC. */ +#define TARGET_NO_TOC 0 +#define TARGET_TOC 1 +#define FIXED_R2 1 + +/* AIX allows r13 to be used in 32-bit mode. */ +#define FIXED_R13 0 + +/* 32-bit and 64-bit AIX stack boundary is 128. */ +#undef STACK_BOUNDARY +#define STACK_BOUNDARY 128 + +#undef TARGET_IEEEQUAD +#define TARGET_IEEEQUAD 0 + /* The AIX linker will discard static constructors in object files before collect has a chance to see them, so scan the object files directly. */ #define COLLECT_EXPORT_LIST /* Handle #pragma weak and #pragma pack. */ -#define HANDLE_SYSV_PRAGMA +#define HANDLE_SYSV_PRAGMA 1 /* This is the only version of nm that collect2 can work with. */ #define REAL_NM_FILE_NAME "/usr/ucb/nm" #define USER_LABEL_PREFIX "" + /* Don't turn -B into -L if the argument specifies a relative file name. */ #define RELATIVE_PREFIX_NOT_LINKDIR /* Because of the above, we must have gcc search itself to find libgcc.a. */ #define LINK_LIBGCC_SPECIAL_1 +#define MFWRAP_SPEC " %{static: %{fmudflap|fmudflapth: \ + -brename:malloc,__wrap_malloc -brename:__real_malloc,malloc \ + -brename:free,__wrap_free -brename:__real_free,free \ + -brename:calloc,__wrap_calloc -brename:__real_calloc,calloc \ + -brename:realloc,__wrap_realloc -brename:__real_realloc,realloc \ + -brename:mmap,__wrap_mmap -brename:__real_mmap,mmap \ + -brename:munmap,__wrap_munmap -brename:__real_munmap,munmap \ + -brename:alloca,__wrap_alloca -brename:__real_alloca,alloca \ +} %{fmudflapth: \ + -brename:pthread_create,__wrap_pthread_create \ + -brename:__real_pthread_create,pthread_create \ + -brename:pthread_join,__wrap_pthread_join \ + -brename:__real_pthread_join,pthread_join \ + -brename:pthread_exit,__wrap_pthread_exit \ + -brename:__real_pthread_exit,pthread_exit \ +}} %{fmudflap|fmudflapth: \ + -brename:main,__wrap_main -brename:__real_main,main \ +}" + +#define MFLIB_SPEC " %{fmudflap: -lmudflap \ + %{static:%(link_gcc_c_sequence) -lmudflap}} \ + %{fmudflapth: -lmudflapth -lpthread \ + %{static:%(link_gcc_c_sequence) -lmudflapth}} " + /* Names to predefine in the preprocessor for this target machine. */ -#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \ --Asystem=unix -Asystem=aix -Acpu=rs6000 -Amachine=rs6000" +#define TARGET_OS_AIX_CPP_BUILTINS() \ + do \ + { \ + builtin_define ("_IBMR2"); \ + builtin_define ("_POWER"); \ + builtin_define ("_AIX"); \ + builtin_define ("_AIX32"); \ + builtin_define ("_AIX41"); \ + builtin_define ("_LONG_LONG"); \ + if (TARGET_LONG_DOUBLE_128) \ + builtin_define ("__LONGDOUBLE128"); \ + builtin_assert ("system=unix"); \ + builtin_assert ("system=aix"); \ + } \ + while (0) /* Define appropriate architecture macros for preprocessor depending on target switches. */ #define CPP_SPEC "%{posix: -D_POSIX_SOURCE}\ - %{ansi: -D_ANSI_C_SOURCE}\ - %(cpp_cpu)" + %{ansi: -D_ANSI_C_SOURCE}" -#undef CPP_DEFAULT_SPEC -#define CPP_DEFAULT_SPEC "-D_ARCH_PWR" +#define CC1_SPEC "%(cc1_cpu)" #undef ASM_DEFAULT_SPEC #define ASM_DEFAULT_SPEC "" @@ -62,20 +114,20 @@ Boston, MA 02111-1307, USA. */ Don't do this until the fixed IBM assembler is more generally available. When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no - longer be needed. Also, the extern declaration of mcount in ASM_FILE_START - will no longer be needed. */ + longer be needed. Also, the extern declaration of mcount in + rs6000_xcoff_file_start will no longer be needed. */ /* #define ASM_SPEC "-u %(asm_cpu)" */ /* Default location of syscalls.exp under AIX */ -#ifndef CROSS_COMPILE +#ifndef CROSS_DIRECTORY_STRUCTURE #define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp" #else #define LINK_SYSCALLS_SPEC "" #endif /* Default location of libg.exp under AIX */ -#ifndef CROSS_COMPILE +#ifndef CROSS_DIRECTORY_STRUCTURE #define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp" #else #define LINK_LIBG_SPEC "" @@ -103,43 +155,47 @@ Boston, MA 02111-1307, USA. */ #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc" +/* Static linking with shared libstdc++ requires libsupc++ as well. */ +#define LIBSTDCXX_STATIC "-lstdc++ -lsupc++" + +/* This now supports a natural alignment mode. */ /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */ #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ - (TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \ - ? get_inner_array_type (FIELD) \ - : TREE_TYPE (FIELD)) == DFmode \ - ? MIN ((COMPUTED), 32) : (COMPUTED)) + ((TARGET_ALIGN_NATURAL == 0 \ + && TYPE_MODE (strip_array_types (TREE_TYPE (FIELD))) == DFmode) \ + ? MIN ((COMPUTED), 32) \ + : (COMPUTED)) /* AIX increases natural record alignment to doubleword if the first field is an FP double while the FP fields remain word aligned. */ -#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ - ((TREE_CODE (STRUCT) == RECORD_TYPE \ - || TREE_CODE (STRUCT) == UNION_TYPE \ - || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ - && TYPE_FIELDS (STRUCT) != 0 \ - && DECL_MODE (TYPE_FIELDS (STRUCT)) == DFmode \ - ? MAX (MAX ((COMPUTED), (SPECIFIED)), 64) \ +#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ + ((TREE_CODE (STRUCT) == RECORD_TYPE \ + || TREE_CODE (STRUCT) == UNION_TYPE \ + || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ + && TARGET_ALIGN_NATURAL == 0 \ + ? rs6000_special_round_type_align (STRUCT, COMPUTED, SPECIFIED) \ : MAX ((COMPUTED), (SPECIFIED))) - +/* The AIX ABI isn't explicit on whether aggregates smaller than a + word/doubleword should be padded upward or downward. One could + reasonably assume that they follow the normal rules for structure + layout treating the parameter area as any other block of memory, + then map the reg param area to registers, i.e., pad upward, which + is the way IBM Compilers for AIX behave. + Setting both of the following defines results in this behavior. */ +#define AGGREGATE_PADDING_FIXED 1 +#define AGGREGATES_PAD_UPWARD_ALWAYS 1 + +/* Specify padding for the last element of a block move between + registers and memory. FIRST is nonzero if this is the only + element. */ +#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ + (!(FIRST) ? upward : FUNCTION_ARG_PADDING (MODE, TYPE)) /* Indicate that jump tables go in the text section. */ #define JUMP_TABLES_IN_TEXT_SECTION 1 -/* Enable AIX XL compiler calling convention breakage compatibility. */ -#undef TARGET_XL_CALL -#define MASK_XL_CALL 0x40000000 -#define TARGET_XL_CALL (target_flags & MASK_XL_CALL) -#undef SUBTARGET_SWITCHES -#define SUBTARGET_SWITCHES \ - {"xl-call", MASK_XL_CALL, \ - N_("Always pass floating-point arguments in memory") }, \ - {"no-xl-call", - MASK_XL_CALL, \ - N_("Don't always pass floating-point arguments in memory") }, \ - SUBSUBTARGET_SWITCHES -#define SUBSUBTARGET_SWITCHES - /* Define any extra SPECS that the compiler needs to generate. */ #undef SUBTARGET_EXTRA_SPECS #define SUBTARGET_EXTRA_SPECS \ @@ -148,50 +204,59 @@ Boston, MA 02111-1307, USA. */ /* Define cutoff for using external functions to save floating point. */ #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63) +/* And similarly for general purpose registers. */ +#define GP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) < 32) + +/* __throw will restore its own return address to be the same as the + return address of the function that the throw is being made to. + This is unfortunate, because we want to check the original + return address to see if we need to restore the TOC. + So we have to squirrel it away with this. */ +#define SETUP_FRAME_ADDRESSES() rs6000_aix_emit_builtin_unwind_init () -/* Optabs entries for the int->float routines and quad FP operations - using the standard AIX names. */ -#define ADDTF3_LIBCALL "_xlqadd" -#define DIVTF3_LIBCALL "_xlqdiv" -#define MULTF3_LIBCALL "_xlqmul" -#define SUBTF3_LIBCALL "_xlqsub" +/* If the current unwind info (FS) does not contain explicit info + saving R2, then we have to do a minor amount of code reading to + figure out if it was saved. The big problem here is that the + code that does the save/restore is generated by the linker, so + we have no good way to determine at compile time what to do. */ -#define INIT_TARGET_OPTABS \ +#define R_LR 65 + +#ifdef __64BIT__ +#define MD_FROB_UPDATE_CONTEXT(CTX, FS) \ do { \ - if (! TARGET_POWER2 && ! TARGET_POWERPC && TARGET_HARD_FLOAT) \ + if ((FS)->regs.reg[2].how == REG_UNSAVED) \ { \ - fixdfsi_libfunc = init_one_libfunc (RS6000_ITRUNC); \ - fixunsdfsi_libfunc = init_one_libfunc (RS6000_UITRUNC); \ + unsigned int *insn \ + = (unsigned int *) \ + _Unwind_GetGR ((CTX), R_LR); \ + if (*insn == 0xE8410028) \ + _Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 40); \ } \ - if (TARGET_HARD_FLOAT) \ + } while (0) +#else +#define MD_FROB_UPDATE_CONTEXT(CTX, FS) \ + do { \ + if ((FS)->regs.reg[2].how == REG_UNSAVED) \ { \ - add_optab->handlers[(int) TFmode].libfunc \ - = init_one_libfunc (ADDTF3_LIBCALL); \ - sub_optab->handlers[(int) TFmode].libfunc \ - = init_one_libfunc (SUBTF3_LIBCALL); \ - smul_optab->handlers[(int) TFmode].libfunc \ - = init_one_libfunc (MULTF3_LIBCALL); \ - sdiv_optab->handlers[(int) TFmode].libfunc \ - = init_one_libfunc (DIVTF3_LIBCALL); \ + unsigned int *insn \ + = (unsigned int *) \ + _Unwind_GetGR ((CTX), R_LR); \ + if (*insn == 0x80410014) \ + _Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 20); \ } \ } while (0) - -/* AIX always has a TOC. */ -#define TARGET_NO_TOC 0 -#define TARGET_TOC 1 - -#define FIXED_R2 1 -/* AIX allows r13 to be used. */ -#define FIXED_R13 0 - -/* __throw will restore its own return address to be the same as the - return address of the function that the throw is being made to. - This is unfortunate, because we want to check the original - return address to see if we need to restore the TOC. - So we have to squirrel it away with this. */ -#define SETUP_FRAME_ADDRESSES() rs6000_aix_emit_builtin_unwind_init () +#endif #define PROFILE_HOOK(LABEL) output_profile_hook (LABEL) /* Print subsidiary information on the compiler version in use. */ #define TARGET_VERSION ; + +/* No version of AIX fully supports AltiVec or 64-bit instructions in + 32-bit mode. */ +#define OS_MISSING_POWERPC64 1 +#define OS_MISSING_ALTIVEC 1 + +/* WINT_TYPE */ +#define WINT_TYPE "int"