X-Git-Url: https://oss.titaniummirror.com/gitweb?a=blobdiff_plain;f=gcc%2Fconfig%2Fspu%2Fspu.opt;fp=gcc%2Fconfig%2Fspu%2Fspu.opt;h=1589199b60b42f00ece2c3407d00f060c4570284;hb=6fed43773c9b0ce596dca5686f37ac3fc0fa11c0;hp=0000000000000000000000000000000000000000;hpb=27b11d56b743098deb193d510b337ba22dc52e5c;p=msp430-gcc.git diff --git a/gcc/config/spu/spu.opt b/gcc/config/spu/spu.opt new file mode 100644 index 00000000..1589199b --- /dev/null +++ b/gcc/config/spu/spu.opt @@ -0,0 +1,84 @@ +; Options for the SPU port of the compiler +; Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc. + +; This file is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3 of the License, or (at your option) +; any later version. + +; This file is distributed in the hope that it will be useful, but WITHOUT +; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; . + +mwarn-reloc +Target Report Mask(WARN_RELOC) +Emit warnings when run-time relocations are generated + +merror-reloc +Target Report Mask(ERROR_RELOC) +Emit errors when run-time relocations are generated + +mbranch-cost= +Target RejectNegative Joined UInteger Var(spu_branch_cost) Init(20) +Specify cost of branches (Default 20) + +msafe-dma +Target Report RejectNegative Mask(SAFE_DMA) +Make sure loads and stores are not moved past DMA instructions + +munsafe-dma +Target Report RejectNegative InverseMask(SAFE_DMA) +volatile must be specified on any memory that is effected by DMA + +mdual-nops +Target Report Var(spu_dual_nops,10) Init(10) +Insert nops when it might improve performance by allowing dual issue (default) + +mdual-nops= +Target RejectNegative Joined UInteger Var(spu_dual_nops) +Insert nops when it might improve performance by allowing dual issue (default) + +mstdmain +Target Report Mask(STD_MAIN) +Use standard main function as entry for startup + +mbranch-hints +Target Report Mask(BRANCH_HINTS) +Generate branch hints for branches + +mhint-max-nops= +Target RejectNegative Joined UInteger Var(spu_max_nops) Init(2) +Maximum number of nops to insert for a hint (Default 2) + +mhint-max-distance= +Target RejectNegative Joined Var(spu_max_distance_str) +Approximate maximum number of instructions to allow between a hint and its branch [125] + +msmall-mem +Target Report RejectNegative InverseMask(LARGE_MEM) +Generate code for 18 bit addressing + +mlarge-mem +Target Report RejectNegative Mask(LARGE_MEM) +Generate code for 32 bit addressing + +mfixed-range= +Target RejectNegative Joined Var(spu_fixed_range_string) +Specify range of registers to make fixed + +msafe-hints +Target Report Mask(SAFE_HINTS) +Insert hbrp instructions after hinted branch targets to avoid the SPU hang issue + +march= +Target RejectNegative Joined Var(spu_arch_string) +Generate code for given CPU + +mtune= +Target RejectNegative Joined Var(spu_tune_string) +Schedule code for given CPU