X-Git-Url: https://oss.titaniummirror.com/gitweb?a=blobdiff_plain;f=rgb.c;h=151182c1fc0b07911118950cd0d4c36f7cd83123;hb=b8cc7d22ae11576cdf44ca2cd3b39d64e514a930;hp=85254429a5f4871bfedcde1b55a1e3dec5bae9f3;hpb=77bec8ca2aa7d464cb5d3034a497e0ff8933864a;p=rgblamp.git diff --git a/rgb.c b/rgb.c index 8525442..151182c 100644 --- a/rgb.c +++ b/rgb.c @@ -6,13 +6,13 @@ #include -#define PINS_PORTA 0b10011000 -#define PINS_PORTB 0b00001000 +#define PINS_PORTB 0b00101001 +#define PINS_PORTC 0b00000100 void rgb_init() { /* Initialize rgb - * CCP1 on RB3, CCP2 on RA7, CCP3 on RA3, CCP4 on RA4 + * CCP1 on RC2, CCP2 on RB3, CCP3 on RB5, CCP4 on RB0 * - Fosc = 8 MHz, 4 MHz, 2 MHz * - Prescale = 4, 1, 1 * - PRx value = 0xff @@ -20,30 +20,31 @@ void rgb_init() */ /* Set rgb Rxn pins as outputs. */ - PORTA &= ~PINS_PORTA; - TRISA &= ~PINS_PORTA; PORTB &= ~PINS_PORTB; TRISB &= ~PINS_PORTB; + PORTC &= ~PINS_PORTC; + TRISC &= ~PINS_PORTC; - /* Configure ECCP1 */ + /* Configure CCP1 */ CCP1CON = 0b00001100; - CCPR1L = 0; /* Initial rgb value; only using 8 LSBs */ + CCPR1L = 0; /* Initial red value; only using 8 LSBs */ - /* Configure ECCP2 */ - APFCON0 |= 0b00001000; /* Use alternate output pin RA7 */ + /* Configure CCP2 */ + CCP2SEL = 1; /* CCP2 is on RB3 */ CCP2CON = 0b00001100; - CCPR2L = 0; /* Initial rgb value; only using 8 LSBs */ + CCPR2L = 0; /* Initial grn value; only using 8 LSBs */ /* Configure CCP3 */ + CCP3SEL = 1; /* CCP2 is on RB5 */ CCP3CON = 0b00001100; - CCPR3L = 0; /* Initial rgb value; only using 8 LSBs */ + CCPR3L = 0; /* Initial blu value; only using 8 LSBs */ /* Configure CCP4 */ CCP4CON = 0b00001100; - CCPR4L = 0; /* Initial rgb value; only using 8 LSBs */ + CCPR4L = 0; /* Initial wht value; only using 8 LSBs */ /* Configure Timer2. Start it to set 0 outputs, then stop it. */ - CCPTMRS = 0; /* All CCPx use Timer 2 */ + CCPTMRS0 = 0; /* CCP[1-4] use Timer 2 */ TMR2IF = 0; PR2 = 0xff;