X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Farm%2Fthumb.d;fp=gas%2Ftestsuite%2Fgas%2Farm%2Fthumb.d;h=7ee5582d6000de1e1879ae337effcc5e7de66c16;hp=7f9b253a443f30a8c54ee7e2e0fc16ea02631845;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b diff --git a/gas/testsuite/gas/arm/thumb.d b/gas/testsuite/gas/arm/thumb.d index 7f9b253..7ee5582 100644 --- a/gas/testsuite/gas/arm/thumb.d +++ b/gas/testsuite/gas/arm/thumb.d @@ -2,7 +2,8 @@ # as: -mcpu=arm7t # objdump: -dr --prefix-addresses --show-raw-insn # The arm-aout and arm-pe ports do not support Thumb branch relocations. -# not-target: *-*-*aout* *-*-pe +# EABI targets have their own variant. +# not-target: *-*-*aout* *-*-pe *-*-*eabi *-*-symbianelf .*: +file format .*arm.* @@ -19,10 +20,10 @@ Disassembly of section \.text: 0+012 <[^>]+> 1ca2 adds r2, r4, #2 0+014 <[^>]+> 1beb subs r3, r5, r7 0+016 <[^>]+> 1fe2 subs r2, r4, #7 -0+018 <[^>]+> 24ff movs r4, #255 -0+01a <[^>]+> 2bfa cmp r3, #250 -0+01c <[^>]+> 367b adds r6, #123 -0+01e <[^>]+> 3d80 subs r5, #128 +0+018 <[^>]+> 24ff movs r4, #255.* +0+01a <[^>]+> 2bfa cmp r3, #250.* +0+01c <[^>]+> 367b adds r6, #123.* +0+01e <[^>]+> 3d80 subs r5, #128.* 0+020 <[^>]+> 402b ands r3, r5 0+022 <[^>]+> 4074 eors r4, r6 0+024 <[^>]+> 4081 lsls r1, r0 @@ -47,40 +48,40 @@ Disassembly of section \.text: 0+04a <[^>]+> 45f4 cmp ip, lr 0+04c <[^>]+> 4648 mov r0, r9 0+04e <[^>]+> 46a1 mov r9, r4 -0+050 <[^>]+> 46c0 nop \(mov r8, r8\) +0+050 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+052 <[^>]+> 4738 bx r7 0+054 <[^>]+> 4740 bx r8 -0+056 <[^>]+> 46c0 nop \(mov r8, r8\) +0+056 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+058 <[^>]+> 4778 bx pc -0+05a <[^>]+> 4b20 ldr r3, \[pc, #128\] \(0+0dc <[^>]+>\) -0+05c <[^>]+> 4c02 ldr r4, \[pc, #8\] \(0+068 <[^>]+>\) +0+05a <[^>]+> 4b20 ldr r3, \[pc, #128\] ; \(0+0dc <[^>]+>\) +0+05c <[^>]+> 4c02 ldr r4, \[pc, #8\] ; \(0+068 <[^>]+>\) 0+05e <[^>]+> 5088 str r0, \[r1, r2\] 0+060 <[^>]+> 5511 strb r1, \[r2, r4\] 0+062 <[^>]+> 59f5 ldr r5, \[r6, r7\] 0+064 <[^>]+> 5d62 ldrb r2, \[r4, r5\] -0+066 <[^>]+> 46c0 nop \(mov r8, r8\) +0+066 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+068 <[^>]+> 52d1 strh r1, \[r2, r3\] 0+06a <[^>]+> 5a23 ldrh r3, \[r4, r0\] 0+06c <[^>]+> 57f1 ldrsb r1, \[r6, r7\] 0+06e <[^>]+> 5f42 ldrsh r2, \[r0, r5\] -0+070 <[^>]+> 67db str r3, \[r3, #124\] -0+072 <[^>]+> 6fe1 ldr r1, \[r4, #124\] +0+070 <[^>]+> 67db str r3, \[r3, #124\].* +0+072 <[^>]+> 6fe1 ldr r1, \[r4, #124\].* 0+074 <[^>]+> 682d ldr r5, \[r5, #0\] 0+076 <[^>]+> 77e9 strb r1, \[r5, #31\] 0+078 <[^>]+> 7161 strb r1, \[r4, #5\] 0+07a <[^>]+> 7032 strb r2, \[r6, #0\] -0+07c <[^>]+> 87ec strh r4, \[r5, #62\] +0+07c <[^>]+> 87ec strh r4, \[r5, #62\].* 0+07e <[^>]+> 8885 ldrh r5, \[r0, #4\] 0+080 <[^>]+> 8813 ldrh r3, \[r2, #0\] -0+082 <[^>]+> 93ff str r3, \[sp, #1020\] -0+084 <[^>]+> 990b ldr r1, \[sp, #44\] +0+082 <[^>]+> 93ff str r3, \[sp, #1020\].* +0+084 <[^>]+> 990b ldr r1, \[sp, #44\].* 0+086 <[^>]+> 9a00 ldr r2, \[sp, #0\] -0+088 <[^>]+> a7ff add r7, pc, #1020 \(adr r7, 0+488 <[^>]+>\) -0+08a <[^>]+> ac80 add r4, sp, #512 -0+08c <[^>]+> b043 add sp, #268 -0+08e <[^>]+> b09a sub sp, #104 -0+090 <[^>]+> b0c3 sub sp, #268 -0+092 <[^>]+> b01b add sp, #108 +0+088 <[^>]+> a7ff add r7, pc, #1020 ; \(adr r7, 0+488 <[^>]+>\) +0+08a <[^>]+> ac80 add r4, sp, #512.* +0+08c <[^>]+> b043 add sp, #268.* +0+08e <[^>]+> b09a sub sp, #104.* +0+090 <[^>]+> b0c3 sub sp, #268.* +0+092 <[^>]+> b01b add sp, #108.* 0+094 <[^>]+> b417 push {r0, r1, r2, r4} 0+096 <[^>]+> b5f9 push {r0, r3, r4, r5, r6, r7, lr} 0+098 <[^>]+> bc98 pop {r3, r4, r7} @@ -108,33 +109,33 @@ Disassembly of section \.text: 0+0c4 <[^>]+> e7d0 b.n 0+068 <[^>]+> 0+0c6 <[^>]+> 00ac lsls r4, r5, #2 0+0c8 <[^>]+> 1c9a adds r2, r3, #2 -0+0ca <[^>]+> b07f add sp, #508 -0+0cc <[^>]+> b0ff sub sp, #508 -0+0ce <[^>]+> a8ff add r0, sp, #1020 -0+0d0 <[^>]+> a0ff add r0, pc, #1020 \(adr r0, 0+4d0 <[^>]+>\) -0+0d2 <[^>]+> b01a add sp, #104 -0+0d4 <[^>]+> b09a sub sp, #104 -0+0d6 <[^>]+> a81a add r0, sp, #104 -0+0d8 <[^>]+> a01a add r0, pc, #104 \(adr r0, 0+144 <[^>]+>\) -0+0da <[^>]+> 3168 adds r1, #104 -0+0dc <[^>]+> 2668 movs r6, #104 -0+0de <[^>]+> 2f68 cmp r7, #104 -0+0e0 <[^>]+> 46c0 nop \(mov r8, r8\) -0+0e2 <[^>]+> 46c0 nop \(mov r8, r8\) +0+0ca <[^>]+> b07f add sp, #508.* +0+0cc <[^>]+> b0ff sub sp, #508.* +0+0ce <[^>]+> a8ff add r0, sp, #1020.* +0+0d0 <[^>]+> a0ff add r0, pc, #1020 ; \(adr r0, 0+4d0 <[^>]+>\) +0+0d2 <[^>]+> b01a add sp, #104.* +0+0d4 <[^>]+> b09a sub sp, #104.* +0+0d6 <[^>]+> a81a add r0, sp, #104.* +0+0d8 <[^>]+> a01a add r0, pc, #104 ; \(adr r0, 0+144 <[^>]+>\) +0+0da <[^>]+> 3168 adds r1, #104.* +0+0dc <[^>]+> 2668 movs r6, #104.* +0+0de <[^>]+> 2f68 cmp r7, #104.* +0+0e0 <[^>]+> 46c0 nop ; \(mov r8, r8\) +0+0e2 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+0e4 <[^>]+> eafffffe b 0+0e4 <[^>]+> 0+0e8 <[^>]+> ea000011 b 0+134 <[^>]+> 0+0ec <[^>]+> ebfffffc bl 0+0e4 <[^>]+> 0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+> 0+0f4 <[^>]+> e12fff10 bx r0 0+0f8 <[^>]+> ef123456 (swi|svc) 0x00123456 -0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0, 0+110 <[^>]+>\) +0+0fc <[^>]+> a004 add r0, pc, #16 ; \(adr r0, 0+110 <[^>]+>\) 0+0fe <[^>]+> e77f b.n 0+000 <[^>]+> 0+100 <[^>]+> e018 b.n 0+134 <[^>]+> 0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+> 0+106 <[^>]+> f000 f815 bl 0+134 <[^>]+> 0+10a <[^>]+> 4700 bx r0 -0+10c <[^>]+> dfff (swi|svc) 255 -0+10e <[^>]+> 46c0 nop \(mov r8, r8\) +0+10c <[^>]+> dfff (swi|svc) 255.* +0+10e <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+110 <[^>]+> d010 beq.n 0+134 <[^>]+> 0+112 <[^>]+> d10f bne.n 0+134 <[^>]+> 0+114 <[^>]+> d20e bcs.n 0+134 <[^>]+> @@ -156,9 +157,9 @@ Disassembly of section \.text: 0+134 <[^>]+> f000 fc00 bl 0+938 <[^>]+> \.\.\. 0+938 <[^>]+> f7ff fbfc bl 0+134 <[^>]+> -0+93c <[^>]+> 4801 ldr r0, \[pc, #4\] \(0+944 <[^>]+>\) -0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] \(0+944 <[^>]+>\) -0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] \(0+948 <[^>]+>\) -0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] \(0+948 <[^>]+>\) -0+944 <[^>]+> 46c0 nop \(mov r8, r8\) -0+946 <[^>]+> 46c0 nop \(mov r8, r8\) +0+93c <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\) +0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\) +0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) +0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) +0+944 <[^>]+> 46c0 nop ; \(mov r8, r8\) +0+946 <[^>]+> 46c0 nop ; \(mov r8, r8\)