X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fbfin%2Finvalid_arith_mode.s;fp=gas%2Ftestsuite%2Fgas%2Fbfin%2Finvalid_arith_mode.s;h=33a43379df3b3ba23842e689cb3937675edd36f2;hp=0000000000000000000000000000000000000000;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b diff --git a/gas/testsuite/gas/bfin/invalid_arith_mode.s b/gas/testsuite/gas/bfin/invalid_arith_mode.s new file mode 100644 index 0000000..33a4337 --- /dev/null +++ b/gas/testsuite/gas/bfin/invalid_arith_mode.s @@ -0,0 +1,46 @@ + .text + + // All available modes: FU, IS, IU, T, TFU, S2RND, ISS2, IH, W32 + + // Accumulator to Half D-register Moves + + R0.L = A0 (W32); + + // Accumulator to D-register Moves + + R0 = A0 (T); + R0 = A0 (TFU); + R0 = A0 (IH); + R0 = A0 (W32); + + // Multiply 16-Bit Operands to Half Dreg + + R0.H = R1.L * R2.H (W32); + + // Multiply 16-Bit Operands to Dreg + + R0 = R1.L * R2.H (IU); + R0 = R1.L * R2.H (T); + R0 = R1.L * R2.H (TFU); + R0 = R1.L * R2.H (IH); + R0 = R1.L * R2.H (W32); + + // Multiply and Multiply-Accumulate to Accumulator + + A0 = R1.L * R2.H (IU); + A0 = R1.L * R2.H (T); + A0 = R1.L * R2.H (TFU); + A0 = R1.L * R2.H (S2RND); + A0 = R1.L * R2.H (ISS2); + A0 = R1.L * R2.H (IH); + + // Multiply and Multiply-Accumulate to Half-Register + + R0.L = (A0 = R1.L * R2.H) (W32); + + // Multiply and Multiply-Accumulate to Data Register + + R0 = (A0 = R1.L * R2.H) (T); + R0 = (A0 = R1.L * R2.H) (TFU); + R0 = (A0 = R1.L * R2.H) (IH); + R0 = (A0 = R1.L * R2.H) (W32);