X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fi386%2Fintel-regs.s;fp=gas%2Ftestsuite%2Fgas%2Fi386%2Fintel-regs.s;h=5aac9563346c81df1926c9025f4e339d322633be;hp=0000000000000000000000000000000000000000;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b

diff --git a/gas/testsuite/gas/i386/intel-regs.s b/gas/testsuite/gas/i386/intel-regs.s
new file mode 100644
index 0000000..5aac956
--- /dev/null
+++ b/gas/testsuite/gas/i386/intel-regs.s
@@ -0,0 +1,57 @@
+	.text
+	.intel_syntax noprefix
+
+	.arch i286
+	.code16
+	mov	ax, eax			; add	[bx+si], al
+	mov	ax, rax			; add	[bx+si], al
+	mov	ax, axl			; add	[bx+si], al
+	mov	ax, r8b			; add	[bx+si], al
+	mov	ax, r8w			; add	[bx+si], al
+	mov	ax, r8d			; add	[bx+si], al
+	mov	ax, r8			; add	[bx+si], al
+	mov	ax, fs			; add	[bx+si], al
+	mov	ax, st			; add	[bx+si], al
+	mov	ax, cr0			; add	[bx+si], al
+	mov	ax, dr0			; add	[bx+si], al
+	mov	ax, tr0			; add	[bx+si], al
+	mov	ax, mm0			; add	[bx+si], al
+	mov	ax, xmm0		; add	[bx+si], al
+	mov	ax, ymm0		; add	[bx+si], al
+
+	.arch generic32
+	.code32
+	mov	eax, rax
+	mov	eax, axl
+	mov	eax, r8b
+	mov	eax, r8w
+	mov	eax, r8d
+	mov	eax, r8
+	mov	eax, st
+	mov	eax, cr0
+	mov	eax, dr0
+	mov	eax, tr0
+	mov	eax, mm0
+	mov	eax, xmm0
+	mov	eax, ymm0
+
+	.arch .387
+	ffree	st
+
+	.arch .mmx
+	pxor	mm0, mm0
+
+	.arch .sse
+	xorps	xmm0, xmm0
+
+	.arch .avx
+	vxorps	ymm0, ymm0, ymm0
+
+	.arch generic64
+	.code64
+	mov	axl, r8b
+	mov	ax, r8w
+	mov	eax, r8d
+	mov	rax, r8
+ymm8:
+	jmp	ymm8