X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-clmul-intel.d;fp=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-clmul-intel.d;h=908904f34c5b9fc7e82b7fa352c02769de10df8f;hp=0000000000000000000000000000000000000000;hb=d5da4f291af551c0b8b79e1d4a9b173d60e5c10e;hpb=7b5ea4fcdf2819e070665ab5610f8b48e3867c10 diff --git a/gas/testsuite/gas/i386/x86-64-clmul-intel.d b/gas/testsuite/gas/i386/x86-64-clmul-intel.d new file mode 100644 index 0000000..908904f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-clmul-intel.d @@ -0,0 +1,31 @@ +#source: x86-64-clmul.s +#as: -J +#objdump: -dw -Mintel +#name: x86-64 PCLMUL (Intel mode) + +.*: +file format .* + +Disassembly of section .text: + +0+ : +[ ]*[a-f0-9]+: 66 0f 3a 44 01 08 pclmulqdq xmm0,XMMWORD PTR \[rcx\],0x8 +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq xmm0,xmm1,0x8 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 00 pclmullqlqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 00 pclmullqlqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 01 pclmulhqlqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 01 pclmulhqlqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 10 pclmullqhqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 10 pclmullqhqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 11 pclmulhqhqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 11 pclmulhqhqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 08 pclmulqdq xmm0,XMMWORD PTR \[rcx\],0x8 +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq xmm0,xmm1,0x8 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 00 pclmullqlqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 00 pclmullqlqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 01 pclmulhqlqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 01 pclmulhqlqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 10 pclmullqhqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 10 pclmullqhqdq xmm0,xmm1 +[ ]*[a-f0-9]+: 66 0f 3a 44 01 11 pclmulhqhqdq xmm0,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+: 66 0f 3a 44 c1 11 pclmulhqhqdq xmm0,xmm1 +#pass