X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-mem-intel.d;fp=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-mem-intel.d;h=d40f0830690f48e25a4e211cc475c8630650258a;hp=0000000000000000000000000000000000000000;hb=d5da4f291af551c0b8b79e1d4a9b173d60e5c10e;hpb=7b5ea4fcdf2819e070665ab5610f8b48e3867c10 diff --git a/gas/testsuite/gas/i386/x86-64-mem-intel.d b/gas/testsuite/gas/i386/x86-64-mem-intel.d new file mode 100644 index 0000000..d40f083 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mem-intel.d @@ -0,0 +1,43 @@ +#source: x86-64-mem.s +#as: -J +#objdump: -dw -Mintel +#name: x86-64 mem (Intel mode) + +.*: +file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\] +[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\] +#pass