X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-xsave-intel.d;fp=gas%2Ftestsuite%2Fgas%2Fi386%2Fx86-64-xsave-intel.d;h=4659a2ee933f2195bc41104d5c94a2f244ee489a;hp=0000000000000000000000000000000000000000;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b

diff --git a/gas/testsuite/gas/i386/x86-64-xsave-intel.d b/gas/testsuite/gas/i386/x86-64-xsave-intel.d
new file mode 100644
index 0000000..4659a2e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-xsave-intel.d
@@ -0,0 +1,17 @@
+#source: x86-64-xsave.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 xsave (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	41 0f ae 29          	xrstor \[r9\]
+[ 	]*[a-f0-9]+:	41 0f ae 21          	xsave  \[r9\]
+[ 	]*[a-f0-9]+:	0f 01 d0             	xgetbv 
+[ 	]*[a-f0-9]+:	0f 01 d1             	xsetbv 
+[ 	]*[a-f0-9]+:	0f ae 29             	xrstor \[rcx\]
+[ 	]*[a-f0-9]+:	0f ae 21             	xsave  \[rcx\]
+#pass