X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fmips%2Fmips32r2.s;h=8dc6a51b2da536accd5d4a9c2669de539fe6fa06;hp=4731fc4186145fb556420d94efecc9881d0c33e4;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b

diff --git a/gas/testsuite/gas/mips/mips32r2.s b/gas/testsuite/gas/mips/mips32r2.s
index 4731fc4..8dc6a51 100644
--- a/gas/testsuite/gas/mips/mips32r2.s
+++ b/gas/testsuite/gas/mips/mips32r2.s
@@ -1,4 +1,4 @@
-# source file to test assembly of mips32r2 instructions
+# source file to test assembly of mips32r2 *non-fp* instructions
 
         .set noreorder
 	.set noat
@@ -63,19 +63,5 @@ text_label:
 
 	wrpgpr	$10, $25
 
-      # FPU (cp1) instructions
-      #
-      # Even registers are supported w/ 32-bit FPU, odd
-      # registers supported only for 64-bit FPU.
-      # Only the 32-bit FPU instructions are tested here.
-     
-	mfhc1	$17, $f0
-	mthc1	$17, $f0
-
-      # cp2 instructions
-
-	mfhc2	$17, 0x5555
-	mthc2	$17, 0x5555
-
 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
 	.space  8