X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=gas%2Ftestsuite%2Fgas%2Fppc%2Faltivec_and_spe.d;fp=gas%2Ftestsuite%2Fgas%2Fppc%2Faltivec_and_spe.d;h=45672b875d8669388b517d88bb8a9f5e693bd6c1;hp=0000000000000000000000000000000000000000;hb=d5da4f291af551c0b8b79e1d4a9b173d60e5c10e;hpb=7b5ea4fcdf2819e070665ab5610f8b48e3867c10

diff --git a/gas/testsuite/gas/ppc/altivec_and_spe.d b/gas/testsuite/gas/ppc/altivec_and_spe.d
new file mode 100644
index 0000000..45672b8
--- /dev/null
+++ b/gas/testsuite/gas/ppc/altivec_and_spe.d
@@ -0,0 +1,12 @@
+#as: -maltivec -mspe -mppc64 
+#objdump: -d -Maltivec -Mppc64
+#name: Check that ISA extensions can be specified before CPU selection
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section \.text:
+
+0+00 <.*>:
+   0:	7e 00 06 6c 	dssall
+   4:	7d 00 83 a6 	mtspr   512,r8
+   8:	4c 00 00 24 	rfid