X-Git-Url: https://oss.titaniummirror.com/gitweb?p=msp430-binutils.git;a=blobdiff_plain;f=ld%2Ftestsuite%2Fld-spu%2Fovl2.d;fp=ld%2Ftestsuite%2Fld-spu%2Fovl2.d;h=b1e344c456a47a0992850cf2ed44a0ee0a0be74d;hp=52b362d9c2ad2dba40fe59ff7bcd0d3e3ed9d267;hb=88750007d7869f178f0ba528f41efd3b74c424cf;hpb=6df9443a374e2b81278c61b8afc0a1eef7db280b

diff --git a/ld/testsuite/ld-spu/ovl2.d b/ld/testsuite/ld-spu/ovl2.d
index 52b362d..b1e344c 100644
--- a/ld/testsuite/ld-spu/ovl2.d
+++ b/ld/testsuite/ld-spu/ovl2.d
@@ -1,5 +1,5 @@
 #source: ovl2.s
-#ld: -N -T ovl.lnk --emit-relocs
+#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
 #objdump: -D -r
 
 .*elf32-spu
@@ -7,67 +7,131 @@
 Disassembly of section \.text:
 
 00000100 <_start>:
- 100:	33 00 06 00 	brsl	\$0,130 <00000000\.ovl_call\.f1_a1>	# 130
-			100: SPU_REL16	f1_a1
- 104:	33 00 03 80 	brsl	\$0,120 <00000000\.ovl_call\.10:4>	# 120
-			104: SPU_REL16	setjmp
- 108:	32 7f ff 00 	br	100 <_start>	# 100
-			108: SPU_REL16	_start
+.*	brsl	\$0,.* <00000000\.ovl_call\.f1_a1>.*
+.*SPU_REL16	f1_a1
+.*	brsl	\$0,.* <00000000\.ovl_call\.setjmp>.*
+.*SPU_REL16	setjmp
+.*	br	100 <_start>	# 100
+.*SPU_REL16	_start
 
 0000010c <setjmp>:
- 10c:	35 00 00 00 	bi	\$0
+.*	bi	\$0
 
 00000110 <longjmp>:
- 110:	35 00 00 00 	bi	\$0
-	...
-
-00000120 <00000000\.ovl_call.10:4>:
- 120:	42 00 86 4f 	ila	\$79,268	# 10c
- 124:	40 20 00 00 	nop	\$0
- 128:	42 00 00 4e 	ila	\$78,0
- 12c:	32 00 0a 80 	br	180 <__ovly_load>	# 180
-
-00000130 <00000000\.ovl_call.f1_a1>:
- 130:	42 02 00 4f 	ila	\$79,1024	# 400
- 134:	40 20 00 00 	nop	\$0
- 138:	42 00 00 ce 	ila	\$78,1
- 13c:	32 00 08 80 	br	180 <__ovly_load>	# 180
-
-00000140 <_SPUEAR_f1_a2>:
- 140:	42 02 00 4f 	ila	\$79,1024	# 400
- 144:	40 20 00 00 	nop	\$0
- 148:	42 00 01 4e 	ila	\$78,2
- 14c:	32 00 06 80 	br	180 <__ovly_load>	# 180
+.*	bi	\$0
+
+.*00 00 03 40.*
+.*SPU_ADDR32	\.ov_a1\+0x14
+	\.\.\.
 #...
+00000320 <00000000\.ovl_call.f1_a1>:
+.*	ila	\$78,1
+.*	lnop
+.*	ila	\$79,1040	# 410
+.*	bra?	.* <__ovly_load>.*
+
+00000330 <00000000\.ovl_call.setjmp>:
+.*	ila	\$78,0
+.*	lnop
+.*	ila	\$79,268	# 10c
+.*	bra?	.* <__ovly_load>.*
+
+00000340 <00000000\.ovl_call\.13:5>:
+.* 	ila	\$78,1
+.* 	lnop
+.* 	ila	\$79,1044	# 414
+.* 	bra?	.* <__ovly_load>.*
+
+00000350 <_SPUEAR_f1_a2>:
+.*	ila	\$78,2
+.*	lnop
+.*	ila	\$79,1040	# 410
+.*	bra?	.* <__ovly_load>.*
+
+#00000318 <00000000\.ovl_call.f1_a1>:
+#.*	bra?sl	\$75,.* <__ovly_load>.*
+#.*00 04 04 00.*
+#
+#00000320 <00000000\.ovl_call.setjmp>:
+#.*	bra?sl	\$75,.* <__ovly_load>.*
+#.*00 00 01 0c.*
+#
+#00000328 <_SPUEAR_f1_a2>:
+#.*	bra?sl	\$75,.* <__ovly_load>.*
+#.*00 08 04 00.*
+
 Disassembly of section \.ov_a1:
 
-00000400 <f1_a1>:
- 400:	35 00 00 00 	bi	\$0
-	\.\.\.
+00000400 <00000001\.ovl_call\.14:6>:
+.* 	ila	\$78,2
+.* 	lnop
+.* 	ila	\$79,1044	# 414
+.* 	bra?	.* <__ovly_load>.*
+
+00000410 <f1_a1>:
+.*	bi	\$0
+.*00 00 04 14.*
+.*SPU_ADDR32	\.ov_a1\+0x14
+.*00 00 04 20.*
+.*SPU_ADDR32	\.ov_a1\+0x20
+.*00 00 04 00.*
+.*SPU_ADDR32	\.ov_a2\+0x14
+
 Disassembly of section \.ov_a2:
 
-00000400 <f1_a2>:
- 400:	32 7f a2 00 	br	110 <longjmp>	# 110
-			400: SPU_REL16	longjmp
-	\.\.\.
+00000400 <00000002\.ovl_call\.13:5>:
+.*	ila	\$78,1
+.*	lnop
+.*	ila	\$79,1056	# 420
+.*	bra?	.* <__ovly_load>.*
+
+00000410 <f1_a2>:
+.*	br	.* <longjmp>.*
+.*SPU_REL16	longjmp
+.*00 00 04 00.*
+.*SPU_ADDR32	\.ov_a1\+0x20
+.*00 00 04 1c.*
+.*SPU_ADDR32	\.ov_a2\+0x1c
+.*00 00 00 00.*
+
 Disassembly of section \.data:
 
-00000410 <_ovly_table>:
- 410:	00 00 04 00 	.*
- 414:	00 00 00 10 	.*
- 418:	00 00 02 d0 	.*
- 41c:	00 00 00 01 	.*
- 420:	00 00 04 00 	.*
- 424:	00 00 00 10 	.*
- 428:	00 00 02 e0 	.*
- 42c:	00 00 00 01 	.*
-
-00000430 <_ovly_buf_table>:
- 430:	00 00 00 00 	.*
+00000420 <_ovly_table-0x10>:
+.*00 00 00 00 .*
+.*00 00 00 01 .*
+	\.\.\.
+00000430 <_ovly_table>:
+.*00 00 04 00 .*
+.*00 00 00 20 .*
+#.*00 00 03 10 .*
+.*00 00 01 00 .*
+.*00 00 00 01 .*
+.*00 00 04 00 .*
+.*00 00 00 20 .*
+#.*00 00 03 20 .*
+.*00 00 01 20 .*
+.*00 00 00 01 .*
+
+00000450 <_ovly_buf_table>:
+.*00 00 00 00 .*
+
 Disassembly of section \.toe:
 
-00000440 <_EAR_>:
+00000460 <_EAR_>:
 	\.\.\.
+
+Disassembly of section .nonalloc:
+
+00000000 <.nonalloc>:
+.*00 00 04 14.*
+.*SPU_ADDR32	\.ov_a1\+0x14
+.*00 00 04 20.*
+.*SPU_ADDR32	\.ov_a1\+0x20
+.*00 00 04 14.*
+.*SPU_ADDR32	\.ov_a2\+0x14
+.*00 00 04 1c.*
+.*SPU_ADDR32	\.ov_a2\+0x1c
+
 Disassembly of section \.note\.spu_name:
 
 .* <\.note\.spu_name>: