- unsigned int rxdmaen: 1; // Receive DMA enable. 0 = disabled.
- unsigned int txdmaen: 1; // Transmit DMA enable. 0 = disabled.
- unsigned int xa: 1; // Extended addressing. 0 = 7-bit addressing.
- unsigned int listen: 1; // Listen. 0 = disabled.
- unsigned int i2cword : 1; // Word mode. 0 = byte mode.
- unsigned int i2crm : 1; // Repeat mode. 0 = I2CNDAT.
- unsigned int i2cssel : 2; // Clock source select. 0=None, 1=ACLK, 2=SMCLK
- unsigned int i2cpsc : 8; // Clock prescaler.
- unsigned int i2csclh : 8; // Shift clock high register.
- unsigned int i2cscll : 8; // Shift clock low register.
+ uint16_t ubr;
+ uint8_t umctl;
+ uint8_t uctl;
+ uint8_t utctl;
+ uint8_t urctl;
+ uint8_t ume;
+} msp430_uart_registers_t;
+
+typedef union {
+ msp430_uart_config_t uartConfig;
+ msp430_uart_registers_t uartRegisters;
+} msp430_uart_union_config_t;
+
+msp430_uart_union_config_t msp430_uart_default_config = {
+ {
+ utxe : 1,
+ urxe : 1,
+ ubr : UBR_1MHZ_57600,
+ umctl : UMCTL_1MHZ_57600,
+ ssel : 0x02,
+ pena : 0,
+ pev : 0,
+ spb : 0,
+ clen : 1,
+ listen : 0,
+ mm : 0,
+ ckpl : 0,
+ urxse : 0,
+ urxeie : 1,
+ urxwie : 0,
+ utxe : 1,
+ urxe : 1
+ }
+};
+
+
+
+typedef struct {
+ unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition)
+ unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition)
+ unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h))
+ unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin.
+ unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK)
+ unsigned int i2ccrm: 1; // I2C repeat mode
+ unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register.
+} __attribute__ ((packed)) msp430_i2ctctl_t;
+
+DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t)
+DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t)
+
+typedef struct {
+ unsigned int :1;
+ unsigned int mst: 1; //Master mode (0=slave; 1=master)
+ unsigned int :1;
+ unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+ unsigned int xa: 1; //Extended addressing (0=7-bit addressing; 1=8-bit addressing)
+ unsigned int :1;
+ unsigned int txdmaen: 1; //DMA to TX (0=disabled; 1=enabled)
+ unsigned int rxdmaen: 1; //RX to DMA (0=disabled; 1=enabled)
+
+ unsigned int :4;
+ unsigned int i2cssel: 2; //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK)
+ unsigned int i2crm: 1; //Repeat mode (0=use I2CNDAT; 1=count in software)
+ unsigned int i2cword: 1; //Word mode (0=byte mode; 1=word mode)
+
+ unsigned int i2cpsc: 8; //Clock prescaler (values >0x04 not recomended)
+
+ unsigned int i2csclh: 8; //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+
+ unsigned int i2cscll: 8; //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+