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<title>Hardware Abstraction Architecture</title>
<meta name="author" content="Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer, Cory Sharp, Adam Wolisz, David Culler, David Gay" />
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<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
</tr>
<tr><th class="docinfo-name">Status:</th>
-<td>Draft</td></tr>
-<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.0</td>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
</tr>
<tr><th class="docinfo-name">Author:</th>
<td>Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer,
Cory Sharp, Adam Wolisz, David Culler, David Gay</td></tr>
-<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">14-Sep-2004</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.6</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2007-02-28</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu></td>
-</tr>
</tbody>
</table>
<div class="note">
developer more freedom in the design and the implementation of
reusable applications.</p>
<pre class="literal-block" id="fig-1">
- +-----------------------------+
- | |
- | Cross-platform applications |
- | |
- +--------------+--------------+
-+-----------------+ | +-----------------+
-|Platform-specific| | |Platform-specific|
-| applications | | | applications |
-+--------+--------+ Platform-independent | hardware interface +--------+--------+
- | +-----------------+--------+--------+-----------------+ |
- | | | | | |
- | +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+ |
- | |.------+------.| |.------+------.| |.------+------.| |.------+------.| |
- | || || || || || || || HIL 4 || |
- | || HIL 1 || || HIL 2 || || HIL 3 || |`------+------'| |
- | || || |`------+------'| |`------+------'| | | | |
- | |`------+------'| | | | | | | | | +----+--+
- +--+----+ | | |.------+------.| | | | | | | |
- | | | | || || |.------+------.| |.------+--+---.|
- |.---+--+------.| || || || || || ||
- || || || HAL 2 || || || || ||
- || || || || || HAL 3 || || HAL 4 ||
- || HAL 1 || |`------+------'| || || || ||
- || || | | | || || || ||
- || || | | | |`------+------'| |`------+------'|
- |`------+------'| |.------+------.| | | | | | |
- | | | || || |.------+------.| | | |
- |.------+------.| || HPL 2 || || || |.------+------.|
- || HPL 1 || || || || HPL 3 || || HPL 4 ||
- |`------+------'| |`------+------'| |`------+------'| |`------+------'|
- +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+ HW/SW
- | | | | boundary
- ************************************************************************************
- +------+------+ +------+------+ +------+------+ +------+------+
- |HW Platform 1| |HW Platform 2| |HW Platform 3| |HW Platform 4|
- +-------------+ +-------------+ +-------------+ +-------------+
-
-
- Fig.1: The proposed Hardware Abstraction Architecture
+ +-----------------------------+
+ | |
+ | Cross-platform applications |
+ | |
+ +--------------+--------------+
++-----------------+ | +-----------------+
+|Platform-specific| | |Platform-specific|
+| applications | | | applications |
++--------+--------+ | +--------+--------+
+ | Platform-independent | hardware interface |
+ | +-------------+--------+----+-------------+ |
+ | | | | | |
+ | +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+ |
+ | |.----+----.| |.----+----.| |.----+----.| |.----+----.| |
+ | || || || || || || || HIL 4 || |
+ | || HIL 1 || || HIL 2 || || HIL 3 || |`----+----'| |
+ | || || |`----+----'| |`----+----'| | | | |
+ | |`----+----'| | | | | | | | | +--+--+
+ +--+--+ | | |.----+----.| | | | | | | |
+ | | | | || || |.----+----.| |.----+--+-.|
+ |.-+--+----.| || || || || || ||
+ || || || HAL 2 || || || || ||
+ || || || || || HAL 3 || || HAL 4 ||
+ || HAL 1 || |`----+----'| || || || ||
+ || || | | | || || || ||
+ || || | | | |`----+----'| |`----+----'|
+ |`----+----'| |.----+----.| | | | | | |
+ | | | || || |.----+----.| | | |
+ |.----+----.| || HPL 2 || || || |.----+----.|
+ || HPL 1 || || || || HPL 3 || || HPL 4 ||
+ |`----+----'| |`----+----'| |`----+----'| |`----+----'|
+ +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+ HW/SW
+ | | | | boundary
+ ************************************************************************
+ +------+-----+ +-----+-----+ +-----+-----+ +-----+-----+
+ |HW Plat 1 | |HW Plat 2 | |HW Plat 3 | |HW Plat 4 |
+ +------------+ +-----------+ +-----------+ +-----------+
+
+
+ Fig.1: The proposed Hardware Abstraction Architecture
</pre>
<p>In contrast to the more traditional two step approach used in other
embedded operating systems like <a class="citation-reference" href="#windowsce" id="id9" name="id9">[WindowsCE]</a>, the three-level design
P.Buonadonna, L.Nachman, G.Tolle, D.Culler, and A.Wolisz,
"T2: A Second Generation OS For Embedded Sensor Networks",
<em>Technical Report TKN-05-007</em>, Telecommunication Networks Group,
-Technische Universitรคt Berlin, November 2005.</td></tr>
+Technische Universitaet Berlin, November 2005.</td></tr>
</tbody>
</table>
<table class="docutils citation" frame="void" id="windowsce" rules="none">
<tr><td class="label"><a name="tep117">[TEP117]</a></td><td><em>(<a class="fn-backref" href="#id12">1</a>, <a class="fn-backref" href="#id18">2</a>)</em> Phil Buonadonna, Jonathan Hui, "Low-Level I/O"</td></tr>
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