provides interface CC2420Register as MANAND;
provides interface CC2420Register as MANOR;
provides interface CC2420Register as AGCCTRL;
+ provides interface CC2420Register as RXFIFO_REGISTER;
// ram
provides interface CC2420Ram as IEEEADR;
provides interface CC2420Ram as PANID;
provides interface CC2420Ram as SHORTADR;
provides interface CC2420Ram as TXFIFO_RAM;
+ provides interface CC2420Ram as RXFIFO_RAM;
+ provides interface CC2420Ram as KEY0;
+ provides interface CC2420Ram as KEY1;
+ provides interface CC2420Ram as SABUF;
+ provides interface CC2420Ram as TXNONCE;
+ provides interface CC2420Ram as RXNONCE;
// fifos
provides interface CC2420Fifo as RXFIFO;
MANAND = Spi.Reg[ CC2420_MANAND ];
MANOR = Spi.Reg[ CC2420_MANOR ];
AGCCTRL = Spi.Reg[ CC2420_AGCCTRL ];
+ RXFIFO_REGISTER = Spi.Reg[ CC2420_RXFIFO ];
// ram
IEEEADR = Spi.Ram[ CC2420_RAM_IEEEADR ];
PANID = Spi.Ram[ CC2420_RAM_PANID ];
SHORTADR = Spi.Ram[ CC2420_RAM_SHORTADR ];
TXFIFO_RAM = Spi.Ram[ CC2420_RAM_TXFIFO ];
+ RXFIFO_RAM = Spi.Ram[ CC2420_RAM_RXFIFO ];
+ KEY0 = Spi.Ram[ CC2420_RAM_KEY0 ];
+ KEY1 = Spi.Ram[ CC2420_RAM_KEY1 ];
+ SABUF = Spi.Ram[ CC2420_RAM_SABUF ];
+ TXNONCE = Spi.Ram[ CC2420_RAM_TXNONCE ];
+ RXNONCE = Spi.Ram[ CC2420_RAM_RXNONCE ];
// fifos
RXFIFO = Spi.Fifo[ CC2420_RXFIFO ];