Update to centralize inside one module where all interrupt handlers are signaled...

[tinyos-2.x.git] / tos / chips / msp430 / usart / HplMsp430Usart0C.nc

diff --git a/tos/chips/msp430/usart/HplMsp430Usart0C.nc b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
index 8fa432376ae1ed7e188eac41dfec87fc343fcff8..8c87accc68b6d517f6289bd89e00ce976ff2d53b 100644 (file)
--- a/tos/chips/msp430/usart/HplMsp430Usart0C.nc
+++ b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
@@ -61,29 +61,31 @@
  * @version $Revision$ $Date$
  */
 
-#include "msp430UsartResource.h"
+#include "msp430usart.h"
 
 configuration HplMsp430Usart0C {
-
-  provides interface AsyncStdControl;
+  
   provides interface HplMsp430Usart;
   provides interface HplMsp430UsartInterrupts;
-
+  provides interface HplMsp430I2CInterrupts;
+  
 }
 
 implementation {
   
   components HplMsp430Usart0P as HplUsartP;
-  components HplMsp430GeneralIOC as GIO;
-  
-  AsyncStdControl = HplUsartP;
   HplMsp430Usart = HplUsartP;
   HplMsp430UsartInterrupts = HplUsartP;
+  HplMsp430I2CInterrupts = HplUsartP;
   
+  components HplMsp430GeneralIOC as GIO;
   HplUsartP.SIMO -> GIO.SIMO0;
   HplUsartP.SOMI -> GIO.SOMI0;
   HplUsartP.UCLK -> GIO.UCLK0;
   HplUsartP.URXD -> GIO.URXD0;
   HplUsartP.UTXD -> GIO.UTXD0;
   
+  components HplMsp430InterruptSigP;
+  HplUsartP.SIGNAL_UART0RX_VECTOR -> HplMsp430InterruptSigP.SIGNAL_UART0RX_VECTOR;
+  HplUsartP.SIGNAL_UART0TX_VECTOR -> HplMsp430InterruptSigP.SIGNAL_UART0TX_VECTOR;
 }