USCI UART output on USCI_A1 is working, using ACLK as BRCLK. Baud rate

[tinyos-2.x.git] / tos / chips / msp430 / usci / HplMsp430UsciInt0P.nc

diff --git a/tos/chips/msp430/usci/HplMsp430UsciInt0P.nc b/tos/chips/msp430/usci/HplMsp430UsciInt0P.nc
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+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * HPL interrupt interface for the USCI0 peripheral.
+ * 
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+ 
+#include "Msp430Usci.h"
+#include "msp430hardware.h"
+
+#if defined(USCIRX_VECTOR) /* odd def for MSP430G461 */
+#define USCIAB0RX_VECTOR USCIRX_VECTOR
+#endif
+#if defined(USCITX_VECTOR) /* odd def for MSP430G461 */
+#define USCIAB0TX_VECTOR USCITX_VECTOR
+#endif
+
+module HplMsp430UsciInt0P @safe() {
+  provides {
+    interface HplMsp430UsciInt as IntA;
+    interface HplMsp430UsciInt as IntB;
+  }
+}
+
+implementation
+{
+#if 0
+  MSP430REG_NORACE(UC0IFG);
+  MSP430REG_NORACE(UCA0CTL0);
+  MSP430REG_NORACE(UCA0CTL1);
+  MSP430REG_NORACE(UCA0RXBUF);
+  MSP430REG_NORACE(UCB0CTL0);
+  MSP430REG_NORACE(UCB0CTL1);
+  MSP430REG_NORACE(UCB0RXBUF);
+#endif
+
+  /* This USCI_Ax and USCI_Bx interrupt vector signals receive events for UART
+   * and SPI modes, and status events for I2C modes.  Only Bx can do I2C.
+   */
+  TOSH_SIGNAL(USCIAB0RX_VECTOR) {
+    if (READ_FLAG(UC0IFG, UCA0RXIFG)) {
+      volatile uint8_t c = UCA0RXBUF; /* read to clear UCA0RXIFG */
+      if (READ_FLAG(UCA0CTL1, UCBRK)) {
+       UCA0CTL1 &= ~UCBRK;
+       if (READ_FLAG(UCA0CTL0, UCMODE_3) == UCMODE_3)
+         UCA0CTL1 &= ~UCDORM;
+       signal IntA.brk();
+      } else
+       signal IntA.rx(c);
+    } else if (READ_FLAG(UC0IFG, UCB0RXIFG)) {
+      volatile uint8_t c = UCB0RXBUF; /* read to clear UCB0RXIFG */
+      if (READ_FLAG(UCB0CTL1, UCBRK)) {
+       CLR_FLAG(UCB0CTL1, UCBRK);
+       if (READ_FLAG(UCB0CTL0, UCMODE_3) == UCMODE_3)
+         CLR_FLAG(UCB0CTL1, UCDORM);
+       signal IntB.brk();
+      } else
+       signal IntB.rx(c);
+    } else if (READ_FLAG(UCB0STAT, UCALIFG))
+      signal IntB.i2cCal();
+    else if (READ_FLAG(UCB0STAT, UCNACKIFG))
+      signal IntB.i2cNak();
+    else if (READ_FLAG(UCB0STAT, UCSTTIFG))
+      signal IntB.i2cStart();
+    else if (READ_FLAG(UCB0STAT, UCSTPIFG))
+      signal IntB.i2cStop();
+  }
+  
+  /* This USCI_Ax and USCI_Bx interrupt vector signals transmit events for UART
+   * and SPI modes, and rx/tx events for I2C modes.  Only Bx can do I2C.
+   */
+  TOSH_SIGNAL(USCIAB0TX_VECTOR) {
+    if (READ_FLAG(UC0IFG, UCB0RXIFG))
+      signal IntB.rx(UCB0RXBUF); /* I2C receive */
+    else if (READ_FLAG(UC0IFG, UCA0TXIFG))
+      signal IntA.tx();
+    else if (READ_FLAG(UC0IFG, UCB0TXIFG))
+      signal IntB.tx();
+  }
+
+  default async event void IntA.brk() {}
+  default async event void IntA.rx(uint8_t byte) {}
+  default async event void IntA.tx() {}
+  /* i2c is not available for A devices, so the below are never signalled */
+  default async event void IntA.i2cCal() {}
+  default async event void IntA.i2cNak() {}
+  default async event void IntA.i2cStart() {}
+  default async event void IntA.i2cStop() {}
+
+  default async event void IntB.brk() {}
+  default async event void IntB.rx(uint8_t byte) {}
+  default async event void IntB.tx() {}
+  default async event void IntB.i2cCal() {}
+  default async event void IntB.i2cNak() {}
+  default async event void IntB.i2cStart() {}
+  default async event void IntB.i2cStop() {}
+}