Remove incorrect comment from Msp430SpiP.

[tinyos-2.x.git] / tos / chips / msp430 / usci / Msp430SpiP.nc

diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc
index 9f3fd177fabddc6079ed4374425502d34de5a476..e44a0454620fbb4e518697fd5ebb1c7c2bf93457 100644 (file)
--- a/tos/chips/msp430/usci/Msp430SpiP.nc
+++ b/tos/chips/msp430/usci/Msp430SpiP.nc
@@ -32,6 +32,8 @@
  *
  * TODO: Implement error checking via UCxxSTAT
  *
+ * NOTE: Define NO_REN_ON_SPI to disable PxREN bits when SPI is acquired.
+ *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
  
@@ -61,7 +63,9 @@ implementation {
     PINS_SOMI,
     PINS_SIMO,
     PINS_CLK,
+#ifdef NO_REN_ON_SPI
     PINS_RENADDR,      /* This gets added to store the PxREN bit */
+#endif
   };
 
   uint8_t m_pins;
@@ -108,6 +112,7 @@ implementation {
 
       /* Configure pins for SPI, saving prior pin states */
       m_pins = 0;
+#ifdef NO_REN_ON_SPI
       /* - First save off and disable PxREN bits */
       if (is4pin() && call STE.isRen()) {
        m_pins |= (1 << (PINS_STE + PINS_RENADDR));
@@ -125,6 +130,7 @@ implementation {
        m_pins |= (1 << (PINS_CLK + PINS_RENADDR));
        call CLK.disableRen();
       }
+#endif
       /* - Then save off IOFunc state and enable ModuleFunc */
       if (is4pin() && call STE.isIOFunc()) {
        m_pins |= (1 << PINS_STE);
@@ -173,6 +179,7 @@ implementation {
       if (m_pins & (1 << PINS_CLK))
        call CLK.selectIOFunc();
       /* - Then restore PxREN bits */
+#ifdef NO_REN_ON_SPI
       if (is4pin() && (m_pins & (1 << (PINS_STE + PINS_RENADDR))))
        call STE.enableRen();
       if (m_pins & (1 << (PINS_SIMO + PINS_RENADDR)))
@@ -181,6 +188,7 @@ implementation {
        call SOMI.enableRen();
       if (m_pins & (1 << (PINS_CLK + PINS_RENADDR)))
        call CLK.enableRen();
+#endif
     }
   }
 
@@ -198,11 +206,6 @@ implementation {
 
   void sendData()
   {
-    /* We don't need to check Registers.getIfgTx() (aks UCxxTXIFG), as
-     * sendData() is only called after peripheral init or receipt of the rx()
-     * interrupt.  SPI on msp430 guarantees UCxxTXIFG is asserted in both of
-     * these cases.
-     */
     atomic {
       uint16_t end = m_pos + (blockSize ? blockSize : BLOCKSIZE_DEFAULT);
       uint8_t tmp;